1 #define MICROPY_HW_BOARD_NAME "i.MX RT1020 EVK" 2 #define MICROPY_HW_MCU_NAME "MIMXRT1021DAG5A" 3 4 #define BOARD_FLASH_SIZE (8 * 1024 * 1024) 5 6 // i.MX RT1020 EVK has 1 board LED 7 // Todo: think about replacing the define with searching in the generated pins? 8 #define MICROPY_HW_LED1_PIN (pin_GPIO_AD_B0_05) 9 #define MICROPY_HW_LED_ON(pin) (mp_hal_pin_low(pin)) 10 #define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_high(pin)) 11 #define BOARD_FLASH_CONFIG_HEADER_H "evkmimxrt1020_flexspi_nor_config.h" 12 #define BOARD_FLASH_OPS_HEADER_H "hal/flexspi_nor_flash.h" 13 14 #define MICROPY_HW_NUM_PIN_IRQS (3 * 32) 15 16 // Define mapping logical UART # to hardware UART # 17 // RX/TX HW-UART Logical UART 18 // D3/D5 LPUART1 Not usable, Since D3 is blocked. 19 // D0/D1 LPUART2 -> 1 20 // D6/D9 LPUART3 -> 2 21 // D10/D12 LPUART5 -> 3 22 // D14/D15 LPUART8 -> 4 23 // A0/A1 LPUART4 -> 5 24 25 #define MICROPY_HW_UART_NUM (sizeof(uart_index_table) / sizeof(uart_index_table)[0]) 26 #define MICROPY_HW_UART_INDEX { 0, 2, 3, 5, 8, 4 } 27 28 #define IOMUX_TABLE_UART \ 29 { IOMUXC_GPIO_AD_B0_06_LPUART1_TX }, { IOMUXC_GPIO_AD_B0_07_LPUART1_RX }, \ 30 { IOMUXC_GPIO_AD_B1_08_LPUART2_TX }, { IOMUXC_GPIO_AD_B1_09_LPUART2_RX }, \ 31 { IOMUXC_GPIO_AD_B0_14_LPUART3_TX }, { IOMUXC_GPIO_AD_B0_15_LPUART3_RX }, \ 32 { IOMUXC_GPIO_AD_B1_10_LPUART4_TX }, { IOMUXC_GPIO_AD_B1_11_LPUART4_RX }, \ 33 { IOMUXC_GPIO_AD_B0_10_LPUART5_TX }, { IOMUXC_GPIO_AD_B0_11_LPUART5_RX }, \ 34 { 0 }, { 0 }, \ 35 { 0 }, { 0 }, \ 36 { IOMUXC_GPIO_SD_B1_02_LPUART8_TX }, { IOMUXC_GPIO_SD_B1_03_LPUART8_RX }, 37 38 #define MICROPY_HW_SPI_INDEX { 1, 3 } 39 40 #define IOMUX_TABLE_SPI \ 41 { IOMUXC_GPIO_AD_B0_10_LPSPI1_SCK }, { IOMUXC_GPIO_AD_B0_11_LPSPI1_PCS0 }, \ 42 { IOMUXC_GPIO_AD_B0_12_LPSPI1_SDO }, { IOMUXC_GPIO_AD_B0_13_LPSPI1_SDI }, \ 43 { 0 }, { 0 }, \ 44 { 0 }, { 0 }, \ 45 { IOMUXC_GPIO_AD_B1_12_LPSPI3_SCK }, { IOMUXC_GPIO_AD_B1_13_LPSPI3_PCS0 }, \ 46 { IOMUXC_GPIO_AD_B1_14_LPSPI3_SDO }, { IOMUXC_GPIO_AD_B1_15_LPSPI3_SDI }, 47 48 #define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx, \ 49 kDmaRequestMuxLPSPI3Rx, kDmaRequestMuxLPSPI4Rx } 50 51 #define DMA_REQ_SRC_TX { 0, kDmaRequestMuxLPSPI1Tx, kDmaRequestMuxLPSPI2Tx, \ 52 kDmaRequestMuxLPSPI3Tx, kDmaRequestMuxLPSPI4Tx } 53 54 // Define mapping hardware I2C # to logical I2C # 55 // SDA/SCL HW-I2C Logical I2C 56 // D14/D15 LPI2C4 -> 0 57 // A4/A5 LPI2C1 -> 1 58 // D0/D1 LPI2C2 -> 2 59 60 #define MICROPY_HW_I2C_INDEX { 4, 1, 2 } 61 62 #define IOMUX_TABLE_I2C \ 63 { IOMUXC_GPIO_AD_B1_14_LPI2C1_SCL }, { IOMUXC_GPIO_AD_B1_15_LPI2C1_SDA }, \ 64 { IOMUXC_GPIO_AD_B1_08_LPI2C2_SCL }, { IOMUXC_GPIO_AD_B1_09_LPI2C2_SDA }, \ 65 { 0 }, { 0 }, \ 66 { IOMUXC_GPIO_SD_B1_02_LPI2C4_SCL }, { IOMUXC_GPIO_SD_B1_03_LPI2C4_SDA }, 67