1 #define MICROPY_HW_BOARD_NAME "Teensy 4.1" 2 #define MICROPY_HW_MCU_NAME "MIMXRT1062DVJ6A" 3 4 #define BOARD_FLASH_SIZE (8 * 1024 * 1024) 5 6 // Teensy 4.1 has 1 board LED 7 #define MICROPY_HW_LED1_PIN (pin_GPIO_B0_03) 8 #define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) 9 #define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) 10 #define BOARD_FLASH_CONFIG_HEADER_H "teensy41_flexspi_nor_config.h" 11 #define BOARD_FLASH_OPS_HEADER_H "hal/flexspi_nor_flash.h" 12 13 #define MICROPY_HW_NUM_PIN_IRQS (4 * 32 + 3) 14 15 // UART config: 8 UARTs at the pins for Teensy 4.1 16 #define MICROPY_HW_UART_NUM (sizeof(uart_index_table) / sizeof(uart_index_table)[0]) 17 #define MICROPY_HW_UART_INDEX { 0, 6, 4, 2, 3, 8, 1, 7, 5 } 18 19 #define IOMUX_TABLE_UART \ 20 { IOMUXC_GPIO_AD_B0_12_LPUART1_TX }, { IOMUXC_GPIO_AD_B0_13_LPUART1_RX }, \ 21 { IOMUXC_GPIO_AD_B1_02_LPUART2_TX }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RX }, \ 22 { IOMUXC_GPIO_AD_B1_06_LPUART3_TX }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RX }, \ 23 { IOMUXC_GPIO_B1_00_LPUART4_TX }, { IOMUXC_GPIO_B1_01_LPUART4_RX }, \ 24 { IOMUXC_GPIO_B1_12_LPUART5_TX }, { IOMUXC_GPIO_B1_13_LPUART5_RX }, \ 25 { IOMUXC_GPIO_AD_B0_02_LPUART6_TX }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RX }, \ 26 { IOMUXC_GPIO_EMC_31_LPUART7_TX }, { IOMUXC_GPIO_EMC_32_LPUART7_RX }, \ 27 { IOMUXC_GPIO_AD_B1_10_LPUART8_TX }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RX }, 28 29 #define MICROPY_HW_SPI_INDEX { 4, 3, 1 } 30 31 #define IOMUX_TABLE_SPI \ 32 { IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK }, { IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0 }, \ 33 { IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO }, { IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI }, \ 34 { 0 }, { 0 }, \ 35 { 0 }, { 0 }, \ 36 { IOMUXC_GPIO_AD_B1_15_LPSPI3_SCK }, { IOMUXC_GPIO_AD_B1_12_LPSPI3_PCS0 }, \ 37 { IOMUXC_GPIO_AD_B1_14_LPSPI3_SDO }, { IOMUXC_GPIO_AD_B1_13_LPSPI3_SDI }, \ 38 { IOMUXC_GPIO_B0_03_LPSPI4_SCK }, { IOMUXC_GPIO_B0_00_LPSPI4_PCS0 }, \ 39 { IOMUXC_GPIO_B0_02_LPSPI4_SDO }, { IOMUXC_GPIO_B0_01_LPSPI4_SDI }, 40 41 #define DMA_REQ_SRC_RX { 0, kDmaRequestMuxLPSPI1Rx, kDmaRequestMuxLPSPI2Rx, \ 42 kDmaRequestMuxLPSPI3Rx, kDmaRequestMuxLPSPI4Rx } 43 44 #define DMA_REQ_SRC_TX { 0, kDmaRequestMuxLPSPI1Tx, kDmaRequestMuxLPSPI2Tx, \ 45 kDmaRequestMuxLPSPI3Tx, kDmaRequestMuxLPSPI4Tx } 46 47 // Define mapping hardware I2C # to logical I2C # 48 // SDA/SCL HW-I2C Logical I2C 49 // 17/16 LPI2C3 -> 0 50 // 18/19 LPI2C1 -> 1 51 // 25/24 LPI2C4 -> 2 52 53 #define MICROPY_HW_I2C_INDEX { 1, 3, 4 } 54 55 #define IOMUX_TABLE_I2C \ 56 { IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL }, { IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA }, \ 57 { 0 }, { 0 }, \ 58 { IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA }, \ 59 { IOMUXC_GPIO_AD_B0_12_LPI2C4_SCL }, { IOMUXC_GPIO_AD_B0_13_LPI2C4_SDA }, 60