1#| -*-Scheme-*- 2 3Copyright (C) 1986, 1987, 1988, 1989, 1990, 1991, 1992, 1993, 1994, 4 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 5 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014 Massachusetts 6 Institute of Technology 7 8This file is part of MIT/GNU Scheme. 9 10MIT/GNU Scheme is free software; you can redistribute it and/or modify 11it under the terms of the GNU General Public License as published by 12the Free Software Foundation; either version 2 of the License, or (at 13your option) any later version. 14 15MIT/GNU Scheme is distributed in the hope that it will be useful, but 16WITHOUT ANY WARRANTY; without even the implied warranty of 17MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18General Public License for more details. 19 20You should have received a copy of the GNU General Public License 21along with MIT/GNU Scheme; if not, write to the Free Software 22Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, 23USA. 24 25|# 26 27;;;; 68000 Instruction Set Description 28;;; Originally from GJS (who did the hard part). 29 30(declare (usual-integrations)) 31 32;;;; Control Transfer: Branch instructions 33 34;; No size suffix means that the assembler should choose the right 35;; size offset. 36 37;; When the displacement is 0 (a branch to the immediately following 38;; instruction), a NOP instruction is issued for non-subroutine 39;; branches (BRA and Bcc). The branch tensioner can't really handle 40;; instructions that disappear. 41 42;; For BSR instructions to the immediately following instruction, 43;; there is nothing that can be done. The branch tensioner assumes 44;; that the output does not decrease with increasing discriminator 45;; ranges, and the only two possibilities for this instruction would 46;; be to put a NOP after the BSR, or to change the BSR into a 47;; pc-relative PEA, but either of these options would make the code 32 48;; bits long, longer than the 16 bits used for short displacements. 49;; An error is generated if this situation arises. 50 51(let-syntax 52 ((define-branch-instruction 53 (sc-macro-transformer 54 (lambda (form environment) 55 environment 56 `(DEFINE-INSTRUCTION ,(cadr form) 57 ((,@(caddr form) B (@PCO (? o))) 58 (WORD ,@(cadddr form) 59 (8 o SIGNED))) 60 61 ((,@(caddr form) B (@PCR (? l))) 62 (WORD ,@(cadddr form) 63 (8 l SHORT-LABEL))) 64 65 ((,@(caddr form) W (@PCO (? o))) 66 (WORD ,@(cadddr form) 67 (8 #b00000000)) 68 (immediate-word o)) 69 70 ((,@(caddr form) W (@PCR (? l))) 71 (WORD ,@(cadddr form) 72 (8 #b00000000)) 73 (relative-word l)) 74 75 ;; 68020 only 76 77 ((,@(caddr form) L (@PCO (? o))) 78 (WORD ,@(cadddr form) 79 (8 #b11111111)) 80 (immediate-long o)) 81 82 ((,@(caddr form) L (@PCR (? l))) 83 (WORD ,@(cadddr form) 84 (8 #b11111111)) 85 (relative-long l)) 86 87 ((,@(caddr form) (@PCO (? o))) 88 (GROWING-WORD (disp o) 89 ((0 0) 90 ,@(cddddr form)) 91 ((-128 127) 92 (WORD ,@(cadddr form) 93 (8 disp SIGNED))) 94 ((-32768 32767) 95 (WORD ,@(cadddr form) 96 (8 #b00000000) 97 (16 disp SIGNED))) 98 ((() ()) 99 (WORD ,@(cadddr form) 100 (8 #b11111111) 101 (32 disp SIGNED))))) 102 103 ((,@(caddr form) (@PCR (? l))) 104 (GROWING-WORD (disp `(- ,l (+ *PC* 2))) 105 ((0 0) 106 ,@(cddddr form)) 107 ((-128 127) 108 (WORD ,@(cadddr form) 109 (8 disp SIGNED))) 110 ((-32768 32767) 111 (WORD ,@(cadddr form) 112 (8 #b00000000) 113 (16 disp SIGNED))) 114 ((() ()) 115 (WORD ,@(cadddr form) 116 (8 #b11111111) 117 (32 disp SIGNED)))))))))) 118 119 (define-branch-instruction B ((? c cc)) ((4 #b0110) (4 c)) 120 (WORD (16 #b0100111001110001))) 121 (define-branch-instruction BRA () ((8 #b01100000)) 122 (WORD (16 #b0100111001110001))) 123 (define-branch-instruction BSR () ((8 #b01100001)) 124 (WORD (16 (error "BSR to following instruction"))))) 125 126(define-instruction DB 127 (((? c cc) (D (? rx)) (@PCO (? o))) 128 (WORD (4 #b0101) 129 (4 c) 130 (5 #b11001) 131 (3 rx)) 132 (immediate-word o)) 133 134 (((? c cc) (D (? rx)) (@PCR (? l))) 135 (WORD (4 #b0101) 136 (4 c) 137 (5 #b11001) 138 (3 rx)) 139 (relative-word l))) 140 141(define-instruction JMP 142 (((? ea ea-c)) 143 (WORD (10 #b0100111011) 144 (6 ea DESTINATION-EA)))) 145 146(define-instruction JSR 147 (((? ea ea-c)) 148 (WORD (10 #b0100111010) 149 (6 ea DESTINATION-EA)))) 150 151;; 68010 and 68020 only 152 153(define-instruction RTD 154 (((& (? offset))) 155 (WORD (16 #b0100111001110100)) 156 (EXTENSION-WORD (16 offset)))) 157 158(define-instruction RTE 159 (() 160 (WORD (16 #b0100111001110011)))) 161 162(define-instruction RTR 163 (() 164 (WORD (16 #b0100111001110111)))) 165 166(define-instruction RTS 167 (() 168 (WORD (16 #b0100111001110101)))) 169 170(define-instruction TRAPV 171 (() 172 (WORD (16 #b0100111001110110)))) 173 174;;;; Family member dependent miscellaneous instructions. 175 176#| 177 178;; These are the 68000/68010 versions 179 180(define-instruction TRAP 181 (((& (? v))) 182 (WORD (12 #b010011100100) 183 (4 v)))) 184 185(define-instruction CHK 186 (((? ea ea-d) (D (? rx))) 187 (WORD (4 #b0100) 188 (3 rx) 189 (3 #b110) 190 (6 ea SOURCE-EA 'W)))) 191 192(define-instruction LINK 193 (((A (? rx)) (& (? d))) 194 (WORD (13 #b0100111001010) 195 (3 rx)) 196 (immediate-word d))) 197 198|# 199 200;;;; Family member dependent miscellaneous instructions (continued). 201 202;; These are the 68020 versions 203 204(define-instruction TRAP 205 (((& (? v))) 206 (WORD (12 #b010011100100) 207 (4 v))) 208 209 (((? c cc)) 210 (WORD (4 #b0101) 211 (4 cc) 212 (8 #b11111100))) 213 214 (((? c cc) W (& (? data))) 215 (WORD (4 #b0101) 216 (4 cc) 217 (8 #b11111010)) 218 (EXTENSION-WORD (16 data))) 219 220 (((? c cc) L (& (? data))) 221 (WORD (4 #b0101) 222 (4 cc) 223 (8 #b11111011)) 224 (EXTENSION-WORD (32 data)))) 225 226(define-instruction CHK 227 ;; This is for compatibility with older (68000/68010) syntax. 228 ;; There is no size suffix to the opcode. 229 230 (((? ea ea-d) (D (? rx))) 231 (WORD (4 #b0100) 232 (3 rx) 233 (3 #b110) 234 (6 ea SOURCE-EA 'W))) 235 236 (((? size chkwl) (? ea ea-d) (D (? rx))) 237 (WORD (4 #b0100) 238 (3 rx) 239 (3 size) 240 (6 ea SOURCE-EA 'W)))) 241 242(define-instruction LINK 243 ((W (A (? rx)) (& (? d))) 244 (WORD (13 #b0100111001010) 245 (3 rx)) 246 (immediate-word d)) 247 248 ((L (A (? rx)) (& (? d))) 249 (WORD (13 #b0100100000001) 250 (3 rx)) 251 (immediate-long d))) 252 253;;;; Randomness 254 255(define-instruction ILLEGAL 256 (() 257 (WORD (16 #b0100101011111100)))) 258 259(define-instruction NOP 260 (() 261 (WORD (16 #b0100111001110001)))) 262 263(define-instruction RESET 264 (() 265 (WORD (16 #b0100111001110000)))) 266 267(define-instruction STOP 268 (((& (? data))) 269 (WORD (16 #b0100111001110010)) 270 (immediate-word data))) 271 272(define-instruction SWAP 273 (((D (? rx))) 274 (WORD (13 #b0100100001000) 275 (3 rx)))) 276 277(define-instruction UNLK 278 (((A (? rx))) 279 (WORD (13 #b0100111001011) 280 (3 rx)))) 281 282;;;; Data Transfer 283 284(define-instruction CLR 285 (((? s bwl) (? ea ea-d&a)) 286 (WORD (8 #b01000010) 287 (2 s) 288 (6 ea DESTINATION-EA)))) 289 290(define-instruction EXG 291 (((D (? rx)) (D (? ry))) 292 (WORD (4 #b1100) 293 (3 rx) 294 (6 #b101000) 295 (3 ry))) 296 297 (((A (? rx)) (A (? ry))) 298 (WORD (4 #b1100) 299 (3 rx) 300 (6 #b101001) 301 (3 ry))) 302 303 (((D (? rx)) (A (? ry))) 304 (WORD (4 #b1100) 305 (3 rx) 306 (6 #b110001) 307 (3 ry))) 308 309 (((A (? ry)) (D (? rx))) 310 (WORD (4 #b1100) 311 (3 rx) 312 (6 #b110001) 313 (3 ry)))) 314 315(define-instruction LEA 316 (((? ea ea-c) (A (? rx))) 317 (WORD (4 #b0100) 318 (3 rx) 319 (3 #b111) 320 (6 ea DESTINATION-EA)))) 321 322(define-instruction PEA 323 (((? cea ea-c)) 324 (WORD (10 #b0100100001) 325 (6 cea DESTINATION-EA)))) 326 327(define-instruction S 328 (((? c cc) (? dea ea-d&a)) 329 (WORD (4 #b0101) 330 (4 c) 331 (2 #b11) 332 (6 dea DESTINATION-EA)))) 333 334(define-instruction TAS 335 (((? dea ea-d&a)) 336 (WORD (10 #b0100101011) 337 (6 dea DESTINATION-EA)))) 338 339(define-instruction MOVE 340 ((B (? sea ea-all-A) (? dea ea-d&a)) 341 (WORD (3 #b000) 342 (1 #b1) 343 (6 dea DESTINATION-EA-REVERSED) 344 (6 sea SOURCE-EA 'B))) 345 346 ;; the following includes the MOVEA instruction 347 348 (((? s lw ssym) (? sea ea-all) (? dea ea-all)) 349 (WORD (3 #b001) 350 (1 s) 351 (6 dea DESTINATION-EA-REVERSED) 352 (6 sea SOURCE-EA ssym))) 353 354 ;; Special MOVE instructions 355 356 ((W (? ea ea-d) (CCR)) ;MOVE to CCR 357 (WORD (10 #b0100010011) 358 (6 ea SOURCE-EA 'W))) 359 360 ((W (CCR) (? ea ea-d)) ;MOVE from CCR 361 (WORD (10 #b0100001011) 362 (6 ea DESTINATION-EA 'W))) 363 364 ((W (? ea ea-d) (SR)) ;MOVE to SR 365 (WORD (10 #b0100011011) 366 (6 ea SOURCE-EA 'W))) 367 368 ((W (SR) (? ea ea-d&a)) ;MOVE from SR 369 (WORD (10 #b0100000011) 370 (6 ea DESTINATION-EA))) 371 372 ((L (A (? rx)) (USP)) ;MOVE to USP 373 (WORD (13 #b0100111001100) 374 (3 rx))) 375 376 ((L (USP) (A (? rx))) ;MOVE from USP 377 (WORD (13 #b0100111001101) 378 (3 rx)))) 379 380;; MOV is a special case, separated for efficiency so there are less 381;; rules to try. 382 383(define-instruction MOV 384 ((B (? sea ea-all-A) (? dea ea-d&a)) 385 (WORD (3 #b000) 386 (1 #b1) 387 (6 dea DESTINATION-EA-REVERSED) 388 (6 sea SOURCE-EA 'B))) 389 390 ;; the following includes the MOVEA instruction 391 392 (((? s lw ssym) (? sea ea-all) (? dea ea-all)) 393 (WORD (3 #b001) 394 (1 s) 395 (6 dea DESTINATION-EA-REVERSED) 396 (6 sea SOURCE-EA ssym)))) 397 398(define-instruction MOVEQ 399 (((& (? data)) (D (? rx))) 400 (WORD (4 #b0111) 401 (3 rx) 402 (1 #b0) 403 (8 data SIGNED)))) 404 405(define-instruction MOVEM 406 (((? s wl) (? r @+reg-list) (? dea ea-c&a)) 407 (WORD (9 #b010010001) 408 (1 s) 409 (6 dea DESTINATION-EA)) 410 (output-bit-string r)) 411 412 (((? s wl) (? r @-reg-list) (@-a (? rx))) 413 (WORD (9 #b010010001) 414 (1 s) 415 (3 #b100) 416 (3 rx)) 417 (output-bit-string r)) 418 419 (((? s wl) (? sea ea-c) (? r @+reg-list)) 420 (WORD (9 #b010011001) 421 (1 s) 422 (6 sea SOURCE-EA s)) 423 (output-bit-string r)) 424 425 (((? s wl) (@A+ (? rx)) (? r @+reg-list)) 426 (WORD (9 #b010011001) 427 (1 s) 428 (3 #b011) 429 (3 rx)) 430 (output-bit-string r))) 431 432(define-instruction MOVEP 433 (((? s wl) (D (? rx)) (@AO (? ry) (? o))) 434 (WORD (4 #b0000) 435 (3 rx) 436 (2 #b11) 437 (1 s) 438 (3 #b001) 439 (3 ry)) 440 (offset-word o)) 441 442 (((? s wl) (D (? rx)) (@AR (? ry) (? l))) 443 (WORD (4 #b0000) 444 (3 rx) 445 (2 #b11) 446 (1 s) 447 (3 #b001) 448 (3 ry)) 449 (relative-word l)) 450 451 (((? s wl) (@AO (? ry) (? o)) (D (? rx))) 452 (WORD (4 #b0000) 453 (3 rx) 454 (2 #b10) 455 (1 s) 456 (3 #b001) 457 (3 ry)) 458 (offset-word o)) 459 460 (((? s wl) (@AR (? ry) (? l)) (D (? rx))) 461 (WORD (4 #b0000) 462 (3 rx) 463 (2 #b10) 464 (1 s) 465 (3 #b001) 466 (3 ry)) 467 (relative-word l))) 468 469;;;; 68010 and 68020 only privileged MOVE instructions. 470 471;;; move from/to control register. 472 473(define-instruction MOVEC 474 ((((? creg cont-reg)) ((? rtype da) (? greg))) 475 (WORD (15 #b010011100111101) 476 (1 #b0)) 477 (EXTENSION-WORD (1 rtype) 478 (3 greg) 479 (12 creg))) 480 481 ((((? rtype da) (? greg)) ((? creg cont-reg))) 482 (WORD (15 #b010011100111101) 483 (1 #b1)) 484 (EXTENSION-WORD (1 rtype) 485 (3 greg) 486 (12 creg)))) 487 488(define-instruction MOVES 489 (((? size bwl) ((? rtype da) (? reg)) (? dest ea-m&a)) 490 (WORD (8 #b00001110) 491 (2 size) 492 (6 dest DESTINATION-EA)) 493 (EXTENSION-WORD (1 rtype) 494 (3 reg) 495 (1 #b1) 496 (11 #b00000000000))) 497 (((? size bwl) (? dest ea-m&a) ((? rtype da) (? reg))) 498 (WORD (8 #b00001110) 499 (2 size) 500 (6 dest DESTINATION-EA)) 501 (EXTENSION-WORD (1 rtype) 502 (3 reg) 503 (1 #b0) 504 (11 #b00000000000)))) 505