1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5 
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
13 
14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
20 
21 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
22 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 #ifdef CK1
28 
29 template <typename T, int X, long long Y>
30 struct SS{
31   T a[X];
32   float b;
fooSS33   int foo(void) {
34 
35     #pragma omp target
36     #pragma omp teams distribute parallel for
37     for(int i = 0; i < X; i++) {
38       a[i] = (T)0;
39     }
40     #pragma omp target
41     #pragma omp teams distribute parallel for schedule(static)
42     for(int i = 0; i < X; i++) {
43       a[i] = (T)0;
44     }
45     #pragma omp target
46     #pragma omp teams distribute parallel for schedule(static, X/2)
47     for(int i = 0; i < X; i++) {
48       a[i] = (T)0;
49     }
50 
51     #pragma omp target
52     #pragma omp teams distribute parallel for schedule(dynamic)
53     for(int i = 0; i < X; i++) {
54       a[i] = (T)0;
55     }
56 
57     #pragma omp target
58     #pragma omp teams distribute parallel for schedule(dynamic, X/2)
59     for(int i = 0; i < X; i++) {
60       a[i] = (T)0;
61     }
62 
63 
64 
65 
66 
67 
68 
69 
70 
71 
72 
73 
74 
75 
76 
77 
78     return a[0];
79   }
80 };
81 
teams_template_struct(void)82 int teams_template_struct(void) {
83   SS<int, 123, 456> V;
84   return V.foo();
85 
86 }
87 #endif // CK1
88 
89 // Test host codegen.
90 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
91 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
92 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
93 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
94 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
95 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
96 
97 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
98 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
99 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18
100 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
101 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
102 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20
103 
104 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
105 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
106 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
107 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
108 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
109 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
110 #ifdef CK2
111 
112 template <typename T, int n>
tmain(T argc)113 int tmain(T argc) {
114   T a[n];
115   int m = 10;
116 #pragma omp target
117 #pragma omp teams distribute parallel for
118   for(int i = 0; i < n; i++) {
119     a[i] = (T)0;
120   }
121 #pragma omp target
122 #pragma omp teams distribute parallel for schedule(static)
123   for(int i = 0; i < n; i++) {
124     a[i] = (T)0;
125   }
126 #pragma omp target
127 #pragma omp teams distribute parallel for schedule(static, m)
128   for(int i = 0; i < n; i++) {
129     a[i] = (T)0;
130   }
131 #pragma omp target
132 #pragma omp teams distribute parallel for schedule(dynamic)
133   for(int i = 0; i < n; i++) {
134     a[i] = (T)0;
135   }
136 #pragma omp target
137 #pragma omp teams distribute parallel for schedule(dynamic, m)
138   for(int i = 0; i < n; i++) {
139     a[i] = (T)0;
140   }
141   return 0;
142 }
143 
main(int argc,char ** argv)144 int main (int argc, char **argv) {
145   int n = 100;
146   int a[n];
147   int m = 10;
148 #pragma omp target
149 #pragma omp teams distribute parallel for
150   for(int i = 0; i < n; i++) {
151     a[i] = 0;
152   }
153 #pragma omp target
154 #pragma omp teams distribute parallel for dist_schedule(static)
155   for(int i = 0; i < n; i++) {
156     a[i] = 0;
157   }
158 #pragma omp target
159 #pragma omp teams distribute parallel for dist_schedule(static, m)
160   for(int i = 0; i < n; i++) {
161     a[i] = 0;
162   }
163 #pragma omp target
164 #pragma omp teams distribute parallel for schedule(dynamic)
165   for(int i = 0; i < n; i++) {
166     a[i] = 0;
167   }
168 #pragma omp target
169 #pragma omp teams distribute parallel for schedule(dynamic, m)
170   for(int i = 0; i < n; i++) {
171     a[i] = 0;
172   }
173   return tmain<int, 10>(argc);
174 }
175 
176 
177 
178 
179 
180 
181 
182 
183 
184 
185 
186 
187 
188 
189 
190 
191 
192 
193 
194 
195 
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197 
198 
199 
200 
201 
202 
203 
204 
205 
206 
207 
208 
209 #endif // CK2
210 #endif // #ifndef HEADER
211 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
212 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
213 // CHECK1-NEXT:  entry:
214 // CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
215 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
216 // CHECK1-NEXT:    ret i32 [[CALL]]
217 //
218 //
219 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
220 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
221 // CHECK1-NEXT:  entry:
222 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
223 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
224 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
225 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
226 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
227 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
228 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
229 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
230 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
231 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
232 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
233 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
234 // CHECK1-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
235 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
236 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
237 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
238 // CHECK1-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
239 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
240 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
241 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
242 // CHECK1-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
243 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
244 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
245 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
246 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
247 // CHECK1-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
248 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
249 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
250 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
251 // CHECK1-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
252 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
253 // CHECK1-NEXT:    store i8* null, i8** [[TMP4]], align 8
254 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
255 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
256 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
257 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
258 // CHECK1-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
259 // CHECK1-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
260 // CHECK1:       omp_offload.failed:
261 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
262 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
263 // CHECK1:       omp_offload.cont:
264 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
265 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
266 // CHECK1-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
267 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
268 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
269 // CHECK1-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
270 // CHECK1-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
271 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
272 // CHECK1-NEXT:    store i8* null, i8** [[TMP13]], align 8
273 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
274 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
275 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
276 // CHECK1-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
277 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
278 // CHECK1-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
279 // CHECK1:       omp_offload.failed7:
280 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
281 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
282 // CHECK1:       omp_offload.cont8:
283 // CHECK1-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
284 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
285 // CHECK1-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
286 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
287 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
288 // CHECK1-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
289 // CHECK1-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
290 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
291 // CHECK1-NEXT:    store i8* null, i8** [[TMP22]], align 8
292 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
293 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
294 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
295 // CHECK1-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
296 // CHECK1-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
297 // CHECK1-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
298 // CHECK1:       omp_offload.failed14:
299 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
300 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
301 // CHECK1:       omp_offload.cont15:
302 // CHECK1-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
303 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
304 // CHECK1-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
305 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
306 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
307 // CHECK1-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
308 // CHECK1-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
309 // CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
310 // CHECK1-NEXT:    store i8* null, i8** [[TMP31]], align 8
311 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
312 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
313 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
314 // CHECK1-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
315 // CHECK1-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
316 // CHECK1-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
317 // CHECK1:       omp_offload.failed21:
318 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
319 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
320 // CHECK1:       omp_offload.cont22:
321 // CHECK1-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
322 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
323 // CHECK1-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
324 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
325 // CHECK1-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
326 // CHECK1-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
327 // CHECK1-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
328 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
329 // CHECK1-NEXT:    store i8* null, i8** [[TMP40]], align 8
330 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
331 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
332 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
333 // CHECK1-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
334 // CHECK1-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
335 // CHECK1-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
336 // CHECK1:       omp_offload.failed28:
337 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
338 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
339 // CHECK1:       omp_offload.cont29:
340 // CHECK1-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
341 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
342 // CHECK1-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
343 // CHECK1-NEXT:    ret i32 [[TMP45]]
344 //
345 //
346 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
347 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
348 // CHECK1-NEXT:  entry:
349 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
350 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
351 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
352 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
353 // CHECK1-NEXT:    ret void
354 //
355 //
356 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
357 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
358 // CHECK1-NEXT:  entry:
359 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
360 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
361 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
362 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
363 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
364 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
365 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
366 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
367 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
368 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
369 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
370 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
371 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
372 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
373 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
374 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
375 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
376 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
377 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
378 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
379 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
380 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
381 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
382 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
383 // CHECK1:       cond.true:
384 // CHECK1-NEXT:    br label [[COND_END:%.*]]
385 // CHECK1:       cond.false:
386 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
387 // CHECK1-NEXT:    br label [[COND_END]]
388 // CHECK1:       cond.end:
389 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
390 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
391 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
392 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
393 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
394 // CHECK1:       omp.inner.for.cond:
395 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
396 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
397 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
398 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
399 // CHECK1:       omp.inner.for.body:
400 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
401 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
402 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
403 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
404 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
405 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
406 // CHECK1:       omp.inner.for.inc:
407 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
408 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
409 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
410 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
411 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
412 // CHECK1:       omp.inner.for.end:
413 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
414 // CHECK1:       omp.loop.exit:
415 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
416 // CHECK1-NEXT:    ret void
417 //
418 //
419 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
420 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
421 // CHECK1-NEXT:  entry:
422 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
423 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
424 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
425 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
426 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
427 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
428 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
429 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
430 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
431 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
432 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
433 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
434 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
435 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
436 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
437 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
438 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
439 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
440 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
441 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
442 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
443 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
444 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
445 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
446 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
447 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
448 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
449 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
450 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
451 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
452 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
453 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
454 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
455 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
456 // CHECK1:       cond.true:
457 // CHECK1-NEXT:    br label [[COND_END:%.*]]
458 // CHECK1:       cond.false:
459 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
460 // CHECK1-NEXT:    br label [[COND_END]]
461 // CHECK1:       cond.end:
462 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
463 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
464 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
465 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
466 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
467 // CHECK1:       omp.inner.for.cond:
468 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
469 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
470 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
471 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
472 // CHECK1:       omp.inner.for.body:
473 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
474 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
475 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
476 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
477 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
478 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
479 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
480 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
481 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
482 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
483 // CHECK1:       omp.body.continue:
484 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
485 // CHECK1:       omp.inner.for.inc:
486 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
487 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
488 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
489 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
490 // CHECK1:       omp.inner.for.end:
491 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
492 // CHECK1:       omp.loop.exit:
493 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
494 // CHECK1-NEXT:    ret void
495 //
496 //
497 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
498 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
499 // CHECK1-NEXT:  entry:
500 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
501 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
502 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
503 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
504 // CHECK1-NEXT:    ret void
505 //
506 //
507 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
508 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
509 // CHECK1-NEXT:  entry:
510 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
511 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
512 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
513 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
514 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
515 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
516 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
517 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
518 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
519 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
520 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
521 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
522 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
523 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
524 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
525 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
526 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
527 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
528 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
529 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
530 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
531 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
532 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
533 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
534 // CHECK1:       cond.true:
535 // CHECK1-NEXT:    br label [[COND_END:%.*]]
536 // CHECK1:       cond.false:
537 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
538 // CHECK1-NEXT:    br label [[COND_END]]
539 // CHECK1:       cond.end:
540 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
541 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
542 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
543 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
544 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
545 // CHECK1:       omp.inner.for.cond:
546 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
547 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
548 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
549 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
550 // CHECK1:       omp.inner.for.body:
551 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
552 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
553 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
554 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
555 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
556 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
557 // CHECK1:       omp.inner.for.inc:
558 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
559 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
560 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
561 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
562 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
563 // CHECK1:       omp.inner.for.end:
564 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
565 // CHECK1:       omp.loop.exit:
566 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
567 // CHECK1-NEXT:    ret void
568 //
569 //
570 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
571 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
572 // CHECK1-NEXT:  entry:
573 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
574 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
575 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
576 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
577 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
578 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
579 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
580 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
581 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
582 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
583 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
584 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
585 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
586 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
587 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
588 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
589 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
590 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
591 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
592 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
593 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
594 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
595 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
596 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
597 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
598 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
599 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
600 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
601 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
602 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
603 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
604 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
605 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
606 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
607 // CHECK1:       cond.true:
608 // CHECK1-NEXT:    br label [[COND_END:%.*]]
609 // CHECK1:       cond.false:
610 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
611 // CHECK1-NEXT:    br label [[COND_END]]
612 // CHECK1:       cond.end:
613 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
614 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
615 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
616 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
617 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
618 // CHECK1:       omp.inner.for.cond:
619 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
620 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
621 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
622 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
623 // CHECK1:       omp.inner.for.body:
624 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
625 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
626 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
627 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
628 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
629 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
630 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
631 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
632 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
633 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
634 // CHECK1:       omp.body.continue:
635 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
636 // CHECK1:       omp.inner.for.inc:
637 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
638 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
639 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
640 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
641 // CHECK1:       omp.inner.for.end:
642 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
643 // CHECK1:       omp.loop.exit:
644 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
645 // CHECK1-NEXT:    ret void
646 //
647 //
648 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
649 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
650 // CHECK1-NEXT:  entry:
651 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
652 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
653 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
654 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
655 // CHECK1-NEXT:    ret void
656 //
657 //
658 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
659 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
660 // CHECK1-NEXT:  entry:
661 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
662 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
663 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
664 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
665 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
666 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
667 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
668 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
669 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
670 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
671 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
672 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
673 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
674 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
675 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
676 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
677 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
678 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
679 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
680 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
681 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
682 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
683 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
684 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
685 // CHECK1:       cond.true:
686 // CHECK1-NEXT:    br label [[COND_END:%.*]]
687 // CHECK1:       cond.false:
688 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
689 // CHECK1-NEXT:    br label [[COND_END]]
690 // CHECK1:       cond.end:
691 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
692 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
693 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
694 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
695 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
696 // CHECK1:       omp.inner.for.cond:
697 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
698 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
699 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
700 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
701 // CHECK1:       omp.inner.for.body:
702 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
703 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
704 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
705 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
706 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
707 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
708 // CHECK1:       omp.inner.for.inc:
709 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
710 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
711 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
712 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
713 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
714 // CHECK1:       omp.inner.for.end:
715 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
716 // CHECK1:       omp.loop.exit:
717 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
718 // CHECK1-NEXT:    ret void
719 //
720 //
721 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
722 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
723 // CHECK1-NEXT:  entry:
724 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
725 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
726 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
727 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
728 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
729 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
730 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
731 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
732 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
733 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
734 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
735 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
736 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
737 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
738 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
739 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
740 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
741 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
742 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
743 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
744 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
745 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
746 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
747 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
748 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
749 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
750 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
751 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
752 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
753 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
754 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
755 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
756 // CHECK1:       omp.dispatch.cond:
757 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
758 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
759 // CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
760 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
761 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
762 // CHECK1:       cond.true:
763 // CHECK1-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
764 // CHECK1-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
765 // CHECK1-NEXT:    br label [[COND_END:%.*]]
766 // CHECK1:       cond.false:
767 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
768 // CHECK1-NEXT:    br label [[COND_END]]
769 // CHECK1:       cond.end:
770 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
771 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
772 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
773 // CHECK1-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
774 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
775 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
776 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
777 // CHECK1-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
778 // CHECK1:       omp.dispatch.body:
779 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
780 // CHECK1:       omp.inner.for.cond:
781 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
782 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
783 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
784 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
785 // CHECK1:       omp.inner.for.body:
786 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
787 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
788 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
789 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
790 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
791 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
792 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
793 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
794 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
795 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
796 // CHECK1:       omp.body.continue:
797 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
798 // CHECK1:       omp.inner.for.inc:
799 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
800 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
801 // CHECK1-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
802 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
803 // CHECK1:       omp.inner.for.end:
804 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
805 // CHECK1:       omp.dispatch.inc:
806 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
807 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
808 // CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
809 // CHECK1-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
810 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
811 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
812 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
813 // CHECK1-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
814 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
815 // CHECK1:       omp.dispatch.end:
816 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
817 // CHECK1-NEXT:    ret void
818 //
819 //
820 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
821 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
822 // CHECK1-NEXT:  entry:
823 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
824 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
825 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
826 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
827 // CHECK1-NEXT:    ret void
828 //
829 //
830 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
831 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
832 // CHECK1-NEXT:  entry:
833 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
834 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
835 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
836 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
837 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
838 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
839 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
840 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
841 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
842 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
843 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
844 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
845 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
846 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
847 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
848 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
849 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
850 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
851 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
852 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
853 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
854 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
855 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
856 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
857 // CHECK1:       cond.true:
858 // CHECK1-NEXT:    br label [[COND_END:%.*]]
859 // CHECK1:       cond.false:
860 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
861 // CHECK1-NEXT:    br label [[COND_END]]
862 // CHECK1:       cond.end:
863 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
864 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
865 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
866 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
867 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
868 // CHECK1:       omp.inner.for.cond:
869 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
870 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
871 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
872 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
873 // CHECK1:       omp.inner.for.body:
874 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
875 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
876 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
877 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
878 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
879 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
880 // CHECK1:       omp.inner.for.inc:
881 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
882 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
883 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
884 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
885 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
886 // CHECK1:       omp.inner.for.end:
887 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
888 // CHECK1:       omp.loop.exit:
889 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
890 // CHECK1-NEXT:    ret void
891 //
892 //
893 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
894 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
895 // CHECK1-NEXT:  entry:
896 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
897 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
898 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
899 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
900 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
901 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
902 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
903 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
904 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
905 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
906 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
907 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
908 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
909 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
910 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
911 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
912 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
913 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
914 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
915 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
916 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
917 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
918 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
919 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
920 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
921 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
922 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
923 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
924 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
925 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
926 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
927 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
928 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
929 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
930 // CHECK1:       omp.dispatch.cond:
931 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
932 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
933 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
934 // CHECK1:       omp.dispatch.body:
935 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
936 // CHECK1-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
937 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
938 // CHECK1:       omp.inner.for.cond:
939 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
940 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
941 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
942 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
943 // CHECK1:       omp.inner.for.body:
944 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
945 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
946 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
947 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
948 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
949 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
950 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
951 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
952 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
953 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
954 // CHECK1:       omp.body.continue:
955 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
956 // CHECK1:       omp.inner.for.inc:
957 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
958 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
959 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
960 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
961 // CHECK1:       omp.inner.for.end:
962 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
963 // CHECK1:       omp.dispatch.inc:
964 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
965 // CHECK1:       omp.dispatch.end:
966 // CHECK1-NEXT:    ret void
967 //
968 //
969 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
970 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
971 // CHECK1-NEXT:  entry:
972 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
973 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
974 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
975 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
976 // CHECK1-NEXT:    ret void
977 //
978 //
979 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
980 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
981 // CHECK1-NEXT:  entry:
982 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
983 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
984 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
985 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
986 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
987 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
988 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
989 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
990 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
991 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
992 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
993 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
994 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
995 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
996 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
997 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
998 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
999 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1000 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1001 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1002 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1003 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1004 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1005 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1006 // CHECK1:       cond.true:
1007 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1008 // CHECK1:       cond.false:
1009 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1010 // CHECK1-NEXT:    br label [[COND_END]]
1011 // CHECK1:       cond.end:
1012 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1013 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1014 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1015 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1016 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1017 // CHECK1:       omp.inner.for.cond:
1018 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1019 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1020 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1021 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1022 // CHECK1:       omp.inner.for.body:
1023 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1024 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1025 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1026 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1027 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1028 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1029 // CHECK1:       omp.inner.for.inc:
1030 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1031 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1032 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1033 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1034 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1035 // CHECK1:       omp.inner.for.end:
1036 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1037 // CHECK1:       omp.loop.exit:
1038 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1039 // CHECK1-NEXT:    ret void
1040 //
1041 //
1042 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1043 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1044 // CHECK1-NEXT:  entry:
1045 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1046 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1047 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1048 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1049 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1050 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1051 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1052 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1053 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1054 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1055 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1056 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1057 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1058 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1059 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1060 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1061 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1062 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1063 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1064 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1065 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1066 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1067 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1068 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1069 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1070 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1071 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1072 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1073 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1074 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1075 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1076 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1077 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1078 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1079 // CHECK1:       omp.dispatch.cond:
1080 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1081 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1082 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1083 // CHECK1:       omp.dispatch.body:
1084 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1085 // CHECK1-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1086 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1087 // CHECK1:       omp.inner.for.cond:
1088 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1089 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1090 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1091 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1092 // CHECK1:       omp.inner.for.body:
1093 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1094 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1095 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1096 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1097 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1098 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
1099 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1100 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1101 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
1102 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1103 // CHECK1:       omp.body.continue:
1104 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1105 // CHECK1:       omp.inner.for.inc:
1106 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1107 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1108 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1109 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1110 // CHECK1:       omp.inner.for.end:
1111 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1112 // CHECK1:       omp.dispatch.inc:
1113 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
1114 // CHECK1:       omp.dispatch.end:
1115 // CHECK1-NEXT:    ret void
1116 //
1117 //
1118 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1119 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
1120 // CHECK1-NEXT:  entry:
1121 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
1122 // CHECK1-NEXT:    ret void
1123 //
1124 //
1125 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1126 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
1127 // CHECK2-NEXT:  entry:
1128 // CHECK2-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1129 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1130 // CHECK2-NEXT:    ret i32 [[CALL]]
1131 //
1132 //
1133 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1134 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1135 // CHECK2-NEXT:  entry:
1136 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1137 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1138 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1139 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1140 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1141 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
1142 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
1143 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
1144 // CHECK2-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
1145 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
1146 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
1147 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
1148 // CHECK2-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
1149 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
1150 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
1151 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
1152 // CHECK2-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
1153 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
1154 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
1155 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
1156 // CHECK2-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
1157 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1158 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1159 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1160 // CHECK2-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1161 // CHECK2-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1162 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
1163 // CHECK2-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1164 // CHECK2-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1165 // CHECK2-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
1166 // CHECK2-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1167 // CHECK2-NEXT:    store i8* null, i8** [[TMP4]], align 8
1168 // CHECK2-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1169 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1170 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
1171 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1172 // CHECK2-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1173 // CHECK2-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1174 // CHECK2:       omp_offload.failed:
1175 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
1176 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1177 // CHECK2:       omp_offload.cont:
1178 // CHECK2-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1179 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1180 // CHECK2-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
1181 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
1182 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1183 // CHECK2-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
1184 // CHECK2-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
1185 // CHECK2-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
1186 // CHECK2-NEXT:    store i8* null, i8** [[TMP13]], align 8
1187 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1188 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1189 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1190 // CHECK2-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1191 // CHECK2-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1192 // CHECK2-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1193 // CHECK2:       omp_offload.failed7:
1194 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
1195 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
1196 // CHECK2:       omp_offload.cont8:
1197 // CHECK2-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1198 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1199 // CHECK2-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1200 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
1201 // CHECK2-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1202 // CHECK2-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1203 // CHECK2-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
1204 // CHECK2-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
1205 // CHECK2-NEXT:    store i8* null, i8** [[TMP22]], align 8
1206 // CHECK2-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1207 // CHECK2-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1208 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1209 // CHECK2-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1210 // CHECK2-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1211 // CHECK2-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
1212 // CHECK2:       omp_offload.failed14:
1213 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
1214 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
1215 // CHECK2:       omp_offload.cont15:
1216 // CHECK2-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1217 // CHECK2-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
1218 // CHECK2-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
1219 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
1220 // CHECK2-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
1221 // CHECK2-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
1222 // CHECK2-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
1223 // CHECK2-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
1224 // CHECK2-NEXT:    store i8* null, i8** [[TMP31]], align 8
1225 // CHECK2-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
1226 // CHECK2-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
1227 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1228 // CHECK2-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1229 // CHECK2-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1230 // CHECK2-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
1231 // CHECK2:       omp_offload.failed21:
1232 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
1233 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
1234 // CHECK2:       omp_offload.cont22:
1235 // CHECK2-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1236 // CHECK2-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
1237 // CHECK2-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
1238 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
1239 // CHECK2-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
1240 // CHECK2-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
1241 // CHECK2-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
1242 // CHECK2-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
1243 // CHECK2-NEXT:    store i8* null, i8** [[TMP40]], align 8
1244 // CHECK2-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
1245 // CHECK2-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
1246 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1247 // CHECK2-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1248 // CHECK2-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
1249 // CHECK2-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
1250 // CHECK2:       omp_offload.failed28:
1251 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
1252 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
1253 // CHECK2:       omp_offload.cont29:
1254 // CHECK2-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1255 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
1256 // CHECK2-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1257 // CHECK2-NEXT:    ret i32 [[TMP45]]
1258 //
1259 //
1260 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
1261 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1262 // CHECK2-NEXT:  entry:
1263 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1264 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1265 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1266 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1267 // CHECK2-NEXT:    ret void
1268 //
1269 //
1270 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1271 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1272 // CHECK2-NEXT:  entry:
1273 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1274 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1275 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1276 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1277 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1278 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1279 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1280 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1281 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1282 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1283 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1284 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1285 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1286 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1287 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1288 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1289 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1290 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1291 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1292 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1293 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1294 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1295 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1296 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1297 // CHECK2:       cond.true:
1298 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1299 // CHECK2:       cond.false:
1300 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1301 // CHECK2-NEXT:    br label [[COND_END]]
1302 // CHECK2:       cond.end:
1303 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1304 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1305 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1306 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1307 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1308 // CHECK2:       omp.inner.for.cond:
1309 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1310 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1311 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1312 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1313 // CHECK2:       omp.inner.for.body:
1314 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1315 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1316 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1317 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1318 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1319 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1320 // CHECK2:       omp.inner.for.inc:
1321 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1322 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1323 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1324 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1325 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1326 // CHECK2:       omp.inner.for.end:
1327 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1328 // CHECK2:       omp.loop.exit:
1329 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1330 // CHECK2-NEXT:    ret void
1331 //
1332 //
1333 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1334 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1335 // CHECK2-NEXT:  entry:
1336 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1337 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1338 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1339 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1340 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1341 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1342 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1343 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1344 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1345 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1346 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1347 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1348 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1349 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1350 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1351 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1352 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1353 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1354 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1355 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1356 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1357 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1358 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1359 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1360 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1361 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1362 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1363 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1364 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1365 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1366 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1367 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1368 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1369 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1370 // CHECK2:       cond.true:
1371 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1372 // CHECK2:       cond.false:
1373 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1374 // CHECK2-NEXT:    br label [[COND_END]]
1375 // CHECK2:       cond.end:
1376 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1377 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1378 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1379 // CHECK2-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1380 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1381 // CHECK2:       omp.inner.for.cond:
1382 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1383 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1384 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1385 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1386 // CHECK2:       omp.inner.for.body:
1387 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1388 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1389 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1390 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1391 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1392 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1393 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1394 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1395 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1396 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1397 // CHECK2:       omp.body.continue:
1398 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1399 // CHECK2:       omp.inner.for.inc:
1400 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1401 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1402 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1403 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1404 // CHECK2:       omp.inner.for.end:
1405 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1406 // CHECK2:       omp.loop.exit:
1407 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1408 // CHECK2-NEXT:    ret void
1409 //
1410 //
1411 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
1412 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1413 // CHECK2-NEXT:  entry:
1414 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1415 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1416 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1417 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1418 // CHECK2-NEXT:    ret void
1419 //
1420 //
1421 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1422 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1423 // CHECK2-NEXT:  entry:
1424 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1425 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1426 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1427 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1428 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1429 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1430 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1431 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1432 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1433 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1434 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1435 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1436 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1437 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1438 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1439 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1440 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1441 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1442 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1443 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1444 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1445 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1446 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1447 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1448 // CHECK2:       cond.true:
1449 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1450 // CHECK2:       cond.false:
1451 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1452 // CHECK2-NEXT:    br label [[COND_END]]
1453 // CHECK2:       cond.end:
1454 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1455 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1456 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1457 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1458 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1459 // CHECK2:       omp.inner.for.cond:
1460 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1461 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1462 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1463 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1464 // CHECK2:       omp.inner.for.body:
1465 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1466 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1467 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1468 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1469 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1470 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1471 // CHECK2:       omp.inner.for.inc:
1472 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1473 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1474 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1475 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1476 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1477 // CHECK2:       omp.inner.for.end:
1478 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1479 // CHECK2:       omp.loop.exit:
1480 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1481 // CHECK2-NEXT:    ret void
1482 //
1483 //
1484 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1485 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1486 // CHECK2-NEXT:  entry:
1487 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1488 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1489 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1490 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1491 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1492 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1493 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1494 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1495 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1496 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1497 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1498 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1499 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1500 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1501 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1502 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1503 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1504 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1505 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1506 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1507 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1508 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1509 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1510 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1511 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1512 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1513 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1514 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1515 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1516 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1517 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1518 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1519 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1520 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1521 // CHECK2:       cond.true:
1522 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1523 // CHECK2:       cond.false:
1524 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1525 // CHECK2-NEXT:    br label [[COND_END]]
1526 // CHECK2:       cond.end:
1527 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1528 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1529 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1530 // CHECK2-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1531 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1532 // CHECK2:       omp.inner.for.cond:
1533 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1534 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1535 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1536 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1537 // CHECK2:       omp.inner.for.body:
1538 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1539 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1540 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1541 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1542 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1543 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1544 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1545 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1546 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1547 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1548 // CHECK2:       omp.body.continue:
1549 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1550 // CHECK2:       omp.inner.for.inc:
1551 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1552 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1553 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1554 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1555 // CHECK2:       omp.inner.for.end:
1556 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1557 // CHECK2:       omp.loop.exit:
1558 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1559 // CHECK2-NEXT:    ret void
1560 //
1561 //
1562 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
1563 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1564 // CHECK2-NEXT:  entry:
1565 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1566 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1567 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1568 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1569 // CHECK2-NEXT:    ret void
1570 //
1571 //
1572 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
1573 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1574 // CHECK2-NEXT:  entry:
1575 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1576 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1577 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1578 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1579 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1580 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1581 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1582 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1583 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1584 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1585 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1586 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1587 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1588 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1589 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1590 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1591 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1592 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1593 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1594 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1595 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1596 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1597 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1598 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1599 // CHECK2:       cond.true:
1600 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1601 // CHECK2:       cond.false:
1602 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1603 // CHECK2-NEXT:    br label [[COND_END]]
1604 // CHECK2:       cond.end:
1605 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1606 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1607 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1608 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1609 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1610 // CHECK2:       omp.inner.for.cond:
1611 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1612 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1613 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1614 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1615 // CHECK2:       omp.inner.for.body:
1616 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1617 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1618 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1619 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1620 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1621 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1622 // CHECK2:       omp.inner.for.inc:
1623 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1624 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1625 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1626 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1627 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1628 // CHECK2:       omp.inner.for.end:
1629 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1630 // CHECK2:       omp.loop.exit:
1631 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1632 // CHECK2-NEXT:    ret void
1633 //
1634 //
1635 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
1636 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1637 // CHECK2-NEXT:  entry:
1638 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1639 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1640 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1641 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1642 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1643 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1644 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1645 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1646 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1647 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1648 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1649 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1650 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1651 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1652 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1653 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1654 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1655 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1656 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1657 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1658 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1659 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1660 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1661 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1662 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1663 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1664 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1665 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1666 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1667 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1668 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1669 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1670 // CHECK2:       omp.dispatch.cond:
1671 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1672 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1673 // CHECK2-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
1674 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
1675 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1676 // CHECK2:       cond.true:
1677 // CHECK2-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1678 // CHECK2-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
1679 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1680 // CHECK2:       cond.false:
1681 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1682 // CHECK2-NEXT:    br label [[COND_END]]
1683 // CHECK2:       cond.end:
1684 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1685 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1686 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1687 // CHECK2-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1688 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1689 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1690 // CHECK2-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1691 // CHECK2-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1692 // CHECK2:       omp.dispatch.body:
1693 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1694 // CHECK2:       omp.inner.for.cond:
1695 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1696 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1697 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1698 // CHECK2-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1699 // CHECK2:       omp.inner.for.body:
1700 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1701 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1702 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1703 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1704 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1705 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1706 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1707 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1708 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1709 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1710 // CHECK2:       omp.body.continue:
1711 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1712 // CHECK2:       omp.inner.for.inc:
1713 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1714 // CHECK2-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
1715 // CHECK2-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
1716 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1717 // CHECK2:       omp.inner.for.end:
1718 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1719 // CHECK2:       omp.dispatch.inc:
1720 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1721 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1722 // CHECK2-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1723 // CHECK2-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
1724 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1725 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1726 // CHECK2-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1727 // CHECK2-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
1728 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
1729 // CHECK2:       omp.dispatch.end:
1730 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1731 // CHECK2-NEXT:    ret void
1732 //
1733 //
1734 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
1735 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1736 // CHECK2-NEXT:  entry:
1737 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1738 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1739 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1740 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1741 // CHECK2-NEXT:    ret void
1742 //
1743 //
1744 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
1745 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1746 // CHECK2-NEXT:  entry:
1747 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1748 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1749 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1750 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1751 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1752 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1753 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1754 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1755 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1756 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1757 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1758 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1759 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1760 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1761 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1762 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1763 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1764 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1765 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1766 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1767 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1768 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1769 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1770 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1771 // CHECK2:       cond.true:
1772 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1773 // CHECK2:       cond.false:
1774 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1775 // CHECK2-NEXT:    br label [[COND_END]]
1776 // CHECK2:       cond.end:
1777 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1778 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1779 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1780 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1781 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1782 // CHECK2:       omp.inner.for.cond:
1783 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1784 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1785 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1786 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1787 // CHECK2:       omp.inner.for.body:
1788 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1789 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1790 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1791 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1792 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1793 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1794 // CHECK2:       omp.inner.for.inc:
1795 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1796 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1797 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1798 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1799 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1800 // CHECK2:       omp.inner.for.end:
1801 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1802 // CHECK2:       omp.loop.exit:
1803 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1804 // CHECK2-NEXT:    ret void
1805 //
1806 //
1807 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
1808 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1809 // CHECK2-NEXT:  entry:
1810 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1811 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1812 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1813 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1814 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1815 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1816 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1817 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1818 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1819 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1820 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1821 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1822 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1823 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1824 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1825 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1826 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1827 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1828 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1829 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1830 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1831 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1832 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1833 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1834 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1835 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1836 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1837 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1838 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1839 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1840 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1841 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1842 // CHECK2-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1843 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1844 // CHECK2:       omp.dispatch.cond:
1845 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1846 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1847 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1848 // CHECK2:       omp.dispatch.body:
1849 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1850 // CHECK2-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1851 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1852 // CHECK2:       omp.inner.for.cond:
1853 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1854 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
1855 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1856 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1857 // CHECK2:       omp.inner.for.body:
1858 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1859 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1860 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1861 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
1862 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1863 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
1864 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1865 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1866 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
1867 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1868 // CHECK2:       omp.body.continue:
1869 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1870 // CHECK2:       omp.inner.for.inc:
1871 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1872 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1873 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1874 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1875 // CHECK2:       omp.inner.for.end:
1876 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1877 // CHECK2:       omp.dispatch.inc:
1878 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
1879 // CHECK2:       omp.dispatch.end:
1880 // CHECK2-NEXT:    ret void
1881 //
1882 //
1883 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
1884 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1885 // CHECK2-NEXT:  entry:
1886 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1887 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1888 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1889 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1890 // CHECK2-NEXT:    ret void
1891 //
1892 //
1893 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14
1894 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1895 // CHECK2-NEXT:  entry:
1896 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1897 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1898 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1899 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1900 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1901 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1902 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1903 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1904 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1905 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1906 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1907 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1908 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1909 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1910 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1911 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1912 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1913 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1914 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1915 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1916 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1917 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1918 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1919 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1920 // CHECK2:       cond.true:
1921 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1922 // CHECK2:       cond.false:
1923 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1924 // CHECK2-NEXT:    br label [[COND_END]]
1925 // CHECK2:       cond.end:
1926 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1927 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1928 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1929 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1930 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1931 // CHECK2:       omp.inner.for.cond:
1932 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1933 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1934 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1935 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1936 // CHECK2:       omp.inner.for.body:
1937 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1938 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1939 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1940 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1941 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1942 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1943 // CHECK2:       omp.inner.for.inc:
1944 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1945 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1946 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1947 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1948 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1949 // CHECK2:       omp.inner.for.end:
1950 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1951 // CHECK2:       omp.loop.exit:
1952 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1953 // CHECK2-NEXT:    ret void
1954 //
1955 //
1956 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15
1957 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1958 // CHECK2-NEXT:  entry:
1959 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1960 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1961 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1962 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1963 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1964 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1965 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1966 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1967 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1968 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1969 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1970 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1971 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1972 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1973 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1974 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1975 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1976 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1977 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1978 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1979 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1980 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1981 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1982 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1983 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1984 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1985 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1986 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1987 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1988 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1989 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1990 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1991 // CHECK2-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1992 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1993 // CHECK2:       omp.dispatch.cond:
1994 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1995 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1996 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1997 // CHECK2:       omp.dispatch.body:
1998 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1999 // CHECK2-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2000 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2001 // CHECK2:       omp.inner.for.cond:
2002 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2003 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
2004 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2005 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2006 // CHECK2:       omp.inner.for.body:
2007 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2008 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2009 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2010 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
2011 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2012 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
2013 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
2014 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2015 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
2016 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2017 // CHECK2:       omp.body.continue:
2018 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2019 // CHECK2:       omp.inner.for.inc:
2020 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2021 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
2022 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2023 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
2024 // CHECK2:       omp.inner.for.end:
2025 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2026 // CHECK2:       omp.dispatch.inc:
2027 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
2028 // CHECK2:       omp.dispatch.end:
2029 // CHECK2-NEXT:    ret void
2030 //
2031 //
2032 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2033 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
2034 // CHECK2-NEXT:  entry:
2035 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
2036 // CHECK2-NEXT:    ret void
2037 //
2038 //
2039 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2040 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
2041 // CHECK3-NEXT:  entry:
2042 // CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2043 // CHECK3-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
2044 // CHECK3-NEXT:    ret i32 [[CALL]]
2045 //
2046 //
2047 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2048 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2049 // CHECK3-NEXT:  entry:
2050 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2051 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2052 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2053 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2054 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2055 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
2056 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
2057 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
2058 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2059 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
2060 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
2061 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
2062 // CHECK3-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
2063 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
2064 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
2065 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
2066 // CHECK3-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
2067 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
2068 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
2069 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
2070 // CHECK3-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
2071 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2072 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2073 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2074 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2075 // CHECK3-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2076 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
2077 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2078 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2079 // CHECK3-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
2080 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2081 // CHECK3-NEXT:    store i8* null, i8** [[TMP4]], align 4
2082 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2083 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2084 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
2085 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2086 // CHECK3-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2087 // CHECK3-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2088 // CHECK3:       omp_offload.failed:
2089 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2090 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2091 // CHECK3:       omp_offload.cont:
2092 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2093 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2094 // CHECK3-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
2095 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
2096 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2097 // CHECK3-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
2098 // CHECK3-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
2099 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
2100 // CHECK3-NEXT:    store i8* null, i8** [[TMP13]], align 4
2101 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2102 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2103 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2104 // CHECK3-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2105 // CHECK3-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2106 // CHECK3-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2107 // CHECK3:       omp_offload.failed7:
2108 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
2109 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2110 // CHECK3:       omp_offload.cont8:
2111 // CHECK3-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2112 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2113 // CHECK3-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
2114 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
2115 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2116 // CHECK3-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
2117 // CHECK3-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
2118 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
2119 // CHECK3-NEXT:    store i8* null, i8** [[TMP22]], align 4
2120 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2121 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2122 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2123 // CHECK3-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2124 // CHECK3-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2125 // CHECK3-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
2126 // CHECK3:       omp_offload.failed14:
2127 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
2128 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
2129 // CHECK3:       omp_offload.cont15:
2130 // CHECK3-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2131 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
2132 // CHECK3-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
2133 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
2134 // CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
2135 // CHECK3-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
2136 // CHECK3-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
2137 // CHECK3-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
2138 // CHECK3-NEXT:    store i8* null, i8** [[TMP31]], align 4
2139 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
2140 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
2141 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2142 // CHECK3-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2143 // CHECK3-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
2144 // CHECK3-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
2145 // CHECK3:       omp_offload.failed21:
2146 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
2147 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
2148 // CHECK3:       omp_offload.cont22:
2149 // CHECK3-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2150 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
2151 // CHECK3-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
2152 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
2153 // CHECK3-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
2154 // CHECK3-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
2155 // CHECK3-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
2156 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
2157 // CHECK3-NEXT:    store i8* null, i8** [[TMP40]], align 4
2158 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
2159 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
2160 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2161 // CHECK3-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2162 // CHECK3-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
2163 // CHECK3-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
2164 // CHECK3:       omp_offload.failed28:
2165 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
2166 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
2167 // CHECK3:       omp_offload.cont29:
2168 // CHECK3-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2169 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
2170 // CHECK3-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2171 // CHECK3-NEXT:    ret i32 [[TMP45]]
2172 //
2173 //
2174 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
2175 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
2176 // CHECK3-NEXT:  entry:
2177 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2178 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2179 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2180 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2181 // CHECK3-NEXT:    ret void
2182 //
2183 //
2184 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
2185 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2186 // CHECK3-NEXT:  entry:
2187 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2188 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2189 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2190 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2191 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2192 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2193 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2194 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2195 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2196 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2197 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2198 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2199 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2200 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2201 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2202 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2203 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2204 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2205 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2206 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2207 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2208 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2209 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2210 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2211 // CHECK3:       cond.true:
2212 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2213 // CHECK3:       cond.false:
2214 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2215 // CHECK3-NEXT:    br label [[COND_END]]
2216 // CHECK3:       cond.end:
2217 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2218 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2219 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2220 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2221 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2222 // CHECK3:       omp.inner.for.cond:
2223 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2224 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2225 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2226 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2227 // CHECK3:       omp.inner.for.body:
2228 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2229 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2230 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2231 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2232 // CHECK3:       omp.inner.for.inc:
2233 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2234 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2235 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2236 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2237 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2238 // CHECK3:       omp.inner.for.end:
2239 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2240 // CHECK3:       omp.loop.exit:
2241 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2242 // CHECK3-NEXT:    ret void
2243 //
2244 //
2245 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
2246 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2247 // CHECK3-NEXT:  entry:
2248 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2249 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2250 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2251 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2252 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2253 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2254 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2255 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2256 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2257 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2258 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2259 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2260 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2261 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2262 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2263 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2264 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2265 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2266 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2267 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2268 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2269 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2270 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2271 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2272 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2273 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2274 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2275 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2276 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2277 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2278 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2279 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2280 // CHECK3:       cond.true:
2281 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2282 // CHECK3:       cond.false:
2283 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2284 // CHECK3-NEXT:    br label [[COND_END]]
2285 // CHECK3:       cond.end:
2286 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2287 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2288 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2289 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2290 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2291 // CHECK3:       omp.inner.for.cond:
2292 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2293 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2294 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2295 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2296 // CHECK3:       omp.inner.for.body:
2297 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2298 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2299 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2300 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2301 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2302 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2303 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
2304 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2305 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2306 // CHECK3:       omp.body.continue:
2307 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2308 // CHECK3:       omp.inner.for.inc:
2309 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2310 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
2311 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2312 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2313 // CHECK3:       omp.inner.for.end:
2314 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2315 // CHECK3:       omp.loop.exit:
2316 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2317 // CHECK3-NEXT:    ret void
2318 //
2319 //
2320 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
2321 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2322 // CHECK3-NEXT:  entry:
2323 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2324 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2325 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2326 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2327 // CHECK3-NEXT:    ret void
2328 //
2329 //
2330 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
2331 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2332 // CHECK3-NEXT:  entry:
2333 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2334 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2335 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2336 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2337 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2338 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2339 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2340 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2341 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2342 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2343 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2344 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2345 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2346 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2347 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2348 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2349 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2350 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2351 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2352 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2353 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2354 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2355 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2356 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2357 // CHECK3:       cond.true:
2358 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2359 // CHECK3:       cond.false:
2360 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2361 // CHECK3-NEXT:    br label [[COND_END]]
2362 // CHECK3:       cond.end:
2363 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2364 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2365 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2366 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2367 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2368 // CHECK3:       omp.inner.for.cond:
2369 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2370 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2371 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2372 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2373 // CHECK3:       omp.inner.for.body:
2374 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2375 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2376 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2377 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2378 // CHECK3:       omp.inner.for.inc:
2379 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2380 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2381 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2382 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2383 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2384 // CHECK3:       omp.inner.for.end:
2385 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2386 // CHECK3:       omp.loop.exit:
2387 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2388 // CHECK3-NEXT:    ret void
2389 //
2390 //
2391 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
2392 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2393 // CHECK3-NEXT:  entry:
2394 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2395 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2396 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2397 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2398 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2399 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2400 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2401 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2402 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2403 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2404 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2405 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2406 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2407 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2408 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2409 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2410 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2411 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2412 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2413 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2414 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2415 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2416 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2417 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2418 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2419 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2420 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2421 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2422 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2423 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2424 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2425 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2426 // CHECK3:       cond.true:
2427 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2428 // CHECK3:       cond.false:
2429 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2430 // CHECK3-NEXT:    br label [[COND_END]]
2431 // CHECK3:       cond.end:
2432 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2433 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2434 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2435 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2436 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2437 // CHECK3:       omp.inner.for.cond:
2438 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2439 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2440 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2441 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2442 // CHECK3:       omp.inner.for.body:
2443 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2444 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2445 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2446 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2447 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2448 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2449 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
2450 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2451 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2452 // CHECK3:       omp.body.continue:
2453 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2454 // CHECK3:       omp.inner.for.inc:
2455 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2456 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
2457 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2458 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2459 // CHECK3:       omp.inner.for.end:
2460 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2461 // CHECK3:       omp.loop.exit:
2462 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2463 // CHECK3-NEXT:    ret void
2464 //
2465 //
2466 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
2467 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2468 // CHECK3-NEXT:  entry:
2469 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2470 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2471 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2472 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2473 // CHECK3-NEXT:    ret void
2474 //
2475 //
2476 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
2477 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2478 // CHECK3-NEXT:  entry:
2479 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2480 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2481 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2482 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2483 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2484 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2485 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2486 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2487 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2488 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2489 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2490 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2491 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2492 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2493 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2494 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2495 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2496 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2497 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2498 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2499 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2500 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2501 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2502 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2503 // CHECK3:       cond.true:
2504 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2505 // CHECK3:       cond.false:
2506 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2507 // CHECK3-NEXT:    br label [[COND_END]]
2508 // CHECK3:       cond.end:
2509 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2510 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2511 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2512 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2513 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2514 // CHECK3:       omp.inner.for.cond:
2515 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2516 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2517 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2518 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2519 // CHECK3:       omp.inner.for.body:
2520 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2521 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2522 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2523 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2524 // CHECK3:       omp.inner.for.inc:
2525 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2526 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2527 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2528 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2529 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2530 // CHECK3:       omp.inner.for.end:
2531 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2532 // CHECK3:       omp.loop.exit:
2533 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2534 // CHECK3-NEXT:    ret void
2535 //
2536 //
2537 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
2538 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2539 // CHECK3-NEXT:  entry:
2540 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2541 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2542 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2543 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2544 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2545 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2546 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2547 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2548 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2549 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2550 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2551 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2552 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2553 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2554 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2555 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2556 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2557 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2558 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2559 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2560 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2561 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2562 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2563 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2564 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2565 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2566 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2567 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2568 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
2569 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2570 // CHECK3:       omp.dispatch.cond:
2571 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2572 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2573 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
2574 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2575 // CHECK3:       cond.true:
2576 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2577 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2578 // CHECK3:       cond.false:
2579 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2580 // CHECK3-NEXT:    br label [[COND_END]]
2581 // CHECK3:       cond.end:
2582 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2583 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2584 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2585 // CHECK3-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2586 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2587 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2588 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2589 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2590 // CHECK3:       omp.dispatch.body:
2591 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2592 // CHECK3:       omp.inner.for.cond:
2593 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2594 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2595 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2596 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2597 // CHECK3:       omp.inner.for.body:
2598 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2599 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2600 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2601 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2602 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2603 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2604 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
2605 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2606 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2607 // CHECK3:       omp.body.continue:
2608 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2609 // CHECK3:       omp.inner.for.inc:
2610 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2611 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
2612 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2613 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2614 // CHECK3:       omp.inner.for.end:
2615 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2616 // CHECK3:       omp.dispatch.inc:
2617 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2618 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2619 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2620 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
2621 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2622 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2623 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2624 // CHECK3-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
2625 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2626 // CHECK3:       omp.dispatch.end:
2627 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2628 // CHECK3-NEXT:    ret void
2629 //
2630 //
2631 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
2632 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2633 // CHECK3-NEXT:  entry:
2634 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2635 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2636 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2637 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2638 // CHECK3-NEXT:    ret void
2639 //
2640 //
2641 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
2642 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2643 // CHECK3-NEXT:  entry:
2644 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2645 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2646 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2647 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2648 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2649 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2650 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2651 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2652 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2653 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2654 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2655 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2656 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2657 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2658 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2659 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2660 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2661 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2662 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2663 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2664 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2665 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2666 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2667 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2668 // CHECK3:       cond.true:
2669 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2670 // CHECK3:       cond.false:
2671 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2672 // CHECK3-NEXT:    br label [[COND_END]]
2673 // CHECK3:       cond.end:
2674 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2675 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2676 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2677 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2678 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2679 // CHECK3:       omp.inner.for.cond:
2680 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2681 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2682 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2683 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2684 // CHECK3:       omp.inner.for.body:
2685 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2686 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2687 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2688 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2689 // CHECK3:       omp.inner.for.inc:
2690 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2691 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2692 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2693 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2694 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2695 // CHECK3:       omp.inner.for.end:
2696 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2697 // CHECK3:       omp.loop.exit:
2698 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2699 // CHECK3-NEXT:    ret void
2700 //
2701 //
2702 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
2703 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2704 // CHECK3-NEXT:  entry:
2705 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2706 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2707 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2708 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2709 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2710 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2711 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2712 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2713 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2714 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2715 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2716 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2717 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2718 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2719 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2720 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2721 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2722 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2723 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2724 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2725 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2726 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2727 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2728 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2729 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2730 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2731 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2732 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2733 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2734 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2735 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
2736 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2737 // CHECK3:       omp.dispatch.cond:
2738 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2739 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2740 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2741 // CHECK3:       omp.dispatch.body:
2742 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2743 // CHECK3-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2744 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2745 // CHECK3:       omp.inner.for.cond:
2746 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2747 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
2748 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2749 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2750 // CHECK3:       omp.inner.for.body:
2751 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2752 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2753 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2754 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
2755 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2756 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
2757 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2758 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
2759 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2760 // CHECK3:       omp.body.continue:
2761 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2762 // CHECK3:       omp.inner.for.inc:
2763 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2764 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2765 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2766 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2767 // CHECK3:       omp.inner.for.end:
2768 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2769 // CHECK3:       omp.dispatch.inc:
2770 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2771 // CHECK3:       omp.dispatch.end:
2772 // CHECK3-NEXT:    ret void
2773 //
2774 //
2775 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
2776 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2777 // CHECK3-NEXT:  entry:
2778 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2779 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2780 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2781 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2782 // CHECK3-NEXT:    ret void
2783 //
2784 //
2785 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
2786 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2787 // CHECK3-NEXT:  entry:
2788 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2789 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2790 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2791 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2792 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2793 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2794 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2795 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2796 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2797 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2798 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2799 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2800 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2801 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2802 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2803 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2804 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2805 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2806 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2807 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2808 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2809 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2810 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2811 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2812 // CHECK3:       cond.true:
2813 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2814 // CHECK3:       cond.false:
2815 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2816 // CHECK3-NEXT:    br label [[COND_END]]
2817 // CHECK3:       cond.end:
2818 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2819 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2820 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2821 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2822 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2823 // CHECK3:       omp.inner.for.cond:
2824 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2825 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2826 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2827 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2828 // CHECK3:       omp.inner.for.body:
2829 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2830 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2831 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2832 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2833 // CHECK3:       omp.inner.for.inc:
2834 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2835 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2836 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2837 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2838 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2839 // CHECK3:       omp.inner.for.end:
2840 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2841 // CHECK3:       omp.loop.exit:
2842 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2843 // CHECK3-NEXT:    ret void
2844 //
2845 //
2846 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
2847 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2848 // CHECK3-NEXT:  entry:
2849 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2850 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2851 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2852 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2853 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2854 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2855 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2856 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2857 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2858 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2859 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2860 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2861 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2862 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2863 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2864 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2865 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2866 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2867 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2868 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2869 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2870 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2871 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2872 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2873 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2874 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2875 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2876 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2877 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2878 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2879 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
2880 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2881 // CHECK3:       omp.dispatch.cond:
2882 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2883 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2884 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2885 // CHECK3:       omp.dispatch.body:
2886 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2887 // CHECK3-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2888 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2889 // CHECK3:       omp.inner.for.cond:
2890 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2891 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
2892 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2893 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2894 // CHECK3:       omp.inner.for.body:
2895 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2896 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2897 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2898 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
2899 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2900 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
2901 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2902 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
2903 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2904 // CHECK3:       omp.body.continue:
2905 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2906 // CHECK3:       omp.inner.for.inc:
2907 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2908 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2909 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2910 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
2911 // CHECK3:       omp.inner.for.end:
2912 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2913 // CHECK3:       omp.dispatch.inc:
2914 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2915 // CHECK3:       omp.dispatch.end:
2916 // CHECK3-NEXT:    ret void
2917 //
2918 //
2919 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2920 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2921 // CHECK3-NEXT:  entry:
2922 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
2923 // CHECK3-NEXT:    ret void
2924 //
2925 //
2926 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2927 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
2928 // CHECK4-NEXT:  entry:
2929 // CHECK4-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2930 // CHECK4-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
2931 // CHECK4-NEXT:    ret i32 [[CALL]]
2932 //
2933 //
2934 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2935 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2936 // CHECK4-NEXT:  entry:
2937 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2938 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2939 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2940 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2941 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2942 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
2943 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
2944 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
2945 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2946 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
2947 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
2948 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
2949 // CHECK4-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
2950 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
2951 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
2952 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
2953 // CHECK4-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
2954 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
2955 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
2956 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
2957 // CHECK4-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
2958 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2959 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2960 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2961 // CHECK4-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2962 // CHECK4-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2963 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
2964 // CHECK4-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2965 // CHECK4-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2966 // CHECK4-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
2967 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2968 // CHECK4-NEXT:    store i8* null, i8** [[TMP4]], align 4
2969 // CHECK4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2970 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2971 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
2972 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2973 // CHECK4-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2974 // CHECK4-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2975 // CHECK4:       omp_offload.failed:
2976 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2977 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2978 // CHECK4:       omp_offload.cont:
2979 // CHECK4-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2980 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2981 // CHECK4-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
2982 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
2983 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2984 // CHECK4-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
2985 // CHECK4-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
2986 // CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
2987 // CHECK4-NEXT:    store i8* null, i8** [[TMP13]], align 4
2988 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2989 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2990 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2991 // CHECK4-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2992 // CHECK4-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2993 // CHECK4-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2994 // CHECK4:       omp_offload.failed7:
2995 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
2996 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2997 // CHECK4:       omp_offload.cont8:
2998 // CHECK4-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2999 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3000 // CHECK4-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
3001 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
3002 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3003 // CHECK4-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
3004 // CHECK4-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
3005 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
3006 // CHECK4-NEXT:    store i8* null, i8** [[TMP22]], align 4
3007 // CHECK4-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3008 // CHECK4-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3009 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3010 // CHECK4-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3011 // CHECK4-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3012 // CHECK4-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
3013 // CHECK4:       omp_offload.failed14:
3014 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
3015 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
3016 // CHECK4:       omp_offload.cont15:
3017 // CHECK4-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3018 // CHECK4-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3019 // CHECK4-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
3020 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
3021 // CHECK4-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3022 // CHECK4-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
3023 // CHECK4-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
3024 // CHECK4-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
3025 // CHECK4-NEXT:    store i8* null, i8** [[TMP31]], align 4
3026 // CHECK4-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3027 // CHECK4-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3028 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3029 // CHECK4-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3030 // CHECK4-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3031 // CHECK4-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
3032 // CHECK4:       omp_offload.failed21:
3033 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
3034 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
3035 // CHECK4:       omp_offload.cont22:
3036 // CHECK4-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3037 // CHECK4-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3038 // CHECK4-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3039 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
3040 // CHECK4-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3041 // CHECK4-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3042 // CHECK4-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
3043 // CHECK4-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
3044 // CHECK4-NEXT:    store i8* null, i8** [[TMP40]], align 4
3045 // CHECK4-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3046 // CHECK4-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3047 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3048 // CHECK4-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3049 // CHECK4-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
3050 // CHECK4-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
3051 // CHECK4:       omp_offload.failed28:
3052 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
3053 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
3054 // CHECK4:       omp_offload.cont29:
3055 // CHECK4-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3056 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
3057 // CHECK4-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3058 // CHECK4-NEXT:    ret i32 [[TMP45]]
3059 //
3060 //
3061 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
3062 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3063 // CHECK4-NEXT:  entry:
3064 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3065 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3066 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3067 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3068 // CHECK4-NEXT:    ret void
3069 //
3070 //
3071 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
3072 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3073 // CHECK4-NEXT:  entry:
3074 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3075 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3076 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3077 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3078 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3079 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3080 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3081 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3082 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3083 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3084 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3085 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3086 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3087 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3088 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3089 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3090 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3091 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3092 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3093 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3094 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3095 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3096 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3097 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3098 // CHECK4:       cond.true:
3099 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3100 // CHECK4:       cond.false:
3101 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3102 // CHECK4-NEXT:    br label [[COND_END]]
3103 // CHECK4:       cond.end:
3104 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3105 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3106 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3107 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3108 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3109 // CHECK4:       omp.inner.for.cond:
3110 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3111 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3112 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3113 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3114 // CHECK4:       omp.inner.for.body:
3115 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3116 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3117 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3118 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3119 // CHECK4:       omp.inner.for.inc:
3120 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3121 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3122 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3123 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3124 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3125 // CHECK4:       omp.inner.for.end:
3126 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3127 // CHECK4:       omp.loop.exit:
3128 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3129 // CHECK4-NEXT:    ret void
3130 //
3131 //
3132 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
3133 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3134 // CHECK4-NEXT:  entry:
3135 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3136 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3137 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3138 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3139 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3140 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3141 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3142 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3143 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3144 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3145 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3146 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3147 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3148 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3149 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3150 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3151 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3152 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3153 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3154 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3155 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3156 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3157 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3158 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3159 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3160 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3161 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3162 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3163 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3164 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3165 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3166 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3167 // CHECK4:       cond.true:
3168 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3169 // CHECK4:       cond.false:
3170 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3171 // CHECK4-NEXT:    br label [[COND_END]]
3172 // CHECK4:       cond.end:
3173 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3174 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3175 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3176 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3177 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3178 // CHECK4:       omp.inner.for.cond:
3179 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3180 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3181 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3182 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3183 // CHECK4:       omp.inner.for.body:
3184 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3185 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3186 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3187 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3188 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3189 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3190 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3191 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3192 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3193 // CHECK4:       omp.body.continue:
3194 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3195 // CHECK4:       omp.inner.for.inc:
3196 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3197 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3198 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3199 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3200 // CHECK4:       omp.inner.for.end:
3201 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3202 // CHECK4:       omp.loop.exit:
3203 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3204 // CHECK4-NEXT:    ret void
3205 //
3206 //
3207 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
3208 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3209 // CHECK4-NEXT:  entry:
3210 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3211 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3212 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3213 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3214 // CHECK4-NEXT:    ret void
3215 //
3216 //
3217 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2
3218 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3219 // CHECK4-NEXT:  entry:
3220 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3221 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3222 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3223 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3224 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3225 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3226 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3227 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3228 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3229 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3230 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3231 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3232 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3233 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3234 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3235 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3236 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3237 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3238 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3239 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3240 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3241 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3242 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3243 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3244 // CHECK4:       cond.true:
3245 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3246 // CHECK4:       cond.false:
3247 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3248 // CHECK4-NEXT:    br label [[COND_END]]
3249 // CHECK4:       cond.end:
3250 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3251 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3252 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3253 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3254 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3255 // CHECK4:       omp.inner.for.cond:
3256 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3257 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3258 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3259 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3260 // CHECK4:       omp.inner.for.body:
3261 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3262 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3263 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3264 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3265 // CHECK4:       omp.inner.for.inc:
3266 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3267 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3268 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3269 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3270 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3271 // CHECK4:       omp.inner.for.end:
3272 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3273 // CHECK4:       omp.loop.exit:
3274 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3275 // CHECK4-NEXT:    ret void
3276 //
3277 //
3278 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
3279 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3280 // CHECK4-NEXT:  entry:
3281 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3282 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3283 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3284 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3285 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3286 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3287 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3288 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3289 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3290 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3291 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3292 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3293 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3294 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3295 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3296 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3297 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3298 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3299 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3300 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3301 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3302 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3303 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3304 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3305 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3306 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3307 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3308 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3309 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3310 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3311 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3312 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3313 // CHECK4:       cond.true:
3314 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3315 // CHECK4:       cond.false:
3316 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3317 // CHECK4-NEXT:    br label [[COND_END]]
3318 // CHECK4:       cond.end:
3319 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3320 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3321 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3322 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3323 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3324 // CHECK4:       omp.inner.for.cond:
3325 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3326 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3327 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3328 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3329 // CHECK4:       omp.inner.for.body:
3330 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3331 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3332 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3333 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3334 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3335 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3336 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3337 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3338 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3339 // CHECK4:       omp.body.continue:
3340 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3341 // CHECK4:       omp.inner.for.inc:
3342 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3343 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3344 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3345 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3346 // CHECK4:       omp.inner.for.end:
3347 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3348 // CHECK4:       omp.loop.exit:
3349 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3350 // CHECK4-NEXT:    ret void
3351 //
3352 //
3353 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
3354 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3355 // CHECK4-NEXT:  entry:
3356 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3357 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3358 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3359 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3360 // CHECK4-NEXT:    ret void
3361 //
3362 //
3363 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6
3364 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3365 // CHECK4-NEXT:  entry:
3366 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3367 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3368 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3369 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3370 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3371 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3372 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3373 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3374 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3375 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3376 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3377 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3378 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3379 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3380 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3381 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3382 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3383 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3384 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3385 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3386 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3387 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3388 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3389 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3390 // CHECK4:       cond.true:
3391 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3392 // CHECK4:       cond.false:
3393 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3394 // CHECK4-NEXT:    br label [[COND_END]]
3395 // CHECK4:       cond.end:
3396 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3397 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3398 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3399 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3400 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3401 // CHECK4:       omp.inner.for.cond:
3402 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3403 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3404 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3405 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3406 // CHECK4:       omp.inner.for.body:
3407 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3408 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3409 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3410 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3411 // CHECK4:       omp.inner.for.inc:
3412 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3413 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3414 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3415 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3416 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3417 // CHECK4:       omp.inner.for.end:
3418 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3419 // CHECK4:       omp.loop.exit:
3420 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3421 // CHECK4-NEXT:    ret void
3422 //
3423 //
3424 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7
3425 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3426 // CHECK4-NEXT:  entry:
3427 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3428 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3429 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3430 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3431 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3432 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3433 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3434 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3435 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3436 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3437 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3438 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3439 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3440 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3441 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3442 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3443 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3444 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3445 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3446 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3447 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3448 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3449 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3450 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3451 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3452 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3453 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3454 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3455 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
3456 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3457 // CHECK4:       omp.dispatch.cond:
3458 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3459 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3460 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
3461 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3462 // CHECK4:       cond.true:
3463 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3464 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3465 // CHECK4:       cond.false:
3466 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3467 // CHECK4-NEXT:    br label [[COND_END]]
3468 // CHECK4:       cond.end:
3469 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3470 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3471 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3472 // CHECK4-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3473 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3474 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3475 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3476 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3477 // CHECK4:       omp.dispatch.body:
3478 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3479 // CHECK4:       omp.inner.for.cond:
3480 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3481 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3482 // CHECK4-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3483 // CHECK4-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3484 // CHECK4:       omp.inner.for.body:
3485 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3486 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3487 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3488 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3489 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3490 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
3491 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
3492 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3493 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3494 // CHECK4:       omp.body.continue:
3495 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3496 // CHECK4:       omp.inner.for.inc:
3497 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3498 // CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
3499 // CHECK4-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3500 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3501 // CHECK4:       omp.inner.for.end:
3502 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3503 // CHECK4:       omp.dispatch.inc:
3504 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3505 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3506 // CHECK4-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3507 // CHECK4-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
3508 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3509 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3510 // CHECK4-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3511 // CHECK4-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
3512 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
3513 // CHECK4:       omp.dispatch.end:
3514 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3515 // CHECK4-NEXT:    ret void
3516 //
3517 //
3518 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
3519 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3520 // CHECK4-NEXT:  entry:
3521 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3522 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3523 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3524 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3525 // CHECK4-NEXT:    ret void
3526 //
3527 //
3528 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10
3529 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3530 // CHECK4-NEXT:  entry:
3531 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3532 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3533 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3534 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3535 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3536 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3537 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3538 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3539 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3540 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3541 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3542 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3543 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3544 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3545 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3546 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3547 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3548 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3549 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3550 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3551 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3552 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3553 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3554 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3555 // CHECK4:       cond.true:
3556 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3557 // CHECK4:       cond.false:
3558 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3559 // CHECK4-NEXT:    br label [[COND_END]]
3560 // CHECK4:       cond.end:
3561 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3562 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3563 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3564 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3565 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3566 // CHECK4:       omp.inner.for.cond:
3567 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3568 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3569 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3570 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3571 // CHECK4:       omp.inner.for.body:
3572 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3573 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3574 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3575 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3576 // CHECK4:       omp.inner.for.inc:
3577 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3578 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3579 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3580 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3581 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3582 // CHECK4:       omp.inner.for.end:
3583 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3584 // CHECK4:       omp.loop.exit:
3585 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3586 // CHECK4-NEXT:    ret void
3587 //
3588 //
3589 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11
3590 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3591 // CHECK4-NEXT:  entry:
3592 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3593 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3594 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3595 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3596 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3597 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3598 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3599 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3600 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3601 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3602 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3603 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3604 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3605 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3606 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3607 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3608 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3609 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3610 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3611 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3612 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3613 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3614 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3615 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3616 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3617 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3618 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3619 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3620 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3621 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3622 // CHECK4-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3623 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3624 // CHECK4:       omp.dispatch.cond:
3625 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3626 // CHECK4-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3627 // CHECK4-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3628 // CHECK4:       omp.dispatch.body:
3629 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3630 // CHECK4-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3631 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3632 // CHECK4:       omp.inner.for.cond:
3633 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3634 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
3635 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3636 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3637 // CHECK4:       omp.inner.for.body:
3638 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3639 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3640 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3641 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
3642 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3643 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
3644 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
3645 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
3646 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3647 // CHECK4:       omp.body.continue:
3648 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3649 // CHECK4:       omp.inner.for.inc:
3650 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3651 // CHECK4-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
3652 // CHECK4-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3653 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
3654 // CHECK4:       omp.inner.for.end:
3655 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3656 // CHECK4:       omp.dispatch.inc:
3657 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
3658 // CHECK4:       omp.dispatch.end:
3659 // CHECK4-NEXT:    ret void
3660 //
3661 //
3662 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
3663 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3664 // CHECK4-NEXT:  entry:
3665 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3666 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3667 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3668 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3669 // CHECK4-NEXT:    ret void
3670 //
3671 //
3672 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14
3673 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3674 // CHECK4-NEXT:  entry:
3675 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3676 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3677 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3678 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3679 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3680 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3681 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3682 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3683 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3684 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3685 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3686 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3687 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3688 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3689 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3690 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3691 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3692 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3693 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3694 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3695 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3696 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3697 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3698 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3699 // CHECK4:       cond.true:
3700 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3701 // CHECK4:       cond.false:
3702 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3703 // CHECK4-NEXT:    br label [[COND_END]]
3704 // CHECK4:       cond.end:
3705 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3706 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3707 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3708 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3709 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3710 // CHECK4:       omp.inner.for.cond:
3711 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3712 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3713 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3714 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3715 // CHECK4:       omp.inner.for.body:
3716 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3717 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3718 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3719 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3720 // CHECK4:       omp.inner.for.inc:
3721 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3722 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3723 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3724 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3725 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3726 // CHECK4:       omp.inner.for.end:
3727 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3728 // CHECK4:       omp.loop.exit:
3729 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3730 // CHECK4-NEXT:    ret void
3731 //
3732 //
3733 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15
3734 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3735 // CHECK4-NEXT:  entry:
3736 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3737 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3738 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3739 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3740 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3741 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3742 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3743 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3744 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3745 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3746 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3747 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3748 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3749 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3750 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3751 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3752 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3753 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3754 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3755 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3756 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3757 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3758 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3759 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3760 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3761 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3762 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3763 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3764 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3765 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3766 // CHECK4-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
3767 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3768 // CHECK4:       omp.dispatch.cond:
3769 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3770 // CHECK4-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3771 // CHECK4-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3772 // CHECK4:       omp.dispatch.body:
3773 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3774 // CHECK4-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3775 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3776 // CHECK4:       omp.inner.for.cond:
3777 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3778 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
3779 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3780 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3781 // CHECK4:       omp.inner.for.body:
3782 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3783 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3784 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3785 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
3786 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3787 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
3788 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
3789 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
3790 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3791 // CHECK4:       omp.body.continue:
3792 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3793 // CHECK4:       omp.inner.for.inc:
3794 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3795 // CHECK4-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
3796 // CHECK4-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
3797 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
3798 // CHECK4:       omp.inner.for.end:
3799 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3800 // CHECK4:       omp.dispatch.inc:
3801 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
3802 // CHECK4:       omp.dispatch.end:
3803 // CHECK4-NEXT:    ret void
3804 //
3805 //
3806 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3807 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
3808 // CHECK4-NEXT:  entry:
3809 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
3810 // CHECK4-NEXT:    ret void
3811 //
3812 //
3813 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3814 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3815 // CHECK5-NEXT:  entry:
3816 // CHECK5-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3817 // CHECK5-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
3818 // CHECK5-NEXT:    ret i32 [[CALL]]
3819 //
3820 //
3821 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3822 // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3823 // CHECK5-NEXT:  entry:
3824 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3825 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3826 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3827 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3828 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3829 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
3830 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
3831 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
3832 // CHECK5-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
3833 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
3834 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
3835 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
3836 // CHECK5-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
3837 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
3838 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
3839 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
3840 // CHECK5-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
3841 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
3842 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
3843 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
3844 // CHECK5-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
3845 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3846 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3847 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
3848 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3849 // CHECK5-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
3850 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
3851 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3852 // CHECK5-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
3853 // CHECK5-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
3854 // CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3855 // CHECK5-NEXT:    store i8* null, i8** [[TMP4]], align 8
3856 // CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3857 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3858 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
3859 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3860 // CHECK5-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3861 // CHECK5-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3862 // CHECK5:       omp_offload.failed:
3863 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3864 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3865 // CHECK5:       omp_offload.cont:
3866 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3867 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3868 // CHECK5-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
3869 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
3870 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3871 // CHECK5-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
3872 // CHECK5-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
3873 // CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
3874 // CHECK5-NEXT:    store i8* null, i8** [[TMP13]], align 8
3875 // CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3876 // CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3877 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3878 // CHECK5-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3879 // CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3880 // CHECK5-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
3881 // CHECK5:       omp_offload.failed7:
3882 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
3883 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
3884 // CHECK5:       omp_offload.cont8:
3885 // CHECK5-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3886 // CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3887 // CHECK5-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
3888 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
3889 // CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3890 // CHECK5-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
3891 // CHECK5-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
3892 // CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
3893 // CHECK5-NEXT:    store i8* null, i8** [[TMP22]], align 8
3894 // CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3895 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3896 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3897 // CHECK5-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3898 // CHECK5-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3899 // CHECK5-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
3900 // CHECK5:       omp_offload.failed14:
3901 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
3902 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
3903 // CHECK5:       omp_offload.cont15:
3904 // CHECK5-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3905 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3906 // CHECK5-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
3907 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
3908 // CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3909 // CHECK5-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
3910 // CHECK5-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
3911 // CHECK5-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
3912 // CHECK5-NEXT:    store i8* null, i8** [[TMP31]], align 8
3913 // CHECK5-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3914 // CHECK5-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3915 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3916 // CHECK5-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3917 // CHECK5-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3918 // CHECK5-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
3919 // CHECK5:       omp_offload.failed21:
3920 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
3921 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
3922 // CHECK5:       omp_offload.cont22:
3923 // CHECK5-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3924 // CHECK5-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3925 // CHECK5-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3926 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
3927 // CHECK5-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3928 // CHECK5-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3929 // CHECK5-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
3930 // CHECK5-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
3931 // CHECK5-NEXT:    store i8* null, i8** [[TMP40]], align 8
3932 // CHECK5-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3933 // CHECK5-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3934 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3935 // CHECK5-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3936 // CHECK5-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
3937 // CHECK5-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
3938 // CHECK5:       omp_offload.failed28:
3939 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
3940 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
3941 // CHECK5:       omp_offload.cont29:
3942 // CHECK5-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3943 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
3944 // CHECK5-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3945 // CHECK5-NEXT:    ret i32 [[TMP45]]
3946 //
3947 //
3948 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
3949 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3950 // CHECK5-NEXT:  entry:
3951 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3952 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3953 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3954 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3955 // CHECK5-NEXT:    ret void
3956 //
3957 //
3958 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
3959 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3960 // CHECK5-NEXT:  entry:
3961 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3962 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3963 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3964 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3965 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3966 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3967 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3968 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3969 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3970 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3971 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3972 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3973 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3974 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3975 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3976 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3977 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3978 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3979 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3980 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3981 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3982 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3983 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3984 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3985 // CHECK5:       cond.true:
3986 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3987 // CHECK5:       cond.false:
3988 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3989 // CHECK5-NEXT:    br label [[COND_END]]
3990 // CHECK5:       cond.end:
3991 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3992 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3993 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3994 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3995 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3996 // CHECK5:       omp.inner.for.cond:
3997 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3998 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3999 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4000 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4001 // CHECK5:       omp.inner.for.body:
4002 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4003 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4004 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4005 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4006 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4007 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4008 // CHECK5:       omp.inner.for.inc:
4009 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4010 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4011 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4012 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4013 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4014 // CHECK5:       omp.inner.for.end:
4015 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4016 // CHECK5:       omp.loop.exit:
4017 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4018 // CHECK5-NEXT:    ret void
4019 //
4020 //
4021 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
4022 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4023 // CHECK5-NEXT:  entry:
4024 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4025 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4026 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4027 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4028 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4029 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4030 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4031 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4032 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4033 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4034 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4035 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4036 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4037 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4038 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4039 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4040 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4041 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4042 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4043 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4044 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4045 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4046 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4047 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4048 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4049 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4050 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4051 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4052 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4053 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4054 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4055 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4056 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4057 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4058 // CHECK5:       cond.true:
4059 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4060 // CHECK5:       cond.false:
4061 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4062 // CHECK5-NEXT:    br label [[COND_END]]
4063 // CHECK5:       cond.end:
4064 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4065 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4066 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4067 // CHECK5-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4068 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4069 // CHECK5:       omp.inner.for.cond:
4070 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4071 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4072 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4073 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4074 // CHECK5:       omp.inner.for.body:
4075 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4076 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4077 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4078 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4079 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4080 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4081 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4082 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4083 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4084 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4085 // CHECK5:       omp.body.continue:
4086 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4087 // CHECK5:       omp.inner.for.inc:
4088 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4089 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4090 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4091 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4092 // CHECK5:       omp.inner.for.end:
4093 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4094 // CHECK5:       omp.loop.exit:
4095 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4096 // CHECK5-NEXT:    ret void
4097 //
4098 //
4099 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
4100 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4101 // CHECK5-NEXT:  entry:
4102 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4103 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4104 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4105 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4106 // CHECK5-NEXT:    ret void
4107 //
4108 //
4109 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
4110 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4111 // CHECK5-NEXT:  entry:
4112 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4113 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4114 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4115 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4116 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4117 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4118 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4119 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4120 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4121 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4122 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4123 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4124 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4125 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4126 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4127 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4128 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4129 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4130 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4131 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4132 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4133 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4134 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4135 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4136 // CHECK5:       cond.true:
4137 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4138 // CHECK5:       cond.false:
4139 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4140 // CHECK5-NEXT:    br label [[COND_END]]
4141 // CHECK5:       cond.end:
4142 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4143 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4144 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4145 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4146 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4147 // CHECK5:       omp.inner.for.cond:
4148 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4149 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4150 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4151 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4152 // CHECK5:       omp.inner.for.body:
4153 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4154 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4155 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4156 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4157 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4158 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4159 // CHECK5:       omp.inner.for.inc:
4160 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4161 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4162 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4163 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4164 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4165 // CHECK5:       omp.inner.for.end:
4166 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4167 // CHECK5:       omp.loop.exit:
4168 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4169 // CHECK5-NEXT:    ret void
4170 //
4171 //
4172 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
4173 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4174 // CHECK5-NEXT:  entry:
4175 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4176 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4177 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4178 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4179 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4180 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4181 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4182 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4183 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4184 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4185 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4186 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4187 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4188 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4189 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4190 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4191 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4192 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4193 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4194 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4195 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4196 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4197 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4198 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4199 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4200 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4201 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4202 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4203 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4204 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4205 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4206 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4207 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4208 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4209 // CHECK5:       cond.true:
4210 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4211 // CHECK5:       cond.false:
4212 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4213 // CHECK5-NEXT:    br label [[COND_END]]
4214 // CHECK5:       cond.end:
4215 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4216 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4217 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4218 // CHECK5-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4219 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4220 // CHECK5:       omp.inner.for.cond:
4221 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4222 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4223 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4224 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4225 // CHECK5:       omp.inner.for.body:
4226 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4227 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4228 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4229 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4230 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4231 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4232 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4233 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4234 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4235 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4236 // CHECK5:       omp.body.continue:
4237 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4238 // CHECK5:       omp.inner.for.inc:
4239 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4240 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4241 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4242 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4243 // CHECK5:       omp.inner.for.end:
4244 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4245 // CHECK5:       omp.loop.exit:
4246 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4247 // CHECK5-NEXT:    ret void
4248 //
4249 //
4250 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
4251 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4252 // CHECK5-NEXT:  entry:
4253 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4254 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4255 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4256 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4257 // CHECK5-NEXT:    ret void
4258 //
4259 //
4260 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
4261 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4262 // CHECK5-NEXT:  entry:
4263 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4264 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4265 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4266 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4267 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4268 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4269 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4270 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4271 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4272 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4273 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4274 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4275 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4276 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4277 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4278 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4279 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4280 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4281 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4282 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4283 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4284 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4285 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4286 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4287 // CHECK5:       cond.true:
4288 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4289 // CHECK5:       cond.false:
4290 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4291 // CHECK5-NEXT:    br label [[COND_END]]
4292 // CHECK5:       cond.end:
4293 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4294 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4295 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4296 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4297 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4298 // CHECK5:       omp.inner.for.cond:
4299 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4300 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4301 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4302 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4303 // CHECK5:       omp.inner.for.body:
4304 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4305 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4306 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4307 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4308 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4309 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4310 // CHECK5:       omp.inner.for.inc:
4311 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4312 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4313 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4314 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4315 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4316 // CHECK5:       omp.inner.for.end:
4317 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4318 // CHECK5:       omp.loop.exit:
4319 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4320 // CHECK5-NEXT:    ret void
4321 //
4322 //
4323 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
4324 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4325 // CHECK5-NEXT:  entry:
4326 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4327 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4328 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4329 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4330 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4331 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4332 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4333 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4334 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4335 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4336 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4337 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4338 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4339 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4340 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4341 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4342 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4343 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4344 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4345 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4346 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4347 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4348 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4349 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4350 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4351 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4352 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4353 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4354 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4355 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4356 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
4357 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4358 // CHECK5:       omp.dispatch.cond:
4359 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4360 // CHECK5-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4361 // CHECK5-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
4362 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
4363 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4364 // CHECK5:       cond.true:
4365 // CHECK5-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4366 // CHECK5-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
4367 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4368 // CHECK5:       cond.false:
4369 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4370 // CHECK5-NEXT:    br label [[COND_END]]
4371 // CHECK5:       cond.end:
4372 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
4373 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4374 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4375 // CHECK5-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
4376 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4377 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4378 // CHECK5-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
4379 // CHECK5-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4380 // CHECK5:       omp.dispatch.body:
4381 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4382 // CHECK5:       omp.inner.for.cond:
4383 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4384 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4385 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4386 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4387 // CHECK5:       omp.inner.for.body:
4388 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4389 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
4390 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4391 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4392 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4393 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
4394 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
4395 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4396 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4397 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4398 // CHECK5:       omp.body.continue:
4399 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4400 // CHECK5:       omp.inner.for.inc:
4401 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4402 // CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
4403 // CHECK5-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
4404 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4405 // CHECK5:       omp.inner.for.end:
4406 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4407 // CHECK5:       omp.dispatch.inc:
4408 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4409 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4410 // CHECK5-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
4411 // CHECK5-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
4412 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4413 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4414 // CHECK5-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
4415 // CHECK5-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
4416 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
4417 // CHECK5:       omp.dispatch.end:
4418 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4419 // CHECK5-NEXT:    ret void
4420 //
4421 //
4422 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
4423 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4424 // CHECK5-NEXT:  entry:
4425 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4426 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4427 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4428 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4429 // CHECK5-NEXT:    ret void
4430 //
4431 //
4432 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
4433 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4434 // CHECK5-NEXT:  entry:
4435 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4436 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4437 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4438 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4439 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4440 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4441 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4442 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4443 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4444 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4445 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4446 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4447 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4448 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4449 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4450 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4451 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4452 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4453 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4454 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4455 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4456 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4457 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4458 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4459 // CHECK5:       cond.true:
4460 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4461 // CHECK5:       cond.false:
4462 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4463 // CHECK5-NEXT:    br label [[COND_END]]
4464 // CHECK5:       cond.end:
4465 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4466 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4467 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4468 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4469 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4470 // CHECK5:       omp.inner.for.cond:
4471 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4472 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4473 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4474 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4475 // CHECK5:       omp.inner.for.body:
4476 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4477 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4478 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4479 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4480 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4481 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4482 // CHECK5:       omp.inner.for.inc:
4483 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4484 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4485 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4486 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4487 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4488 // CHECK5:       omp.inner.for.end:
4489 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4490 // CHECK5:       omp.loop.exit:
4491 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4492 // CHECK5-NEXT:    ret void
4493 //
4494 //
4495 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
4496 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4497 // CHECK5-NEXT:  entry:
4498 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4499 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4500 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4501 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4502 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4503 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4504 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4505 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4506 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4507 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4508 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4509 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4510 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4511 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4512 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4513 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4514 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4515 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4516 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4517 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4518 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4519 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4520 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4521 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4522 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4523 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4524 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4525 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4526 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4527 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4528 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4529 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4530 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
4531 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4532 // CHECK5:       omp.dispatch.cond:
4533 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4534 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4535 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4536 // CHECK5:       omp.dispatch.body:
4537 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4538 // CHECK5-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4539 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4540 // CHECK5:       omp.inner.for.cond:
4541 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4542 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
4543 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4544 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4545 // CHECK5:       omp.inner.for.body:
4546 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4547 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4548 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4549 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
4550 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4551 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
4552 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
4553 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4554 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
4555 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4556 // CHECK5:       omp.body.continue:
4557 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4558 // CHECK5:       omp.inner.for.inc:
4559 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4560 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
4561 // CHECK5-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
4562 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
4563 // CHECK5:       omp.inner.for.end:
4564 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4565 // CHECK5:       omp.dispatch.inc:
4566 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
4567 // CHECK5:       omp.dispatch.end:
4568 // CHECK5-NEXT:    ret void
4569 //
4570 //
4571 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
4572 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4573 // CHECK5-NEXT:  entry:
4574 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4575 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4576 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4577 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4578 // CHECK5-NEXT:    ret void
4579 //
4580 //
4581 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14
4582 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4583 // CHECK5-NEXT:  entry:
4584 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4585 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4586 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4587 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4588 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4589 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4590 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4591 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4592 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4593 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4594 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4595 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4596 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4597 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4598 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4599 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4600 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4601 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4602 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4603 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4604 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4605 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4606 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4607 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4608 // CHECK5:       cond.true:
4609 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4610 // CHECK5:       cond.false:
4611 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4612 // CHECK5-NEXT:    br label [[COND_END]]
4613 // CHECK5:       cond.end:
4614 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4615 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4616 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4617 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4618 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4619 // CHECK5:       omp.inner.for.cond:
4620 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4621 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4622 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4623 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4624 // CHECK5:       omp.inner.for.body:
4625 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4626 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4627 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4628 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4629 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4630 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4631 // CHECK5:       omp.inner.for.inc:
4632 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4633 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4634 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4635 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4636 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4637 // CHECK5:       omp.inner.for.end:
4638 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4639 // CHECK5:       omp.loop.exit:
4640 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4641 // CHECK5-NEXT:    ret void
4642 //
4643 //
4644 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15
4645 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4646 // CHECK5-NEXT:  entry:
4647 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4648 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4649 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4650 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4651 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4652 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4653 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4654 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4655 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4656 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4657 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4658 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4659 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4660 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4661 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4662 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4663 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4664 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4665 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4666 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4667 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4668 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4669 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4670 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4671 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4672 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4673 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4674 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4675 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4676 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4677 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4678 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4679 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
4680 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4681 // CHECK5:       omp.dispatch.cond:
4682 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4683 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4684 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4685 // CHECK5:       omp.dispatch.body:
4686 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4687 // CHECK5-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4688 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4689 // CHECK5:       omp.inner.for.cond:
4690 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4691 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
4692 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4693 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4694 // CHECK5:       omp.inner.for.body:
4695 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4696 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4697 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4698 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
4699 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4700 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
4701 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
4702 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4703 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
4704 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4705 // CHECK5:       omp.body.continue:
4706 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4707 // CHECK5:       omp.inner.for.inc:
4708 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4709 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
4710 // CHECK5-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
4711 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
4712 // CHECK5:       omp.inner.for.end:
4713 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4714 // CHECK5:       omp.dispatch.inc:
4715 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
4716 // CHECK5:       omp.dispatch.end:
4717 // CHECK5-NEXT:    ret void
4718 //
4719 //
4720 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4721 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
4722 // CHECK5-NEXT:  entry:
4723 // CHECK5-NEXT:    call void @__tgt_register_requires(i64 1)
4724 // CHECK5-NEXT:    ret void
4725 //
4726 //
4727 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4728 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
4729 // CHECK6-NEXT:  entry:
4730 // CHECK6-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4731 // CHECK6-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
4732 // CHECK6-NEXT:    ret i32 [[CALL]]
4733 //
4734 //
4735 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4736 // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4737 // CHECK6-NEXT:  entry:
4738 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4739 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4740 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4741 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4742 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4743 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
4744 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
4745 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
4746 // CHECK6-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
4747 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
4748 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
4749 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
4750 // CHECK6-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
4751 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
4752 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
4753 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
4754 // CHECK6-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
4755 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
4756 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
4757 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
4758 // CHECK6-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
4759 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4760 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4761 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
4762 // CHECK6-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4763 // CHECK6-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
4764 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
4765 // CHECK6-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4766 // CHECK6-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
4767 // CHECK6-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
4768 // CHECK6-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4769 // CHECK6-NEXT:    store i8* null, i8** [[TMP4]], align 8
4770 // CHECK6-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4771 // CHECK6-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4772 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
4773 // CHECK6-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4774 // CHECK6-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
4775 // CHECK6-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4776 // CHECK6:       omp_offload.failed:
4777 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
4778 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4779 // CHECK6:       omp_offload.cont:
4780 // CHECK6-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4781 // CHECK6-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4782 // CHECK6-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
4783 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
4784 // CHECK6-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4785 // CHECK6-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
4786 // CHECK6-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
4787 // CHECK6-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
4788 // CHECK6-NEXT:    store i8* null, i8** [[TMP13]], align 8
4789 // CHECK6-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4790 // CHECK6-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4791 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4792 // CHECK6-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4793 // CHECK6-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4794 // CHECK6-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
4795 // CHECK6:       omp_offload.failed7:
4796 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
4797 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
4798 // CHECK6:       omp_offload.cont8:
4799 // CHECK6-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4800 // CHECK6-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
4801 // CHECK6-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
4802 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
4803 // CHECK6-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
4804 // CHECK6-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
4805 // CHECK6-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
4806 // CHECK6-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
4807 // CHECK6-NEXT:    store i8* null, i8** [[TMP22]], align 8
4808 // CHECK6-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
4809 // CHECK6-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
4810 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4811 // CHECK6-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4812 // CHECK6-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4813 // CHECK6-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
4814 // CHECK6:       omp_offload.failed14:
4815 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
4816 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
4817 // CHECK6:       omp_offload.cont15:
4818 // CHECK6-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4819 // CHECK6-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
4820 // CHECK6-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
4821 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
4822 // CHECK6-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
4823 // CHECK6-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
4824 // CHECK6-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
4825 // CHECK6-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
4826 // CHECK6-NEXT:    store i8* null, i8** [[TMP31]], align 8
4827 // CHECK6-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
4828 // CHECK6-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
4829 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4830 // CHECK6-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4831 // CHECK6-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
4832 // CHECK6-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
4833 // CHECK6:       omp_offload.failed21:
4834 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
4835 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
4836 // CHECK6:       omp_offload.cont22:
4837 // CHECK6-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4838 // CHECK6-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
4839 // CHECK6-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
4840 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
4841 // CHECK6-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
4842 // CHECK6-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
4843 // CHECK6-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
4844 // CHECK6-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
4845 // CHECK6-NEXT:    store i8* null, i8** [[TMP40]], align 8
4846 // CHECK6-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
4847 // CHECK6-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
4848 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4849 // CHECK6-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4850 // CHECK6-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
4851 // CHECK6-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
4852 // CHECK6:       omp_offload.failed28:
4853 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
4854 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
4855 // CHECK6:       omp_offload.cont29:
4856 // CHECK6-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4857 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
4858 // CHECK6-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4859 // CHECK6-NEXT:    ret i32 [[TMP45]]
4860 //
4861 //
4862 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
4863 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
4864 // CHECK6-NEXT:  entry:
4865 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4866 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4867 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4868 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4869 // CHECK6-NEXT:    ret void
4870 //
4871 //
4872 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
4873 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4874 // CHECK6-NEXT:  entry:
4875 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4876 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4877 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4878 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4879 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4880 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4881 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4882 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4883 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4884 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4885 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4886 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4887 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4888 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4889 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4890 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4891 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4892 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4893 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4894 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4895 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4896 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4897 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4898 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4899 // CHECK6:       cond.true:
4900 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4901 // CHECK6:       cond.false:
4902 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4903 // CHECK6-NEXT:    br label [[COND_END]]
4904 // CHECK6:       cond.end:
4905 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4906 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4907 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4908 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4909 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4910 // CHECK6:       omp.inner.for.cond:
4911 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4912 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4913 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4914 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4915 // CHECK6:       omp.inner.for.body:
4916 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4917 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4918 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4919 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4920 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4921 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4922 // CHECK6:       omp.inner.for.inc:
4923 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4924 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4925 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4926 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4927 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4928 // CHECK6:       omp.inner.for.end:
4929 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4930 // CHECK6:       omp.loop.exit:
4931 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4932 // CHECK6-NEXT:    ret void
4933 //
4934 //
4935 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
4936 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4937 // CHECK6-NEXT:  entry:
4938 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4939 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4940 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4941 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4942 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4943 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4944 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4945 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4946 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4947 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4948 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4949 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4950 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4951 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4952 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4953 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4954 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4955 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4956 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4957 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4958 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4959 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4960 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4961 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4962 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4963 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4964 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4965 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4966 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4967 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4968 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4969 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4970 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4971 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4972 // CHECK6:       cond.true:
4973 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4974 // CHECK6:       cond.false:
4975 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4976 // CHECK6-NEXT:    br label [[COND_END]]
4977 // CHECK6:       cond.end:
4978 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4979 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4980 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4981 // CHECK6-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4982 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4983 // CHECK6:       omp.inner.for.cond:
4984 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4985 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4986 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4987 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4988 // CHECK6:       omp.inner.for.body:
4989 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4990 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4991 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4992 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4993 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4994 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4995 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4996 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4997 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4998 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4999 // CHECK6:       omp.body.continue:
5000 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5001 // CHECK6:       omp.inner.for.inc:
5002 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5003 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
5004 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5005 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5006 // CHECK6:       omp.inner.for.end:
5007 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5008 // CHECK6:       omp.loop.exit:
5009 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5010 // CHECK6-NEXT:    ret void
5011 //
5012 //
5013 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
5014 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5015 // CHECK6-NEXT:  entry:
5016 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5017 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5018 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5019 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5020 // CHECK6-NEXT:    ret void
5021 //
5022 //
5023 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
5024 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5025 // CHECK6-NEXT:  entry:
5026 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5027 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5028 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5029 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5030 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5031 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5032 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5033 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5034 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5035 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5036 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5037 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5038 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5039 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5040 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5041 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5042 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5043 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5044 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5045 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5046 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5047 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5048 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5049 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5050 // CHECK6:       cond.true:
5051 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5052 // CHECK6:       cond.false:
5053 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5054 // CHECK6-NEXT:    br label [[COND_END]]
5055 // CHECK6:       cond.end:
5056 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5057 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5058 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5059 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5060 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5061 // CHECK6:       omp.inner.for.cond:
5062 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5063 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5064 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5065 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5066 // CHECK6:       omp.inner.for.body:
5067 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5068 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5069 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5070 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5071 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5072 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5073 // CHECK6:       omp.inner.for.inc:
5074 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5075 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5076 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5077 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5078 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5079 // CHECK6:       omp.inner.for.end:
5080 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5081 // CHECK6:       omp.loop.exit:
5082 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5083 // CHECK6-NEXT:    ret void
5084 //
5085 //
5086 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
5087 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5088 // CHECK6-NEXT:  entry:
5089 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5090 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5091 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5092 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5093 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5094 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5095 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5096 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5097 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5098 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5099 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5100 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5101 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5102 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5103 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5104 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5105 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5106 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5107 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5108 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5109 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5110 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5111 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5112 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5113 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5114 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5115 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5116 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5117 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5118 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5119 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5120 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5121 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
5122 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5123 // CHECK6:       cond.true:
5124 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5125 // CHECK6:       cond.false:
5126 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5127 // CHECK6-NEXT:    br label [[COND_END]]
5128 // CHECK6:       cond.end:
5129 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5130 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5131 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5132 // CHECK6-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5133 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5134 // CHECK6:       omp.inner.for.cond:
5135 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5136 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5137 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5138 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5139 // CHECK6:       omp.inner.for.body:
5140 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5141 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5142 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5143 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5144 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5145 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
5146 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
5147 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5148 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5149 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5150 // CHECK6:       omp.body.continue:
5151 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5152 // CHECK6:       omp.inner.for.inc:
5153 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5154 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
5155 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5156 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5157 // CHECK6:       omp.inner.for.end:
5158 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5159 // CHECK6:       omp.loop.exit:
5160 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5161 // CHECK6-NEXT:    ret void
5162 //
5163 //
5164 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
5165 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5166 // CHECK6-NEXT:  entry:
5167 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5168 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5169 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5170 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5171 // CHECK6-NEXT:    ret void
5172 //
5173 //
5174 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6
5175 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5176 // CHECK6-NEXT:  entry:
5177 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5178 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5179 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5180 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5181 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5182 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5183 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5184 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5185 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5186 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5187 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5188 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5189 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5190 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5191 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5192 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5193 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5194 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5195 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5196 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5197 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5198 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5199 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5200 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5201 // CHECK6:       cond.true:
5202 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5203 // CHECK6:       cond.false:
5204 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5205 // CHECK6-NEXT:    br label [[COND_END]]
5206 // CHECK6:       cond.end:
5207 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5208 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5209 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5210 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5211 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5212 // CHECK6:       omp.inner.for.cond:
5213 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5214 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5215 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5216 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5217 // CHECK6:       omp.inner.for.body:
5218 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5219 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5220 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5221 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5222 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5223 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5224 // CHECK6:       omp.inner.for.inc:
5225 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5226 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5227 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5228 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5229 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5230 // CHECK6:       omp.inner.for.end:
5231 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5232 // CHECK6:       omp.loop.exit:
5233 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5234 // CHECK6-NEXT:    ret void
5235 //
5236 //
5237 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7
5238 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5239 // CHECK6-NEXT:  entry:
5240 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5241 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5242 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5243 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5244 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5245 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5246 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5247 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5248 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5249 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5250 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5251 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5252 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5253 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5254 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5255 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5256 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5257 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5258 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5259 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5260 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5261 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5262 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5263 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5264 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5265 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5266 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5267 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5268 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5269 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5270 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
5271 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5272 // CHECK6:       omp.dispatch.cond:
5273 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5274 // CHECK6-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5275 // CHECK6-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
5276 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
5277 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5278 // CHECK6:       cond.true:
5279 // CHECK6-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5280 // CHECK6-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
5281 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5282 // CHECK6:       cond.false:
5283 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5284 // CHECK6-NEXT:    br label [[COND_END]]
5285 // CHECK6:       cond.end:
5286 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
5287 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5288 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5289 // CHECK6-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
5290 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5291 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5292 // CHECK6-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5293 // CHECK6-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5294 // CHECK6:       omp.dispatch.body:
5295 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5296 // CHECK6:       omp.inner.for.cond:
5297 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5298 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5299 // CHECK6-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
5300 // CHECK6-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5301 // CHECK6:       omp.inner.for.body:
5302 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5303 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
5304 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5305 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5306 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5307 // CHECK6-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
5308 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
5309 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5310 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5311 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5312 // CHECK6:       omp.body.continue:
5313 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5314 // CHECK6:       omp.inner.for.inc:
5315 // CHECK6-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5316 // CHECK6-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
5317 // CHECK6-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
5318 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5319 // CHECK6:       omp.inner.for.end:
5320 // CHECK6-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5321 // CHECK6:       omp.dispatch.inc:
5322 // CHECK6-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5323 // CHECK6-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5324 // CHECK6-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
5325 // CHECK6-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
5326 // CHECK6-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5327 // CHECK6-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5328 // CHECK6-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
5329 // CHECK6-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
5330 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND]]
5331 // CHECK6:       omp.dispatch.end:
5332 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5333 // CHECK6-NEXT:    ret void
5334 //
5335 //
5336 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
5337 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5338 // CHECK6-NEXT:  entry:
5339 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5340 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5341 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5342 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5343 // CHECK6-NEXT:    ret void
5344 //
5345 //
5346 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10
5347 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5348 // CHECK6-NEXT:  entry:
5349 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5350 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5351 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5352 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5353 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5354 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5355 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5356 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5357 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5358 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5359 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5360 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5361 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5362 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5363 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5364 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5365 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5366 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5367 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5368 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5369 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5370 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5371 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5372 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5373 // CHECK6:       cond.true:
5374 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5375 // CHECK6:       cond.false:
5376 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5377 // CHECK6-NEXT:    br label [[COND_END]]
5378 // CHECK6:       cond.end:
5379 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5380 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5381 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5382 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5383 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5384 // CHECK6:       omp.inner.for.cond:
5385 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5386 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5387 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5388 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5389 // CHECK6:       omp.inner.for.body:
5390 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5391 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5392 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5393 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5394 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5395 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5396 // CHECK6:       omp.inner.for.inc:
5397 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5398 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5399 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5400 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5401 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5402 // CHECK6:       omp.inner.for.end:
5403 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5404 // CHECK6:       omp.loop.exit:
5405 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5406 // CHECK6-NEXT:    ret void
5407 //
5408 //
5409 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11
5410 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5411 // CHECK6-NEXT:  entry:
5412 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5413 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5414 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5415 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5416 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5417 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5418 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5419 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5420 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5421 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5422 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5423 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5424 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5425 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5426 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5427 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5428 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5429 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5430 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5431 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5432 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5433 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5434 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5435 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5436 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5437 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5438 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5439 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5440 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5441 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5442 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5443 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5444 // CHECK6-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
5445 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5446 // CHECK6:       omp.dispatch.cond:
5447 // CHECK6-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5448 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
5449 // CHECK6-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5450 // CHECK6:       omp.dispatch.body:
5451 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5452 // CHECK6-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
5453 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5454 // CHECK6:       omp.inner.for.cond:
5455 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5456 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
5457 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5458 // CHECK6-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5459 // CHECK6:       omp.inner.for.body:
5460 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5461 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
5462 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5463 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
5464 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5465 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
5466 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
5467 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5468 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
5469 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5470 // CHECK6:       omp.body.continue:
5471 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5472 // CHECK6:       omp.inner.for.inc:
5473 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5474 // CHECK6-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
5475 // CHECK6-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
5476 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
5477 // CHECK6:       omp.inner.for.end:
5478 // CHECK6-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5479 // CHECK6:       omp.dispatch.inc:
5480 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND]]
5481 // CHECK6:       omp.dispatch.end:
5482 // CHECK6-NEXT:    ret void
5483 //
5484 //
5485 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
5486 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5487 // CHECK6-NEXT:  entry:
5488 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5489 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5490 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5491 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5492 // CHECK6-NEXT:    ret void
5493 //
5494 //
5495 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14
5496 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5497 // CHECK6-NEXT:  entry:
5498 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5499 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5500 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5501 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5502 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5503 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5504 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5505 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5506 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5507 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5508 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5509 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5510 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5511 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5512 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5513 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5514 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5515 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5516 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5517 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5518 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5519 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5520 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5521 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5522 // CHECK6:       cond.true:
5523 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5524 // CHECK6:       cond.false:
5525 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5526 // CHECK6-NEXT:    br label [[COND_END]]
5527 // CHECK6:       cond.end:
5528 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5529 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5530 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5531 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5532 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5533 // CHECK6:       omp.inner.for.cond:
5534 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5535 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5536 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5537 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5538 // CHECK6:       omp.inner.for.body:
5539 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5540 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5541 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5542 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5543 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5544 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5545 // CHECK6:       omp.inner.for.inc:
5546 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5547 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5548 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5549 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5550 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5551 // CHECK6:       omp.inner.for.end:
5552 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5553 // CHECK6:       omp.loop.exit:
5554 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5555 // CHECK6-NEXT:    ret void
5556 //
5557 //
5558 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15
5559 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5560 // CHECK6-NEXT:  entry:
5561 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5562 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5563 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5564 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5565 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5566 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5567 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5568 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5569 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5570 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5571 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5572 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5573 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5574 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5575 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5576 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5577 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5578 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5579 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5580 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5581 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5582 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5583 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5584 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5585 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5586 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5587 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5588 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5589 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5590 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5591 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5592 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5593 // CHECK6-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
5594 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5595 // CHECK6:       omp.dispatch.cond:
5596 // CHECK6-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5597 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
5598 // CHECK6-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5599 // CHECK6:       omp.dispatch.body:
5600 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5601 // CHECK6-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
5602 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5603 // CHECK6:       omp.inner.for.cond:
5604 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5605 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
5606 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5607 // CHECK6-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5608 // CHECK6:       omp.inner.for.body:
5609 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5610 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
5611 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5612 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
5613 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5614 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
5615 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
5616 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5617 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
5618 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5619 // CHECK6:       omp.body.continue:
5620 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5621 // CHECK6:       omp.inner.for.inc:
5622 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5623 // CHECK6-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
5624 // CHECK6-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
5625 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
5626 // CHECK6:       omp.inner.for.end:
5627 // CHECK6-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5628 // CHECK6:       omp.dispatch.inc:
5629 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND]]
5630 // CHECK6:       omp.dispatch.end:
5631 // CHECK6-NEXT:    ret void
5632 //
5633 //
5634 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5635 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] {
5636 // CHECK6-NEXT:  entry:
5637 // CHECK6-NEXT:    call void @__tgt_register_requires(i64 1)
5638 // CHECK6-NEXT:    ret void
5639 //
5640 //
5641 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5642 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
5643 // CHECK7-NEXT:  entry:
5644 // CHECK7-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5645 // CHECK7-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5646 // CHECK7-NEXT:    ret i32 [[CALL]]
5647 //
5648 //
5649 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5650 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5651 // CHECK7-NEXT:  entry:
5652 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5653 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
5654 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
5655 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
5656 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5657 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
5658 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
5659 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
5660 // CHECK7-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
5661 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
5662 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
5663 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
5664 // CHECK7-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
5665 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
5666 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
5667 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
5668 // CHECK7-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
5669 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
5670 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
5671 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
5672 // CHECK7-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
5673 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5674 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5675 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
5676 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5677 // CHECK7-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
5678 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
5679 // CHECK7-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5680 // CHECK7-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
5681 // CHECK7-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
5682 // CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5683 // CHECK7-NEXT:    store i8* null, i8** [[TMP4]], align 4
5684 // CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5685 // CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5686 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
5687 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5688 // CHECK7-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
5689 // CHECK7-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5690 // CHECK7:       omp_offload.failed:
5691 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
5692 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5693 // CHECK7:       omp_offload.cont:
5694 // CHECK7-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5695 // CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
5696 // CHECK7-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
5697 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
5698 // CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
5699 // CHECK7-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
5700 // CHECK7-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
5701 // CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
5702 // CHECK7-NEXT:    store i8* null, i8** [[TMP13]], align 4
5703 // CHECK7-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
5704 // CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
5705 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5706 // CHECK7-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5707 // CHECK7-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5708 // CHECK7-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
5709 // CHECK7:       omp_offload.failed7:
5710 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
5711 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
5712 // CHECK7:       omp_offload.cont8:
5713 // CHECK7-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5714 // CHECK7-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
5715 // CHECK7-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
5716 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
5717 // CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
5718 // CHECK7-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
5719 // CHECK7-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
5720 // CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
5721 // CHECK7-NEXT:    store i8* null, i8** [[TMP22]], align 4
5722 // CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
5723 // CHECK7-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
5724 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5725 // CHECK7-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5726 // CHECK7-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5727 // CHECK7-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
5728 // CHECK7:       omp_offload.failed14:
5729 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
5730 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
5731 // CHECK7:       omp_offload.cont15:
5732 // CHECK7-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5733 // CHECK7-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
5734 // CHECK7-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
5735 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
5736 // CHECK7-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
5737 // CHECK7-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
5738 // CHECK7-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
5739 // CHECK7-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
5740 // CHECK7-NEXT:    store i8* null, i8** [[TMP31]], align 4
5741 // CHECK7-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
5742 // CHECK7-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
5743 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5744 // CHECK7-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5745 // CHECK7-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
5746 // CHECK7-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
5747 // CHECK7:       omp_offload.failed21:
5748 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
5749 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
5750 // CHECK7:       omp_offload.cont22:
5751 // CHECK7-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5752 // CHECK7-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5753 // CHECK7-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
5754 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
5755 // CHECK7-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5756 // CHECK7-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
5757 // CHECK7-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
5758 // CHECK7-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
5759 // CHECK7-NEXT:    store i8* null, i8** [[TMP40]], align 4
5760 // CHECK7-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5761 // CHECK7-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5762 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5763 // CHECK7-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5764 // CHECK7-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
5765 // CHECK7-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
5766 // CHECK7:       omp_offload.failed28:
5767 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
5768 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
5769 // CHECK7:       omp_offload.cont29:
5770 // CHECK7-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5771 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
5772 // CHECK7-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5773 // CHECK7-NEXT:    ret i32 [[TMP45]]
5774 //
5775 //
5776 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
5777 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
5778 // CHECK7-NEXT:  entry:
5779 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5780 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5781 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5782 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5783 // CHECK7-NEXT:    ret void
5784 //
5785 //
5786 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
5787 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5788 // CHECK7-NEXT:  entry:
5789 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5790 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5791 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5792 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5793 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5794 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5795 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5796 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5797 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5798 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5799 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5800 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5801 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5802 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5803 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5804 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5805 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5806 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5807 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5808 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5809 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5810 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5811 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5812 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5813 // CHECK7:       cond.true:
5814 // CHECK7-NEXT:    br label [[COND_END:%.*]]
5815 // CHECK7:       cond.false:
5816 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5817 // CHECK7-NEXT:    br label [[COND_END]]
5818 // CHECK7:       cond.end:
5819 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5820 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5821 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5822 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5823 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5824 // CHECK7:       omp.inner.for.cond:
5825 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5826 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5827 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5828 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5829 // CHECK7:       omp.inner.for.body:
5830 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5831 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5832 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
5833 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5834 // CHECK7:       omp.inner.for.inc:
5835 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5836 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5837 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5838 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5839 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
5840 // CHECK7:       omp.inner.for.end:
5841 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5842 // CHECK7:       omp.loop.exit:
5843 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5844 // CHECK7-NEXT:    ret void
5845 //
5846 //
5847 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1
5848 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5849 // CHECK7-NEXT:  entry:
5850 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5851 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5852 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5853 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5854 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5855 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5856 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5857 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5858 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5859 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5860 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5861 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5862 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5863 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5864 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5865 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5866 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5867 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5868 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5869 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5870 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5871 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5872 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
5873 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
5874 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5875 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5876 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5877 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5878 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5879 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5880 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
5881 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5882 // CHECK7:       cond.true:
5883 // CHECK7-NEXT:    br label [[COND_END:%.*]]
5884 // CHECK7:       cond.false:
5885 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5886 // CHECK7-NEXT:    br label [[COND_END]]
5887 // CHECK7:       cond.end:
5888 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5889 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5890 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5891 // CHECK7-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5892 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5893 // CHECK7:       omp.inner.for.cond:
5894 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5895 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5896 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5897 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5898 // CHECK7:       omp.inner.for.body:
5899 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5900 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5901 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5902 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5903 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5904 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
5905 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
5906 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5907 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5908 // CHECK7:       omp.body.continue:
5909 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5910 // CHECK7:       omp.inner.for.inc:
5911 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5912 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
5913 // CHECK7-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5914 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
5915 // CHECK7:       omp.inner.for.end:
5916 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5917 // CHECK7:       omp.loop.exit:
5918 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5919 // CHECK7-NEXT:    ret void
5920 //
5921 //
5922 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
5923 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5924 // CHECK7-NEXT:  entry:
5925 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5926 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5927 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5928 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5929 // CHECK7-NEXT:    ret void
5930 //
5931 //
5932 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2
5933 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5934 // CHECK7-NEXT:  entry:
5935 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5936 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5937 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5938 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5939 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5940 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5941 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5942 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5943 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5944 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5945 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5946 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5947 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5948 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5949 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5950 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5951 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5952 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5953 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5954 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5955 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5956 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5957 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5958 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5959 // CHECK7:       cond.true:
5960 // CHECK7-NEXT:    br label [[COND_END:%.*]]
5961 // CHECK7:       cond.false:
5962 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5963 // CHECK7-NEXT:    br label [[COND_END]]
5964 // CHECK7:       cond.end:
5965 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5966 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5967 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5968 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5969 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5970 // CHECK7:       omp.inner.for.cond:
5971 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5972 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5973 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5974 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5975 // CHECK7:       omp.inner.for.body:
5976 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5977 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5978 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
5979 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5980 // CHECK7:       omp.inner.for.inc:
5981 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5982 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5983 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5984 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5985 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
5986 // CHECK7:       omp.inner.for.end:
5987 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5988 // CHECK7:       omp.loop.exit:
5989 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5990 // CHECK7-NEXT:    ret void
5991 //
5992 //
5993 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3
5994 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5995 // CHECK7-NEXT:  entry:
5996 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5997 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5998 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5999 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6000 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6001 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6002 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6003 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6004 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6005 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6006 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6007 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6008 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6009 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6010 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6011 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6012 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6013 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6014 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6015 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6016 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6017 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6018 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6019 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6020 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6021 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6022 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6023 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6024 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6025 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6026 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6027 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6028 // CHECK7:       cond.true:
6029 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6030 // CHECK7:       cond.false:
6031 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6032 // CHECK7-NEXT:    br label [[COND_END]]
6033 // CHECK7:       cond.end:
6034 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6035 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6036 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6037 // CHECK7-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6038 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6039 // CHECK7:       omp.inner.for.cond:
6040 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6041 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6042 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6043 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6044 // CHECK7:       omp.inner.for.body:
6045 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6046 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6047 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6048 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6049 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6050 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6051 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6052 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6053 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6054 // CHECK7:       omp.body.continue:
6055 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6056 // CHECK7:       omp.inner.for.inc:
6057 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6058 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6059 // CHECK7-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6060 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6061 // CHECK7:       omp.inner.for.end:
6062 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6063 // CHECK7:       omp.loop.exit:
6064 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6065 // CHECK7-NEXT:    ret void
6066 //
6067 //
6068 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
6069 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6070 // CHECK7-NEXT:  entry:
6071 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6072 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6073 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6074 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6075 // CHECK7-NEXT:    ret void
6076 //
6077 //
6078 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6
6079 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6080 // CHECK7-NEXT:  entry:
6081 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6082 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6083 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6084 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6085 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6086 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6087 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6088 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6089 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6090 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6091 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6092 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6093 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6094 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6095 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6096 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6097 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6098 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6099 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6100 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6101 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6102 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6103 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6104 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6105 // CHECK7:       cond.true:
6106 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6107 // CHECK7:       cond.false:
6108 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6109 // CHECK7-NEXT:    br label [[COND_END]]
6110 // CHECK7:       cond.end:
6111 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6112 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6113 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6114 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6115 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6116 // CHECK7:       omp.inner.for.cond:
6117 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6118 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6119 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6120 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6121 // CHECK7:       omp.inner.for.body:
6122 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6123 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6124 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6125 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6126 // CHECK7:       omp.inner.for.inc:
6127 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6128 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6129 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6130 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6131 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6132 // CHECK7:       omp.inner.for.end:
6133 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6134 // CHECK7:       omp.loop.exit:
6135 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6136 // CHECK7-NEXT:    ret void
6137 //
6138 //
6139 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7
6140 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6141 // CHECK7-NEXT:  entry:
6142 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6143 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6144 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6145 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6146 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6147 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6148 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6149 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6150 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6151 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6152 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6153 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6154 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6155 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6156 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6157 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6158 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6159 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6160 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6161 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6162 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6163 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6164 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6165 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6166 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6167 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6168 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6169 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6170 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
6171 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6172 // CHECK7:       omp.dispatch.cond:
6173 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6174 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6175 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
6176 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6177 // CHECK7:       cond.true:
6178 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6179 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6180 // CHECK7:       cond.false:
6181 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6182 // CHECK7-NEXT:    br label [[COND_END]]
6183 // CHECK7:       cond.end:
6184 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
6185 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6186 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6187 // CHECK7-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
6188 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6189 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6190 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6191 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6192 // CHECK7:       omp.dispatch.body:
6193 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6194 // CHECK7:       omp.inner.for.cond:
6195 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6196 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6197 // CHECK7-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
6198 // CHECK7-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6199 // CHECK7:       omp.inner.for.body:
6200 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6201 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
6202 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6203 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6204 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6205 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
6206 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
6207 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6208 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6209 // CHECK7:       omp.body.continue:
6210 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6211 // CHECK7:       omp.inner.for.inc:
6212 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6213 // CHECK7-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
6214 // CHECK7-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6215 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6216 // CHECK7:       omp.inner.for.end:
6217 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6218 // CHECK7:       omp.dispatch.inc:
6219 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6220 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6221 // CHECK7-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
6222 // CHECK7-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
6223 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6224 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6225 // CHECK7-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
6226 // CHECK7-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
6227 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
6228 // CHECK7:       omp.dispatch.end:
6229 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6230 // CHECK7-NEXT:    ret void
6231 //
6232 //
6233 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
6234 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6235 // CHECK7-NEXT:  entry:
6236 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6237 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6238 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6239 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6240 // CHECK7-NEXT:    ret void
6241 //
6242 //
6243 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10
6244 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6245 // CHECK7-NEXT:  entry:
6246 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6247 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6248 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6249 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6250 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6251 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6252 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6253 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6254 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6255 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6256 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6257 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6258 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6259 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6260 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6261 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6262 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6263 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6264 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6265 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6266 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6267 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6268 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6269 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6270 // CHECK7:       cond.true:
6271 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6272 // CHECK7:       cond.false:
6273 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6274 // CHECK7-NEXT:    br label [[COND_END]]
6275 // CHECK7:       cond.end:
6276 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6277 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6278 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6279 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6280 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6281 // CHECK7:       omp.inner.for.cond:
6282 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6283 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6284 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6285 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6286 // CHECK7:       omp.inner.for.body:
6287 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6288 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6289 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6290 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6291 // CHECK7:       omp.inner.for.inc:
6292 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6293 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6294 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6295 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6296 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6297 // CHECK7:       omp.inner.for.end:
6298 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6299 // CHECK7:       omp.loop.exit:
6300 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6301 // CHECK7-NEXT:    ret void
6302 //
6303 //
6304 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11
6305 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6306 // CHECK7-NEXT:  entry:
6307 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6308 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6309 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6310 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6311 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6312 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6313 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6314 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6315 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6316 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6317 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6318 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6319 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6320 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6321 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6322 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6323 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6324 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6325 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6326 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6327 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6328 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6329 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6330 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6331 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6332 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6333 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6334 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6335 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6336 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6337 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
6338 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6339 // CHECK7:       omp.dispatch.cond:
6340 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6341 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6342 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6343 // CHECK7:       omp.dispatch.body:
6344 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6345 // CHECK7-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6346 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6347 // CHECK7:       omp.inner.for.cond:
6348 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6349 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
6350 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6351 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6352 // CHECK7:       omp.inner.for.body:
6353 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6354 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6355 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6356 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
6357 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6358 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
6359 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
6360 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
6361 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6362 // CHECK7:       omp.body.continue:
6363 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6364 // CHECK7:       omp.inner.for.inc:
6365 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6366 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
6367 // CHECK7-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
6368 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
6369 // CHECK7:       omp.inner.for.end:
6370 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6371 // CHECK7:       omp.dispatch.inc:
6372 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
6373 // CHECK7:       omp.dispatch.end:
6374 // CHECK7-NEXT:    ret void
6375 //
6376 //
6377 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
6378 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6379 // CHECK7-NEXT:  entry:
6380 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6381 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6382 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6383 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6384 // CHECK7-NEXT:    ret void
6385 //
6386 //
6387 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14
6388 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6389 // CHECK7-NEXT:  entry:
6390 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6391 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6392 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6393 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6394 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6395 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6396 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6397 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6398 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6399 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6400 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6401 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6402 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6403 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6404 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6405 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6406 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6407 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6408 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6409 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6410 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6411 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6412 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6413 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6414 // CHECK7:       cond.true:
6415 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6416 // CHECK7:       cond.false:
6417 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6418 // CHECK7-NEXT:    br label [[COND_END]]
6419 // CHECK7:       cond.end:
6420 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6421 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6422 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6423 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6424 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6425 // CHECK7:       omp.inner.for.cond:
6426 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6427 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6428 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6429 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6430 // CHECK7:       omp.inner.for.body:
6431 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6432 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6433 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6434 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6435 // CHECK7:       omp.inner.for.inc:
6436 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6437 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6438 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6439 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6440 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6441 // CHECK7:       omp.inner.for.end:
6442 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6443 // CHECK7:       omp.loop.exit:
6444 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6445 // CHECK7-NEXT:    ret void
6446 //
6447 //
6448 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15
6449 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6450 // CHECK7-NEXT:  entry:
6451 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6452 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6453 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6454 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6455 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6456 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6457 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6458 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6459 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6460 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6461 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6462 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6463 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6464 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6465 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6466 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6467 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6468 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6469 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6470 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6471 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6472 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6473 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6474 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6475 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6476 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6477 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6478 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6479 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6480 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6481 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
6482 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6483 // CHECK7:       omp.dispatch.cond:
6484 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6485 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6486 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6487 // CHECK7:       omp.dispatch.body:
6488 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6489 // CHECK7-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6490 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6491 // CHECK7:       omp.inner.for.cond:
6492 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
6493 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
6494 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6495 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6496 // CHECK7:       omp.inner.for.body:
6497 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
6498 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6499 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6500 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
6501 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6502 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
6503 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
6504 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
6505 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6506 // CHECK7:       omp.body.continue:
6507 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6508 // CHECK7:       omp.inner.for.inc:
6509 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
6510 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
6511 // CHECK7-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
6512 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
6513 // CHECK7:       omp.inner.for.end:
6514 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6515 // CHECK7:       omp.dispatch.inc:
6516 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
6517 // CHECK7:       omp.dispatch.end:
6518 // CHECK7-NEXT:    ret void
6519 //
6520 //
6521 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6522 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] {
6523 // CHECK7-NEXT:  entry:
6524 // CHECK7-NEXT:    call void @__tgt_register_requires(i64 1)
6525 // CHECK7-NEXT:    ret void
6526 //
6527 //
6528 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv
6529 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
6530 // CHECK8-NEXT:  entry:
6531 // CHECK8-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
6532 // CHECK8-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
6533 // CHECK8-NEXT:    ret i32 [[CALL]]
6534 //
6535 //
6536 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
6537 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
6538 // CHECK8-NEXT:  entry:
6539 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6540 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
6541 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
6542 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
6543 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6544 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
6545 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
6546 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
6547 // CHECK8-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
6548 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
6549 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
6550 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
6551 // CHECK8-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
6552 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
6553 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
6554 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
6555 // CHECK8-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
6556 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
6557 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
6558 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
6559 // CHECK8-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
6560 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6561 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6562 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
6563 // CHECK8-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6564 // CHECK8-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
6565 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
6566 // CHECK8-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6567 // CHECK8-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
6568 // CHECK8-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
6569 // CHECK8-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6570 // CHECK8-NEXT:    store i8* null, i8** [[TMP4]], align 4
6571 // CHECK8-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6572 // CHECK8-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6573 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
6574 // CHECK8-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6575 // CHECK8-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
6576 // CHECK8-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6577 // CHECK8:       omp_offload.failed:
6578 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
6579 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6580 // CHECK8:       omp_offload.cont:
6581 // CHECK8-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6582 // CHECK8-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
6583 // CHECK8-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
6584 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
6585 // CHECK8-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
6586 // CHECK8-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
6587 // CHECK8-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
6588 // CHECK8-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
6589 // CHECK8-NEXT:    store i8* null, i8** [[TMP13]], align 4
6590 // CHECK8-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
6591 // CHECK8-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
6592 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6593 // CHECK8-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6594 // CHECK8-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
6595 // CHECK8-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
6596 // CHECK8:       omp_offload.failed7:
6597 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
6598 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
6599 // CHECK8:       omp_offload.cont8:
6600 // CHECK8-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6601 // CHECK8-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
6602 // CHECK8-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
6603 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
6604 // CHECK8-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
6605 // CHECK8-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
6606 // CHECK8-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
6607 // CHECK8-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
6608 // CHECK8-NEXT:    store i8* null, i8** [[TMP22]], align 4
6609 // CHECK8-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
6610 // CHECK8-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
6611 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6612 // CHECK8-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6613 // CHECK8-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
6614 // CHECK8-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
6615 // CHECK8:       omp_offload.failed14:
6616 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
6617 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
6618 // CHECK8:       omp_offload.cont15:
6619 // CHECK8-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6620 // CHECK8-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
6621 // CHECK8-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
6622 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
6623 // CHECK8-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
6624 // CHECK8-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
6625 // CHECK8-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
6626 // CHECK8-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
6627 // CHECK8-NEXT:    store i8* null, i8** [[TMP31]], align 4
6628 // CHECK8-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
6629 // CHECK8-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
6630 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6631 // CHECK8-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6632 // CHECK8-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
6633 // CHECK8-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
6634 // CHECK8:       omp_offload.failed21:
6635 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
6636 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
6637 // CHECK8:       omp_offload.cont22:
6638 // CHECK8-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6639 // CHECK8-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6640 // CHECK8-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
6641 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
6642 // CHECK8-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6643 // CHECK8-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
6644 // CHECK8-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
6645 // CHECK8-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
6646 // CHECK8-NEXT:    store i8* null, i8** [[TMP40]], align 4
6647 // CHECK8-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6648 // CHECK8-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6649 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6650 // CHECK8-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6651 // CHECK8-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
6652 // CHECK8-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
6653 // CHECK8:       omp_offload.failed28:
6654 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
6655 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
6656 // CHECK8:       omp_offload.cont29:
6657 // CHECK8-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6658 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
6659 // CHECK8-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
6660 // CHECK8-NEXT:    ret i32 [[TMP45]]
6661 //
6662 //
6663 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
6664 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
6665 // CHECK8-NEXT:  entry:
6666 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6667 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6668 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6669 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6670 // CHECK8-NEXT:    ret void
6671 //
6672 //
6673 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined.
6674 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6675 // CHECK8-NEXT:  entry:
6676 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6677 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6678 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6679 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6680 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6681 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6682 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6683 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6684 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6685 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6686 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6687 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6688 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6689 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6690 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6691 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6692 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6693 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6694 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6695 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6696 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6697 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6698 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6699 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6700 // CHECK8:       cond.true:
6701 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6702 // CHECK8:       cond.false:
6703 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6704 // CHECK8-NEXT:    br label [[COND_END]]
6705 // CHECK8:       cond.end:
6706 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6707 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6708 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6709 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6710 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6711 // CHECK8:       omp.inner.for.cond:
6712 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6713 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6714 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6715 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6716 // CHECK8:       omp.inner.for.body:
6717 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6718 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6719 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6720 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6721 // CHECK8:       omp.inner.for.inc:
6722 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6723 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6724 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6725 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6726 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6727 // CHECK8:       omp.inner.for.end:
6728 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6729 // CHECK8:       omp.loop.exit:
6730 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6731 // CHECK8-NEXT:    ret void
6732 //
6733 //
6734 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1
6735 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6736 // CHECK8-NEXT:  entry:
6737 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6738 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6739 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6740 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6741 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6742 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6743 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6744 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6745 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6746 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6747 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6748 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6749 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6750 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6751 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6752 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6753 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6754 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6755 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6756 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6757 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6758 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6759 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6760 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6761 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6762 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6763 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6764 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6765 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6766 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6767 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6768 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6769 // CHECK8:       cond.true:
6770 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6771 // CHECK8:       cond.false:
6772 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6773 // CHECK8-NEXT:    br label [[COND_END]]
6774 // CHECK8:       cond.end:
6775 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6776 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6777 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6778 // CHECK8-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6779 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6780 // CHECK8:       omp.inner.for.cond:
6781 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6782 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6783 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6784 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6785 // CHECK8:       omp.inner.for.body:
6786 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6787 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6788 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6789 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6790 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6791 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6792 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6793 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6794 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6795 // CHECK8:       omp.body.continue:
6796 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6797 // CHECK8:       omp.inner.for.inc:
6798 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6799 // CHECK8-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6800 // CHECK8-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6801 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6802 // CHECK8:       omp.inner.for.end:
6803 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6804 // CHECK8:       omp.loop.exit:
6805 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6806 // CHECK8-NEXT:    ret void
6807 //
6808 //
6809 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
6810 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6811 // CHECK8-NEXT:  entry:
6812 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6813 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6814 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6815 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6816 // CHECK8-NEXT:    ret void
6817 //
6818 //
6819 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2
6820 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6821 // CHECK8-NEXT:  entry:
6822 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6823 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6824 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6825 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6826 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6827 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6828 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6829 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6830 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6831 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6832 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6833 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6834 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6835 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6836 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6837 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6838 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6839 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6840 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6841 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6842 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6843 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6844 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6845 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6846 // CHECK8:       cond.true:
6847 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6848 // CHECK8:       cond.false:
6849 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6850 // CHECK8-NEXT:    br label [[COND_END]]
6851 // CHECK8:       cond.end:
6852 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6853 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6854 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6855 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6856 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6857 // CHECK8:       omp.inner.for.cond:
6858 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6859 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6860 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6861 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6862 // CHECK8:       omp.inner.for.body:
6863 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6864 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6865 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6866 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6867 // CHECK8:       omp.inner.for.inc:
6868 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6869 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6870 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6871 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6872 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6873 // CHECK8:       omp.inner.for.end:
6874 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6875 // CHECK8:       omp.loop.exit:
6876 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6877 // CHECK8-NEXT:    ret void
6878 //
6879 //
6880 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3
6881 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6882 // CHECK8-NEXT:  entry:
6883 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6884 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6885 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6886 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6887 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6888 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6889 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6890 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6891 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6892 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6893 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6894 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6895 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6896 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6897 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6898 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6899 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6900 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6901 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6902 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6903 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6904 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6905 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6906 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6907 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6908 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6909 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6910 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6911 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6912 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6913 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6914 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6915 // CHECK8:       cond.true:
6916 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6917 // CHECK8:       cond.false:
6918 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6919 // CHECK8-NEXT:    br label [[COND_END]]
6920 // CHECK8:       cond.end:
6921 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6922 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6923 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6924 // CHECK8-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6925 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6926 // CHECK8:       omp.inner.for.cond:
6927 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6928 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6929 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6930 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6931 // CHECK8:       omp.inner.for.body:
6932 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6933 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6934 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6935 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6936 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6937 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6938 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6939 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6940 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6941 // CHECK8:       omp.body.continue:
6942 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6943 // CHECK8:       omp.inner.for.inc:
6944 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6945 // CHECK8-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6946 // CHECK8-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6947 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6948 // CHECK8:       omp.inner.for.end:
6949 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6950 // CHECK8:       omp.loop.exit:
6951 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6952 // CHECK8-NEXT:    ret void
6953 //
6954 //
6955 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
6956 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6957 // CHECK8-NEXT:  entry:
6958 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6959 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6960 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6961 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6962 // CHECK8-NEXT:    ret void
6963 //
6964 //
6965 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..6
6966 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6967 // CHECK8-NEXT:  entry:
6968 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6969 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6970 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6971 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6972 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6973 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6974 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6975 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6976 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6977 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6978 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6979 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6980 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6981 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6982 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6983 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6984 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6985 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6986 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6987 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6988 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6989 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6990 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6991 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6992 // CHECK8:       cond.true:
6993 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6994 // CHECK8:       cond.false:
6995 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6996 // CHECK8-NEXT:    br label [[COND_END]]
6997 // CHECK8:       cond.end:
6998 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6999 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7000 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7001 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7002 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7003 // CHECK8:       omp.inner.for.cond:
7004 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7005 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7006 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7007 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7008 // CHECK8:       omp.inner.for.body:
7009 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7010 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7011 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
7012 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7013 // CHECK8:       omp.inner.for.inc:
7014 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7015 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7016 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7017 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7018 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7019 // CHECK8:       omp.inner.for.end:
7020 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7021 // CHECK8:       omp.loop.exit:
7022 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7023 // CHECK8-NEXT:    ret void
7024 //
7025 //
7026 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..7
7027 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7028 // CHECK8-NEXT:  entry:
7029 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7030 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7031 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7032 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7033 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7034 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7035 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7036 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7037 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7038 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7039 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7040 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7041 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7042 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7043 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7044 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7045 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7046 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7047 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7048 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
7049 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7050 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7051 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7052 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7053 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7054 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7055 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7056 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7057 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
7058 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
7059 // CHECK8:       omp.dispatch.cond:
7060 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7061 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7062 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
7063 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7064 // CHECK8:       cond.true:
7065 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7066 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7067 // CHECK8:       cond.false:
7068 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7069 // CHECK8-NEXT:    br label [[COND_END]]
7070 // CHECK8:       cond.end:
7071 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
7072 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7073 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7074 // CHECK8-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
7075 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7076 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7077 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
7078 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7079 // CHECK8:       omp.dispatch.body:
7080 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7081 // CHECK8:       omp.inner.for.cond:
7082 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7083 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7084 // CHECK8-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7085 // CHECK8-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7086 // CHECK8:       omp.inner.for.body:
7087 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7088 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
7089 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7090 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7091 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7092 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
7093 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
7094 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
7095 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7096 // CHECK8:       omp.body.continue:
7097 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7098 // CHECK8:       omp.inner.for.inc:
7099 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7100 // CHECK8-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
7101 // CHECK8-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7102 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7103 // CHECK8:       omp.inner.for.end:
7104 // CHECK8-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
7105 // CHECK8:       omp.dispatch.inc:
7106 // CHECK8-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7107 // CHECK8-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7108 // CHECK8-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
7109 // CHECK8-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
7110 // CHECK8-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7111 // CHECK8-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7112 // CHECK8-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
7113 // CHECK8-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
7114 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND]]
7115 // CHECK8:       omp.dispatch.end:
7116 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7117 // CHECK8-NEXT:    ret void
7118 //
7119 //
7120 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
7121 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7122 // CHECK8-NEXT:  entry:
7123 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7124 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7125 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7126 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7127 // CHECK8-NEXT:    ret void
7128 //
7129 //
7130 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..10
7131 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7132 // CHECK8-NEXT:  entry:
7133 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7134 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7135 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7136 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7137 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7138 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7139 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7140 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7141 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7142 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7143 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7144 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7145 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7146 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7147 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7148 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7149 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7150 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7151 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7152 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7153 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7154 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7155 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7156 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7157 // CHECK8:       cond.true:
7158 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7159 // CHECK8:       cond.false:
7160 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7161 // CHECK8-NEXT:    br label [[COND_END]]
7162 // CHECK8:       cond.end:
7163 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7164 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7165 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7166 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7167 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7168 // CHECK8:       omp.inner.for.cond:
7169 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7170 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7171 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7172 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7173 // CHECK8:       omp.inner.for.body:
7174 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7175 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7176 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
7177 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7178 // CHECK8:       omp.inner.for.inc:
7179 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7180 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7181 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7182 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7183 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7184 // CHECK8:       omp.inner.for.end:
7185 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7186 // CHECK8:       omp.loop.exit:
7187 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7188 // CHECK8-NEXT:    ret void
7189 //
7190 //
7191 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..11
7192 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7193 // CHECK8-NEXT:  entry:
7194 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7195 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7196 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7197 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7198 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7199 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7200 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7201 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7202 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7203 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7204 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7205 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7206 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7207 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7208 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7209 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7210 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7211 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7212 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7213 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
7214 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7215 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7216 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7217 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7218 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7219 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7220 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7221 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7222 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7223 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7224 // CHECK8-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
7225 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
7226 // CHECK8:       omp.dispatch.cond:
7227 // CHECK8-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7228 // CHECK8-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
7229 // CHECK8-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7230 // CHECK8:       omp.dispatch.body:
7231 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7232 // CHECK8-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7233 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7234 // CHECK8:       omp.inner.for.cond:
7235 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
7236 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
7237 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7238 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7239 // CHECK8:       omp.inner.for.body:
7240 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
7241 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7242 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7243 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
7244 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7245 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
7246 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
7247 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
7248 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7249 // CHECK8:       omp.body.continue:
7250 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7251 // CHECK8:       omp.inner.for.inc:
7252 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
7253 // CHECK8-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
7254 // CHECK8-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
7255 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
7256 // CHECK8:       omp.inner.for.end:
7257 // CHECK8-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
7258 // CHECK8:       omp.dispatch.inc:
7259 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND]]
7260 // CHECK8:       omp.dispatch.end:
7261 // CHECK8-NEXT:    ret void
7262 //
7263 //
7264 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
7265 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7266 // CHECK8-NEXT:  entry:
7267 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7268 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7269 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7270 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7271 // CHECK8-NEXT:    ret void
7272 //
7273 //
7274 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..14
7275 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7276 // CHECK8-NEXT:  entry:
7277 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7278 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7279 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7280 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7281 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7282 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7283 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7284 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7285 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7286 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7287 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7288 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7289 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7290 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7291 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7292 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7293 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7294 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7295 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7296 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7297 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7298 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7299 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7300 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7301 // CHECK8:       cond.true:
7302 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7303 // CHECK8:       cond.false:
7304 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7305 // CHECK8-NEXT:    br label [[COND_END]]
7306 // CHECK8:       cond.end:
7307 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7308 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7309 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7310 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7311 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7312 // CHECK8:       omp.inner.for.cond:
7313 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7314 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7315 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7316 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7317 // CHECK8:       omp.inner.for.body:
7318 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7319 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7320 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
7321 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7322 // CHECK8:       omp.inner.for.inc:
7323 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7324 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7325 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7326 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7327 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7328 // CHECK8:       omp.inner.for.end:
7329 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7330 // CHECK8:       omp.loop.exit:
7331 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7332 // CHECK8-NEXT:    ret void
7333 //
7334 //
7335 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..15
7336 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7337 // CHECK8-NEXT:  entry:
7338 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7339 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7340 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7341 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7342 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7343 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7344 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7345 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7346 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7347 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7348 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7349 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7350 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7351 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7352 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7353 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7354 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7355 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7356 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7357 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
7358 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7359 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7360 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7361 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7362 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7363 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7364 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7365 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7366 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7367 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7368 // CHECK8-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
7369 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
7370 // CHECK8:       omp.dispatch.cond:
7371 // CHECK8-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7372 // CHECK8-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
7373 // CHECK8-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7374 // CHECK8:       omp.dispatch.body:
7375 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7376 // CHECK8-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7377 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7378 // CHECK8:       omp.inner.for.cond:
7379 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
7380 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
7381 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7382 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7383 // CHECK8:       omp.inner.for.body:
7384 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
7385 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7386 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7387 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
7388 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7389 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
7390 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
7391 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
7392 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7393 // CHECK8:       omp.body.continue:
7394 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7395 // CHECK8:       omp.inner.for.inc:
7396 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
7397 // CHECK8-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
7398 // CHECK8-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
7399 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
7400 // CHECK8:       omp.inner.for.end:
7401 // CHECK8-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
7402 // CHECK8:       omp.dispatch.inc:
7403 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND]]
7404 // CHECK8:       omp.dispatch.end:
7405 // CHECK8-NEXT:    ret void
7406 //
7407 //
7408 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7409 // CHECK8-SAME: () #[[ATTR3:[0-9]+]] {
7410 // CHECK8-NEXT:  entry:
7411 // CHECK8-NEXT:    call void @__tgt_register_requires(i64 1)
7412 // CHECK8-NEXT:    ret void
7413 //
7414 //
7415 // CHECK13-LABEL: define {{[^@]+}}@main
7416 // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
7417 // CHECK13-NEXT:  entry:
7418 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7419 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
7420 // CHECK13-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
7421 // CHECK13-NEXT:    [[N:%.*]] = alloca i32, align 4
7422 // CHECK13-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
7423 // CHECK13-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
7424 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
7425 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
7426 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
7427 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
7428 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
7429 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
7430 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7431 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7432 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7433 // CHECK13-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
7434 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
7435 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
7436 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
7437 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
7438 // CHECK13-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
7439 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
7440 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
7441 // CHECK13-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
7442 // CHECK13-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
7443 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
7444 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
7445 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
7446 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
7447 // CHECK13-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
7448 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
7449 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
7450 // CHECK13-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
7451 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
7452 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
7453 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
7454 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
7455 // CHECK13-NEXT:    [[_TMP40:%.*]] = alloca i32, align 4
7456 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
7457 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
7458 // CHECK13-NEXT:    [[M_CASTED49:%.*]] = alloca i64, align 8
7459 // CHECK13-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
7460 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
7461 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
7462 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
7463 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
7464 // CHECK13-NEXT:    [[_TMP57:%.*]] = alloca i32, align 4
7465 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
7466 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
7467 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
7468 // CHECK13-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7469 // CHECK13-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
7470 // CHECK13-NEXT:    store i32 100, i32* [[N]], align 4
7471 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
7472 // CHECK13-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
7473 // CHECK13-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
7474 // CHECK13-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
7475 // CHECK13-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
7476 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
7477 // CHECK13-NEXT:    store i32 10, i32* [[M]], align 4
7478 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
7479 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
7480 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
7481 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
7482 // CHECK13-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
7483 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7484 // CHECK13-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
7485 // CHECK13-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
7486 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7487 // CHECK13-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
7488 // CHECK13-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
7489 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7490 // CHECK13-NEXT:    store i64 4, i64* [[TMP10]], align 8
7491 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7492 // CHECK13-NEXT:    store i8* null, i8** [[TMP11]], align 8
7493 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7494 // CHECK13-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
7495 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
7496 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7497 // CHECK13-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
7498 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
7499 // CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
7500 // CHECK13-NEXT:    store i64 8, i64* [[TMP16]], align 8
7501 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
7502 // CHECK13-NEXT:    store i8* null, i8** [[TMP17]], align 8
7503 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7504 // CHECK13-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
7505 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
7506 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7507 // CHECK13-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
7508 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
7509 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
7510 // CHECK13-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
7511 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
7512 // CHECK13-NEXT:    store i8* null, i8** [[TMP23]], align 8
7513 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7514 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7515 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7516 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
7517 // CHECK13-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
7518 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7519 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
7520 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7521 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7522 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7523 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7524 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
7525 // CHECK13-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
7526 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
7527 // CHECK13-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7528 // CHECK13-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
7529 // CHECK13-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7530 // CHECK13:       omp_offload.failed:
7531 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
7532 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7533 // CHECK13:       omp_offload.cont:
7534 // CHECK13-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
7535 // CHECK13-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
7536 // CHECK13-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
7537 // CHECK13-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
7538 // CHECK13-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
7539 // CHECK13-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
7540 // CHECK13-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
7541 // CHECK13-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
7542 // CHECK13-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
7543 // CHECK13-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
7544 // CHECK13-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
7545 // CHECK13-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
7546 // CHECK13-NEXT:    store i64 4, i64* [[TMP40]], align 8
7547 // CHECK13-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
7548 // CHECK13-NEXT:    store i8* null, i8** [[TMP41]], align 8
7549 // CHECK13-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
7550 // CHECK13-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
7551 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
7552 // CHECK13-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
7553 // CHECK13-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
7554 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
7555 // CHECK13-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
7556 // CHECK13-NEXT:    store i64 8, i64* [[TMP46]], align 8
7557 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
7558 // CHECK13-NEXT:    store i8* null, i8** [[TMP47]], align 8
7559 // CHECK13-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
7560 // CHECK13-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
7561 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
7562 // CHECK13-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
7563 // CHECK13-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
7564 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
7565 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
7566 // CHECK13-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
7567 // CHECK13-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
7568 // CHECK13-NEXT:    store i8* null, i8** [[TMP53]], align 8
7569 // CHECK13-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
7570 // CHECK13-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
7571 // CHECK13-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
7572 // CHECK13-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
7573 // CHECK13-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
7574 // CHECK13-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
7575 // CHECK13-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
7576 // CHECK13-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
7577 // CHECK13-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
7578 // CHECK13-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
7579 // CHECK13-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
7580 // CHECK13-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
7581 // CHECK13-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
7582 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
7583 // CHECK13-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7584 // CHECK13-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
7585 // CHECK13-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
7586 // CHECK13:       omp_offload.failed16:
7587 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
7588 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
7589 // CHECK13:       omp_offload.cont17:
7590 // CHECK13-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
7591 // CHECK13-NEXT:    [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
7592 // CHECK13-NEXT:    store i32 [[TMP63]], i32* [[CONV18]], align 4
7593 // CHECK13-NEXT:    [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
7594 // CHECK13-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
7595 // CHECK13-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
7596 // CHECK13-NEXT:    store i32 [[TMP65]], i32* [[CONV20]], align 4
7597 // CHECK13-NEXT:    [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
7598 // CHECK13-NEXT:    [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
7599 // CHECK13-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
7600 // CHECK13-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
7601 // CHECK13-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
7602 // CHECK13-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
7603 // CHECK13-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
7604 // CHECK13-NEXT:    store i64 [[TMP64]], i64* [[TMP71]], align 8
7605 // CHECK13-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
7606 // CHECK13-NEXT:    store i64 4, i64* [[TMP72]], align 8
7607 // CHECK13-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
7608 // CHECK13-NEXT:    store i8* null, i8** [[TMP73]], align 8
7609 // CHECK13-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
7610 // CHECK13-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
7611 // CHECK13-NEXT:    store i64 [[TMP66]], i64* [[TMP75]], align 8
7612 // CHECK13-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
7613 // CHECK13-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
7614 // CHECK13-NEXT:    store i64 [[TMP66]], i64* [[TMP77]], align 8
7615 // CHECK13-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
7616 // CHECK13-NEXT:    store i64 4, i64* [[TMP78]], align 8
7617 // CHECK13-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
7618 // CHECK13-NEXT:    store i8* null, i8** [[TMP79]], align 8
7619 // CHECK13-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
7620 // CHECK13-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
7621 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP81]], align 8
7622 // CHECK13-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
7623 // CHECK13-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
7624 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP83]], align 8
7625 // CHECK13-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
7626 // CHECK13-NEXT:    store i64 8, i64* [[TMP84]], align 8
7627 // CHECK13-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
7628 // CHECK13-NEXT:    store i8* null, i8** [[TMP85]], align 8
7629 // CHECK13-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
7630 // CHECK13-NEXT:    [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
7631 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP87]], align 8
7632 // CHECK13-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
7633 // CHECK13-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
7634 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 8
7635 // CHECK13-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
7636 // CHECK13-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
7637 // CHECK13-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
7638 // CHECK13-NEXT:    store i8* null, i8** [[TMP91]], align 8
7639 // CHECK13-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
7640 // CHECK13-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
7641 // CHECK13-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
7642 // CHECK13-NEXT:    [[TMP95:%.*]] = load i32, i32* [[N]], align 4
7643 // CHECK13-NEXT:    store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
7644 // CHECK13-NEXT:    [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
7645 // CHECK13-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
7646 // CHECK13-NEXT:    [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
7647 // CHECK13-NEXT:    [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
7648 // CHECK13-NEXT:    store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
7649 // CHECK13-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
7650 // CHECK13-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
7651 // CHECK13-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
7652 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
7653 // CHECK13-NEXT:    [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7654 // CHECK13-NEXT:    [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
7655 // CHECK13-NEXT:    br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
7656 // CHECK13:       omp_offload.failed32:
7657 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
7658 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
7659 // CHECK13:       omp_offload.cont33:
7660 // CHECK13-NEXT:    [[TMP101:%.*]] = load i32, i32* [[N]], align 4
7661 // CHECK13-NEXT:    [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
7662 // CHECK13-NEXT:    store i32 [[TMP101]], i32* [[CONV35]], align 4
7663 // CHECK13-NEXT:    [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
7664 // CHECK13-NEXT:    [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
7665 // CHECK13-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
7666 // CHECK13-NEXT:    [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
7667 // CHECK13-NEXT:    store i64 [[TMP102]], i64* [[TMP105]], align 8
7668 // CHECK13-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
7669 // CHECK13-NEXT:    [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
7670 // CHECK13-NEXT:    store i64 [[TMP102]], i64* [[TMP107]], align 8
7671 // CHECK13-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
7672 // CHECK13-NEXT:    store i64 4, i64* [[TMP108]], align 8
7673 // CHECK13-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
7674 // CHECK13-NEXT:    store i8* null, i8** [[TMP109]], align 8
7675 // CHECK13-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
7676 // CHECK13-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
7677 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP111]], align 8
7678 // CHECK13-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
7679 // CHECK13-NEXT:    [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
7680 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP113]], align 8
7681 // CHECK13-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
7682 // CHECK13-NEXT:    store i64 8, i64* [[TMP114]], align 8
7683 // CHECK13-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
7684 // CHECK13-NEXT:    store i8* null, i8** [[TMP115]], align 8
7685 // CHECK13-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
7686 // CHECK13-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
7687 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP117]], align 8
7688 // CHECK13-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
7689 // CHECK13-NEXT:    [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
7690 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP119]], align 8
7691 // CHECK13-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
7692 // CHECK13-NEXT:    store i64 [[TMP103]], i64* [[TMP120]], align 8
7693 // CHECK13-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
7694 // CHECK13-NEXT:    store i8* null, i8** [[TMP121]], align 8
7695 // CHECK13-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
7696 // CHECK13-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
7697 // CHECK13-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
7698 // CHECK13-NEXT:    [[TMP125:%.*]] = load i32, i32* [[N]], align 4
7699 // CHECK13-NEXT:    store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
7700 // CHECK13-NEXT:    [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
7701 // CHECK13-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
7702 // CHECK13-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
7703 // CHECK13-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
7704 // CHECK13-NEXT:    store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
7705 // CHECK13-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
7706 // CHECK13-NEXT:    [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
7707 // CHECK13-NEXT:    [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
7708 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
7709 // CHECK13-NEXT:    [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7710 // CHECK13-NEXT:    [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
7711 // CHECK13-NEXT:    br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
7712 // CHECK13:       omp_offload.failed47:
7713 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
7714 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
7715 // CHECK13:       omp_offload.cont48:
7716 // CHECK13-NEXT:    [[TMP131:%.*]] = load i32, i32* [[M]], align 4
7717 // CHECK13-NEXT:    [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
7718 // CHECK13-NEXT:    store i32 [[TMP131]], i32* [[CONV50]], align 4
7719 // CHECK13-NEXT:    [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
7720 // CHECK13-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
7721 // CHECK13-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
7722 // CHECK13-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
7723 // CHECK13-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
7724 // CHECK13-NEXT:    [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
7725 // CHECK13-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
7726 // CHECK13-NEXT:    [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
7727 // CHECK13-NEXT:    store i64 [[TMP132]], i64* [[TMP137]], align 8
7728 // CHECK13-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
7729 // CHECK13-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
7730 // CHECK13-NEXT:    store i64 [[TMP132]], i64* [[TMP139]], align 8
7731 // CHECK13-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
7732 // CHECK13-NEXT:    store i64 4, i64* [[TMP140]], align 8
7733 // CHECK13-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
7734 // CHECK13-NEXT:    store i8* null, i8** [[TMP141]], align 8
7735 // CHECK13-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
7736 // CHECK13-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
7737 // CHECK13-NEXT:    store i64 [[TMP134]], i64* [[TMP143]], align 8
7738 // CHECK13-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
7739 // CHECK13-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
7740 // CHECK13-NEXT:    store i64 [[TMP134]], i64* [[TMP145]], align 8
7741 // CHECK13-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
7742 // CHECK13-NEXT:    store i64 4, i64* [[TMP146]], align 8
7743 // CHECK13-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
7744 // CHECK13-NEXT:    store i8* null, i8** [[TMP147]], align 8
7745 // CHECK13-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
7746 // CHECK13-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
7747 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP149]], align 8
7748 // CHECK13-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
7749 // CHECK13-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
7750 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP151]], align 8
7751 // CHECK13-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
7752 // CHECK13-NEXT:    store i64 8, i64* [[TMP152]], align 8
7753 // CHECK13-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
7754 // CHECK13-NEXT:    store i8* null, i8** [[TMP153]], align 8
7755 // CHECK13-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
7756 // CHECK13-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
7757 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 8
7758 // CHECK13-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
7759 // CHECK13-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
7760 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 8
7761 // CHECK13-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
7762 // CHECK13-NEXT:    store i64 [[TMP135]], i64* [[TMP158]], align 8
7763 // CHECK13-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
7764 // CHECK13-NEXT:    store i8* null, i8** [[TMP159]], align 8
7765 // CHECK13-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
7766 // CHECK13-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
7767 // CHECK13-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
7768 // CHECK13-NEXT:    [[TMP163:%.*]] = load i32, i32* [[N]], align 4
7769 // CHECK13-NEXT:    store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
7770 // CHECK13-NEXT:    [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
7771 // CHECK13-NEXT:    [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
7772 // CHECK13-NEXT:    [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
7773 // CHECK13-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
7774 // CHECK13-NEXT:    store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
7775 // CHECK13-NEXT:    [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
7776 // CHECK13-NEXT:    [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
7777 // CHECK13-NEXT:    [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
7778 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
7779 // CHECK13-NEXT:    [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
7780 // CHECK13-NEXT:    [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
7781 // CHECK13-NEXT:    br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
7782 // CHECK13:       omp_offload.failed64:
7783 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
7784 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
7785 // CHECK13:       omp_offload.cont65:
7786 // CHECK13-NEXT:    [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7787 // CHECK13-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
7788 // CHECK13-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
7789 // CHECK13-NEXT:    [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
7790 // CHECK13-NEXT:    call void @llvm.stackrestore(i8* [[TMP170]])
7791 // CHECK13-NEXT:    [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
7792 // CHECK13-NEXT:    ret i32 [[TMP171]]
7793 //
7794 //
7795 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
7796 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
7797 // CHECK13-NEXT:  entry:
7798 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
7799 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
7800 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
7801 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
7802 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7803 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
7804 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
7805 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7806 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7807 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
7808 // CHECK13-NEXT:    ret void
7809 //
7810 //
7811 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
7812 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7813 // CHECK13-NEXT:  entry:
7814 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7815 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7816 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
7817 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
7818 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
7819 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7820 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7821 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7822 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7823 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7824 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7825 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7826 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7827 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7828 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
7829 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7830 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7831 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
7832 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7833 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
7834 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
7835 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7836 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7837 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7838 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
7839 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7840 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7841 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7842 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7843 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7844 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
7845 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7846 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7847 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7848 // CHECK13:       omp.precond.then:
7849 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7850 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7851 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
7852 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7853 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7854 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7855 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7856 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7857 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7858 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7859 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7860 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7861 // CHECK13:       cond.true:
7862 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7863 // CHECK13-NEXT:    br label [[COND_END:%.*]]
7864 // CHECK13:       cond.false:
7865 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7866 // CHECK13-NEXT:    br label [[COND_END]]
7867 // CHECK13:       cond.end:
7868 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7869 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7870 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7871 // CHECK13-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7872 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7873 // CHECK13:       omp.inner.for.cond:
7874 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7875 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7876 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
7877 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7878 // CHECK13:       omp.inner.for.body:
7879 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7880 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
7881 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7882 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
7883 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
7884 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7885 // CHECK13:       omp.inner.for.inc:
7886 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7887 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7888 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
7889 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7890 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
7891 // CHECK13:       omp.inner.for.end:
7892 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7893 // CHECK13:       omp.loop.exit:
7894 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7895 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
7896 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
7897 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
7898 // CHECK13:       omp.precond.end:
7899 // CHECK13-NEXT:    ret void
7900 //
7901 //
7902 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
7903 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7904 // CHECK13-NEXT:  entry:
7905 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7906 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7907 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7908 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7909 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
7910 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
7911 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
7912 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7913 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7914 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7915 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7916 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7917 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7918 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7919 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7920 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7921 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
7922 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7923 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7924 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7925 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7926 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
7927 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
7928 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
7929 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
7930 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
7931 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
7932 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7933 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
7934 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7935 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7936 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7937 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7938 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7939 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
7940 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7941 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7942 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7943 // CHECK13:       omp.precond.then:
7944 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7945 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7946 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
7947 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7948 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
7949 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7950 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
7951 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7952 // CHECK13-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
7953 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7954 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7955 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7956 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
7957 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7958 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7959 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7960 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
7961 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7962 // CHECK13:       cond.true:
7963 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7964 // CHECK13-NEXT:    br label [[COND_END:%.*]]
7965 // CHECK13:       cond.false:
7966 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7967 // CHECK13-NEXT:    br label [[COND_END]]
7968 // CHECK13:       cond.end:
7969 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
7970 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7971 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7972 // CHECK13-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
7973 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7974 // CHECK13:       omp.inner.for.cond:
7975 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7976 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7977 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
7978 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7979 // CHECK13:       omp.inner.for.body:
7980 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7981 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
7982 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7983 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
7984 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
7985 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
7986 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
7987 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
7988 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7989 // CHECK13:       omp.body.continue:
7990 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7991 // CHECK13:       omp.inner.for.inc:
7992 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7993 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
7994 // CHECK13-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7995 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
7996 // CHECK13:       omp.inner.for.end:
7997 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7998 // CHECK13:       omp.loop.exit:
7999 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8000 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8001 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8002 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8003 // CHECK13:       omp.precond.end:
8004 // CHECK13-NEXT:    ret void
8005 //
8006 //
8007 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
8008 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8009 // CHECK13-NEXT:  entry:
8010 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8011 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8012 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8013 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8014 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8015 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8016 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8017 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8018 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8019 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
8020 // CHECK13-NEXT:    ret void
8021 //
8022 //
8023 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
8024 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8025 // CHECK13-NEXT:  entry:
8026 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8027 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8028 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8029 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8030 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8031 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8032 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8033 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8034 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8035 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8036 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8037 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8038 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8039 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8040 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
8041 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8042 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8043 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8044 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8045 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8046 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8047 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8048 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8049 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8050 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8051 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8052 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8053 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8054 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8055 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8056 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8057 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8058 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8059 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8060 // CHECK13:       omp.precond.then:
8061 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8062 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8063 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
8064 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8065 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8066 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8067 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8068 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8069 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8070 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8071 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8072 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8073 // CHECK13:       cond.true:
8074 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8075 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8076 // CHECK13:       cond.false:
8077 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8078 // CHECK13-NEXT:    br label [[COND_END]]
8079 // CHECK13:       cond.end:
8080 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8081 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8082 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8083 // CHECK13-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8084 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8085 // CHECK13:       omp.inner.for.cond:
8086 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8087 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8088 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8089 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8090 // CHECK13:       omp.inner.for.body:
8091 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8092 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
8093 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8094 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
8095 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
8096 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8097 // CHECK13:       omp.inner.for.inc:
8098 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8099 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8100 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
8101 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8102 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8103 // CHECK13:       omp.inner.for.end:
8104 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8105 // CHECK13:       omp.loop.exit:
8106 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8107 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
8108 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
8109 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8110 // CHECK13:       omp.precond.end:
8111 // CHECK13-NEXT:    ret void
8112 //
8113 //
8114 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
8115 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8116 // CHECK13-NEXT:  entry:
8117 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8118 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8119 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8120 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8121 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8122 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8123 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8124 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8125 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8126 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8127 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8128 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8129 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8130 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8131 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8132 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8133 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
8134 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8135 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8136 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8137 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8138 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8139 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8140 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8141 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8142 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8143 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8144 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8145 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8146 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8147 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8148 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8149 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8150 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8151 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8152 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8153 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8154 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8155 // CHECK13:       omp.precond.then:
8156 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8157 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8158 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8159 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8160 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
8161 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8162 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
8163 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8164 // CHECK13-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
8165 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8166 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8167 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8168 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
8169 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8170 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8171 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8172 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
8173 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8174 // CHECK13:       cond.true:
8175 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8176 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8177 // CHECK13:       cond.false:
8178 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8179 // CHECK13-NEXT:    br label [[COND_END]]
8180 // CHECK13:       cond.end:
8181 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
8182 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8183 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8184 // CHECK13-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
8185 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8186 // CHECK13:       omp.inner.for.cond:
8187 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8188 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8189 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8190 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8191 // CHECK13:       omp.inner.for.body:
8192 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8193 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8194 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8195 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
8196 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
8197 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
8198 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
8199 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
8200 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8201 // CHECK13:       omp.body.continue:
8202 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8203 // CHECK13:       omp.inner.for.inc:
8204 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8205 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
8206 // CHECK13-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
8207 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8208 // CHECK13:       omp.inner.for.end:
8209 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8210 // CHECK13:       omp.loop.exit:
8211 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8212 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8213 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8214 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8215 // CHECK13:       omp.precond.end:
8216 // CHECK13-NEXT:    ret void
8217 //
8218 //
8219 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
8220 // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8221 // CHECK13-NEXT:  entry:
8222 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
8223 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8224 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8225 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8226 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8227 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8228 // CHECK13-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
8229 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8230 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8231 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8232 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
8233 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8234 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8235 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8236 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8237 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8238 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8239 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8240 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
8241 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8242 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
8243 // CHECK13-NEXT:    ret void
8244 //
8245 //
8246 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5
8247 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8248 // CHECK13-NEXT:  entry:
8249 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8250 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8251 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8252 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8253 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8254 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8255 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8256 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8257 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8258 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8259 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8260 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8261 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8262 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8263 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8264 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
8265 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8266 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8267 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8268 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8269 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8270 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8271 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8272 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8273 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8274 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8275 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8276 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8277 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8278 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8279 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8280 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8281 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8282 // CHECK13-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8283 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8284 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8285 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8286 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8287 // CHECK13:       omp.precond.then:
8288 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8289 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8290 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
8291 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8292 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8293 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
8294 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8295 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
8296 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
8297 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8298 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8299 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
8300 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8301 // CHECK13:       cond.true:
8302 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8303 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8304 // CHECK13:       cond.false:
8305 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8306 // CHECK13-NEXT:    br label [[COND_END]]
8307 // CHECK13:       cond.end:
8308 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
8309 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8310 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8311 // CHECK13-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
8312 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8313 // CHECK13:       omp.inner.for.cond:
8314 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8315 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8316 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
8317 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
8318 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8319 // CHECK13:       omp.inner.for.body:
8320 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8321 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
8322 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8323 // CHECK13-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
8324 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
8325 // CHECK13-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8326 // CHECK13-NEXT:    store i32 [[TMP21]], i32* [[CONV7]], align 4
8327 // CHECK13-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8328 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
8329 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8330 // CHECK13:       omp.inner.for.inc:
8331 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8332 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8333 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
8334 // CHECK13-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
8335 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8336 // CHECK13-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8337 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
8338 // CHECK13-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
8339 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8340 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8341 // CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
8342 // CHECK13-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
8343 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8344 // CHECK13-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8345 // CHECK13-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
8346 // CHECK13-NEXT:    br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
8347 // CHECK13:       cond.true12:
8348 // CHECK13-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8349 // CHECK13-NEXT:    br label [[COND_END14:%.*]]
8350 // CHECK13:       cond.false13:
8351 // CHECK13-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8352 // CHECK13-NEXT:    br label [[COND_END14]]
8353 // CHECK13:       cond.end14:
8354 // CHECK13-NEXT:    [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
8355 // CHECK13-NEXT:    store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
8356 // CHECK13-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8357 // CHECK13-NEXT:    store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
8358 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8359 // CHECK13:       omp.inner.for.end:
8360 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8361 // CHECK13:       omp.loop.exit:
8362 // CHECK13-NEXT:    [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8363 // CHECK13-NEXT:    [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
8364 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
8365 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8366 // CHECK13:       omp.precond.end:
8367 // CHECK13-NEXT:    ret void
8368 //
8369 //
8370 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
8371 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8372 // CHECK13-NEXT:  entry:
8373 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8374 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8375 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8376 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8377 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8378 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8379 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8380 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8381 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8382 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8383 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8384 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8385 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8386 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8387 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8388 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8389 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8390 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
8391 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8392 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8393 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8394 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8395 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8396 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8397 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8398 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8399 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8400 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8401 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8402 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8403 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8404 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8405 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8406 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8407 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8408 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8409 // CHECK13-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8410 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8411 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8412 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8413 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8414 // CHECK13:       omp.precond.then:
8415 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8416 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8417 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8418 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8419 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
8420 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8421 // CHECK13-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
8422 // CHECK13-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
8423 // CHECK13-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
8424 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8425 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8426 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8427 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
8428 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8429 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8430 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8431 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
8432 // CHECK13-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8433 // CHECK13:       cond.true:
8434 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8435 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8436 // CHECK13:       cond.false:
8437 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8438 // CHECK13-NEXT:    br label [[COND_END]]
8439 // CHECK13:       cond.end:
8440 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
8441 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8442 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8443 // CHECK13-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
8444 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8445 // CHECK13:       omp.inner.for.cond:
8446 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8447 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8448 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8449 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8450 // CHECK13:       omp.inner.for.body:
8451 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8452 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8453 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8454 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4
8455 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
8456 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
8457 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
8458 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
8459 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8460 // CHECK13:       omp.body.continue:
8461 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8462 // CHECK13:       omp.inner.for.inc:
8463 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8464 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
8465 // CHECK13-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
8466 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8467 // CHECK13:       omp.inner.for.end:
8468 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8469 // CHECK13:       omp.loop.exit:
8470 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8471 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8472 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8473 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8474 // CHECK13:       omp.precond.end:
8475 // CHECK13-NEXT:    ret void
8476 //
8477 //
8478 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
8479 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8480 // CHECK13-NEXT:  entry:
8481 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8482 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8483 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8484 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8485 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8486 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8487 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8488 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8489 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8490 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
8491 // CHECK13-NEXT:    ret void
8492 //
8493 //
8494 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8
8495 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8496 // CHECK13-NEXT:  entry:
8497 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8498 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8499 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8500 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8501 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8502 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8503 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8504 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8505 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8506 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8507 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8508 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8509 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8510 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8511 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
8512 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8513 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8514 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8515 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8516 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8517 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8518 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8519 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8520 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8521 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8522 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8523 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8524 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8525 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8526 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8527 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8528 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8529 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8530 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8531 // CHECK13:       omp.precond.then:
8532 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8533 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8534 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
8535 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8536 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8537 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8538 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8539 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8540 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8541 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8542 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8543 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8544 // CHECK13:       cond.true:
8545 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8546 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8547 // CHECK13:       cond.false:
8548 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8549 // CHECK13-NEXT:    br label [[COND_END]]
8550 // CHECK13:       cond.end:
8551 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8552 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8553 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8554 // CHECK13-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8555 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8556 // CHECK13:       omp.inner.for.cond:
8557 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8558 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8559 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8560 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8561 // CHECK13:       omp.inner.for.body:
8562 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8563 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
8564 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8565 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
8566 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
8567 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8568 // CHECK13:       omp.inner.for.inc:
8569 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8570 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8571 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
8572 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8573 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8574 // CHECK13:       omp.inner.for.end:
8575 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8576 // CHECK13:       omp.loop.exit:
8577 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8578 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
8579 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
8580 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8581 // CHECK13:       omp.precond.end:
8582 // CHECK13-NEXT:    ret void
8583 //
8584 //
8585 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9
8586 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8587 // CHECK13-NEXT:  entry:
8588 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8589 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8590 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8591 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8592 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8593 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8594 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8595 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8596 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8597 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8598 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8599 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8600 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8601 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8602 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8603 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8604 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
8605 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8606 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8607 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8608 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8609 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8610 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8611 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8612 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8613 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8614 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8615 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8616 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8617 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8618 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8619 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8620 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8621 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8622 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8623 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8624 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8625 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8626 // CHECK13:       omp.precond.then:
8627 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8628 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8629 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8630 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8631 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
8632 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8633 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
8634 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8635 // CHECK13-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
8636 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8637 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8638 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8639 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8640 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8641 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
8642 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
8643 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
8644 // CHECK13:       omp.dispatch.cond:
8645 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8646 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
8647 // CHECK13-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
8648 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
8649 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8650 // CHECK13:       omp.dispatch.body:
8651 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8652 // CHECK13-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
8653 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8654 // CHECK13:       omp.inner.for.cond:
8655 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
8656 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
8657 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
8658 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8659 // CHECK13:       omp.inner.for.body:
8660 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
8661 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
8662 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8663 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15
8664 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15
8665 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
8666 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
8667 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
8668 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8669 // CHECK13:       omp.body.continue:
8670 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8671 // CHECK13:       omp.inner.for.inc:
8672 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
8673 // CHECK13-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
8674 // CHECK13-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
8675 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
8676 // CHECK13:       omp.inner.for.end:
8677 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
8678 // CHECK13:       omp.dispatch.inc:
8679 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
8680 // CHECK13:       omp.dispatch.end:
8681 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8682 // CHECK13:       omp.precond.end:
8683 // CHECK13-NEXT:    ret void
8684 //
8685 //
8686 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
8687 // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8688 // CHECK13-NEXT:  entry:
8689 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
8690 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8691 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8692 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8693 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8694 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8695 // CHECK13-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
8696 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8697 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8698 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8699 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
8700 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8701 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8702 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8703 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8704 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8705 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8706 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8707 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
8708 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8709 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
8710 // CHECK13-NEXT:    ret void
8711 //
8712 //
8713 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
8714 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8715 // CHECK13-NEXT:  entry:
8716 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8717 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8718 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8719 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8720 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8721 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8722 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8723 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8724 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8725 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8726 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8727 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8728 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8729 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8730 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8731 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
8732 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8733 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8734 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8735 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8736 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8737 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8738 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8739 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8740 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8741 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8742 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8743 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8744 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8745 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8746 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8747 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8748 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8749 // CHECK13-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8750 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8751 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8752 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8753 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8754 // CHECK13:       omp.precond.then:
8755 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8756 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8757 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
8758 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8759 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8760 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8761 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8762 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8763 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8764 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8765 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8766 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8767 // CHECK13:       cond.true:
8768 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8769 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8770 // CHECK13:       cond.false:
8771 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8772 // CHECK13-NEXT:    br label [[COND_END]]
8773 // CHECK13:       cond.end:
8774 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8775 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8776 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8777 // CHECK13-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8778 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8779 // CHECK13:       omp.inner.for.cond:
8780 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8781 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8782 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8783 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8784 // CHECK13:       omp.inner.for.body:
8785 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8786 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
8787 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8788 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
8789 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
8790 // CHECK13-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8791 // CHECK13-NEXT:    store i32 [[TMP20]], i32* [[CONV7]], align 4
8792 // CHECK13-NEXT:    [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8793 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
8794 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8795 // CHECK13:       omp.inner.for.inc:
8796 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8797 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8798 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
8799 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8800 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8801 // CHECK13:       omp.inner.for.end:
8802 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8803 // CHECK13:       omp.loop.exit:
8804 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8805 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
8806 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
8807 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8808 // CHECK13:       omp.precond.end:
8809 // CHECK13-NEXT:    ret void
8810 //
8811 //
8812 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..12
8813 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8814 // CHECK13-NEXT:  entry:
8815 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8816 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8817 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8818 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8819 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8820 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8821 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8822 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8823 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8824 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8825 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8826 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8827 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8828 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8829 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8830 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8831 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8832 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
8833 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8834 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8835 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8836 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8837 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8838 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8839 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8840 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8841 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8842 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8843 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8844 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8845 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8846 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8847 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8848 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8849 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8850 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8851 // CHECK13-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8852 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8853 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8854 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8855 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8856 // CHECK13:       omp.precond.then:
8857 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8858 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8859 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8860 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8861 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
8862 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8863 // CHECK13-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
8864 // CHECK13-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
8865 // CHECK13-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
8866 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8867 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8868 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
8869 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8870 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8871 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8872 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
8873 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
8874 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
8875 // CHECK13:       omp.dispatch.cond:
8876 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8877 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
8878 // CHECK13-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
8879 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
8880 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8881 // CHECK13:       omp.dispatch.body:
8882 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8883 // CHECK13-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
8884 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8885 // CHECK13:       omp.inner.for.cond:
8886 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8887 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
8888 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
8889 // CHECK13-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8890 // CHECK13:       omp.inner.for.body:
8891 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8892 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
8893 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8894 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18
8895 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18
8896 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
8897 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
8898 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
8899 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8900 // CHECK13:       omp.body.continue:
8901 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8902 // CHECK13:       omp.inner.for.inc:
8903 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8904 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
8905 // CHECK13-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
8906 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
8907 // CHECK13:       omp.inner.for.end:
8908 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
8909 // CHECK13:       omp.dispatch.inc:
8910 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
8911 // CHECK13:       omp.dispatch.end:
8912 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8913 // CHECK13:       omp.precond.end:
8914 // CHECK13-NEXT:    ret void
8915 //
8916 //
8917 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8918 // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
8919 // CHECK13-NEXT:  entry:
8920 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
8921 // CHECK13-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
8922 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
8923 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
8924 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
8925 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
8926 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8927 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
8928 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
8929 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
8930 // CHECK13-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
8931 // CHECK13-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
8932 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
8933 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
8934 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
8935 // CHECK13-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
8936 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
8937 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
8938 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
8939 // CHECK13-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
8940 // CHECK13-NEXT:    [[M_CASTED19:%.*]] = alloca i64, align 8
8941 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
8942 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
8943 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
8944 // CHECK13-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
8945 // CHECK13-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8946 // CHECK13-NEXT:    store i32 10, i32* [[M]], align 4
8947 // CHECK13-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8948 // CHECK13-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
8949 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
8950 // CHECK13-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8951 // CHECK13-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
8952 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
8953 // CHECK13-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
8954 // CHECK13-NEXT:    store i8* null, i8** [[TMP4]], align 8
8955 // CHECK13-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8956 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8957 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
8958 // CHECK13-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8959 // CHECK13-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
8960 // CHECK13-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8961 // CHECK13:       omp_offload.failed:
8962 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
8963 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
8964 // CHECK13:       omp_offload.cont:
8965 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8966 // CHECK13-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
8967 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
8968 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8969 // CHECK13-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
8970 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
8971 // CHECK13-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
8972 // CHECK13-NEXT:    store i8* null, i8** [[TMP13]], align 8
8973 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8974 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8975 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
8976 // CHECK13-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8977 // CHECK13-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
8978 // CHECK13-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
8979 // CHECK13:       omp_offload.failed5:
8980 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
8981 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
8982 // CHECK13:       omp_offload.cont6:
8983 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
8984 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
8985 // CHECK13-NEXT:    store i32 [[TMP18]], i32* [[CONV]], align 4
8986 // CHECK13-NEXT:    [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
8987 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
8988 // CHECK13-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
8989 // CHECK13-NEXT:    store i64 [[TMP19]], i64* [[TMP21]], align 8
8990 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
8991 // CHECK13-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
8992 // CHECK13-NEXT:    store i64 [[TMP19]], i64* [[TMP23]], align 8
8993 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
8994 // CHECK13-NEXT:    store i8* null, i8** [[TMP24]], align 8
8995 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
8996 // CHECK13-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
8997 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
8998 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
8999 // CHECK13-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
9000 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
9001 // CHECK13-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
9002 // CHECK13-NEXT:    store i8* null, i8** [[TMP29]], align 8
9003 // CHECK13-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
9004 // CHECK13-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
9005 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9006 // CHECK13-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9007 // CHECK13-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
9008 // CHECK13-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
9009 // CHECK13:       omp_offload.failed11:
9010 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
9011 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
9012 // CHECK13:       omp_offload.cont12:
9013 // CHECK13-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
9014 // CHECK13-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
9015 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
9016 // CHECK13-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
9017 // CHECK13-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
9018 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
9019 // CHECK13-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
9020 // CHECK13-NEXT:    store i8* null, i8** [[TMP38]], align 8
9021 // CHECK13-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
9022 // CHECK13-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
9023 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9024 // CHECK13-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9025 // CHECK13-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
9026 // CHECK13-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
9027 // CHECK13:       omp_offload.failed17:
9028 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
9029 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
9030 // CHECK13:       omp_offload.cont18:
9031 // CHECK13-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
9032 // CHECK13-NEXT:    [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
9033 // CHECK13-NEXT:    store i32 [[TMP43]], i32* [[CONV20]], align 4
9034 // CHECK13-NEXT:    [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
9035 // CHECK13-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
9036 // CHECK13-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
9037 // CHECK13-NEXT:    store i64 [[TMP44]], i64* [[TMP46]], align 8
9038 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
9039 // CHECK13-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
9040 // CHECK13-NEXT:    store i64 [[TMP44]], i64* [[TMP48]], align 8
9041 // CHECK13-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
9042 // CHECK13-NEXT:    store i8* null, i8** [[TMP49]], align 8
9043 // CHECK13-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
9044 // CHECK13-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
9045 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
9046 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
9047 // CHECK13-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
9048 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
9049 // CHECK13-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
9050 // CHECK13-NEXT:    store i8* null, i8** [[TMP54]], align 8
9051 // CHECK13-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
9052 // CHECK13-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
9053 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9054 // CHECK13-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9055 // CHECK13-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
9056 // CHECK13-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
9057 // CHECK13:       omp_offload.failed25:
9058 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
9059 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
9060 // CHECK13:       omp_offload.cont26:
9061 // CHECK13-NEXT:    ret i32 0
9062 //
9063 //
9064 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
9065 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9066 // CHECK13-NEXT:  entry:
9067 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9068 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9069 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9070 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9071 // CHECK13-NEXT:    ret void
9072 //
9073 //
9074 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14
9075 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9076 // CHECK13-NEXT:  entry:
9077 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9078 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9079 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9080 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9081 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9082 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9083 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9084 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9085 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9086 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9087 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9088 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9089 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9090 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9091 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9092 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9093 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9094 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9095 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9096 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9097 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9098 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9099 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9100 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9101 // CHECK13:       cond.true:
9102 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9103 // CHECK13:       cond.false:
9104 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9105 // CHECK13-NEXT:    br label [[COND_END]]
9106 // CHECK13:       cond.end:
9107 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9108 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9109 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9110 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9111 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9112 // CHECK13:       omp.inner.for.cond:
9113 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9114 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9115 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9116 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9117 // CHECK13:       omp.inner.for.body:
9118 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9119 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9120 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9121 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9122 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
9123 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9124 // CHECK13:       omp.inner.for.inc:
9125 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9126 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9127 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9128 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9129 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9130 // CHECK13:       omp.inner.for.end:
9131 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9132 // CHECK13:       omp.loop.exit:
9133 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9134 // CHECK13-NEXT:    ret void
9135 //
9136 //
9137 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15
9138 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9139 // CHECK13-NEXT:  entry:
9140 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9141 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9142 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9143 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9144 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9145 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9146 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9147 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9148 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9149 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9150 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9151 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9152 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9153 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9154 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9155 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9156 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9157 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9158 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9159 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9160 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9161 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
9162 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9163 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
9164 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9165 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9166 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9167 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9168 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9169 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9170 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9171 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9172 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
9173 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9174 // CHECK13:       cond.true:
9175 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9176 // CHECK13:       cond.false:
9177 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9178 // CHECK13-NEXT:    br label [[COND_END]]
9179 // CHECK13:       cond.end:
9180 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
9181 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9182 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9183 // CHECK13-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9184 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9185 // CHECK13:       omp.inner.for.cond:
9186 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9187 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9188 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9189 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9190 // CHECK13:       omp.inner.for.body:
9191 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9192 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9193 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9194 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9195 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
9196 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
9197 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9198 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
9199 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9200 // CHECK13:       omp.body.continue:
9201 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9202 // CHECK13:       omp.inner.for.inc:
9203 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9204 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
9205 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9206 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9207 // CHECK13:       omp.inner.for.end:
9208 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9209 // CHECK13:       omp.loop.exit:
9210 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9211 // CHECK13-NEXT:    ret void
9212 //
9213 //
9214 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
9215 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9216 // CHECK13-NEXT:  entry:
9217 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9218 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9219 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9220 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9221 // CHECK13-NEXT:    ret void
9222 //
9223 //
9224 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..17
9225 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9226 // CHECK13-NEXT:  entry:
9227 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9228 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9229 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9230 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9231 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9232 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9233 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9234 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9235 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9236 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9237 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9238 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9239 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9240 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9241 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9242 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9243 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9244 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9245 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9246 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9247 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9248 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9249 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9250 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9251 // CHECK13:       cond.true:
9252 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9253 // CHECK13:       cond.false:
9254 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9255 // CHECK13-NEXT:    br label [[COND_END]]
9256 // CHECK13:       cond.end:
9257 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9258 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9259 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9260 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9261 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9262 // CHECK13:       omp.inner.for.cond:
9263 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9264 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9265 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9266 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9267 // CHECK13:       omp.inner.for.body:
9268 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9269 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9270 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9271 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9272 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
9273 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9274 // CHECK13:       omp.inner.for.inc:
9275 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9276 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9277 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9278 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9279 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9280 // CHECK13:       omp.inner.for.end:
9281 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9282 // CHECK13:       omp.loop.exit:
9283 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9284 // CHECK13-NEXT:    ret void
9285 //
9286 //
9287 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18
9288 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9289 // CHECK13-NEXT:  entry:
9290 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9291 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9292 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9293 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9294 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9295 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9296 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9297 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9298 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9299 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9300 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9301 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9302 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9303 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9304 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9305 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9306 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9307 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9308 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9309 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9310 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9311 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
9312 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9313 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
9314 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9315 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9316 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9317 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9318 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9319 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9320 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9321 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9322 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
9323 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9324 // CHECK13:       cond.true:
9325 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9326 // CHECK13:       cond.false:
9327 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9328 // CHECK13-NEXT:    br label [[COND_END]]
9329 // CHECK13:       cond.end:
9330 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
9331 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9332 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9333 // CHECK13-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9334 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9335 // CHECK13:       omp.inner.for.cond:
9336 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9337 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9338 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9339 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9340 // CHECK13:       omp.inner.for.body:
9341 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9342 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9343 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9344 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9345 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
9346 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
9347 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9348 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
9349 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9350 // CHECK13:       omp.body.continue:
9351 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9352 // CHECK13:       omp.inner.for.inc:
9353 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9354 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
9355 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9356 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9357 // CHECK13:       omp.inner.for.end:
9358 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9359 // CHECK13:       omp.loop.exit:
9360 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9361 // CHECK13-NEXT:    ret void
9362 //
9363 //
9364 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
9365 // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9366 // CHECK13-NEXT:  entry:
9367 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
9368 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9369 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9370 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9371 // CHECK13-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
9372 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9373 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
9374 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9375 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
9376 // CHECK13-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
9377 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9378 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9379 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
9380 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9381 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
9382 // CHECK13-NEXT:    ret void
9383 //
9384 //
9385 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..21
9386 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9387 // CHECK13-NEXT:  entry:
9388 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9389 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9390 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9391 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9392 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9393 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9394 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9395 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9396 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9397 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9398 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9399 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9400 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9401 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9402 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9403 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9404 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9405 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9406 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9407 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9408 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9409 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9410 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9411 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9412 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9413 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9414 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9415 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9416 // CHECK13:       cond.true:
9417 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9418 // CHECK13:       cond.false:
9419 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9420 // CHECK13-NEXT:    br label [[COND_END]]
9421 // CHECK13:       cond.end:
9422 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9423 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9424 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9425 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9426 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9427 // CHECK13:       omp.inner.for.cond:
9428 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9429 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9430 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9431 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9432 // CHECK13:       omp.inner.for.body:
9433 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9434 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9435 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9436 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9437 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
9438 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9439 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
9440 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9441 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
9442 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9443 // CHECK13:       omp.inner.for.inc:
9444 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9445 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9446 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
9447 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9448 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9449 // CHECK13:       omp.inner.for.end:
9450 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9451 // CHECK13:       omp.loop.exit:
9452 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9453 // CHECK13-NEXT:    ret void
9454 //
9455 //
9456 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22
9457 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9458 // CHECK13-NEXT:  entry:
9459 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9460 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9461 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9462 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9463 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9464 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9465 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9466 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9467 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9468 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9469 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9470 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9471 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9472 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9473 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9474 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9475 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9476 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9477 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9478 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9479 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9480 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9481 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9482 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9483 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9484 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9485 // CHECK13-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
9486 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
9487 // CHECK13-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
9488 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9489 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9490 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
9491 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9492 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
9493 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
9494 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9495 // CHECK13:       omp.dispatch.cond:
9496 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9497 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9498 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
9499 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
9500 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9501 // CHECK13:       cond.true:
9502 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9503 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
9504 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9505 // CHECK13:       cond.false:
9506 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9507 // CHECK13-NEXT:    br label [[COND_END]]
9508 // CHECK13:       cond.end:
9509 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
9510 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9511 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9512 // CHECK13-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
9513 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9514 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9515 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
9516 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9517 // CHECK13:       omp.dispatch.body:
9518 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9519 // CHECK13:       omp.inner.for.cond:
9520 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9521 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9522 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
9523 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9524 // CHECK13:       omp.inner.for.body:
9525 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9526 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
9527 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9528 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9529 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
9530 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
9531 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9532 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
9533 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9534 // CHECK13:       omp.body.continue:
9535 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9536 // CHECK13:       omp.inner.for.inc:
9537 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9538 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
9539 // CHECK13-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
9540 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9541 // CHECK13:       omp.inner.for.end:
9542 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9543 // CHECK13:       omp.dispatch.inc:
9544 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9545 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9546 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
9547 // CHECK13-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
9548 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9549 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9550 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9551 // CHECK13-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
9552 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
9553 // CHECK13:       omp.dispatch.end:
9554 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
9555 // CHECK13-NEXT:    ret void
9556 //
9557 //
9558 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
9559 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9560 // CHECK13-NEXT:  entry:
9561 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9562 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9563 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9564 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9565 // CHECK13-NEXT:    ret void
9566 //
9567 //
9568 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..25
9569 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9570 // CHECK13-NEXT:  entry:
9571 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9572 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9573 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9574 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9575 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9576 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9577 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9578 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9579 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9580 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9581 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9582 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9583 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9584 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9585 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9586 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9587 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9588 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9589 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9590 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9591 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9592 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9593 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9594 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9595 // CHECK13:       cond.true:
9596 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9597 // CHECK13:       cond.false:
9598 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9599 // CHECK13-NEXT:    br label [[COND_END]]
9600 // CHECK13:       cond.end:
9601 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9602 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9603 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9604 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9605 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9606 // CHECK13:       omp.inner.for.cond:
9607 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9608 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9609 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9610 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9611 // CHECK13:       omp.inner.for.body:
9612 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9613 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9614 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9615 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9616 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
9617 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9618 // CHECK13:       omp.inner.for.inc:
9619 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9620 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9621 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9622 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9623 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9624 // CHECK13:       omp.inner.for.end:
9625 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9626 // CHECK13:       omp.loop.exit:
9627 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9628 // CHECK13-NEXT:    ret void
9629 //
9630 //
9631 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26
9632 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9633 // CHECK13-NEXT:  entry:
9634 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9635 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9636 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9637 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9638 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9639 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9640 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9641 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9642 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9643 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9644 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9645 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9646 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9647 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9648 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9649 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9650 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9651 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9652 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9653 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9654 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9655 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
9656 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9657 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
9658 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9659 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9660 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9661 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9662 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9663 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9664 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9665 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
9666 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
9667 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9668 // CHECK13:       omp.dispatch.cond:
9669 // CHECK13-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9670 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
9671 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9672 // CHECK13:       omp.dispatch.body:
9673 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9674 // CHECK13-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
9675 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9676 // CHECK13:       omp.inner.for.cond:
9677 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
9678 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
9679 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
9680 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9681 // CHECK13:       omp.inner.for.body:
9682 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
9683 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
9684 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9685 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
9686 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
9687 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
9688 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9689 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
9690 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9691 // CHECK13:       omp.body.continue:
9692 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9693 // CHECK13:       omp.inner.for.inc:
9694 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
9695 // CHECK13-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
9696 // CHECK13-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
9697 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
9698 // CHECK13:       omp.inner.for.end:
9699 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9700 // CHECK13:       omp.dispatch.inc:
9701 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
9702 // CHECK13:       omp.dispatch.end:
9703 // CHECK13-NEXT:    ret void
9704 //
9705 //
9706 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
9707 // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9708 // CHECK13-NEXT:  entry:
9709 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
9710 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9711 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9712 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9713 // CHECK13-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
9714 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9715 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
9716 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9717 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
9718 // CHECK13-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
9719 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9720 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9721 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
9722 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9723 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
9724 // CHECK13-NEXT:    ret void
9725 //
9726 //
9727 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..29
9728 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9729 // CHECK13-NEXT:  entry:
9730 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9731 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9732 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9733 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9734 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9735 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9736 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9737 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9738 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9739 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9740 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9741 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9742 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9743 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9744 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9745 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9746 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9747 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9748 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9749 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9750 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9751 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9752 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9753 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9754 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9755 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9756 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9757 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9758 // CHECK13:       cond.true:
9759 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9760 // CHECK13:       cond.false:
9761 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9762 // CHECK13-NEXT:    br label [[COND_END]]
9763 // CHECK13:       cond.end:
9764 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9765 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9766 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9767 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9768 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9769 // CHECK13:       omp.inner.for.cond:
9770 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9771 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9772 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9773 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9774 // CHECK13:       omp.inner.for.body:
9775 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9776 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9777 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9778 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9779 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
9780 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9781 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
9782 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9783 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
9784 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9785 // CHECK13:       omp.inner.for.inc:
9786 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9787 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9788 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
9789 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9790 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9791 // CHECK13:       omp.inner.for.end:
9792 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9793 // CHECK13:       omp.loop.exit:
9794 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9795 // CHECK13-NEXT:    ret void
9796 //
9797 //
9798 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30
9799 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9800 // CHECK13-NEXT:  entry:
9801 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9802 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9803 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9804 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9805 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9806 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9807 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9808 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9809 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9810 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9811 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9812 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9813 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9814 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9815 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9816 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9817 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9818 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9819 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9820 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9821 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9822 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9823 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9824 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9825 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9826 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9827 // CHECK13-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
9828 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
9829 // CHECK13-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
9830 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9831 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9832 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
9833 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9834 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9835 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9836 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
9837 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
9838 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9839 // CHECK13:       omp.dispatch.cond:
9840 // CHECK13-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9841 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
9842 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9843 // CHECK13:       omp.dispatch.body:
9844 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9845 // CHECK13-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
9846 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9847 // CHECK13:       omp.inner.for.cond:
9848 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
9849 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
9850 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
9851 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9852 // CHECK13:       omp.inner.for.body:
9853 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
9854 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
9855 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9856 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
9857 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
9858 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
9859 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9860 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
9861 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9862 // CHECK13:       omp.body.continue:
9863 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9864 // CHECK13:       omp.inner.for.inc:
9865 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
9866 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
9867 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
9868 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
9869 // CHECK13:       omp.inner.for.end:
9870 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9871 // CHECK13:       omp.dispatch.inc:
9872 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
9873 // CHECK13:       omp.dispatch.end:
9874 // CHECK13-NEXT:    ret void
9875 //
9876 //
9877 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
9878 // CHECK13-SAME: () #[[ATTR5:[0-9]+]] {
9879 // CHECK13-NEXT:  entry:
9880 // CHECK13-NEXT:    call void @__tgt_register_requires(i64 1)
9881 // CHECK13-NEXT:    ret void
9882 //
9883 //
9884 // CHECK14-LABEL: define {{[^@]+}}@main
9885 // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9886 // CHECK14-NEXT:  entry:
9887 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9888 // CHECK14-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
9889 // CHECK14-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
9890 // CHECK14-NEXT:    [[N:%.*]] = alloca i32, align 4
9891 // CHECK14-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
9892 // CHECK14-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
9893 // CHECK14-NEXT:    [[M:%.*]] = alloca i32, align 4
9894 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
9895 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
9896 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
9897 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
9898 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
9899 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9900 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9901 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9902 // CHECK14-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
9903 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
9904 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
9905 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
9906 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
9907 // CHECK14-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
9908 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
9909 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
9910 // CHECK14-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
9911 // CHECK14-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
9912 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
9913 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
9914 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
9915 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
9916 // CHECK14-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
9917 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
9918 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
9919 // CHECK14-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
9920 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
9921 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
9922 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
9923 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
9924 // CHECK14-NEXT:    [[_TMP40:%.*]] = alloca i32, align 4
9925 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
9926 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
9927 // CHECK14-NEXT:    [[M_CASTED49:%.*]] = alloca i64, align 8
9928 // CHECK14-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
9929 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
9930 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
9931 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
9932 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
9933 // CHECK14-NEXT:    [[_TMP57:%.*]] = alloca i32, align 4
9934 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
9935 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
9936 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
9937 // CHECK14-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9938 // CHECK14-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
9939 // CHECK14-NEXT:    store i32 100, i32* [[N]], align 4
9940 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9941 // CHECK14-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
9942 // CHECK14-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
9943 // CHECK14-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
9944 // CHECK14-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
9945 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
9946 // CHECK14-NEXT:    store i32 10, i32* [[M]], align 4
9947 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
9948 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9949 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
9950 // CHECK14-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
9951 // CHECK14-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
9952 // CHECK14-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9953 // CHECK14-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
9954 // CHECK14-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
9955 // CHECK14-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9956 // CHECK14-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
9957 // CHECK14-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
9958 // CHECK14-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
9959 // CHECK14-NEXT:    store i64 4, i64* [[TMP10]], align 8
9960 // CHECK14-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9961 // CHECK14-NEXT:    store i8* null, i8** [[TMP11]], align 8
9962 // CHECK14-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
9963 // CHECK14-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
9964 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
9965 // CHECK14-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
9966 // CHECK14-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
9967 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
9968 // CHECK14-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
9969 // CHECK14-NEXT:    store i64 8, i64* [[TMP16]], align 8
9970 // CHECK14-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
9971 // CHECK14-NEXT:    store i8* null, i8** [[TMP17]], align 8
9972 // CHECK14-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
9973 // CHECK14-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
9974 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
9975 // CHECK14-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
9976 // CHECK14-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
9977 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
9978 // CHECK14-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
9979 // CHECK14-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
9980 // CHECK14-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
9981 // CHECK14-NEXT:    store i8* null, i8** [[TMP23]], align 8
9982 // CHECK14-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9983 // CHECK14-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9984 // CHECK14-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
9985 // CHECK14-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
9986 // CHECK14-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
9987 // CHECK14-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9988 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
9989 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9990 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9991 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9992 // CHECK14-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9993 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
9994 // CHECK14-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
9995 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
9996 // CHECK14-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9997 // CHECK14-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
9998 // CHECK14-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9999 // CHECK14:       omp_offload.failed:
10000 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
10001 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
10002 // CHECK14:       omp_offload.cont:
10003 // CHECK14-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
10004 // CHECK14-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
10005 // CHECK14-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
10006 // CHECK14-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
10007 // CHECK14-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
10008 // CHECK14-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
10009 // CHECK14-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
10010 // CHECK14-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
10011 // CHECK14-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
10012 // CHECK14-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
10013 // CHECK14-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
10014 // CHECK14-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
10015 // CHECK14-NEXT:    store i64 4, i64* [[TMP40]], align 8
10016 // CHECK14-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
10017 // CHECK14-NEXT:    store i8* null, i8** [[TMP41]], align 8
10018 // CHECK14-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
10019 // CHECK14-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
10020 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
10021 // CHECK14-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
10022 // CHECK14-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
10023 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
10024 // CHECK14-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
10025 // CHECK14-NEXT:    store i64 8, i64* [[TMP46]], align 8
10026 // CHECK14-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
10027 // CHECK14-NEXT:    store i8* null, i8** [[TMP47]], align 8
10028 // CHECK14-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
10029 // CHECK14-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
10030 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
10031 // CHECK14-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
10032 // CHECK14-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
10033 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
10034 // CHECK14-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
10035 // CHECK14-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
10036 // CHECK14-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
10037 // CHECK14-NEXT:    store i8* null, i8** [[TMP53]], align 8
10038 // CHECK14-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
10039 // CHECK14-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
10040 // CHECK14-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
10041 // CHECK14-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
10042 // CHECK14-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
10043 // CHECK14-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
10044 // CHECK14-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
10045 // CHECK14-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
10046 // CHECK14-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
10047 // CHECK14-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
10048 // CHECK14-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
10049 // CHECK14-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
10050 // CHECK14-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
10051 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
10052 // CHECK14-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10053 // CHECK14-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
10054 // CHECK14-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
10055 // CHECK14:       omp_offload.failed16:
10056 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10057 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
10058 // CHECK14:       omp_offload.cont17:
10059 // CHECK14-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
10060 // CHECK14-NEXT:    [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
10061 // CHECK14-NEXT:    store i32 [[TMP63]], i32* [[CONV18]], align 4
10062 // CHECK14-NEXT:    [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
10063 // CHECK14-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
10064 // CHECK14-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
10065 // CHECK14-NEXT:    store i32 [[TMP65]], i32* [[CONV20]], align 4
10066 // CHECK14-NEXT:    [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
10067 // CHECK14-NEXT:    [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
10068 // CHECK14-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
10069 // CHECK14-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
10070 // CHECK14-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
10071 // CHECK14-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
10072 // CHECK14-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
10073 // CHECK14-NEXT:    store i64 [[TMP64]], i64* [[TMP71]], align 8
10074 // CHECK14-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
10075 // CHECK14-NEXT:    store i64 4, i64* [[TMP72]], align 8
10076 // CHECK14-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
10077 // CHECK14-NEXT:    store i8* null, i8** [[TMP73]], align 8
10078 // CHECK14-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
10079 // CHECK14-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
10080 // CHECK14-NEXT:    store i64 [[TMP66]], i64* [[TMP75]], align 8
10081 // CHECK14-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
10082 // CHECK14-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
10083 // CHECK14-NEXT:    store i64 [[TMP66]], i64* [[TMP77]], align 8
10084 // CHECK14-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
10085 // CHECK14-NEXT:    store i64 4, i64* [[TMP78]], align 8
10086 // CHECK14-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
10087 // CHECK14-NEXT:    store i8* null, i8** [[TMP79]], align 8
10088 // CHECK14-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
10089 // CHECK14-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
10090 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP81]], align 8
10091 // CHECK14-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
10092 // CHECK14-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
10093 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP83]], align 8
10094 // CHECK14-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
10095 // CHECK14-NEXT:    store i64 8, i64* [[TMP84]], align 8
10096 // CHECK14-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
10097 // CHECK14-NEXT:    store i8* null, i8** [[TMP85]], align 8
10098 // CHECK14-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
10099 // CHECK14-NEXT:    [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
10100 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP87]], align 8
10101 // CHECK14-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
10102 // CHECK14-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
10103 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 8
10104 // CHECK14-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
10105 // CHECK14-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
10106 // CHECK14-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
10107 // CHECK14-NEXT:    store i8* null, i8** [[TMP91]], align 8
10108 // CHECK14-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
10109 // CHECK14-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
10110 // CHECK14-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
10111 // CHECK14-NEXT:    [[TMP95:%.*]] = load i32, i32* [[N]], align 4
10112 // CHECK14-NEXT:    store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
10113 // CHECK14-NEXT:    [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
10114 // CHECK14-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
10115 // CHECK14-NEXT:    [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
10116 // CHECK14-NEXT:    [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
10117 // CHECK14-NEXT:    store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
10118 // CHECK14-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
10119 // CHECK14-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
10120 // CHECK14-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
10121 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
10122 // CHECK14-NEXT:    [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10123 // CHECK14-NEXT:    [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
10124 // CHECK14-NEXT:    br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
10125 // CHECK14:       omp_offload.failed32:
10126 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10127 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
10128 // CHECK14:       omp_offload.cont33:
10129 // CHECK14-NEXT:    [[TMP101:%.*]] = load i32, i32* [[N]], align 4
10130 // CHECK14-NEXT:    [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
10131 // CHECK14-NEXT:    store i32 [[TMP101]], i32* [[CONV35]], align 4
10132 // CHECK14-NEXT:    [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
10133 // CHECK14-NEXT:    [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
10134 // CHECK14-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
10135 // CHECK14-NEXT:    [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
10136 // CHECK14-NEXT:    store i64 [[TMP102]], i64* [[TMP105]], align 8
10137 // CHECK14-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
10138 // CHECK14-NEXT:    [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
10139 // CHECK14-NEXT:    store i64 [[TMP102]], i64* [[TMP107]], align 8
10140 // CHECK14-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
10141 // CHECK14-NEXT:    store i64 4, i64* [[TMP108]], align 8
10142 // CHECK14-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
10143 // CHECK14-NEXT:    store i8* null, i8** [[TMP109]], align 8
10144 // CHECK14-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
10145 // CHECK14-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
10146 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP111]], align 8
10147 // CHECK14-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
10148 // CHECK14-NEXT:    [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
10149 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP113]], align 8
10150 // CHECK14-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
10151 // CHECK14-NEXT:    store i64 8, i64* [[TMP114]], align 8
10152 // CHECK14-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
10153 // CHECK14-NEXT:    store i8* null, i8** [[TMP115]], align 8
10154 // CHECK14-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
10155 // CHECK14-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
10156 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP117]], align 8
10157 // CHECK14-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
10158 // CHECK14-NEXT:    [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
10159 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP119]], align 8
10160 // CHECK14-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
10161 // CHECK14-NEXT:    store i64 [[TMP103]], i64* [[TMP120]], align 8
10162 // CHECK14-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
10163 // CHECK14-NEXT:    store i8* null, i8** [[TMP121]], align 8
10164 // CHECK14-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
10165 // CHECK14-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
10166 // CHECK14-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
10167 // CHECK14-NEXT:    [[TMP125:%.*]] = load i32, i32* [[N]], align 4
10168 // CHECK14-NEXT:    store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
10169 // CHECK14-NEXT:    [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
10170 // CHECK14-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
10171 // CHECK14-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
10172 // CHECK14-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
10173 // CHECK14-NEXT:    store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
10174 // CHECK14-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
10175 // CHECK14-NEXT:    [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
10176 // CHECK14-NEXT:    [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
10177 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
10178 // CHECK14-NEXT:    [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10179 // CHECK14-NEXT:    [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
10180 // CHECK14-NEXT:    br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
10181 // CHECK14:       omp_offload.failed47:
10182 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10183 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
10184 // CHECK14:       omp_offload.cont48:
10185 // CHECK14-NEXT:    [[TMP131:%.*]] = load i32, i32* [[M]], align 4
10186 // CHECK14-NEXT:    [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
10187 // CHECK14-NEXT:    store i32 [[TMP131]], i32* [[CONV50]], align 4
10188 // CHECK14-NEXT:    [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
10189 // CHECK14-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
10190 // CHECK14-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
10191 // CHECK14-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
10192 // CHECK14-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
10193 // CHECK14-NEXT:    [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
10194 // CHECK14-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
10195 // CHECK14-NEXT:    [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
10196 // CHECK14-NEXT:    store i64 [[TMP132]], i64* [[TMP137]], align 8
10197 // CHECK14-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
10198 // CHECK14-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
10199 // CHECK14-NEXT:    store i64 [[TMP132]], i64* [[TMP139]], align 8
10200 // CHECK14-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
10201 // CHECK14-NEXT:    store i64 4, i64* [[TMP140]], align 8
10202 // CHECK14-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
10203 // CHECK14-NEXT:    store i8* null, i8** [[TMP141]], align 8
10204 // CHECK14-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
10205 // CHECK14-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
10206 // CHECK14-NEXT:    store i64 [[TMP134]], i64* [[TMP143]], align 8
10207 // CHECK14-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
10208 // CHECK14-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
10209 // CHECK14-NEXT:    store i64 [[TMP134]], i64* [[TMP145]], align 8
10210 // CHECK14-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
10211 // CHECK14-NEXT:    store i64 4, i64* [[TMP146]], align 8
10212 // CHECK14-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
10213 // CHECK14-NEXT:    store i8* null, i8** [[TMP147]], align 8
10214 // CHECK14-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
10215 // CHECK14-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
10216 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP149]], align 8
10217 // CHECK14-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
10218 // CHECK14-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
10219 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP151]], align 8
10220 // CHECK14-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
10221 // CHECK14-NEXT:    store i64 8, i64* [[TMP152]], align 8
10222 // CHECK14-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
10223 // CHECK14-NEXT:    store i8* null, i8** [[TMP153]], align 8
10224 // CHECK14-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
10225 // CHECK14-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
10226 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 8
10227 // CHECK14-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
10228 // CHECK14-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
10229 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 8
10230 // CHECK14-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
10231 // CHECK14-NEXT:    store i64 [[TMP135]], i64* [[TMP158]], align 8
10232 // CHECK14-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
10233 // CHECK14-NEXT:    store i8* null, i8** [[TMP159]], align 8
10234 // CHECK14-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
10235 // CHECK14-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
10236 // CHECK14-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
10237 // CHECK14-NEXT:    [[TMP163:%.*]] = load i32, i32* [[N]], align 4
10238 // CHECK14-NEXT:    store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
10239 // CHECK14-NEXT:    [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
10240 // CHECK14-NEXT:    [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
10241 // CHECK14-NEXT:    [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
10242 // CHECK14-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
10243 // CHECK14-NEXT:    store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
10244 // CHECK14-NEXT:    [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
10245 // CHECK14-NEXT:    [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
10246 // CHECK14-NEXT:    [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
10247 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
10248 // CHECK14-NEXT:    [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10249 // CHECK14-NEXT:    [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
10250 // CHECK14-NEXT:    br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
10251 // CHECK14:       omp_offload.failed64:
10252 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10253 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
10254 // CHECK14:       omp_offload.cont65:
10255 // CHECK14-NEXT:    [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
10256 // CHECK14-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
10257 // CHECK14-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
10258 // CHECK14-NEXT:    [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
10259 // CHECK14-NEXT:    call void @llvm.stackrestore(i8* [[TMP170]])
10260 // CHECK14-NEXT:    [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
10261 // CHECK14-NEXT:    ret i32 [[TMP171]]
10262 //
10263 //
10264 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
10265 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
10266 // CHECK14-NEXT:  entry:
10267 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10268 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10269 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10270 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10271 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10272 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10273 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10274 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10275 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10276 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
10277 // CHECK14-NEXT:    ret void
10278 //
10279 //
10280 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined.
10281 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10282 // CHECK14-NEXT:  entry:
10283 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10284 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10285 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10286 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10287 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10288 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10289 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10290 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10291 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10292 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10293 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10294 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10295 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10296 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10297 // CHECK14-NEXT:    [[I3:%.*]] = alloca i32, align 4
10298 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10299 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10300 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10301 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10302 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10303 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10304 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10305 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10306 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10307 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10308 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10309 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10310 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10311 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10312 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10313 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10314 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10315 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10316 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10317 // CHECK14:       omp.precond.then:
10318 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10319 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10320 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
10321 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10322 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10323 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10324 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10325 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10326 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10327 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10328 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10329 // CHECK14-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10330 // CHECK14:       cond.true:
10331 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10332 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10333 // CHECK14:       cond.false:
10334 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10335 // CHECK14-NEXT:    br label [[COND_END]]
10336 // CHECK14:       cond.end:
10337 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10338 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10339 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10340 // CHECK14-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10341 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10342 // CHECK14:       omp.inner.for.cond:
10343 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10344 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10345 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10346 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10347 // CHECK14:       omp.inner.for.body:
10348 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10349 // CHECK14-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10350 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10351 // CHECK14-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10352 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
10353 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10354 // CHECK14:       omp.inner.for.inc:
10355 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10356 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10357 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10358 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10359 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10360 // CHECK14:       omp.inner.for.end:
10361 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10362 // CHECK14:       omp.loop.exit:
10363 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10364 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
10365 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
10366 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10367 // CHECK14:       omp.precond.end:
10368 // CHECK14-NEXT:    ret void
10369 //
10370 //
10371 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1
10372 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10373 // CHECK14-NEXT:  entry:
10374 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10375 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10376 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10377 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10378 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10379 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10380 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10381 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10382 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10383 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10384 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10385 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10386 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10387 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10388 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10389 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10390 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
10391 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10392 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10393 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10394 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10395 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10396 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10397 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10398 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10399 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10400 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10401 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10402 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10403 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10404 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10405 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10406 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10407 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10408 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10409 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10410 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10411 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10412 // CHECK14:       omp.precond.then:
10413 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10414 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10415 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10416 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10417 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10418 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10419 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
10420 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10421 // CHECK14-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
10422 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10423 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10424 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10425 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
10426 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10427 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10428 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10429 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
10430 // CHECK14-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10431 // CHECK14:       cond.true:
10432 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10433 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10434 // CHECK14:       cond.false:
10435 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10436 // CHECK14-NEXT:    br label [[COND_END]]
10437 // CHECK14:       cond.end:
10438 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10439 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10440 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10441 // CHECK14-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
10442 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10443 // CHECK14:       omp.inner.for.cond:
10444 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10445 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10446 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10447 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10448 // CHECK14:       omp.inner.for.body:
10449 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10450 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10451 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10452 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
10453 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
10454 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10455 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10456 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
10457 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10458 // CHECK14:       omp.body.continue:
10459 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10460 // CHECK14:       omp.inner.for.inc:
10461 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10462 // CHECK14-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
10463 // CHECK14-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
10464 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10465 // CHECK14:       omp.inner.for.end:
10466 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10467 // CHECK14:       omp.loop.exit:
10468 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10469 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
10470 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
10471 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10472 // CHECK14:       omp.precond.end:
10473 // CHECK14-NEXT:    ret void
10474 //
10475 //
10476 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
10477 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10478 // CHECK14-NEXT:  entry:
10479 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10480 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10481 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10482 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10483 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10484 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10485 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10486 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10487 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10488 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
10489 // CHECK14-NEXT:    ret void
10490 //
10491 //
10492 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2
10493 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10494 // CHECK14-NEXT:  entry:
10495 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10496 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10497 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10498 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10499 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10500 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10501 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10502 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10503 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10504 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10505 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10506 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10507 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10508 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10509 // CHECK14-NEXT:    [[I3:%.*]] = alloca i32, align 4
10510 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10511 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10512 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10513 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10514 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10515 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10516 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10517 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10518 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10519 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10520 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10521 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10522 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10523 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10524 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10525 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10526 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10527 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10528 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10529 // CHECK14:       omp.precond.then:
10530 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10531 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10532 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
10533 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10534 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10535 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10536 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10537 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10538 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10539 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10540 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10541 // CHECK14-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10542 // CHECK14:       cond.true:
10543 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10544 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10545 // CHECK14:       cond.false:
10546 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10547 // CHECK14-NEXT:    br label [[COND_END]]
10548 // CHECK14:       cond.end:
10549 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10550 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10551 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10552 // CHECK14-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10553 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10554 // CHECK14:       omp.inner.for.cond:
10555 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10556 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10557 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10558 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10559 // CHECK14:       omp.inner.for.body:
10560 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10561 // CHECK14-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10562 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10563 // CHECK14-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10564 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
10565 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10566 // CHECK14:       omp.inner.for.inc:
10567 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10568 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10569 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10570 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10571 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10572 // CHECK14:       omp.inner.for.end:
10573 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10574 // CHECK14:       omp.loop.exit:
10575 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10576 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
10577 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
10578 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10579 // CHECK14:       omp.precond.end:
10580 // CHECK14-NEXT:    ret void
10581 //
10582 //
10583 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3
10584 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10585 // CHECK14-NEXT:  entry:
10586 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10587 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10588 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10589 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10590 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10591 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10592 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10593 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10594 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10595 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10596 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10597 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10598 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10599 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10600 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10601 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10602 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
10603 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10604 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10605 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10606 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10607 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10608 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10609 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10610 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10611 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10612 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10613 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10614 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10615 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10616 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10617 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10618 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10619 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10620 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10621 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10622 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10623 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10624 // CHECK14:       omp.precond.then:
10625 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10626 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10627 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10628 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10629 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10630 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10631 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
10632 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10633 // CHECK14-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
10634 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10635 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10636 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10637 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
10638 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10639 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10640 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10641 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
10642 // CHECK14-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10643 // CHECK14:       cond.true:
10644 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10645 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10646 // CHECK14:       cond.false:
10647 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10648 // CHECK14-NEXT:    br label [[COND_END]]
10649 // CHECK14:       cond.end:
10650 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10651 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10652 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10653 // CHECK14-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
10654 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10655 // CHECK14:       omp.inner.for.cond:
10656 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10657 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10658 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10659 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10660 // CHECK14:       omp.inner.for.body:
10661 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10662 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10663 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10664 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
10665 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
10666 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10667 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10668 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
10669 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10670 // CHECK14:       omp.body.continue:
10671 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10672 // CHECK14:       omp.inner.for.inc:
10673 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10674 // CHECK14-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
10675 // CHECK14-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
10676 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10677 // CHECK14:       omp.inner.for.end:
10678 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10679 // CHECK14:       omp.loop.exit:
10680 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10681 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
10682 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
10683 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10684 // CHECK14:       omp.precond.end:
10685 // CHECK14-NEXT:    ret void
10686 //
10687 //
10688 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
10689 // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10690 // CHECK14-NEXT:  entry:
10691 // CHECK14-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
10692 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10693 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10694 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10695 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10696 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10697 // CHECK14-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
10698 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10699 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10700 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10701 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
10702 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10703 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10704 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10705 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
10706 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10707 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10708 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10709 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
10710 // CHECK14-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10711 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
10712 // CHECK14-NEXT:    ret void
10713 //
10714 //
10715 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5
10716 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10717 // CHECK14-NEXT:  entry:
10718 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10719 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10720 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10721 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10722 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10723 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10724 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10725 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10726 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10727 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10728 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10729 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10730 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10731 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10732 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10733 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
10734 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10735 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10736 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10737 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10738 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10739 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10740 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10741 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10742 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10743 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10744 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10745 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10746 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10747 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10748 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10749 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10750 // CHECK14-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10751 // CHECK14-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10752 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10753 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10754 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10755 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10756 // CHECK14:       omp.precond.then:
10757 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10758 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10759 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
10760 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10761 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10762 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
10763 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10764 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
10765 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
10766 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10767 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10768 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10769 // CHECK14-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10770 // CHECK14:       cond.true:
10771 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10772 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10773 // CHECK14:       cond.false:
10774 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10775 // CHECK14-NEXT:    br label [[COND_END]]
10776 // CHECK14:       cond.end:
10777 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10778 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10779 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10780 // CHECK14-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
10781 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10782 // CHECK14:       omp.inner.for.cond:
10783 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10784 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10785 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
10786 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
10787 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10788 // CHECK14:       omp.inner.for.body:
10789 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10790 // CHECK14-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10791 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10792 // CHECK14-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
10793 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
10794 // CHECK14-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10795 // CHECK14-NEXT:    store i32 [[TMP21]], i32* [[CONV7]], align 4
10796 // CHECK14-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10797 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
10798 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10799 // CHECK14:       omp.inner.for.inc:
10800 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10801 // CHECK14-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10802 // CHECK14-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
10803 // CHECK14-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
10804 // CHECK14-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10805 // CHECK14-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10806 // CHECK14-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
10807 // CHECK14-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
10808 // CHECK14-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10809 // CHECK14-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10810 // CHECK14-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
10811 // CHECK14-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
10812 // CHECK14-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10813 // CHECK14-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10814 // CHECK14-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
10815 // CHECK14-NEXT:    br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
10816 // CHECK14:       cond.true12:
10817 // CHECK14-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10818 // CHECK14-NEXT:    br label [[COND_END14:%.*]]
10819 // CHECK14:       cond.false13:
10820 // CHECK14-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10821 // CHECK14-NEXT:    br label [[COND_END14]]
10822 // CHECK14:       cond.end14:
10823 // CHECK14-NEXT:    [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
10824 // CHECK14-NEXT:    store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
10825 // CHECK14-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10826 // CHECK14-NEXT:    store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
10827 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10828 // CHECK14:       omp.inner.for.end:
10829 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10830 // CHECK14:       omp.loop.exit:
10831 // CHECK14-NEXT:    [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10832 // CHECK14-NEXT:    [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
10833 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
10834 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10835 // CHECK14:       omp.precond.end:
10836 // CHECK14-NEXT:    ret void
10837 //
10838 //
10839 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6
10840 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10841 // CHECK14-NEXT:  entry:
10842 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10843 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10844 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10845 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10846 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10847 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10848 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10849 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10850 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10851 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10852 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10853 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10854 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10855 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10856 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10857 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10858 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10859 // CHECK14-NEXT:    [[I6:%.*]] = alloca i32, align 4
10860 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10861 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10862 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10863 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10864 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10865 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10866 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10867 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10868 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10869 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10870 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10871 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10872 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10873 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10874 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10875 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10876 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10877 // CHECK14-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10878 // CHECK14-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10879 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10880 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10881 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10882 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10883 // CHECK14:       omp.precond.then:
10884 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10885 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10886 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10887 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10888 // CHECK14-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10889 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10890 // CHECK14-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
10891 // CHECK14-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
10892 // CHECK14-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
10893 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10894 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10895 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10896 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
10897 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10898 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10899 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10900 // CHECK14-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
10901 // CHECK14-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10902 // CHECK14:       cond.true:
10903 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10904 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10905 // CHECK14:       cond.false:
10906 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10907 // CHECK14-NEXT:    br label [[COND_END]]
10908 // CHECK14:       cond.end:
10909 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10910 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10911 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10912 // CHECK14-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
10913 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10914 // CHECK14:       omp.inner.for.cond:
10915 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10916 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10917 // CHECK14-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10918 // CHECK14-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10919 // CHECK14:       omp.inner.for.body:
10920 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10921 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10922 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10923 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4
10924 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
10925 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10926 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10927 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
10928 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10929 // CHECK14:       omp.body.continue:
10930 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10931 // CHECK14:       omp.inner.for.inc:
10932 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10933 // CHECK14-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
10934 // CHECK14-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
10935 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10936 // CHECK14:       omp.inner.for.end:
10937 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10938 // CHECK14:       omp.loop.exit:
10939 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10940 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
10941 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
10942 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10943 // CHECK14:       omp.precond.end:
10944 // CHECK14-NEXT:    ret void
10945 //
10946 //
10947 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
10948 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10949 // CHECK14-NEXT:  entry:
10950 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10951 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10952 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10953 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10954 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10955 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10956 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10957 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10958 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10959 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
10960 // CHECK14-NEXT:    ret void
10961 //
10962 //
10963 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8
10964 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10965 // CHECK14-NEXT:  entry:
10966 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10967 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10968 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10969 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10970 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10971 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10972 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10973 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10974 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10975 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10976 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10977 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10978 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10979 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10980 // CHECK14-NEXT:    [[I3:%.*]] = alloca i32, align 4
10981 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10982 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10983 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10984 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10985 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10986 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10987 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10988 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10989 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10990 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10991 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10992 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10993 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10994 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10995 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10996 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10997 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10998 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10999 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11000 // CHECK14:       omp.precond.then:
11001 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11002 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11003 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
11004 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11005 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11006 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11007 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
11008 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11009 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11010 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11011 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
11012 // CHECK14-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11013 // CHECK14:       cond.true:
11014 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11015 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11016 // CHECK14:       cond.false:
11017 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11018 // CHECK14-NEXT:    br label [[COND_END]]
11019 // CHECK14:       cond.end:
11020 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
11021 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11022 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11023 // CHECK14-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
11024 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11025 // CHECK14:       omp.inner.for.cond:
11026 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11027 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11028 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
11029 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11030 // CHECK14:       omp.inner.for.body:
11031 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11032 // CHECK14-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
11033 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11034 // CHECK14-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
11035 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
11036 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11037 // CHECK14:       omp.inner.for.inc:
11038 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11039 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11040 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11041 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11042 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11043 // CHECK14:       omp.inner.for.end:
11044 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11045 // CHECK14:       omp.loop.exit:
11046 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11047 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
11048 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
11049 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11050 // CHECK14:       omp.precond.end:
11051 // CHECK14-NEXT:    ret void
11052 //
11053 //
11054 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9
11055 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11056 // CHECK14-NEXT:  entry:
11057 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11058 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11059 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11060 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11061 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11062 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11063 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11064 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11065 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11066 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11067 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11068 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11069 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11070 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11071 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11072 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11073 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
11074 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11075 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11076 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11077 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11078 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11079 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11080 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11081 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11082 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11083 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11084 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11085 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
11086 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11087 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11088 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11089 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11090 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11091 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11092 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11093 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11094 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11095 // CHECK14:       omp.precond.then:
11096 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11097 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11098 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
11099 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11100 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
11101 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11102 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
11103 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11104 // CHECK14-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
11105 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11106 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11107 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11108 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11109 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11110 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
11111 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
11112 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11113 // CHECK14:       omp.dispatch.cond:
11114 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11115 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
11116 // CHECK14-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11117 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
11118 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11119 // CHECK14:       omp.dispatch.body:
11120 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11121 // CHECK14-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
11122 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11123 // CHECK14:       omp.inner.for.cond:
11124 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
11125 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
11126 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
11127 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11128 // CHECK14:       omp.inner.for.body:
11129 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
11130 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
11131 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11132 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15
11133 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15
11134 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
11135 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
11136 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
11137 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11138 // CHECK14:       omp.body.continue:
11139 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11140 // CHECK14:       omp.inner.for.inc:
11141 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
11142 // CHECK14-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
11143 // CHECK14-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
11144 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
11145 // CHECK14:       omp.inner.for.end:
11146 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11147 // CHECK14:       omp.dispatch.inc:
11148 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
11149 // CHECK14:       omp.dispatch.end:
11150 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11151 // CHECK14:       omp.precond.end:
11152 // CHECK14-NEXT:    ret void
11153 //
11154 //
11155 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
11156 // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11157 // CHECK14-NEXT:  entry:
11158 // CHECK14-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
11159 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11160 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11161 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11162 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11163 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11164 // CHECK14-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
11165 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11166 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11167 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11168 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
11169 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11170 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11171 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11172 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11173 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11174 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11175 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11176 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
11177 // CHECK14-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11178 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
11179 // CHECK14-NEXT:    ret void
11180 //
11181 //
11182 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11
11183 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11184 // CHECK14-NEXT:  entry:
11185 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11186 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11187 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11188 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11189 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11190 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11191 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11192 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11193 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11194 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11195 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11196 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11197 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11198 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11199 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11200 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
11201 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11202 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11203 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11204 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11205 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11206 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11207 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11208 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11209 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11210 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11211 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11212 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11213 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11214 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11215 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11216 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11217 // CHECK14-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
11218 // CHECK14-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11219 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11220 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11221 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11222 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11223 // CHECK14:       omp.precond.then:
11224 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11225 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11226 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
11227 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11228 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11229 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11230 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
11231 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11232 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11233 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11234 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
11235 // CHECK14-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11236 // CHECK14:       cond.true:
11237 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11238 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11239 // CHECK14:       cond.false:
11240 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11241 // CHECK14-NEXT:    br label [[COND_END]]
11242 // CHECK14:       cond.end:
11243 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
11244 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11245 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11246 // CHECK14-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
11247 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11248 // CHECK14:       omp.inner.for.cond:
11249 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11250 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11251 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
11252 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11253 // CHECK14:       omp.inner.for.body:
11254 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11255 // CHECK14-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
11256 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11257 // CHECK14-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
11258 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
11259 // CHECK14-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11260 // CHECK14-NEXT:    store i32 [[TMP20]], i32* [[CONV7]], align 4
11261 // CHECK14-NEXT:    [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11262 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
11263 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11264 // CHECK14:       omp.inner.for.inc:
11265 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11266 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11267 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
11268 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11269 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11270 // CHECK14:       omp.inner.for.end:
11271 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11272 // CHECK14:       omp.loop.exit:
11273 // CHECK14-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11274 // CHECK14-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
11275 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
11276 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11277 // CHECK14:       omp.precond.end:
11278 // CHECK14-NEXT:    ret void
11279 //
11280 //
11281 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..12
11282 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11283 // CHECK14-NEXT:  entry:
11284 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11285 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11286 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11287 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11288 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11289 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11290 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11291 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11292 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11293 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11294 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11295 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11296 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11297 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11298 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11299 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11300 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11301 // CHECK14-NEXT:    [[I6:%.*]] = alloca i32, align 4
11302 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11303 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11304 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11305 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11306 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11307 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11308 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11309 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11310 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11311 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11312 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11313 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11314 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11315 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11316 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11317 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11318 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11319 // CHECK14-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
11320 // CHECK14-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11321 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11322 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11323 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11324 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11325 // CHECK14:       omp.precond.then:
11326 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11327 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11328 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
11329 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11330 // CHECK14-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
11331 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11332 // CHECK14-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
11333 // CHECK14-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
11334 // CHECK14-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
11335 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11336 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11337 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
11338 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11339 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11340 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11341 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
11342 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
11343 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11344 // CHECK14:       omp.dispatch.cond:
11345 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11346 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
11347 // CHECK14-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11348 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
11349 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11350 // CHECK14:       omp.dispatch.body:
11351 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11352 // CHECK14-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
11353 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11354 // CHECK14:       omp.inner.for.cond:
11355 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11356 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
11357 // CHECK14-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
11358 // CHECK14-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11359 // CHECK14:       omp.inner.for.body:
11360 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11361 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
11362 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11363 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18
11364 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18
11365 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
11366 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
11367 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
11368 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11369 // CHECK14:       omp.body.continue:
11370 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11371 // CHECK14:       omp.inner.for.inc:
11372 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11373 // CHECK14-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
11374 // CHECK14-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
11375 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
11376 // CHECK14:       omp.inner.for.end:
11377 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11378 // CHECK14:       omp.dispatch.inc:
11379 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
11380 // CHECK14:       omp.dispatch.end:
11381 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11382 // CHECK14:       omp.precond.end:
11383 // CHECK14-NEXT:    ret void
11384 //
11385 //
11386 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
11387 // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
11388 // CHECK14-NEXT:  entry:
11389 // CHECK14-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
11390 // CHECK14-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
11391 // CHECK14-NEXT:    [[M:%.*]] = alloca i32, align 4
11392 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
11393 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
11394 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
11395 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11396 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
11397 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
11398 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
11399 // CHECK14-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
11400 // CHECK14-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
11401 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
11402 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
11403 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
11404 // CHECK14-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
11405 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
11406 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
11407 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
11408 // CHECK14-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
11409 // CHECK14-NEXT:    [[M_CASTED19:%.*]] = alloca i64, align 8
11410 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
11411 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
11412 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
11413 // CHECK14-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
11414 // CHECK14-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
11415 // CHECK14-NEXT:    store i32 10, i32* [[M]], align 4
11416 // CHECK14-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11417 // CHECK14-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
11418 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
11419 // CHECK14-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11420 // CHECK14-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
11421 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
11422 // CHECK14-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11423 // CHECK14-NEXT:    store i8* null, i8** [[TMP4]], align 8
11424 // CHECK14-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11425 // CHECK14-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11426 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11427 // CHECK14-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11428 // CHECK14-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
11429 // CHECK14-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11430 // CHECK14:       omp_offload.failed:
11431 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
11432 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
11433 // CHECK14:       omp_offload.cont:
11434 // CHECK14-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11435 // CHECK14-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
11436 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
11437 // CHECK14-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11438 // CHECK14-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
11439 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
11440 // CHECK14-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
11441 // CHECK14-NEXT:    store i8* null, i8** [[TMP13]], align 8
11442 // CHECK14-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11443 // CHECK14-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11444 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11445 // CHECK14-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11446 // CHECK14-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
11447 // CHECK14-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
11448 // CHECK14:       omp_offload.failed5:
11449 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
11450 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
11451 // CHECK14:       omp_offload.cont6:
11452 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
11453 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
11454 // CHECK14-NEXT:    store i32 [[TMP18]], i32* [[CONV]], align 4
11455 // CHECK14-NEXT:    [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
11456 // CHECK14-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
11457 // CHECK14-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
11458 // CHECK14-NEXT:    store i64 [[TMP19]], i64* [[TMP21]], align 8
11459 // CHECK14-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
11460 // CHECK14-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
11461 // CHECK14-NEXT:    store i64 [[TMP19]], i64* [[TMP23]], align 8
11462 // CHECK14-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
11463 // CHECK14-NEXT:    store i8* null, i8** [[TMP24]], align 8
11464 // CHECK14-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
11465 // CHECK14-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
11466 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
11467 // CHECK14-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
11468 // CHECK14-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
11469 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
11470 // CHECK14-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
11471 // CHECK14-NEXT:    store i8* null, i8** [[TMP29]], align 8
11472 // CHECK14-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
11473 // CHECK14-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
11474 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11475 // CHECK14-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11476 // CHECK14-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
11477 // CHECK14-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
11478 // CHECK14:       omp_offload.failed11:
11479 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
11480 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
11481 // CHECK14:       omp_offload.cont12:
11482 // CHECK14-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
11483 // CHECK14-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
11484 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
11485 // CHECK14-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
11486 // CHECK14-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
11487 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
11488 // CHECK14-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
11489 // CHECK14-NEXT:    store i8* null, i8** [[TMP38]], align 8
11490 // CHECK14-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
11491 // CHECK14-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
11492 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11493 // CHECK14-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11494 // CHECK14-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
11495 // CHECK14-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
11496 // CHECK14:       omp_offload.failed17:
11497 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
11498 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
11499 // CHECK14:       omp_offload.cont18:
11500 // CHECK14-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
11501 // CHECK14-NEXT:    [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
11502 // CHECK14-NEXT:    store i32 [[TMP43]], i32* [[CONV20]], align 4
11503 // CHECK14-NEXT:    [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
11504 // CHECK14-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
11505 // CHECK14-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
11506 // CHECK14-NEXT:    store i64 [[TMP44]], i64* [[TMP46]], align 8
11507 // CHECK14-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
11508 // CHECK14-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
11509 // CHECK14-NEXT:    store i64 [[TMP44]], i64* [[TMP48]], align 8
11510 // CHECK14-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
11511 // CHECK14-NEXT:    store i8* null, i8** [[TMP49]], align 8
11512 // CHECK14-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
11513 // CHECK14-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
11514 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
11515 // CHECK14-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
11516 // CHECK14-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
11517 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
11518 // CHECK14-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
11519 // CHECK14-NEXT:    store i8* null, i8** [[TMP54]], align 8
11520 // CHECK14-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
11521 // CHECK14-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
11522 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11523 // CHECK14-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11524 // CHECK14-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
11525 // CHECK14-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
11526 // CHECK14:       omp_offload.failed25:
11527 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
11528 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
11529 // CHECK14:       omp_offload.cont26:
11530 // CHECK14-NEXT:    ret i32 0
11531 //
11532 //
11533 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
11534 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11535 // CHECK14-NEXT:  entry:
11536 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11537 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11538 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11539 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11540 // CHECK14-NEXT:    ret void
11541 //
11542 //
11543 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14
11544 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11545 // CHECK14-NEXT:  entry:
11546 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11547 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11548 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11549 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11550 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11551 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11552 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11553 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11554 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11555 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11556 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11557 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11558 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11559 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11560 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11561 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11562 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11563 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11564 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11565 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11566 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11567 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11568 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11569 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11570 // CHECK14:       cond.true:
11571 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11572 // CHECK14:       cond.false:
11573 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11574 // CHECK14-NEXT:    br label [[COND_END]]
11575 // CHECK14:       cond.end:
11576 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11577 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11578 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11579 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11580 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11581 // CHECK14:       omp.inner.for.cond:
11582 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11583 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11584 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11585 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11586 // CHECK14:       omp.inner.for.body:
11587 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11588 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11589 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11590 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11591 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11592 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11593 // CHECK14:       omp.inner.for.inc:
11594 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11595 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11596 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11597 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11598 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11599 // CHECK14:       omp.inner.for.end:
11600 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11601 // CHECK14:       omp.loop.exit:
11602 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11603 // CHECK14-NEXT:    ret void
11604 //
11605 //
11606 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15
11607 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11608 // CHECK14-NEXT:  entry:
11609 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11610 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11611 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11612 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11613 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11614 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11615 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11616 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11617 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11618 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11619 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11620 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11621 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11622 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11623 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11624 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11625 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11626 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11627 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11628 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
11629 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11630 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11631 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11632 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11633 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11634 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11635 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11636 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11637 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11638 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11639 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11640 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11641 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11642 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11643 // CHECK14:       cond.true:
11644 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11645 // CHECK14:       cond.false:
11646 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11647 // CHECK14-NEXT:    br label [[COND_END]]
11648 // CHECK14:       cond.end:
11649 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11650 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11651 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11652 // CHECK14-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11653 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11654 // CHECK14:       omp.inner.for.cond:
11655 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11656 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11657 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11658 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11659 // CHECK14:       omp.inner.for.body:
11660 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11661 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11662 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11663 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11664 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
11665 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11666 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11667 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
11668 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11669 // CHECK14:       omp.body.continue:
11670 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11671 // CHECK14:       omp.inner.for.inc:
11672 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11673 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11674 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11675 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11676 // CHECK14:       omp.inner.for.end:
11677 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11678 // CHECK14:       omp.loop.exit:
11679 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
11680 // CHECK14-NEXT:    ret void
11681 //
11682 //
11683 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
11684 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11685 // CHECK14-NEXT:  entry:
11686 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11687 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11688 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11689 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11690 // CHECK14-NEXT:    ret void
11691 //
11692 //
11693 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..17
11694 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11695 // CHECK14-NEXT:  entry:
11696 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11697 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11698 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11699 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11700 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11701 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11702 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11703 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11704 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11705 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11706 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11707 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11708 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11709 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11710 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11711 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11712 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11713 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11714 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11715 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11716 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11717 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11718 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11719 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11720 // CHECK14:       cond.true:
11721 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11722 // CHECK14:       cond.false:
11723 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11724 // CHECK14-NEXT:    br label [[COND_END]]
11725 // CHECK14:       cond.end:
11726 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11727 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11728 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11729 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11730 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11731 // CHECK14:       omp.inner.for.cond:
11732 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11733 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11734 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11735 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11736 // CHECK14:       omp.inner.for.body:
11737 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11738 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11739 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11740 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11741 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11742 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11743 // CHECK14:       omp.inner.for.inc:
11744 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11745 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11746 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11747 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11748 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11749 // CHECK14:       omp.inner.for.end:
11750 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11751 // CHECK14:       omp.loop.exit:
11752 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11753 // CHECK14-NEXT:    ret void
11754 //
11755 //
11756 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..18
11757 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11758 // CHECK14-NEXT:  entry:
11759 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11760 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11761 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11762 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11763 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11764 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11765 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11766 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11767 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11768 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11769 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11770 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11771 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11772 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11773 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11774 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11775 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11776 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11777 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11778 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
11779 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11780 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11781 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11782 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11783 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11784 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11785 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11786 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11787 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11788 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11789 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11790 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11791 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11792 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11793 // CHECK14:       cond.true:
11794 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11795 // CHECK14:       cond.false:
11796 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11797 // CHECK14-NEXT:    br label [[COND_END]]
11798 // CHECK14:       cond.end:
11799 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11800 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11801 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11802 // CHECK14-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11803 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11804 // CHECK14:       omp.inner.for.cond:
11805 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11806 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11807 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11808 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11809 // CHECK14:       omp.inner.for.body:
11810 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11811 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11812 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11813 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11814 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
11815 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11816 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11817 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
11818 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11819 // CHECK14:       omp.body.continue:
11820 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11821 // CHECK14:       omp.inner.for.inc:
11822 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11823 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11824 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11825 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11826 // CHECK14:       omp.inner.for.end:
11827 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11828 // CHECK14:       omp.loop.exit:
11829 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
11830 // CHECK14-NEXT:    ret void
11831 //
11832 //
11833 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
11834 // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11835 // CHECK14-NEXT:  entry:
11836 // CHECK14-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
11837 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11838 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11839 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11840 // CHECK14-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
11841 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11842 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
11843 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11844 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
11845 // CHECK14-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
11846 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11847 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11848 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
11849 // CHECK14-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11850 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
11851 // CHECK14-NEXT:    ret void
11852 //
11853 //
11854 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..21
11855 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11856 // CHECK14-NEXT:  entry:
11857 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11858 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11859 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11860 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11861 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11862 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11863 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11864 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11865 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11866 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11867 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11868 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11869 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11870 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11871 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11872 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11873 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11874 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11875 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11876 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11877 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11878 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11879 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11880 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11881 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11882 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11883 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11884 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11885 // CHECK14:       cond.true:
11886 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11887 // CHECK14:       cond.false:
11888 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11889 // CHECK14-NEXT:    br label [[COND_END]]
11890 // CHECK14:       cond.end:
11891 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11892 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11893 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11894 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11895 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11896 // CHECK14:       omp.inner.for.cond:
11897 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11898 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11899 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11900 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11901 // CHECK14:       omp.inner.for.body:
11902 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11903 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11904 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11905 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11906 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
11907 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11908 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
11909 // CHECK14-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11910 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
11911 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11912 // CHECK14:       omp.inner.for.inc:
11913 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11914 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11915 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11916 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11917 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11918 // CHECK14:       omp.inner.for.end:
11919 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11920 // CHECK14:       omp.loop.exit:
11921 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11922 // CHECK14-NEXT:    ret void
11923 //
11924 //
11925 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..22
11926 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11927 // CHECK14-NEXT:  entry:
11928 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11929 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11930 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11931 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11932 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11933 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11934 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11935 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11936 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11937 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11938 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11939 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11940 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11941 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11942 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11943 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11944 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11945 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11946 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11947 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11948 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11949 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11950 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
11951 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11952 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11953 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11954 // CHECK14-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
11955 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
11956 // CHECK14-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
11957 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11958 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11959 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
11960 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11961 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
11962 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
11963 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11964 // CHECK14:       omp.dispatch.cond:
11965 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11966 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11967 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
11968 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
11969 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11970 // CHECK14:       cond.true:
11971 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11972 // CHECK14-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
11973 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11974 // CHECK14:       cond.false:
11975 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11976 // CHECK14-NEXT:    br label [[COND_END]]
11977 // CHECK14:       cond.end:
11978 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
11979 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11980 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11981 // CHECK14-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
11982 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11983 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11984 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
11985 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11986 // CHECK14:       omp.dispatch.body:
11987 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11988 // CHECK14:       omp.inner.for.cond:
11989 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11990 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11991 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11992 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11993 // CHECK14:       omp.inner.for.body:
11994 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11995 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
11996 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11997 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
11998 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
11999 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
12000 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12001 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
12002 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12003 // CHECK14:       omp.body.continue:
12004 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12005 // CHECK14:       omp.inner.for.inc:
12006 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12007 // CHECK14-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
12008 // CHECK14-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
12009 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12010 // CHECK14:       omp.inner.for.end:
12011 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12012 // CHECK14:       omp.dispatch.inc:
12013 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12014 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12015 // CHECK14-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12016 // CHECK14-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
12017 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12018 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12019 // CHECK14-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
12020 // CHECK14-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
12021 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
12022 // CHECK14:       omp.dispatch.end:
12023 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
12024 // CHECK14-NEXT:    ret void
12025 //
12026 //
12027 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
12028 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12029 // CHECK14-NEXT:  entry:
12030 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12031 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12032 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12033 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
12034 // CHECK14-NEXT:    ret void
12035 //
12036 //
12037 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..25
12038 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12039 // CHECK14-NEXT:  entry:
12040 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12041 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12042 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12043 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12044 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12045 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12046 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12047 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12048 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12049 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12050 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12051 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12052 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12053 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12054 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12055 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12056 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12057 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12058 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12059 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12060 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12061 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12062 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12063 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12064 // CHECK14:       cond.true:
12065 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12066 // CHECK14:       cond.false:
12067 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12068 // CHECK14-NEXT:    br label [[COND_END]]
12069 // CHECK14:       cond.end:
12070 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12071 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12072 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12073 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12074 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12075 // CHECK14:       omp.inner.for.cond:
12076 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12077 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12078 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12079 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12080 // CHECK14:       omp.inner.for.body:
12081 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12082 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12083 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12084 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12085 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
12086 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12087 // CHECK14:       omp.inner.for.inc:
12088 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12089 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12090 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12091 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12092 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12093 // CHECK14:       omp.inner.for.end:
12094 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12095 // CHECK14:       omp.loop.exit:
12096 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12097 // CHECK14-NEXT:    ret void
12098 //
12099 //
12100 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..26
12101 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12102 // CHECK14-NEXT:  entry:
12103 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12104 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12105 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12106 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12107 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12108 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12109 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12110 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12111 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12112 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12113 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12114 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12115 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12116 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12117 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12118 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12119 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12120 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12121 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12122 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12123 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12124 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
12125 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12126 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
12127 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12128 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12129 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12130 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12131 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12132 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12133 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12134 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
12135 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
12136 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12137 // CHECK14:       omp.dispatch.cond:
12138 // CHECK14-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12139 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
12140 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12141 // CHECK14:       omp.dispatch.body:
12142 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12143 // CHECK14-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
12144 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12145 // CHECK14:       omp.inner.for.cond:
12146 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
12147 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
12148 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
12149 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12150 // CHECK14:       omp.inner.for.body:
12151 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
12152 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
12153 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12154 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
12155 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
12156 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
12157 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12158 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
12159 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12160 // CHECK14:       omp.body.continue:
12161 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12162 // CHECK14:       omp.inner.for.inc:
12163 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
12164 // CHECK14-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
12165 // CHECK14-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
12166 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
12167 // CHECK14:       omp.inner.for.end:
12168 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12169 // CHECK14:       omp.dispatch.inc:
12170 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
12171 // CHECK14:       omp.dispatch.end:
12172 // CHECK14-NEXT:    ret void
12173 //
12174 //
12175 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
12176 // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12177 // CHECK14-NEXT:  entry:
12178 // CHECK14-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
12179 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12180 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12181 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12182 // CHECK14-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
12183 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12184 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
12185 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12186 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
12187 // CHECK14-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
12188 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12189 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12190 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
12191 // CHECK14-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12192 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
12193 // CHECK14-NEXT:    ret void
12194 //
12195 //
12196 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..29
12197 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12198 // CHECK14-NEXT:  entry:
12199 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12200 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12201 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12202 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12203 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12204 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12205 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12206 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12207 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12208 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12209 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12210 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12211 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12212 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12213 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12214 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12215 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12216 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12217 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12218 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12219 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12220 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12221 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12222 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12223 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12224 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12225 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12226 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12227 // CHECK14:       cond.true:
12228 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12229 // CHECK14:       cond.false:
12230 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12231 // CHECK14-NEXT:    br label [[COND_END]]
12232 // CHECK14:       cond.end:
12233 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12234 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12235 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12236 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12237 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12238 // CHECK14:       omp.inner.for.cond:
12239 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12240 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12241 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12242 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12243 // CHECK14:       omp.inner.for.body:
12244 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12245 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12246 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12247 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12248 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
12249 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12250 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
12251 // CHECK14-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12252 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
12253 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12254 // CHECK14:       omp.inner.for.inc:
12255 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12256 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12257 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12258 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12259 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12260 // CHECK14:       omp.inner.for.end:
12261 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12262 // CHECK14:       omp.loop.exit:
12263 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12264 // CHECK14-NEXT:    ret void
12265 //
12266 //
12267 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..30
12268 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12269 // CHECK14-NEXT:  entry:
12270 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12271 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12272 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12273 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12274 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12275 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12276 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12277 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12278 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12279 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12280 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12281 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12282 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12283 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12284 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12285 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12286 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12287 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12288 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12289 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12290 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12291 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12292 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12293 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12294 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12295 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12296 // CHECK14-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
12297 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
12298 // CHECK14-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
12299 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12300 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12301 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
12302 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12303 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12304 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12305 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
12306 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
12307 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12308 // CHECK14:       omp.dispatch.cond:
12309 // CHECK14-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12310 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
12311 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12312 // CHECK14:       omp.dispatch.body:
12313 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12314 // CHECK14-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
12315 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12316 // CHECK14:       omp.inner.for.cond:
12317 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12318 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
12319 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
12320 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12321 // CHECK14:       omp.inner.for.body:
12322 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12323 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
12324 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12325 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
12326 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
12327 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
12328 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12329 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
12330 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12331 // CHECK14:       omp.body.continue:
12332 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12333 // CHECK14:       omp.inner.for.inc:
12334 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12335 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
12336 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
12337 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
12338 // CHECK14:       omp.inner.for.end:
12339 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12340 // CHECK14:       omp.dispatch.inc:
12341 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
12342 // CHECK14:       omp.dispatch.end:
12343 // CHECK14-NEXT:    ret void
12344 //
12345 //
12346 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
12347 // CHECK14-SAME: () #[[ATTR5:[0-9]+]] {
12348 // CHECK14-NEXT:  entry:
12349 // CHECK14-NEXT:    call void @__tgt_register_requires(i64 1)
12350 // CHECK14-NEXT:    ret void
12351 //
12352 //
12353 // CHECK15-LABEL: define {{[^@]+}}@main
12354 // CHECK15-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
12355 // CHECK15-NEXT:  entry:
12356 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
12357 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
12358 // CHECK15-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
12359 // CHECK15-NEXT:    [[N:%.*]] = alloca i32, align 4
12360 // CHECK15-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
12361 // CHECK15-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
12362 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
12363 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12364 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
12365 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
12366 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
12367 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
12368 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12369 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12370 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12371 // CHECK15-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
12372 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
12373 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
12374 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
12375 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
12376 // CHECK15-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
12377 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
12378 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
12379 // CHECK15-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
12380 // CHECK15-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
12381 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
12382 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
12383 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
12384 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
12385 // CHECK15-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
12386 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
12387 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
12388 // CHECK15-NEXT:    [[N_CASTED31:%.*]] = alloca i32, align 4
12389 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
12390 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
12391 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
12392 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
12393 // CHECK15-NEXT:    [[_TMP36:%.*]] = alloca i32, align 4
12394 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
12395 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
12396 // CHECK15-NEXT:    [[M_CASTED45:%.*]] = alloca i32, align 4
12397 // CHECK15-NEXT:    [[N_CASTED46:%.*]] = alloca i32, align 4
12398 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
12399 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
12400 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
12401 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
12402 // CHECK15-NEXT:    [[_TMP51:%.*]] = alloca i32, align 4
12403 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
12404 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
12405 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
12406 // CHECK15-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
12407 // CHECK15-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
12408 // CHECK15-NEXT:    store i32 100, i32* [[N]], align 4
12409 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
12410 // CHECK15-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
12411 // CHECK15-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
12412 // CHECK15-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
12413 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
12414 // CHECK15-NEXT:    store i32 10, i32* [[M]], align 4
12415 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
12416 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
12417 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
12418 // CHECK15-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
12419 // CHECK15-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
12420 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12421 // CHECK15-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
12422 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
12423 // CHECK15-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12424 // CHECK15-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
12425 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
12426 // CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12427 // CHECK15-NEXT:    store i64 4, i64* [[TMP10]], align 4
12428 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
12429 // CHECK15-NEXT:    store i8* null, i8** [[TMP11]], align 4
12430 // CHECK15-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
12431 // CHECK15-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
12432 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
12433 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
12434 // CHECK15-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
12435 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
12436 // CHECK15-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
12437 // CHECK15-NEXT:    store i64 4, i64* [[TMP16]], align 4
12438 // CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
12439 // CHECK15-NEXT:    store i8* null, i8** [[TMP17]], align 4
12440 // CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
12441 // CHECK15-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
12442 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
12443 // CHECK15-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
12444 // CHECK15-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
12445 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
12446 // CHECK15-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
12447 // CHECK15-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
12448 // CHECK15-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
12449 // CHECK15-NEXT:    store i8* null, i8** [[TMP23]], align 4
12450 // CHECK15-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12451 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12452 // CHECK15-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12453 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
12454 // CHECK15-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
12455 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12456 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
12457 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12458 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12459 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12460 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12461 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
12462 // CHECK15-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
12463 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
12464 // CHECK15-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12465 // CHECK15-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
12466 // CHECK15-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12467 // CHECK15:       omp_offload.failed:
12468 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
12469 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
12470 // CHECK15:       omp_offload.cont:
12471 // CHECK15-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
12472 // CHECK15-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
12473 // CHECK15-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
12474 // CHECK15-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
12475 // CHECK15-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
12476 // CHECK15-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12477 // CHECK15-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
12478 // CHECK15-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
12479 // CHECK15-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12480 // CHECK15-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
12481 // CHECK15-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
12482 // CHECK15-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12483 // CHECK15-NEXT:    store i64 4, i64* [[TMP41]], align 4
12484 // CHECK15-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
12485 // CHECK15-NEXT:    store i8* null, i8** [[TMP42]], align 4
12486 // CHECK15-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
12487 // CHECK15-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
12488 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
12489 // CHECK15-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
12490 // CHECK15-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
12491 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
12492 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
12493 // CHECK15-NEXT:    store i64 4, i64* [[TMP47]], align 4
12494 // CHECK15-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
12495 // CHECK15-NEXT:    store i8* null, i8** [[TMP48]], align 4
12496 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
12497 // CHECK15-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
12498 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
12499 // CHECK15-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
12500 // CHECK15-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
12501 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
12502 // CHECK15-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
12503 // CHECK15-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
12504 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
12505 // CHECK15-NEXT:    store i8* null, i8** [[TMP54]], align 4
12506 // CHECK15-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12507 // CHECK15-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12508 // CHECK15-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12509 // CHECK15-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
12510 // CHECK15-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
12511 // CHECK15-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
12512 // CHECK15-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
12513 // CHECK15-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
12514 // CHECK15-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
12515 // CHECK15-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
12516 // CHECK15-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
12517 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
12518 // CHECK15-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
12519 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
12520 // CHECK15-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12521 // CHECK15-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
12522 // CHECK15-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
12523 // CHECK15:       omp_offload.failed15:
12524 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12525 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
12526 // CHECK15:       omp_offload.cont16:
12527 // CHECK15-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
12528 // CHECK15-NEXT:    store i32 [[TMP64]], i32* [[M_CASTED]], align 4
12529 // CHECK15-NEXT:    [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
12530 // CHECK15-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N]], align 4
12531 // CHECK15-NEXT:    store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
12532 // CHECK15-NEXT:    [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
12533 // CHECK15-NEXT:    [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
12534 // CHECK15-NEXT:    [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
12535 // CHECK15-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
12536 // CHECK15-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
12537 // CHECK15-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
12538 // CHECK15-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
12539 // CHECK15-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
12540 // CHECK15-NEXT:    store i32 [[TMP65]], i32* [[TMP73]], align 4
12541 // CHECK15-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
12542 // CHECK15-NEXT:    store i64 4, i64* [[TMP74]], align 4
12543 // CHECK15-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
12544 // CHECK15-NEXT:    store i8* null, i8** [[TMP75]], align 4
12545 // CHECK15-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
12546 // CHECK15-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
12547 // CHECK15-NEXT:    store i32 [[TMP67]], i32* [[TMP77]], align 4
12548 // CHECK15-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
12549 // CHECK15-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
12550 // CHECK15-NEXT:    store i32 [[TMP67]], i32* [[TMP79]], align 4
12551 // CHECK15-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
12552 // CHECK15-NEXT:    store i64 4, i64* [[TMP80]], align 4
12553 // CHECK15-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
12554 // CHECK15-NEXT:    store i8* null, i8** [[TMP81]], align 4
12555 // CHECK15-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
12556 // CHECK15-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
12557 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP83]], align 4
12558 // CHECK15-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
12559 // CHECK15-NEXT:    [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
12560 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP85]], align 4
12561 // CHECK15-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
12562 // CHECK15-NEXT:    store i64 4, i64* [[TMP86]], align 4
12563 // CHECK15-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
12564 // CHECK15-NEXT:    store i8* null, i8** [[TMP87]], align 4
12565 // CHECK15-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
12566 // CHECK15-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
12567 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 4
12568 // CHECK15-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
12569 // CHECK15-NEXT:    [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
12570 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP91]], align 4
12571 // CHECK15-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
12572 // CHECK15-NEXT:    store i64 [[TMP69]], i64* [[TMP92]], align 4
12573 // CHECK15-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
12574 // CHECK15-NEXT:    store i8* null, i8** [[TMP93]], align 4
12575 // CHECK15-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
12576 // CHECK15-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
12577 // CHECK15-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
12578 // CHECK15-NEXT:    [[TMP97:%.*]] = load i32, i32* [[N]], align 4
12579 // CHECK15-NEXT:    store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
12580 // CHECK15-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
12581 // CHECK15-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
12582 // CHECK15-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
12583 // CHECK15-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
12584 // CHECK15-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
12585 // CHECK15-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
12586 // CHECK15-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
12587 // CHECK15-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
12588 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
12589 // CHECK15-NEXT:    [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12590 // CHECK15-NEXT:    [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
12591 // CHECK15-NEXT:    br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
12592 // CHECK15:       omp_offload.failed29:
12593 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12594 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
12595 // CHECK15:       omp_offload.cont30:
12596 // CHECK15-NEXT:    [[TMP103:%.*]] = load i32, i32* [[N]], align 4
12597 // CHECK15-NEXT:    store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
12598 // CHECK15-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
12599 // CHECK15-NEXT:    [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
12600 // CHECK15-NEXT:    [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
12601 // CHECK15-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
12602 // CHECK15-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
12603 // CHECK15-NEXT:    store i32 [[TMP104]], i32* [[TMP108]], align 4
12604 // CHECK15-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
12605 // CHECK15-NEXT:    [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
12606 // CHECK15-NEXT:    store i32 [[TMP104]], i32* [[TMP110]], align 4
12607 // CHECK15-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
12608 // CHECK15-NEXT:    store i64 4, i64* [[TMP111]], align 4
12609 // CHECK15-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
12610 // CHECK15-NEXT:    store i8* null, i8** [[TMP112]], align 4
12611 // CHECK15-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
12612 // CHECK15-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
12613 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP114]], align 4
12614 // CHECK15-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
12615 // CHECK15-NEXT:    [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
12616 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP116]], align 4
12617 // CHECK15-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
12618 // CHECK15-NEXT:    store i64 4, i64* [[TMP117]], align 4
12619 // CHECK15-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
12620 // CHECK15-NEXT:    store i8* null, i8** [[TMP118]], align 4
12621 // CHECK15-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
12622 // CHECK15-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
12623 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 4
12624 // CHECK15-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
12625 // CHECK15-NEXT:    [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
12626 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP122]], align 4
12627 // CHECK15-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
12628 // CHECK15-NEXT:    store i64 [[TMP106]], i64* [[TMP123]], align 4
12629 // CHECK15-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
12630 // CHECK15-NEXT:    store i8* null, i8** [[TMP124]], align 4
12631 // CHECK15-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
12632 // CHECK15-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
12633 // CHECK15-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
12634 // CHECK15-NEXT:    [[TMP128:%.*]] = load i32, i32* [[N]], align 4
12635 // CHECK15-NEXT:    store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
12636 // CHECK15-NEXT:    [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
12637 // CHECK15-NEXT:    [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
12638 // CHECK15-NEXT:    [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
12639 // CHECK15-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
12640 // CHECK15-NEXT:    store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
12641 // CHECK15-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
12642 // CHECK15-NEXT:    [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
12643 // CHECK15-NEXT:    [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
12644 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
12645 // CHECK15-NEXT:    [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12646 // CHECK15-NEXT:    [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
12647 // CHECK15-NEXT:    br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
12648 // CHECK15:       omp_offload.failed43:
12649 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12650 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT44]]
12651 // CHECK15:       omp_offload.cont44:
12652 // CHECK15-NEXT:    [[TMP134:%.*]] = load i32, i32* [[M]], align 4
12653 // CHECK15-NEXT:    store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
12654 // CHECK15-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
12655 // CHECK15-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
12656 // CHECK15-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
12657 // CHECK15-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
12658 // CHECK15-NEXT:    [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
12659 // CHECK15-NEXT:    [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
12660 // CHECK15-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
12661 // CHECK15-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
12662 // CHECK15-NEXT:    store i32 [[TMP135]], i32* [[TMP141]], align 4
12663 // CHECK15-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
12664 // CHECK15-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
12665 // CHECK15-NEXT:    store i32 [[TMP135]], i32* [[TMP143]], align 4
12666 // CHECK15-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
12667 // CHECK15-NEXT:    store i64 4, i64* [[TMP144]], align 4
12668 // CHECK15-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
12669 // CHECK15-NEXT:    store i8* null, i8** [[TMP145]], align 4
12670 // CHECK15-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
12671 // CHECK15-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
12672 // CHECK15-NEXT:    store i32 [[TMP137]], i32* [[TMP147]], align 4
12673 // CHECK15-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
12674 // CHECK15-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
12675 // CHECK15-NEXT:    store i32 [[TMP137]], i32* [[TMP149]], align 4
12676 // CHECK15-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
12677 // CHECK15-NEXT:    store i64 4, i64* [[TMP150]], align 4
12678 // CHECK15-NEXT:    [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
12679 // CHECK15-NEXT:    store i8* null, i8** [[TMP151]], align 4
12680 // CHECK15-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
12681 // CHECK15-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
12682 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP153]], align 4
12683 // CHECK15-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
12684 // CHECK15-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
12685 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP155]], align 4
12686 // CHECK15-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
12687 // CHECK15-NEXT:    store i64 4, i64* [[TMP156]], align 4
12688 // CHECK15-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
12689 // CHECK15-NEXT:    store i8* null, i8** [[TMP157]], align 4
12690 // CHECK15-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
12691 // CHECK15-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
12692 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP159]], align 4
12693 // CHECK15-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
12694 // CHECK15-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
12695 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP161]], align 4
12696 // CHECK15-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
12697 // CHECK15-NEXT:    store i64 [[TMP139]], i64* [[TMP162]], align 4
12698 // CHECK15-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
12699 // CHECK15-NEXT:    store i8* null, i8** [[TMP163]], align 4
12700 // CHECK15-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
12701 // CHECK15-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
12702 // CHECK15-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
12703 // CHECK15-NEXT:    [[TMP167:%.*]] = load i32, i32* [[N]], align 4
12704 // CHECK15-NEXT:    store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
12705 // CHECK15-NEXT:    [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
12706 // CHECK15-NEXT:    [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
12707 // CHECK15-NEXT:    [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
12708 // CHECK15-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
12709 // CHECK15-NEXT:    store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
12710 // CHECK15-NEXT:    [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
12711 // CHECK15-NEXT:    [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
12712 // CHECK15-NEXT:    [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
12713 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
12714 // CHECK15-NEXT:    [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12715 // CHECK15-NEXT:    [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
12716 // CHECK15-NEXT:    br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
12717 // CHECK15:       omp_offload.failed58:
12718 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12719 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT59]]
12720 // CHECK15:       omp_offload.cont59:
12721 // CHECK15-NEXT:    [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
12722 // CHECK15-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
12723 // CHECK15-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
12724 // CHECK15-NEXT:    [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
12725 // CHECK15-NEXT:    call void @llvm.stackrestore(i8* [[TMP174]])
12726 // CHECK15-NEXT:    [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
12727 // CHECK15-NEXT:    ret i32 [[TMP175]]
12728 //
12729 //
12730 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
12731 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
12732 // CHECK15-NEXT:  entry:
12733 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12734 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12735 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
12736 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
12737 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12738 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
12739 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12740 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12741 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
12742 // CHECK15-NEXT:    ret void
12743 //
12744 //
12745 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined.
12746 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12747 // CHECK15-NEXT:  entry:
12748 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12749 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12750 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
12751 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12752 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
12753 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12754 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12755 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12756 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12757 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
12758 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12759 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12760 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12761 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12762 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
12763 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12764 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12765 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
12766 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12767 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
12768 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
12769 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12770 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12771 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12772 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12773 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12774 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12775 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12776 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12777 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12778 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
12779 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12780 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12781 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12782 // CHECK15:       omp.precond.then:
12783 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12784 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12785 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
12786 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12787 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12788 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12789 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
12790 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12791 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12792 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12793 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
12794 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12795 // CHECK15:       cond.true:
12796 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12797 // CHECK15-NEXT:    br label [[COND_END:%.*]]
12798 // CHECK15:       cond.false:
12799 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12800 // CHECK15-NEXT:    br label [[COND_END]]
12801 // CHECK15:       cond.end:
12802 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
12803 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12804 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12805 // CHECK15-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
12806 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12807 // CHECK15:       omp.inner.for.cond:
12808 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12809 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12810 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
12811 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12812 // CHECK15:       omp.inner.for.body:
12813 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12814 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12815 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
12816 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12817 // CHECK15:       omp.inner.for.inc:
12818 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12819 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12820 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12821 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12822 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
12823 // CHECK15:       omp.inner.for.end:
12824 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12825 // CHECK15:       omp.loop.exit:
12826 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12827 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
12828 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
12829 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
12830 // CHECK15:       omp.precond.end:
12831 // CHECK15-NEXT:    ret void
12832 //
12833 //
12834 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1
12835 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12836 // CHECK15-NEXT:  entry:
12837 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12838 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12839 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12840 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12841 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
12842 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12843 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
12844 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12845 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12846 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12847 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12848 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
12849 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12850 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12851 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12852 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12853 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
12854 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12855 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12856 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12857 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12858 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
12859 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12860 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
12861 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
12862 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12863 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12864 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12865 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12866 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12867 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12868 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12869 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12870 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12871 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
12872 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12873 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12874 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12875 // CHECK15:       omp.precond.then:
12876 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12877 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12878 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
12879 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12880 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12881 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
12882 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
12883 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12884 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12885 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12886 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
12887 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12888 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12889 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12890 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
12891 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12892 // CHECK15:       cond.true:
12893 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12894 // CHECK15-NEXT:    br label [[COND_END:%.*]]
12895 // CHECK15:       cond.false:
12896 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12897 // CHECK15-NEXT:    br label [[COND_END]]
12898 // CHECK15:       cond.end:
12899 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
12900 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12901 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12902 // CHECK15-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
12903 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12904 // CHECK15:       omp.inner.for.cond:
12905 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12906 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12907 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
12908 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12909 // CHECK15:       omp.inner.for.body:
12910 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12911 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
12912 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12913 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
12914 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
12915 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
12916 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
12917 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12918 // CHECK15:       omp.body.continue:
12919 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12920 // CHECK15:       omp.inner.for.inc:
12921 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12922 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
12923 // CHECK15-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
12924 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
12925 // CHECK15:       omp.inner.for.end:
12926 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12927 // CHECK15:       omp.loop.exit:
12928 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12929 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
12930 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
12931 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
12932 // CHECK15:       omp.precond.end:
12933 // CHECK15-NEXT:    ret void
12934 //
12935 //
12936 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
12937 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12938 // CHECK15-NEXT:  entry:
12939 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12940 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12941 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
12942 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
12943 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12944 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
12945 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12946 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12947 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
12948 // CHECK15-NEXT:    ret void
12949 //
12950 //
12951 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2
12952 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12953 // CHECK15-NEXT:  entry:
12954 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12955 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12956 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
12957 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12958 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
12959 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12960 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12961 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12962 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12963 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
12964 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12965 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12966 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12967 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12968 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
12969 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12970 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12971 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
12972 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12973 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
12974 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
12975 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12976 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12977 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12978 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12979 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12980 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12981 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12982 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12983 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12984 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
12985 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12986 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12987 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12988 // CHECK15:       omp.precond.then:
12989 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12990 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12991 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
12992 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12993 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12994 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12995 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
12996 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12997 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12998 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12999 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13000 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13001 // CHECK15:       cond.true:
13002 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13003 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13004 // CHECK15:       cond.false:
13005 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13006 // CHECK15-NEXT:    br label [[COND_END]]
13007 // CHECK15:       cond.end:
13008 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13009 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13010 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13011 // CHECK15-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13012 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13013 // CHECK15:       omp.inner.for.cond:
13014 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13015 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13016 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13017 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13018 // CHECK15:       omp.inner.for.body:
13019 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13020 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13021 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
13022 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13023 // CHECK15:       omp.inner.for.inc:
13024 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13025 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13026 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
13027 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13028 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13029 // CHECK15:       omp.inner.for.end:
13030 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13031 // CHECK15:       omp.loop.exit:
13032 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13033 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13034 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13035 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13036 // CHECK15:       omp.precond.end:
13037 // CHECK15-NEXT:    ret void
13038 //
13039 //
13040 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3
13041 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13042 // CHECK15-NEXT:  entry:
13043 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13044 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13045 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13046 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13047 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13048 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13049 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13050 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13051 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13052 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13053 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13054 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13055 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13056 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13057 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13058 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13059 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13060 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13061 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13062 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13063 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13064 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13065 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13066 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13067 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13068 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13069 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13070 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13071 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13072 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13073 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13074 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13075 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13076 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13077 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13078 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13079 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13080 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13081 // CHECK15:       omp.precond.then:
13082 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13083 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13084 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13085 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13086 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13087 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13088 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13089 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13090 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13091 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13092 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
13093 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13094 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13095 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13096 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
13097 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13098 // CHECK15:       cond.true:
13099 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13100 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13101 // CHECK15:       cond.false:
13102 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13103 // CHECK15-NEXT:    br label [[COND_END]]
13104 // CHECK15:       cond.end:
13105 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
13106 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13107 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13108 // CHECK15-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
13109 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13110 // CHECK15:       omp.inner.for.cond:
13111 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13112 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13113 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13114 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13115 // CHECK15:       omp.inner.for.body:
13116 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13117 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13118 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13119 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
13120 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
13121 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
13122 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
13123 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13124 // CHECK15:       omp.body.continue:
13125 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13126 // CHECK15:       omp.inner.for.inc:
13127 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13128 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
13129 // CHECK15-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
13130 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13131 // CHECK15:       omp.inner.for.end:
13132 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13133 // CHECK15:       omp.loop.exit:
13134 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13135 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13136 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13137 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13138 // CHECK15:       omp.precond.end:
13139 // CHECK15-NEXT:    ret void
13140 //
13141 //
13142 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
13143 // CHECK15-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13144 // CHECK15-NEXT:  entry:
13145 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
13146 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13147 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13148 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13149 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13150 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13151 // CHECK15-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
13152 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13153 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13154 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13155 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13156 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13157 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
13158 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13159 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13160 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13161 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13162 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
13163 // CHECK15-NEXT:    ret void
13164 //
13165 //
13166 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..5
13167 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13168 // CHECK15-NEXT:  entry:
13169 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13170 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13171 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13172 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13173 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13174 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13175 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13176 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13177 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13178 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13179 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13180 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13181 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13182 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13183 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13184 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13185 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13186 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13187 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13188 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13189 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13190 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13191 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13192 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13193 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13194 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13195 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13196 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13197 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13198 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13199 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13200 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13201 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13202 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13203 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13204 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13205 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13206 // CHECK15:       omp.precond.then:
13207 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13208 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13209 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
13210 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13211 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13212 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13213 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13214 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
13215 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
13216 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13217 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13218 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
13219 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13220 // CHECK15:       cond.true:
13221 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13222 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13223 // CHECK15:       cond.false:
13224 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13225 // CHECK15-NEXT:    br label [[COND_END]]
13226 // CHECK15:       cond.end:
13227 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
13228 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13229 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13230 // CHECK15-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
13231 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13232 // CHECK15:       omp.inner.for.cond:
13233 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13234 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13235 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
13236 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
13237 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13238 // CHECK15:       omp.inner.for.body:
13239 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13240 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13241 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13242 // CHECK15-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13243 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13244 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
13245 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13246 // CHECK15:       omp.inner.for.inc:
13247 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13248 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13249 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
13250 // CHECK15-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
13251 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13252 // CHECK15-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13253 // CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
13254 // CHECK15-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
13255 // CHECK15-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13256 // CHECK15-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13257 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
13258 // CHECK15-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
13259 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13260 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13261 // CHECK15-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
13262 // CHECK15-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
13263 // CHECK15:       cond.true11:
13264 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13265 // CHECK15-NEXT:    br label [[COND_END13:%.*]]
13266 // CHECK15:       cond.false12:
13267 // CHECK15-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13268 // CHECK15-NEXT:    br label [[COND_END13]]
13269 // CHECK15:       cond.end13:
13270 // CHECK15-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
13271 // CHECK15-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
13272 // CHECK15-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13273 // CHECK15-NEXT:    store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
13274 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13275 // CHECK15:       omp.inner.for.end:
13276 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13277 // CHECK15:       omp.loop.exit:
13278 // CHECK15-NEXT:    [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13279 // CHECK15-NEXT:    [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
13280 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
13281 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13282 // CHECK15:       omp.precond.end:
13283 // CHECK15-NEXT:    ret void
13284 //
13285 //
13286 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6
13287 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13288 // CHECK15-NEXT:  entry:
13289 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13290 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13291 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13292 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13293 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13294 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13295 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13296 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13297 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13298 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13299 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13300 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13301 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13302 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13303 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13304 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13305 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13306 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13307 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13308 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13309 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13310 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13311 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13312 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13313 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13314 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13315 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13316 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13317 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13318 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13319 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13320 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13321 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13322 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13323 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13324 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13325 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13326 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13327 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13328 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13329 // CHECK15:       omp.precond.then:
13330 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13331 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13332 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13333 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13334 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13335 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13336 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13337 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13338 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13339 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13340 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
13341 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13342 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13343 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13344 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
13345 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13346 // CHECK15:       cond.true:
13347 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13348 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13349 // CHECK15:       cond.false:
13350 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13351 // CHECK15-NEXT:    br label [[COND_END]]
13352 // CHECK15:       cond.end:
13353 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
13354 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13355 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13356 // CHECK15-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
13357 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13358 // CHECK15:       omp.inner.for.cond:
13359 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13360 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13361 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13362 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13363 // CHECK15:       omp.inner.for.body:
13364 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13365 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13366 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13367 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
13368 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
13369 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
13370 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
13371 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13372 // CHECK15:       omp.body.continue:
13373 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13374 // CHECK15:       omp.inner.for.inc:
13375 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13376 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
13377 // CHECK15-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
13378 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13379 // CHECK15:       omp.inner.for.end:
13380 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13381 // CHECK15:       omp.loop.exit:
13382 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13383 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13384 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13385 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13386 // CHECK15:       omp.precond.end:
13387 // CHECK15-NEXT:    ret void
13388 //
13389 //
13390 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
13391 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13392 // CHECK15-NEXT:  entry:
13393 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13394 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13395 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13396 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13397 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13398 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13399 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13400 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13401 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
13402 // CHECK15-NEXT:    ret void
13403 //
13404 //
13405 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..8
13406 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13407 // CHECK15-NEXT:  entry:
13408 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13409 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13410 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13411 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13412 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13413 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13414 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13415 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13416 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13417 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13418 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13419 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13420 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13421 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13422 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13423 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13424 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13425 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13426 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13427 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13428 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13429 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13430 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13431 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13432 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13433 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13434 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13435 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13436 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13437 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13438 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13439 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13440 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13441 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13442 // CHECK15:       omp.precond.then:
13443 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13444 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13445 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
13446 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13447 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13448 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13449 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
13450 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13451 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13452 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13453 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13454 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13455 // CHECK15:       cond.true:
13456 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13457 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13458 // CHECK15:       cond.false:
13459 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13460 // CHECK15-NEXT:    br label [[COND_END]]
13461 // CHECK15:       cond.end:
13462 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13463 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13464 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13465 // CHECK15-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13466 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13467 // CHECK15:       omp.inner.for.cond:
13468 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13469 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13470 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13471 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13472 // CHECK15:       omp.inner.for.body:
13473 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13474 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13475 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
13476 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13477 // CHECK15:       omp.inner.for.inc:
13478 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13479 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13480 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
13481 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13482 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13483 // CHECK15:       omp.inner.for.end:
13484 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13485 // CHECK15:       omp.loop.exit:
13486 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13487 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13488 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13489 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13490 // CHECK15:       omp.precond.end:
13491 // CHECK15-NEXT:    ret void
13492 //
13493 //
13494 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..9
13495 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13496 // CHECK15-NEXT:  entry:
13497 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13498 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13499 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13500 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13501 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13502 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13503 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13504 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13505 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13506 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13507 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13508 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13509 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13510 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13511 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13512 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13513 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13514 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13515 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13516 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13517 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13518 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13519 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13520 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13521 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13522 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13523 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13524 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13525 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13526 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13527 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13528 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13529 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13530 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13531 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13532 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13533 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13534 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13535 // CHECK15:       omp.precond.then:
13536 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13537 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13538 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13539 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13540 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13541 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13542 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13543 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13544 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13545 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13546 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13547 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13548 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
13549 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
13550 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
13551 // CHECK15:       omp.dispatch.cond:
13552 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13553 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
13554 // CHECK15-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13555 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
13556 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13557 // CHECK15:       omp.dispatch.body:
13558 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13559 // CHECK15-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
13560 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13561 // CHECK15:       omp.inner.for.cond:
13562 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13563 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
13564 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
13565 // CHECK15-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13566 // CHECK15:       omp.inner.for.body:
13567 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13568 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
13569 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13570 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
13571 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
13572 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
13573 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
13574 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13575 // CHECK15:       omp.body.continue:
13576 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13577 // CHECK15:       omp.inner.for.inc:
13578 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13579 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
13580 // CHECK15-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13581 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
13582 // CHECK15:       omp.inner.for.end:
13583 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
13584 // CHECK15:       omp.dispatch.inc:
13585 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
13586 // CHECK15:       omp.dispatch.end:
13587 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13588 // CHECK15:       omp.precond.end:
13589 // CHECK15-NEXT:    ret void
13590 //
13591 //
13592 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
13593 // CHECK15-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13594 // CHECK15-NEXT:  entry:
13595 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
13596 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13597 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13598 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13599 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13600 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13601 // CHECK15-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
13602 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13603 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13604 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13605 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13606 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13607 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
13608 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13609 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13610 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13611 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13612 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
13613 // CHECK15-NEXT:    ret void
13614 //
13615 //
13616 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11
13617 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13618 // CHECK15-NEXT:  entry:
13619 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13620 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13621 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13622 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13623 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13624 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13625 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13626 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13627 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13628 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13629 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13630 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13631 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13632 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13633 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13634 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13635 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13636 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13637 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13638 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13639 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13640 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13641 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13642 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13643 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13644 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13645 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13646 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13647 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13648 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13649 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13650 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13651 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13652 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13653 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13654 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13655 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13656 // CHECK15:       omp.precond.then:
13657 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13658 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13659 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
13660 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13661 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13662 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13663 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
13664 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13665 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13666 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13667 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13668 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13669 // CHECK15:       cond.true:
13670 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13671 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13672 // CHECK15:       cond.false:
13673 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13674 // CHECK15-NEXT:    br label [[COND_END]]
13675 // CHECK15:       cond.end:
13676 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13677 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13678 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13679 // CHECK15-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13680 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13681 // CHECK15:       omp.inner.for.cond:
13682 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13683 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13684 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13685 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13686 // CHECK15:       omp.inner.for.body:
13687 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13688 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13689 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13690 // CHECK15-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13691 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13692 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
13693 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13694 // CHECK15:       omp.inner.for.inc:
13695 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13696 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13697 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
13698 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13699 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13700 // CHECK15:       omp.inner.for.end:
13701 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13702 // CHECK15:       omp.loop.exit:
13703 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13704 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
13705 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
13706 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13707 // CHECK15:       omp.precond.end:
13708 // CHECK15-NEXT:    ret void
13709 //
13710 //
13711 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..12
13712 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13713 // CHECK15-NEXT:  entry:
13714 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13715 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13716 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13717 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13718 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13719 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13720 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13721 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13722 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13723 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13724 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13725 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13726 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13727 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13728 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13729 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13730 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13731 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13732 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13733 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13734 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13735 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13736 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13737 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13738 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13739 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13740 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13741 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13742 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13743 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13744 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13745 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13746 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13747 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13748 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13749 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13750 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13751 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13752 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13753 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13754 // CHECK15:       omp.precond.then:
13755 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13756 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13757 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13758 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13759 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13760 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13761 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13762 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13763 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13764 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13765 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13766 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13767 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13768 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
13769 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
13770 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
13771 // CHECK15:       omp.dispatch.cond:
13772 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13773 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
13774 // CHECK15-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13775 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
13776 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13777 // CHECK15:       omp.dispatch.body:
13778 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13779 // CHECK15-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
13780 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13781 // CHECK15:       omp.inner.for.cond:
13782 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13783 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
13784 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
13785 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13786 // CHECK15:       omp.inner.for.body:
13787 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13788 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
13789 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13790 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
13791 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
13792 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
13793 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
13794 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13795 // CHECK15:       omp.body.continue:
13796 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13797 // CHECK15:       omp.inner.for.inc:
13798 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13799 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
13800 // CHECK15-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13801 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
13802 // CHECK15:       omp.inner.for.end:
13803 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
13804 // CHECK15:       omp.dispatch.inc:
13805 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
13806 // CHECK15:       omp.dispatch.end:
13807 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13808 // CHECK15:       omp.precond.end:
13809 // CHECK15-NEXT:    ret void
13810 //
13811 //
13812 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
13813 // CHECK15-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
13814 // CHECK15-NEXT:  entry:
13815 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
13816 // CHECK15-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
13817 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
13818 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
13819 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
13820 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
13821 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13822 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
13823 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
13824 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
13825 // CHECK15-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
13826 // CHECK15-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
13827 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
13828 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
13829 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
13830 // CHECK15-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
13831 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
13832 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
13833 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
13834 // CHECK15-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
13835 // CHECK15-NEXT:    [[M_CASTED19:%.*]] = alloca i32, align 4
13836 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
13837 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
13838 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
13839 // CHECK15-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
13840 // CHECK15-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
13841 // CHECK15-NEXT:    store i32 10, i32* [[M]], align 4
13842 // CHECK15-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13843 // CHECK15-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
13844 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
13845 // CHECK15-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13846 // CHECK15-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
13847 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
13848 // CHECK15-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
13849 // CHECK15-NEXT:    store i8* null, i8** [[TMP4]], align 4
13850 // CHECK15-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13851 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13852 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13853 // CHECK15-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13854 // CHECK15-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
13855 // CHECK15-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13856 // CHECK15:       omp_offload.failed:
13857 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
13858 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
13859 // CHECK15:       omp_offload.cont:
13860 // CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13861 // CHECK15-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
13862 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
13863 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13864 // CHECK15-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
13865 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
13866 // CHECK15-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
13867 // CHECK15-NEXT:    store i8* null, i8** [[TMP13]], align 4
13868 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13869 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13870 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13871 // CHECK15-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13872 // CHECK15-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
13873 // CHECK15-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
13874 // CHECK15:       omp_offload.failed5:
13875 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
13876 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
13877 // CHECK15:       omp_offload.cont6:
13878 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
13879 // CHECK15-NEXT:    store i32 [[TMP18]], i32* [[M_CASTED]], align 4
13880 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
13881 // CHECK15-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
13882 // CHECK15-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
13883 // CHECK15-NEXT:    store i32 [[TMP19]], i32* [[TMP21]], align 4
13884 // CHECK15-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
13885 // CHECK15-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
13886 // CHECK15-NEXT:    store i32 [[TMP19]], i32* [[TMP23]], align 4
13887 // CHECK15-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
13888 // CHECK15-NEXT:    store i8* null, i8** [[TMP24]], align 4
13889 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
13890 // CHECK15-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
13891 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
13892 // CHECK15-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
13893 // CHECK15-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
13894 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
13895 // CHECK15-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
13896 // CHECK15-NEXT:    store i8* null, i8** [[TMP29]], align 4
13897 // CHECK15-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
13898 // CHECK15-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
13899 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13900 // CHECK15-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13901 // CHECK15-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
13902 // CHECK15-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
13903 // CHECK15:       omp_offload.failed11:
13904 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
13905 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
13906 // CHECK15:       omp_offload.cont12:
13907 // CHECK15-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
13908 // CHECK15-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
13909 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
13910 // CHECK15-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
13911 // CHECK15-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
13912 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
13913 // CHECK15-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
13914 // CHECK15-NEXT:    store i8* null, i8** [[TMP38]], align 4
13915 // CHECK15-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
13916 // CHECK15-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
13917 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13918 // CHECK15-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13919 // CHECK15-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
13920 // CHECK15-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
13921 // CHECK15:       omp_offload.failed17:
13922 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
13923 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
13924 // CHECK15:       omp_offload.cont18:
13925 // CHECK15-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
13926 // CHECK15-NEXT:    store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
13927 // CHECK15-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
13928 // CHECK15-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
13929 // CHECK15-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
13930 // CHECK15-NEXT:    store i32 [[TMP44]], i32* [[TMP46]], align 4
13931 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
13932 // CHECK15-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
13933 // CHECK15-NEXT:    store i32 [[TMP44]], i32* [[TMP48]], align 4
13934 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
13935 // CHECK15-NEXT:    store i8* null, i8** [[TMP49]], align 4
13936 // CHECK15-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
13937 // CHECK15-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
13938 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
13939 // CHECK15-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
13940 // CHECK15-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
13941 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
13942 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
13943 // CHECK15-NEXT:    store i8* null, i8** [[TMP54]], align 4
13944 // CHECK15-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
13945 // CHECK15-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
13946 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
13947 // CHECK15-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13948 // CHECK15-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
13949 // CHECK15-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
13950 // CHECK15:       omp_offload.failed24:
13951 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
13952 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
13953 // CHECK15:       omp_offload.cont25:
13954 // CHECK15-NEXT:    ret i32 0
13955 //
13956 //
13957 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
13958 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13959 // CHECK15-NEXT:  entry:
13960 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13961 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
13962 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
13963 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
13964 // CHECK15-NEXT:    ret void
13965 //
13966 //
13967 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14
13968 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13969 // CHECK15-NEXT:  entry:
13970 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13971 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13972 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13973 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13974 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13975 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13976 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13977 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13978 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13979 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13980 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13981 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13982 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
13983 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
13984 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13985 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13986 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13987 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13988 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13989 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13990 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13991 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13992 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13993 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13994 // CHECK15:       cond.true:
13995 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13996 // CHECK15:       cond.false:
13997 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13998 // CHECK15-NEXT:    br label [[COND_END]]
13999 // CHECK15:       cond.end:
14000 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14001 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14002 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14003 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14004 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14005 // CHECK15:       omp.inner.for.cond:
14006 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14007 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14008 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14009 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14010 // CHECK15:       omp.inner.for.body:
14011 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14012 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14013 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14014 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14015 // CHECK15:       omp.inner.for.inc:
14016 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14017 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14018 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14019 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14020 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14021 // CHECK15:       omp.inner.for.end:
14022 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14023 // CHECK15:       omp.loop.exit:
14024 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14025 // CHECK15-NEXT:    ret void
14026 //
14027 //
14028 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15
14029 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14030 // CHECK15-NEXT:  entry:
14031 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14032 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14033 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14034 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14035 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14036 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14037 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14038 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14039 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14040 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14041 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14042 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14043 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14044 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14045 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14046 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14047 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14048 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14049 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14050 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14051 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14052 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14053 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14054 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14055 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14056 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14057 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14058 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
14059 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14060 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14061 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14062 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14063 // CHECK15:       cond.true:
14064 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14065 // CHECK15:       cond.false:
14066 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14067 // CHECK15-NEXT:    br label [[COND_END]]
14068 // CHECK15:       cond.end:
14069 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14070 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14071 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14072 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
14073 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14074 // CHECK15:       omp.inner.for.cond:
14075 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14076 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14077 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14078 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14079 // CHECK15:       omp.inner.for.body:
14080 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14081 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14082 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14083 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
14084 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
14085 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
14086 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
14087 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14088 // CHECK15:       omp.body.continue:
14089 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14090 // CHECK15:       omp.inner.for.inc:
14091 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14092 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14093 // CHECK15-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14094 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14095 // CHECK15:       omp.inner.for.end:
14096 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14097 // CHECK15:       omp.loop.exit:
14098 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
14099 // CHECK15-NEXT:    ret void
14100 //
14101 //
14102 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
14103 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14104 // CHECK15-NEXT:  entry:
14105 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14106 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14107 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14108 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14109 // CHECK15-NEXT:    ret void
14110 //
14111 //
14112 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..17
14113 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14114 // CHECK15-NEXT:  entry:
14115 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14116 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14117 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14118 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14119 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14120 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14121 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14122 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14123 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14124 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14125 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14126 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14127 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14128 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14129 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14130 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14131 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14132 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14133 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14134 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14135 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14136 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14137 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14138 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14139 // CHECK15:       cond.true:
14140 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14141 // CHECK15:       cond.false:
14142 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14143 // CHECK15-NEXT:    br label [[COND_END]]
14144 // CHECK15:       cond.end:
14145 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14146 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14147 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14148 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14149 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14150 // CHECK15:       omp.inner.for.cond:
14151 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14152 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14153 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14154 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14155 // CHECK15:       omp.inner.for.body:
14156 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14157 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14158 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14159 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14160 // CHECK15:       omp.inner.for.inc:
14161 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14162 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14163 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14164 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14165 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14166 // CHECK15:       omp.inner.for.end:
14167 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14168 // CHECK15:       omp.loop.exit:
14169 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14170 // CHECK15-NEXT:    ret void
14171 //
14172 //
14173 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18
14174 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14175 // CHECK15-NEXT:  entry:
14176 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14177 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14178 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14179 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14180 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14181 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14182 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14183 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14184 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14185 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14186 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14187 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14188 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14189 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14190 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14191 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14192 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14193 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14194 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14195 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14196 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14197 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14198 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14199 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14200 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14201 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14202 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14203 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
14204 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14205 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14206 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14207 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14208 // CHECK15:       cond.true:
14209 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14210 // CHECK15:       cond.false:
14211 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14212 // CHECK15-NEXT:    br label [[COND_END]]
14213 // CHECK15:       cond.end:
14214 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14215 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14216 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14217 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
14218 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14219 // CHECK15:       omp.inner.for.cond:
14220 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14221 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14222 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14223 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14224 // CHECK15:       omp.inner.for.body:
14225 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14226 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14227 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14228 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
14229 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
14230 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
14231 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
14232 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14233 // CHECK15:       omp.body.continue:
14234 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14235 // CHECK15:       omp.inner.for.inc:
14236 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14237 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14238 // CHECK15-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14239 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14240 // CHECK15:       omp.inner.for.end:
14241 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14242 // CHECK15:       omp.loop.exit:
14243 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
14244 // CHECK15-NEXT:    ret void
14245 //
14246 //
14247 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
14248 // CHECK15-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14249 // CHECK15-NEXT:  entry:
14250 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
14251 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14252 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14253 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14254 // CHECK15-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
14255 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14256 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14257 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
14258 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
14259 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14260 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14261 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14262 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
14263 // CHECK15-NEXT:    ret void
14264 //
14265 //
14266 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..21
14267 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14268 // CHECK15-NEXT:  entry:
14269 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14270 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14271 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14272 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14273 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14274 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14275 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14276 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14277 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14278 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14279 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14280 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14281 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14282 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14283 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14284 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14285 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14286 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14287 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14288 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14289 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14290 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14291 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14292 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14293 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14294 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14295 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14296 // CHECK15:       cond.true:
14297 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14298 // CHECK15:       cond.false:
14299 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14300 // CHECK15-NEXT:    br label [[COND_END]]
14301 // CHECK15:       cond.end:
14302 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14303 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14304 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14305 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14306 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14307 // CHECK15:       omp.inner.for.cond:
14308 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14309 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14310 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14311 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14312 // CHECK15:       omp.inner.for.body:
14313 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14314 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14315 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14316 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14317 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14318 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
14319 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14320 // CHECK15:       omp.inner.for.inc:
14321 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14322 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14323 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14324 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14325 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14326 // CHECK15:       omp.inner.for.end:
14327 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14328 // CHECK15:       omp.loop.exit:
14329 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14330 // CHECK15-NEXT:    ret void
14331 //
14332 //
14333 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22
14334 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14335 // CHECK15-NEXT:  entry:
14336 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14337 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14338 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14339 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14340 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14341 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14342 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14343 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14344 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14345 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14346 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14347 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14348 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14349 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14350 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14351 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14352 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14353 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14354 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14355 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14356 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14357 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14358 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14359 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14360 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14361 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14362 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14363 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14364 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14365 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14366 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
14367 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
14368 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14369 // CHECK15:       omp.dispatch.cond:
14370 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14371 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14372 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
14373 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14374 // CHECK15:       cond.true:
14375 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14376 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14377 // CHECK15:       cond.false:
14378 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14379 // CHECK15-NEXT:    br label [[COND_END]]
14380 // CHECK15:       cond.end:
14381 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
14382 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14383 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14384 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
14385 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14386 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14387 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
14388 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14389 // CHECK15:       omp.dispatch.body:
14390 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14391 // CHECK15:       omp.inner.for.cond:
14392 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14393 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14394 // CHECK15-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14395 // CHECK15-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14396 // CHECK15:       omp.inner.for.body:
14397 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14398 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
14399 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14400 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
14401 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
14402 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
14403 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
14404 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14405 // CHECK15:       omp.body.continue:
14406 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14407 // CHECK15:       omp.inner.for.inc:
14408 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14409 // CHECK15-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
14410 // CHECK15-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
14411 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14412 // CHECK15:       omp.inner.for.end:
14413 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14414 // CHECK15:       omp.dispatch.inc:
14415 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14416 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14417 // CHECK15-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
14418 // CHECK15-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
14419 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14420 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14421 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14422 // CHECK15-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
14423 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
14424 // CHECK15:       omp.dispatch.end:
14425 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
14426 // CHECK15-NEXT:    ret void
14427 //
14428 //
14429 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
14430 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14431 // CHECK15-NEXT:  entry:
14432 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14433 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14434 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14435 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14436 // CHECK15-NEXT:    ret void
14437 //
14438 //
14439 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..25
14440 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14441 // CHECK15-NEXT:  entry:
14442 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14443 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14444 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14445 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14446 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14447 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14448 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14449 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14450 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14451 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14452 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14453 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14454 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14455 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14456 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14457 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14458 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14459 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14460 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14461 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14462 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14463 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14464 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14465 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14466 // CHECK15:       cond.true:
14467 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14468 // CHECK15:       cond.false:
14469 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14470 // CHECK15-NEXT:    br label [[COND_END]]
14471 // CHECK15:       cond.end:
14472 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14473 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14474 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14475 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14476 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14477 // CHECK15:       omp.inner.for.cond:
14478 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14479 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14480 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14481 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14482 // CHECK15:       omp.inner.for.body:
14483 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14484 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14485 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14486 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14487 // CHECK15:       omp.inner.for.inc:
14488 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14489 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14490 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14491 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14492 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14493 // CHECK15:       omp.inner.for.end:
14494 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14495 // CHECK15:       omp.loop.exit:
14496 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14497 // CHECK15-NEXT:    ret void
14498 //
14499 //
14500 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26
14501 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14502 // CHECK15-NEXT:  entry:
14503 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14504 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14505 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14506 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14507 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14508 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14509 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14510 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14511 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14512 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14513 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14514 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14515 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14516 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14517 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14518 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14519 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14520 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14521 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14522 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14523 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14524 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14525 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14526 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14527 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14528 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14529 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14530 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14531 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14532 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
14533 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
14534 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14535 // CHECK15:       omp.dispatch.cond:
14536 // CHECK15-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14537 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
14538 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14539 // CHECK15:       omp.dispatch.body:
14540 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14541 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
14542 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14543 // CHECK15:       omp.inner.for.cond:
14544 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14545 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
14546 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
14547 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14548 // CHECK15:       omp.inner.for.body:
14549 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14550 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
14551 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14552 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
14553 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
14554 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
14555 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
14556 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14557 // CHECK15:       omp.body.continue:
14558 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14559 // CHECK15:       omp.inner.for.inc:
14560 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14561 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
14562 // CHECK15-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14563 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
14564 // CHECK15:       omp.inner.for.end:
14565 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14566 // CHECK15:       omp.dispatch.inc:
14567 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
14568 // CHECK15:       omp.dispatch.end:
14569 // CHECK15-NEXT:    ret void
14570 //
14571 //
14572 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
14573 // CHECK15-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14574 // CHECK15-NEXT:  entry:
14575 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
14576 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14577 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14578 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14579 // CHECK15-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
14580 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14581 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14582 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
14583 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
14584 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14585 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14586 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14587 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
14588 // CHECK15-NEXT:    ret void
14589 //
14590 //
14591 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..29
14592 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14593 // CHECK15-NEXT:  entry:
14594 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14595 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14596 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14597 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14598 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14599 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14600 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14601 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14602 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14603 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14604 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14605 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14606 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14607 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14608 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14609 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14610 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14611 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14612 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14613 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14614 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14615 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14616 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14617 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14618 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14619 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14620 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14621 // CHECK15:       cond.true:
14622 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14623 // CHECK15:       cond.false:
14624 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14625 // CHECK15-NEXT:    br label [[COND_END]]
14626 // CHECK15:       cond.end:
14627 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14628 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14629 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14630 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14631 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14632 // CHECK15:       omp.inner.for.cond:
14633 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14634 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14635 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14636 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14637 // CHECK15:       omp.inner.for.body:
14638 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14639 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14640 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14641 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14642 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14643 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
14644 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14645 // CHECK15:       omp.inner.for.inc:
14646 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14647 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14648 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14649 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14650 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14651 // CHECK15:       omp.inner.for.end:
14652 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14653 // CHECK15:       omp.loop.exit:
14654 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14655 // CHECK15-NEXT:    ret void
14656 //
14657 //
14658 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30
14659 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14660 // CHECK15-NEXT:  entry:
14661 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14662 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14663 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14664 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14665 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14666 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14667 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14668 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14669 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14670 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14671 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14672 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14673 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14674 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14675 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14676 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14677 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14678 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14679 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14680 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14681 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14682 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14683 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14684 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14685 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14686 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14687 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14688 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14689 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14690 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14691 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14692 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14693 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
14694 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
14695 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14696 // CHECK15:       omp.dispatch.cond:
14697 // CHECK15-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14698 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
14699 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14700 // CHECK15:       omp.dispatch.body:
14701 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14702 // CHECK15-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
14703 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14704 // CHECK15:       omp.inner.for.cond:
14705 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14706 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
14707 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
14708 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14709 // CHECK15:       omp.inner.for.body:
14710 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14711 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
14712 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14713 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
14714 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
14715 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
14716 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
14717 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14718 // CHECK15:       omp.body.continue:
14719 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14720 // CHECK15:       omp.inner.for.inc:
14721 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14722 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
14723 // CHECK15-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14724 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
14725 // CHECK15:       omp.inner.for.end:
14726 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14727 // CHECK15:       omp.dispatch.inc:
14728 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
14729 // CHECK15:       omp.dispatch.end:
14730 // CHECK15-NEXT:    ret void
14731 //
14732 //
14733 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
14734 // CHECK15-SAME: () #[[ATTR5:[0-9]+]] {
14735 // CHECK15-NEXT:  entry:
14736 // CHECK15-NEXT:    call void @__tgt_register_requires(i64 1)
14737 // CHECK15-NEXT:    ret void
14738 //
14739 //
14740 // CHECK16-LABEL: define {{[^@]+}}@main
14741 // CHECK16-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
14742 // CHECK16-NEXT:  entry:
14743 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
14744 // CHECK16-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
14745 // CHECK16-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
14746 // CHECK16-NEXT:    [[N:%.*]] = alloca i32, align 4
14747 // CHECK16-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
14748 // CHECK16-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
14749 // CHECK16-NEXT:    [[M:%.*]] = alloca i32, align 4
14750 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
14751 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
14752 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
14753 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
14754 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
14755 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14756 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14757 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14758 // CHECK16-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
14759 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
14760 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
14761 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
14762 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
14763 // CHECK16-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
14764 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
14765 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
14766 // CHECK16-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
14767 // CHECK16-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
14768 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
14769 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
14770 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
14771 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
14772 // CHECK16-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
14773 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
14774 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
14775 // CHECK16-NEXT:    [[N_CASTED31:%.*]] = alloca i32, align 4
14776 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
14777 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
14778 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
14779 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
14780 // CHECK16-NEXT:    [[_TMP36:%.*]] = alloca i32, align 4
14781 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
14782 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
14783 // CHECK16-NEXT:    [[M_CASTED45:%.*]] = alloca i32, align 4
14784 // CHECK16-NEXT:    [[N_CASTED46:%.*]] = alloca i32, align 4
14785 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
14786 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
14787 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
14788 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
14789 // CHECK16-NEXT:    [[_TMP51:%.*]] = alloca i32, align 4
14790 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
14791 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
14792 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
14793 // CHECK16-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
14794 // CHECK16-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
14795 // CHECK16-NEXT:    store i32 100, i32* [[N]], align 4
14796 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
14797 // CHECK16-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
14798 // CHECK16-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
14799 // CHECK16-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
14800 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
14801 // CHECK16-NEXT:    store i32 10, i32* [[M]], align 4
14802 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
14803 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
14804 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
14805 // CHECK16-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
14806 // CHECK16-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
14807 // CHECK16-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14808 // CHECK16-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
14809 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
14810 // CHECK16-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14811 // CHECK16-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
14812 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
14813 // CHECK16-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14814 // CHECK16-NEXT:    store i64 4, i64* [[TMP10]], align 4
14815 // CHECK16-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
14816 // CHECK16-NEXT:    store i8* null, i8** [[TMP11]], align 4
14817 // CHECK16-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
14818 // CHECK16-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
14819 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
14820 // CHECK16-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
14821 // CHECK16-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
14822 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
14823 // CHECK16-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
14824 // CHECK16-NEXT:    store i64 4, i64* [[TMP16]], align 4
14825 // CHECK16-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
14826 // CHECK16-NEXT:    store i8* null, i8** [[TMP17]], align 4
14827 // CHECK16-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
14828 // CHECK16-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
14829 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
14830 // CHECK16-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
14831 // CHECK16-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
14832 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
14833 // CHECK16-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
14834 // CHECK16-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
14835 // CHECK16-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
14836 // CHECK16-NEXT:    store i8* null, i8** [[TMP23]], align 4
14837 // CHECK16-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14838 // CHECK16-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14839 // CHECK16-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
14840 // CHECK16-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
14841 // CHECK16-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
14842 // CHECK16-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14843 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
14844 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14845 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14846 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14847 // CHECK16-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14848 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
14849 // CHECK16-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
14850 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
14851 // CHECK16-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14852 // CHECK16-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
14853 // CHECK16-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
14854 // CHECK16:       omp_offload.failed:
14855 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
14856 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT]]
14857 // CHECK16:       omp_offload.cont:
14858 // CHECK16-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
14859 // CHECK16-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
14860 // CHECK16-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
14861 // CHECK16-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
14862 // CHECK16-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
14863 // CHECK16-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
14864 // CHECK16-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
14865 // CHECK16-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
14866 // CHECK16-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
14867 // CHECK16-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
14868 // CHECK16-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
14869 // CHECK16-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
14870 // CHECK16-NEXT:    store i64 4, i64* [[TMP41]], align 4
14871 // CHECK16-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
14872 // CHECK16-NEXT:    store i8* null, i8** [[TMP42]], align 4
14873 // CHECK16-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
14874 // CHECK16-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
14875 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
14876 // CHECK16-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
14877 // CHECK16-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
14878 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
14879 // CHECK16-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
14880 // CHECK16-NEXT:    store i64 4, i64* [[TMP47]], align 4
14881 // CHECK16-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
14882 // CHECK16-NEXT:    store i8* null, i8** [[TMP48]], align 4
14883 // CHECK16-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
14884 // CHECK16-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
14885 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
14886 // CHECK16-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
14887 // CHECK16-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
14888 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
14889 // CHECK16-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
14890 // CHECK16-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
14891 // CHECK16-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
14892 // CHECK16-NEXT:    store i8* null, i8** [[TMP54]], align 4
14893 // CHECK16-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
14894 // CHECK16-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
14895 // CHECK16-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
14896 // CHECK16-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
14897 // CHECK16-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
14898 // CHECK16-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
14899 // CHECK16-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
14900 // CHECK16-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
14901 // CHECK16-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
14902 // CHECK16-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
14903 // CHECK16-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
14904 // CHECK16-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
14905 // CHECK16-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
14906 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
14907 // CHECK16-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14908 // CHECK16-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
14909 // CHECK16-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
14910 // CHECK16:       omp_offload.failed15:
14911 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
14912 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
14913 // CHECK16:       omp_offload.cont16:
14914 // CHECK16-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
14915 // CHECK16-NEXT:    store i32 [[TMP64]], i32* [[M_CASTED]], align 4
14916 // CHECK16-NEXT:    [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
14917 // CHECK16-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N]], align 4
14918 // CHECK16-NEXT:    store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
14919 // CHECK16-NEXT:    [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
14920 // CHECK16-NEXT:    [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
14921 // CHECK16-NEXT:    [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
14922 // CHECK16-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
14923 // CHECK16-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
14924 // CHECK16-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
14925 // CHECK16-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
14926 // CHECK16-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
14927 // CHECK16-NEXT:    store i32 [[TMP65]], i32* [[TMP73]], align 4
14928 // CHECK16-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
14929 // CHECK16-NEXT:    store i64 4, i64* [[TMP74]], align 4
14930 // CHECK16-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
14931 // CHECK16-NEXT:    store i8* null, i8** [[TMP75]], align 4
14932 // CHECK16-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
14933 // CHECK16-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
14934 // CHECK16-NEXT:    store i32 [[TMP67]], i32* [[TMP77]], align 4
14935 // CHECK16-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
14936 // CHECK16-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
14937 // CHECK16-NEXT:    store i32 [[TMP67]], i32* [[TMP79]], align 4
14938 // CHECK16-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
14939 // CHECK16-NEXT:    store i64 4, i64* [[TMP80]], align 4
14940 // CHECK16-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
14941 // CHECK16-NEXT:    store i8* null, i8** [[TMP81]], align 4
14942 // CHECK16-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
14943 // CHECK16-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
14944 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP83]], align 4
14945 // CHECK16-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
14946 // CHECK16-NEXT:    [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
14947 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP85]], align 4
14948 // CHECK16-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
14949 // CHECK16-NEXT:    store i64 4, i64* [[TMP86]], align 4
14950 // CHECK16-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
14951 // CHECK16-NEXT:    store i8* null, i8** [[TMP87]], align 4
14952 // CHECK16-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
14953 // CHECK16-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
14954 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 4
14955 // CHECK16-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
14956 // CHECK16-NEXT:    [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
14957 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP91]], align 4
14958 // CHECK16-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
14959 // CHECK16-NEXT:    store i64 [[TMP69]], i64* [[TMP92]], align 4
14960 // CHECK16-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
14961 // CHECK16-NEXT:    store i8* null, i8** [[TMP93]], align 4
14962 // CHECK16-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
14963 // CHECK16-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
14964 // CHECK16-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
14965 // CHECK16-NEXT:    [[TMP97:%.*]] = load i32, i32* [[N]], align 4
14966 // CHECK16-NEXT:    store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
14967 // CHECK16-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
14968 // CHECK16-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
14969 // CHECK16-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
14970 // CHECK16-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
14971 // CHECK16-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
14972 // CHECK16-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
14973 // CHECK16-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
14974 // CHECK16-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
14975 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
14976 // CHECK16-NEXT:    [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14977 // CHECK16-NEXT:    [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
14978 // CHECK16-NEXT:    br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
14979 // CHECK16:       omp_offload.failed29:
14980 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
14981 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
14982 // CHECK16:       omp_offload.cont30:
14983 // CHECK16-NEXT:    [[TMP103:%.*]] = load i32, i32* [[N]], align 4
14984 // CHECK16-NEXT:    store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
14985 // CHECK16-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
14986 // CHECK16-NEXT:    [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
14987 // CHECK16-NEXT:    [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
14988 // CHECK16-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
14989 // CHECK16-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
14990 // CHECK16-NEXT:    store i32 [[TMP104]], i32* [[TMP108]], align 4
14991 // CHECK16-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
14992 // CHECK16-NEXT:    [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
14993 // CHECK16-NEXT:    store i32 [[TMP104]], i32* [[TMP110]], align 4
14994 // CHECK16-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
14995 // CHECK16-NEXT:    store i64 4, i64* [[TMP111]], align 4
14996 // CHECK16-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
14997 // CHECK16-NEXT:    store i8* null, i8** [[TMP112]], align 4
14998 // CHECK16-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
14999 // CHECK16-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
15000 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP114]], align 4
15001 // CHECK16-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
15002 // CHECK16-NEXT:    [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
15003 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP116]], align 4
15004 // CHECK16-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
15005 // CHECK16-NEXT:    store i64 4, i64* [[TMP117]], align 4
15006 // CHECK16-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
15007 // CHECK16-NEXT:    store i8* null, i8** [[TMP118]], align 4
15008 // CHECK16-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
15009 // CHECK16-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
15010 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 4
15011 // CHECK16-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
15012 // CHECK16-NEXT:    [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
15013 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP122]], align 4
15014 // CHECK16-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
15015 // CHECK16-NEXT:    store i64 [[TMP106]], i64* [[TMP123]], align 4
15016 // CHECK16-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
15017 // CHECK16-NEXT:    store i8* null, i8** [[TMP124]], align 4
15018 // CHECK16-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
15019 // CHECK16-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
15020 // CHECK16-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
15021 // CHECK16-NEXT:    [[TMP128:%.*]] = load i32, i32* [[N]], align 4
15022 // CHECK16-NEXT:    store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
15023 // CHECK16-NEXT:    [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
15024 // CHECK16-NEXT:    [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
15025 // CHECK16-NEXT:    [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
15026 // CHECK16-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
15027 // CHECK16-NEXT:    store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
15028 // CHECK16-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
15029 // CHECK16-NEXT:    [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
15030 // CHECK16-NEXT:    [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
15031 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
15032 // CHECK16-NEXT:    [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15033 // CHECK16-NEXT:    [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
15034 // CHECK16-NEXT:    br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
15035 // CHECK16:       omp_offload.failed43:
15036 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
15037 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT44]]
15038 // CHECK16:       omp_offload.cont44:
15039 // CHECK16-NEXT:    [[TMP134:%.*]] = load i32, i32* [[M]], align 4
15040 // CHECK16-NEXT:    store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
15041 // CHECK16-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
15042 // CHECK16-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
15043 // CHECK16-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
15044 // CHECK16-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
15045 // CHECK16-NEXT:    [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
15046 // CHECK16-NEXT:    [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
15047 // CHECK16-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
15048 // CHECK16-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
15049 // CHECK16-NEXT:    store i32 [[TMP135]], i32* [[TMP141]], align 4
15050 // CHECK16-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
15051 // CHECK16-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
15052 // CHECK16-NEXT:    store i32 [[TMP135]], i32* [[TMP143]], align 4
15053 // CHECK16-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
15054 // CHECK16-NEXT:    store i64 4, i64* [[TMP144]], align 4
15055 // CHECK16-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
15056 // CHECK16-NEXT:    store i8* null, i8** [[TMP145]], align 4
15057 // CHECK16-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
15058 // CHECK16-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
15059 // CHECK16-NEXT:    store i32 [[TMP137]], i32* [[TMP147]], align 4
15060 // CHECK16-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
15061 // CHECK16-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
15062 // CHECK16-NEXT:    store i32 [[TMP137]], i32* [[TMP149]], align 4
15063 // CHECK16-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
15064 // CHECK16-NEXT:    store i64 4, i64* [[TMP150]], align 4
15065 // CHECK16-NEXT:    [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
15066 // CHECK16-NEXT:    store i8* null, i8** [[TMP151]], align 4
15067 // CHECK16-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
15068 // CHECK16-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
15069 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP153]], align 4
15070 // CHECK16-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
15071 // CHECK16-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
15072 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP155]], align 4
15073 // CHECK16-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
15074 // CHECK16-NEXT:    store i64 4, i64* [[TMP156]], align 4
15075 // CHECK16-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
15076 // CHECK16-NEXT:    store i8* null, i8** [[TMP157]], align 4
15077 // CHECK16-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
15078 // CHECK16-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
15079 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP159]], align 4
15080 // CHECK16-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
15081 // CHECK16-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
15082 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP161]], align 4
15083 // CHECK16-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
15084 // CHECK16-NEXT:    store i64 [[TMP139]], i64* [[TMP162]], align 4
15085 // CHECK16-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
15086 // CHECK16-NEXT:    store i8* null, i8** [[TMP163]], align 4
15087 // CHECK16-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
15088 // CHECK16-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
15089 // CHECK16-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
15090 // CHECK16-NEXT:    [[TMP167:%.*]] = load i32, i32* [[N]], align 4
15091 // CHECK16-NEXT:    store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
15092 // CHECK16-NEXT:    [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
15093 // CHECK16-NEXT:    [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
15094 // CHECK16-NEXT:    [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
15095 // CHECK16-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
15096 // CHECK16-NEXT:    store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
15097 // CHECK16-NEXT:    [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
15098 // CHECK16-NEXT:    [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
15099 // CHECK16-NEXT:    [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
15100 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
15101 // CHECK16-NEXT:    [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15102 // CHECK16-NEXT:    [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
15103 // CHECK16-NEXT:    br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
15104 // CHECK16:       omp_offload.failed58:
15105 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
15106 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT59]]
15107 // CHECK16:       omp_offload.cont59:
15108 // CHECK16-NEXT:    [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
15109 // CHECK16-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
15110 // CHECK16-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
15111 // CHECK16-NEXT:    [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
15112 // CHECK16-NEXT:    call void @llvm.stackrestore(i8* [[TMP174]])
15113 // CHECK16-NEXT:    [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
15114 // CHECK16-NEXT:    ret i32 [[TMP175]]
15115 //
15116 //
15117 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
15118 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
15119 // CHECK16-NEXT:  entry:
15120 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15121 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15122 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15123 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15124 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15125 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15126 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15127 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15128 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
15129 // CHECK16-NEXT:    ret void
15130 //
15131 //
15132 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined.
15133 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15134 // CHECK16-NEXT:  entry:
15135 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15136 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15137 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15138 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15139 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15140 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15141 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15142 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15143 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15144 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15145 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15146 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15147 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15148 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15149 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15150 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15151 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15152 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15153 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15154 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15155 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15156 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15157 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15158 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15159 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15160 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15161 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15162 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15163 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15164 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15165 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15166 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15167 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15168 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15169 // CHECK16:       omp.precond.then:
15170 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15171 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15172 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
15173 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15174 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15175 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15176 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
15177 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15178 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15179 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15180 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
15181 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15182 // CHECK16:       cond.true:
15183 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15184 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15185 // CHECK16:       cond.false:
15186 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15187 // CHECK16-NEXT:    br label [[COND_END]]
15188 // CHECK16:       cond.end:
15189 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
15190 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15191 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15192 // CHECK16-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
15193 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15194 // CHECK16:       omp.inner.for.cond:
15195 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15196 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15197 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
15198 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15199 // CHECK16:       omp.inner.for.body:
15200 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15201 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15202 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
15203 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15204 // CHECK16:       omp.inner.for.inc:
15205 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15206 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15207 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
15208 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
15209 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15210 // CHECK16:       omp.inner.for.end:
15211 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15212 // CHECK16:       omp.loop.exit:
15213 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15214 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
15215 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
15216 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15217 // CHECK16:       omp.precond.end:
15218 // CHECK16-NEXT:    ret void
15219 //
15220 //
15221 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..1
15222 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15223 // CHECK16-NEXT:  entry:
15224 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15225 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15226 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15227 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15228 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15229 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15230 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15231 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15232 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15233 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15234 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15235 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15236 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15237 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15238 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15239 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15240 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15241 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15242 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15243 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15244 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15245 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15246 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15247 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15248 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15249 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15250 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15251 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15252 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15253 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15254 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15255 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15256 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15257 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15258 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15259 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15260 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15261 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15262 // CHECK16:       omp.precond.then:
15263 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15264 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15265 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
15266 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15267 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15268 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
15269 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
15270 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15271 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15272 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15273 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
15274 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15275 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15276 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15277 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
15278 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15279 // CHECK16:       cond.true:
15280 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15281 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15282 // CHECK16:       cond.false:
15283 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15284 // CHECK16-NEXT:    br label [[COND_END]]
15285 // CHECK16:       cond.end:
15286 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
15287 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15288 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15289 // CHECK16-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
15290 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15291 // CHECK16:       omp.inner.for.cond:
15292 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15293 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15294 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
15295 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15296 // CHECK16:       omp.inner.for.body:
15297 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15298 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
15299 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15300 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
15301 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
15302 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
15303 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
15304 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15305 // CHECK16:       omp.body.continue:
15306 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15307 // CHECK16:       omp.inner.for.inc:
15308 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15309 // CHECK16-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
15310 // CHECK16-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
15311 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15312 // CHECK16:       omp.inner.for.end:
15313 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15314 // CHECK16:       omp.loop.exit:
15315 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15316 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
15317 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
15318 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15319 // CHECK16:       omp.precond.end:
15320 // CHECK16-NEXT:    ret void
15321 //
15322 //
15323 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
15324 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15325 // CHECK16-NEXT:  entry:
15326 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15327 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15328 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15329 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15330 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15331 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15332 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15333 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15334 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
15335 // CHECK16-NEXT:    ret void
15336 //
15337 //
15338 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..2
15339 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15340 // CHECK16-NEXT:  entry:
15341 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15342 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15343 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15344 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15345 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15346 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15347 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15348 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15349 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15350 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15351 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15352 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15353 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15354 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15355 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15356 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15357 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15358 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15359 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15360 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15361 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15362 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15363 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15364 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15365 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15366 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15367 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15368 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15369 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15370 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15371 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15372 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15373 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15374 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15375 // CHECK16:       omp.precond.then:
15376 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15377 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15378 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
15379 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15380 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15381 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15382 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
15383 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15384 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15385 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15386 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
15387 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15388 // CHECK16:       cond.true:
15389 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15390 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15391 // CHECK16:       cond.false:
15392 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15393 // CHECK16-NEXT:    br label [[COND_END]]
15394 // CHECK16:       cond.end:
15395 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
15396 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15397 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15398 // CHECK16-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
15399 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15400 // CHECK16:       omp.inner.for.cond:
15401 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15402 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15403 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
15404 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15405 // CHECK16:       omp.inner.for.body:
15406 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15407 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15408 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
15409 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15410 // CHECK16:       omp.inner.for.inc:
15411 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15412 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15413 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
15414 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
15415 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15416 // CHECK16:       omp.inner.for.end:
15417 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15418 // CHECK16:       omp.loop.exit:
15419 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15420 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
15421 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
15422 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15423 // CHECK16:       omp.precond.end:
15424 // CHECK16-NEXT:    ret void
15425 //
15426 //
15427 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..3
15428 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15429 // CHECK16-NEXT:  entry:
15430 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15431 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15432 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15433 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15434 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15435 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15436 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15437 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15438 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15439 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15440 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15441 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15442 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15443 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15444 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15445 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15446 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15447 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15448 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15449 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15450 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15451 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15452 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15453 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15454 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15455 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15456 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15457 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15458 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15459 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15460 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15461 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15462 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15463 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15464 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15465 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15466 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15467 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15468 // CHECK16:       omp.precond.then:
15469 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15470 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15471 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
15472 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15473 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15474 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
15475 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
15476 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15477 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15478 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15479 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
15480 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15481 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15482 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15483 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
15484 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15485 // CHECK16:       cond.true:
15486 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15487 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15488 // CHECK16:       cond.false:
15489 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15490 // CHECK16-NEXT:    br label [[COND_END]]
15491 // CHECK16:       cond.end:
15492 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
15493 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15494 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15495 // CHECK16-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
15496 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15497 // CHECK16:       omp.inner.for.cond:
15498 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15499 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15500 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
15501 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15502 // CHECK16:       omp.inner.for.body:
15503 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15504 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
15505 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15506 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
15507 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
15508 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
15509 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
15510 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15511 // CHECK16:       omp.body.continue:
15512 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15513 // CHECK16:       omp.inner.for.inc:
15514 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15515 // CHECK16-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
15516 // CHECK16-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
15517 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15518 // CHECK16:       omp.inner.for.end:
15519 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15520 // CHECK16:       omp.loop.exit:
15521 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15522 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
15523 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
15524 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15525 // CHECK16:       omp.precond.end:
15526 // CHECK16-NEXT:    ret void
15527 //
15528 //
15529 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
15530 // CHECK16-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15531 // CHECK16-NEXT:  entry:
15532 // CHECK16-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
15533 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15534 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15535 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15536 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15537 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15538 // CHECK16-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
15539 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15540 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15541 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15542 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15543 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15544 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
15545 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
15546 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15547 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15548 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15549 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
15550 // CHECK16-NEXT:    ret void
15551 //
15552 //
15553 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..5
15554 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15555 // CHECK16-NEXT:  entry:
15556 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15557 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15558 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15559 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15560 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15561 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15562 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15563 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15564 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15565 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15566 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15567 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15568 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15569 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15570 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15571 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
15572 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15573 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15574 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15575 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15576 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15577 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15578 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15579 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15580 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15581 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15582 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15583 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15584 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15585 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15586 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15587 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
15588 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15589 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15590 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15591 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15592 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15593 // CHECK16:       omp.precond.then:
15594 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15595 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15596 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
15597 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15598 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15599 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15600 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15601 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
15602 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
15603 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15604 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15605 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
15606 // CHECK16-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15607 // CHECK16:       cond.true:
15608 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15609 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15610 // CHECK16:       cond.false:
15611 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15612 // CHECK16-NEXT:    br label [[COND_END]]
15613 // CHECK16:       cond.end:
15614 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
15615 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15616 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15617 // CHECK16-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
15618 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15619 // CHECK16:       omp.inner.for.cond:
15620 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15621 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15622 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
15623 // CHECK16-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
15624 // CHECK16-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15625 // CHECK16:       omp.inner.for.body:
15626 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15627 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15628 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15629 // CHECK16-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15630 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15631 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
15632 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15633 // CHECK16:       omp.inner.for.inc:
15634 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15635 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15636 // CHECK16-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
15637 // CHECK16-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
15638 // CHECK16-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15639 // CHECK16-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15640 // CHECK16-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
15641 // CHECK16-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
15642 // CHECK16-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15643 // CHECK16-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15644 // CHECK16-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
15645 // CHECK16-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
15646 // CHECK16-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15647 // CHECK16-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15648 // CHECK16-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
15649 // CHECK16-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
15650 // CHECK16:       cond.true11:
15651 // CHECK16-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15652 // CHECK16-NEXT:    br label [[COND_END13:%.*]]
15653 // CHECK16:       cond.false12:
15654 // CHECK16-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15655 // CHECK16-NEXT:    br label [[COND_END13]]
15656 // CHECK16:       cond.end13:
15657 // CHECK16-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
15658 // CHECK16-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
15659 // CHECK16-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15660 // CHECK16-NEXT:    store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
15661 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15662 // CHECK16:       omp.inner.for.end:
15663 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15664 // CHECK16:       omp.loop.exit:
15665 // CHECK16-NEXT:    [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15666 // CHECK16-NEXT:    [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
15667 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
15668 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15669 // CHECK16:       omp.precond.end:
15670 // CHECK16-NEXT:    ret void
15671 //
15672 //
15673 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..6
15674 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15675 // CHECK16-NEXT:  entry:
15676 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15677 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15678 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15679 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15680 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15681 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15682 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15683 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15684 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15685 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15686 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15687 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
15688 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15689 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15690 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15691 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15692 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15693 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
15694 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15695 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15696 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15697 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15698 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15699 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15700 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15701 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15702 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15703 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15704 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15705 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15706 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15707 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15708 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15709 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15710 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
15711 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
15712 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15713 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15714 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15715 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15716 // CHECK16:       omp.precond.then:
15717 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15718 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15719 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
15720 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15721 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15722 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
15723 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
15724 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15725 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15726 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15727 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
15728 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15729 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15730 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15731 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
15732 // CHECK16-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15733 // CHECK16:       cond.true:
15734 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
15735 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15736 // CHECK16:       cond.false:
15737 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15738 // CHECK16-NEXT:    br label [[COND_END]]
15739 // CHECK16:       cond.end:
15740 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
15741 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15742 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15743 // CHECK16-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
15744 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15745 // CHECK16:       omp.inner.for.cond:
15746 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15747 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15748 // CHECK16-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
15749 // CHECK16-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15750 // CHECK16:       omp.inner.for.body:
15751 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15752 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
15753 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15754 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
15755 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
15756 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
15757 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
15758 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15759 // CHECK16:       omp.body.continue:
15760 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15761 // CHECK16:       omp.inner.for.inc:
15762 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15763 // CHECK16-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
15764 // CHECK16-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
15765 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15766 // CHECK16:       omp.inner.for.end:
15767 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15768 // CHECK16:       omp.loop.exit:
15769 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15770 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
15771 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
15772 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15773 // CHECK16:       omp.precond.end:
15774 // CHECK16-NEXT:    ret void
15775 //
15776 //
15777 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
15778 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15779 // CHECK16-NEXT:  entry:
15780 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15781 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15782 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15783 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15784 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15785 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15786 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15787 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15788 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
15789 // CHECK16-NEXT:    ret void
15790 //
15791 //
15792 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..8
15793 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15794 // CHECK16-NEXT:  entry:
15795 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15796 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15797 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15798 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15799 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15800 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15801 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15802 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15803 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15804 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15805 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15806 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15807 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15808 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15809 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15810 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15811 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15812 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15813 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15814 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15815 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15816 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15817 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15818 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15819 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15820 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15821 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15822 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15823 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15824 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15825 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15826 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15827 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15828 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15829 // CHECK16:       omp.precond.then:
15830 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15831 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15832 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
15833 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15834 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15835 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15836 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
15837 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15838 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15839 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15840 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
15841 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15842 // CHECK16:       cond.true:
15843 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15844 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15845 // CHECK16:       cond.false:
15846 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15847 // CHECK16-NEXT:    br label [[COND_END]]
15848 // CHECK16:       cond.end:
15849 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
15850 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15851 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15852 // CHECK16-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
15853 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15854 // CHECK16:       omp.inner.for.cond:
15855 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15856 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15857 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
15858 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15859 // CHECK16:       omp.inner.for.body:
15860 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15861 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15862 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
15863 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15864 // CHECK16:       omp.inner.for.inc:
15865 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15866 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15867 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
15868 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
15869 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15870 // CHECK16:       omp.inner.for.end:
15871 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15872 // CHECK16:       omp.loop.exit:
15873 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15874 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
15875 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
15876 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15877 // CHECK16:       omp.precond.end:
15878 // CHECK16-NEXT:    ret void
15879 //
15880 //
15881 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..9
15882 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15883 // CHECK16-NEXT:  entry:
15884 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15885 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15886 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15887 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15888 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15889 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15890 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15891 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15892 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15893 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15894 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15895 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15896 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15897 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15898 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15899 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15900 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15901 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15902 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15903 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15904 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15905 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15906 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15907 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15908 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15909 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15910 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15911 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15912 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15913 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15914 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15915 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15916 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15917 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15918 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15919 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15920 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15921 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15922 // CHECK16:       omp.precond.then:
15923 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15924 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15925 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
15926 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15927 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15928 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
15929 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
15930 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15931 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15932 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15933 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15934 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15935 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
15936 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
15937 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
15938 // CHECK16:       omp.dispatch.cond:
15939 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15940 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
15941 // CHECK16-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
15942 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
15943 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15944 // CHECK16:       omp.dispatch.body:
15945 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15946 // CHECK16-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
15947 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15948 // CHECK16:       omp.inner.for.cond:
15949 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
15950 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
15951 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
15952 // CHECK16-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15953 // CHECK16:       omp.inner.for.body:
15954 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
15955 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
15956 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15957 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
15958 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
15959 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
15960 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
15961 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15962 // CHECK16:       omp.body.continue:
15963 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15964 // CHECK16:       omp.inner.for.inc:
15965 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
15966 // CHECK16-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
15967 // CHECK16-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
15968 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
15969 // CHECK16:       omp.inner.for.end:
15970 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
15971 // CHECK16:       omp.dispatch.inc:
15972 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
15973 // CHECK16:       omp.dispatch.end:
15974 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15975 // CHECK16:       omp.precond.end:
15976 // CHECK16-NEXT:    ret void
15977 //
15978 //
15979 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
15980 // CHECK16-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15981 // CHECK16-NEXT:  entry:
15982 // CHECK16-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
15983 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15984 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15985 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15986 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15987 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15988 // CHECK16-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
15989 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15990 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15991 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15992 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15993 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15994 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
15995 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
15996 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15997 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15998 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15999 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
16000 // CHECK16-NEXT:    ret void
16001 //
16002 //
16003 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..11
16004 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16005 // CHECK16-NEXT:  entry:
16006 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16007 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16008 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
16009 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16010 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16011 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16012 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16013 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16014 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16015 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
16016 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16017 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16018 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16019 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16020 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16021 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
16022 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16023 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16024 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16025 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
16026 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16027 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16028 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16029 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
16030 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16031 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16032 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
16033 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16034 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16035 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
16036 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16037 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
16038 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
16039 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16040 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16041 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
16042 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16043 // CHECK16:       omp.precond.then:
16044 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16045 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16046 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
16047 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16048 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16049 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16050 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
16051 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16052 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16053 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16054 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
16055 // CHECK16-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16056 // CHECK16:       cond.true:
16057 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16058 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16059 // CHECK16:       cond.false:
16060 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16061 // CHECK16-NEXT:    br label [[COND_END]]
16062 // CHECK16:       cond.end:
16063 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
16064 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16065 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16066 // CHECK16-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
16067 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16068 // CHECK16:       omp.inner.for.cond:
16069 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16070 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16071 // CHECK16-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
16072 // CHECK16-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16073 // CHECK16:       omp.inner.for.body:
16074 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16075 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16076 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16077 // CHECK16-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16078 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16079 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
16080 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16081 // CHECK16:       omp.inner.for.inc:
16082 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16083 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16084 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
16085 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16086 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16087 // CHECK16:       omp.inner.for.end:
16088 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16089 // CHECK16:       omp.loop.exit:
16090 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16091 // CHECK16-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
16092 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
16093 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16094 // CHECK16:       omp.precond.end:
16095 // CHECK16-NEXT:    ret void
16096 //
16097 //
16098 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..12
16099 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16100 // CHECK16-NEXT:  entry:
16101 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16102 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16103 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16104 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16105 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
16106 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16107 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16108 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16109 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16110 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16111 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16112 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
16113 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16114 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16115 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16116 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16117 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16118 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
16119 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16120 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16121 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16122 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16123 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
16124 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16125 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16126 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16127 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
16128 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16129 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16130 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
16131 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16132 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16133 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
16134 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16135 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
16136 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
16137 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16138 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16139 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
16140 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16141 // CHECK16:       omp.precond.then:
16142 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16143 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16144 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
16145 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16146 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16147 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
16148 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
16149 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16150 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16151 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16152 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16153 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16154 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16155 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
16156 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
16157 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
16158 // CHECK16:       omp.dispatch.cond:
16159 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16160 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
16161 // CHECK16-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
16162 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
16163 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16164 // CHECK16:       omp.dispatch.body:
16165 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16166 // CHECK16-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
16167 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16168 // CHECK16:       omp.inner.for.cond:
16169 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16170 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
16171 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
16172 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16173 // CHECK16:       omp.inner.for.body:
16174 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16175 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
16176 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16177 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
16178 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
16179 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
16180 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
16181 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16182 // CHECK16:       omp.body.continue:
16183 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16184 // CHECK16:       omp.inner.for.inc:
16185 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16186 // CHECK16-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
16187 // CHECK16-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
16188 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
16189 // CHECK16:       omp.inner.for.end:
16190 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
16191 // CHECK16:       omp.dispatch.inc:
16192 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
16193 // CHECK16:       omp.dispatch.end:
16194 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16195 // CHECK16:       omp.precond.end:
16196 // CHECK16-NEXT:    ret void
16197 //
16198 //
16199 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
16200 // CHECK16-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
16201 // CHECK16-NEXT:  entry:
16202 // CHECK16-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
16203 // CHECK16-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
16204 // CHECK16-NEXT:    [[M:%.*]] = alloca i32, align 4
16205 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
16206 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
16207 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
16208 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16209 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
16210 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
16211 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
16212 // CHECK16-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
16213 // CHECK16-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
16214 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
16215 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
16216 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
16217 // CHECK16-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
16218 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
16219 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
16220 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
16221 // CHECK16-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
16222 // CHECK16-NEXT:    [[M_CASTED19:%.*]] = alloca i32, align 4
16223 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
16224 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
16225 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
16226 // CHECK16-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
16227 // CHECK16-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
16228 // CHECK16-NEXT:    store i32 10, i32* [[M]], align 4
16229 // CHECK16-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16230 // CHECK16-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
16231 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
16232 // CHECK16-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16233 // CHECK16-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
16234 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
16235 // CHECK16-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
16236 // CHECK16-NEXT:    store i8* null, i8** [[TMP4]], align 4
16237 // CHECK16-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16238 // CHECK16-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16239 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16240 // CHECK16-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16241 // CHECK16-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
16242 // CHECK16-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
16243 // CHECK16:       omp_offload.failed:
16244 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
16245 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT]]
16246 // CHECK16:       omp_offload.cont:
16247 // CHECK16-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
16248 // CHECK16-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
16249 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
16250 // CHECK16-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
16251 // CHECK16-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
16252 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
16253 // CHECK16-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
16254 // CHECK16-NEXT:    store i8* null, i8** [[TMP13]], align 4
16255 // CHECK16-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
16256 // CHECK16-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
16257 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16258 // CHECK16-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16259 // CHECK16-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
16260 // CHECK16-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
16261 // CHECK16:       omp_offload.failed5:
16262 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
16263 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
16264 // CHECK16:       omp_offload.cont6:
16265 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
16266 // CHECK16-NEXT:    store i32 [[TMP18]], i32* [[M_CASTED]], align 4
16267 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
16268 // CHECK16-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
16269 // CHECK16-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
16270 // CHECK16-NEXT:    store i32 [[TMP19]], i32* [[TMP21]], align 4
16271 // CHECK16-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
16272 // CHECK16-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
16273 // CHECK16-NEXT:    store i32 [[TMP19]], i32* [[TMP23]], align 4
16274 // CHECK16-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
16275 // CHECK16-NEXT:    store i8* null, i8** [[TMP24]], align 4
16276 // CHECK16-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
16277 // CHECK16-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
16278 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
16279 // CHECK16-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
16280 // CHECK16-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
16281 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
16282 // CHECK16-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
16283 // CHECK16-NEXT:    store i8* null, i8** [[TMP29]], align 4
16284 // CHECK16-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
16285 // CHECK16-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
16286 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16287 // CHECK16-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16288 // CHECK16-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
16289 // CHECK16-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
16290 // CHECK16:       omp_offload.failed11:
16291 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
16292 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
16293 // CHECK16:       omp_offload.cont12:
16294 // CHECK16-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
16295 // CHECK16-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
16296 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
16297 // CHECK16-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
16298 // CHECK16-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
16299 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
16300 // CHECK16-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
16301 // CHECK16-NEXT:    store i8* null, i8** [[TMP38]], align 4
16302 // CHECK16-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
16303 // CHECK16-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
16304 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16305 // CHECK16-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16306 // CHECK16-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
16307 // CHECK16-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
16308 // CHECK16:       omp_offload.failed17:
16309 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
16310 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
16311 // CHECK16:       omp_offload.cont18:
16312 // CHECK16-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
16313 // CHECK16-NEXT:    store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
16314 // CHECK16-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
16315 // CHECK16-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
16316 // CHECK16-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
16317 // CHECK16-NEXT:    store i32 [[TMP44]], i32* [[TMP46]], align 4
16318 // CHECK16-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
16319 // CHECK16-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
16320 // CHECK16-NEXT:    store i32 [[TMP44]], i32* [[TMP48]], align 4
16321 // CHECK16-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
16322 // CHECK16-NEXT:    store i8* null, i8** [[TMP49]], align 4
16323 // CHECK16-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
16324 // CHECK16-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
16325 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
16326 // CHECK16-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
16327 // CHECK16-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
16328 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
16329 // CHECK16-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
16330 // CHECK16-NEXT:    store i8* null, i8** [[TMP54]], align 4
16331 // CHECK16-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
16332 // CHECK16-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
16333 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16334 // CHECK16-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16335 // CHECK16-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
16336 // CHECK16-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
16337 // CHECK16:       omp_offload.failed24:
16338 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
16339 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
16340 // CHECK16:       omp_offload.cont25:
16341 // CHECK16-NEXT:    ret i32 0
16342 //
16343 //
16344 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
16345 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16346 // CHECK16-NEXT:  entry:
16347 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16348 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16349 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16350 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16351 // CHECK16-NEXT:    ret void
16352 //
16353 //
16354 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..14
16355 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16356 // CHECK16-NEXT:  entry:
16357 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16358 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16359 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16360 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16361 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16362 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16363 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16364 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16365 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16366 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16367 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16368 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16369 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16370 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16371 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16372 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16373 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16374 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16375 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16376 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16377 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16378 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16379 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16380 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16381 // CHECK16:       cond.true:
16382 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16383 // CHECK16:       cond.false:
16384 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16385 // CHECK16-NEXT:    br label [[COND_END]]
16386 // CHECK16:       cond.end:
16387 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16388 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16389 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16390 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16391 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16392 // CHECK16:       omp.inner.for.cond:
16393 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16394 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16395 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16396 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16397 // CHECK16:       omp.inner.for.body:
16398 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16399 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16400 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
16401 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16402 // CHECK16:       omp.inner.for.inc:
16403 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16404 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16405 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
16406 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16407 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16408 // CHECK16:       omp.inner.for.end:
16409 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16410 // CHECK16:       omp.loop.exit:
16411 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16412 // CHECK16-NEXT:    ret void
16413 //
16414 //
16415 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..15
16416 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16417 // CHECK16-NEXT:  entry:
16418 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16419 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16420 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16421 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16422 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16423 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16424 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16425 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16426 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16427 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16428 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16429 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16430 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16431 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16432 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16433 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16434 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16435 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16436 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16437 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
16438 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16439 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16440 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
16441 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
16442 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16443 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16444 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16445 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
16446 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16447 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16448 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
16449 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16450 // CHECK16:       cond.true:
16451 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16452 // CHECK16:       cond.false:
16453 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16454 // CHECK16-NEXT:    br label [[COND_END]]
16455 // CHECK16:       cond.end:
16456 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
16457 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16458 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16459 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
16460 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16461 // CHECK16:       omp.inner.for.cond:
16462 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16463 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16464 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
16465 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16466 // CHECK16:       omp.inner.for.body:
16467 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16468 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
16469 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16470 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
16471 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
16472 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
16473 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
16474 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16475 // CHECK16:       omp.body.continue:
16476 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16477 // CHECK16:       omp.inner.for.inc:
16478 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16479 // CHECK16-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
16480 // CHECK16-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
16481 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16482 // CHECK16:       omp.inner.for.end:
16483 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16484 // CHECK16:       omp.loop.exit:
16485 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
16486 // CHECK16-NEXT:    ret void
16487 //
16488 //
16489 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
16490 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16491 // CHECK16-NEXT:  entry:
16492 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16493 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16494 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16495 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16496 // CHECK16-NEXT:    ret void
16497 //
16498 //
16499 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..17
16500 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16501 // CHECK16-NEXT:  entry:
16502 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16503 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16504 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16505 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16506 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16507 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16508 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16509 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16510 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16511 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16512 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16513 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16514 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16515 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16516 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16517 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16518 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16519 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16520 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16521 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16522 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16523 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16524 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16525 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16526 // CHECK16:       cond.true:
16527 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16528 // CHECK16:       cond.false:
16529 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16530 // CHECK16-NEXT:    br label [[COND_END]]
16531 // CHECK16:       cond.end:
16532 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16533 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16534 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16535 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16536 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16537 // CHECK16:       omp.inner.for.cond:
16538 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16539 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16540 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16541 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16542 // CHECK16:       omp.inner.for.body:
16543 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16544 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16545 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
16546 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16547 // CHECK16:       omp.inner.for.inc:
16548 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16549 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16550 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
16551 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16552 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16553 // CHECK16:       omp.inner.for.end:
16554 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16555 // CHECK16:       omp.loop.exit:
16556 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16557 // CHECK16-NEXT:    ret void
16558 //
16559 //
16560 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..18
16561 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16562 // CHECK16-NEXT:  entry:
16563 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16564 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16565 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16566 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16567 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16568 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16569 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16570 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16571 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16572 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16573 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16574 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16575 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16576 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16577 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16578 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16579 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16580 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16581 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16582 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
16583 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16584 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16585 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
16586 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
16587 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16588 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16589 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16590 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
16591 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16592 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16593 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
16594 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16595 // CHECK16:       cond.true:
16596 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16597 // CHECK16:       cond.false:
16598 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16599 // CHECK16-NEXT:    br label [[COND_END]]
16600 // CHECK16:       cond.end:
16601 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
16602 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16603 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16604 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
16605 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16606 // CHECK16:       omp.inner.for.cond:
16607 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16608 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16609 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
16610 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16611 // CHECK16:       omp.inner.for.body:
16612 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16613 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
16614 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16615 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
16616 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
16617 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
16618 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
16619 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16620 // CHECK16:       omp.body.continue:
16621 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16622 // CHECK16:       omp.inner.for.inc:
16623 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16624 // CHECK16-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
16625 // CHECK16-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
16626 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16627 // CHECK16:       omp.inner.for.end:
16628 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16629 // CHECK16:       omp.loop.exit:
16630 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
16631 // CHECK16-NEXT:    ret void
16632 //
16633 //
16634 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
16635 // CHECK16-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16636 // CHECK16-NEXT:  entry:
16637 // CHECK16-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
16638 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16639 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16640 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16641 // CHECK16-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
16642 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16643 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16644 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
16645 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
16646 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16647 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16648 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16649 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
16650 // CHECK16-NEXT:    ret void
16651 //
16652 //
16653 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..21
16654 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16655 // CHECK16-NEXT:  entry:
16656 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16657 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16658 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16659 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16660 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16661 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16662 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16663 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16664 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16665 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16666 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16667 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16668 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16669 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16670 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16671 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16672 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16673 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16674 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16675 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16676 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16677 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16678 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16679 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16680 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16681 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16682 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16683 // CHECK16:       cond.true:
16684 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16685 // CHECK16:       cond.false:
16686 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16687 // CHECK16-NEXT:    br label [[COND_END]]
16688 // CHECK16:       cond.end:
16689 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16690 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16691 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16692 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16693 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16694 // CHECK16:       omp.inner.for.cond:
16695 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16696 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16697 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16698 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16699 // CHECK16:       omp.inner.for.body:
16700 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16701 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16702 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16703 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16704 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16705 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
16706 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16707 // CHECK16:       omp.inner.for.inc:
16708 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16709 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16710 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
16711 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16712 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16713 // CHECK16:       omp.inner.for.end:
16714 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16715 // CHECK16:       omp.loop.exit:
16716 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16717 // CHECK16-NEXT:    ret void
16718 //
16719 //
16720 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..22
16721 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16722 // CHECK16-NEXT:  entry:
16723 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16724 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16725 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16726 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16727 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16728 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16729 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16730 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16731 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16732 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16733 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16734 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16735 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16736 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16737 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16738 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16739 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16740 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16741 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16742 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16743 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16744 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
16745 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16746 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16747 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
16748 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
16749 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16750 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16751 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16752 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16753 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
16754 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
16755 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
16756 // CHECK16:       omp.dispatch.cond:
16757 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16758 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16759 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
16760 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16761 // CHECK16:       cond.true:
16762 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16763 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16764 // CHECK16:       cond.false:
16765 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16766 // CHECK16-NEXT:    br label [[COND_END]]
16767 // CHECK16:       cond.end:
16768 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
16769 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16770 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16771 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
16772 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16773 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16774 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
16775 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16776 // CHECK16:       omp.dispatch.body:
16777 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16778 // CHECK16:       omp.inner.for.cond:
16779 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16780 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16781 // CHECK16-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
16782 // CHECK16-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16783 // CHECK16:       omp.inner.for.body:
16784 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16785 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
16786 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16787 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
16788 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
16789 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
16790 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
16791 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16792 // CHECK16:       omp.body.continue:
16793 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16794 // CHECK16:       omp.inner.for.inc:
16795 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16796 // CHECK16-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
16797 // CHECK16-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
16798 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16799 // CHECK16:       omp.inner.for.end:
16800 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
16801 // CHECK16:       omp.dispatch.inc:
16802 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16803 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16804 // CHECK16-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
16805 // CHECK16-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
16806 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16807 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16808 // CHECK16-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
16809 // CHECK16-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
16810 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
16811 // CHECK16:       omp.dispatch.end:
16812 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
16813 // CHECK16-NEXT:    ret void
16814 //
16815 //
16816 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
16817 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16818 // CHECK16-NEXT:  entry:
16819 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16820 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16821 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16822 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16823 // CHECK16-NEXT:    ret void
16824 //
16825 //
16826 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..25
16827 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16828 // CHECK16-NEXT:  entry:
16829 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16830 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16831 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16832 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16833 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16834 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16835 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16836 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16837 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16838 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16839 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16840 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16841 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16842 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16843 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16844 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16845 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16846 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16847 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16848 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16849 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16850 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16851 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16852 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16853 // CHECK16:       cond.true:
16854 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16855 // CHECK16:       cond.false:
16856 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16857 // CHECK16-NEXT:    br label [[COND_END]]
16858 // CHECK16:       cond.end:
16859 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16860 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16861 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16862 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16863 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16864 // CHECK16:       omp.inner.for.cond:
16865 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16866 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16867 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16868 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16869 // CHECK16:       omp.inner.for.body:
16870 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16871 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16872 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
16873 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16874 // CHECK16:       omp.inner.for.inc:
16875 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16876 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16877 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
16878 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16879 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16880 // CHECK16:       omp.inner.for.end:
16881 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16882 // CHECK16:       omp.loop.exit:
16883 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16884 // CHECK16-NEXT:    ret void
16885 //
16886 //
16887 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..26
16888 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16889 // CHECK16-NEXT:  entry:
16890 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16891 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16892 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16893 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16894 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16895 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16896 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16897 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16898 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16899 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16900 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16901 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16902 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16903 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16904 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16905 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16906 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16907 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16908 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16909 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
16910 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16911 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16912 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
16913 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
16914 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16915 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16916 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16917 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16918 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16919 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
16920 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
16921 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
16922 // CHECK16:       omp.dispatch.cond:
16923 // CHECK16-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
16924 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
16925 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16926 // CHECK16:       omp.dispatch.body:
16927 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16928 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
16929 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16930 // CHECK16:       omp.inner.for.cond:
16931 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
16932 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
16933 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
16934 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16935 // CHECK16:       omp.inner.for.body:
16936 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
16937 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
16938 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16939 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
16940 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
16941 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
16942 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
16943 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16944 // CHECK16:       omp.body.continue:
16945 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16946 // CHECK16:       omp.inner.for.inc:
16947 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
16948 // CHECK16-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
16949 // CHECK16-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
16950 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
16951 // CHECK16:       omp.inner.for.end:
16952 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
16953 // CHECK16:       omp.dispatch.inc:
16954 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
16955 // CHECK16:       omp.dispatch.end:
16956 // CHECK16-NEXT:    ret void
16957 //
16958 //
16959 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
16960 // CHECK16-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16961 // CHECK16-NEXT:  entry:
16962 // CHECK16-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
16963 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16964 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16965 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16966 // CHECK16-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
16967 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16968 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16969 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
16970 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
16971 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16972 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16973 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16974 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
16975 // CHECK16-NEXT:    ret void
16976 //
16977 //
16978 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..29
16979 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16980 // CHECK16-NEXT:  entry:
16981 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16982 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16983 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16984 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16985 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16986 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16987 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16988 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16989 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16990 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16991 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16992 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16993 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16994 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16995 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16996 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16997 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16998 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16999 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
17000 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17001 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17002 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17003 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
17004 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17005 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17006 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
17007 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17008 // CHECK16:       cond.true:
17009 // CHECK16-NEXT:    br label [[COND_END:%.*]]
17010 // CHECK16:       cond.false:
17011 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17012 // CHECK16-NEXT:    br label [[COND_END]]
17013 // CHECK16:       cond.end:
17014 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
17015 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17016 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17017 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
17018 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17019 // CHECK16:       omp.inner.for.cond:
17020 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17021 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17022 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
17023 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17024 // CHECK16:       omp.inner.for.body:
17025 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17026 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17027 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17028 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17029 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17030 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
17031 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17032 // CHECK16:       omp.inner.for.inc:
17033 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17034 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17035 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
17036 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17037 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
17038 // CHECK16:       omp.inner.for.end:
17039 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17040 // CHECK16:       omp.loop.exit:
17041 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
17042 // CHECK16-NEXT:    ret void
17043 //
17044 //
17045 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..30
17046 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17047 // CHECK16-NEXT:  entry:
17048 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17049 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17050 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
17051 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
17052 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17053 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
17054 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17055 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17056 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17057 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17058 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17059 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17060 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17061 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17062 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17063 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17064 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17065 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17066 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17067 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17068 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17069 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
17070 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17071 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17072 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
17073 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
17074 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17075 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17076 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17077 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17078 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17079 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17080 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
17081 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
17082 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
17083 // CHECK16:       omp.dispatch.cond:
17084 // CHECK16-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
17085 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
17086 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17087 // CHECK16:       omp.dispatch.body:
17088 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17089 // CHECK16-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
17090 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17091 // CHECK16:       omp.inner.for.cond:
17092 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17093 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
17094 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
17095 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17096 // CHECK16:       omp.inner.for.body:
17097 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17098 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
17099 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17100 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
17101 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
17102 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
17103 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
17104 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17105 // CHECK16:       omp.body.continue:
17106 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17107 // CHECK16:       omp.inner.for.inc:
17108 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17109 // CHECK16-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
17110 // CHECK16-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
17111 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
17112 // CHECK16:       omp.inner.for.end:
17113 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
17114 // CHECK16:       omp.dispatch.inc:
17115 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
17116 // CHECK16:       omp.dispatch.end:
17117 // CHECK16-NEXT:    ret void
17118 //
17119 //
17120 // CHECK16-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
17121 // CHECK16-SAME: () #[[ATTR5:[0-9]+]] {
17122 // CHECK16-NEXT:  entry:
17123 // CHECK16-NEXT:    call void @__tgt_register_requires(i64 1)
17124 // CHECK16-NEXT:    ret void
17125 //
17126 //
17127 // CHECK17-LABEL: define {{[^@]+}}@main
17128 // CHECK17-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
17129 // CHECK17-NEXT:  entry:
17130 // CHECK17-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
17131 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
17132 // CHECK17-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
17133 // CHECK17-NEXT:    [[N:%.*]] = alloca i32, align 4
17134 // CHECK17-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
17135 // CHECK17-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
17136 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
17137 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
17138 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
17139 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
17140 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
17141 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
17142 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17143 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17144 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17145 // CHECK17-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
17146 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
17147 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
17148 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
17149 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
17150 // CHECK17-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
17151 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
17152 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
17153 // CHECK17-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
17154 // CHECK17-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
17155 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
17156 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
17157 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
17158 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
17159 // CHECK17-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
17160 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
17161 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
17162 // CHECK17-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
17163 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
17164 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
17165 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
17166 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
17167 // CHECK17-NEXT:    [[_TMP40:%.*]] = alloca i32, align 4
17168 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
17169 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
17170 // CHECK17-NEXT:    [[M_CASTED49:%.*]] = alloca i64, align 8
17171 // CHECK17-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
17172 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
17173 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
17174 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
17175 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
17176 // CHECK17-NEXT:    [[_TMP57:%.*]] = alloca i32, align 4
17177 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
17178 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
17179 // CHECK17-NEXT:    store i32 0, i32* [[RETVAL]], align 4
17180 // CHECK17-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
17181 // CHECK17-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
17182 // CHECK17-NEXT:    store i32 100, i32* [[N]], align 4
17183 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
17184 // CHECK17-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
17185 // CHECK17-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
17186 // CHECK17-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
17187 // CHECK17-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
17188 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
17189 // CHECK17-NEXT:    store i32 10, i32* [[M]], align 4
17190 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
17191 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
17192 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
17193 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
17194 // CHECK17-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
17195 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
17196 // CHECK17-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
17197 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
17198 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
17199 // CHECK17-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
17200 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
17201 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
17202 // CHECK17-NEXT:    store i64 4, i64* [[TMP10]], align 8
17203 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
17204 // CHECK17-NEXT:    store i8* null, i8** [[TMP11]], align 8
17205 // CHECK17-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
17206 // CHECK17-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
17207 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
17208 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
17209 // CHECK17-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
17210 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
17211 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
17212 // CHECK17-NEXT:    store i64 8, i64* [[TMP16]], align 8
17213 // CHECK17-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
17214 // CHECK17-NEXT:    store i8* null, i8** [[TMP17]], align 8
17215 // CHECK17-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
17216 // CHECK17-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
17217 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
17218 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
17219 // CHECK17-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
17220 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
17221 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
17222 // CHECK17-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
17223 // CHECK17-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
17224 // CHECK17-NEXT:    store i8* null, i8** [[TMP23]], align 8
17225 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
17226 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
17227 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
17228 // CHECK17-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
17229 // CHECK17-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
17230 // CHECK17-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17231 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
17232 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17233 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17234 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17235 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17236 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
17237 // CHECK17-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
17238 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
17239 // CHECK17-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17240 // CHECK17-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
17241 // CHECK17-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
17242 // CHECK17:       omp_offload.failed:
17243 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
17244 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
17245 // CHECK17:       omp_offload.cont:
17246 // CHECK17-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
17247 // CHECK17-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
17248 // CHECK17-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
17249 // CHECK17-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
17250 // CHECK17-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
17251 // CHECK17-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
17252 // CHECK17-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
17253 // CHECK17-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
17254 // CHECK17-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
17255 // CHECK17-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
17256 // CHECK17-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
17257 // CHECK17-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
17258 // CHECK17-NEXT:    store i64 4, i64* [[TMP40]], align 8
17259 // CHECK17-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
17260 // CHECK17-NEXT:    store i8* null, i8** [[TMP41]], align 8
17261 // CHECK17-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
17262 // CHECK17-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
17263 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
17264 // CHECK17-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
17265 // CHECK17-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
17266 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
17267 // CHECK17-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
17268 // CHECK17-NEXT:    store i64 8, i64* [[TMP46]], align 8
17269 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
17270 // CHECK17-NEXT:    store i8* null, i8** [[TMP47]], align 8
17271 // CHECK17-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
17272 // CHECK17-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
17273 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
17274 // CHECK17-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
17275 // CHECK17-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
17276 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
17277 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
17278 // CHECK17-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
17279 // CHECK17-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
17280 // CHECK17-NEXT:    store i8* null, i8** [[TMP53]], align 8
17281 // CHECK17-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
17282 // CHECK17-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
17283 // CHECK17-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
17284 // CHECK17-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
17285 // CHECK17-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
17286 // CHECK17-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
17287 // CHECK17-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
17288 // CHECK17-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
17289 // CHECK17-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
17290 // CHECK17-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
17291 // CHECK17-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
17292 // CHECK17-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
17293 // CHECK17-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
17294 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
17295 // CHECK17-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17296 // CHECK17-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
17297 // CHECK17-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
17298 // CHECK17:       omp_offload.failed16:
17299 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17300 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
17301 // CHECK17:       omp_offload.cont17:
17302 // CHECK17-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
17303 // CHECK17-NEXT:    [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
17304 // CHECK17-NEXT:    store i32 [[TMP63]], i32* [[CONV18]], align 4
17305 // CHECK17-NEXT:    [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
17306 // CHECK17-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
17307 // CHECK17-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
17308 // CHECK17-NEXT:    store i32 [[TMP65]], i32* [[CONV20]], align 4
17309 // CHECK17-NEXT:    [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
17310 // CHECK17-NEXT:    [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
17311 // CHECK17-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
17312 // CHECK17-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
17313 // CHECK17-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
17314 // CHECK17-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
17315 // CHECK17-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
17316 // CHECK17-NEXT:    store i64 [[TMP64]], i64* [[TMP71]], align 8
17317 // CHECK17-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
17318 // CHECK17-NEXT:    store i64 4, i64* [[TMP72]], align 8
17319 // CHECK17-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
17320 // CHECK17-NEXT:    store i8* null, i8** [[TMP73]], align 8
17321 // CHECK17-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
17322 // CHECK17-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
17323 // CHECK17-NEXT:    store i64 [[TMP66]], i64* [[TMP75]], align 8
17324 // CHECK17-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
17325 // CHECK17-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
17326 // CHECK17-NEXT:    store i64 [[TMP66]], i64* [[TMP77]], align 8
17327 // CHECK17-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
17328 // CHECK17-NEXT:    store i64 4, i64* [[TMP78]], align 8
17329 // CHECK17-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
17330 // CHECK17-NEXT:    store i8* null, i8** [[TMP79]], align 8
17331 // CHECK17-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
17332 // CHECK17-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
17333 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP81]], align 8
17334 // CHECK17-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
17335 // CHECK17-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
17336 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP83]], align 8
17337 // CHECK17-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
17338 // CHECK17-NEXT:    store i64 8, i64* [[TMP84]], align 8
17339 // CHECK17-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
17340 // CHECK17-NEXT:    store i8* null, i8** [[TMP85]], align 8
17341 // CHECK17-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
17342 // CHECK17-NEXT:    [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
17343 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP87]], align 8
17344 // CHECK17-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
17345 // CHECK17-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
17346 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 8
17347 // CHECK17-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
17348 // CHECK17-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
17349 // CHECK17-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
17350 // CHECK17-NEXT:    store i8* null, i8** [[TMP91]], align 8
17351 // CHECK17-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
17352 // CHECK17-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
17353 // CHECK17-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
17354 // CHECK17-NEXT:    [[TMP95:%.*]] = load i32, i32* [[N]], align 4
17355 // CHECK17-NEXT:    store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
17356 // CHECK17-NEXT:    [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
17357 // CHECK17-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
17358 // CHECK17-NEXT:    [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
17359 // CHECK17-NEXT:    [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
17360 // CHECK17-NEXT:    store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
17361 // CHECK17-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
17362 // CHECK17-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
17363 // CHECK17-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
17364 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
17365 // CHECK17-NEXT:    [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17366 // CHECK17-NEXT:    [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
17367 // CHECK17-NEXT:    br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
17368 // CHECK17:       omp_offload.failed32:
17369 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17370 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
17371 // CHECK17:       omp_offload.cont33:
17372 // CHECK17-NEXT:    [[TMP101:%.*]] = load i32, i32* [[N]], align 4
17373 // CHECK17-NEXT:    [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
17374 // CHECK17-NEXT:    store i32 [[TMP101]], i32* [[CONV35]], align 4
17375 // CHECK17-NEXT:    [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
17376 // CHECK17-NEXT:    [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
17377 // CHECK17-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
17378 // CHECK17-NEXT:    [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
17379 // CHECK17-NEXT:    store i64 [[TMP102]], i64* [[TMP105]], align 8
17380 // CHECK17-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
17381 // CHECK17-NEXT:    [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
17382 // CHECK17-NEXT:    store i64 [[TMP102]], i64* [[TMP107]], align 8
17383 // CHECK17-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
17384 // CHECK17-NEXT:    store i64 4, i64* [[TMP108]], align 8
17385 // CHECK17-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
17386 // CHECK17-NEXT:    store i8* null, i8** [[TMP109]], align 8
17387 // CHECK17-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
17388 // CHECK17-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
17389 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP111]], align 8
17390 // CHECK17-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
17391 // CHECK17-NEXT:    [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
17392 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP113]], align 8
17393 // CHECK17-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
17394 // CHECK17-NEXT:    store i64 8, i64* [[TMP114]], align 8
17395 // CHECK17-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
17396 // CHECK17-NEXT:    store i8* null, i8** [[TMP115]], align 8
17397 // CHECK17-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
17398 // CHECK17-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
17399 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP117]], align 8
17400 // CHECK17-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
17401 // CHECK17-NEXT:    [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
17402 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP119]], align 8
17403 // CHECK17-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
17404 // CHECK17-NEXT:    store i64 [[TMP103]], i64* [[TMP120]], align 8
17405 // CHECK17-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
17406 // CHECK17-NEXT:    store i8* null, i8** [[TMP121]], align 8
17407 // CHECK17-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
17408 // CHECK17-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
17409 // CHECK17-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
17410 // CHECK17-NEXT:    [[TMP125:%.*]] = load i32, i32* [[N]], align 4
17411 // CHECK17-NEXT:    store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
17412 // CHECK17-NEXT:    [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
17413 // CHECK17-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
17414 // CHECK17-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
17415 // CHECK17-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
17416 // CHECK17-NEXT:    store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
17417 // CHECK17-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
17418 // CHECK17-NEXT:    [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
17419 // CHECK17-NEXT:    [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
17420 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
17421 // CHECK17-NEXT:    [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17422 // CHECK17-NEXT:    [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
17423 // CHECK17-NEXT:    br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
17424 // CHECK17:       omp_offload.failed47:
17425 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17426 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
17427 // CHECK17:       omp_offload.cont48:
17428 // CHECK17-NEXT:    [[TMP131:%.*]] = load i32, i32* [[M]], align 4
17429 // CHECK17-NEXT:    [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
17430 // CHECK17-NEXT:    store i32 [[TMP131]], i32* [[CONV50]], align 4
17431 // CHECK17-NEXT:    [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
17432 // CHECK17-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
17433 // CHECK17-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
17434 // CHECK17-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
17435 // CHECK17-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
17436 // CHECK17-NEXT:    [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
17437 // CHECK17-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
17438 // CHECK17-NEXT:    [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
17439 // CHECK17-NEXT:    store i64 [[TMP132]], i64* [[TMP137]], align 8
17440 // CHECK17-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
17441 // CHECK17-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
17442 // CHECK17-NEXT:    store i64 [[TMP132]], i64* [[TMP139]], align 8
17443 // CHECK17-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
17444 // CHECK17-NEXT:    store i64 4, i64* [[TMP140]], align 8
17445 // CHECK17-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
17446 // CHECK17-NEXT:    store i8* null, i8** [[TMP141]], align 8
17447 // CHECK17-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
17448 // CHECK17-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
17449 // CHECK17-NEXT:    store i64 [[TMP134]], i64* [[TMP143]], align 8
17450 // CHECK17-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
17451 // CHECK17-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
17452 // CHECK17-NEXT:    store i64 [[TMP134]], i64* [[TMP145]], align 8
17453 // CHECK17-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
17454 // CHECK17-NEXT:    store i64 4, i64* [[TMP146]], align 8
17455 // CHECK17-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
17456 // CHECK17-NEXT:    store i8* null, i8** [[TMP147]], align 8
17457 // CHECK17-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
17458 // CHECK17-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
17459 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP149]], align 8
17460 // CHECK17-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
17461 // CHECK17-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
17462 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP151]], align 8
17463 // CHECK17-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
17464 // CHECK17-NEXT:    store i64 8, i64* [[TMP152]], align 8
17465 // CHECK17-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
17466 // CHECK17-NEXT:    store i8* null, i8** [[TMP153]], align 8
17467 // CHECK17-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
17468 // CHECK17-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
17469 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 8
17470 // CHECK17-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
17471 // CHECK17-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
17472 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 8
17473 // CHECK17-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
17474 // CHECK17-NEXT:    store i64 [[TMP135]], i64* [[TMP158]], align 8
17475 // CHECK17-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
17476 // CHECK17-NEXT:    store i8* null, i8** [[TMP159]], align 8
17477 // CHECK17-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
17478 // CHECK17-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
17479 // CHECK17-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
17480 // CHECK17-NEXT:    [[TMP163:%.*]] = load i32, i32* [[N]], align 4
17481 // CHECK17-NEXT:    store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
17482 // CHECK17-NEXT:    [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
17483 // CHECK17-NEXT:    [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
17484 // CHECK17-NEXT:    [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
17485 // CHECK17-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
17486 // CHECK17-NEXT:    store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
17487 // CHECK17-NEXT:    [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
17488 // CHECK17-NEXT:    [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
17489 // CHECK17-NEXT:    [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
17490 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
17491 // CHECK17-NEXT:    [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17492 // CHECK17-NEXT:    [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
17493 // CHECK17-NEXT:    br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
17494 // CHECK17:       omp_offload.failed64:
17495 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17496 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
17497 // CHECK17:       omp_offload.cont65:
17498 // CHECK17-NEXT:    [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
17499 // CHECK17-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
17500 // CHECK17-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
17501 // CHECK17-NEXT:    [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
17502 // CHECK17-NEXT:    call void @llvm.stackrestore(i8* [[TMP170]])
17503 // CHECK17-NEXT:    [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
17504 // CHECK17-NEXT:    ret i32 [[TMP171]]
17505 //
17506 //
17507 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
17508 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
17509 // CHECK17-NEXT:  entry:
17510 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
17511 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17512 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17513 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
17514 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17515 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17516 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17517 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17518 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17519 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
17520 // CHECK17-NEXT:    ret void
17521 //
17522 //
17523 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
17524 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17525 // CHECK17-NEXT:  entry:
17526 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17527 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17528 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
17529 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17530 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17531 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17532 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17533 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17534 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17535 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
17536 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17537 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17538 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17539 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17540 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
17541 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17542 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17543 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
17544 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17545 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17546 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17547 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17548 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17549 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17550 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
17551 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17552 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17553 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17554 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17555 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17556 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
17557 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17558 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17559 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17560 // CHECK17:       omp.precond.then:
17561 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17562 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17563 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
17564 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17565 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17566 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17567 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
17568 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17569 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17570 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17571 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
17572 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17573 // CHECK17:       cond.true:
17574 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17575 // CHECK17-NEXT:    br label [[COND_END:%.*]]
17576 // CHECK17:       cond.false:
17577 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17578 // CHECK17-NEXT:    br label [[COND_END]]
17579 // CHECK17:       cond.end:
17580 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
17581 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17582 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17583 // CHECK17-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
17584 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17585 // CHECK17:       omp.inner.for.cond:
17586 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17587 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17588 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
17589 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17590 // CHECK17:       omp.inner.for.body:
17591 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17592 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
17593 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17594 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
17595 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
17596 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17597 // CHECK17:       omp.inner.for.inc:
17598 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17599 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17600 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
17601 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17602 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
17603 // CHECK17:       omp.inner.for.end:
17604 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17605 // CHECK17:       omp.loop.exit:
17606 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17607 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
17608 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
17609 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
17610 // CHECK17:       omp.precond.end:
17611 // CHECK17-NEXT:    ret void
17612 //
17613 //
17614 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
17615 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17616 // CHECK17-NEXT:  entry:
17617 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17618 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17619 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
17620 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
17621 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
17622 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17623 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17624 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17625 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17626 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17627 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17628 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
17629 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17630 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17631 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17632 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17633 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
17634 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17635 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17636 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17637 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17638 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
17639 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17640 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17641 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17642 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17643 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17644 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17645 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
17646 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17647 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17648 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17649 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17650 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17651 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
17652 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17653 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17654 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17655 // CHECK17:       omp.precond.then:
17656 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17657 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17658 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
17659 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17660 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
17661 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17662 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
17663 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
17664 // CHECK17-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
17665 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17666 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17667 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17668 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
17669 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17670 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17671 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17672 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
17673 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17674 // CHECK17:       cond.true:
17675 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17676 // CHECK17-NEXT:    br label [[COND_END:%.*]]
17677 // CHECK17:       cond.false:
17678 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17679 // CHECK17-NEXT:    br label [[COND_END]]
17680 // CHECK17:       cond.end:
17681 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
17682 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17683 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17684 // CHECK17-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
17685 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17686 // CHECK17:       omp.inner.for.cond:
17687 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17688 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17689 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
17690 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17691 // CHECK17:       omp.inner.for.body:
17692 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17693 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
17694 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17695 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
17696 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
17697 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
17698 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
17699 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
17700 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17701 // CHECK17:       omp.body.continue:
17702 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17703 // CHECK17:       omp.inner.for.inc:
17704 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17705 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
17706 // CHECK17-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
17707 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
17708 // CHECK17:       omp.inner.for.end:
17709 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17710 // CHECK17:       omp.loop.exit:
17711 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17712 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
17713 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
17714 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
17715 // CHECK17:       omp.precond.end:
17716 // CHECK17-NEXT:    ret void
17717 //
17718 //
17719 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
17720 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17721 // CHECK17-NEXT:  entry:
17722 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
17723 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17724 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17725 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
17726 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17727 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17728 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17729 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17730 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17731 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
17732 // CHECK17-NEXT:    ret void
17733 //
17734 //
17735 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2
17736 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17737 // CHECK17-NEXT:  entry:
17738 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17739 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17740 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
17741 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17742 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17743 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17744 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17745 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17746 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17747 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
17748 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17749 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17750 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17751 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17752 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
17753 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17754 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17755 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
17756 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17757 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17758 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17759 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17760 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17761 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17762 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
17763 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17764 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17765 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17766 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17767 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17768 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
17769 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17770 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17771 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17772 // CHECK17:       omp.precond.then:
17773 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17774 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17775 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
17776 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17777 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17778 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17779 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
17780 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17781 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17782 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17783 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
17784 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17785 // CHECK17:       cond.true:
17786 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17787 // CHECK17-NEXT:    br label [[COND_END:%.*]]
17788 // CHECK17:       cond.false:
17789 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17790 // CHECK17-NEXT:    br label [[COND_END]]
17791 // CHECK17:       cond.end:
17792 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
17793 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17794 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17795 // CHECK17-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
17796 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17797 // CHECK17:       omp.inner.for.cond:
17798 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17799 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17800 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
17801 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17802 // CHECK17:       omp.inner.for.body:
17803 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17804 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
17805 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17806 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
17807 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
17808 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17809 // CHECK17:       omp.inner.for.inc:
17810 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17811 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17812 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
17813 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17814 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
17815 // CHECK17:       omp.inner.for.end:
17816 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17817 // CHECK17:       omp.loop.exit:
17818 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17819 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
17820 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
17821 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
17822 // CHECK17:       omp.precond.end:
17823 // CHECK17-NEXT:    ret void
17824 //
17825 //
17826 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3
17827 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17828 // CHECK17-NEXT:  entry:
17829 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17830 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17831 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
17832 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
17833 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
17834 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17835 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17836 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17837 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17838 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17839 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17840 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
17841 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17842 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17843 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17844 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17845 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
17846 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17847 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17848 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17849 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17850 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
17851 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17852 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17853 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17854 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17855 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17856 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17857 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
17858 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17859 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17860 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17861 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17862 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17863 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
17864 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17865 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17866 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17867 // CHECK17:       omp.precond.then:
17868 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17869 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17870 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
17871 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
17872 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
17873 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
17874 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
17875 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
17876 // CHECK17-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
17877 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17878 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17879 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17880 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
17881 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17882 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17883 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17884 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
17885 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17886 // CHECK17:       cond.true:
17887 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17888 // CHECK17-NEXT:    br label [[COND_END:%.*]]
17889 // CHECK17:       cond.false:
17890 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17891 // CHECK17-NEXT:    br label [[COND_END]]
17892 // CHECK17:       cond.end:
17893 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
17894 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17895 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17896 // CHECK17-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
17897 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17898 // CHECK17:       omp.inner.for.cond:
17899 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17900 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17901 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
17902 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17903 // CHECK17:       omp.inner.for.body:
17904 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17905 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
17906 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17907 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
17908 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
17909 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
17910 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
17911 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
17912 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17913 // CHECK17:       omp.body.continue:
17914 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17915 // CHECK17:       omp.inner.for.inc:
17916 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17917 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
17918 // CHECK17-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
17919 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
17920 // CHECK17:       omp.inner.for.end:
17921 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17922 // CHECK17:       omp.loop.exit:
17923 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
17924 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
17925 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
17926 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
17927 // CHECK17:       omp.precond.end:
17928 // CHECK17-NEXT:    ret void
17929 //
17930 //
17931 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
17932 // CHECK17-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
17933 // CHECK17-NEXT:  entry:
17934 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
17935 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
17936 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17937 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17938 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17939 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
17940 // CHECK17-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
17941 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
17942 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17943 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17944 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
17945 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17946 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17947 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17948 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
17949 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
17950 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17951 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
17952 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
17953 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
17954 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
17955 // CHECK17-NEXT:    ret void
17956 //
17957 //
17958 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..5
17959 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17960 // CHECK17-NEXT:  entry:
17961 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
17962 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
17963 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
17964 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17965 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17966 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
17967 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17968 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17969 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17970 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
17971 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
17972 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17973 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17974 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17975 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17976 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
17977 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
17978 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
17979 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
17980 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
17981 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17982 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17983 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
17984 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
17985 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17986 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17987 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
17988 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
17989 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17990 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17991 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
17992 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17993 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
17994 // CHECK17-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
17995 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
17996 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17997 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
17998 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
17999 // CHECK17:       omp.precond.then:
18000 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18001 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18002 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
18003 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18004 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18005 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
18006 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18007 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
18008 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
18009 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18010 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18011 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
18012 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18013 // CHECK17:       cond.true:
18014 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18015 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18016 // CHECK17:       cond.false:
18017 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18018 // CHECK17-NEXT:    br label [[COND_END]]
18019 // CHECK17:       cond.end:
18020 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
18021 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18022 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18023 // CHECK17-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
18024 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18025 // CHECK17:       omp.inner.for.cond:
18026 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18027 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18028 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
18029 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
18030 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18031 // CHECK17:       omp.inner.for.body:
18032 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18033 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
18034 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18035 // CHECK17-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
18036 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
18037 // CHECK17-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18038 // CHECK17-NEXT:    store i32 [[TMP21]], i32* [[CONV7]], align 4
18039 // CHECK17-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18040 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
18041 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18042 // CHECK17:       omp.inner.for.inc:
18043 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18044 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18045 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
18046 // CHECK17-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
18047 // CHECK17-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18048 // CHECK17-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18049 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
18050 // CHECK17-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
18051 // CHECK17-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18052 // CHECK17-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18053 // CHECK17-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
18054 // CHECK17-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
18055 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18056 // CHECK17-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18057 // CHECK17-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
18058 // CHECK17-NEXT:    br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
18059 // CHECK17:       cond.true12:
18060 // CHECK17-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18061 // CHECK17-NEXT:    br label [[COND_END14:%.*]]
18062 // CHECK17:       cond.false13:
18063 // CHECK17-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18064 // CHECK17-NEXT:    br label [[COND_END14]]
18065 // CHECK17:       cond.end14:
18066 // CHECK17-NEXT:    [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
18067 // CHECK17-NEXT:    store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
18068 // CHECK17-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18069 // CHECK17-NEXT:    store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
18070 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18071 // CHECK17:       omp.inner.for.end:
18072 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18073 // CHECK17:       omp.loop.exit:
18074 // CHECK17-NEXT:    [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18075 // CHECK17-NEXT:    [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
18076 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
18077 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18078 // CHECK17:       omp.precond.end:
18079 // CHECK17-NEXT:    ret void
18080 //
18081 //
18082 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6
18083 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18084 // CHECK17-NEXT:  entry:
18085 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18086 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18087 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18088 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18089 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18090 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18091 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18092 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18093 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18094 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18095 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18096 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18097 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18098 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18099 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18100 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18101 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18102 // CHECK17-NEXT:    [[I6:%.*]] = alloca i32, align 4
18103 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18104 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18105 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18106 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18107 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18108 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18109 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18110 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18111 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18112 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18113 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18114 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18115 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18116 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18117 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18118 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18119 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18120 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
18121 // CHECK17-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18122 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18123 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18124 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18125 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18126 // CHECK17:       omp.precond.then:
18127 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18128 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18129 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
18130 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18131 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
18132 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18133 // CHECK17-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
18134 // CHECK17-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
18135 // CHECK17-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
18136 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18137 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18138 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18139 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
18140 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18141 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18142 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18143 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
18144 // CHECK17-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18145 // CHECK17:       cond.true:
18146 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18147 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18148 // CHECK17:       cond.false:
18149 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18150 // CHECK17-NEXT:    br label [[COND_END]]
18151 // CHECK17:       cond.end:
18152 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
18153 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18154 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18155 // CHECK17-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
18156 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18157 // CHECK17:       omp.inner.for.cond:
18158 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18159 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18160 // CHECK17-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
18161 // CHECK17-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18162 // CHECK17:       omp.inner.for.body:
18163 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18164 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
18165 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18166 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4
18167 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
18168 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
18169 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
18170 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
18171 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18172 // CHECK17:       omp.body.continue:
18173 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18174 // CHECK17:       omp.inner.for.inc:
18175 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18176 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
18177 // CHECK17-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
18178 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18179 // CHECK17:       omp.inner.for.end:
18180 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18181 // CHECK17:       omp.loop.exit:
18182 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18183 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
18184 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
18185 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18186 // CHECK17:       omp.precond.end:
18187 // CHECK17-NEXT:    ret void
18188 //
18189 //
18190 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
18191 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18192 // CHECK17-NEXT:  entry:
18193 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18194 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18195 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18196 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18197 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18198 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18199 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18200 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18201 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18202 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
18203 // CHECK17-NEXT:    ret void
18204 //
18205 //
18206 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..8
18207 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18208 // CHECK17-NEXT:  entry:
18209 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18210 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18211 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18212 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18213 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18214 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18215 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18216 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18217 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18218 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18219 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18220 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18221 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18222 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18223 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
18224 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18225 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18226 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18227 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18228 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18229 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18230 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18231 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18232 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18233 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
18234 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18235 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18236 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18237 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18238 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18239 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18240 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18241 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18242 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18243 // CHECK17:       omp.precond.then:
18244 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18245 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18246 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
18247 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18248 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18249 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18250 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
18251 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18252 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18253 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18254 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
18255 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18256 // CHECK17:       cond.true:
18257 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18258 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18259 // CHECK17:       cond.false:
18260 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18261 // CHECK17-NEXT:    br label [[COND_END]]
18262 // CHECK17:       cond.end:
18263 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
18264 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18265 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18266 // CHECK17-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
18267 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18268 // CHECK17:       omp.inner.for.cond:
18269 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18270 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18271 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
18272 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18273 // CHECK17:       omp.inner.for.body:
18274 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18275 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
18276 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18277 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
18278 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
18279 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18280 // CHECK17:       omp.inner.for.inc:
18281 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18282 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18283 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
18284 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18285 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18286 // CHECK17:       omp.inner.for.end:
18287 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18288 // CHECK17:       omp.loop.exit:
18289 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18290 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
18291 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
18292 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18293 // CHECK17:       omp.precond.end:
18294 // CHECK17-NEXT:    ret void
18295 //
18296 //
18297 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..9
18298 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18299 // CHECK17-NEXT:  entry:
18300 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18301 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18302 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18303 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18304 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18305 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18306 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18307 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18308 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18309 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18310 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18311 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18312 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18313 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18314 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18315 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18316 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
18317 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18318 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18319 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18320 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18321 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18322 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18323 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18324 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18325 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18326 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18327 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18328 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
18329 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18330 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18331 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18332 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18333 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18334 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18335 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18336 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18337 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18338 // CHECK17:       omp.precond.then:
18339 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18340 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18341 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
18342 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18343 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
18344 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18345 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
18346 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
18347 // CHECK17-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
18348 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18349 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18350 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18351 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18352 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18353 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
18354 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
18355 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
18356 // CHECK17:       omp.dispatch.cond:
18357 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18358 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
18359 // CHECK17-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
18360 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
18361 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18362 // CHECK17:       omp.dispatch.body:
18363 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18364 // CHECK17-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
18365 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18366 // CHECK17:       omp.inner.for.cond:
18367 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
18368 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
18369 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
18370 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18371 // CHECK17:       omp.inner.for.body:
18372 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
18373 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
18374 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18375 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15
18376 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15
18377 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
18378 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
18379 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
18380 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18381 // CHECK17:       omp.body.continue:
18382 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18383 // CHECK17:       omp.inner.for.inc:
18384 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
18385 // CHECK17-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
18386 // CHECK17-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
18387 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
18388 // CHECK17:       omp.inner.for.end:
18389 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
18390 // CHECK17:       omp.dispatch.inc:
18391 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
18392 // CHECK17:       omp.dispatch.end:
18393 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18394 // CHECK17:       omp.precond.end:
18395 // CHECK17-NEXT:    ret void
18396 //
18397 //
18398 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
18399 // CHECK17-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18400 // CHECK17-NEXT:  entry:
18401 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
18402 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18403 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18404 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18405 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18406 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18407 // CHECK17-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
18408 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18409 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18410 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18411 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
18412 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18413 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18414 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18415 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18416 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
18417 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18418 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18419 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
18420 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18421 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
18422 // CHECK17-NEXT:    ret void
18423 //
18424 //
18425 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
18426 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18427 // CHECK17-NEXT:  entry:
18428 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18429 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18430 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18431 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18432 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18433 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18434 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18435 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18436 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18437 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18438 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18439 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18440 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18441 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18442 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18443 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
18444 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18445 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18446 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18447 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18448 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18449 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18450 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18451 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18452 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18453 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18454 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18455 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18456 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18457 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18458 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18459 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18460 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
18461 // CHECK17-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18462 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18463 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18464 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18465 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18466 // CHECK17:       omp.precond.then:
18467 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18468 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18469 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
18470 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18471 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18472 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18473 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
18474 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18475 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18476 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18477 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
18478 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18479 // CHECK17:       cond.true:
18480 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18481 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18482 // CHECK17:       cond.false:
18483 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18484 // CHECK17-NEXT:    br label [[COND_END]]
18485 // CHECK17:       cond.end:
18486 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
18487 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18488 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18489 // CHECK17-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
18490 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18491 // CHECK17:       omp.inner.for.cond:
18492 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18493 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18494 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
18495 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18496 // CHECK17:       omp.inner.for.body:
18497 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18498 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
18499 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18500 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
18501 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
18502 // CHECK17-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18503 // CHECK17-NEXT:    store i32 [[TMP20]], i32* [[CONV7]], align 4
18504 // CHECK17-NEXT:    [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18505 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
18506 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18507 // CHECK17:       omp.inner.for.inc:
18508 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18509 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18510 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
18511 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18512 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18513 // CHECK17:       omp.inner.for.end:
18514 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18515 // CHECK17:       omp.loop.exit:
18516 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18517 // CHECK17-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
18518 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
18519 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18520 // CHECK17:       omp.precond.end:
18521 // CHECK17-NEXT:    ret void
18522 //
18523 //
18524 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..12
18525 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18526 // CHECK17-NEXT:  entry:
18527 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18528 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18529 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18530 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18531 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18532 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18533 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18534 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18535 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18536 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18537 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18538 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18539 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18540 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18541 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18542 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18543 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18544 // CHECK17-NEXT:    [[I6:%.*]] = alloca i32, align 4
18545 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18546 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18547 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18548 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18549 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18550 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18551 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18552 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18553 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18554 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18555 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18556 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18557 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18558 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18559 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18560 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18561 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18562 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
18563 // CHECK17-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18564 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18565 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18566 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18567 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18568 // CHECK17:       omp.precond.then:
18569 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18570 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18571 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
18572 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18573 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
18574 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18575 // CHECK17-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
18576 // CHECK17-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
18577 // CHECK17-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
18578 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18579 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18580 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
18581 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18582 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18583 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18584 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
18585 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
18586 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
18587 // CHECK17:       omp.dispatch.cond:
18588 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18589 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
18590 // CHECK17-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
18591 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
18592 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18593 // CHECK17:       omp.dispatch.body:
18594 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18595 // CHECK17-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
18596 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18597 // CHECK17:       omp.inner.for.cond:
18598 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
18599 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
18600 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
18601 // CHECK17-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18602 // CHECK17:       omp.inner.for.body:
18603 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
18604 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
18605 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18606 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18
18607 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18
18608 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
18609 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
18610 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
18611 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18612 // CHECK17:       omp.body.continue:
18613 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18614 // CHECK17:       omp.inner.for.inc:
18615 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
18616 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
18617 // CHECK17-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
18618 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
18619 // CHECK17:       omp.inner.for.end:
18620 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
18621 // CHECK17:       omp.dispatch.inc:
18622 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
18623 // CHECK17:       omp.dispatch.end:
18624 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18625 // CHECK17:       omp.precond.end:
18626 // CHECK17-NEXT:    ret void
18627 //
18628 //
18629 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
18630 // CHECK17-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
18631 // CHECK17-NEXT:  entry:
18632 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
18633 // CHECK17-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
18634 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
18635 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
18636 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
18637 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
18638 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18639 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
18640 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
18641 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
18642 // CHECK17-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
18643 // CHECK17-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
18644 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
18645 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
18646 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
18647 // CHECK17-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
18648 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
18649 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
18650 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
18651 // CHECK17-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
18652 // CHECK17-NEXT:    [[M_CASTED19:%.*]] = alloca i64, align 8
18653 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
18654 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
18655 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
18656 // CHECK17-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
18657 // CHECK17-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
18658 // CHECK17-NEXT:    store i32 10, i32* [[M]], align 4
18659 // CHECK17-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
18660 // CHECK17-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
18661 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
18662 // CHECK17-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
18663 // CHECK17-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
18664 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
18665 // CHECK17-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
18666 // CHECK17-NEXT:    store i8* null, i8** [[TMP4]], align 8
18667 // CHECK17-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
18668 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
18669 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18670 // CHECK17-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18671 // CHECK17-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
18672 // CHECK17-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
18673 // CHECK17:       omp_offload.failed:
18674 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
18675 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
18676 // CHECK17:       omp_offload.cont:
18677 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
18678 // CHECK17-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
18679 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
18680 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
18681 // CHECK17-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
18682 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
18683 // CHECK17-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
18684 // CHECK17-NEXT:    store i8* null, i8** [[TMP13]], align 8
18685 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
18686 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
18687 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18688 // CHECK17-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18689 // CHECK17-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
18690 // CHECK17-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
18691 // CHECK17:       omp_offload.failed5:
18692 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
18693 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
18694 // CHECK17:       omp_offload.cont6:
18695 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
18696 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
18697 // CHECK17-NEXT:    store i32 [[TMP18]], i32* [[CONV]], align 4
18698 // CHECK17-NEXT:    [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
18699 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
18700 // CHECK17-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
18701 // CHECK17-NEXT:    store i64 [[TMP19]], i64* [[TMP21]], align 8
18702 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
18703 // CHECK17-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
18704 // CHECK17-NEXT:    store i64 [[TMP19]], i64* [[TMP23]], align 8
18705 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
18706 // CHECK17-NEXT:    store i8* null, i8** [[TMP24]], align 8
18707 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
18708 // CHECK17-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
18709 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
18710 // CHECK17-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
18711 // CHECK17-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
18712 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
18713 // CHECK17-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
18714 // CHECK17-NEXT:    store i8* null, i8** [[TMP29]], align 8
18715 // CHECK17-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
18716 // CHECK17-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
18717 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18718 // CHECK17-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18719 // CHECK17-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
18720 // CHECK17-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
18721 // CHECK17:       omp_offload.failed11:
18722 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
18723 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
18724 // CHECK17:       omp_offload.cont12:
18725 // CHECK17-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
18726 // CHECK17-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
18727 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
18728 // CHECK17-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
18729 // CHECK17-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
18730 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
18731 // CHECK17-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
18732 // CHECK17-NEXT:    store i8* null, i8** [[TMP38]], align 8
18733 // CHECK17-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
18734 // CHECK17-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
18735 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18736 // CHECK17-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18737 // CHECK17-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
18738 // CHECK17-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
18739 // CHECK17:       omp_offload.failed17:
18740 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
18741 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
18742 // CHECK17:       omp_offload.cont18:
18743 // CHECK17-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
18744 // CHECK17-NEXT:    [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
18745 // CHECK17-NEXT:    store i32 [[TMP43]], i32* [[CONV20]], align 4
18746 // CHECK17-NEXT:    [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
18747 // CHECK17-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
18748 // CHECK17-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
18749 // CHECK17-NEXT:    store i64 [[TMP44]], i64* [[TMP46]], align 8
18750 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
18751 // CHECK17-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
18752 // CHECK17-NEXT:    store i64 [[TMP44]], i64* [[TMP48]], align 8
18753 // CHECK17-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
18754 // CHECK17-NEXT:    store i8* null, i8** [[TMP49]], align 8
18755 // CHECK17-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
18756 // CHECK17-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
18757 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
18758 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
18759 // CHECK17-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
18760 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
18761 // CHECK17-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
18762 // CHECK17-NEXT:    store i8* null, i8** [[TMP54]], align 8
18763 // CHECK17-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
18764 // CHECK17-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
18765 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
18766 // CHECK17-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
18767 // CHECK17-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
18768 // CHECK17-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
18769 // CHECK17:       omp_offload.failed25:
18770 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
18771 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
18772 // CHECK17:       omp_offload.cont26:
18773 // CHECK17-NEXT:    ret i32 0
18774 //
18775 //
18776 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
18777 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18778 // CHECK17-NEXT:  entry:
18779 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18780 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18781 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18782 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
18783 // CHECK17-NEXT:    ret void
18784 //
18785 //
18786 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14
18787 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18788 // CHECK17-NEXT:  entry:
18789 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18790 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18791 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18792 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18793 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18794 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18795 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18796 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18797 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18798 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18799 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18800 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18801 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18802 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18803 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18804 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
18805 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18806 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18807 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18808 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
18809 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18810 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18811 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
18812 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18813 // CHECK17:       cond.true:
18814 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18815 // CHECK17:       cond.false:
18816 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18817 // CHECK17-NEXT:    br label [[COND_END]]
18818 // CHECK17:       cond.end:
18819 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
18820 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18821 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18822 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
18823 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18824 // CHECK17:       omp.inner.for.cond:
18825 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18826 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18827 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
18828 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18829 // CHECK17:       omp.inner.for.body:
18830 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18831 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
18832 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18833 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
18834 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
18835 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18836 // CHECK17:       omp.inner.for.inc:
18837 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18838 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18839 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
18840 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18841 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18842 // CHECK17:       omp.inner.for.end:
18843 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18844 // CHECK17:       omp.loop.exit:
18845 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
18846 // CHECK17-NEXT:    ret void
18847 //
18848 //
18849 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15
18850 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18851 // CHECK17-NEXT:  entry:
18852 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18853 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18854 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18855 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18856 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18857 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18858 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18859 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18860 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18861 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18862 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18863 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18864 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18865 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18866 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18867 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18868 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18869 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18870 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18871 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
18872 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18873 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
18874 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18875 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
18876 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
18877 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
18878 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18879 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18880 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18881 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
18882 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18883 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18884 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
18885 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18886 // CHECK17:       cond.true:
18887 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18888 // CHECK17:       cond.false:
18889 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18890 // CHECK17-NEXT:    br label [[COND_END]]
18891 // CHECK17:       cond.end:
18892 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
18893 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18894 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18895 // CHECK17-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
18896 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18897 // CHECK17:       omp.inner.for.cond:
18898 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18899 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18900 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
18901 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18902 // CHECK17:       omp.inner.for.body:
18903 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18904 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
18905 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18906 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
18907 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
18908 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
18909 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
18910 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
18911 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18912 // CHECK17:       omp.body.continue:
18913 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18914 // CHECK17:       omp.inner.for.inc:
18915 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18916 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
18917 // CHECK17-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
18918 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18919 // CHECK17:       omp.inner.for.end:
18920 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18921 // CHECK17:       omp.loop.exit:
18922 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
18923 // CHECK17-NEXT:    ret void
18924 //
18925 //
18926 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
18927 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18928 // CHECK17-NEXT:  entry:
18929 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18930 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18931 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18932 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
18933 // CHECK17-NEXT:    ret void
18934 //
18935 //
18936 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..17
18937 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
18938 // CHECK17-NEXT:  entry:
18939 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18940 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18941 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
18942 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18943 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18944 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18945 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18946 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18947 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18948 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18949 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18950 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18951 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
18952 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
18953 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18954 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
18955 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18956 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18957 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18958 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
18959 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18960 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18961 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
18962 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18963 // CHECK17:       cond.true:
18964 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18965 // CHECK17:       cond.false:
18966 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18967 // CHECK17-NEXT:    br label [[COND_END]]
18968 // CHECK17:       cond.end:
18969 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
18970 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18971 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18972 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
18973 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18974 // CHECK17:       omp.inner.for.cond:
18975 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18976 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18977 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
18978 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18979 // CHECK17:       omp.inner.for.body:
18980 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18981 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
18982 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18983 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
18984 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
18985 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18986 // CHECK17:       omp.inner.for.inc:
18987 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18988 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18989 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
18990 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18991 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18992 // CHECK17:       omp.inner.for.end:
18993 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18994 // CHECK17:       omp.loop.exit:
18995 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
18996 // CHECK17-NEXT:    ret void
18997 //
18998 //
18999 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18
19000 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19001 // CHECK17-NEXT:  entry:
19002 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19003 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19004 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19005 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19006 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19007 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19008 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19009 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19010 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19011 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19012 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19013 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19014 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19015 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19016 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19017 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19018 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19019 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19020 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19021 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19022 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19023 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
19024 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19025 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
19026 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
19027 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
19028 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19029 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19030 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19031 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
19032 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19033 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19034 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
19035 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19036 // CHECK17:       cond.true:
19037 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19038 // CHECK17:       cond.false:
19039 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19040 // CHECK17-NEXT:    br label [[COND_END]]
19041 // CHECK17:       cond.end:
19042 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
19043 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19044 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19045 // CHECK17-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
19046 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19047 // CHECK17:       omp.inner.for.cond:
19048 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19049 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19050 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
19051 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19052 // CHECK17:       omp.inner.for.body:
19053 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19054 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
19055 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19056 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
19057 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
19058 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
19059 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19060 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
19061 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19062 // CHECK17:       omp.body.continue:
19063 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19064 // CHECK17:       omp.inner.for.inc:
19065 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19066 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
19067 // CHECK17-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
19068 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19069 // CHECK17:       omp.inner.for.end:
19070 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19071 // CHECK17:       omp.loop.exit:
19072 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
19073 // CHECK17-NEXT:    ret void
19074 //
19075 //
19076 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
19077 // CHECK17-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19078 // CHECK17-NEXT:  entry:
19079 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
19080 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19081 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19082 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19083 // CHECK17-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
19084 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19085 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
19086 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19087 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
19088 // CHECK17-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
19089 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19090 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19091 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
19092 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19093 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
19094 // CHECK17-NEXT:    ret void
19095 //
19096 //
19097 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..21
19098 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19099 // CHECK17-NEXT:  entry:
19100 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19101 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19102 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19103 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19104 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19105 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19106 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19107 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19108 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19109 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19110 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19111 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19112 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19113 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19114 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19115 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19116 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19117 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19118 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19119 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19120 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19121 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19122 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19123 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19124 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19125 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19126 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19127 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19128 // CHECK17:       cond.true:
19129 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19130 // CHECK17:       cond.false:
19131 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19132 // CHECK17-NEXT:    br label [[COND_END]]
19133 // CHECK17:       cond.end:
19134 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19135 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19136 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19137 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19138 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19139 // CHECK17:       omp.inner.for.cond:
19140 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19141 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19142 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19143 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19144 // CHECK17:       omp.inner.for.body:
19145 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19146 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19147 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19148 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19149 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
19150 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19151 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
19152 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19153 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
19154 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19155 // CHECK17:       omp.inner.for.inc:
19156 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19157 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19158 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19159 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19160 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19161 // CHECK17:       omp.inner.for.end:
19162 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19163 // CHECK17:       omp.loop.exit:
19164 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19165 // CHECK17-NEXT:    ret void
19166 //
19167 //
19168 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22
19169 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19170 // CHECK17-NEXT:  entry:
19171 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19172 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19173 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19174 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19175 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19176 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19177 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19178 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19179 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19180 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19181 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19182 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19183 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19184 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19185 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19186 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19187 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19188 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19189 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19190 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19191 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19192 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19193 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19194 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19195 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
19196 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19197 // CHECK17-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
19198 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
19199 // CHECK17-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
19200 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19201 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19202 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
19203 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19204 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
19205 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
19206 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
19207 // CHECK17:       omp.dispatch.cond:
19208 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19209 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19210 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
19211 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
19212 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19213 // CHECK17:       cond.true:
19214 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19215 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
19216 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19217 // CHECK17:       cond.false:
19218 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19219 // CHECK17-NEXT:    br label [[COND_END]]
19220 // CHECK17:       cond.end:
19221 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
19222 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19223 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19224 // CHECK17-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
19225 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19226 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19227 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
19228 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19229 // CHECK17:       omp.dispatch.body:
19230 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19231 // CHECK17:       omp.inner.for.cond:
19232 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19233 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19234 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
19235 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19236 // CHECK17:       omp.inner.for.body:
19237 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19238 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
19239 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19240 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
19241 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
19242 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
19243 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19244 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
19245 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19246 // CHECK17:       omp.body.continue:
19247 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19248 // CHECK17:       omp.inner.for.inc:
19249 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19250 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
19251 // CHECK17-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
19252 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19253 // CHECK17:       omp.inner.for.end:
19254 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
19255 // CHECK17:       omp.dispatch.inc:
19256 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19257 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19258 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
19259 // CHECK17-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
19260 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19261 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19262 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
19263 // CHECK17-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
19264 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
19265 // CHECK17:       omp.dispatch.end:
19266 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
19267 // CHECK17-NEXT:    ret void
19268 //
19269 //
19270 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
19271 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19272 // CHECK17-NEXT:  entry:
19273 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19274 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19275 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19276 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
19277 // CHECK17-NEXT:    ret void
19278 //
19279 //
19280 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..25
19281 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19282 // CHECK17-NEXT:  entry:
19283 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19284 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19285 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19286 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19287 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19288 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19289 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19290 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19291 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19292 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19293 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19294 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19295 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19296 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19297 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19298 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19299 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19300 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19301 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19302 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19303 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19304 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19305 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19306 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19307 // CHECK17:       cond.true:
19308 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19309 // CHECK17:       cond.false:
19310 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19311 // CHECK17-NEXT:    br label [[COND_END]]
19312 // CHECK17:       cond.end:
19313 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19314 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19315 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19316 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19317 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19318 // CHECK17:       omp.inner.for.cond:
19319 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19320 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19321 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19322 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19323 // CHECK17:       omp.inner.for.body:
19324 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19325 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19326 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19327 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19328 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
19329 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19330 // CHECK17:       omp.inner.for.inc:
19331 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19332 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19333 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19334 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19335 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19336 // CHECK17:       omp.inner.for.end:
19337 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19338 // CHECK17:       omp.loop.exit:
19339 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19340 // CHECK17-NEXT:    ret void
19341 //
19342 //
19343 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26
19344 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19345 // CHECK17-NEXT:  entry:
19346 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19347 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19348 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19349 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19350 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19351 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19352 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19353 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19354 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19355 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19356 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19357 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19358 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19359 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19360 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19361 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19362 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19363 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19364 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19365 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19366 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19367 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
19368 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19369 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
19370 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
19371 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
19372 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19373 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19374 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19375 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19376 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19377 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
19378 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
19379 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
19380 // CHECK17:       omp.dispatch.cond:
19381 // CHECK17-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
19382 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
19383 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19384 // CHECK17:       omp.dispatch.body:
19385 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19386 // CHECK17-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
19387 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19388 // CHECK17:       omp.inner.for.cond:
19389 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
19390 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
19391 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
19392 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19393 // CHECK17:       omp.inner.for.body:
19394 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
19395 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
19396 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19397 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
19398 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
19399 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
19400 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19401 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
19402 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19403 // CHECK17:       omp.body.continue:
19404 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19405 // CHECK17:       omp.inner.for.inc:
19406 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
19407 // CHECK17-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
19408 // CHECK17-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
19409 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
19410 // CHECK17:       omp.inner.for.end:
19411 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
19412 // CHECK17:       omp.dispatch.inc:
19413 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
19414 // CHECK17:       omp.dispatch.end:
19415 // CHECK17-NEXT:    ret void
19416 //
19417 //
19418 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
19419 // CHECK17-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19420 // CHECK17-NEXT:  entry:
19421 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
19422 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19423 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19424 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19425 // CHECK17-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
19426 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19427 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
19428 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19429 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
19430 // CHECK17-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
19431 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19432 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19433 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
19434 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19435 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
19436 // CHECK17-NEXT:    ret void
19437 //
19438 //
19439 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..29
19440 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19441 // CHECK17-NEXT:  entry:
19442 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19443 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19444 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19445 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19446 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19447 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19448 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19449 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19450 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19451 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19452 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19453 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19454 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19455 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19456 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19457 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19458 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19459 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19460 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19461 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19462 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19463 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19464 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19465 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19466 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19467 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19468 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19469 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19470 // CHECK17:       cond.true:
19471 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19472 // CHECK17:       cond.false:
19473 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19474 // CHECK17-NEXT:    br label [[COND_END]]
19475 // CHECK17:       cond.end:
19476 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19477 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19478 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19479 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19480 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19481 // CHECK17:       omp.inner.for.cond:
19482 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19483 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19484 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19485 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19486 // CHECK17:       omp.inner.for.body:
19487 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19488 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19489 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19490 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19491 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
19492 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19493 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
19494 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19495 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
19496 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19497 // CHECK17:       omp.inner.for.inc:
19498 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19499 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19500 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19501 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19502 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19503 // CHECK17:       omp.inner.for.end:
19504 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19505 // CHECK17:       omp.loop.exit:
19506 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19507 // CHECK17-NEXT:    ret void
19508 //
19509 //
19510 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30
19511 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19512 // CHECK17-NEXT:  entry:
19513 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19514 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19515 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19516 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19517 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19518 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19519 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19520 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19521 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19522 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19523 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19524 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19525 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19526 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19527 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19528 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19529 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19530 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19531 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19532 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19533 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19534 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19535 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19536 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19537 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
19538 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19539 // CHECK17-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
19540 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
19541 // CHECK17-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
19542 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19543 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19544 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
19545 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19546 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19547 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19548 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
19549 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
19550 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
19551 // CHECK17:       omp.dispatch.cond:
19552 // CHECK17-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
19553 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
19554 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19555 // CHECK17:       omp.dispatch.body:
19556 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19557 // CHECK17-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
19558 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19559 // CHECK17:       omp.inner.for.cond:
19560 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
19561 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
19562 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
19563 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19564 // CHECK17:       omp.inner.for.body:
19565 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
19566 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
19567 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19568 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
19569 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
19570 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
19571 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19572 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
19573 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19574 // CHECK17:       omp.body.continue:
19575 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19576 // CHECK17:       omp.inner.for.inc:
19577 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
19578 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
19579 // CHECK17-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
19580 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
19581 // CHECK17:       omp.inner.for.end:
19582 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
19583 // CHECK17:       omp.dispatch.inc:
19584 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
19585 // CHECK17:       omp.dispatch.end:
19586 // CHECK17-NEXT:    ret void
19587 //
19588 //
19589 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
19590 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] {
19591 // CHECK17-NEXT:  entry:
19592 // CHECK17-NEXT:    call void @__tgt_register_requires(i64 1)
19593 // CHECK17-NEXT:    ret void
19594 //
19595 //
19596 // CHECK18-LABEL: define {{[^@]+}}@main
19597 // CHECK18-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
19598 // CHECK18-NEXT:  entry:
19599 // CHECK18-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
19600 // CHECK18-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
19601 // CHECK18-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
19602 // CHECK18-NEXT:    [[N:%.*]] = alloca i32, align 4
19603 // CHECK18-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
19604 // CHECK18-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
19605 // CHECK18-NEXT:    [[M:%.*]] = alloca i32, align 4
19606 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
19607 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
19608 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
19609 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
19610 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
19611 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19612 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19613 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
19614 // CHECK18-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
19615 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
19616 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
19617 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
19618 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
19619 // CHECK18-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
19620 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
19621 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
19622 // CHECK18-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
19623 // CHECK18-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
19624 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
19625 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
19626 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
19627 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
19628 // CHECK18-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
19629 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
19630 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
19631 // CHECK18-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
19632 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
19633 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
19634 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
19635 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
19636 // CHECK18-NEXT:    [[_TMP40:%.*]] = alloca i32, align 4
19637 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
19638 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
19639 // CHECK18-NEXT:    [[M_CASTED49:%.*]] = alloca i64, align 8
19640 // CHECK18-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
19641 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
19642 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
19643 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
19644 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
19645 // CHECK18-NEXT:    [[_TMP57:%.*]] = alloca i32, align 4
19646 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
19647 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
19648 // CHECK18-NEXT:    store i32 0, i32* [[RETVAL]], align 4
19649 // CHECK18-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
19650 // CHECK18-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
19651 // CHECK18-NEXT:    store i32 100, i32* [[N]], align 4
19652 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
19653 // CHECK18-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
19654 // CHECK18-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
19655 // CHECK18-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
19656 // CHECK18-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
19657 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
19658 // CHECK18-NEXT:    store i32 10, i32* [[M]], align 4
19659 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
19660 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
19661 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
19662 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
19663 // CHECK18-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
19664 // CHECK18-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
19665 // CHECK18-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
19666 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
19667 // CHECK18-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
19668 // CHECK18-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
19669 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
19670 // CHECK18-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
19671 // CHECK18-NEXT:    store i64 4, i64* [[TMP10]], align 8
19672 // CHECK18-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
19673 // CHECK18-NEXT:    store i8* null, i8** [[TMP11]], align 8
19674 // CHECK18-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
19675 // CHECK18-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
19676 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
19677 // CHECK18-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
19678 // CHECK18-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
19679 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
19680 // CHECK18-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
19681 // CHECK18-NEXT:    store i64 8, i64* [[TMP16]], align 8
19682 // CHECK18-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
19683 // CHECK18-NEXT:    store i8* null, i8** [[TMP17]], align 8
19684 // CHECK18-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
19685 // CHECK18-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
19686 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
19687 // CHECK18-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
19688 // CHECK18-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
19689 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
19690 // CHECK18-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
19691 // CHECK18-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
19692 // CHECK18-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
19693 // CHECK18-NEXT:    store i8* null, i8** [[TMP23]], align 8
19694 // CHECK18-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
19695 // CHECK18-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
19696 // CHECK18-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
19697 // CHECK18-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
19698 // CHECK18-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
19699 // CHECK18-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19700 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
19701 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
19702 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
19703 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
19704 // CHECK18-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19705 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
19706 // CHECK18-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
19707 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
19708 // CHECK18-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19709 // CHECK18-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
19710 // CHECK18-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
19711 // CHECK18:       omp_offload.failed:
19712 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
19713 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
19714 // CHECK18:       omp_offload.cont:
19715 // CHECK18-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
19716 // CHECK18-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
19717 // CHECK18-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
19718 // CHECK18-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
19719 // CHECK18-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
19720 // CHECK18-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
19721 // CHECK18-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
19722 // CHECK18-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
19723 // CHECK18-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
19724 // CHECK18-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
19725 // CHECK18-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
19726 // CHECK18-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
19727 // CHECK18-NEXT:    store i64 4, i64* [[TMP40]], align 8
19728 // CHECK18-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
19729 // CHECK18-NEXT:    store i8* null, i8** [[TMP41]], align 8
19730 // CHECK18-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
19731 // CHECK18-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
19732 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
19733 // CHECK18-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
19734 // CHECK18-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
19735 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
19736 // CHECK18-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
19737 // CHECK18-NEXT:    store i64 8, i64* [[TMP46]], align 8
19738 // CHECK18-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
19739 // CHECK18-NEXT:    store i8* null, i8** [[TMP47]], align 8
19740 // CHECK18-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
19741 // CHECK18-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
19742 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
19743 // CHECK18-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
19744 // CHECK18-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
19745 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
19746 // CHECK18-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
19747 // CHECK18-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
19748 // CHECK18-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
19749 // CHECK18-NEXT:    store i8* null, i8** [[TMP53]], align 8
19750 // CHECK18-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
19751 // CHECK18-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
19752 // CHECK18-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
19753 // CHECK18-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
19754 // CHECK18-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
19755 // CHECK18-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
19756 // CHECK18-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
19757 // CHECK18-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
19758 // CHECK18-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
19759 // CHECK18-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
19760 // CHECK18-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
19761 // CHECK18-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
19762 // CHECK18-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
19763 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
19764 // CHECK18-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19765 // CHECK18-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
19766 // CHECK18-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
19767 // CHECK18:       omp_offload.failed16:
19768 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
19769 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
19770 // CHECK18:       omp_offload.cont17:
19771 // CHECK18-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
19772 // CHECK18-NEXT:    [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
19773 // CHECK18-NEXT:    store i32 [[TMP63]], i32* [[CONV18]], align 4
19774 // CHECK18-NEXT:    [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
19775 // CHECK18-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
19776 // CHECK18-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
19777 // CHECK18-NEXT:    store i32 [[TMP65]], i32* [[CONV20]], align 4
19778 // CHECK18-NEXT:    [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
19779 // CHECK18-NEXT:    [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
19780 // CHECK18-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
19781 // CHECK18-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
19782 // CHECK18-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
19783 // CHECK18-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
19784 // CHECK18-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
19785 // CHECK18-NEXT:    store i64 [[TMP64]], i64* [[TMP71]], align 8
19786 // CHECK18-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
19787 // CHECK18-NEXT:    store i64 4, i64* [[TMP72]], align 8
19788 // CHECK18-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
19789 // CHECK18-NEXT:    store i8* null, i8** [[TMP73]], align 8
19790 // CHECK18-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
19791 // CHECK18-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
19792 // CHECK18-NEXT:    store i64 [[TMP66]], i64* [[TMP75]], align 8
19793 // CHECK18-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
19794 // CHECK18-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
19795 // CHECK18-NEXT:    store i64 [[TMP66]], i64* [[TMP77]], align 8
19796 // CHECK18-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
19797 // CHECK18-NEXT:    store i64 4, i64* [[TMP78]], align 8
19798 // CHECK18-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
19799 // CHECK18-NEXT:    store i8* null, i8** [[TMP79]], align 8
19800 // CHECK18-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
19801 // CHECK18-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
19802 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP81]], align 8
19803 // CHECK18-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
19804 // CHECK18-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
19805 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP83]], align 8
19806 // CHECK18-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
19807 // CHECK18-NEXT:    store i64 8, i64* [[TMP84]], align 8
19808 // CHECK18-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
19809 // CHECK18-NEXT:    store i8* null, i8** [[TMP85]], align 8
19810 // CHECK18-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
19811 // CHECK18-NEXT:    [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
19812 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP87]], align 8
19813 // CHECK18-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
19814 // CHECK18-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
19815 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 8
19816 // CHECK18-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
19817 // CHECK18-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
19818 // CHECK18-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
19819 // CHECK18-NEXT:    store i8* null, i8** [[TMP91]], align 8
19820 // CHECK18-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
19821 // CHECK18-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
19822 // CHECK18-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
19823 // CHECK18-NEXT:    [[TMP95:%.*]] = load i32, i32* [[N]], align 4
19824 // CHECK18-NEXT:    store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
19825 // CHECK18-NEXT:    [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
19826 // CHECK18-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
19827 // CHECK18-NEXT:    [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
19828 // CHECK18-NEXT:    [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
19829 // CHECK18-NEXT:    store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
19830 // CHECK18-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
19831 // CHECK18-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
19832 // CHECK18-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
19833 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
19834 // CHECK18-NEXT:    [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19835 // CHECK18-NEXT:    [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
19836 // CHECK18-NEXT:    br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
19837 // CHECK18:       omp_offload.failed32:
19838 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
19839 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
19840 // CHECK18:       omp_offload.cont33:
19841 // CHECK18-NEXT:    [[TMP101:%.*]] = load i32, i32* [[N]], align 4
19842 // CHECK18-NEXT:    [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
19843 // CHECK18-NEXT:    store i32 [[TMP101]], i32* [[CONV35]], align 4
19844 // CHECK18-NEXT:    [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
19845 // CHECK18-NEXT:    [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
19846 // CHECK18-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
19847 // CHECK18-NEXT:    [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
19848 // CHECK18-NEXT:    store i64 [[TMP102]], i64* [[TMP105]], align 8
19849 // CHECK18-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
19850 // CHECK18-NEXT:    [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
19851 // CHECK18-NEXT:    store i64 [[TMP102]], i64* [[TMP107]], align 8
19852 // CHECK18-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
19853 // CHECK18-NEXT:    store i64 4, i64* [[TMP108]], align 8
19854 // CHECK18-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
19855 // CHECK18-NEXT:    store i8* null, i8** [[TMP109]], align 8
19856 // CHECK18-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
19857 // CHECK18-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
19858 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP111]], align 8
19859 // CHECK18-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
19860 // CHECK18-NEXT:    [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
19861 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP113]], align 8
19862 // CHECK18-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
19863 // CHECK18-NEXT:    store i64 8, i64* [[TMP114]], align 8
19864 // CHECK18-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
19865 // CHECK18-NEXT:    store i8* null, i8** [[TMP115]], align 8
19866 // CHECK18-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
19867 // CHECK18-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
19868 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP117]], align 8
19869 // CHECK18-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
19870 // CHECK18-NEXT:    [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
19871 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP119]], align 8
19872 // CHECK18-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
19873 // CHECK18-NEXT:    store i64 [[TMP103]], i64* [[TMP120]], align 8
19874 // CHECK18-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
19875 // CHECK18-NEXT:    store i8* null, i8** [[TMP121]], align 8
19876 // CHECK18-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
19877 // CHECK18-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
19878 // CHECK18-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
19879 // CHECK18-NEXT:    [[TMP125:%.*]] = load i32, i32* [[N]], align 4
19880 // CHECK18-NEXT:    store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
19881 // CHECK18-NEXT:    [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
19882 // CHECK18-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
19883 // CHECK18-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
19884 // CHECK18-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
19885 // CHECK18-NEXT:    store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
19886 // CHECK18-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
19887 // CHECK18-NEXT:    [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
19888 // CHECK18-NEXT:    [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
19889 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
19890 // CHECK18-NEXT:    [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19891 // CHECK18-NEXT:    [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
19892 // CHECK18-NEXT:    br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
19893 // CHECK18:       omp_offload.failed47:
19894 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
19895 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
19896 // CHECK18:       omp_offload.cont48:
19897 // CHECK18-NEXT:    [[TMP131:%.*]] = load i32, i32* [[M]], align 4
19898 // CHECK18-NEXT:    [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
19899 // CHECK18-NEXT:    store i32 [[TMP131]], i32* [[CONV50]], align 4
19900 // CHECK18-NEXT:    [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
19901 // CHECK18-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
19902 // CHECK18-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
19903 // CHECK18-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
19904 // CHECK18-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
19905 // CHECK18-NEXT:    [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
19906 // CHECK18-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
19907 // CHECK18-NEXT:    [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
19908 // CHECK18-NEXT:    store i64 [[TMP132]], i64* [[TMP137]], align 8
19909 // CHECK18-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
19910 // CHECK18-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
19911 // CHECK18-NEXT:    store i64 [[TMP132]], i64* [[TMP139]], align 8
19912 // CHECK18-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
19913 // CHECK18-NEXT:    store i64 4, i64* [[TMP140]], align 8
19914 // CHECK18-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
19915 // CHECK18-NEXT:    store i8* null, i8** [[TMP141]], align 8
19916 // CHECK18-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
19917 // CHECK18-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
19918 // CHECK18-NEXT:    store i64 [[TMP134]], i64* [[TMP143]], align 8
19919 // CHECK18-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
19920 // CHECK18-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
19921 // CHECK18-NEXT:    store i64 [[TMP134]], i64* [[TMP145]], align 8
19922 // CHECK18-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
19923 // CHECK18-NEXT:    store i64 4, i64* [[TMP146]], align 8
19924 // CHECK18-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
19925 // CHECK18-NEXT:    store i8* null, i8** [[TMP147]], align 8
19926 // CHECK18-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
19927 // CHECK18-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
19928 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP149]], align 8
19929 // CHECK18-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
19930 // CHECK18-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
19931 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP151]], align 8
19932 // CHECK18-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
19933 // CHECK18-NEXT:    store i64 8, i64* [[TMP152]], align 8
19934 // CHECK18-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
19935 // CHECK18-NEXT:    store i8* null, i8** [[TMP153]], align 8
19936 // CHECK18-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
19937 // CHECK18-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
19938 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 8
19939 // CHECK18-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
19940 // CHECK18-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
19941 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 8
19942 // CHECK18-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
19943 // CHECK18-NEXT:    store i64 [[TMP135]], i64* [[TMP158]], align 8
19944 // CHECK18-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
19945 // CHECK18-NEXT:    store i8* null, i8** [[TMP159]], align 8
19946 // CHECK18-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
19947 // CHECK18-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
19948 // CHECK18-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
19949 // CHECK18-NEXT:    [[TMP163:%.*]] = load i32, i32* [[N]], align 4
19950 // CHECK18-NEXT:    store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
19951 // CHECK18-NEXT:    [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
19952 // CHECK18-NEXT:    [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
19953 // CHECK18-NEXT:    [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
19954 // CHECK18-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
19955 // CHECK18-NEXT:    store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
19956 // CHECK18-NEXT:    [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
19957 // CHECK18-NEXT:    [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
19958 // CHECK18-NEXT:    [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
19959 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
19960 // CHECK18-NEXT:    [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19961 // CHECK18-NEXT:    [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
19962 // CHECK18-NEXT:    br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
19963 // CHECK18:       omp_offload.failed64:
19964 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
19965 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
19966 // CHECK18:       omp_offload.cont65:
19967 // CHECK18-NEXT:    [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
19968 // CHECK18-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
19969 // CHECK18-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
19970 // CHECK18-NEXT:    [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
19971 // CHECK18-NEXT:    call void @llvm.stackrestore(i8* [[TMP170]])
19972 // CHECK18-NEXT:    [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
19973 // CHECK18-NEXT:    ret i32 [[TMP171]]
19974 //
19975 //
19976 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
19977 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
19978 // CHECK18-NEXT:  entry:
19979 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
19980 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
19981 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
19982 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
19983 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
19984 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
19985 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
19986 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
19987 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
19988 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
19989 // CHECK18-NEXT:    ret void
19990 //
19991 //
19992 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined.
19993 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
19994 // CHECK18-NEXT:  entry:
19995 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19996 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19997 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
19998 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
19999 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20000 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20001 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20002 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20003 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20004 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20005 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20006 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20007 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20008 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20009 // CHECK18-NEXT:    [[I3:%.*]] = alloca i32, align 4
20010 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20011 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20012 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20013 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20014 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20015 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20016 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20017 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20018 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20019 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20020 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20021 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20022 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20023 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20024 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20025 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20026 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20027 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20028 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20029 // CHECK18:       omp.precond.then:
20030 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20031 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20032 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20033 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20034 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20035 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20036 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20037 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20038 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20039 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20040 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20041 // CHECK18-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20042 // CHECK18:       cond.true:
20043 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20044 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20045 // CHECK18:       cond.false:
20046 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20047 // CHECK18-NEXT:    br label [[COND_END]]
20048 // CHECK18:       cond.end:
20049 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20050 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20051 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20052 // CHECK18-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20053 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20054 // CHECK18:       omp.inner.for.cond:
20055 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20056 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20057 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20058 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20059 // CHECK18:       omp.inner.for.body:
20060 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20061 // CHECK18-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
20062 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20063 // CHECK18-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
20064 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
20065 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20066 // CHECK18:       omp.inner.for.inc:
20067 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20068 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20069 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
20070 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
20071 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20072 // CHECK18:       omp.inner.for.end:
20073 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20074 // CHECK18:       omp.loop.exit:
20075 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20076 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
20077 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
20078 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20079 // CHECK18:       omp.precond.end:
20080 // CHECK18-NEXT:    ret void
20081 //
20082 //
20083 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1
20084 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20085 // CHECK18-NEXT:  entry:
20086 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20087 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20088 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20089 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
20090 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20091 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20092 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20093 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20094 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20095 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20096 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20097 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20098 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
20099 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20100 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20101 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20102 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
20103 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20104 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20105 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20106 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20107 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20108 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20109 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20110 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20111 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20112 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20113 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20114 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20115 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20116 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20117 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20118 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20119 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20120 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20121 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20122 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20123 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20124 // CHECK18:       omp.precond.then:
20125 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20126 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20127 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20128 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20129 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
20130 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20131 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
20132 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
20133 // CHECK18-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
20134 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20135 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20136 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20137 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
20138 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20139 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20140 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20141 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
20142 // CHECK18-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20143 // CHECK18:       cond.true:
20144 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20145 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20146 // CHECK18:       cond.false:
20147 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20148 // CHECK18-NEXT:    br label [[COND_END]]
20149 // CHECK18:       cond.end:
20150 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
20151 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20152 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20153 // CHECK18-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
20154 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20155 // CHECK18:       omp.inner.for.cond:
20156 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20157 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20158 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
20159 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20160 // CHECK18:       omp.inner.for.body:
20161 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20162 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
20163 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20164 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
20165 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
20166 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
20167 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
20168 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
20169 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20170 // CHECK18:       omp.body.continue:
20171 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20172 // CHECK18:       omp.inner.for.inc:
20173 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20174 // CHECK18-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
20175 // CHECK18-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
20176 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20177 // CHECK18:       omp.inner.for.end:
20178 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20179 // CHECK18:       omp.loop.exit:
20180 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20181 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
20182 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
20183 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20184 // CHECK18:       omp.precond.end:
20185 // CHECK18-NEXT:    ret void
20186 //
20187 //
20188 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
20189 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20190 // CHECK18-NEXT:  entry:
20191 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20192 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20193 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20194 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20195 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20196 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20197 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20198 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20199 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20200 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
20201 // CHECK18-NEXT:    ret void
20202 //
20203 //
20204 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..2
20205 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20206 // CHECK18-NEXT:  entry:
20207 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20208 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20209 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20210 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20211 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20212 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20213 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20214 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20215 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20216 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20217 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20218 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20219 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20220 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20221 // CHECK18-NEXT:    [[I3:%.*]] = alloca i32, align 4
20222 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20223 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20224 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20225 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20226 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20227 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20228 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20229 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20230 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20231 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20232 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20233 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20234 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20235 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20236 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20237 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20238 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20239 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20240 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20241 // CHECK18:       omp.precond.then:
20242 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20243 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20244 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20245 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20246 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20247 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20248 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20249 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20250 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20251 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20252 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20253 // CHECK18-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20254 // CHECK18:       cond.true:
20255 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20256 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20257 // CHECK18:       cond.false:
20258 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20259 // CHECK18-NEXT:    br label [[COND_END]]
20260 // CHECK18:       cond.end:
20261 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20262 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20263 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20264 // CHECK18-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20265 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20266 // CHECK18:       omp.inner.for.cond:
20267 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20268 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20269 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20270 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20271 // CHECK18:       omp.inner.for.body:
20272 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20273 // CHECK18-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
20274 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20275 // CHECK18-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
20276 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
20277 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20278 // CHECK18:       omp.inner.for.inc:
20279 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20280 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20281 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
20282 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
20283 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20284 // CHECK18:       omp.inner.for.end:
20285 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20286 // CHECK18:       omp.loop.exit:
20287 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20288 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
20289 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
20290 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20291 // CHECK18:       omp.precond.end:
20292 // CHECK18-NEXT:    ret void
20293 //
20294 //
20295 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..3
20296 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20297 // CHECK18-NEXT:  entry:
20298 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20299 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20300 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20301 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
20302 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20303 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20304 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20305 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20306 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20307 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20308 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20309 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20310 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
20311 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20312 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20313 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20314 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
20315 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20316 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20317 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20318 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20319 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20320 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20321 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20322 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20323 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20324 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20325 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20326 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20327 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20328 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20329 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20330 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20331 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20332 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20333 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20334 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20335 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20336 // CHECK18:       omp.precond.then:
20337 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20338 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20339 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20340 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20341 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
20342 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20343 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
20344 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
20345 // CHECK18-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
20346 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20347 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20348 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20349 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
20350 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20351 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20352 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20353 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
20354 // CHECK18-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20355 // CHECK18:       cond.true:
20356 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20357 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20358 // CHECK18:       cond.false:
20359 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20360 // CHECK18-NEXT:    br label [[COND_END]]
20361 // CHECK18:       cond.end:
20362 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
20363 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20364 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20365 // CHECK18-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
20366 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20367 // CHECK18:       omp.inner.for.cond:
20368 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20369 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20370 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
20371 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20372 // CHECK18:       omp.inner.for.body:
20373 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20374 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
20375 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20376 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
20377 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
20378 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
20379 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
20380 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
20381 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20382 // CHECK18:       omp.body.continue:
20383 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20384 // CHECK18:       omp.inner.for.inc:
20385 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20386 // CHECK18-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
20387 // CHECK18-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
20388 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20389 // CHECK18:       omp.inner.for.end:
20390 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20391 // CHECK18:       omp.loop.exit:
20392 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20393 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
20394 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
20395 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20396 // CHECK18:       omp.precond.end:
20397 // CHECK18-NEXT:    ret void
20398 //
20399 //
20400 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
20401 // CHECK18-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20402 // CHECK18-NEXT:  entry:
20403 // CHECK18-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
20404 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20405 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20406 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20407 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20408 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
20409 // CHECK18-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
20410 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20411 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20412 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20413 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
20414 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20415 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20416 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20417 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20418 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20419 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20420 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
20421 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
20422 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
20423 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
20424 // CHECK18-NEXT:    ret void
20425 //
20426 //
20427 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..5
20428 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20429 // CHECK18-NEXT:  entry:
20430 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20431 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20432 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20433 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20434 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20435 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
20436 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20437 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20438 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20439 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20440 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20441 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20442 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20443 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20444 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20445 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
20446 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
20447 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20448 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20449 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20450 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20451 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20452 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
20453 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20454 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20455 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20456 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
20457 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20458 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20459 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20460 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20461 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20462 // CHECK18-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
20463 // CHECK18-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20464 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20465 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20466 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20467 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20468 // CHECK18:       omp.precond.then:
20469 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20470 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20471 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20472 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20473 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20474 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
20475 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20476 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
20477 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
20478 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20479 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20480 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
20481 // CHECK18-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20482 // CHECK18:       cond.true:
20483 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20484 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20485 // CHECK18:       cond.false:
20486 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20487 // CHECK18-NEXT:    br label [[COND_END]]
20488 // CHECK18:       cond.end:
20489 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
20490 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20491 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20492 // CHECK18-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
20493 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20494 // CHECK18:       omp.inner.for.cond:
20495 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20496 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20497 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
20498 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
20499 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20500 // CHECK18:       omp.inner.for.body:
20501 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20502 // CHECK18-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
20503 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20504 // CHECK18-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
20505 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
20506 // CHECK18-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
20507 // CHECK18-NEXT:    store i32 [[TMP21]], i32* [[CONV7]], align 4
20508 // CHECK18-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
20509 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
20510 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20511 // CHECK18:       omp.inner.for.inc:
20512 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20513 // CHECK18-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20514 // CHECK18-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
20515 // CHECK18-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
20516 // CHECK18-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20517 // CHECK18-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20518 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
20519 // CHECK18-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
20520 // CHECK18-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20521 // CHECK18-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20522 // CHECK18-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
20523 // CHECK18-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
20524 // CHECK18-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20525 // CHECK18-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20526 // CHECK18-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
20527 // CHECK18-NEXT:    br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
20528 // CHECK18:       cond.true12:
20529 // CHECK18-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20530 // CHECK18-NEXT:    br label [[COND_END14:%.*]]
20531 // CHECK18:       cond.false13:
20532 // CHECK18-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20533 // CHECK18-NEXT:    br label [[COND_END14]]
20534 // CHECK18:       cond.end14:
20535 // CHECK18-NEXT:    [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
20536 // CHECK18-NEXT:    store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
20537 // CHECK18-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20538 // CHECK18-NEXT:    store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
20539 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20540 // CHECK18:       omp.inner.for.end:
20541 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20542 // CHECK18:       omp.loop.exit:
20543 // CHECK18-NEXT:    [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20544 // CHECK18-NEXT:    [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
20545 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
20546 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20547 // CHECK18:       omp.precond.end:
20548 // CHECK18-NEXT:    ret void
20549 //
20550 //
20551 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..6
20552 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20553 // CHECK18-NEXT:  entry:
20554 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20555 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20556 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20557 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
20558 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20559 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20560 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20561 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
20562 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20563 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20564 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20565 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20566 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20567 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
20568 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20569 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20570 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20571 // CHECK18-NEXT:    [[I6:%.*]] = alloca i32, align 4
20572 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20573 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20574 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20575 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20576 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20577 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20578 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20579 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
20580 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20581 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20582 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20583 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
20584 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20585 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20586 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20587 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20588 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20589 // CHECK18-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
20590 // CHECK18-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20591 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20592 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20593 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20594 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20595 // CHECK18:       omp.precond.then:
20596 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20597 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20598 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20599 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20600 // CHECK18-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
20601 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20602 // CHECK18-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
20603 // CHECK18-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
20604 // CHECK18-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
20605 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20606 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20607 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20608 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
20609 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20610 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20611 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20612 // CHECK18-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
20613 // CHECK18-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20614 // CHECK18:       cond.true:
20615 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20616 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20617 // CHECK18:       cond.false:
20618 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20619 // CHECK18-NEXT:    br label [[COND_END]]
20620 // CHECK18:       cond.end:
20621 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
20622 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20623 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20624 // CHECK18-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
20625 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20626 // CHECK18:       omp.inner.for.cond:
20627 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20628 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20629 // CHECK18-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
20630 // CHECK18-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20631 // CHECK18:       omp.inner.for.body:
20632 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20633 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
20634 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20635 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4
20636 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
20637 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
20638 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
20639 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
20640 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20641 // CHECK18:       omp.body.continue:
20642 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20643 // CHECK18:       omp.inner.for.inc:
20644 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20645 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
20646 // CHECK18-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
20647 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20648 // CHECK18:       omp.inner.for.end:
20649 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20650 // CHECK18:       omp.loop.exit:
20651 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20652 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
20653 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
20654 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20655 // CHECK18:       omp.precond.end:
20656 // CHECK18-NEXT:    ret void
20657 //
20658 //
20659 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
20660 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20661 // CHECK18-NEXT:  entry:
20662 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20663 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20664 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20665 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20666 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20667 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20668 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20669 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20670 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20671 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
20672 // CHECK18-NEXT:    ret void
20673 //
20674 //
20675 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..8
20676 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20677 // CHECK18-NEXT:  entry:
20678 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20679 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20680 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20681 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20682 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20683 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20684 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20685 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20686 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20687 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20688 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20689 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20690 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20691 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20692 // CHECK18-NEXT:    [[I3:%.*]] = alloca i32, align 4
20693 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20694 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20695 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20696 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20697 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20698 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20699 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20700 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20701 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20702 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20703 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20704 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20705 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20706 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20707 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20708 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20709 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20710 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20711 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20712 // CHECK18:       omp.precond.then:
20713 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20714 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20715 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20716 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20717 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20718 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20719 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20720 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20721 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20722 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20723 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20724 // CHECK18-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20725 // CHECK18:       cond.true:
20726 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20727 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20728 // CHECK18:       cond.false:
20729 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20730 // CHECK18-NEXT:    br label [[COND_END]]
20731 // CHECK18:       cond.end:
20732 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20733 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20734 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20735 // CHECK18-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20736 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20737 // CHECK18:       omp.inner.for.cond:
20738 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20739 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20740 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20741 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20742 // CHECK18:       omp.inner.for.body:
20743 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20744 // CHECK18-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
20745 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20746 // CHECK18-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
20747 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
20748 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20749 // CHECK18:       omp.inner.for.inc:
20750 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20751 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20752 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
20753 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
20754 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20755 // CHECK18:       omp.inner.for.end:
20756 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20757 // CHECK18:       omp.loop.exit:
20758 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20759 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
20760 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
20761 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20762 // CHECK18:       omp.precond.end:
20763 // CHECK18-NEXT:    ret void
20764 //
20765 //
20766 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..9
20767 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20768 // CHECK18-NEXT:  entry:
20769 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20770 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20771 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20772 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
20773 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20774 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20775 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20776 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20777 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20778 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20779 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20780 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20781 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
20782 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20783 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20784 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20785 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
20786 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20787 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20788 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20789 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20790 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20791 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20792 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20793 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20794 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20795 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20796 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20797 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20798 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20799 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20800 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20801 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20802 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20803 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20804 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20805 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20806 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20807 // CHECK18:       omp.precond.then:
20808 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20809 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20810 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20811 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20812 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
20813 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20814 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
20815 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
20816 // CHECK18-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
20817 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20818 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20819 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20820 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20821 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20822 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
20823 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
20824 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
20825 // CHECK18:       omp.dispatch.cond:
20826 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20827 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
20828 // CHECK18-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
20829 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
20830 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
20831 // CHECK18:       omp.dispatch.body:
20832 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20833 // CHECK18-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
20834 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20835 // CHECK18:       omp.inner.for.cond:
20836 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
20837 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
20838 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
20839 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20840 // CHECK18:       omp.inner.for.body:
20841 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
20842 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
20843 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20844 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15
20845 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15
20846 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
20847 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
20848 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
20849 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20850 // CHECK18:       omp.body.continue:
20851 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20852 // CHECK18:       omp.inner.for.inc:
20853 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
20854 // CHECK18-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
20855 // CHECK18-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
20856 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
20857 // CHECK18:       omp.inner.for.end:
20858 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
20859 // CHECK18:       omp.dispatch.inc:
20860 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
20861 // CHECK18:       omp.dispatch.end:
20862 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20863 // CHECK18:       omp.precond.end:
20864 // CHECK18-NEXT:    ret void
20865 //
20866 //
20867 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
20868 // CHECK18-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20869 // CHECK18-NEXT:  entry:
20870 // CHECK18-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
20871 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20872 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20873 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20874 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20875 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
20876 // CHECK18-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
20877 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20878 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20879 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20880 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
20881 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20882 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20883 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20884 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20885 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20886 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20887 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
20888 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
20889 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
20890 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
20891 // CHECK18-NEXT:    ret void
20892 //
20893 //
20894 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11
20895 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20896 // CHECK18-NEXT:  entry:
20897 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20898 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20899 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20900 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20901 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20902 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
20903 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20904 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20905 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20906 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20907 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20908 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20909 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20910 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20911 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20912 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
20913 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
20914 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20915 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20916 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20917 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20918 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20919 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
20920 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20921 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20922 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20923 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
20924 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20925 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20926 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20927 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20928 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20929 // CHECK18-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
20930 // CHECK18-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20931 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20932 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20933 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20934 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20935 // CHECK18:       omp.precond.then:
20936 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20937 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20938 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20939 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20940 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20941 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20942 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20943 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20944 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20945 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20946 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20947 // CHECK18-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20948 // CHECK18:       cond.true:
20949 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20950 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20951 // CHECK18:       cond.false:
20952 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20953 // CHECK18-NEXT:    br label [[COND_END]]
20954 // CHECK18:       cond.end:
20955 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20956 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20957 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20958 // CHECK18-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20959 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20960 // CHECK18:       omp.inner.for.cond:
20961 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20962 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20963 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20964 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20965 // CHECK18:       omp.inner.for.body:
20966 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20967 // CHECK18-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
20968 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20969 // CHECK18-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
20970 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
20971 // CHECK18-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
20972 // CHECK18-NEXT:    store i32 [[TMP20]], i32* [[CONV7]], align 4
20973 // CHECK18-NEXT:    [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
20974 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
20975 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20976 // CHECK18:       omp.inner.for.inc:
20977 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20978 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20979 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
20980 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
20981 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20982 // CHECK18:       omp.inner.for.end:
20983 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20984 // CHECK18:       omp.loop.exit:
20985 // CHECK18-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20986 // CHECK18-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
20987 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
20988 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20989 // CHECK18:       omp.precond.end:
20990 // CHECK18-NEXT:    ret void
20991 //
20992 //
20993 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..12
20994 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20995 // CHECK18-NEXT:  entry:
20996 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20997 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20998 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20999 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21000 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
21001 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21002 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21003 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21004 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21005 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21006 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
21007 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
21008 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21009 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21010 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21011 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21012 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21013 // CHECK18-NEXT:    [[I6:%.*]] = alloca i32, align 4
21014 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21015 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21016 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21017 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21018 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
21019 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21020 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21021 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21022 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
21023 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21024 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21025 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21026 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
21027 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
21028 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21029 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
21030 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
21031 // CHECK18-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
21032 // CHECK18-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
21033 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
21034 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21035 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
21036 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
21037 // CHECK18:       omp.precond.then:
21038 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21039 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21040 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
21041 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21042 // CHECK18-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
21043 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21044 // CHECK18-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
21045 // CHECK18-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
21046 // CHECK18-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
21047 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21048 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21049 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
21050 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21051 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21052 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21053 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
21054 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
21055 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
21056 // CHECK18:       omp.dispatch.cond:
21057 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21058 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
21059 // CHECK18-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
21060 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
21061 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21062 // CHECK18:       omp.dispatch.body:
21063 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21064 // CHECK18-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
21065 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21066 // CHECK18:       omp.inner.for.cond:
21067 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
21068 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
21069 // CHECK18-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
21070 // CHECK18-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21071 // CHECK18:       omp.inner.for.body:
21072 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
21073 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
21074 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21075 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18
21076 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18
21077 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
21078 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
21079 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
21080 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21081 // CHECK18:       omp.body.continue:
21082 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21083 // CHECK18:       omp.inner.for.inc:
21084 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
21085 // CHECK18-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
21086 // CHECK18-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
21087 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
21088 // CHECK18:       omp.inner.for.end:
21089 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
21090 // CHECK18:       omp.dispatch.inc:
21091 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
21092 // CHECK18:       omp.dispatch.end:
21093 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21094 // CHECK18:       omp.precond.end:
21095 // CHECK18-NEXT:    ret void
21096 //
21097 //
21098 // CHECK18-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
21099 // CHECK18-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
21100 // CHECK18-NEXT:  entry:
21101 // CHECK18-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
21102 // CHECK18-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
21103 // CHECK18-NEXT:    [[M:%.*]] = alloca i32, align 4
21104 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
21105 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
21106 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
21107 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21108 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
21109 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
21110 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
21111 // CHECK18-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
21112 // CHECK18-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
21113 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
21114 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
21115 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
21116 // CHECK18-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
21117 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
21118 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
21119 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
21120 // CHECK18-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
21121 // CHECK18-NEXT:    [[M_CASTED19:%.*]] = alloca i64, align 8
21122 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
21123 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
21124 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
21125 // CHECK18-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
21126 // CHECK18-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
21127 // CHECK18-NEXT:    store i32 10, i32* [[M]], align 4
21128 // CHECK18-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
21129 // CHECK18-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
21130 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
21131 // CHECK18-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
21132 // CHECK18-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
21133 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
21134 // CHECK18-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
21135 // CHECK18-NEXT:    store i8* null, i8** [[TMP4]], align 8
21136 // CHECK18-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
21137 // CHECK18-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
21138 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21139 // CHECK18-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21140 // CHECK18-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
21141 // CHECK18-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
21142 // CHECK18:       omp_offload.failed:
21143 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
21144 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
21145 // CHECK18:       omp_offload.cont:
21146 // CHECK18-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
21147 // CHECK18-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
21148 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
21149 // CHECK18-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
21150 // CHECK18-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
21151 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
21152 // CHECK18-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
21153 // CHECK18-NEXT:    store i8* null, i8** [[TMP13]], align 8
21154 // CHECK18-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
21155 // CHECK18-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
21156 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21157 // CHECK18-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21158 // CHECK18-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
21159 // CHECK18-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
21160 // CHECK18:       omp_offload.failed5:
21161 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
21162 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
21163 // CHECK18:       omp_offload.cont6:
21164 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
21165 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
21166 // CHECK18-NEXT:    store i32 [[TMP18]], i32* [[CONV]], align 4
21167 // CHECK18-NEXT:    [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
21168 // CHECK18-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
21169 // CHECK18-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
21170 // CHECK18-NEXT:    store i64 [[TMP19]], i64* [[TMP21]], align 8
21171 // CHECK18-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
21172 // CHECK18-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
21173 // CHECK18-NEXT:    store i64 [[TMP19]], i64* [[TMP23]], align 8
21174 // CHECK18-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
21175 // CHECK18-NEXT:    store i8* null, i8** [[TMP24]], align 8
21176 // CHECK18-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
21177 // CHECK18-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
21178 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
21179 // CHECK18-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
21180 // CHECK18-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
21181 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
21182 // CHECK18-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
21183 // CHECK18-NEXT:    store i8* null, i8** [[TMP29]], align 8
21184 // CHECK18-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
21185 // CHECK18-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
21186 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21187 // CHECK18-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21188 // CHECK18-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
21189 // CHECK18-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
21190 // CHECK18:       omp_offload.failed11:
21191 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
21192 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
21193 // CHECK18:       omp_offload.cont12:
21194 // CHECK18-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
21195 // CHECK18-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
21196 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
21197 // CHECK18-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
21198 // CHECK18-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
21199 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
21200 // CHECK18-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
21201 // CHECK18-NEXT:    store i8* null, i8** [[TMP38]], align 8
21202 // CHECK18-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
21203 // CHECK18-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
21204 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21205 // CHECK18-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21206 // CHECK18-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
21207 // CHECK18-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
21208 // CHECK18:       omp_offload.failed17:
21209 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
21210 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
21211 // CHECK18:       omp_offload.cont18:
21212 // CHECK18-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
21213 // CHECK18-NEXT:    [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
21214 // CHECK18-NEXT:    store i32 [[TMP43]], i32* [[CONV20]], align 4
21215 // CHECK18-NEXT:    [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
21216 // CHECK18-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
21217 // CHECK18-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
21218 // CHECK18-NEXT:    store i64 [[TMP44]], i64* [[TMP46]], align 8
21219 // CHECK18-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
21220 // CHECK18-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
21221 // CHECK18-NEXT:    store i64 [[TMP44]], i64* [[TMP48]], align 8
21222 // CHECK18-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
21223 // CHECK18-NEXT:    store i8* null, i8** [[TMP49]], align 8
21224 // CHECK18-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
21225 // CHECK18-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
21226 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
21227 // CHECK18-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
21228 // CHECK18-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
21229 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
21230 // CHECK18-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
21231 // CHECK18-NEXT:    store i8* null, i8** [[TMP54]], align 8
21232 // CHECK18-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
21233 // CHECK18-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
21234 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21235 // CHECK18-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21236 // CHECK18-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
21237 // CHECK18-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
21238 // CHECK18:       omp_offload.failed25:
21239 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
21240 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
21241 // CHECK18:       omp_offload.cont26:
21242 // CHECK18-NEXT:    ret i32 0
21243 //
21244 //
21245 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
21246 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21247 // CHECK18-NEXT:  entry:
21248 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21249 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21250 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21251 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21252 // CHECK18-NEXT:    ret void
21253 //
21254 //
21255 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..14
21256 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21257 // CHECK18-NEXT:  entry:
21258 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21259 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21260 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21261 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21262 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21263 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21264 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21265 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21266 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21267 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21268 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21269 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21270 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21271 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21272 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21273 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21274 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21275 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21276 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21277 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21278 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21279 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21280 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21281 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21282 // CHECK18:       cond.true:
21283 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21284 // CHECK18:       cond.false:
21285 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21286 // CHECK18-NEXT:    br label [[COND_END]]
21287 // CHECK18:       cond.end:
21288 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21289 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21290 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21291 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21292 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21293 // CHECK18:       omp.inner.for.cond:
21294 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21295 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21296 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21297 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21298 // CHECK18:       omp.inner.for.body:
21299 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21300 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21301 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21302 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21303 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
21304 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21305 // CHECK18:       omp.inner.for.inc:
21306 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21307 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21308 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21309 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21310 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21311 // CHECK18:       omp.inner.for.end:
21312 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21313 // CHECK18:       omp.loop.exit:
21314 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21315 // CHECK18-NEXT:    ret void
21316 //
21317 //
21318 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..15
21319 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21320 // CHECK18-NEXT:  entry:
21321 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21322 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21323 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21324 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21325 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21326 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21327 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21328 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21329 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21330 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21331 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21332 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21333 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21334 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21335 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21336 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21337 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21338 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21339 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21340 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
21341 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21342 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
21343 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21344 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
21345 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
21346 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
21347 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21348 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21349 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21350 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
21351 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21352 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21353 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
21354 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21355 // CHECK18:       cond.true:
21356 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21357 // CHECK18:       cond.false:
21358 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21359 // CHECK18-NEXT:    br label [[COND_END]]
21360 // CHECK18:       cond.end:
21361 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
21362 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21363 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21364 // CHECK18-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
21365 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21366 // CHECK18:       omp.inner.for.cond:
21367 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21368 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21369 // CHECK18-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21370 // CHECK18-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21371 // CHECK18:       omp.inner.for.body:
21372 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21373 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21374 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21375 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
21376 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
21377 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
21378 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
21379 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
21380 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21381 // CHECK18:       omp.body.continue:
21382 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21383 // CHECK18:       omp.inner.for.inc:
21384 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21385 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
21386 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
21387 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21388 // CHECK18:       omp.inner.for.end:
21389 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21390 // CHECK18:       omp.loop.exit:
21391 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
21392 // CHECK18-NEXT:    ret void
21393 //
21394 //
21395 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
21396 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21397 // CHECK18-NEXT:  entry:
21398 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21399 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21400 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21401 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21402 // CHECK18-NEXT:    ret void
21403 //
21404 //
21405 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..17
21406 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21407 // CHECK18-NEXT:  entry:
21408 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21409 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21410 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21411 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21412 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21413 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21414 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21415 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21416 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21417 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21418 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21419 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21420 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21421 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21422 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21423 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21424 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21425 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21426 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21427 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21428 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21429 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21430 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21431 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21432 // CHECK18:       cond.true:
21433 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21434 // CHECK18:       cond.false:
21435 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21436 // CHECK18-NEXT:    br label [[COND_END]]
21437 // CHECK18:       cond.end:
21438 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21439 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21440 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21441 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21442 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21443 // CHECK18:       omp.inner.for.cond:
21444 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21445 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21446 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21447 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21448 // CHECK18:       omp.inner.for.body:
21449 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21450 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21451 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21452 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21453 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
21454 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21455 // CHECK18:       omp.inner.for.inc:
21456 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21457 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21458 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21459 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21460 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21461 // CHECK18:       omp.inner.for.end:
21462 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21463 // CHECK18:       omp.loop.exit:
21464 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21465 // CHECK18-NEXT:    ret void
21466 //
21467 //
21468 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..18
21469 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21470 // CHECK18-NEXT:  entry:
21471 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21472 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21473 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21474 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21475 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21476 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21477 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21478 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21479 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21480 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21481 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21482 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21483 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21484 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21485 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21486 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21487 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21488 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21489 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21490 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
21491 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21492 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
21493 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21494 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
21495 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
21496 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
21497 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21498 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21499 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21500 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
21501 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21502 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21503 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
21504 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21505 // CHECK18:       cond.true:
21506 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21507 // CHECK18:       cond.false:
21508 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21509 // CHECK18-NEXT:    br label [[COND_END]]
21510 // CHECK18:       cond.end:
21511 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
21512 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21513 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21514 // CHECK18-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
21515 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21516 // CHECK18:       omp.inner.for.cond:
21517 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21518 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21519 // CHECK18-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21520 // CHECK18-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21521 // CHECK18:       omp.inner.for.body:
21522 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21523 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21524 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21525 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
21526 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
21527 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
21528 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
21529 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
21530 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21531 // CHECK18:       omp.body.continue:
21532 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21533 // CHECK18:       omp.inner.for.inc:
21534 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21535 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
21536 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
21537 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21538 // CHECK18:       omp.inner.for.end:
21539 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21540 // CHECK18:       omp.loop.exit:
21541 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
21542 // CHECK18-NEXT:    ret void
21543 //
21544 //
21545 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
21546 // CHECK18-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21547 // CHECK18-NEXT:  entry:
21548 // CHECK18-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
21549 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21550 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21551 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21552 // CHECK18-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
21553 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21554 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
21555 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21556 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
21557 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
21558 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21559 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21560 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
21561 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21562 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
21563 // CHECK18-NEXT:    ret void
21564 //
21565 //
21566 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..21
21567 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21568 // CHECK18-NEXT:  entry:
21569 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21570 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21571 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21572 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21573 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21574 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21575 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21576 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21577 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21578 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21579 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21580 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21581 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21582 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21583 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21584 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21585 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21586 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21587 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21588 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21589 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21590 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21591 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21592 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21593 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21594 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21595 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21596 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21597 // CHECK18:       cond.true:
21598 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21599 // CHECK18:       cond.false:
21600 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21601 // CHECK18-NEXT:    br label [[COND_END]]
21602 // CHECK18:       cond.end:
21603 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21604 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21605 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21606 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21607 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21608 // CHECK18:       omp.inner.for.cond:
21609 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21610 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21611 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21612 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21613 // CHECK18:       omp.inner.for.body:
21614 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21615 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21616 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21617 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21618 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
21619 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21620 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
21621 // CHECK18-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21622 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
21623 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21624 // CHECK18:       omp.inner.for.inc:
21625 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21626 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21627 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
21628 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21629 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21630 // CHECK18:       omp.inner.for.end:
21631 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21632 // CHECK18:       omp.loop.exit:
21633 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21634 // CHECK18-NEXT:    ret void
21635 //
21636 //
21637 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..22
21638 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21639 // CHECK18-NEXT:  entry:
21640 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21641 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21642 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21643 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21644 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21645 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21646 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21647 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21648 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21649 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21650 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21651 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21652 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21653 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21654 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21655 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21656 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21657 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21658 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21659 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21660 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21661 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21662 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
21663 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21664 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
21665 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21666 // CHECK18-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
21667 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
21668 // CHECK18-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
21669 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21670 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21671 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
21672 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21673 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
21674 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
21675 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
21676 // CHECK18:       omp.dispatch.cond:
21677 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21678 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21679 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
21680 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
21681 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21682 // CHECK18:       cond.true:
21683 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21684 // CHECK18-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
21685 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21686 // CHECK18:       cond.false:
21687 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21688 // CHECK18-NEXT:    br label [[COND_END]]
21689 // CHECK18:       cond.end:
21690 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
21691 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21692 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21693 // CHECK18-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
21694 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21695 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21696 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
21697 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21698 // CHECK18:       omp.dispatch.body:
21699 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21700 // CHECK18:       omp.inner.for.cond:
21701 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21702 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21703 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
21704 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21705 // CHECK18:       omp.inner.for.body:
21706 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21707 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
21708 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21709 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
21710 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
21711 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
21712 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
21713 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
21714 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21715 // CHECK18:       omp.body.continue:
21716 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21717 // CHECK18:       omp.inner.for.inc:
21718 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21719 // CHECK18-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
21720 // CHECK18-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
21721 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21722 // CHECK18:       omp.inner.for.end:
21723 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
21724 // CHECK18:       omp.dispatch.inc:
21725 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21726 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21727 // CHECK18-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
21728 // CHECK18-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
21729 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21730 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21731 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
21732 // CHECK18-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
21733 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
21734 // CHECK18:       omp.dispatch.end:
21735 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
21736 // CHECK18-NEXT:    ret void
21737 //
21738 //
21739 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
21740 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21741 // CHECK18-NEXT:  entry:
21742 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21743 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21744 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21745 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21746 // CHECK18-NEXT:    ret void
21747 //
21748 //
21749 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..25
21750 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21751 // CHECK18-NEXT:  entry:
21752 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21753 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21754 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21755 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21756 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21757 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21758 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21759 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21760 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21761 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21762 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21763 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21764 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21765 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21766 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21767 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21768 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21769 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21770 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21771 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21772 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21773 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21774 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21775 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21776 // CHECK18:       cond.true:
21777 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21778 // CHECK18:       cond.false:
21779 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21780 // CHECK18-NEXT:    br label [[COND_END]]
21781 // CHECK18:       cond.end:
21782 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21783 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21784 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21785 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21786 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21787 // CHECK18:       omp.inner.for.cond:
21788 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21789 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21790 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21791 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21792 // CHECK18:       omp.inner.for.body:
21793 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21794 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21795 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21796 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21797 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
21798 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21799 // CHECK18:       omp.inner.for.inc:
21800 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21801 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21802 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21803 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21804 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21805 // CHECK18:       omp.inner.for.end:
21806 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21807 // CHECK18:       omp.loop.exit:
21808 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21809 // CHECK18-NEXT:    ret void
21810 //
21811 //
21812 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..26
21813 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21814 // CHECK18-NEXT:  entry:
21815 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21816 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21817 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21818 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21819 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21820 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21821 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21822 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21823 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21824 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21825 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21826 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21827 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21828 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21829 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21830 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21831 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21832 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21833 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21834 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
21835 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21836 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
21837 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21838 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
21839 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
21840 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
21841 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21842 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21843 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21844 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21845 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21846 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
21847 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
21848 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
21849 // CHECK18:       omp.dispatch.cond:
21850 // CHECK18-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
21851 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
21852 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21853 // CHECK18:       omp.dispatch.body:
21854 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21855 // CHECK18-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
21856 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21857 // CHECK18:       omp.inner.for.cond:
21858 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
21859 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
21860 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
21861 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21862 // CHECK18:       omp.inner.for.body:
21863 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
21864 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
21865 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21866 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
21867 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
21868 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
21869 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
21870 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
21871 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21872 // CHECK18:       omp.body.continue:
21873 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21874 // CHECK18:       omp.inner.for.inc:
21875 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
21876 // CHECK18-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
21877 // CHECK18-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
21878 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
21879 // CHECK18:       omp.inner.for.end:
21880 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
21881 // CHECK18:       omp.dispatch.inc:
21882 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
21883 // CHECK18:       omp.dispatch.end:
21884 // CHECK18-NEXT:    ret void
21885 //
21886 //
21887 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
21888 // CHECK18-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21889 // CHECK18-NEXT:  entry:
21890 // CHECK18-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
21891 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21892 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21893 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21894 // CHECK18-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
21895 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21896 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
21897 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21898 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
21899 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
21900 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21901 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21902 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
21903 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21904 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
21905 // CHECK18-NEXT:    ret void
21906 //
21907 //
21908 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..29
21909 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21910 // CHECK18-NEXT:  entry:
21911 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21912 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21913 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21914 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21915 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21916 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21917 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21918 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21919 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21920 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21921 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21922 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21923 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21924 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21925 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21926 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21927 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21928 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21929 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21930 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21931 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21932 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21933 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21934 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21935 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21936 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21937 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21938 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21939 // CHECK18:       cond.true:
21940 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21941 // CHECK18:       cond.false:
21942 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21943 // CHECK18-NEXT:    br label [[COND_END]]
21944 // CHECK18:       cond.end:
21945 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21946 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21947 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21948 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21949 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21950 // CHECK18:       omp.inner.for.cond:
21951 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21952 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21953 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21954 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21955 // CHECK18:       omp.inner.for.body:
21956 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21957 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21958 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21959 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21960 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
21961 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21962 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
21963 // CHECK18-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21964 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
21965 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21966 // CHECK18:       omp.inner.for.inc:
21967 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21968 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21969 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
21970 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21971 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21972 // CHECK18:       omp.inner.for.end:
21973 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21974 // CHECK18:       omp.loop.exit:
21975 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21976 // CHECK18-NEXT:    ret void
21977 //
21978 //
21979 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..30
21980 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21981 // CHECK18-NEXT:  entry:
21982 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21983 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21984 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21985 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21986 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21987 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21988 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21989 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21990 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21991 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21992 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21993 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21994 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21995 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21996 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21997 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21998 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21999 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22000 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
22001 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22002 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
22003 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
22004 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
22005 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22006 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
22007 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22008 // CHECK18-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
22009 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
22010 // CHECK18-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
22011 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22012 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22013 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
22014 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22015 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22016 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22017 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
22018 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
22019 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
22020 // CHECK18:       omp.dispatch.cond:
22021 // CHECK18-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
22022 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
22023 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
22024 // CHECK18:       omp.dispatch.body:
22025 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22026 // CHECK18-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
22027 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22028 // CHECK18:       omp.inner.for.cond:
22029 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
22030 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
22031 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
22032 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22033 // CHECK18:       omp.inner.for.body:
22034 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
22035 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
22036 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22037 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
22038 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
22039 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
22040 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
22041 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
22042 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22043 // CHECK18:       omp.body.continue:
22044 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22045 // CHECK18:       omp.inner.for.inc:
22046 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
22047 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
22048 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
22049 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
22050 // CHECK18:       omp.inner.for.end:
22051 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
22052 // CHECK18:       omp.dispatch.inc:
22053 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
22054 // CHECK18:       omp.dispatch.end:
22055 // CHECK18-NEXT:    ret void
22056 //
22057 //
22058 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
22059 // CHECK18-SAME: () #[[ATTR5:[0-9]+]] {
22060 // CHECK18-NEXT:  entry:
22061 // CHECK18-NEXT:    call void @__tgt_register_requires(i64 1)
22062 // CHECK18-NEXT:    ret void
22063 //
22064 //
22065 // CHECK19-LABEL: define {{[^@]+}}@main
22066 // CHECK19-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
22067 // CHECK19-NEXT:  entry:
22068 // CHECK19-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
22069 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
22070 // CHECK19-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
22071 // CHECK19-NEXT:    [[N:%.*]] = alloca i32, align 4
22072 // CHECK19-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
22073 // CHECK19-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
22074 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
22075 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
22076 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
22077 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
22078 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
22079 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
22080 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22081 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22082 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22083 // CHECK19-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
22084 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
22085 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
22086 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
22087 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
22088 // CHECK19-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
22089 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
22090 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
22091 // CHECK19-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
22092 // CHECK19-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
22093 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
22094 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
22095 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
22096 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
22097 // CHECK19-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
22098 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
22099 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
22100 // CHECK19-NEXT:    [[N_CASTED31:%.*]] = alloca i32, align 4
22101 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
22102 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
22103 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
22104 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
22105 // CHECK19-NEXT:    [[_TMP36:%.*]] = alloca i32, align 4
22106 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
22107 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
22108 // CHECK19-NEXT:    [[M_CASTED45:%.*]] = alloca i32, align 4
22109 // CHECK19-NEXT:    [[N_CASTED46:%.*]] = alloca i32, align 4
22110 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
22111 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
22112 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
22113 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
22114 // CHECK19-NEXT:    [[_TMP51:%.*]] = alloca i32, align 4
22115 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
22116 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
22117 // CHECK19-NEXT:    store i32 0, i32* [[RETVAL]], align 4
22118 // CHECK19-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
22119 // CHECK19-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
22120 // CHECK19-NEXT:    store i32 100, i32* [[N]], align 4
22121 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
22122 // CHECK19-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
22123 // CHECK19-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
22124 // CHECK19-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
22125 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
22126 // CHECK19-NEXT:    store i32 10, i32* [[M]], align 4
22127 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
22128 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
22129 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
22130 // CHECK19-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
22131 // CHECK19-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
22132 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
22133 // CHECK19-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
22134 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
22135 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
22136 // CHECK19-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
22137 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
22138 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
22139 // CHECK19-NEXT:    store i64 4, i64* [[TMP10]], align 4
22140 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
22141 // CHECK19-NEXT:    store i8* null, i8** [[TMP11]], align 4
22142 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
22143 // CHECK19-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
22144 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
22145 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
22146 // CHECK19-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
22147 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
22148 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
22149 // CHECK19-NEXT:    store i64 4, i64* [[TMP16]], align 4
22150 // CHECK19-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
22151 // CHECK19-NEXT:    store i8* null, i8** [[TMP17]], align 4
22152 // CHECK19-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
22153 // CHECK19-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
22154 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
22155 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
22156 // CHECK19-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
22157 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
22158 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
22159 // CHECK19-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
22160 // CHECK19-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
22161 // CHECK19-NEXT:    store i8* null, i8** [[TMP23]], align 4
22162 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
22163 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
22164 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
22165 // CHECK19-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
22166 // CHECK19-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
22167 // CHECK19-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22168 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
22169 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22170 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22171 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22172 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22173 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
22174 // CHECK19-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
22175 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
22176 // CHECK19-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22177 // CHECK19-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
22178 // CHECK19-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
22179 // CHECK19:       omp_offload.failed:
22180 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
22181 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
22182 // CHECK19:       omp_offload.cont:
22183 // CHECK19-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
22184 // CHECK19-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
22185 // CHECK19-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
22186 // CHECK19-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
22187 // CHECK19-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
22188 // CHECK19-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
22189 // CHECK19-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
22190 // CHECK19-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
22191 // CHECK19-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
22192 // CHECK19-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
22193 // CHECK19-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
22194 // CHECK19-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
22195 // CHECK19-NEXT:    store i64 4, i64* [[TMP41]], align 4
22196 // CHECK19-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
22197 // CHECK19-NEXT:    store i8* null, i8** [[TMP42]], align 4
22198 // CHECK19-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
22199 // CHECK19-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
22200 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
22201 // CHECK19-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
22202 // CHECK19-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
22203 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
22204 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
22205 // CHECK19-NEXT:    store i64 4, i64* [[TMP47]], align 4
22206 // CHECK19-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
22207 // CHECK19-NEXT:    store i8* null, i8** [[TMP48]], align 4
22208 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
22209 // CHECK19-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
22210 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
22211 // CHECK19-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
22212 // CHECK19-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
22213 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
22214 // CHECK19-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
22215 // CHECK19-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
22216 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
22217 // CHECK19-NEXT:    store i8* null, i8** [[TMP54]], align 4
22218 // CHECK19-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
22219 // CHECK19-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
22220 // CHECK19-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
22221 // CHECK19-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
22222 // CHECK19-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
22223 // CHECK19-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
22224 // CHECK19-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
22225 // CHECK19-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
22226 // CHECK19-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
22227 // CHECK19-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
22228 // CHECK19-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
22229 // CHECK19-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
22230 // CHECK19-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
22231 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
22232 // CHECK19-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22233 // CHECK19-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
22234 // CHECK19-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
22235 // CHECK19:       omp_offload.failed15:
22236 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22237 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
22238 // CHECK19:       omp_offload.cont16:
22239 // CHECK19-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
22240 // CHECK19-NEXT:    store i32 [[TMP64]], i32* [[M_CASTED]], align 4
22241 // CHECK19-NEXT:    [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
22242 // CHECK19-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N]], align 4
22243 // CHECK19-NEXT:    store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
22244 // CHECK19-NEXT:    [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
22245 // CHECK19-NEXT:    [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
22246 // CHECK19-NEXT:    [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
22247 // CHECK19-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
22248 // CHECK19-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
22249 // CHECK19-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
22250 // CHECK19-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
22251 // CHECK19-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
22252 // CHECK19-NEXT:    store i32 [[TMP65]], i32* [[TMP73]], align 4
22253 // CHECK19-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
22254 // CHECK19-NEXT:    store i64 4, i64* [[TMP74]], align 4
22255 // CHECK19-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
22256 // CHECK19-NEXT:    store i8* null, i8** [[TMP75]], align 4
22257 // CHECK19-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
22258 // CHECK19-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
22259 // CHECK19-NEXT:    store i32 [[TMP67]], i32* [[TMP77]], align 4
22260 // CHECK19-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
22261 // CHECK19-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
22262 // CHECK19-NEXT:    store i32 [[TMP67]], i32* [[TMP79]], align 4
22263 // CHECK19-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
22264 // CHECK19-NEXT:    store i64 4, i64* [[TMP80]], align 4
22265 // CHECK19-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
22266 // CHECK19-NEXT:    store i8* null, i8** [[TMP81]], align 4
22267 // CHECK19-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
22268 // CHECK19-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
22269 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP83]], align 4
22270 // CHECK19-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
22271 // CHECK19-NEXT:    [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
22272 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP85]], align 4
22273 // CHECK19-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
22274 // CHECK19-NEXT:    store i64 4, i64* [[TMP86]], align 4
22275 // CHECK19-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
22276 // CHECK19-NEXT:    store i8* null, i8** [[TMP87]], align 4
22277 // CHECK19-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
22278 // CHECK19-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
22279 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 4
22280 // CHECK19-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
22281 // CHECK19-NEXT:    [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
22282 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP91]], align 4
22283 // CHECK19-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
22284 // CHECK19-NEXT:    store i64 [[TMP69]], i64* [[TMP92]], align 4
22285 // CHECK19-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
22286 // CHECK19-NEXT:    store i8* null, i8** [[TMP93]], align 4
22287 // CHECK19-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
22288 // CHECK19-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
22289 // CHECK19-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
22290 // CHECK19-NEXT:    [[TMP97:%.*]] = load i32, i32* [[N]], align 4
22291 // CHECK19-NEXT:    store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
22292 // CHECK19-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
22293 // CHECK19-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
22294 // CHECK19-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
22295 // CHECK19-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
22296 // CHECK19-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
22297 // CHECK19-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
22298 // CHECK19-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
22299 // CHECK19-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
22300 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
22301 // CHECK19-NEXT:    [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22302 // CHECK19-NEXT:    [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
22303 // CHECK19-NEXT:    br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
22304 // CHECK19:       omp_offload.failed29:
22305 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22306 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
22307 // CHECK19:       omp_offload.cont30:
22308 // CHECK19-NEXT:    [[TMP103:%.*]] = load i32, i32* [[N]], align 4
22309 // CHECK19-NEXT:    store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
22310 // CHECK19-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
22311 // CHECK19-NEXT:    [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
22312 // CHECK19-NEXT:    [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
22313 // CHECK19-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
22314 // CHECK19-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
22315 // CHECK19-NEXT:    store i32 [[TMP104]], i32* [[TMP108]], align 4
22316 // CHECK19-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
22317 // CHECK19-NEXT:    [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
22318 // CHECK19-NEXT:    store i32 [[TMP104]], i32* [[TMP110]], align 4
22319 // CHECK19-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
22320 // CHECK19-NEXT:    store i64 4, i64* [[TMP111]], align 4
22321 // CHECK19-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
22322 // CHECK19-NEXT:    store i8* null, i8** [[TMP112]], align 4
22323 // CHECK19-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
22324 // CHECK19-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
22325 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP114]], align 4
22326 // CHECK19-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
22327 // CHECK19-NEXT:    [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
22328 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP116]], align 4
22329 // CHECK19-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
22330 // CHECK19-NEXT:    store i64 4, i64* [[TMP117]], align 4
22331 // CHECK19-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
22332 // CHECK19-NEXT:    store i8* null, i8** [[TMP118]], align 4
22333 // CHECK19-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
22334 // CHECK19-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
22335 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 4
22336 // CHECK19-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
22337 // CHECK19-NEXT:    [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
22338 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP122]], align 4
22339 // CHECK19-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
22340 // CHECK19-NEXT:    store i64 [[TMP106]], i64* [[TMP123]], align 4
22341 // CHECK19-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
22342 // CHECK19-NEXT:    store i8* null, i8** [[TMP124]], align 4
22343 // CHECK19-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
22344 // CHECK19-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
22345 // CHECK19-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
22346 // CHECK19-NEXT:    [[TMP128:%.*]] = load i32, i32* [[N]], align 4
22347 // CHECK19-NEXT:    store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
22348 // CHECK19-NEXT:    [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
22349 // CHECK19-NEXT:    [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
22350 // CHECK19-NEXT:    [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
22351 // CHECK19-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
22352 // CHECK19-NEXT:    store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
22353 // CHECK19-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
22354 // CHECK19-NEXT:    [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
22355 // CHECK19-NEXT:    [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
22356 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
22357 // CHECK19-NEXT:    [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22358 // CHECK19-NEXT:    [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
22359 // CHECK19-NEXT:    br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
22360 // CHECK19:       omp_offload.failed43:
22361 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22362 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT44]]
22363 // CHECK19:       omp_offload.cont44:
22364 // CHECK19-NEXT:    [[TMP134:%.*]] = load i32, i32* [[M]], align 4
22365 // CHECK19-NEXT:    store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
22366 // CHECK19-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
22367 // CHECK19-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
22368 // CHECK19-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
22369 // CHECK19-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
22370 // CHECK19-NEXT:    [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
22371 // CHECK19-NEXT:    [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
22372 // CHECK19-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
22373 // CHECK19-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
22374 // CHECK19-NEXT:    store i32 [[TMP135]], i32* [[TMP141]], align 4
22375 // CHECK19-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
22376 // CHECK19-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
22377 // CHECK19-NEXT:    store i32 [[TMP135]], i32* [[TMP143]], align 4
22378 // CHECK19-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
22379 // CHECK19-NEXT:    store i64 4, i64* [[TMP144]], align 4
22380 // CHECK19-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
22381 // CHECK19-NEXT:    store i8* null, i8** [[TMP145]], align 4
22382 // CHECK19-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
22383 // CHECK19-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
22384 // CHECK19-NEXT:    store i32 [[TMP137]], i32* [[TMP147]], align 4
22385 // CHECK19-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
22386 // CHECK19-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
22387 // CHECK19-NEXT:    store i32 [[TMP137]], i32* [[TMP149]], align 4
22388 // CHECK19-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
22389 // CHECK19-NEXT:    store i64 4, i64* [[TMP150]], align 4
22390 // CHECK19-NEXT:    [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
22391 // CHECK19-NEXT:    store i8* null, i8** [[TMP151]], align 4
22392 // CHECK19-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
22393 // CHECK19-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
22394 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP153]], align 4
22395 // CHECK19-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
22396 // CHECK19-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
22397 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP155]], align 4
22398 // CHECK19-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
22399 // CHECK19-NEXT:    store i64 4, i64* [[TMP156]], align 4
22400 // CHECK19-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
22401 // CHECK19-NEXT:    store i8* null, i8** [[TMP157]], align 4
22402 // CHECK19-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
22403 // CHECK19-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
22404 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP159]], align 4
22405 // CHECK19-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
22406 // CHECK19-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
22407 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP161]], align 4
22408 // CHECK19-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
22409 // CHECK19-NEXT:    store i64 [[TMP139]], i64* [[TMP162]], align 4
22410 // CHECK19-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
22411 // CHECK19-NEXT:    store i8* null, i8** [[TMP163]], align 4
22412 // CHECK19-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
22413 // CHECK19-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
22414 // CHECK19-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
22415 // CHECK19-NEXT:    [[TMP167:%.*]] = load i32, i32* [[N]], align 4
22416 // CHECK19-NEXT:    store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
22417 // CHECK19-NEXT:    [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
22418 // CHECK19-NEXT:    [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
22419 // CHECK19-NEXT:    [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
22420 // CHECK19-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
22421 // CHECK19-NEXT:    store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
22422 // CHECK19-NEXT:    [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
22423 // CHECK19-NEXT:    [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
22424 // CHECK19-NEXT:    [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
22425 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
22426 // CHECK19-NEXT:    [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22427 // CHECK19-NEXT:    [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
22428 // CHECK19-NEXT:    br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
22429 // CHECK19:       omp_offload.failed58:
22430 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22431 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT59]]
22432 // CHECK19:       omp_offload.cont59:
22433 // CHECK19-NEXT:    [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
22434 // CHECK19-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
22435 // CHECK19-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
22436 // CHECK19-NEXT:    [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
22437 // CHECK19-NEXT:    call void @llvm.stackrestore(i8* [[TMP174]])
22438 // CHECK19-NEXT:    [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
22439 // CHECK19-NEXT:    ret i32 [[TMP175]]
22440 //
22441 //
22442 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
22443 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
22444 // CHECK19-NEXT:  entry:
22445 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
22446 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22447 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22448 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
22449 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22450 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22451 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22452 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22453 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
22454 // CHECK19-NEXT:    ret void
22455 //
22456 //
22457 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
22458 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22459 // CHECK19-NEXT:  entry:
22460 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22461 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22462 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
22463 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22464 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22465 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22466 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22467 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22468 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22469 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
22470 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22471 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22472 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22473 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22474 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
22475 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22476 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22477 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
22478 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22479 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22480 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22481 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22482 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22483 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22484 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
22485 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22486 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22487 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22488 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22489 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22490 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
22491 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22492 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22493 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22494 // CHECK19:       omp.precond.then:
22495 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22496 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22497 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
22498 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22499 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22500 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22501 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
22502 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22503 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22504 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22505 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
22506 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22507 // CHECK19:       cond.true:
22508 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22509 // CHECK19-NEXT:    br label [[COND_END:%.*]]
22510 // CHECK19:       cond.false:
22511 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22512 // CHECK19-NEXT:    br label [[COND_END]]
22513 // CHECK19:       cond.end:
22514 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
22515 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22516 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22517 // CHECK19-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
22518 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22519 // CHECK19:       omp.inner.for.cond:
22520 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22521 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22522 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
22523 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22524 // CHECK19:       omp.inner.for.body:
22525 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22526 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22527 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
22528 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22529 // CHECK19:       omp.inner.for.inc:
22530 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22531 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22532 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
22533 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
22534 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
22535 // CHECK19:       omp.inner.for.end:
22536 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22537 // CHECK19:       omp.loop.exit:
22538 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22539 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
22540 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
22541 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
22542 // CHECK19:       omp.precond.end:
22543 // CHECK19-NEXT:    ret void
22544 //
22545 //
22546 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
22547 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22548 // CHECK19-NEXT:  entry:
22549 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22550 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22551 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22552 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22553 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
22554 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22555 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22556 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22557 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22558 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22559 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22560 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
22561 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
22562 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
22563 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22564 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22565 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
22566 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22567 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22568 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22569 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22570 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
22571 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22572 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22573 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22574 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22575 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22576 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22577 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
22578 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22579 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22580 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22581 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22582 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22583 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
22584 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22585 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22586 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22587 // CHECK19:       omp.precond.then:
22588 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
22589 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22590 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
22591 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22592 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22593 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
22594 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
22595 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22596 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22597 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22598 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
22599 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22600 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22601 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22602 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
22603 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22604 // CHECK19:       cond.true:
22605 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22606 // CHECK19-NEXT:    br label [[COND_END:%.*]]
22607 // CHECK19:       cond.false:
22608 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22609 // CHECK19-NEXT:    br label [[COND_END]]
22610 // CHECK19:       cond.end:
22611 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
22612 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
22613 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22614 // CHECK19-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
22615 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22616 // CHECK19:       omp.inner.for.cond:
22617 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22618 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22619 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
22620 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22621 // CHECK19:       omp.inner.for.body:
22622 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22623 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
22624 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22625 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
22626 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
22627 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
22628 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
22629 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22630 // CHECK19:       omp.body.continue:
22631 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22632 // CHECK19:       omp.inner.for.inc:
22633 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22634 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
22635 // CHECK19-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
22636 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
22637 // CHECK19:       omp.inner.for.end:
22638 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22639 // CHECK19:       omp.loop.exit:
22640 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22641 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
22642 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
22643 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
22644 // CHECK19:       omp.precond.end:
22645 // CHECK19-NEXT:    ret void
22646 //
22647 //
22648 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
22649 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22650 // CHECK19-NEXT:  entry:
22651 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
22652 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22653 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22654 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
22655 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22656 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22657 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22658 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22659 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
22660 // CHECK19-NEXT:    ret void
22661 //
22662 //
22663 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2
22664 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22665 // CHECK19-NEXT:  entry:
22666 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22667 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22668 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
22669 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22670 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22671 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22672 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22673 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22674 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22675 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
22676 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22677 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22678 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22679 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22680 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
22681 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22682 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22683 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
22684 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22685 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22686 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22687 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22688 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22689 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22690 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
22691 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22692 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22693 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22694 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22695 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22696 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
22697 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22698 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22699 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22700 // CHECK19:       omp.precond.then:
22701 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22702 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22703 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
22704 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22705 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22706 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22707 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
22708 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22709 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22710 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22711 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
22712 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22713 // CHECK19:       cond.true:
22714 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22715 // CHECK19-NEXT:    br label [[COND_END:%.*]]
22716 // CHECK19:       cond.false:
22717 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22718 // CHECK19-NEXT:    br label [[COND_END]]
22719 // CHECK19:       cond.end:
22720 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
22721 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22722 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22723 // CHECK19-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
22724 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22725 // CHECK19:       omp.inner.for.cond:
22726 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22727 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22728 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
22729 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22730 // CHECK19:       omp.inner.for.body:
22731 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22732 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22733 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
22734 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22735 // CHECK19:       omp.inner.for.inc:
22736 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22737 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22738 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
22739 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
22740 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
22741 // CHECK19:       omp.inner.for.end:
22742 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22743 // CHECK19:       omp.loop.exit:
22744 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22745 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
22746 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
22747 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
22748 // CHECK19:       omp.precond.end:
22749 // CHECK19-NEXT:    ret void
22750 //
22751 //
22752 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3
22753 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22754 // CHECK19-NEXT:  entry:
22755 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22756 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22757 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
22758 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
22759 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
22760 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22761 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22762 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22763 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22764 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22765 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22766 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
22767 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
22768 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
22769 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22770 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22771 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
22772 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22773 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22774 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22775 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22776 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
22777 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22778 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22779 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22780 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22781 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22782 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22783 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
22784 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22785 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22786 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22787 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22788 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22789 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
22790 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22791 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22792 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22793 // CHECK19:       omp.precond.then:
22794 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
22795 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22796 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
22797 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
22798 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
22799 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
22800 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
22801 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22802 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22803 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22804 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
22805 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22806 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22807 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22808 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
22809 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22810 // CHECK19:       cond.true:
22811 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22812 // CHECK19-NEXT:    br label [[COND_END:%.*]]
22813 // CHECK19:       cond.false:
22814 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22815 // CHECK19-NEXT:    br label [[COND_END]]
22816 // CHECK19:       cond.end:
22817 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
22818 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
22819 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22820 // CHECK19-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
22821 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22822 // CHECK19:       omp.inner.for.cond:
22823 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22824 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22825 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
22826 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22827 // CHECK19:       omp.inner.for.body:
22828 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22829 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
22830 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22831 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
22832 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
22833 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
22834 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
22835 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22836 // CHECK19:       omp.body.continue:
22837 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22838 // CHECK19:       omp.inner.for.inc:
22839 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22840 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
22841 // CHECK19-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
22842 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
22843 // CHECK19:       omp.inner.for.end:
22844 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22845 // CHECK19:       omp.loop.exit:
22846 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22847 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
22848 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
22849 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
22850 // CHECK19:       omp.precond.end:
22851 // CHECK19-NEXT:    ret void
22852 //
22853 //
22854 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
22855 // CHECK19-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22856 // CHECK19-NEXT:  entry:
22857 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
22858 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
22859 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22860 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22861 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22862 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
22863 // CHECK19-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
22864 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
22865 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22866 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22867 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22868 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22869 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
22870 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
22871 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22872 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
22873 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
22874 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
22875 // CHECK19-NEXT:    ret void
22876 //
22877 //
22878 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..5
22879 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22880 // CHECK19-NEXT:  entry:
22881 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22882 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22883 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
22884 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22885 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22886 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
22887 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22888 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22889 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22890 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
22891 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
22892 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22893 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22894 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22895 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22896 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
22897 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
22898 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22899 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22900 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
22901 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22902 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22903 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
22904 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22905 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22906 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22907 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22908 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22909 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22910 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22911 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22912 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
22913 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
22914 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
22915 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22916 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22917 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22918 // CHECK19:       omp.precond.then:
22919 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22920 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
22921 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
22922 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22923 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22924 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
22925 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22926 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
22927 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
22928 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22929 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
22930 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
22931 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22932 // CHECK19:       cond.true:
22933 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
22934 // CHECK19-NEXT:    br label [[COND_END:%.*]]
22935 // CHECK19:       cond.false:
22936 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22937 // CHECK19-NEXT:    br label [[COND_END]]
22938 // CHECK19:       cond.end:
22939 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
22940 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22941 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22942 // CHECK19-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
22943 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22944 // CHECK19:       omp.inner.for.cond:
22945 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22946 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
22947 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
22948 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
22949 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22950 // CHECK19:       omp.inner.for.body:
22951 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22952 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22953 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
22954 // CHECK19-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
22955 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
22956 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
22957 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22958 // CHECK19:       omp.inner.for.inc:
22959 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22960 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22961 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
22962 // CHECK19-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
22963 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22964 // CHECK19-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22965 // CHECK19-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
22966 // CHECK19-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
22967 // CHECK19-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22968 // CHECK19-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22969 // CHECK19-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
22970 // CHECK19-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
22971 // CHECK19-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22972 // CHECK19-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
22973 // CHECK19-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
22974 // CHECK19-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
22975 // CHECK19:       cond.true11:
22976 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
22977 // CHECK19-NEXT:    br label [[COND_END13:%.*]]
22978 // CHECK19:       cond.false12:
22979 // CHECK19-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22980 // CHECK19-NEXT:    br label [[COND_END13]]
22981 // CHECK19:       cond.end13:
22982 // CHECK19-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
22983 // CHECK19-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
22984 // CHECK19-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22985 // CHECK19-NEXT:    store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
22986 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
22987 // CHECK19:       omp.inner.for.end:
22988 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22989 // CHECK19:       omp.loop.exit:
22990 // CHECK19-NEXT:    [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22991 // CHECK19-NEXT:    [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
22992 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
22993 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
22994 // CHECK19:       omp.precond.end:
22995 // CHECK19-NEXT:    ret void
22996 //
22997 //
22998 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6
22999 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23000 // CHECK19-NEXT:  entry:
23001 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23002 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23003 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23004 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23005 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23006 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23007 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23008 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23009 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23010 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23011 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23012 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23013 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23014 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23015 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23016 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23017 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23018 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23019 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23020 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23021 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23022 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23023 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23024 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23025 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23026 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23027 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23028 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23029 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23030 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23031 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23032 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23033 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23034 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23035 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23036 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23037 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23038 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23039 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23040 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23041 // CHECK19:       omp.precond.then:
23042 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23043 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23044 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23045 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23046 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23047 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23048 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23049 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23050 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23051 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23052 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
23053 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23054 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23055 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23056 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
23057 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23058 // CHECK19:       cond.true:
23059 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23060 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23061 // CHECK19:       cond.false:
23062 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23063 // CHECK19-NEXT:    br label [[COND_END]]
23064 // CHECK19:       cond.end:
23065 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
23066 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23067 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23068 // CHECK19-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
23069 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23070 // CHECK19:       omp.inner.for.cond:
23071 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23072 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23073 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
23074 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23075 // CHECK19:       omp.inner.for.body:
23076 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23077 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
23078 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23079 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
23080 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
23081 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
23082 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
23083 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23084 // CHECK19:       omp.body.continue:
23085 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23086 // CHECK19:       omp.inner.for.inc:
23087 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23088 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
23089 // CHECK19-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
23090 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23091 // CHECK19:       omp.inner.for.end:
23092 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23093 // CHECK19:       omp.loop.exit:
23094 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23095 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
23096 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
23097 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23098 // CHECK19:       omp.precond.end:
23099 // CHECK19-NEXT:    ret void
23100 //
23101 //
23102 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
23103 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23104 // CHECK19-NEXT:  entry:
23105 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23106 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23107 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23108 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23109 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23110 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23111 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23112 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23113 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
23114 // CHECK19-NEXT:    ret void
23115 //
23116 //
23117 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..8
23118 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23119 // CHECK19-NEXT:  entry:
23120 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23121 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23122 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23123 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23124 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23125 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23126 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23127 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23128 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23129 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23130 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23131 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23132 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23133 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23134 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23135 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23136 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23137 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23138 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23139 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23140 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23141 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23142 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23143 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23144 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
23145 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23146 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23147 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23148 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23149 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23150 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23151 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23152 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23153 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23154 // CHECK19:       omp.precond.then:
23155 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23156 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23157 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
23158 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23159 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23160 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23161 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
23162 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23163 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23164 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23165 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
23166 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23167 // CHECK19:       cond.true:
23168 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23169 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23170 // CHECK19:       cond.false:
23171 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23172 // CHECK19-NEXT:    br label [[COND_END]]
23173 // CHECK19:       cond.end:
23174 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
23175 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23176 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23177 // CHECK19-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
23178 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23179 // CHECK19:       omp.inner.for.cond:
23180 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23181 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23182 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
23183 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23184 // CHECK19:       omp.inner.for.body:
23185 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23186 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23187 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
23188 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23189 // CHECK19:       omp.inner.for.inc:
23190 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23191 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23192 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
23193 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23194 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23195 // CHECK19:       omp.inner.for.end:
23196 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23197 // CHECK19:       omp.loop.exit:
23198 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23199 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
23200 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
23201 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23202 // CHECK19:       omp.precond.end:
23203 // CHECK19-NEXT:    ret void
23204 //
23205 //
23206 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..9
23207 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23208 // CHECK19-NEXT:  entry:
23209 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23210 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23211 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23212 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23213 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23214 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23215 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23216 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23217 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23218 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23219 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23220 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23221 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23222 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23223 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23224 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23225 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23226 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23227 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23228 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23229 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23230 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23231 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23232 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23233 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23234 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23235 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23236 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23237 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
23238 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23239 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23240 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23241 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23242 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23243 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23244 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23245 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23246 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23247 // CHECK19:       omp.precond.then:
23248 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23249 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23250 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23251 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23252 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23253 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23254 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23255 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23256 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23257 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23258 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23259 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23260 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
23261 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
23262 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
23263 // CHECK19:       omp.dispatch.cond:
23264 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23265 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
23266 // CHECK19-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
23267 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
23268 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23269 // CHECK19:       omp.dispatch.body:
23270 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23271 // CHECK19-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
23272 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23273 // CHECK19:       omp.inner.for.cond:
23274 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
23275 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
23276 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
23277 // CHECK19-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23278 // CHECK19:       omp.inner.for.body:
23279 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
23280 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
23281 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23282 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
23283 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
23284 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
23285 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
23286 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23287 // CHECK19:       omp.body.continue:
23288 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23289 // CHECK19:       omp.inner.for.inc:
23290 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
23291 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
23292 // CHECK19-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
23293 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
23294 // CHECK19:       omp.inner.for.end:
23295 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
23296 // CHECK19:       omp.dispatch.inc:
23297 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
23298 // CHECK19:       omp.dispatch.end:
23299 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23300 // CHECK19:       omp.precond.end:
23301 // CHECK19-NEXT:    ret void
23302 //
23303 //
23304 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
23305 // CHECK19-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23306 // CHECK19-NEXT:  entry:
23307 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
23308 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23309 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23310 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23311 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23312 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23313 // CHECK19-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
23314 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23315 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23316 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23317 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23318 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23319 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
23320 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
23321 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23322 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23323 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23324 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
23325 // CHECK19-NEXT:    ret void
23326 //
23327 //
23328 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
23329 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23330 // CHECK19-NEXT:  entry:
23331 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23332 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23333 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23334 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23335 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23336 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23337 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23338 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23339 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23340 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23341 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23342 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23343 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23344 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23345 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23346 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23347 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23348 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23349 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23350 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23351 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23352 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23353 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23354 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23355 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23356 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23357 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23358 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23359 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23360 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23361 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23362 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23363 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23364 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23365 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23366 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23367 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23368 // CHECK19:       omp.precond.then:
23369 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23370 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23371 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
23372 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23373 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23374 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23375 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
23376 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23377 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23378 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23379 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
23380 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23381 // CHECK19:       cond.true:
23382 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23383 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23384 // CHECK19:       cond.false:
23385 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23386 // CHECK19-NEXT:    br label [[COND_END]]
23387 // CHECK19:       cond.end:
23388 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
23389 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23390 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23391 // CHECK19-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
23392 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23393 // CHECK19:       omp.inner.for.cond:
23394 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23395 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23396 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
23397 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23398 // CHECK19:       omp.inner.for.body:
23399 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23400 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23401 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23402 // CHECK19-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23403 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23404 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
23405 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23406 // CHECK19:       omp.inner.for.inc:
23407 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23408 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23409 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
23410 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23411 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23412 // CHECK19:       omp.inner.for.end:
23413 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23414 // CHECK19:       omp.loop.exit:
23415 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23416 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
23417 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
23418 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23419 // CHECK19:       omp.precond.end:
23420 // CHECK19-NEXT:    ret void
23421 //
23422 //
23423 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..12
23424 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23425 // CHECK19-NEXT:  entry:
23426 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23427 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23428 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23429 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23430 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23431 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23432 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23433 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23434 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23435 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23436 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23437 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23438 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23439 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23440 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23441 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23442 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23443 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23444 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23445 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23446 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23447 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23448 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23449 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23450 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23451 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23452 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23453 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23454 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23455 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23456 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23457 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23458 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23459 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23460 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23461 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23462 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23463 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23464 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23465 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23466 // CHECK19:       omp.precond.then:
23467 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23468 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23469 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23470 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23471 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23472 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23473 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23474 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23475 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23476 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23477 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23478 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23479 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23480 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
23481 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
23482 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
23483 // CHECK19:       omp.dispatch.cond:
23484 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23485 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
23486 // CHECK19-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
23487 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
23488 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23489 // CHECK19:       omp.dispatch.body:
23490 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23491 // CHECK19-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
23492 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23493 // CHECK19:       omp.inner.for.cond:
23494 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
23495 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
23496 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
23497 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23498 // CHECK19:       omp.inner.for.body:
23499 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
23500 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
23501 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23502 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
23503 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
23504 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
23505 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
23506 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23507 // CHECK19:       omp.body.continue:
23508 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23509 // CHECK19:       omp.inner.for.inc:
23510 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
23511 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
23512 // CHECK19-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
23513 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
23514 // CHECK19:       omp.inner.for.end:
23515 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
23516 // CHECK19:       omp.dispatch.inc:
23517 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
23518 // CHECK19:       omp.dispatch.end:
23519 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23520 // CHECK19:       omp.precond.end:
23521 // CHECK19-NEXT:    ret void
23522 //
23523 //
23524 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
23525 // CHECK19-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
23526 // CHECK19-NEXT:  entry:
23527 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
23528 // CHECK19-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
23529 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
23530 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
23531 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
23532 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
23533 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23534 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
23535 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
23536 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
23537 // CHECK19-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
23538 // CHECK19-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
23539 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
23540 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
23541 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
23542 // CHECK19-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
23543 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
23544 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
23545 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
23546 // CHECK19-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
23547 // CHECK19-NEXT:    [[M_CASTED19:%.*]] = alloca i32, align 4
23548 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
23549 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
23550 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
23551 // CHECK19-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
23552 // CHECK19-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
23553 // CHECK19-NEXT:    store i32 10, i32* [[M]], align 4
23554 // CHECK19-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
23555 // CHECK19-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
23556 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
23557 // CHECK19-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
23558 // CHECK19-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
23559 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
23560 // CHECK19-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
23561 // CHECK19-NEXT:    store i8* null, i8** [[TMP4]], align 4
23562 // CHECK19-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
23563 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
23564 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23565 // CHECK19-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23566 // CHECK19-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
23567 // CHECK19-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
23568 // CHECK19:       omp_offload.failed:
23569 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
23570 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
23571 // CHECK19:       omp_offload.cont:
23572 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
23573 // CHECK19-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
23574 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
23575 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
23576 // CHECK19-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
23577 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
23578 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
23579 // CHECK19-NEXT:    store i8* null, i8** [[TMP13]], align 4
23580 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
23581 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
23582 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23583 // CHECK19-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23584 // CHECK19-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
23585 // CHECK19-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
23586 // CHECK19:       omp_offload.failed5:
23587 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
23588 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
23589 // CHECK19:       omp_offload.cont6:
23590 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
23591 // CHECK19-NEXT:    store i32 [[TMP18]], i32* [[M_CASTED]], align 4
23592 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
23593 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
23594 // CHECK19-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
23595 // CHECK19-NEXT:    store i32 [[TMP19]], i32* [[TMP21]], align 4
23596 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
23597 // CHECK19-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
23598 // CHECK19-NEXT:    store i32 [[TMP19]], i32* [[TMP23]], align 4
23599 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
23600 // CHECK19-NEXT:    store i8* null, i8** [[TMP24]], align 4
23601 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
23602 // CHECK19-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
23603 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
23604 // CHECK19-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
23605 // CHECK19-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
23606 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
23607 // CHECK19-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
23608 // CHECK19-NEXT:    store i8* null, i8** [[TMP29]], align 4
23609 // CHECK19-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
23610 // CHECK19-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
23611 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23612 // CHECK19-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23613 // CHECK19-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
23614 // CHECK19-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
23615 // CHECK19:       omp_offload.failed11:
23616 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
23617 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
23618 // CHECK19:       omp_offload.cont12:
23619 // CHECK19-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
23620 // CHECK19-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
23621 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
23622 // CHECK19-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
23623 // CHECK19-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
23624 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
23625 // CHECK19-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
23626 // CHECK19-NEXT:    store i8* null, i8** [[TMP38]], align 4
23627 // CHECK19-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
23628 // CHECK19-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
23629 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23630 // CHECK19-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23631 // CHECK19-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
23632 // CHECK19-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
23633 // CHECK19:       omp_offload.failed17:
23634 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
23635 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
23636 // CHECK19:       omp_offload.cont18:
23637 // CHECK19-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
23638 // CHECK19-NEXT:    store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
23639 // CHECK19-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
23640 // CHECK19-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
23641 // CHECK19-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
23642 // CHECK19-NEXT:    store i32 [[TMP44]], i32* [[TMP46]], align 4
23643 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
23644 // CHECK19-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
23645 // CHECK19-NEXT:    store i32 [[TMP44]], i32* [[TMP48]], align 4
23646 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
23647 // CHECK19-NEXT:    store i8* null, i8** [[TMP49]], align 4
23648 // CHECK19-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
23649 // CHECK19-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
23650 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
23651 // CHECK19-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
23652 // CHECK19-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
23653 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
23654 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
23655 // CHECK19-NEXT:    store i8* null, i8** [[TMP54]], align 4
23656 // CHECK19-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
23657 // CHECK19-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
23658 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
23659 // CHECK19-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
23660 // CHECK19-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
23661 // CHECK19-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
23662 // CHECK19:       omp_offload.failed24:
23663 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
23664 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
23665 // CHECK19:       omp_offload.cont25:
23666 // CHECK19-NEXT:    ret i32 0
23667 //
23668 //
23669 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
23670 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23671 // CHECK19-NEXT:  entry:
23672 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23673 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23674 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23675 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
23676 // CHECK19-NEXT:    ret void
23677 //
23678 //
23679 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14
23680 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23681 // CHECK19-NEXT:  entry:
23682 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23683 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23684 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23685 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23686 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23687 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23688 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23689 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23690 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23691 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23692 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23693 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23694 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23695 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23696 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23697 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
23698 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23699 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23700 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23701 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
23702 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23703 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23704 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
23705 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23706 // CHECK19:       cond.true:
23707 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23708 // CHECK19:       cond.false:
23709 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23710 // CHECK19-NEXT:    br label [[COND_END]]
23711 // CHECK19:       cond.end:
23712 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
23713 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23714 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23715 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
23716 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23717 // CHECK19:       omp.inner.for.cond:
23718 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23719 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23720 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
23721 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23722 // CHECK19:       omp.inner.for.body:
23723 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23724 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23725 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
23726 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23727 // CHECK19:       omp.inner.for.inc:
23728 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23729 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23730 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
23731 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23732 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23733 // CHECK19:       omp.inner.for.end:
23734 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23735 // CHECK19:       omp.loop.exit:
23736 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
23737 // CHECK19-NEXT:    ret void
23738 //
23739 //
23740 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15
23741 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23742 // CHECK19-NEXT:  entry:
23743 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23744 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23745 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23746 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23747 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23748 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23749 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23750 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23751 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23752 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23753 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23754 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23755 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23756 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23757 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23758 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23759 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23760 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23761 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23762 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
23763 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23764 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23765 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
23766 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
23767 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23768 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23769 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23770 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
23771 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23772 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23773 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
23774 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23775 // CHECK19:       cond.true:
23776 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23777 // CHECK19:       cond.false:
23778 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23779 // CHECK19-NEXT:    br label [[COND_END]]
23780 // CHECK19:       cond.end:
23781 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
23782 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23783 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23784 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
23785 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23786 // CHECK19:       omp.inner.for.cond:
23787 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23788 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23789 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
23790 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23791 // CHECK19:       omp.inner.for.body:
23792 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23793 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
23794 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23795 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
23796 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
23797 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
23798 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
23799 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23800 // CHECK19:       omp.body.continue:
23801 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23802 // CHECK19:       omp.inner.for.inc:
23803 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23804 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
23805 // CHECK19-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
23806 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23807 // CHECK19:       omp.inner.for.end:
23808 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23809 // CHECK19:       omp.loop.exit:
23810 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
23811 // CHECK19-NEXT:    ret void
23812 //
23813 //
23814 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
23815 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23816 // CHECK19-NEXT:  entry:
23817 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23818 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23819 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23820 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
23821 // CHECK19-NEXT:    ret void
23822 //
23823 //
23824 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..17
23825 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23826 // CHECK19-NEXT:  entry:
23827 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23828 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23829 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23830 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23831 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23832 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23833 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23834 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23835 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23836 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23837 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23838 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23839 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23840 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23841 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23842 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
23843 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23844 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23845 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23846 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
23847 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23848 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23849 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
23850 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23851 // CHECK19:       cond.true:
23852 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23853 // CHECK19:       cond.false:
23854 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23855 // CHECK19-NEXT:    br label [[COND_END]]
23856 // CHECK19:       cond.end:
23857 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
23858 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23859 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23860 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
23861 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23862 // CHECK19:       omp.inner.for.cond:
23863 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23864 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23865 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
23866 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23867 // CHECK19:       omp.inner.for.body:
23868 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23869 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23870 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
23871 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23872 // CHECK19:       omp.inner.for.inc:
23873 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23874 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23875 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
23876 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23877 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23878 // CHECK19:       omp.inner.for.end:
23879 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23880 // CHECK19:       omp.loop.exit:
23881 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
23882 // CHECK19-NEXT:    ret void
23883 //
23884 //
23885 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18
23886 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23887 // CHECK19-NEXT:  entry:
23888 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23889 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23890 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23891 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23892 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23893 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23894 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23895 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23896 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23897 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23898 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23899 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23900 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23901 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23902 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23903 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23904 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23905 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23906 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23907 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
23908 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23909 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23910 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
23911 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
23912 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23913 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23914 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23915 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
23916 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23917 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23918 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
23919 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23920 // CHECK19:       cond.true:
23921 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23922 // CHECK19:       cond.false:
23923 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23924 // CHECK19-NEXT:    br label [[COND_END]]
23925 // CHECK19:       cond.end:
23926 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
23927 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23928 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23929 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
23930 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23931 // CHECK19:       omp.inner.for.cond:
23932 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23933 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23934 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
23935 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23936 // CHECK19:       omp.inner.for.body:
23937 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23938 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
23939 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23940 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
23941 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
23942 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
23943 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
23944 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23945 // CHECK19:       omp.body.continue:
23946 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23947 // CHECK19:       omp.inner.for.inc:
23948 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23949 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
23950 // CHECK19-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
23951 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23952 // CHECK19:       omp.inner.for.end:
23953 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23954 // CHECK19:       omp.loop.exit:
23955 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
23956 // CHECK19-NEXT:    ret void
23957 //
23958 //
23959 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
23960 // CHECK19-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
23961 // CHECK19-NEXT:  entry:
23962 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
23963 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23964 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23965 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23966 // CHECK19-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
23967 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23968 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23969 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
23970 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
23971 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23972 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23973 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23974 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
23975 // CHECK19-NEXT:    ret void
23976 //
23977 //
23978 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..21
23979 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23980 // CHECK19-NEXT:  entry:
23981 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23982 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23983 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
23984 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23985 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23986 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23987 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23988 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23989 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23990 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23991 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23992 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23993 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23994 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23995 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
23996 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23997 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
23998 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23999 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24000 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24001 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24002 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24003 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24004 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24005 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24006 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24007 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24008 // CHECK19:       cond.true:
24009 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24010 // CHECK19:       cond.false:
24011 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24012 // CHECK19-NEXT:    br label [[COND_END]]
24013 // CHECK19:       cond.end:
24014 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24015 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24016 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24017 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24018 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24019 // CHECK19:       omp.inner.for.cond:
24020 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24021 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24022 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24023 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24024 // CHECK19:       omp.inner.for.body:
24025 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24026 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24027 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24028 // CHECK19-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24029 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24030 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
24031 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24032 // CHECK19:       omp.inner.for.inc:
24033 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24034 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24035 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24036 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24037 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24038 // CHECK19:       omp.inner.for.end:
24039 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24040 // CHECK19:       omp.loop.exit:
24041 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24042 // CHECK19-NEXT:    ret void
24043 //
24044 //
24045 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22
24046 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24047 // CHECK19-NEXT:  entry:
24048 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24049 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24050 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24051 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24052 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24053 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24054 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24055 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24056 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24057 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24058 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24059 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24060 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24061 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24062 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24063 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24064 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24065 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24066 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24067 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24068 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24069 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24070 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24071 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24072 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24073 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24074 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24075 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24076 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24077 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24078 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
24079 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
24080 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
24081 // CHECK19:       omp.dispatch.cond:
24082 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24083 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24084 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
24085 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24086 // CHECK19:       cond.true:
24087 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24088 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24089 // CHECK19:       cond.false:
24090 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24091 // CHECK19-NEXT:    br label [[COND_END]]
24092 // CHECK19:       cond.end:
24093 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
24094 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
24095 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24096 // CHECK19-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
24097 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24098 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24099 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
24100 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24101 // CHECK19:       omp.dispatch.body:
24102 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24103 // CHECK19:       omp.inner.for.cond:
24104 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24105 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24106 // CHECK19-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
24107 // CHECK19-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24108 // CHECK19:       omp.inner.for.body:
24109 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24110 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
24111 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24112 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
24113 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
24114 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
24115 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
24116 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24117 // CHECK19:       omp.body.continue:
24118 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24119 // CHECK19:       omp.inner.for.inc:
24120 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24121 // CHECK19-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
24122 // CHECK19-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
24123 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24124 // CHECK19:       omp.inner.for.end:
24125 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
24126 // CHECK19:       omp.dispatch.inc:
24127 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24128 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24129 // CHECK19-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
24130 // CHECK19-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
24131 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24132 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24133 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
24134 // CHECK19-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
24135 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
24136 // CHECK19:       omp.dispatch.end:
24137 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
24138 // CHECK19-NEXT:    ret void
24139 //
24140 //
24141 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
24142 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24143 // CHECK19-NEXT:  entry:
24144 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24145 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24146 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24147 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
24148 // CHECK19-NEXT:    ret void
24149 //
24150 //
24151 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..25
24152 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24153 // CHECK19-NEXT:  entry:
24154 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24155 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24156 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24157 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24158 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24159 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24160 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24161 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24162 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24163 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24164 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24165 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24166 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24167 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24168 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24169 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24170 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24171 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24172 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24173 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24174 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24175 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24176 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24177 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24178 // CHECK19:       cond.true:
24179 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24180 // CHECK19:       cond.false:
24181 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24182 // CHECK19-NEXT:    br label [[COND_END]]
24183 // CHECK19:       cond.end:
24184 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24185 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24186 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24187 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24188 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24189 // CHECK19:       omp.inner.for.cond:
24190 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24191 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24192 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24193 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24194 // CHECK19:       omp.inner.for.body:
24195 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24196 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24197 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
24198 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24199 // CHECK19:       omp.inner.for.inc:
24200 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24201 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24202 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
24203 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24204 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24205 // CHECK19:       omp.inner.for.end:
24206 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24207 // CHECK19:       omp.loop.exit:
24208 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24209 // CHECK19-NEXT:    ret void
24210 //
24211 //
24212 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26
24213 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24214 // CHECK19-NEXT:  entry:
24215 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24216 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24217 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24218 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24219 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24220 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24221 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24222 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24223 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24224 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24225 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24226 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24227 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24228 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24229 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24230 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24231 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24232 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24233 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24234 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24235 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24236 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24237 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24238 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24239 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24240 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24241 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24242 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24243 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24244 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
24245 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
24246 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
24247 // CHECK19:       omp.dispatch.cond:
24248 // CHECK19-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
24249 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
24250 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24251 // CHECK19:       omp.dispatch.body:
24252 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24253 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
24254 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24255 // CHECK19:       omp.inner.for.cond:
24256 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
24257 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
24258 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
24259 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24260 // CHECK19:       omp.inner.for.body:
24261 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
24262 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
24263 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24264 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
24265 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
24266 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
24267 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
24268 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24269 // CHECK19:       omp.body.continue:
24270 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24271 // CHECK19:       omp.inner.for.inc:
24272 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
24273 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
24274 // CHECK19-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
24275 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
24276 // CHECK19:       omp.inner.for.end:
24277 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
24278 // CHECK19:       omp.dispatch.inc:
24279 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
24280 // CHECK19:       omp.dispatch.end:
24281 // CHECK19-NEXT:    ret void
24282 //
24283 //
24284 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
24285 // CHECK19-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24286 // CHECK19-NEXT:  entry:
24287 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
24288 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24289 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24290 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24291 // CHECK19-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
24292 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24293 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24294 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
24295 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
24296 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24297 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24298 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24299 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
24300 // CHECK19-NEXT:    ret void
24301 //
24302 //
24303 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..29
24304 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24305 // CHECK19-NEXT:  entry:
24306 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24307 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24308 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24309 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24310 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24311 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24312 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24313 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24314 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24315 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24316 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24317 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24318 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24319 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24320 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24321 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24322 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24323 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24324 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24325 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24326 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24327 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24328 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24329 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24330 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24331 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24332 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24333 // CHECK19:       cond.true:
24334 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24335 // CHECK19:       cond.false:
24336 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24337 // CHECK19-NEXT:    br label [[COND_END]]
24338 // CHECK19:       cond.end:
24339 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24340 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24341 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24342 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24343 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24344 // CHECK19:       omp.inner.for.cond:
24345 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24346 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24347 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24348 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24349 // CHECK19:       omp.inner.for.body:
24350 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24351 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24352 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24353 // CHECK19-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24354 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24355 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
24356 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24357 // CHECK19:       omp.inner.for.inc:
24358 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24359 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24360 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24361 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24362 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24363 // CHECK19:       omp.inner.for.end:
24364 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24365 // CHECK19:       omp.loop.exit:
24366 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24367 // CHECK19-NEXT:    ret void
24368 //
24369 //
24370 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30
24371 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24372 // CHECK19-NEXT:  entry:
24373 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24374 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24375 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24376 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24377 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24378 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24379 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24380 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24381 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24382 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24383 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24384 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24385 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24386 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24387 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24388 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24389 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24390 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24391 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24392 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24393 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24394 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24395 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24396 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24397 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24398 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24399 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24400 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24401 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24402 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24403 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24404 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24405 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
24406 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
24407 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
24408 // CHECK19:       omp.dispatch.cond:
24409 // CHECK19-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
24410 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
24411 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24412 // CHECK19:       omp.dispatch.body:
24413 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24414 // CHECK19-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
24415 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24416 // CHECK19:       omp.inner.for.cond:
24417 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
24418 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
24419 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
24420 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24421 // CHECK19:       omp.inner.for.body:
24422 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
24423 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
24424 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24425 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
24426 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
24427 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
24428 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
24429 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24430 // CHECK19:       omp.body.continue:
24431 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24432 // CHECK19:       omp.inner.for.inc:
24433 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
24434 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
24435 // CHECK19-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
24436 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
24437 // CHECK19:       omp.inner.for.end:
24438 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
24439 // CHECK19:       omp.dispatch.inc:
24440 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
24441 // CHECK19:       omp.dispatch.end:
24442 // CHECK19-NEXT:    ret void
24443 //
24444 //
24445 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
24446 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] {
24447 // CHECK19-NEXT:  entry:
24448 // CHECK19-NEXT:    call void @__tgt_register_requires(i64 1)
24449 // CHECK19-NEXT:    ret void
24450 //
24451 //
24452 // CHECK20-LABEL: define {{[^@]+}}@main
24453 // CHECK20-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
24454 // CHECK20-NEXT:  entry:
24455 // CHECK20-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
24456 // CHECK20-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
24457 // CHECK20-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
24458 // CHECK20-NEXT:    [[N:%.*]] = alloca i32, align 4
24459 // CHECK20-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
24460 // CHECK20-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
24461 // CHECK20-NEXT:    [[M:%.*]] = alloca i32, align 4
24462 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
24463 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
24464 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
24465 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
24466 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
24467 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24468 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24469 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
24470 // CHECK20-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
24471 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
24472 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
24473 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
24474 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
24475 // CHECK20-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
24476 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
24477 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
24478 // CHECK20-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
24479 // CHECK20-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
24480 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
24481 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
24482 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
24483 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
24484 // CHECK20-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
24485 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
24486 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
24487 // CHECK20-NEXT:    [[N_CASTED31:%.*]] = alloca i32, align 4
24488 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
24489 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
24490 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
24491 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
24492 // CHECK20-NEXT:    [[_TMP36:%.*]] = alloca i32, align 4
24493 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
24494 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
24495 // CHECK20-NEXT:    [[M_CASTED45:%.*]] = alloca i32, align 4
24496 // CHECK20-NEXT:    [[N_CASTED46:%.*]] = alloca i32, align 4
24497 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
24498 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
24499 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
24500 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
24501 // CHECK20-NEXT:    [[_TMP51:%.*]] = alloca i32, align 4
24502 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
24503 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
24504 // CHECK20-NEXT:    store i32 0, i32* [[RETVAL]], align 4
24505 // CHECK20-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
24506 // CHECK20-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
24507 // CHECK20-NEXT:    store i32 100, i32* [[N]], align 4
24508 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
24509 // CHECK20-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
24510 // CHECK20-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
24511 // CHECK20-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
24512 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
24513 // CHECK20-NEXT:    store i32 10, i32* [[M]], align 4
24514 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
24515 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
24516 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
24517 // CHECK20-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
24518 // CHECK20-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
24519 // CHECK20-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
24520 // CHECK20-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
24521 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
24522 // CHECK20-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
24523 // CHECK20-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
24524 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
24525 // CHECK20-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
24526 // CHECK20-NEXT:    store i64 4, i64* [[TMP10]], align 4
24527 // CHECK20-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
24528 // CHECK20-NEXT:    store i8* null, i8** [[TMP11]], align 4
24529 // CHECK20-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
24530 // CHECK20-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
24531 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
24532 // CHECK20-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
24533 // CHECK20-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
24534 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
24535 // CHECK20-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
24536 // CHECK20-NEXT:    store i64 4, i64* [[TMP16]], align 4
24537 // CHECK20-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
24538 // CHECK20-NEXT:    store i8* null, i8** [[TMP17]], align 4
24539 // CHECK20-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
24540 // CHECK20-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
24541 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
24542 // CHECK20-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
24543 // CHECK20-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
24544 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
24545 // CHECK20-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
24546 // CHECK20-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
24547 // CHECK20-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
24548 // CHECK20-NEXT:    store i8* null, i8** [[TMP23]], align 4
24549 // CHECK20-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
24550 // CHECK20-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
24551 // CHECK20-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
24552 // CHECK20-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
24553 // CHECK20-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
24554 // CHECK20-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24555 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
24556 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
24557 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
24558 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
24559 // CHECK20-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24560 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
24561 // CHECK20-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
24562 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
24563 // CHECK20-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24564 // CHECK20-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
24565 // CHECK20-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
24566 // CHECK20:       omp_offload.failed:
24567 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
24568 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
24569 // CHECK20:       omp_offload.cont:
24570 // CHECK20-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
24571 // CHECK20-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
24572 // CHECK20-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
24573 // CHECK20-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
24574 // CHECK20-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
24575 // CHECK20-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
24576 // CHECK20-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
24577 // CHECK20-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
24578 // CHECK20-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
24579 // CHECK20-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
24580 // CHECK20-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
24581 // CHECK20-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
24582 // CHECK20-NEXT:    store i64 4, i64* [[TMP41]], align 4
24583 // CHECK20-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
24584 // CHECK20-NEXT:    store i8* null, i8** [[TMP42]], align 4
24585 // CHECK20-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
24586 // CHECK20-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
24587 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
24588 // CHECK20-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
24589 // CHECK20-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
24590 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
24591 // CHECK20-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
24592 // CHECK20-NEXT:    store i64 4, i64* [[TMP47]], align 4
24593 // CHECK20-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
24594 // CHECK20-NEXT:    store i8* null, i8** [[TMP48]], align 4
24595 // CHECK20-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
24596 // CHECK20-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
24597 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
24598 // CHECK20-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
24599 // CHECK20-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
24600 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
24601 // CHECK20-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
24602 // CHECK20-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
24603 // CHECK20-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
24604 // CHECK20-NEXT:    store i8* null, i8** [[TMP54]], align 4
24605 // CHECK20-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
24606 // CHECK20-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
24607 // CHECK20-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
24608 // CHECK20-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
24609 // CHECK20-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
24610 // CHECK20-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
24611 // CHECK20-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
24612 // CHECK20-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
24613 // CHECK20-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
24614 // CHECK20-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
24615 // CHECK20-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
24616 // CHECK20-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
24617 // CHECK20-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
24618 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
24619 // CHECK20-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24620 // CHECK20-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
24621 // CHECK20-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
24622 // CHECK20:       omp_offload.failed15:
24623 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
24624 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
24625 // CHECK20:       omp_offload.cont16:
24626 // CHECK20-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
24627 // CHECK20-NEXT:    store i32 [[TMP64]], i32* [[M_CASTED]], align 4
24628 // CHECK20-NEXT:    [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
24629 // CHECK20-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N]], align 4
24630 // CHECK20-NEXT:    store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
24631 // CHECK20-NEXT:    [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
24632 // CHECK20-NEXT:    [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
24633 // CHECK20-NEXT:    [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
24634 // CHECK20-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
24635 // CHECK20-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
24636 // CHECK20-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
24637 // CHECK20-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
24638 // CHECK20-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
24639 // CHECK20-NEXT:    store i32 [[TMP65]], i32* [[TMP73]], align 4
24640 // CHECK20-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
24641 // CHECK20-NEXT:    store i64 4, i64* [[TMP74]], align 4
24642 // CHECK20-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
24643 // CHECK20-NEXT:    store i8* null, i8** [[TMP75]], align 4
24644 // CHECK20-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
24645 // CHECK20-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
24646 // CHECK20-NEXT:    store i32 [[TMP67]], i32* [[TMP77]], align 4
24647 // CHECK20-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
24648 // CHECK20-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
24649 // CHECK20-NEXT:    store i32 [[TMP67]], i32* [[TMP79]], align 4
24650 // CHECK20-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
24651 // CHECK20-NEXT:    store i64 4, i64* [[TMP80]], align 4
24652 // CHECK20-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
24653 // CHECK20-NEXT:    store i8* null, i8** [[TMP81]], align 4
24654 // CHECK20-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
24655 // CHECK20-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
24656 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP83]], align 4
24657 // CHECK20-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
24658 // CHECK20-NEXT:    [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
24659 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP85]], align 4
24660 // CHECK20-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
24661 // CHECK20-NEXT:    store i64 4, i64* [[TMP86]], align 4
24662 // CHECK20-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
24663 // CHECK20-NEXT:    store i8* null, i8** [[TMP87]], align 4
24664 // CHECK20-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
24665 // CHECK20-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
24666 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 4
24667 // CHECK20-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
24668 // CHECK20-NEXT:    [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
24669 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP91]], align 4
24670 // CHECK20-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
24671 // CHECK20-NEXT:    store i64 [[TMP69]], i64* [[TMP92]], align 4
24672 // CHECK20-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
24673 // CHECK20-NEXT:    store i8* null, i8** [[TMP93]], align 4
24674 // CHECK20-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
24675 // CHECK20-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
24676 // CHECK20-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
24677 // CHECK20-NEXT:    [[TMP97:%.*]] = load i32, i32* [[N]], align 4
24678 // CHECK20-NEXT:    store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
24679 // CHECK20-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
24680 // CHECK20-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
24681 // CHECK20-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
24682 // CHECK20-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
24683 // CHECK20-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
24684 // CHECK20-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
24685 // CHECK20-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
24686 // CHECK20-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
24687 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
24688 // CHECK20-NEXT:    [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24689 // CHECK20-NEXT:    [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
24690 // CHECK20-NEXT:    br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
24691 // CHECK20:       omp_offload.failed29:
24692 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
24693 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
24694 // CHECK20:       omp_offload.cont30:
24695 // CHECK20-NEXT:    [[TMP103:%.*]] = load i32, i32* [[N]], align 4
24696 // CHECK20-NEXT:    store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
24697 // CHECK20-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
24698 // CHECK20-NEXT:    [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
24699 // CHECK20-NEXT:    [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
24700 // CHECK20-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
24701 // CHECK20-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
24702 // CHECK20-NEXT:    store i32 [[TMP104]], i32* [[TMP108]], align 4
24703 // CHECK20-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
24704 // CHECK20-NEXT:    [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
24705 // CHECK20-NEXT:    store i32 [[TMP104]], i32* [[TMP110]], align 4
24706 // CHECK20-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
24707 // CHECK20-NEXT:    store i64 4, i64* [[TMP111]], align 4
24708 // CHECK20-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
24709 // CHECK20-NEXT:    store i8* null, i8** [[TMP112]], align 4
24710 // CHECK20-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
24711 // CHECK20-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
24712 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP114]], align 4
24713 // CHECK20-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
24714 // CHECK20-NEXT:    [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
24715 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP116]], align 4
24716 // CHECK20-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
24717 // CHECK20-NEXT:    store i64 4, i64* [[TMP117]], align 4
24718 // CHECK20-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
24719 // CHECK20-NEXT:    store i8* null, i8** [[TMP118]], align 4
24720 // CHECK20-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
24721 // CHECK20-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
24722 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 4
24723 // CHECK20-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
24724 // CHECK20-NEXT:    [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
24725 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP122]], align 4
24726 // CHECK20-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
24727 // CHECK20-NEXT:    store i64 [[TMP106]], i64* [[TMP123]], align 4
24728 // CHECK20-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
24729 // CHECK20-NEXT:    store i8* null, i8** [[TMP124]], align 4
24730 // CHECK20-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
24731 // CHECK20-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
24732 // CHECK20-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
24733 // CHECK20-NEXT:    [[TMP128:%.*]] = load i32, i32* [[N]], align 4
24734 // CHECK20-NEXT:    store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
24735 // CHECK20-NEXT:    [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
24736 // CHECK20-NEXT:    [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
24737 // CHECK20-NEXT:    [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
24738 // CHECK20-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
24739 // CHECK20-NEXT:    store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
24740 // CHECK20-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
24741 // CHECK20-NEXT:    [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
24742 // CHECK20-NEXT:    [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
24743 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
24744 // CHECK20-NEXT:    [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24745 // CHECK20-NEXT:    [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
24746 // CHECK20-NEXT:    br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
24747 // CHECK20:       omp_offload.failed43:
24748 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
24749 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT44]]
24750 // CHECK20:       omp_offload.cont44:
24751 // CHECK20-NEXT:    [[TMP134:%.*]] = load i32, i32* [[M]], align 4
24752 // CHECK20-NEXT:    store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
24753 // CHECK20-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
24754 // CHECK20-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
24755 // CHECK20-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
24756 // CHECK20-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
24757 // CHECK20-NEXT:    [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
24758 // CHECK20-NEXT:    [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
24759 // CHECK20-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
24760 // CHECK20-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
24761 // CHECK20-NEXT:    store i32 [[TMP135]], i32* [[TMP141]], align 4
24762 // CHECK20-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
24763 // CHECK20-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
24764 // CHECK20-NEXT:    store i32 [[TMP135]], i32* [[TMP143]], align 4
24765 // CHECK20-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
24766 // CHECK20-NEXT:    store i64 4, i64* [[TMP144]], align 4
24767 // CHECK20-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
24768 // CHECK20-NEXT:    store i8* null, i8** [[TMP145]], align 4
24769 // CHECK20-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
24770 // CHECK20-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
24771 // CHECK20-NEXT:    store i32 [[TMP137]], i32* [[TMP147]], align 4
24772 // CHECK20-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
24773 // CHECK20-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
24774 // CHECK20-NEXT:    store i32 [[TMP137]], i32* [[TMP149]], align 4
24775 // CHECK20-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
24776 // CHECK20-NEXT:    store i64 4, i64* [[TMP150]], align 4
24777 // CHECK20-NEXT:    [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
24778 // CHECK20-NEXT:    store i8* null, i8** [[TMP151]], align 4
24779 // CHECK20-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
24780 // CHECK20-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
24781 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP153]], align 4
24782 // CHECK20-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
24783 // CHECK20-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
24784 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP155]], align 4
24785 // CHECK20-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
24786 // CHECK20-NEXT:    store i64 4, i64* [[TMP156]], align 4
24787 // CHECK20-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
24788 // CHECK20-NEXT:    store i8* null, i8** [[TMP157]], align 4
24789 // CHECK20-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
24790 // CHECK20-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
24791 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP159]], align 4
24792 // CHECK20-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
24793 // CHECK20-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
24794 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP161]], align 4
24795 // CHECK20-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
24796 // CHECK20-NEXT:    store i64 [[TMP139]], i64* [[TMP162]], align 4
24797 // CHECK20-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
24798 // CHECK20-NEXT:    store i8* null, i8** [[TMP163]], align 4
24799 // CHECK20-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
24800 // CHECK20-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
24801 // CHECK20-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
24802 // CHECK20-NEXT:    [[TMP167:%.*]] = load i32, i32* [[N]], align 4
24803 // CHECK20-NEXT:    store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
24804 // CHECK20-NEXT:    [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
24805 // CHECK20-NEXT:    [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
24806 // CHECK20-NEXT:    [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
24807 // CHECK20-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
24808 // CHECK20-NEXT:    store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
24809 // CHECK20-NEXT:    [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
24810 // CHECK20-NEXT:    [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
24811 // CHECK20-NEXT:    [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
24812 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
24813 // CHECK20-NEXT:    [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24814 // CHECK20-NEXT:    [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
24815 // CHECK20-NEXT:    br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
24816 // CHECK20:       omp_offload.failed58:
24817 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
24818 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT59]]
24819 // CHECK20:       omp_offload.cont59:
24820 // CHECK20-NEXT:    [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
24821 // CHECK20-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
24822 // CHECK20-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
24823 // CHECK20-NEXT:    [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
24824 // CHECK20-NEXT:    call void @llvm.stackrestore(i8* [[TMP174]])
24825 // CHECK20-NEXT:    [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
24826 // CHECK20-NEXT:    ret i32 [[TMP175]]
24827 //
24828 //
24829 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
24830 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
24831 // CHECK20-NEXT:  entry:
24832 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
24833 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
24834 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
24835 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
24836 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
24837 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
24838 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
24839 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
24840 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
24841 // CHECK20-NEXT:    ret void
24842 //
24843 //
24844 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined.
24845 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
24846 // CHECK20-NEXT:  entry:
24847 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24848 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24849 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
24850 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
24851 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
24852 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24853 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24854 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24855 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
24856 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
24857 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24858 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24859 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24860 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24861 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
24862 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24863 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24864 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
24865 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
24866 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
24867 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
24868 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
24869 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
24870 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
24871 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
24872 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24873 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
24874 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
24875 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
24876 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
24877 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
24878 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24879 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
24880 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
24881 // CHECK20:       omp.precond.then:
24882 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24883 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24884 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
24885 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24886 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24887 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24888 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
24889 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24890 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24891 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24892 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
24893 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24894 // CHECK20:       cond.true:
24895 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24896 // CHECK20-NEXT:    br label [[COND_END:%.*]]
24897 // CHECK20:       cond.false:
24898 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24899 // CHECK20-NEXT:    br label [[COND_END]]
24900 // CHECK20:       cond.end:
24901 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
24902 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24903 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24904 // CHECK20-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
24905 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24906 // CHECK20:       omp.inner.for.cond:
24907 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24908 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24909 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
24910 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24911 // CHECK20:       omp.inner.for.body:
24912 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24913 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24914 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
24915 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24916 // CHECK20:       omp.inner.for.inc:
24917 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24918 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24919 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
24920 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24921 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
24922 // CHECK20:       omp.inner.for.end:
24923 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24924 // CHECK20:       omp.loop.exit:
24925 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24926 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
24927 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
24928 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
24929 // CHECK20:       omp.precond.end:
24930 // CHECK20-NEXT:    ret void
24931 //
24932 //
24933 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1
24934 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
24935 // CHECK20-NEXT:  entry:
24936 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24937 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24938 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24939 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24940 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
24941 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
24942 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
24943 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24944 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24945 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24946 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
24947 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
24948 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24949 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24950 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24951 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24952 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
24953 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24954 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24955 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24956 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24957 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
24958 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
24959 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
24960 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
24961 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
24962 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
24963 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
24964 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
24965 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24966 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
24967 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
24968 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
24969 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
24970 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
24971 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24972 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
24973 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
24974 // CHECK20:       omp.precond.then:
24975 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24976 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24977 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
24978 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24979 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24980 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
24981 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
24982 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24983 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24984 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24985 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
24986 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24987 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24988 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24989 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
24990 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24991 // CHECK20:       cond.true:
24992 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
24993 // CHECK20-NEXT:    br label [[COND_END:%.*]]
24994 // CHECK20:       cond.false:
24995 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24996 // CHECK20-NEXT:    br label [[COND_END]]
24997 // CHECK20:       cond.end:
24998 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
24999 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25000 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25001 // CHECK20-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25002 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25003 // CHECK20:       omp.inner.for.cond:
25004 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25005 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25006 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25007 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25008 // CHECK20:       omp.inner.for.body:
25009 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25010 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25011 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25012 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
25013 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
25014 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
25015 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
25016 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25017 // CHECK20:       omp.body.continue:
25018 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25019 // CHECK20:       omp.inner.for.inc:
25020 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25021 // CHECK20-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
25022 // CHECK20-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
25023 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25024 // CHECK20:       omp.inner.for.end:
25025 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25026 // CHECK20:       omp.loop.exit:
25027 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25028 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25029 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25030 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25031 // CHECK20:       omp.precond.end:
25032 // CHECK20-NEXT:    ret void
25033 //
25034 //
25035 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
25036 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25037 // CHECK20-NEXT:  entry:
25038 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25039 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25040 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25041 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25042 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25043 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25044 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25045 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25046 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
25047 // CHECK20-NEXT:    ret void
25048 //
25049 //
25050 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..2
25051 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25052 // CHECK20-NEXT:  entry:
25053 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25054 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25055 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25056 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25057 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25058 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25059 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25060 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25061 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25062 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25063 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25064 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25065 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25066 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25067 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25068 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25069 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25070 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25071 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25072 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25073 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25074 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25075 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25076 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25077 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25078 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25079 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25080 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25081 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25082 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25083 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25084 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25085 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25086 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25087 // CHECK20:       omp.precond.then:
25088 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25089 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25090 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25091 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25092 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25093 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25094 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
25095 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25096 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25097 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25098 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
25099 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25100 // CHECK20:       cond.true:
25101 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25102 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25103 // CHECK20:       cond.false:
25104 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25105 // CHECK20-NEXT:    br label [[COND_END]]
25106 // CHECK20:       cond.end:
25107 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
25108 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25109 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25110 // CHECK20-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
25111 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25112 // CHECK20:       omp.inner.for.cond:
25113 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25114 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25115 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
25116 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25117 // CHECK20:       omp.inner.for.body:
25118 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25119 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25120 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
25121 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25122 // CHECK20:       omp.inner.for.inc:
25123 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25124 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25125 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
25126 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
25127 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25128 // CHECK20:       omp.inner.for.end:
25129 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25130 // CHECK20:       omp.loop.exit:
25131 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25132 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25133 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25134 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25135 // CHECK20:       omp.precond.end:
25136 // CHECK20-NEXT:    ret void
25137 //
25138 //
25139 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..3
25140 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25141 // CHECK20-NEXT:  entry:
25142 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25143 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25144 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25145 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25146 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25147 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25148 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25149 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25150 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25151 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25152 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25153 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25154 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25155 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25156 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25157 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25158 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25159 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25160 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25161 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25162 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25163 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25164 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25165 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25166 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25167 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25168 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25169 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25170 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25171 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25172 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25173 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25174 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25175 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25176 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25177 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25178 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25179 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25180 // CHECK20:       omp.precond.then:
25181 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25182 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25183 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25184 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25185 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25186 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25187 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25188 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25189 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25190 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25191 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
25192 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25193 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25194 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25195 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
25196 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25197 // CHECK20:       cond.true:
25198 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25199 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25200 // CHECK20:       cond.false:
25201 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25202 // CHECK20-NEXT:    br label [[COND_END]]
25203 // CHECK20:       cond.end:
25204 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
25205 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25206 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25207 // CHECK20-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25208 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25209 // CHECK20:       omp.inner.for.cond:
25210 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25211 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25212 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25213 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25214 // CHECK20:       omp.inner.for.body:
25215 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25216 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25217 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25218 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
25219 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
25220 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
25221 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
25222 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25223 // CHECK20:       omp.body.continue:
25224 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25225 // CHECK20:       omp.inner.for.inc:
25226 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25227 // CHECK20-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
25228 // CHECK20-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
25229 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25230 // CHECK20:       omp.inner.for.end:
25231 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25232 // CHECK20:       omp.loop.exit:
25233 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25234 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25235 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25236 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25237 // CHECK20:       omp.precond.end:
25238 // CHECK20-NEXT:    ret void
25239 //
25240 //
25241 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
25242 // CHECK20-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25243 // CHECK20-NEXT:  entry:
25244 // CHECK20-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
25245 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25246 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25247 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25248 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25249 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25250 // CHECK20-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
25251 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25252 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25253 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25254 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25255 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25256 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
25257 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25258 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25259 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25260 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25261 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
25262 // CHECK20-NEXT:    ret void
25263 //
25264 //
25265 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..5
25266 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25267 // CHECK20-NEXT:  entry:
25268 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25269 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25270 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25271 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25272 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25273 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25274 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25275 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25276 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25277 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25278 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25279 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25280 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25281 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25282 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25283 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
25284 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25285 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25286 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25287 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25288 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25289 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25290 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25291 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25292 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25293 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25294 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25295 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25296 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25297 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25298 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25299 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25300 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25301 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25302 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25303 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25304 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25305 // CHECK20:       omp.precond.then:
25306 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25307 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25308 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25309 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25310 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25311 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25312 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25313 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
25314 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
25315 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25316 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25317 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
25318 // CHECK20-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25319 // CHECK20:       cond.true:
25320 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25321 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25322 // CHECK20:       cond.false:
25323 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25324 // CHECK20-NEXT:    br label [[COND_END]]
25325 // CHECK20:       cond.end:
25326 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
25327 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25328 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25329 // CHECK20-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
25330 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25331 // CHECK20:       omp.inner.for.cond:
25332 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25333 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25334 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
25335 // CHECK20-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
25336 // CHECK20-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25337 // CHECK20:       omp.inner.for.body:
25338 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25339 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25340 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25341 // CHECK20-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25342 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25343 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
25344 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25345 // CHECK20:       omp.inner.for.inc:
25346 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25347 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25348 // CHECK20-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
25349 // CHECK20-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
25350 // CHECK20-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25351 // CHECK20-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25352 // CHECK20-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
25353 // CHECK20-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
25354 // CHECK20-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25355 // CHECK20-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25356 // CHECK20-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
25357 // CHECK20-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
25358 // CHECK20-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25359 // CHECK20-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25360 // CHECK20-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
25361 // CHECK20-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
25362 // CHECK20:       cond.true11:
25363 // CHECK20-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25364 // CHECK20-NEXT:    br label [[COND_END13:%.*]]
25365 // CHECK20:       cond.false12:
25366 // CHECK20-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25367 // CHECK20-NEXT:    br label [[COND_END13]]
25368 // CHECK20:       cond.end13:
25369 // CHECK20-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
25370 // CHECK20-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
25371 // CHECK20-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25372 // CHECK20-NEXT:    store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
25373 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25374 // CHECK20:       omp.inner.for.end:
25375 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25376 // CHECK20:       omp.loop.exit:
25377 // CHECK20-NEXT:    [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25378 // CHECK20-NEXT:    [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
25379 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
25380 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25381 // CHECK20:       omp.precond.end:
25382 // CHECK20-NEXT:    ret void
25383 //
25384 //
25385 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..6
25386 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25387 // CHECK20-NEXT:  entry:
25388 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25389 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25390 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25391 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25392 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25393 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25394 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25395 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25396 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25397 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25398 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25399 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25400 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25401 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25402 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25403 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25404 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25405 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
25406 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25407 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25408 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25409 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25410 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25411 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25412 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25413 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25414 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25415 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25416 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25417 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25418 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25419 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25420 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25421 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25422 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25423 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25424 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25425 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25426 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25427 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25428 // CHECK20:       omp.precond.then:
25429 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25430 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25431 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25432 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25433 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25434 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25435 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25436 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25437 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25438 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25439 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
25440 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25441 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25442 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25443 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
25444 // CHECK20-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25445 // CHECK20:       cond.true:
25446 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25447 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25448 // CHECK20:       cond.false:
25449 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25450 // CHECK20-NEXT:    br label [[COND_END]]
25451 // CHECK20:       cond.end:
25452 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
25453 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25454 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25455 // CHECK20-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25456 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25457 // CHECK20:       omp.inner.for.cond:
25458 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25459 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25460 // CHECK20-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25461 // CHECK20-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25462 // CHECK20:       omp.inner.for.body:
25463 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25464 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25465 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25466 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
25467 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
25468 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
25469 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
25470 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25471 // CHECK20:       omp.body.continue:
25472 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25473 // CHECK20:       omp.inner.for.inc:
25474 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25475 // CHECK20-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
25476 // CHECK20-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
25477 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25478 // CHECK20:       omp.inner.for.end:
25479 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25480 // CHECK20:       omp.loop.exit:
25481 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25482 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25483 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25484 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25485 // CHECK20:       omp.precond.end:
25486 // CHECK20-NEXT:    ret void
25487 //
25488 //
25489 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
25490 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25491 // CHECK20-NEXT:  entry:
25492 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25493 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25494 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25495 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25496 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25497 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25498 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25499 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25500 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
25501 // CHECK20-NEXT:    ret void
25502 //
25503 //
25504 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..8
25505 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25506 // CHECK20-NEXT:  entry:
25507 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25508 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25509 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25510 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25511 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25512 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25513 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25514 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25515 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25516 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25517 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25518 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25519 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25520 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25521 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25522 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25523 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25524 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25525 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25526 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25527 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25528 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25529 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25530 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25531 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25532 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25533 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25534 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25535 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25536 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25537 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25538 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25539 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25540 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25541 // CHECK20:       omp.precond.then:
25542 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25543 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25544 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25545 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25546 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25547 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25548 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
25549 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25550 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25551 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25552 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
25553 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25554 // CHECK20:       cond.true:
25555 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25556 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25557 // CHECK20:       cond.false:
25558 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25559 // CHECK20-NEXT:    br label [[COND_END]]
25560 // CHECK20:       cond.end:
25561 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
25562 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25563 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25564 // CHECK20-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
25565 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25566 // CHECK20:       omp.inner.for.cond:
25567 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25568 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25569 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
25570 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25571 // CHECK20:       omp.inner.for.body:
25572 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25573 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25574 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
25575 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25576 // CHECK20:       omp.inner.for.inc:
25577 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25578 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25579 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
25580 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
25581 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25582 // CHECK20:       omp.inner.for.end:
25583 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25584 // CHECK20:       omp.loop.exit:
25585 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25586 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25587 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25588 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25589 // CHECK20:       omp.precond.end:
25590 // CHECK20-NEXT:    ret void
25591 //
25592 //
25593 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..9
25594 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25595 // CHECK20-NEXT:  entry:
25596 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25597 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25598 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25599 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25600 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25601 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25602 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25603 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25604 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25605 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25606 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25607 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25608 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25609 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25610 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25611 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25612 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25613 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25614 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25615 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25616 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25617 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25618 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25619 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25620 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25621 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25622 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25623 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25624 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25625 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25626 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25627 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25628 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25629 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25630 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25631 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25632 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25633 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25634 // CHECK20:       omp.precond.then:
25635 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25636 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25637 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25638 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25639 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25640 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25641 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25642 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25643 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25644 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25645 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25646 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25647 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
25648 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
25649 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
25650 // CHECK20:       omp.dispatch.cond:
25651 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25652 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
25653 // CHECK20-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
25654 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
25655 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25656 // CHECK20:       omp.dispatch.body:
25657 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25658 // CHECK20-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
25659 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25660 // CHECK20:       omp.inner.for.cond:
25661 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
25662 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
25663 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
25664 // CHECK20-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25665 // CHECK20:       omp.inner.for.body:
25666 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
25667 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
25668 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25669 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
25670 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
25671 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
25672 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
25673 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25674 // CHECK20:       omp.body.continue:
25675 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25676 // CHECK20:       omp.inner.for.inc:
25677 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
25678 // CHECK20-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
25679 // CHECK20-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
25680 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
25681 // CHECK20:       omp.inner.for.end:
25682 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
25683 // CHECK20:       omp.dispatch.inc:
25684 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
25685 // CHECK20:       omp.dispatch.end:
25686 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25687 // CHECK20:       omp.precond.end:
25688 // CHECK20-NEXT:    ret void
25689 //
25690 //
25691 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
25692 // CHECK20-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25693 // CHECK20-NEXT:  entry:
25694 // CHECK20-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
25695 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25696 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25697 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25698 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25699 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25700 // CHECK20-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
25701 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25702 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25703 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25704 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25705 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25706 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
25707 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25708 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25709 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25710 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25711 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
25712 // CHECK20-NEXT:    ret void
25713 //
25714 //
25715 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11
25716 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25717 // CHECK20-NEXT:  entry:
25718 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25719 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25720 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25721 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25722 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25723 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25724 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25725 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25726 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25727 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25728 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25729 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25730 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25731 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25732 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25733 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
25734 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25735 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25736 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25737 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25738 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25739 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25740 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25741 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25742 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25743 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25744 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25745 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25746 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25747 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25748 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25749 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25750 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25751 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25752 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25753 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25754 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25755 // CHECK20:       omp.precond.then:
25756 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25757 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25758 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25759 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25760 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25761 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25762 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
25763 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25764 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25765 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25766 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
25767 // CHECK20-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25768 // CHECK20:       cond.true:
25769 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25770 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25771 // CHECK20:       cond.false:
25772 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25773 // CHECK20-NEXT:    br label [[COND_END]]
25774 // CHECK20:       cond.end:
25775 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
25776 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25777 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25778 // CHECK20-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
25779 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25780 // CHECK20:       omp.inner.for.cond:
25781 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25782 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25783 // CHECK20-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
25784 // CHECK20-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25785 // CHECK20:       omp.inner.for.body:
25786 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25787 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25788 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25789 // CHECK20-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25790 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25791 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
25792 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25793 // CHECK20:       omp.inner.for.inc:
25794 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25795 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25796 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
25797 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
25798 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25799 // CHECK20:       omp.inner.for.end:
25800 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25801 // CHECK20:       omp.loop.exit:
25802 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25803 // CHECK20-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
25804 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
25805 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25806 // CHECK20:       omp.precond.end:
25807 // CHECK20-NEXT:    ret void
25808 //
25809 //
25810 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..12
25811 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25812 // CHECK20-NEXT:  entry:
25813 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25814 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25815 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25816 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25817 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25818 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25819 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25820 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25821 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25822 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25823 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25824 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25825 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25826 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25827 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25828 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25829 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25830 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
25831 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25832 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25833 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25834 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25835 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25836 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25837 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25838 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25839 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25840 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25841 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25842 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25843 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25844 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25845 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25846 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25847 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25848 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25849 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25850 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25851 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25852 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25853 // CHECK20:       omp.precond.then:
25854 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25855 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25856 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25857 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25858 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25859 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25860 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25861 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25862 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25863 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25864 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25865 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25866 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25867 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
25868 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
25869 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
25870 // CHECK20:       omp.dispatch.cond:
25871 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25872 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
25873 // CHECK20-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
25874 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
25875 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
25876 // CHECK20:       omp.dispatch.body:
25877 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25878 // CHECK20-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
25879 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25880 // CHECK20:       omp.inner.for.cond:
25881 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
25882 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
25883 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
25884 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25885 // CHECK20:       omp.inner.for.body:
25886 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
25887 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
25888 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25889 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
25890 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
25891 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
25892 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
25893 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25894 // CHECK20:       omp.body.continue:
25895 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25896 // CHECK20:       omp.inner.for.inc:
25897 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
25898 // CHECK20-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
25899 // CHECK20-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
25900 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
25901 // CHECK20:       omp.inner.for.end:
25902 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
25903 // CHECK20:       omp.dispatch.inc:
25904 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
25905 // CHECK20:       omp.dispatch.end:
25906 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25907 // CHECK20:       omp.precond.end:
25908 // CHECK20-NEXT:    ret void
25909 //
25910 //
25911 // CHECK20-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
25912 // CHECK20-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
25913 // CHECK20-NEXT:  entry:
25914 // CHECK20-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
25915 // CHECK20-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
25916 // CHECK20-NEXT:    [[M:%.*]] = alloca i32, align 4
25917 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
25918 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
25919 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
25920 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25921 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
25922 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
25923 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
25924 // CHECK20-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
25925 // CHECK20-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
25926 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
25927 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
25928 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
25929 // CHECK20-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
25930 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
25931 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
25932 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
25933 // CHECK20-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
25934 // CHECK20-NEXT:    [[M_CASTED19:%.*]] = alloca i32, align 4
25935 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
25936 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
25937 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
25938 // CHECK20-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
25939 // CHECK20-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
25940 // CHECK20-NEXT:    store i32 10, i32* [[M]], align 4
25941 // CHECK20-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
25942 // CHECK20-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
25943 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
25944 // CHECK20-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
25945 // CHECK20-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
25946 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
25947 // CHECK20-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
25948 // CHECK20-NEXT:    store i8* null, i8** [[TMP4]], align 4
25949 // CHECK20-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
25950 // CHECK20-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
25951 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
25952 // CHECK20-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
25953 // CHECK20-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
25954 // CHECK20-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
25955 // CHECK20:       omp_offload.failed:
25956 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
25957 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
25958 // CHECK20:       omp_offload.cont:
25959 // CHECK20-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
25960 // CHECK20-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
25961 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
25962 // CHECK20-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
25963 // CHECK20-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
25964 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
25965 // CHECK20-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
25966 // CHECK20-NEXT:    store i8* null, i8** [[TMP13]], align 4
25967 // CHECK20-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
25968 // CHECK20-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
25969 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
25970 // CHECK20-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
25971 // CHECK20-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
25972 // CHECK20-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
25973 // CHECK20:       omp_offload.failed5:
25974 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
25975 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
25976 // CHECK20:       omp_offload.cont6:
25977 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
25978 // CHECK20-NEXT:    store i32 [[TMP18]], i32* [[M_CASTED]], align 4
25979 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
25980 // CHECK20-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
25981 // CHECK20-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
25982 // CHECK20-NEXT:    store i32 [[TMP19]], i32* [[TMP21]], align 4
25983 // CHECK20-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
25984 // CHECK20-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
25985 // CHECK20-NEXT:    store i32 [[TMP19]], i32* [[TMP23]], align 4
25986 // CHECK20-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
25987 // CHECK20-NEXT:    store i8* null, i8** [[TMP24]], align 4
25988 // CHECK20-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
25989 // CHECK20-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
25990 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
25991 // CHECK20-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
25992 // CHECK20-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
25993 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
25994 // CHECK20-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
25995 // CHECK20-NEXT:    store i8* null, i8** [[TMP29]], align 4
25996 // CHECK20-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
25997 // CHECK20-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
25998 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
25999 // CHECK20-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26000 // CHECK20-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
26001 // CHECK20-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
26002 // CHECK20:       omp_offload.failed11:
26003 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
26004 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
26005 // CHECK20:       omp_offload.cont12:
26006 // CHECK20-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
26007 // CHECK20-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
26008 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
26009 // CHECK20-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
26010 // CHECK20-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
26011 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
26012 // CHECK20-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
26013 // CHECK20-NEXT:    store i8* null, i8** [[TMP38]], align 4
26014 // CHECK20-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
26015 // CHECK20-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
26016 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26017 // CHECK20-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26018 // CHECK20-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
26019 // CHECK20-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
26020 // CHECK20:       omp_offload.failed17:
26021 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
26022 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
26023 // CHECK20:       omp_offload.cont18:
26024 // CHECK20-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
26025 // CHECK20-NEXT:    store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
26026 // CHECK20-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
26027 // CHECK20-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
26028 // CHECK20-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
26029 // CHECK20-NEXT:    store i32 [[TMP44]], i32* [[TMP46]], align 4
26030 // CHECK20-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
26031 // CHECK20-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
26032 // CHECK20-NEXT:    store i32 [[TMP44]], i32* [[TMP48]], align 4
26033 // CHECK20-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
26034 // CHECK20-NEXT:    store i8* null, i8** [[TMP49]], align 4
26035 // CHECK20-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
26036 // CHECK20-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
26037 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
26038 // CHECK20-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
26039 // CHECK20-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
26040 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
26041 // CHECK20-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
26042 // CHECK20-NEXT:    store i8* null, i8** [[TMP54]], align 4
26043 // CHECK20-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
26044 // CHECK20-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
26045 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26046 // CHECK20-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26047 // CHECK20-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
26048 // CHECK20-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
26049 // CHECK20:       omp_offload.failed24:
26050 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
26051 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
26052 // CHECK20:       omp_offload.cont25:
26053 // CHECK20-NEXT:    ret i32 0
26054 //
26055 //
26056 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
26057 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26058 // CHECK20-NEXT:  entry:
26059 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26060 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26061 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26062 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26063 // CHECK20-NEXT:    ret void
26064 //
26065 //
26066 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..14
26067 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26068 // CHECK20-NEXT:  entry:
26069 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26070 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26071 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26072 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26073 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26074 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26075 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26076 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26077 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26078 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26079 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26080 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26081 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26082 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26083 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26084 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26085 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26086 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26087 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26088 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26089 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26090 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26091 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26092 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26093 // CHECK20:       cond.true:
26094 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26095 // CHECK20:       cond.false:
26096 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26097 // CHECK20-NEXT:    br label [[COND_END]]
26098 // CHECK20:       cond.end:
26099 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26100 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26101 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26102 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26103 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26104 // CHECK20:       omp.inner.for.cond:
26105 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26106 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26107 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26108 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26109 // CHECK20:       omp.inner.for.body:
26110 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26111 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26112 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
26113 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26114 // CHECK20:       omp.inner.for.inc:
26115 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26116 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26117 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26118 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26119 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26120 // CHECK20:       omp.inner.for.end:
26121 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26122 // CHECK20:       omp.loop.exit:
26123 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26124 // CHECK20-NEXT:    ret void
26125 //
26126 //
26127 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..15
26128 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26129 // CHECK20-NEXT:  entry:
26130 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26131 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26132 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26133 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26134 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26135 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26136 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26137 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26138 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26139 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26140 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26141 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26142 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26143 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26144 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26145 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26146 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26147 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26148 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26149 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26150 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26151 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26152 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26153 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26154 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26155 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26156 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26157 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
26158 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26159 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26160 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
26161 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26162 // CHECK20:       cond.true:
26163 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26164 // CHECK20:       cond.false:
26165 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26166 // CHECK20-NEXT:    br label [[COND_END]]
26167 // CHECK20:       cond.end:
26168 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
26169 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26170 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26171 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
26172 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26173 // CHECK20:       omp.inner.for.cond:
26174 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26175 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26176 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
26177 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26178 // CHECK20:       omp.inner.for.body:
26179 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26180 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
26181 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26182 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
26183 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
26184 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
26185 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
26186 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26187 // CHECK20:       omp.body.continue:
26188 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26189 // CHECK20:       omp.inner.for.inc:
26190 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26191 // CHECK20-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
26192 // CHECK20-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
26193 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26194 // CHECK20:       omp.inner.for.end:
26195 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26196 // CHECK20:       omp.loop.exit:
26197 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
26198 // CHECK20-NEXT:    ret void
26199 //
26200 //
26201 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
26202 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26203 // CHECK20-NEXT:  entry:
26204 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26205 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26206 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26207 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26208 // CHECK20-NEXT:    ret void
26209 //
26210 //
26211 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..17
26212 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26213 // CHECK20-NEXT:  entry:
26214 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26215 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26216 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26217 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26218 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26219 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26220 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26221 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26222 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26223 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26224 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26225 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26226 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26227 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26228 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26229 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26230 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26231 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26232 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26233 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26234 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26235 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26236 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26237 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26238 // CHECK20:       cond.true:
26239 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26240 // CHECK20:       cond.false:
26241 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26242 // CHECK20-NEXT:    br label [[COND_END]]
26243 // CHECK20:       cond.end:
26244 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26245 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26246 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26247 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26248 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26249 // CHECK20:       omp.inner.for.cond:
26250 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26251 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26252 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26253 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26254 // CHECK20:       omp.inner.for.body:
26255 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26256 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26257 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
26258 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26259 // CHECK20:       omp.inner.for.inc:
26260 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26261 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26262 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26263 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26264 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26265 // CHECK20:       omp.inner.for.end:
26266 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26267 // CHECK20:       omp.loop.exit:
26268 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26269 // CHECK20-NEXT:    ret void
26270 //
26271 //
26272 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..18
26273 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26274 // CHECK20-NEXT:  entry:
26275 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26276 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26277 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26278 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26279 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26280 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26281 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26282 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26283 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26284 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26285 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26286 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26287 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26288 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26289 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26290 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26291 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26292 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26293 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26294 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26295 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26296 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26297 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26298 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26299 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26300 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26301 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26302 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
26303 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26304 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26305 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
26306 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26307 // CHECK20:       cond.true:
26308 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26309 // CHECK20:       cond.false:
26310 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26311 // CHECK20-NEXT:    br label [[COND_END]]
26312 // CHECK20:       cond.end:
26313 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
26314 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26315 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26316 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
26317 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26318 // CHECK20:       omp.inner.for.cond:
26319 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26320 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26321 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
26322 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26323 // CHECK20:       omp.inner.for.body:
26324 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26325 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
26326 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26327 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
26328 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
26329 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
26330 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
26331 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26332 // CHECK20:       omp.body.continue:
26333 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26334 // CHECK20:       omp.inner.for.inc:
26335 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26336 // CHECK20-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
26337 // CHECK20-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
26338 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26339 // CHECK20:       omp.inner.for.end:
26340 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26341 // CHECK20:       omp.loop.exit:
26342 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
26343 // CHECK20-NEXT:    ret void
26344 //
26345 //
26346 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
26347 // CHECK20-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26348 // CHECK20-NEXT:  entry:
26349 // CHECK20-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
26350 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26351 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
26352 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26353 // CHECK20-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
26354 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26355 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26356 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
26357 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
26358 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26359 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26360 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26361 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
26362 // CHECK20-NEXT:    ret void
26363 //
26364 //
26365 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..21
26366 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26367 // CHECK20-NEXT:  entry:
26368 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26369 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26370 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26371 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26372 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26373 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26374 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26375 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26376 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26377 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26378 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26379 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26380 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26381 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26382 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26383 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26384 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26385 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26386 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26387 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26388 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26389 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26390 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26391 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26392 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26393 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26394 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26395 // CHECK20:       cond.true:
26396 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26397 // CHECK20:       cond.false:
26398 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26399 // CHECK20-NEXT:    br label [[COND_END]]
26400 // CHECK20:       cond.end:
26401 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26402 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26403 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26404 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26405 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26406 // CHECK20:       omp.inner.for.cond:
26407 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26408 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26409 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26410 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26411 // CHECK20:       omp.inner.for.body:
26412 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26413 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26414 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26415 // CHECK20-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26416 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26417 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
26418 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26419 // CHECK20:       omp.inner.for.inc:
26420 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26421 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26422 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
26423 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26424 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26425 // CHECK20:       omp.inner.for.end:
26426 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26427 // CHECK20:       omp.loop.exit:
26428 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26429 // CHECK20-NEXT:    ret void
26430 //
26431 //
26432 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..22
26433 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26434 // CHECK20-NEXT:  entry:
26435 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26436 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26437 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26438 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26439 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26440 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26441 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26442 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26443 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26444 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26445 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26446 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26447 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26448 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26449 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26450 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26451 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26452 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26453 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26454 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26455 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26456 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26457 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26458 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26459 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26460 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26461 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26462 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26463 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26464 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26465 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
26466 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
26467 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
26468 // CHECK20:       omp.dispatch.cond:
26469 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26470 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26471 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
26472 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26473 // CHECK20:       cond.true:
26474 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26475 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26476 // CHECK20:       cond.false:
26477 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26478 // CHECK20-NEXT:    br label [[COND_END]]
26479 // CHECK20:       cond.end:
26480 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
26481 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26482 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26483 // CHECK20-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
26484 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26485 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26486 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
26487 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26488 // CHECK20:       omp.dispatch.body:
26489 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26490 // CHECK20:       omp.inner.for.cond:
26491 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26492 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26493 // CHECK20-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
26494 // CHECK20-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26495 // CHECK20:       omp.inner.for.body:
26496 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26497 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
26498 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26499 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
26500 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
26501 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
26502 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
26503 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26504 // CHECK20:       omp.body.continue:
26505 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26506 // CHECK20:       omp.inner.for.inc:
26507 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26508 // CHECK20-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
26509 // CHECK20-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
26510 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26511 // CHECK20:       omp.inner.for.end:
26512 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
26513 // CHECK20:       omp.dispatch.inc:
26514 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26515 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26516 // CHECK20-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
26517 // CHECK20-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
26518 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26519 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26520 // CHECK20-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
26521 // CHECK20-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
26522 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
26523 // CHECK20:       omp.dispatch.end:
26524 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
26525 // CHECK20-NEXT:    ret void
26526 //
26527 //
26528 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
26529 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26530 // CHECK20-NEXT:  entry:
26531 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26532 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26533 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26534 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26535 // CHECK20-NEXT:    ret void
26536 //
26537 //
26538 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..25
26539 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26540 // CHECK20-NEXT:  entry:
26541 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26542 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26543 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26544 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26545 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26546 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26547 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26548 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26549 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26550 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26551 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26552 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26553 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26554 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26555 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26556 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26557 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26558 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26559 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26560 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26561 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26562 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26563 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26564 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26565 // CHECK20:       cond.true:
26566 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26567 // CHECK20:       cond.false:
26568 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26569 // CHECK20-NEXT:    br label [[COND_END]]
26570 // CHECK20:       cond.end:
26571 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26572 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26573 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26574 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26575 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26576 // CHECK20:       omp.inner.for.cond:
26577 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26578 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26579 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26580 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26581 // CHECK20:       omp.inner.for.body:
26582 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26583 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26584 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
26585 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26586 // CHECK20:       omp.inner.for.inc:
26587 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26588 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26589 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26590 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26591 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26592 // CHECK20:       omp.inner.for.end:
26593 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26594 // CHECK20:       omp.loop.exit:
26595 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26596 // CHECK20-NEXT:    ret void
26597 //
26598 //
26599 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..26
26600 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26601 // CHECK20-NEXT:  entry:
26602 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26603 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26604 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26605 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26606 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26607 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26608 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26609 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26610 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26611 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26612 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26613 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26614 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26615 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26616 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26617 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26618 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26619 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26620 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26621 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26622 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26623 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26624 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26625 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26626 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26627 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26628 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26629 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26630 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26631 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
26632 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
26633 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
26634 // CHECK20:       omp.dispatch.cond:
26635 // CHECK20-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
26636 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
26637 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26638 // CHECK20:       omp.dispatch.body:
26639 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26640 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
26641 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26642 // CHECK20:       omp.inner.for.cond:
26643 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
26644 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
26645 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
26646 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26647 // CHECK20:       omp.inner.for.body:
26648 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
26649 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
26650 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26651 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
26652 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
26653 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
26654 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
26655 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26656 // CHECK20:       omp.body.continue:
26657 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26658 // CHECK20:       omp.inner.for.inc:
26659 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
26660 // CHECK20-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
26661 // CHECK20-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
26662 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
26663 // CHECK20:       omp.inner.for.end:
26664 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
26665 // CHECK20:       omp.dispatch.inc:
26666 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
26667 // CHECK20:       omp.dispatch.end:
26668 // CHECK20-NEXT:    ret void
26669 //
26670 //
26671 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
26672 // CHECK20-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26673 // CHECK20-NEXT:  entry:
26674 // CHECK20-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
26675 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26676 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
26677 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26678 // CHECK20-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
26679 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26680 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26681 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
26682 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
26683 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26684 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26685 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26686 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
26687 // CHECK20-NEXT:    ret void
26688 //
26689 //
26690 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..29
26691 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26692 // CHECK20-NEXT:  entry:
26693 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26694 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26695 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26696 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26697 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26698 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26699 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26700 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26701 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26702 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26703 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26704 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26705 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26706 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26707 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26708 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26709 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26710 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26711 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26712 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26713 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26714 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26715 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26716 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26717 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26718 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26719 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26720 // CHECK20:       cond.true:
26721 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26722 // CHECK20:       cond.false:
26723 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26724 // CHECK20-NEXT:    br label [[COND_END]]
26725 // CHECK20:       cond.end:
26726 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26727 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26728 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26729 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26730 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26731 // CHECK20:       omp.inner.for.cond:
26732 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26733 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26734 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26735 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26736 // CHECK20:       omp.inner.for.body:
26737 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26738 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26739 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26740 // CHECK20-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26741 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26742 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
26743 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26744 // CHECK20:       omp.inner.for.inc:
26745 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26746 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26747 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
26748 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26749 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26750 // CHECK20:       omp.inner.for.end:
26751 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26752 // CHECK20:       omp.loop.exit:
26753 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26754 // CHECK20-NEXT:    ret void
26755 //
26756 //
26757 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..30
26758 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26759 // CHECK20-NEXT:  entry:
26760 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26761 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26762 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26763 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26764 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26765 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26766 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26767 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26768 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26769 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26770 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26771 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26772 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26773 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26774 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26775 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26776 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26777 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26778 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26779 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26780 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26781 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26782 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26783 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26784 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26785 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26786 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26787 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26788 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26789 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26790 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26791 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26792 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
26793 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
26794 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
26795 // CHECK20:       omp.dispatch.cond:
26796 // CHECK20-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
26797 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
26798 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26799 // CHECK20:       omp.dispatch.body:
26800 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26801 // CHECK20-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
26802 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26803 // CHECK20:       omp.inner.for.cond:
26804 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
26805 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
26806 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
26807 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26808 // CHECK20:       omp.inner.for.body:
26809 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
26810 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
26811 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26812 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
26813 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
26814 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
26815 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
26816 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26817 // CHECK20:       omp.body.continue:
26818 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26819 // CHECK20:       omp.inner.for.inc:
26820 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
26821 // CHECK20-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
26822 // CHECK20-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
26823 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
26824 // CHECK20:       omp.inner.for.end:
26825 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
26826 // CHECK20:       omp.dispatch.inc:
26827 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
26828 // CHECK20:       omp.dispatch.end:
26829 // CHECK20-NEXT:    ret void
26830 //
26831 //
26832 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
26833 // CHECK20-SAME: () #[[ATTR5:[0-9]+]] {
26834 // CHECK20-NEXT:  entry:
26835 // CHECK20-NEXT:    call void @__tgt_register_requires(i64 1)
26836 // CHECK20-NEXT:    ret void
26837 //
26838