1 /* 2 * This declarations of the PIC12F675 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:04 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC12F675_H__ 26 #define __PIC12F675_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF_ADDR 0x0000 37 #define TMR0_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR_ADDR 0x0004 41 #define GPIO_ADDR 0x0005 42 #define PCLATH_ADDR 0x000A 43 #define INTCON_ADDR 0x000B 44 #define PIR1_ADDR 0x000C 45 #define TMR1_ADDR 0x000E 46 #define TMR1L_ADDR 0x000E 47 #define TMR1H_ADDR 0x000F 48 #define T1CON_ADDR 0x0010 49 #define CMCON_ADDR 0x0019 50 #define ADRESH_ADDR 0x001E 51 #define ADCON0_ADDR 0x001F 52 #define OPTION_REG_ADDR 0x0081 53 #define TRISIO_ADDR 0x0085 54 #define PIE1_ADDR 0x008C 55 #define PCON_ADDR 0x008E 56 #define OSCCAL_ADDR 0x0090 57 #define WPU_ADDR 0x0095 58 #define IOC_ADDR 0x0096 59 #define IOCB_ADDR 0x0096 60 #define VRCON_ADDR 0x0099 61 #define EEDAT_ADDR 0x009A 62 #define EEDATA_ADDR 0x009A 63 #define EEADR_ADDR 0x009B 64 #define EECON1_ADDR 0x009C 65 #define EECON2_ADDR 0x009D 66 #define ADRESL_ADDR 0x009E 67 #define ANSEL_ADDR 0x009F 68 69 #endif // #ifndef NO_ADDR_DEFINES 70 71 //============================================================================== 72 // 73 // Register Definitions 74 // 75 //============================================================================== 76 77 extern __at(0x0000) __sfr INDF; 78 extern __at(0x0001) __sfr TMR0; 79 extern __at(0x0002) __sfr PCL; 80 81 //============================================================================== 82 // STATUS Bits 83 84 extern __at(0x0003) __sfr STATUS; 85 86 typedef union 87 { 88 struct 89 { 90 unsigned C : 1; 91 unsigned DC : 1; 92 unsigned Z : 1; 93 unsigned NOT_PD : 1; 94 unsigned NOT_TO : 1; 95 unsigned RP0 : 1; 96 unsigned RP1 : 1; 97 unsigned IRP : 1; 98 }; 99 100 struct 101 { 102 unsigned : 5; 103 unsigned RP : 2; 104 unsigned : 1; 105 }; 106 } __STATUSbits_t; 107 108 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 109 110 #define _C 0x01 111 #define _DC 0x02 112 #define _Z 0x04 113 #define _NOT_PD 0x08 114 #define _NOT_TO 0x10 115 #define _RP0 0x20 116 #define _RP1 0x40 117 #define _IRP 0x80 118 119 //============================================================================== 120 121 extern __at(0x0004) __sfr FSR; 122 123 //============================================================================== 124 // GPIO Bits 125 126 extern __at(0x0005) __sfr GPIO; 127 128 typedef union 129 { 130 struct 131 { 132 unsigned GP0 : 1; 133 unsigned GP1 : 1; 134 unsigned GP2 : 1; 135 unsigned GP3 : 1; 136 unsigned GP4 : 1; 137 unsigned GP5 : 1; 138 unsigned : 1; 139 unsigned : 1; 140 }; 141 142 struct 143 { 144 unsigned GPIO0 : 1; 145 unsigned GPIO1 : 1; 146 unsigned GPIO2 : 1; 147 unsigned GPIO3 : 1; 148 unsigned GPIO4 : 1; 149 unsigned GPIO5 : 1; 150 unsigned : 1; 151 unsigned : 1; 152 }; 153 154 struct 155 { 156 unsigned GPIO : 6; 157 unsigned : 2; 158 }; 159 160 struct 161 { 162 unsigned GP : 6; 163 unsigned : 2; 164 }; 165 } __GPIObits_t; 166 167 extern __at(0x0005) volatile __GPIObits_t GPIObits; 168 169 #define _GP0 0x01 170 #define _GPIO0 0x01 171 #define _GP1 0x02 172 #define _GPIO1 0x02 173 #define _GP2 0x04 174 #define _GPIO2 0x04 175 #define _GP3 0x08 176 #define _GPIO3 0x08 177 #define _GP4 0x10 178 #define _GPIO4 0x10 179 #define _GP5 0x20 180 #define _GPIO5 0x20 181 182 //============================================================================== 183 184 extern __at(0x000A) __sfr PCLATH; 185 186 //============================================================================== 187 // INTCON Bits 188 189 extern __at(0x000B) __sfr INTCON; 190 191 typedef union 192 { 193 struct 194 { 195 unsigned GPIF : 1; 196 unsigned INTF : 1; 197 unsigned T0IF : 1; 198 unsigned GPIE : 1; 199 unsigned INTE : 1; 200 unsigned T0IE : 1; 201 unsigned PEIE : 1; 202 unsigned GIE : 1; 203 }; 204 205 struct 206 { 207 unsigned : 1; 208 unsigned : 1; 209 unsigned TMR0IF : 1; 210 unsigned : 1; 211 unsigned : 1; 212 unsigned TMR0IE : 1; 213 unsigned : 1; 214 unsigned : 1; 215 }; 216 } __INTCONbits_t; 217 218 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 219 220 #define _GPIF 0x01 221 #define _INTF 0x02 222 #define _T0IF 0x04 223 #define _TMR0IF 0x04 224 #define _GPIE 0x08 225 #define _INTE 0x10 226 #define _T0IE 0x20 227 #define _TMR0IE 0x20 228 #define _PEIE 0x40 229 #define _GIE 0x80 230 231 //============================================================================== 232 233 234 //============================================================================== 235 // PIR1 Bits 236 237 extern __at(0x000C) __sfr PIR1; 238 239 typedef union 240 { 241 struct 242 { 243 unsigned TMR1IF : 1; 244 unsigned : 1; 245 unsigned : 1; 246 unsigned CMIF : 1; 247 unsigned : 1; 248 unsigned : 1; 249 unsigned ADIF : 1; 250 unsigned EEIF : 1; 251 }; 252 253 struct 254 { 255 unsigned T1IF : 1; 256 unsigned : 1; 257 unsigned : 1; 258 unsigned : 1; 259 unsigned : 1; 260 unsigned : 1; 261 unsigned : 1; 262 unsigned : 1; 263 }; 264 } __PIR1bits_t; 265 266 extern __at(0x000C) volatile __PIR1bits_t PIR1bits; 267 268 #define _TMR1IF 0x01 269 #define _T1IF 0x01 270 #define _CMIF 0x08 271 #define _ADIF 0x40 272 #define _EEIF 0x80 273 274 //============================================================================== 275 276 extern __at(0x000E) __sfr TMR1; 277 extern __at(0x000E) __sfr TMR1L; 278 extern __at(0x000F) __sfr TMR1H; 279 280 //============================================================================== 281 // T1CON Bits 282 283 extern __at(0x0010) __sfr T1CON; 284 285 typedef union 286 { 287 struct 288 { 289 unsigned TMR1ON : 1; 290 unsigned TMR1CS : 1; 291 unsigned NOT_T1SYNC : 1; 292 unsigned T1OSCEN : 1; 293 unsigned T1CKPS0 : 1; 294 unsigned T1CKPS1 : 1; 295 unsigned TMR1GE : 1; 296 unsigned : 1; 297 }; 298 299 struct 300 { 301 unsigned : 4; 302 unsigned T1CKPS : 2; 303 unsigned : 2; 304 }; 305 } __T1CONbits_t; 306 307 extern __at(0x0010) volatile __T1CONbits_t T1CONbits; 308 309 #define _TMR1ON 0x01 310 #define _TMR1CS 0x02 311 #define _NOT_T1SYNC 0x04 312 #define _T1OSCEN 0x08 313 #define _T1CKPS0 0x10 314 #define _T1CKPS1 0x20 315 #define _TMR1GE 0x40 316 317 //============================================================================== 318 319 320 //============================================================================== 321 // CMCON Bits 322 323 extern __at(0x0019) __sfr CMCON; 324 325 typedef union 326 { 327 struct 328 { 329 unsigned CM0 : 1; 330 unsigned CM1 : 1; 331 unsigned CM2 : 1; 332 unsigned CIS : 1; 333 unsigned CINV : 1; 334 unsigned : 1; 335 unsigned COUT : 1; 336 unsigned : 1; 337 }; 338 339 struct 340 { 341 unsigned CM : 3; 342 unsigned : 5; 343 }; 344 } __CMCONbits_t; 345 346 extern __at(0x0019) volatile __CMCONbits_t CMCONbits; 347 348 #define _CM0 0x01 349 #define _CM1 0x02 350 #define _CM2 0x04 351 #define _CIS 0x08 352 #define _CINV 0x10 353 #define _COUT 0x40 354 355 //============================================================================== 356 357 extern __at(0x001E) __sfr ADRESH; 358 359 //============================================================================== 360 // ADCON0 Bits 361 362 extern __at(0x001F) __sfr ADCON0; 363 364 typedef union 365 { 366 struct 367 { 368 unsigned ADON : 1; 369 unsigned GO_NOT_DONE : 1; 370 unsigned CHS0 : 1; 371 unsigned CHS1 : 1; 372 unsigned : 1; 373 unsigned : 1; 374 unsigned VCFG : 1; 375 unsigned ADFM : 1; 376 }; 377 378 struct 379 { 380 unsigned : 1; 381 unsigned GO_DONE : 1; 382 unsigned : 1; 383 unsigned : 1; 384 unsigned : 1; 385 unsigned : 1; 386 unsigned : 1; 387 unsigned : 1; 388 }; 389 390 struct 391 { 392 unsigned : 1; 393 unsigned NOT_DONE : 1; 394 unsigned : 1; 395 unsigned : 1; 396 unsigned : 1; 397 unsigned : 1; 398 unsigned : 1; 399 unsigned : 1; 400 }; 401 402 struct 403 { 404 unsigned : 1; 405 unsigned GO : 1; 406 unsigned : 1; 407 unsigned : 1; 408 unsigned : 1; 409 unsigned : 1; 410 unsigned : 1; 411 unsigned : 1; 412 }; 413 414 struct 415 { 416 unsigned : 2; 417 unsigned CHS : 2; 418 unsigned : 4; 419 }; 420 } __ADCON0bits_t; 421 422 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits; 423 424 #define _ADON 0x01 425 #define _GO_NOT_DONE 0x02 426 #define _GO_DONE 0x02 427 #define _NOT_DONE 0x02 428 #define _GO 0x02 429 #define _CHS0 0x04 430 #define _CHS1 0x08 431 #define _VCFG 0x40 432 #define _ADFM 0x80 433 434 //============================================================================== 435 436 437 //============================================================================== 438 // OPTION_REG Bits 439 440 extern __at(0x0081) __sfr OPTION_REG; 441 442 typedef union 443 { 444 struct 445 { 446 unsigned PS0 : 1; 447 unsigned PS1 : 1; 448 unsigned PS2 : 1; 449 unsigned PSA : 1; 450 unsigned T0SE : 1; 451 unsigned T0CS : 1; 452 unsigned INTEDG : 1; 453 unsigned NOT_GPPU : 1; 454 }; 455 456 struct 457 { 458 unsigned PS : 3; 459 unsigned : 5; 460 }; 461 } __OPTION_REGbits_t; 462 463 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits; 464 465 #define _PS0 0x01 466 #define _PS1 0x02 467 #define _PS2 0x04 468 #define _PSA 0x08 469 #define _T0SE 0x10 470 #define _T0CS 0x20 471 #define _INTEDG 0x40 472 #define _NOT_GPPU 0x80 473 474 //============================================================================== 475 476 477 //============================================================================== 478 // TRISIO Bits 479 480 extern __at(0x0085) __sfr TRISIO; 481 482 typedef union 483 { 484 struct 485 { 486 unsigned TRISIO0 : 1; 487 unsigned TRISIO1 : 1; 488 unsigned TRISIO2 : 1; 489 unsigned TRISIO3 : 1; 490 unsigned TRISIO4 : 1; 491 unsigned TRISIO5 : 1; 492 unsigned : 1; 493 unsigned : 1; 494 }; 495 496 struct 497 { 498 unsigned TRISIO : 6; 499 unsigned : 2; 500 }; 501 } __TRISIObits_t; 502 503 extern __at(0x0085) volatile __TRISIObits_t TRISIObits; 504 505 #define _TRISIO0 0x01 506 #define _TRISIO1 0x02 507 #define _TRISIO2 0x04 508 #define _TRISIO3 0x08 509 #define _TRISIO4 0x10 510 #define _TRISIO5 0x20 511 512 //============================================================================== 513 514 515 //============================================================================== 516 // PIE1 Bits 517 518 extern __at(0x008C) __sfr PIE1; 519 520 typedef union 521 { 522 struct 523 { 524 unsigned TMR1IE : 1; 525 unsigned : 1; 526 unsigned : 1; 527 unsigned CMIE : 1; 528 unsigned : 1; 529 unsigned : 1; 530 unsigned ADIE : 1; 531 unsigned EEIE : 1; 532 }; 533 534 struct 535 { 536 unsigned T1IE : 1; 537 unsigned : 1; 538 unsigned : 1; 539 unsigned : 1; 540 unsigned : 1; 541 unsigned : 1; 542 unsigned : 1; 543 unsigned : 1; 544 }; 545 } __PIE1bits_t; 546 547 extern __at(0x008C) volatile __PIE1bits_t PIE1bits; 548 549 #define _TMR1IE 0x01 550 #define _T1IE 0x01 551 #define _CMIE 0x08 552 #define _ADIE 0x40 553 #define _EEIE 0x80 554 555 //============================================================================== 556 557 558 //============================================================================== 559 // PCON Bits 560 561 extern __at(0x008E) __sfr PCON; 562 563 typedef union 564 { 565 struct 566 { 567 unsigned NOT_BOR : 1; 568 unsigned NOT_POR : 1; 569 unsigned : 1; 570 unsigned : 1; 571 unsigned : 1; 572 unsigned : 1; 573 unsigned : 1; 574 unsigned : 1; 575 }; 576 577 struct 578 { 579 unsigned NOT_BOD : 1; 580 unsigned : 1; 581 unsigned : 1; 582 unsigned : 1; 583 unsigned : 1; 584 unsigned : 1; 585 unsigned : 1; 586 unsigned : 1; 587 }; 588 } __PCONbits_t; 589 590 extern __at(0x008E) volatile __PCONbits_t PCONbits; 591 592 #define _NOT_BOR 0x01 593 #define _NOT_BOD 0x01 594 #define _NOT_POR 0x02 595 596 //============================================================================== 597 598 599 //============================================================================== 600 // OSCCAL Bits 601 602 extern __at(0x0090) __sfr OSCCAL; 603 604 typedef union 605 { 606 struct 607 { 608 unsigned : 1; 609 unsigned : 1; 610 unsigned CAL0 : 1; 611 unsigned CAL1 : 1; 612 unsigned CAL2 : 1; 613 unsigned CAL3 : 1; 614 unsigned CAL4 : 1; 615 unsigned CAL5 : 1; 616 }; 617 618 struct 619 { 620 unsigned : 2; 621 unsigned CAL : 6; 622 }; 623 } __OSCCALbits_t; 624 625 extern __at(0x0090) volatile __OSCCALbits_t OSCCALbits; 626 627 #define _CAL0 0x04 628 #define _CAL1 0x08 629 #define _CAL2 0x10 630 #define _CAL3 0x20 631 #define _CAL4 0x40 632 #define _CAL5 0x80 633 634 //============================================================================== 635 636 637 //============================================================================== 638 // WPU Bits 639 640 extern __at(0x0095) __sfr WPU; 641 642 typedef struct 643 { 644 unsigned WPU0 : 1; 645 unsigned WPU1 : 1; 646 unsigned WPU2 : 1; 647 unsigned : 1; 648 unsigned WPU4 : 1; 649 unsigned WPU5 : 1; 650 unsigned : 1; 651 unsigned : 1; 652 } __WPUbits_t; 653 654 extern __at(0x0095) volatile __WPUbits_t WPUbits; 655 656 #define _WPU0 0x01 657 #define _WPU1 0x02 658 #define _WPU2 0x04 659 #define _WPU4 0x10 660 #define _WPU5 0x20 661 662 //============================================================================== 663 664 665 //============================================================================== 666 // IOC Bits 667 668 extern __at(0x0096) __sfr IOC; 669 670 typedef union 671 { 672 struct 673 { 674 unsigned IOC0 : 1; 675 unsigned IOC1 : 1; 676 unsigned IOC2 : 1; 677 unsigned IOC3 : 1; 678 unsigned IOC4 : 1; 679 unsigned IOC5 : 1; 680 unsigned : 1; 681 unsigned : 1; 682 }; 683 684 struct 685 { 686 unsigned IOCB0 : 1; 687 unsigned IOCB1 : 1; 688 unsigned IOCB2 : 1; 689 unsigned IOCB3 : 1; 690 unsigned IOCB4 : 1; 691 unsigned IOCB5 : 1; 692 unsigned : 1; 693 unsigned : 1; 694 }; 695 696 struct 697 { 698 unsigned IOC : 6; 699 unsigned : 2; 700 }; 701 702 struct 703 { 704 unsigned IOCB : 6; 705 unsigned : 2; 706 }; 707 } __IOCbits_t; 708 709 extern __at(0x0096) volatile __IOCbits_t IOCbits; 710 711 #define _IOC0 0x01 712 #define _IOCB0 0x01 713 #define _IOC1 0x02 714 #define _IOCB1 0x02 715 #define _IOC2 0x04 716 #define _IOCB2 0x04 717 #define _IOC3 0x08 718 #define _IOCB3 0x08 719 #define _IOC4 0x10 720 #define _IOCB4 0x10 721 #define _IOC5 0x20 722 #define _IOCB5 0x20 723 724 //============================================================================== 725 726 727 //============================================================================== 728 // IOCB Bits 729 730 extern __at(0x0096) __sfr IOCB; 731 732 typedef union 733 { 734 struct 735 { 736 unsigned IOC0 : 1; 737 unsigned IOC1 : 1; 738 unsigned IOC2 : 1; 739 unsigned IOC3 : 1; 740 unsigned IOC4 : 1; 741 unsigned IOC5 : 1; 742 unsigned : 1; 743 unsigned : 1; 744 }; 745 746 struct 747 { 748 unsigned IOCB0 : 1; 749 unsigned IOCB1 : 1; 750 unsigned IOCB2 : 1; 751 unsigned IOCB3 : 1; 752 unsigned IOCB4 : 1; 753 unsigned IOCB5 : 1; 754 unsigned : 1; 755 unsigned : 1; 756 }; 757 758 struct 759 { 760 unsigned IOCB : 6; 761 unsigned : 2; 762 }; 763 764 struct 765 { 766 unsigned IOC : 6; 767 unsigned : 2; 768 }; 769 } __IOCBbits_t; 770 771 extern __at(0x0096) volatile __IOCBbits_t IOCBbits; 772 773 #define _IOCB_IOC0 0x01 774 #define _IOCB_IOCB0 0x01 775 #define _IOCB_IOC1 0x02 776 #define _IOCB_IOCB1 0x02 777 #define _IOCB_IOC2 0x04 778 #define _IOCB_IOCB2 0x04 779 #define _IOCB_IOC3 0x08 780 #define _IOCB_IOCB3 0x08 781 #define _IOCB_IOC4 0x10 782 #define _IOCB_IOCB4 0x10 783 #define _IOCB_IOC5 0x20 784 #define _IOCB_IOCB5 0x20 785 786 //============================================================================== 787 788 789 //============================================================================== 790 // VRCON Bits 791 792 extern __at(0x0099) __sfr VRCON; 793 794 typedef union 795 { 796 struct 797 { 798 unsigned VR0 : 1; 799 unsigned VR1 : 1; 800 unsigned VR2 : 1; 801 unsigned VR3 : 1; 802 unsigned : 1; 803 unsigned VRR : 1; 804 unsigned : 1; 805 unsigned VREN : 1; 806 }; 807 808 struct 809 { 810 unsigned VR : 4; 811 unsigned : 4; 812 }; 813 } __VRCONbits_t; 814 815 extern __at(0x0099) volatile __VRCONbits_t VRCONbits; 816 817 #define _VR0 0x01 818 #define _VR1 0x02 819 #define _VR2 0x04 820 #define _VR3 0x08 821 #define _VRR 0x20 822 #define _VREN 0x80 823 824 //============================================================================== 825 826 extern __at(0x009A) __sfr EEDAT; 827 extern __at(0x009A) __sfr EEDATA; 828 extern __at(0x009B) __sfr EEADR; 829 830 //============================================================================== 831 // EECON1 Bits 832 833 extern __at(0x009C) __sfr EECON1; 834 835 typedef struct 836 { 837 unsigned RD : 1; 838 unsigned WR : 1; 839 unsigned WREN : 1; 840 unsigned WRERR : 1; 841 unsigned : 1; 842 unsigned : 1; 843 unsigned : 1; 844 unsigned : 1; 845 } __EECON1bits_t; 846 847 extern __at(0x009C) volatile __EECON1bits_t EECON1bits; 848 849 #define _RD 0x01 850 #define _WR 0x02 851 #define _WREN 0x04 852 #define _WRERR 0x08 853 854 //============================================================================== 855 856 extern __at(0x009D) __sfr EECON2; 857 extern __at(0x009E) __sfr ADRESL; 858 859 //============================================================================== 860 // ANSEL Bits 861 862 extern __at(0x009F) __sfr ANSEL; 863 864 typedef union 865 { 866 struct 867 { 868 unsigned ANS0 : 1; 869 unsigned ANS1 : 1; 870 unsigned ANS2 : 1; 871 unsigned ANS3 : 1; 872 unsigned ADCS0 : 1; 873 unsigned ADCS1 : 1; 874 unsigned ADCS2 : 1; 875 unsigned : 1; 876 }; 877 878 struct 879 { 880 unsigned ANS : 4; 881 unsigned : 4; 882 }; 883 884 struct 885 { 886 unsigned : 4; 887 unsigned ADCS : 3; 888 unsigned : 1; 889 }; 890 } __ANSELbits_t; 891 892 extern __at(0x009F) volatile __ANSELbits_t ANSELbits; 893 894 #define _ANS0 0x01 895 #define _ANS1 0x02 896 #define _ANS2 0x04 897 #define _ANS3 0x08 898 #define _ADCS0 0x10 899 #define _ADCS1 0x20 900 #define _ADCS2 0x40 901 902 //============================================================================== 903 904 905 //============================================================================== 906 // 907 // Configuration Bits 908 // 909 //============================================================================== 910 911 #define _CONFIG 0x2007 912 913 //----------------------------- CONFIG Options ------------------------------- 914 915 #define _FOSC_LP 0x3FF8 // LP oscillator: Low power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN. 916 #define _LP_OSC 0x3FF8 // LP oscillator: Low power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN. 917 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN. 918 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN. 919 #define _FOSC_HS 0x3FFA // HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN. 920 #define _HS_OSC 0x3FFA // HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN. 921 #define _FOSC_EC 0x3FFB // EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN. 922 #define _EC_OSC 0x3FFB // EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN. 923 #define _FOSC_INTRCIO 0x3FFC // INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN. 924 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN. 925 #define _FOSC_INTRCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN. 926 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN. 927 #define _FOSC_EXTRCIO 0x3FFE // RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN. 928 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN. 929 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN. 930 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN. 931 #define _WDTE_OFF 0x3FF7 // WDT disabled. 932 #define _WDT_OFF 0x3FF7 // WDT disabled. 933 #define _WDTE_ON 0x3FFF // WDT enabled. 934 #define _WDT_ON 0x3FFF // WDT enabled. 935 #define _PWRTE_ON 0x3FEF // PWRT enabled. 936 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 937 #define _MCLRE_OFF 0x3FDF // GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD. 938 #define _MCLRE_ON 0x3FFF // GP3/MCLR pin function is MCLR. 939 #define _BOREN_OFF 0x3FBF // BOD disabled. 940 #define _BODEN_OFF 0x3FBF // BOD disabled. 941 #define _BOREN_ON 0x3FFF // BOD enabled. 942 #define _BODEN_ON 0x3FFF // BOD enabled. 943 #define _CP_ON 0x3F7F // Program Memory code protection is enabled. 944 #define _CP_OFF 0x3FFF // Program Memory code protection is disabled. 945 #define _CPD_ON 0x3EFF // Data memory code protection is enabled. 946 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled. 947 948 //============================================================================== 949 950 #define _DEVID1 0x2006 951 952 #define _IDLOC0 0x2000 953 #define _IDLOC1 0x2001 954 #define _IDLOC2 0x2002 955 #define _IDLOC3 0x2003 956 957 //============================================================================== 958 959 #ifndef NO_BIT_DEFINES 960 961 #define ADON ADCON0bits.ADON // bit 0 962 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits 963 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits 964 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits 965 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits 966 #define CHS0 ADCON0bits.CHS0 // bit 2 967 #define CHS1 ADCON0bits.CHS1 // bit 3 968 #define VCFG ADCON0bits.VCFG // bit 6 969 #define ADFM ADCON0bits.ADFM // bit 7 970 971 #define ANS0 ANSELbits.ANS0 // bit 0 972 #define ANS1 ANSELbits.ANS1 // bit 1 973 #define ANS2 ANSELbits.ANS2 // bit 2 974 #define ANS3 ANSELbits.ANS3 // bit 3 975 #define ADCS0 ANSELbits.ADCS0 // bit 4 976 #define ADCS1 ANSELbits.ADCS1 // bit 5 977 #define ADCS2 ANSELbits.ADCS2 // bit 6 978 979 #define CM0 CMCONbits.CM0 // bit 0 980 #define CM1 CMCONbits.CM1 // bit 1 981 #define CM2 CMCONbits.CM2 // bit 2 982 #define CIS CMCONbits.CIS // bit 3 983 #define CINV CMCONbits.CINV // bit 4 984 #define COUT CMCONbits.COUT // bit 6 985 986 #define RD EECON1bits.RD // bit 0 987 #define WR EECON1bits.WR // bit 1 988 #define WREN EECON1bits.WREN // bit 2 989 #define WRERR EECON1bits.WRERR // bit 3 990 991 #define GP0 GPIObits.GP0 // bit 0, shadows bit in GPIObits 992 #define GPIO0 GPIObits.GPIO0 // bit 0, shadows bit in GPIObits 993 #define GP1 GPIObits.GP1 // bit 1, shadows bit in GPIObits 994 #define GPIO1 GPIObits.GPIO1 // bit 1, shadows bit in GPIObits 995 #define GP2 GPIObits.GP2 // bit 2, shadows bit in GPIObits 996 #define GPIO2 GPIObits.GPIO2 // bit 2, shadows bit in GPIObits 997 #define GP3 GPIObits.GP3 // bit 3, shadows bit in GPIObits 998 #define GPIO3 GPIObits.GPIO3 // bit 3, shadows bit in GPIObits 999 #define GP4 GPIObits.GP4 // bit 4, shadows bit in GPIObits 1000 #define GPIO4 GPIObits.GPIO4 // bit 4, shadows bit in GPIObits 1001 #define GP5 GPIObits.GP5 // bit 5, shadows bit in GPIObits 1002 #define GPIO5 GPIObits.GPIO5 // bit 5, shadows bit in GPIObits 1003 1004 #define GPIF INTCONbits.GPIF // bit 0 1005 #define INTF INTCONbits.INTF // bit 1 1006 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits 1007 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits 1008 #define GPIE INTCONbits.GPIE // bit 3 1009 #define INTE INTCONbits.INTE // bit 4 1010 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits 1011 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits 1012 #define PEIE INTCONbits.PEIE // bit 6 1013 #define GIE INTCONbits.GIE // bit 7 1014 1015 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits 1016 #define IOCB0 IOCbits.IOCB0 // bit 0, shadows bit in IOCbits 1017 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits 1018 #define IOCB1 IOCbits.IOCB1 // bit 1, shadows bit in IOCbits 1019 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits 1020 #define IOCB2 IOCbits.IOCB2 // bit 2, shadows bit in IOCbits 1021 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits 1022 #define IOCB3 IOCbits.IOCB3 // bit 3, shadows bit in IOCbits 1023 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits 1024 #define IOCB4 IOCbits.IOCB4 // bit 4, shadows bit in IOCbits 1025 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits 1026 #define IOCB5 IOCbits.IOCB5 // bit 5, shadows bit in IOCbits 1027 1028 #define PS0 OPTION_REGbits.PS0 // bit 0 1029 #define PS1 OPTION_REGbits.PS1 // bit 1 1030 #define PS2 OPTION_REGbits.PS2 // bit 2 1031 #define PSA OPTION_REGbits.PSA // bit 3 1032 #define T0SE OPTION_REGbits.T0SE // bit 4 1033 #define T0CS OPTION_REGbits.T0CS // bit 5 1034 #define INTEDG OPTION_REGbits.INTEDG // bit 6 1035 #define NOT_GPPU OPTION_REGbits.NOT_GPPU // bit 7 1036 1037 #define CAL0 OSCCALbits.CAL0 // bit 2 1038 #define CAL1 OSCCALbits.CAL1 // bit 3 1039 #define CAL2 OSCCALbits.CAL2 // bit 4 1040 #define CAL3 OSCCALbits.CAL3 // bit 5 1041 #define CAL4 OSCCALbits.CAL4 // bit 6 1042 #define CAL5 OSCCALbits.CAL5 // bit 7 1043 1044 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits 1045 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits 1046 #define NOT_POR PCONbits.NOT_POR // bit 1 1047 1048 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits 1049 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits 1050 #define CMIE PIE1bits.CMIE // bit 3 1051 #define ADIE PIE1bits.ADIE // bit 6 1052 #define EEIE PIE1bits.EEIE // bit 7 1053 1054 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits 1055 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits 1056 #define CMIF PIR1bits.CMIF // bit 3 1057 #define ADIF PIR1bits.ADIF // bit 6 1058 #define EEIF PIR1bits.EEIF // bit 7 1059 1060 #define C STATUSbits.C // bit 0 1061 #define DC STATUSbits.DC // bit 1 1062 #define Z STATUSbits.Z // bit 2 1063 #define NOT_PD STATUSbits.NOT_PD // bit 3 1064 #define NOT_TO STATUSbits.NOT_TO // bit 4 1065 #define RP0 STATUSbits.RP0 // bit 5 1066 #define RP1 STATUSbits.RP1 // bit 6 1067 #define IRP STATUSbits.IRP // bit 7 1068 1069 #define TMR1ON T1CONbits.TMR1ON // bit 0 1070 #define TMR1CS T1CONbits.TMR1CS // bit 1 1071 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2 1072 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 1073 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 1074 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 1075 #define TMR1GE T1CONbits.TMR1GE // bit 6 1076 1077 #define TRISIO0 TRISIObits.TRISIO0 // bit 0 1078 #define TRISIO1 TRISIObits.TRISIO1 // bit 1 1079 #define TRISIO2 TRISIObits.TRISIO2 // bit 2 1080 #define TRISIO3 TRISIObits.TRISIO3 // bit 3 1081 #define TRISIO4 TRISIObits.TRISIO4 // bit 4 1082 #define TRISIO5 TRISIObits.TRISIO5 // bit 5 1083 1084 #define VR0 VRCONbits.VR0 // bit 0 1085 #define VR1 VRCONbits.VR1 // bit 1 1086 #define VR2 VRCONbits.VR2 // bit 2 1087 #define VR3 VRCONbits.VR3 // bit 3 1088 #define VRR VRCONbits.VRR // bit 5 1089 #define VREN VRCONbits.VREN // bit 7 1090 1091 #define WPU0 WPUbits.WPU0 // bit 0 1092 #define WPU1 WPUbits.WPU1 // bit 1 1093 #define WPU2 WPUbits.WPU2 // bit 2 1094 #define WPU4 WPUbits.WPU4 // bit 4 1095 #define WPU5 WPUbits.WPU5 // bit 5 1096 1097 #endif // #ifndef NO_BIT_DEFINES 1098 1099 #endif // #ifndef __PIC12F675_H__ 1100