1 /* 2 * This declarations of the PIC16C620A MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:02 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC16C620A_H__ 26 #define __PIC16C620A_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF_ADDR 0x0000 37 #define TMR0_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR_ADDR 0x0004 41 #define PORTA_ADDR 0x0005 42 #define PORTB_ADDR 0x0006 43 #define PCLATH_ADDR 0x000A 44 #define INTCON_ADDR 0x000B 45 #define PIR1_ADDR 0x000C 46 #define CMCON_ADDR 0x001F 47 #define OPTION_REG_ADDR 0x0081 48 #define TRISA_ADDR 0x0085 49 #define TRISB_ADDR 0x0086 50 #define PIE1_ADDR 0x008C 51 #define PCON_ADDR 0x008E 52 #define VRCON_ADDR 0x009F 53 54 #endif // #ifndef NO_ADDR_DEFINES 55 56 //============================================================================== 57 // 58 // Register Definitions 59 // 60 //============================================================================== 61 62 extern __at(0x0000) __sfr INDF; 63 extern __at(0x0001) __sfr TMR0; 64 extern __at(0x0002) __sfr PCL; 65 66 //============================================================================== 67 // STATUS Bits 68 69 extern __at(0x0003) __sfr STATUS; 70 71 typedef union 72 { 73 struct 74 { 75 unsigned C : 1; 76 unsigned DC : 1; 77 unsigned Z : 1; 78 unsigned NOT_PD : 1; 79 unsigned NOT_TO : 1; 80 unsigned RP0 : 1; 81 unsigned RP1 : 1; 82 unsigned IRP : 1; 83 }; 84 85 struct 86 { 87 unsigned : 5; 88 unsigned RP : 2; 89 unsigned : 1; 90 }; 91 } __STATUSbits_t; 92 93 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 94 95 #define _C 0x01 96 #define _DC 0x02 97 #define _Z 0x04 98 #define _NOT_PD 0x08 99 #define _NOT_TO 0x10 100 #define _RP0 0x20 101 #define _RP1 0x40 102 #define _IRP 0x80 103 104 //============================================================================== 105 106 extern __at(0x0004) __sfr FSR; 107 108 //============================================================================== 109 // PORTA Bits 110 111 extern __at(0x0005) __sfr PORTA; 112 113 typedef union 114 { 115 struct 116 { 117 unsigned RA0 : 1; 118 unsigned RA1 : 1; 119 unsigned RA2 : 1; 120 unsigned RA3 : 1; 121 unsigned RA4 : 1; 122 unsigned : 1; 123 unsigned : 1; 124 unsigned : 1; 125 }; 126 127 struct 128 { 129 unsigned RA : 5; 130 unsigned : 3; 131 }; 132 } __PORTAbits_t; 133 134 extern __at(0x0005) volatile __PORTAbits_t PORTAbits; 135 136 #define _RA0 0x01 137 #define _RA1 0x02 138 #define _RA2 0x04 139 #define _RA3 0x08 140 #define _RA4 0x10 141 142 //============================================================================== 143 144 145 //============================================================================== 146 // PORTB Bits 147 148 extern __at(0x0006) __sfr PORTB; 149 150 typedef struct 151 { 152 unsigned RB0 : 1; 153 unsigned RB1 : 1; 154 unsigned RB2 : 1; 155 unsigned RB3 : 1; 156 unsigned RB4 : 1; 157 unsigned RB5 : 1; 158 unsigned RB6 : 1; 159 unsigned RB7 : 1; 160 } __PORTBbits_t; 161 162 extern __at(0x0006) volatile __PORTBbits_t PORTBbits; 163 164 #define _RB0 0x01 165 #define _RB1 0x02 166 #define _RB2 0x04 167 #define _RB3 0x08 168 #define _RB4 0x10 169 #define _RB5 0x20 170 #define _RB6 0x40 171 #define _RB7 0x80 172 173 //============================================================================== 174 175 extern __at(0x000A) __sfr PCLATH; 176 177 //============================================================================== 178 // INTCON Bits 179 180 extern __at(0x000B) __sfr INTCON; 181 182 typedef union 183 { 184 struct 185 { 186 unsigned RBIF : 1; 187 unsigned INTF : 1; 188 unsigned T0IF : 1; 189 unsigned RBIE : 1; 190 unsigned INTE : 1; 191 unsigned T0IE : 1; 192 unsigned PEIE : 1; 193 unsigned GIE : 1; 194 }; 195 196 struct 197 { 198 unsigned : 1; 199 unsigned : 1; 200 unsigned TMR0IF : 1; 201 unsigned : 1; 202 unsigned : 1; 203 unsigned TMR0IE : 1; 204 unsigned : 1; 205 unsigned : 1; 206 }; 207 } __INTCONbits_t; 208 209 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 210 211 #define _RBIF 0x01 212 #define _INTF 0x02 213 #define _T0IF 0x04 214 #define _TMR0IF 0x04 215 #define _RBIE 0x08 216 #define _INTE 0x10 217 #define _T0IE 0x20 218 #define _TMR0IE 0x20 219 #define _PEIE 0x40 220 #define _GIE 0x80 221 222 //============================================================================== 223 224 225 //============================================================================== 226 // PIR1 Bits 227 228 extern __at(0x000C) __sfr PIR1; 229 230 typedef struct 231 { 232 unsigned : 1; 233 unsigned : 1; 234 unsigned : 1; 235 unsigned : 1; 236 unsigned : 1; 237 unsigned : 1; 238 unsigned CMIF : 1; 239 unsigned : 1; 240 } __PIR1bits_t; 241 242 extern __at(0x000C) volatile __PIR1bits_t PIR1bits; 243 244 #define _CMIF 0x40 245 246 //============================================================================== 247 248 249 //============================================================================== 250 // CMCON Bits 251 252 extern __at(0x001F) __sfr CMCON; 253 254 typedef union 255 { 256 struct 257 { 258 unsigned CM0 : 1; 259 unsigned CM1 : 1; 260 unsigned CM2 : 1; 261 unsigned CIS : 1; 262 unsigned : 1; 263 unsigned : 1; 264 unsigned C1OUT : 1; 265 unsigned C2OUT : 1; 266 }; 267 268 struct 269 { 270 unsigned CM : 3; 271 unsigned : 5; 272 }; 273 } __CMCONbits_t; 274 275 extern __at(0x001F) volatile __CMCONbits_t CMCONbits; 276 277 #define _CM0 0x01 278 #define _CM1 0x02 279 #define _CM2 0x04 280 #define _CIS 0x08 281 #define _C1OUT 0x40 282 #define _C2OUT 0x80 283 284 //============================================================================== 285 286 287 //============================================================================== 288 // OPTION_REG Bits 289 290 extern __at(0x0081) __sfr OPTION_REG; 291 292 typedef union 293 { 294 struct 295 { 296 unsigned PS0 : 1; 297 unsigned PS1 : 1; 298 unsigned PS2 : 1; 299 unsigned PSA : 1; 300 unsigned T0SE : 1; 301 unsigned T0CS : 1; 302 unsigned INTEDG : 1; 303 unsigned NOT_RBPU : 1; 304 }; 305 306 struct 307 { 308 unsigned PS : 3; 309 unsigned : 5; 310 }; 311 } __OPTION_REGbits_t; 312 313 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits; 314 315 #define _PS0 0x01 316 #define _PS1 0x02 317 #define _PS2 0x04 318 #define _PSA 0x08 319 #define _T0SE 0x10 320 #define _T0CS 0x20 321 #define _INTEDG 0x40 322 #define _NOT_RBPU 0x80 323 324 //============================================================================== 325 326 327 //============================================================================== 328 // TRISA Bits 329 330 extern __at(0x0085) __sfr TRISA; 331 332 typedef union 333 { 334 struct 335 { 336 unsigned TRISA0 : 1; 337 unsigned TRISA1 : 1; 338 unsigned TRISA2 : 1; 339 unsigned TRISA3 : 1; 340 unsigned TRISA4 : 1; 341 unsigned : 1; 342 unsigned : 1; 343 unsigned : 1; 344 }; 345 346 struct 347 { 348 unsigned TRISA : 5; 349 unsigned : 3; 350 }; 351 } __TRISAbits_t; 352 353 extern __at(0x0085) volatile __TRISAbits_t TRISAbits; 354 355 #define _TRISA0 0x01 356 #define _TRISA1 0x02 357 #define _TRISA2 0x04 358 #define _TRISA3 0x08 359 #define _TRISA4 0x10 360 361 //============================================================================== 362 363 364 //============================================================================== 365 // TRISB Bits 366 367 extern __at(0x0086) __sfr TRISB; 368 369 typedef struct 370 { 371 unsigned TRISB0 : 1; 372 unsigned TRISB1 : 1; 373 unsigned TRISB2 : 1; 374 unsigned TRISB3 : 1; 375 unsigned TRISB4 : 1; 376 unsigned TRISB5 : 1; 377 unsigned TRISB6 : 1; 378 unsigned TRISB7 : 1; 379 } __TRISBbits_t; 380 381 extern __at(0x0086) volatile __TRISBbits_t TRISBbits; 382 383 #define _TRISB0 0x01 384 #define _TRISB1 0x02 385 #define _TRISB2 0x04 386 #define _TRISB3 0x08 387 #define _TRISB4 0x10 388 #define _TRISB5 0x20 389 #define _TRISB6 0x40 390 #define _TRISB7 0x80 391 392 //============================================================================== 393 394 395 //============================================================================== 396 // PIE1 Bits 397 398 extern __at(0x008C) __sfr PIE1; 399 400 typedef struct 401 { 402 unsigned : 1; 403 unsigned : 1; 404 unsigned : 1; 405 unsigned : 1; 406 unsigned : 1; 407 unsigned : 1; 408 unsigned CMIE : 1; 409 unsigned : 1; 410 } __PIE1bits_t; 411 412 extern __at(0x008C) volatile __PIE1bits_t PIE1bits; 413 414 #define _CMIE 0x40 415 416 //============================================================================== 417 418 419 //============================================================================== 420 // PCON Bits 421 422 extern __at(0x008E) __sfr PCON; 423 424 typedef union 425 { 426 struct 427 { 428 unsigned NOT_BOR : 1; 429 unsigned NOT_POR : 1; 430 unsigned : 1; 431 unsigned : 1; 432 unsigned : 1; 433 unsigned : 1; 434 unsigned : 1; 435 unsigned : 1; 436 }; 437 438 struct 439 { 440 unsigned NOT_BO : 1; 441 unsigned : 1; 442 unsigned : 1; 443 unsigned : 1; 444 unsigned : 1; 445 unsigned : 1; 446 unsigned : 1; 447 unsigned : 1; 448 }; 449 } __PCONbits_t; 450 451 extern __at(0x008E) volatile __PCONbits_t PCONbits; 452 453 #define _NOT_BOR 0x01 454 #define _NOT_BO 0x01 455 #define _NOT_POR 0x02 456 457 //============================================================================== 458 459 460 //============================================================================== 461 // VRCON Bits 462 463 extern __at(0x009F) __sfr VRCON; 464 465 typedef union 466 { 467 struct 468 { 469 unsigned VR0 : 1; 470 unsigned VR1 : 1; 471 unsigned VR2 : 1; 472 unsigned VR3 : 1; 473 unsigned : 1; 474 unsigned VRR : 1; 475 unsigned VROE : 1; 476 unsigned VREN : 1; 477 }; 478 479 struct 480 { 481 unsigned VR : 4; 482 unsigned : 4; 483 }; 484 } __VRCONbits_t; 485 486 extern __at(0x009F) volatile __VRCONbits_t VRCONbits; 487 488 #define _VR0 0x01 489 #define _VR1 0x02 490 #define _VR2 0x04 491 #define _VR3 0x08 492 #define _VRR 0x20 493 #define _VROE 0x40 494 #define _VREN 0x80 495 496 //============================================================================== 497 498 499 //============================================================================== 500 // 501 // Configuration Bits 502 // 503 //============================================================================== 504 505 #define _CONFIG1 0x2007 506 507 //----------------------------- CONFIG1 Options ------------------------------- 508 509 #define _FOSC_LP 0x3FFC // LP oscillator. 510 #define _LP_OSC 0x3FFC // LP oscillator. 511 #define _FOSC_XT 0x3FFD // XT oscillator. 512 #define _XT_OSC 0x3FFD // XT oscillator. 513 #define _FOSC_HS 0x3FFE // HS oscillator. 514 #define _HS_OSC 0x3FFE // HS oscillator. 515 #define _FOSC_RC 0x3FFF // RC oscillator. 516 #define _RC_OSC 0x3FFF // RC oscillator. 517 #define _WDTE_OFF 0x3FFB // WDT disabled. 518 #define _WDT_OFF 0x3FFB // WDT disabled. 519 #define _WDTE_ON 0x3FFF // WDT enabled. 520 #define _WDT_ON 0x3FFF // WDT enabled. 521 #define _PWRTE_ON 0x3FF7 // PWRT enabled. 522 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 523 #define _CP_ON 0x00CF // Code protection on. 524 #define _CP_OFF 0x3FFF // Code protection off. 525 #define _BOREN_OFF 0x3FBF // BOR disabled. 526 #define _BODEN_OFF 0x3FBF // BOR disabled. 527 #define _BOREN_ON 0x3FFF // BOR enabled. 528 #define _BODEN_ON 0x3FFF // BOR enabled. 529 530 //============================================================================== 531 532 #define _IDLOC0 0x2000 533 #define _IDLOC1 0x2001 534 #define _IDLOC2 0x2002 535 #define _IDLOC3 0x2003 536 537 //============================================================================== 538 539 #ifndef NO_BIT_DEFINES 540 541 #define CM0 CMCONbits.CM0 // bit 0 542 #define CM1 CMCONbits.CM1 // bit 1 543 #define CM2 CMCONbits.CM2 // bit 2 544 #define CIS CMCONbits.CIS // bit 3 545 #define C1OUT CMCONbits.C1OUT // bit 6 546 #define C2OUT CMCONbits.C2OUT // bit 7 547 548 #define RBIF INTCONbits.RBIF // bit 0 549 #define INTF INTCONbits.INTF // bit 1 550 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits 551 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits 552 #define RBIE INTCONbits.RBIE // bit 3 553 #define INTE INTCONbits.INTE // bit 4 554 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits 555 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits 556 #define PEIE INTCONbits.PEIE // bit 6 557 #define GIE INTCONbits.GIE // bit 7 558 559 #define PS0 OPTION_REGbits.PS0 // bit 0 560 #define PS1 OPTION_REGbits.PS1 // bit 1 561 #define PS2 OPTION_REGbits.PS2 // bit 2 562 #define PSA OPTION_REGbits.PSA // bit 3 563 #define T0SE OPTION_REGbits.T0SE // bit 4 564 #define T0CS OPTION_REGbits.T0CS // bit 5 565 #define INTEDG OPTION_REGbits.INTEDG // bit 6 566 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7 567 568 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits 569 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits 570 #define NOT_POR PCONbits.NOT_POR // bit 1 571 572 #define CMIE PIE1bits.CMIE // bit 6 573 574 #define CMIF PIR1bits.CMIF // bit 6 575 576 #define RA0 PORTAbits.RA0 // bit 0 577 #define RA1 PORTAbits.RA1 // bit 1 578 #define RA2 PORTAbits.RA2 // bit 2 579 #define RA3 PORTAbits.RA3 // bit 3 580 #define RA4 PORTAbits.RA4 // bit 4 581 582 #define RB0 PORTBbits.RB0 // bit 0 583 #define RB1 PORTBbits.RB1 // bit 1 584 #define RB2 PORTBbits.RB2 // bit 2 585 #define RB3 PORTBbits.RB3 // bit 3 586 #define RB4 PORTBbits.RB4 // bit 4 587 #define RB5 PORTBbits.RB5 // bit 5 588 #define RB6 PORTBbits.RB6 // bit 6 589 #define RB7 PORTBbits.RB7 // bit 7 590 591 #define C STATUSbits.C // bit 0 592 #define DC STATUSbits.DC // bit 1 593 #define Z STATUSbits.Z // bit 2 594 #define NOT_PD STATUSbits.NOT_PD // bit 3 595 #define NOT_TO STATUSbits.NOT_TO // bit 4 596 #define RP0 STATUSbits.RP0 // bit 5 597 #define RP1 STATUSbits.RP1 // bit 6 598 #define IRP STATUSbits.IRP // bit 7 599 600 #define TRISA0 TRISAbits.TRISA0 // bit 0 601 #define TRISA1 TRISAbits.TRISA1 // bit 1 602 #define TRISA2 TRISAbits.TRISA2 // bit 2 603 #define TRISA3 TRISAbits.TRISA3 // bit 3 604 #define TRISA4 TRISAbits.TRISA4 // bit 4 605 606 #define TRISB0 TRISBbits.TRISB0 // bit 0 607 #define TRISB1 TRISBbits.TRISB1 // bit 1 608 #define TRISB2 TRISBbits.TRISB2 // bit 2 609 #define TRISB3 TRISBbits.TRISB3 // bit 3 610 #define TRISB4 TRISBbits.TRISB4 // bit 4 611 #define TRISB5 TRISBbits.TRISB5 // bit 5 612 #define TRISB6 TRISBbits.TRISB6 // bit 6 613 #define TRISB7 TRISBbits.TRISB7 // bit 7 614 615 #define VR0 VRCONbits.VR0 // bit 0 616 #define VR1 VRCONbits.VR1 // bit 1 617 #define VR2 VRCONbits.VR2 // bit 2 618 #define VR3 VRCONbits.VR3 // bit 3 619 #define VRR VRCONbits.VRR // bit 5 620 #define VROE VRCONbits.VROE // bit 6 621 #define VREN VRCONbits.VREN // bit 7 622 623 #endif // #ifndef NO_BIT_DEFINES 624 625 #endif // #ifndef __PIC16C620A_H__ 626