1 /*
2  * This declarations of the PIC16C71 MCU.
3  *
4  * This file is part of the GNU PIC library for SDCC, originally
5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6  *
7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:03 UTC.
8  *
9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10  * this license covers the code to the compiler and other executables,
11  * but explicitly does not cover any code or objects generated by sdcc.
12  *
13  * For pic device libraries and header files which are derived from
14  * Microchip header (.inc) and linker script (.lkr) files Microchip
15  * requires that "The header files should state that they are only to be
16  * used with authentic Microchip devices" which makes them incompatible
17  * with the GPL. Pic device libraries and header files are located at
18  * non-free/lib and non-free/include directories respectively.
19  * Sdcc should be run with the --use-non-free command line option in
20  * order to include non-free header files and libraries.
21  *
22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23  */
24 
25 #ifndef __PIC16C71_H__
26 #define __PIC16C71_H__
27 
28 //==============================================================================
29 //
30 //	Register Addresses
31 //
32 //==============================================================================
33 
34 #ifndef NO_ADDR_DEFINES
35 
36 #define INDF_ADDR               0x0000
37 #define TMR0_ADDR               0x0001
38 #define PCL_ADDR                0x0002
39 #define STATUS_ADDR             0x0003
40 #define FSR_ADDR                0x0004
41 #define PORTA_ADDR              0x0005
42 #define PORTB_ADDR              0x0006
43 #define ADCON0_ADDR             0x0008
44 #define ADRES_ADDR              0x0009
45 #define PCLATH_ADDR             0x000A
46 #define INTCON_ADDR             0x000B
47 #define OPTION_REG_ADDR         0x0081
48 #define TRISA_ADDR              0x0085
49 #define TRISB_ADDR              0x0086
50 #define ADCON1_ADDR             0x0088
51 
52 #endif // #ifndef NO_ADDR_DEFINES
53 
54 //==============================================================================
55 //
56 //	Register Definitions
57 //
58 //==============================================================================
59 
60 extern __at(0x0000) __sfr INDF;
61 extern __at(0x0001) __sfr TMR0;
62 extern __at(0x0002) __sfr PCL;
63 
64 //==============================================================================
65 //        STATUS Bits
66 
67 extern __at(0x0003) __sfr STATUS;
68 
69 typedef union
70   {
71   struct
72     {
73     unsigned C                  : 1;
74     unsigned DC                 : 1;
75     unsigned Z                  : 1;
76     unsigned NOT_PD             : 1;
77     unsigned NOT_TO             : 1;
78     unsigned RP0                : 1;
79     unsigned RP1                : 1;
80     unsigned IRP                : 1;
81     };
82 
83   struct
84     {
85     unsigned                    : 5;
86     unsigned RP                 : 2;
87     unsigned                    : 1;
88     };
89   } __STATUSbits_t;
90 
91 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
92 
93 #define _C                      0x01
94 #define _DC                     0x02
95 #define _Z                      0x04
96 #define _NOT_PD                 0x08
97 #define _NOT_TO                 0x10
98 #define _RP0                    0x20
99 #define _RP1                    0x40
100 #define _IRP                    0x80
101 
102 //==============================================================================
103 
104 extern __at(0x0004) __sfr FSR;
105 
106 //==============================================================================
107 //        PORTA Bits
108 
109 extern __at(0x0005) __sfr PORTA;
110 
111 typedef union
112   {
113   struct
114     {
115     unsigned RA0                : 1;
116     unsigned RA1                : 1;
117     unsigned RA2                : 1;
118     unsigned RA3                : 1;
119     unsigned RA4                : 1;
120     unsigned                    : 1;
121     unsigned                    : 1;
122     unsigned                    : 1;
123     };
124 
125   struct
126     {
127     unsigned RA                 : 5;
128     unsigned                    : 3;
129     };
130   } __PORTAbits_t;
131 
132 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
133 
134 #define _RA0                    0x01
135 #define _RA1                    0x02
136 #define _RA2                    0x04
137 #define _RA3                    0x08
138 #define _RA4                    0x10
139 
140 //==============================================================================
141 
142 
143 //==============================================================================
144 //        PORTB Bits
145 
146 extern __at(0x0006) __sfr PORTB;
147 
148 typedef struct
149   {
150   unsigned RB0                  : 1;
151   unsigned RB1                  : 1;
152   unsigned RB2                  : 1;
153   unsigned RB3                  : 1;
154   unsigned RB4                  : 1;
155   unsigned RB5                  : 1;
156   unsigned RB6                  : 1;
157   unsigned RB7                  : 1;
158   } __PORTBbits_t;
159 
160 extern __at(0x0006) volatile __PORTBbits_t PORTBbits;
161 
162 #define _RB0                    0x01
163 #define _RB1                    0x02
164 #define _RB2                    0x04
165 #define _RB3                    0x08
166 #define _RB4                    0x10
167 #define _RB5                    0x20
168 #define _RB6                    0x40
169 #define _RB7                    0x80
170 
171 //==============================================================================
172 
173 
174 //==============================================================================
175 //        ADCON0 Bits
176 
177 extern __at(0x0008) __sfr ADCON0;
178 
179 typedef union
180   {
181   struct
182     {
183     unsigned ADON               : 1;
184     unsigned ADIF               : 1;
185     unsigned GO_NOT_DONE        : 1;
186     unsigned CHS0               : 1;
187     unsigned CHS1               : 1;
188     unsigned                    : 1;
189     unsigned ADCS0              : 1;
190     unsigned ADCS1              : 1;
191     };
192 
193   struct
194     {
195     unsigned                    : 1;
196     unsigned                    : 1;
197     unsigned GO                 : 1;
198     unsigned                    : 1;
199     unsigned                    : 1;
200     unsigned                    : 1;
201     unsigned                    : 1;
202     unsigned                    : 1;
203     };
204 
205   struct
206     {
207     unsigned                    : 1;
208     unsigned                    : 1;
209     unsigned NOT_DONE           : 1;
210     unsigned                    : 1;
211     unsigned                    : 1;
212     unsigned                    : 1;
213     unsigned                    : 1;
214     unsigned                    : 1;
215     };
216 
217   struct
218     {
219     unsigned                    : 1;
220     unsigned                    : 1;
221     unsigned GO_DONE            : 1;
222     unsigned                    : 1;
223     unsigned                    : 1;
224     unsigned                    : 1;
225     unsigned                    : 1;
226     unsigned                    : 1;
227     };
228 
229   struct
230     {
231     unsigned                    : 3;
232     unsigned CHS                : 2;
233     unsigned                    : 3;
234     };
235 
236   struct
237     {
238     unsigned                    : 6;
239     unsigned ADCS               : 2;
240     };
241   } __ADCON0bits_t;
242 
243 extern __at(0x0008) volatile __ADCON0bits_t ADCON0bits;
244 
245 #define _ADON                   0x01
246 #define _ADIF                   0x02
247 #define _GO_NOT_DONE            0x04
248 #define _GO                     0x04
249 #define _NOT_DONE               0x04
250 #define _GO_DONE                0x04
251 #define _CHS0                   0x08
252 #define _CHS1                   0x10
253 #define _ADCS0                  0x40
254 #define _ADCS1                  0x80
255 
256 //==============================================================================
257 
258 extern __at(0x0009) __sfr ADRES;
259 extern __at(0x000A) __sfr PCLATH;
260 
261 //==============================================================================
262 //        INTCON Bits
263 
264 extern __at(0x000B) __sfr INTCON;
265 
266 typedef struct
267   {
268   unsigned RBIF                 : 1;
269   unsigned INTF                 : 1;
270   unsigned T0IF                 : 1;
271   unsigned RBIE                 : 1;
272   unsigned INTE                 : 1;
273   unsigned T0IE                 : 1;
274   unsigned ADIE                 : 1;
275   unsigned GIE                  : 1;
276   } __INTCONbits_t;
277 
278 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
279 
280 #define _RBIF                   0x01
281 #define _INTF                   0x02
282 #define _T0IF                   0x04
283 #define _RBIE                   0x08
284 #define _INTE                   0x10
285 #define _T0IE                   0x20
286 #define _ADIE                   0x40
287 #define _GIE                    0x80
288 
289 //==============================================================================
290 
291 
292 //==============================================================================
293 //        OPTION_REG Bits
294 
295 extern __at(0x0081) __sfr OPTION_REG;
296 
297 typedef union
298   {
299   struct
300     {
301     unsigned PS0                : 1;
302     unsigned PS1                : 1;
303     unsigned PS2                : 1;
304     unsigned PSA                : 1;
305     unsigned T0SE               : 1;
306     unsigned T0CS               : 1;
307     unsigned INTEDG             : 1;
308     unsigned NOT_RBPU           : 1;
309     };
310 
311   struct
312     {
313     unsigned PS                 : 3;
314     unsigned                    : 5;
315     };
316   } __OPTION_REGbits_t;
317 
318 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
319 
320 #define _PS0                    0x01
321 #define _PS1                    0x02
322 #define _PS2                    0x04
323 #define _PSA                    0x08
324 #define _T0SE                   0x10
325 #define _T0CS                   0x20
326 #define _INTEDG                 0x40
327 #define _NOT_RBPU               0x80
328 
329 //==============================================================================
330 
331 
332 //==============================================================================
333 //        TRISA Bits
334 
335 extern __at(0x0085) __sfr TRISA;
336 
337 typedef union
338   {
339   struct
340     {
341     unsigned TRISA0             : 1;
342     unsigned TRISA1             : 1;
343     unsigned TRISA2             : 1;
344     unsigned TRISA3             : 1;
345     unsigned TRISA4             : 1;
346     unsigned                    : 1;
347     unsigned                    : 1;
348     unsigned                    : 1;
349     };
350 
351   struct
352     {
353     unsigned TRISA              : 5;
354     unsigned                    : 3;
355     };
356   } __TRISAbits_t;
357 
358 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
359 
360 #define _TRISA0                 0x01
361 #define _TRISA1                 0x02
362 #define _TRISA2                 0x04
363 #define _TRISA3                 0x08
364 #define _TRISA4                 0x10
365 
366 //==============================================================================
367 
368 
369 //==============================================================================
370 //        TRISB Bits
371 
372 extern __at(0x0086) __sfr TRISB;
373 
374 typedef struct
375   {
376   unsigned TRISB0               : 1;
377   unsigned TRISB1               : 1;
378   unsigned TRISB2               : 1;
379   unsigned TRISB3               : 1;
380   unsigned TRISB4               : 1;
381   unsigned TRISB5               : 1;
382   unsigned TRISB6               : 1;
383   unsigned TRISB7               : 1;
384   } __TRISBbits_t;
385 
386 extern __at(0x0086) volatile __TRISBbits_t TRISBbits;
387 
388 #define _TRISB0                 0x01
389 #define _TRISB1                 0x02
390 #define _TRISB2                 0x04
391 #define _TRISB3                 0x08
392 #define _TRISB4                 0x10
393 #define _TRISB5                 0x20
394 #define _TRISB6                 0x40
395 #define _TRISB7                 0x80
396 
397 //==============================================================================
398 
399 
400 //==============================================================================
401 //        ADCON1 Bits
402 
403 extern __at(0x0088) __sfr ADCON1;
404 
405 typedef union
406   {
407   struct
408     {
409     unsigned PCFG0              : 1;
410     unsigned PCFG1              : 1;
411     unsigned                    : 1;
412     unsigned                    : 1;
413     unsigned                    : 1;
414     unsigned                    : 1;
415     unsigned                    : 1;
416     unsigned                    : 1;
417     };
418 
419   struct
420     {
421     unsigned PCFG               : 2;
422     unsigned                    : 6;
423     };
424   } __ADCON1bits_t;
425 
426 extern __at(0x0088) volatile __ADCON1bits_t ADCON1bits;
427 
428 #define _PCFG0                  0x01
429 #define _PCFG1                  0x02
430 
431 //==============================================================================
432 
433 
434 //==============================================================================
435 //
436 //        Configuration Bits
437 //
438 //==============================================================================
439 
440 #define _CONFIG1                0x2007
441 
442 //----------------------------- CONFIG1 Options -------------------------------
443 
444 #define _FOSC_LP                0x3FFC  // LP oscillator.
445 #define _LP_OSC                 0x3FFC  // LP oscillator.
446 #define _FOSC_XT                0x3FFD  // XT oscillator.
447 #define _XT_OSC                 0x3FFD  // XT oscillator.
448 #define _FOSC_HS                0x3FFE  // HS oscillator.
449 #define _HS_OSC                 0x3FFE  // HS oscillator.
450 #define _FOSC_RC                0x3FFF  // RC oscillator.
451 #define _RC_OSC                 0x3FFF  // RC oscillator.
452 #define _WDTE_OFF               0x3FFB  // WDT disabled.
453 #define _WDT_OFF                0x3FFB  // WDT disabled.
454 #define _WDTE_ON                0x3FFF  // WDT enabled.
455 #define _WDT_ON                 0x3FFF  // WDT enabled.
456 #define _PWRTE_OFF              0x3FF7  // PWRT disabled.
457 #define _PWRTE_ON               0x3FFF  // PWRT enabled.
458 #define _CP_ON                  0x3FEF  // Code protection on.
459 #define _CP_OFF                 0x3FFF  // Code protection off.
460 
461 //==============================================================================
462 
463 #define _IDLOC0                 0x2000
464 #define _IDLOC1                 0x2001
465 #define _IDLOC2                 0x2002
466 #define _IDLOC3                 0x2003
467 
468 //==============================================================================
469 
470 #ifndef NO_BIT_DEFINES
471 
472 #define ADON                    ADCON0bits.ADON                 // bit 0
473 #define ADIF                    ADCON0bits.ADIF                 // bit 1
474 #define GO_NOT_DONE             ADCON0bits.GO_NOT_DONE          // bit 2, shadows bit in ADCON0bits
475 #define GO                      ADCON0bits.GO                   // bit 2, shadows bit in ADCON0bits
476 #define NOT_DONE                ADCON0bits.NOT_DONE             // bit 2, shadows bit in ADCON0bits
477 #define GO_DONE                 ADCON0bits.GO_DONE              // bit 2, shadows bit in ADCON0bits
478 #define CHS0                    ADCON0bits.CHS0                 // bit 3
479 #define CHS1                    ADCON0bits.CHS1                 // bit 4
480 #define ADCS0                   ADCON0bits.ADCS0                // bit 6
481 #define ADCS1                   ADCON0bits.ADCS1                // bit 7
482 
483 #define PCFG0                   ADCON1bits.PCFG0                // bit 0
484 #define PCFG1                   ADCON1bits.PCFG1                // bit 1
485 
486 #define RBIF                    INTCONbits.RBIF                 // bit 0
487 #define INTF                    INTCONbits.INTF                 // bit 1
488 #define T0IF                    INTCONbits.T0IF                 // bit 2
489 #define RBIE                    INTCONbits.RBIE                 // bit 3
490 #define INTE                    INTCONbits.INTE                 // bit 4
491 #define T0IE                    INTCONbits.T0IE                 // bit 5
492 #define ADIE                    INTCONbits.ADIE                 // bit 6
493 #define GIE                     INTCONbits.GIE                  // bit 7
494 
495 #define PS0                     OPTION_REGbits.PS0              // bit 0
496 #define PS1                     OPTION_REGbits.PS1              // bit 1
497 #define PS2                     OPTION_REGbits.PS2              // bit 2
498 #define PSA                     OPTION_REGbits.PSA              // bit 3
499 #define T0SE                    OPTION_REGbits.T0SE             // bit 4
500 #define T0CS                    OPTION_REGbits.T0CS             // bit 5
501 #define INTEDG                  OPTION_REGbits.INTEDG           // bit 6
502 #define NOT_RBPU                OPTION_REGbits.NOT_RBPU         // bit 7
503 
504 #define RA0                     PORTAbits.RA0                   // bit 0
505 #define RA1                     PORTAbits.RA1                   // bit 1
506 #define RA2                     PORTAbits.RA2                   // bit 2
507 #define RA3                     PORTAbits.RA3                   // bit 3
508 #define RA4                     PORTAbits.RA4                   // bit 4
509 
510 #define RB0                     PORTBbits.RB0                   // bit 0
511 #define RB1                     PORTBbits.RB1                   // bit 1
512 #define RB2                     PORTBbits.RB2                   // bit 2
513 #define RB3                     PORTBbits.RB3                   // bit 3
514 #define RB4                     PORTBbits.RB4                   // bit 4
515 #define RB5                     PORTBbits.RB5                   // bit 5
516 #define RB6                     PORTBbits.RB6                   // bit 6
517 #define RB7                     PORTBbits.RB7                   // bit 7
518 
519 #define C                       STATUSbits.C                    // bit 0
520 #define DC                      STATUSbits.DC                   // bit 1
521 #define Z                       STATUSbits.Z                    // bit 2
522 #define NOT_PD                  STATUSbits.NOT_PD               // bit 3
523 #define NOT_TO                  STATUSbits.NOT_TO               // bit 4
524 #define RP0                     STATUSbits.RP0                  // bit 5
525 #define RP1                     STATUSbits.RP1                  // bit 6
526 #define IRP                     STATUSbits.IRP                  // bit 7
527 
528 #define TRISA0                  TRISAbits.TRISA0                // bit 0
529 #define TRISA1                  TRISAbits.TRISA1                // bit 1
530 #define TRISA2                  TRISAbits.TRISA2                // bit 2
531 #define TRISA3                  TRISAbits.TRISA3                // bit 3
532 #define TRISA4                  TRISAbits.TRISA4                // bit 4
533 
534 #define TRISB0                  TRISBbits.TRISB0                // bit 0
535 #define TRISB1                  TRISBbits.TRISB1                // bit 1
536 #define TRISB2                  TRISBbits.TRISB2                // bit 2
537 #define TRISB3                  TRISBbits.TRISB3                // bit 3
538 #define TRISB4                  TRISBbits.TRISB4                // bit 4
539 #define TRISB5                  TRISBbits.TRISB5                // bit 5
540 #define TRISB6                  TRISBbits.TRISB6                // bit 6
541 #define TRISB7                  TRISBbits.TRISB7                // bit 7
542 
543 #endif // #ifndef NO_BIT_DEFINES
544 
545 #endif // #ifndef __PIC16C71_H__
546