1 /* 2 * This declarations of the PIC16LF1579 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:09 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC16LF1579_H__ 26 #define __PIC16LF1579_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF0_ADDR 0x0000 37 #define INDF1_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR0_ADDR 0x0004 41 #define FSR0L_ADDR 0x0004 42 #define FSR0H_ADDR 0x0005 43 #define FSR1_ADDR 0x0006 44 #define FSR1L_ADDR 0x0006 45 #define FSR1H_ADDR 0x0007 46 #define BSR_ADDR 0x0008 47 #define WREG_ADDR 0x0009 48 #define PCLATH_ADDR 0x000A 49 #define INTCON_ADDR 0x000B 50 #define PORTA_ADDR 0x000C 51 #define PORTB_ADDR 0x000D 52 #define PORTC_ADDR 0x000E 53 #define PIR1_ADDR 0x0011 54 #define PIR2_ADDR 0x0012 55 #define PIR3_ADDR 0x0013 56 #define TMR0_ADDR 0x0015 57 #define TMR1_ADDR 0x0016 58 #define TMR1L_ADDR 0x0016 59 #define TMR1H_ADDR 0x0017 60 #define T1CON_ADDR 0x0018 61 #define T1GCON_ADDR 0x0019 62 #define TMR2_ADDR 0x001A 63 #define PR2_ADDR 0x001B 64 #define T2CON_ADDR 0x001C 65 #define TRISA_ADDR 0x008C 66 #define TRISB_ADDR 0x008D 67 #define TRISC_ADDR 0x008E 68 #define PIE1_ADDR 0x0091 69 #define PIE2_ADDR 0x0092 70 #define PIE3_ADDR 0x0093 71 #define OPTION_REG_ADDR 0x0095 72 #define PCON_ADDR 0x0096 73 #define WDTCON_ADDR 0x0097 74 #define OSCTUNE_ADDR 0x0098 75 #define OSCCON_ADDR 0x0099 76 #define OSCSTAT_ADDR 0x009A 77 #define ADRES_ADDR 0x009B 78 #define ADRESL_ADDR 0x009B 79 #define ADRESH_ADDR 0x009C 80 #define ADCON0_ADDR 0x009D 81 #define ADCON1_ADDR 0x009E 82 #define ADCON2_ADDR 0x009F 83 #define LATA_ADDR 0x010C 84 #define LATB_ADDR 0x010D 85 #define LATC_ADDR 0x010E 86 #define CM1CON0_ADDR 0x0111 87 #define CM1CON1_ADDR 0x0112 88 #define CM2CON0_ADDR 0x0113 89 #define CM2CON1_ADDR 0x0114 90 #define CMOUT_ADDR 0x0115 91 #define BORCON_ADDR 0x0116 92 #define FVRCON_ADDR 0x0117 93 #define DACCON0_ADDR 0x0118 94 #define DACCON1_ADDR 0x0119 95 #define ANSELA_ADDR 0x018C 96 #define ANSELB_ADDR 0x018D 97 #define ANSELC_ADDR 0x018E 98 #define PMADR_ADDR 0x0191 99 #define PMADRL_ADDR 0x0191 100 #define PMADRH_ADDR 0x0192 101 #define PMDAT_ADDR 0x0193 102 #define PMDATL_ADDR 0x0193 103 #define PMDATH_ADDR 0x0194 104 #define PMCON1_ADDR 0x0195 105 #define PMCON2_ADDR 0x0196 106 #define RCREG_ADDR 0x0199 107 #define TXREG_ADDR 0x019A 108 #define SPBRG_ADDR 0x019B 109 #define SPBRGL_ADDR 0x019B 110 #define SPBRGH_ADDR 0x019C 111 #define RCSTA_ADDR 0x019D 112 #define TXSTA_ADDR 0x019E 113 #define BAUDCON_ADDR 0x019F 114 #define WPUA_ADDR 0x020C 115 #define WPUB_ADDR 0x020D 116 #define WPUC_ADDR 0x020E 117 #define ODCONA_ADDR 0x028C 118 #define ODCONB_ADDR 0x028D 119 #define ODCONC_ADDR 0x028E 120 #define SLRCONA_ADDR 0x030C 121 #define SLRCONB_ADDR 0x030D 122 #define SLRCONC_ADDR 0x030E 123 #define INLVLA_ADDR 0x038C 124 #define INLVLB_ADDR 0x038D 125 #define INLVLC_ADDR 0x038E 126 #define IOCAP_ADDR 0x0391 127 #define IOCAN_ADDR 0x0392 128 #define IOCAF_ADDR 0x0393 129 #define IOCBP_ADDR 0x0394 130 #define IOCBN_ADDR 0x0395 131 #define IOCBF_ADDR 0x0396 132 #define IOCCP_ADDR 0x0397 133 #define IOCCN_ADDR 0x0398 134 #define IOCCF_ADDR 0x0399 135 #define CWG1DBR_ADDR 0x0691 136 #define CWG1DBF_ADDR 0x0692 137 #define CWG1CON0_ADDR 0x0693 138 #define CWG1CON1_ADDR 0x0694 139 #define CWG1CON2_ADDR 0x0695 140 #define PWMEN_ADDR 0x0D8E 141 #define PWMLD_ADDR 0x0D8F 142 #define PWMOUT_ADDR 0x0D90 143 #define PWM1PH_ADDR 0x0D91 144 #define PWM1PHL_ADDR 0x0D91 145 #define PWM1PHH_ADDR 0x0D92 146 #define PWM1DC_ADDR 0x0D93 147 #define PWM1DCL_ADDR 0x0D93 148 #define PWM1DCH_ADDR 0x0D94 149 #define PWM1PR_ADDR 0x0D95 150 #define PWM1PRL_ADDR 0x0D95 151 #define PWM1PRH_ADDR 0x0D96 152 #define PWM1OF_ADDR 0x0D97 153 #define PWM1OFL_ADDR 0x0D97 154 #define PWM1OFH_ADDR 0x0D98 155 #define PWM1TMR_ADDR 0x0D99 156 #define PWM1TMRL_ADDR 0x0D99 157 #define PWM1TMRH_ADDR 0x0D9A 158 #define PWM1CON_ADDR 0x0D9B 159 #define PWM1INTCON_ADDR 0x0D9C 160 #define PWM1INTE_ADDR 0x0D9C 161 #define PWM1INTF_ADDR 0x0D9D 162 #define PWM1INTFLG_ADDR 0x0D9D 163 #define PWM1CLKCON_ADDR 0x0D9E 164 #define PWM1LDCON_ADDR 0x0D9F 165 #define PWM1OFCON_ADDR 0x0DA0 166 #define PWM2PH_ADDR 0x0DA1 167 #define PWM2PHL_ADDR 0x0DA1 168 #define PWM2PHH_ADDR 0x0DA2 169 #define PWM2DC_ADDR 0x0DA3 170 #define PWM2DCL_ADDR 0x0DA3 171 #define PWM2DCH_ADDR 0x0DA4 172 #define PWM2PR_ADDR 0x0DA5 173 #define PWM2PRL_ADDR 0x0DA5 174 #define PWM2PRH_ADDR 0x0DA6 175 #define PWM2OF_ADDR 0x0DA7 176 #define PWM2OFL_ADDR 0x0DA7 177 #define PWM2OFH_ADDR 0x0DA8 178 #define PWM2TMR_ADDR 0x0DA9 179 #define PWM2TMRL_ADDR 0x0DA9 180 #define PWM2TMRH_ADDR 0x0DAA 181 #define PWM2CON_ADDR 0x0DAB 182 #define PWM2INTCON_ADDR 0x0DAC 183 #define PWM2INTE_ADDR 0x0DAC 184 #define PWM2INTF_ADDR 0x0DAD 185 #define PWM2INTFLG_ADDR 0x0DAD 186 #define PWM2CLKCON_ADDR 0x0DAE 187 #define PWM2LDCON_ADDR 0x0DAF 188 #define PWM2OFCON_ADDR 0x0DB0 189 #define PWM3PH_ADDR 0x0DB1 190 #define PWM3PHL_ADDR 0x0DB1 191 #define PWM3PHH_ADDR 0x0DB2 192 #define PWM3DC_ADDR 0x0DB3 193 #define PWM3DCL_ADDR 0x0DB3 194 #define PWM3DCH_ADDR 0x0DB4 195 #define PWM3PR_ADDR 0x0DB5 196 #define PWM3PRL_ADDR 0x0DB5 197 #define PWM3PRH_ADDR 0x0DB6 198 #define PWM3OF_ADDR 0x0DB7 199 #define PWM3OFL_ADDR 0x0DB7 200 #define PWM3OFH_ADDR 0x0DB8 201 #define PWM3TMR_ADDR 0x0DB9 202 #define PWM3TMRL_ADDR 0x0DB9 203 #define PWM3TMRH_ADDR 0x0DBA 204 #define PWM3CON_ADDR 0x0DBB 205 #define PWM3INTCON_ADDR 0x0DBC 206 #define PWM3INTE_ADDR 0x0DBC 207 #define PWM3INTF_ADDR 0x0DBD 208 #define PWM3INTFLG_ADDR 0x0DBD 209 #define PWM3CLKCON_ADDR 0x0DBE 210 #define PWM3LDCON_ADDR 0x0DBF 211 #define PWM3OFCON_ADDR 0x0DC0 212 #define PWM4PH_ADDR 0x0DC1 213 #define PWM4PHL_ADDR 0x0DC1 214 #define PWM4PHH_ADDR 0x0DC2 215 #define PWM4DC_ADDR 0x0DC3 216 #define PWM4DCL_ADDR 0x0DC3 217 #define PWM4DCH_ADDR 0x0DC4 218 #define PWM4PR_ADDR 0x0DC5 219 #define PWM4PRL_ADDR 0x0DC5 220 #define PWM4PRH_ADDR 0x0DC6 221 #define PWM4OF_ADDR 0x0DC7 222 #define PWM4OFL_ADDR 0x0DC7 223 #define PWM4OFH_ADDR 0x0DC8 224 #define PWM4TMR_ADDR 0x0DC9 225 #define PWM4TMRL_ADDR 0x0DC9 226 #define PWM4TMRH_ADDR 0x0DCA 227 #define PWM4CON_ADDR 0x0DCB 228 #define PWM4INTCON_ADDR 0x0DCC 229 #define PWM4INTE_ADDR 0x0DCC 230 #define PWM4INTF_ADDR 0x0DCD 231 #define PWM4INTFLG_ADDR 0x0DCD 232 #define PWM4CLKCON_ADDR 0x0DCE 233 #define PWM4LDCON_ADDR 0x0DCF 234 #define PWM4OFCON_ADDR 0x0DD0 235 #define PPSLOCK_ADDR 0x0E0F 236 #define INTPPS_ADDR 0x0E10 237 #define T0CKIPPS_ADDR 0x0E11 238 #define T1CKIPPS_ADDR 0x0E12 239 #define T1GPPS_ADDR 0x0E13 240 #define CWG1INPPS_ADDR 0x0E14 241 #define RXPPS_ADDR 0x0E15 242 #define CKPPS_ADDR 0x0E16 243 #define ADCACTPPS_ADDR 0x0E17 244 #define RA0PPS_ADDR 0x0E90 245 #define RA1PPS_ADDR 0x0E91 246 #define RA2PPS_ADDR 0x0E92 247 #define RA4PPS_ADDR 0x0E94 248 #define RA5PPS_ADDR 0x0E95 249 #define RB4PPS_ADDR 0x0E9C 250 #define RB5PPS_ADDR 0x0E9D 251 #define RB6PPS_ADDR 0x0E9E 252 #define RB7PPS_ADDR 0x0E9F 253 #define RC0PPS_ADDR 0x0EA0 254 #define RC1PPS_ADDR 0x0EA1 255 #define RC2PPS_ADDR 0x0EA2 256 #define RC3PPS_ADDR 0x0EA3 257 #define RC4PPS_ADDR 0x0EA4 258 #define RC5PPS_ADDR 0x0EA5 259 #define RC6PPS_ADDR 0x0EA6 260 #define RC7PPS_ADDR 0x0EA7 261 #define STATUS_SHAD_ADDR 0x0FE4 262 #define WREG_SHAD_ADDR 0x0FE5 263 #define BSR_SHAD_ADDR 0x0FE6 264 #define PCLATH_SHAD_ADDR 0x0FE7 265 #define FSR0L_SHAD_ADDR 0x0FE8 266 #define FSR0_SHAD_ADDR 0x0FE8 267 #define FSR0H_SHAD_ADDR 0x0FE9 268 #define FSR1L_SHAD_ADDR 0x0FEA 269 #define FSR1_SHAD_ADDR 0x0FEA 270 #define FSR1H_SHAD_ADDR 0x0FEB 271 #define STKPTR_ADDR 0x0FED 272 #define TOS_ADDR 0x0FEE 273 #define TOSL_ADDR 0x0FEE 274 #define TOSH_ADDR 0x0FEF 275 276 #endif // #ifndef NO_ADDR_DEFINES 277 278 //============================================================================== 279 // 280 // Register Definitions 281 // 282 //============================================================================== 283 284 extern __at(0x0000) __sfr INDF0; 285 extern __at(0x0001) __sfr INDF1; 286 extern __at(0x0002) __sfr PCL; 287 288 //============================================================================== 289 // STATUS Bits 290 291 extern __at(0x0003) __sfr STATUS; 292 293 typedef struct 294 { 295 unsigned C : 1; 296 unsigned DC : 1; 297 unsigned Z : 1; 298 unsigned NOT_PD : 1; 299 unsigned NOT_TO : 1; 300 unsigned : 1; 301 unsigned : 1; 302 unsigned : 1; 303 } __STATUSbits_t; 304 305 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 306 307 #define _C 0x01 308 #define _DC 0x02 309 #define _Z 0x04 310 #define _NOT_PD 0x08 311 #define _NOT_TO 0x10 312 313 //============================================================================== 314 315 extern __at(0x0004) __sfr FSR0; 316 extern __at(0x0004) __sfr FSR0L; 317 extern __at(0x0005) __sfr FSR0H; 318 extern __at(0x0006) __sfr FSR1; 319 extern __at(0x0006) __sfr FSR1L; 320 extern __at(0x0007) __sfr FSR1H; 321 322 //============================================================================== 323 // BSR Bits 324 325 extern __at(0x0008) __sfr BSR; 326 327 typedef union 328 { 329 struct 330 { 331 unsigned BSR0 : 1; 332 unsigned BSR1 : 1; 333 unsigned BSR2 : 1; 334 unsigned BSR3 : 1; 335 unsigned BSR4 : 1; 336 unsigned : 1; 337 unsigned : 1; 338 unsigned : 1; 339 }; 340 341 struct 342 { 343 unsigned BSR : 5; 344 unsigned : 3; 345 }; 346 } __BSRbits_t; 347 348 extern __at(0x0008) volatile __BSRbits_t BSRbits; 349 350 #define _BSR0 0x01 351 #define _BSR1 0x02 352 #define _BSR2 0x04 353 #define _BSR3 0x08 354 #define _BSR4 0x10 355 356 //============================================================================== 357 358 extern __at(0x0009) __sfr WREG; 359 extern __at(0x000A) __sfr PCLATH; 360 361 //============================================================================== 362 // INTCON Bits 363 364 extern __at(0x000B) __sfr INTCON; 365 366 typedef union 367 { 368 struct 369 { 370 unsigned IOCIF : 1; 371 unsigned INTF : 1; 372 unsigned TMR0IF : 1; 373 unsigned IOCIE : 1; 374 unsigned INTE : 1; 375 unsigned TMR0IE : 1; 376 unsigned PEIE : 1; 377 unsigned GIE : 1; 378 }; 379 380 struct 381 { 382 unsigned : 1; 383 unsigned : 1; 384 unsigned T0IF : 1; 385 unsigned : 1; 386 unsigned : 1; 387 unsigned T0IE : 1; 388 unsigned : 1; 389 unsigned : 1; 390 }; 391 } __INTCONbits_t; 392 393 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 394 395 #define _IOCIF 0x01 396 #define _INTF 0x02 397 #define _TMR0IF 0x04 398 #define _T0IF 0x04 399 #define _IOCIE 0x08 400 #define _INTE 0x10 401 #define _TMR0IE 0x20 402 #define _T0IE 0x20 403 #define _PEIE 0x40 404 #define _GIE 0x80 405 406 //============================================================================== 407 408 409 //============================================================================== 410 // PORTA Bits 411 412 extern __at(0x000C) __sfr PORTA; 413 414 typedef union 415 { 416 struct 417 { 418 unsigned RA0 : 1; 419 unsigned RA1 : 1; 420 unsigned RA2 : 1; 421 unsigned RA3 : 1; 422 unsigned RA4 : 1; 423 unsigned RA5 : 1; 424 unsigned : 1; 425 unsigned : 1; 426 }; 427 428 struct 429 { 430 unsigned RA : 6; 431 unsigned : 2; 432 }; 433 } __PORTAbits_t; 434 435 extern __at(0x000C) volatile __PORTAbits_t PORTAbits; 436 437 #define _RA0 0x01 438 #define _RA1 0x02 439 #define _RA2 0x04 440 #define _RA3 0x08 441 #define _RA4 0x10 442 #define _RA5 0x20 443 444 //============================================================================== 445 446 447 //============================================================================== 448 // PORTB Bits 449 450 extern __at(0x000D) __sfr PORTB; 451 452 typedef struct 453 { 454 unsigned : 1; 455 unsigned : 1; 456 unsigned : 1; 457 unsigned : 1; 458 unsigned RB4 : 1; 459 unsigned RB5 : 1; 460 unsigned RB6 : 1; 461 unsigned RB7 : 1; 462 } __PORTBbits_t; 463 464 extern __at(0x000D) volatile __PORTBbits_t PORTBbits; 465 466 #define _RB4 0x10 467 #define _RB5 0x20 468 #define _RB6 0x40 469 #define _RB7 0x80 470 471 //============================================================================== 472 473 474 //============================================================================== 475 // PORTC Bits 476 477 extern __at(0x000E) __sfr PORTC; 478 479 typedef struct 480 { 481 unsigned RC0 : 1; 482 unsigned RC1 : 1; 483 unsigned RC2 : 1; 484 unsigned RC3 : 1; 485 unsigned RC4 : 1; 486 unsigned RC5 : 1; 487 unsigned RC6 : 1; 488 unsigned RC7 : 1; 489 } __PORTCbits_t; 490 491 extern __at(0x000E) volatile __PORTCbits_t PORTCbits; 492 493 #define _RC0 0x01 494 #define _RC1 0x02 495 #define _RC2 0x04 496 #define _RC3 0x08 497 #define _RC4 0x10 498 #define _RC5 0x20 499 #define _RC6 0x40 500 #define _RC7 0x80 501 502 //============================================================================== 503 504 505 //============================================================================== 506 // PIR1 Bits 507 508 extern __at(0x0011) __sfr PIR1; 509 510 typedef struct 511 { 512 unsigned TMR1IF : 1; 513 unsigned TMR2IF : 1; 514 unsigned : 1; 515 unsigned : 1; 516 unsigned TXIF : 1; 517 unsigned RCIF : 1; 518 unsigned ADIF : 1; 519 unsigned TMR1GIF : 1; 520 } __PIR1bits_t; 521 522 extern __at(0x0011) volatile __PIR1bits_t PIR1bits; 523 524 #define _TMR1IF 0x01 525 #define _TMR2IF 0x02 526 #define _TXIF 0x10 527 #define _RCIF 0x20 528 #define _ADIF 0x40 529 #define _TMR1GIF 0x80 530 531 //============================================================================== 532 533 534 //============================================================================== 535 // PIR2 Bits 536 537 extern __at(0x0012) __sfr PIR2; 538 539 typedef struct 540 { 541 unsigned : 1; 542 unsigned : 1; 543 unsigned : 1; 544 unsigned : 1; 545 unsigned : 1; 546 unsigned C1IF : 1; 547 unsigned C2IF : 1; 548 unsigned : 1; 549 } __PIR2bits_t; 550 551 extern __at(0x0012) volatile __PIR2bits_t PIR2bits; 552 553 #define _C1IF 0x20 554 #define _C2IF 0x40 555 556 //============================================================================== 557 558 559 //============================================================================== 560 // PIR3 Bits 561 562 extern __at(0x0013) __sfr PIR3; 563 564 typedef struct 565 { 566 unsigned : 1; 567 unsigned : 1; 568 unsigned : 1; 569 unsigned : 1; 570 unsigned PWM1IF : 1; 571 unsigned PWM2IF : 1; 572 unsigned PWM3IF : 1; 573 unsigned PWM4IF : 1; 574 } __PIR3bits_t; 575 576 extern __at(0x0013) volatile __PIR3bits_t PIR3bits; 577 578 #define _PWM1IF 0x10 579 #define _PWM2IF 0x20 580 #define _PWM3IF 0x40 581 #define _PWM4IF 0x80 582 583 //============================================================================== 584 585 extern __at(0x0015) __sfr TMR0; 586 extern __at(0x0016) __sfr TMR1; 587 extern __at(0x0016) __sfr TMR1L; 588 extern __at(0x0017) __sfr TMR1H; 589 590 //============================================================================== 591 // T1CON Bits 592 593 extern __at(0x0018) __sfr T1CON; 594 595 typedef union 596 { 597 struct 598 { 599 unsigned TMR1ON : 1; 600 unsigned : 1; 601 unsigned NOT_T1SYNC : 1; 602 unsigned T1OSCEN : 1; 603 unsigned T1CKPS0 : 1; 604 unsigned T1CKPS1 : 1; 605 unsigned TMR1CS0 : 1; 606 unsigned TMR1CS1 : 1; 607 }; 608 609 struct 610 { 611 unsigned : 4; 612 unsigned T1CKPS : 2; 613 unsigned : 2; 614 }; 615 616 struct 617 { 618 unsigned : 6; 619 unsigned TMR1CS : 2; 620 }; 621 } __T1CONbits_t; 622 623 extern __at(0x0018) volatile __T1CONbits_t T1CONbits; 624 625 #define _TMR1ON 0x01 626 #define _NOT_T1SYNC 0x04 627 #define _T1OSCEN 0x08 628 #define _T1CKPS0 0x10 629 #define _T1CKPS1 0x20 630 #define _TMR1CS0 0x40 631 #define _TMR1CS1 0x80 632 633 //============================================================================== 634 635 636 //============================================================================== 637 // T1GCON Bits 638 639 extern __at(0x0019) __sfr T1GCON; 640 641 typedef union 642 { 643 struct 644 { 645 unsigned T1GSS0 : 1; 646 unsigned T1GSS1 : 1; 647 unsigned T1GVAL : 1; 648 unsigned T1GGO_NOT_DONE : 1; 649 unsigned T1GSPM : 1; 650 unsigned T1GTM : 1; 651 unsigned T1GPOL : 1; 652 unsigned TMR1GE : 1; 653 }; 654 655 struct 656 { 657 unsigned : 1; 658 unsigned : 1; 659 unsigned : 1; 660 unsigned T1GGO : 1; 661 unsigned : 1; 662 unsigned : 1; 663 unsigned : 1; 664 unsigned : 1; 665 }; 666 667 struct 668 { 669 unsigned T1GSS : 2; 670 unsigned : 6; 671 }; 672 } __T1GCONbits_t; 673 674 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits; 675 676 #define _T1GSS0 0x01 677 #define _T1GSS1 0x02 678 #define _T1GVAL 0x04 679 #define _T1GGO_NOT_DONE 0x08 680 #define _T1GGO 0x08 681 #define _T1GSPM 0x10 682 #define _T1GTM 0x20 683 #define _T1GPOL 0x40 684 #define _TMR1GE 0x80 685 686 //============================================================================== 687 688 extern __at(0x001A) __sfr TMR2; 689 extern __at(0x001B) __sfr PR2; 690 691 //============================================================================== 692 // T2CON Bits 693 694 extern __at(0x001C) __sfr T2CON; 695 696 typedef union 697 { 698 struct 699 { 700 unsigned T2CKPS0 : 1; 701 unsigned T2CKPS1 : 1; 702 unsigned TMR2ON : 1; 703 unsigned T2OUTPS0 : 1; 704 unsigned T2OUTPS1 : 1; 705 unsigned T2OUTPS2 : 1; 706 unsigned T2OUTPS3 : 1; 707 unsigned : 1; 708 }; 709 710 struct 711 { 712 unsigned T2CKPS : 2; 713 unsigned : 6; 714 }; 715 716 struct 717 { 718 unsigned : 3; 719 unsigned T2OUTPS : 4; 720 unsigned : 1; 721 }; 722 } __T2CONbits_t; 723 724 extern __at(0x001C) volatile __T2CONbits_t T2CONbits; 725 726 #define _T2CKPS0 0x01 727 #define _T2CKPS1 0x02 728 #define _TMR2ON 0x04 729 #define _T2OUTPS0 0x08 730 #define _T2OUTPS1 0x10 731 #define _T2OUTPS2 0x20 732 #define _T2OUTPS3 0x40 733 734 //============================================================================== 735 736 737 //============================================================================== 738 // TRISA Bits 739 740 extern __at(0x008C) __sfr TRISA; 741 742 typedef union 743 { 744 struct 745 { 746 unsigned TRISA0 : 1; 747 unsigned TRISA1 : 1; 748 unsigned TRISA2 : 1; 749 unsigned TRISA3 : 1; 750 unsigned TRISA4 : 1; 751 unsigned TRISA5 : 1; 752 unsigned : 1; 753 unsigned : 1; 754 }; 755 756 struct 757 { 758 unsigned TRISA : 6; 759 unsigned : 2; 760 }; 761 } __TRISAbits_t; 762 763 extern __at(0x008C) volatile __TRISAbits_t TRISAbits; 764 765 #define _TRISA0 0x01 766 #define _TRISA1 0x02 767 #define _TRISA2 0x04 768 #define _TRISA3 0x08 769 #define _TRISA4 0x10 770 #define _TRISA5 0x20 771 772 //============================================================================== 773 774 775 //============================================================================== 776 // TRISB Bits 777 778 extern __at(0x008D) __sfr TRISB; 779 780 typedef struct 781 { 782 unsigned : 1; 783 unsigned : 1; 784 unsigned : 1; 785 unsigned : 1; 786 unsigned TRISB3 : 1; 787 unsigned TRISB5 : 1; 788 unsigned TRISB6 : 1; 789 unsigned TRISB7 : 1; 790 } __TRISBbits_t; 791 792 extern __at(0x008D) volatile __TRISBbits_t TRISBbits; 793 794 #define _TRISB3 0x10 795 #define _TRISB5 0x20 796 #define _TRISB6 0x40 797 #define _TRISB7 0x80 798 799 //============================================================================== 800 801 802 //============================================================================== 803 // TRISC Bits 804 805 extern __at(0x008E) __sfr TRISC; 806 807 typedef struct 808 { 809 unsigned TRISC0 : 1; 810 unsigned TRISC1 : 1; 811 unsigned TRISC2 : 1; 812 unsigned TRISC3 : 1; 813 unsigned TRISC4 : 1; 814 unsigned TRISC5 : 1; 815 unsigned TRISC6 : 1; 816 unsigned TRISC7 : 1; 817 } __TRISCbits_t; 818 819 extern __at(0x008E) volatile __TRISCbits_t TRISCbits; 820 821 #define _TRISC0 0x01 822 #define _TRISC1 0x02 823 #define _TRISC2 0x04 824 #define _TRISC3 0x08 825 #define _TRISC4 0x10 826 #define _TRISC5 0x20 827 #define _TRISC6 0x40 828 #define _TRISC7 0x80 829 830 //============================================================================== 831 832 833 //============================================================================== 834 // PIE1 Bits 835 836 extern __at(0x0091) __sfr PIE1; 837 838 typedef struct 839 { 840 unsigned TMR1IE : 1; 841 unsigned TMR2IE : 1; 842 unsigned : 1; 843 unsigned : 1; 844 unsigned TXIE : 1; 845 unsigned RCIE : 1; 846 unsigned ADIE : 1; 847 unsigned TMR1GIE : 1; 848 } __PIE1bits_t; 849 850 extern __at(0x0091) volatile __PIE1bits_t PIE1bits; 851 852 #define _TMR1IE 0x01 853 #define _TMR2IE 0x02 854 #define _TXIE 0x10 855 #define _RCIE 0x20 856 #define _ADIE 0x40 857 #define _TMR1GIE 0x80 858 859 //============================================================================== 860 861 862 //============================================================================== 863 // PIE2 Bits 864 865 extern __at(0x0092) __sfr PIE2; 866 867 typedef struct 868 { 869 unsigned : 1; 870 unsigned : 1; 871 unsigned : 1; 872 unsigned : 1; 873 unsigned : 1; 874 unsigned C1IE : 1; 875 unsigned C2IE : 1; 876 unsigned : 1; 877 } __PIE2bits_t; 878 879 extern __at(0x0092) volatile __PIE2bits_t PIE2bits; 880 881 #define _C1IE 0x20 882 #define _C2IE 0x40 883 884 //============================================================================== 885 886 887 //============================================================================== 888 // PIE3 Bits 889 890 extern __at(0x0093) __sfr PIE3; 891 892 typedef struct 893 { 894 unsigned : 1; 895 unsigned : 1; 896 unsigned : 1; 897 unsigned : 1; 898 unsigned PWM1IE : 1; 899 unsigned PWM2IE : 1; 900 unsigned PWM3IE : 1; 901 unsigned PWM4IE : 1; 902 } __PIE3bits_t; 903 904 extern __at(0x0093) volatile __PIE3bits_t PIE3bits; 905 906 #define _PWM1IE 0x10 907 #define _PWM2IE 0x20 908 #define _PWM3IE 0x40 909 #define _PWM4IE 0x80 910 911 //============================================================================== 912 913 914 //============================================================================== 915 // OPTION_REG Bits 916 917 extern __at(0x0095) __sfr OPTION_REG; 918 919 typedef union 920 { 921 struct 922 { 923 unsigned PS0 : 1; 924 unsigned PS1 : 1; 925 unsigned PS2 : 1; 926 unsigned PSA : 1; 927 unsigned TMR0SE : 1; 928 unsigned TMR0CS : 1; 929 unsigned INTEDG : 1; 930 unsigned NOT_WPUEN : 1; 931 }; 932 933 struct 934 { 935 unsigned : 1; 936 unsigned : 1; 937 unsigned : 1; 938 unsigned : 1; 939 unsigned T0SE : 1; 940 unsigned T0CS : 1; 941 unsigned : 1; 942 unsigned : 1; 943 }; 944 945 struct 946 { 947 unsigned PS : 3; 948 unsigned : 5; 949 }; 950 } __OPTION_REGbits_t; 951 952 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; 953 954 #define _PS0 0x01 955 #define _PS1 0x02 956 #define _PS2 0x04 957 #define _PSA 0x08 958 #define _TMR0SE 0x10 959 #define _T0SE 0x10 960 #define _TMR0CS 0x20 961 #define _T0CS 0x20 962 #define _INTEDG 0x40 963 #define _NOT_WPUEN 0x80 964 965 //============================================================================== 966 967 968 //============================================================================== 969 // PCON Bits 970 971 extern __at(0x0096) __sfr PCON; 972 973 typedef struct 974 { 975 unsigned NOT_BOR : 1; 976 unsigned NOT_POR : 1; 977 unsigned NOT_RI : 1; 978 unsigned NOT_RMCLR : 1; 979 unsigned NOT_RWDT : 1; 980 unsigned : 1; 981 unsigned STKUNF : 1; 982 unsigned STKOVF : 1; 983 } __PCONbits_t; 984 985 extern __at(0x0096) volatile __PCONbits_t PCONbits; 986 987 #define _NOT_BOR 0x01 988 #define _NOT_POR 0x02 989 #define _NOT_RI 0x04 990 #define _NOT_RMCLR 0x08 991 #define _NOT_RWDT 0x10 992 #define _STKUNF 0x40 993 #define _STKOVF 0x80 994 995 //============================================================================== 996 997 998 //============================================================================== 999 // WDTCON Bits 1000 1001 extern __at(0x0097) __sfr WDTCON; 1002 1003 typedef union 1004 { 1005 struct 1006 { 1007 unsigned SWDTEN : 1; 1008 unsigned WDTPS0 : 1; 1009 unsigned WDTPS1 : 1; 1010 unsigned WDTPS2 : 1; 1011 unsigned WDTPS3 : 1; 1012 unsigned WDTPS4 : 1; 1013 unsigned : 1; 1014 unsigned : 1; 1015 }; 1016 1017 struct 1018 { 1019 unsigned : 1; 1020 unsigned WDTPS : 5; 1021 unsigned : 2; 1022 }; 1023 } __WDTCONbits_t; 1024 1025 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 1026 1027 #define _SWDTEN 0x01 1028 #define _WDTPS0 0x02 1029 #define _WDTPS1 0x04 1030 #define _WDTPS2 0x08 1031 #define _WDTPS3 0x10 1032 #define _WDTPS4 0x20 1033 1034 //============================================================================== 1035 1036 1037 //============================================================================== 1038 // OSCTUNE Bits 1039 1040 extern __at(0x0098) __sfr OSCTUNE; 1041 1042 typedef union 1043 { 1044 struct 1045 { 1046 unsigned TUN0 : 1; 1047 unsigned TUN1 : 1; 1048 unsigned TUN2 : 1; 1049 unsigned TUN3 : 1; 1050 unsigned TUN4 : 1; 1051 unsigned TUN5 : 1; 1052 unsigned : 1; 1053 unsigned : 1; 1054 }; 1055 1056 struct 1057 { 1058 unsigned TUN : 6; 1059 unsigned : 2; 1060 }; 1061 } __OSCTUNEbits_t; 1062 1063 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits; 1064 1065 #define _TUN0 0x01 1066 #define _TUN1 0x02 1067 #define _TUN2 0x04 1068 #define _TUN3 0x08 1069 #define _TUN4 0x10 1070 #define _TUN5 0x20 1071 1072 //============================================================================== 1073 1074 1075 //============================================================================== 1076 // OSCCON Bits 1077 1078 extern __at(0x0099) __sfr OSCCON; 1079 1080 typedef union 1081 { 1082 struct 1083 { 1084 unsigned SCS0 : 1; 1085 unsigned SCS1 : 1; 1086 unsigned : 1; 1087 unsigned IRCF0 : 1; 1088 unsigned IRCF1 : 1; 1089 unsigned IRCF2 : 1; 1090 unsigned IRCF3 : 1; 1091 unsigned SPLLEN : 1; 1092 }; 1093 1094 struct 1095 { 1096 unsigned SCS : 2; 1097 unsigned : 6; 1098 }; 1099 1100 struct 1101 { 1102 unsigned : 3; 1103 unsigned IRCF : 4; 1104 unsigned : 1; 1105 }; 1106 } __OSCCONbits_t; 1107 1108 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits; 1109 1110 #define _SCS0 0x01 1111 #define _SCS1 0x02 1112 #define _IRCF0 0x08 1113 #define _IRCF1 0x10 1114 #define _IRCF2 0x20 1115 #define _IRCF3 0x40 1116 #define _SPLLEN 0x80 1117 1118 //============================================================================== 1119 1120 1121 //============================================================================== 1122 // OSCSTAT Bits 1123 1124 extern __at(0x009A) __sfr OSCSTAT; 1125 1126 typedef struct 1127 { 1128 unsigned HFIOFS : 1; 1129 unsigned LFIOFR : 1; 1130 unsigned MFIOFR : 1; 1131 unsigned HFIOFL : 1; 1132 unsigned HFIOFR : 1; 1133 unsigned OSTS : 1; 1134 unsigned PLLR : 1; 1135 unsigned : 1; 1136 } __OSCSTATbits_t; 1137 1138 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; 1139 1140 #define _HFIOFS 0x01 1141 #define _LFIOFR 0x02 1142 #define _MFIOFR 0x04 1143 #define _HFIOFL 0x08 1144 #define _HFIOFR 0x10 1145 #define _OSTS 0x20 1146 #define _PLLR 0x40 1147 1148 //============================================================================== 1149 1150 extern __at(0x009B) __sfr ADRES; 1151 extern __at(0x009B) __sfr ADRESL; 1152 extern __at(0x009C) __sfr ADRESH; 1153 1154 //============================================================================== 1155 // ADCON0 Bits 1156 1157 extern __at(0x009D) __sfr ADCON0; 1158 1159 typedef union 1160 { 1161 struct 1162 { 1163 unsigned ADON : 1; 1164 unsigned GO_NOT_DONE : 1; 1165 unsigned CHS0 : 1; 1166 unsigned CHS1 : 1; 1167 unsigned CHS2 : 1; 1168 unsigned CHS3 : 1; 1169 unsigned CHS4 : 1; 1170 unsigned : 1; 1171 }; 1172 1173 struct 1174 { 1175 unsigned : 1; 1176 unsigned ADGO : 1; 1177 unsigned : 1; 1178 unsigned : 1; 1179 unsigned : 1; 1180 unsigned : 1; 1181 unsigned : 1; 1182 unsigned : 1; 1183 }; 1184 1185 struct 1186 { 1187 unsigned : 1; 1188 unsigned GO : 1; 1189 unsigned : 1; 1190 unsigned : 1; 1191 unsigned : 1; 1192 unsigned : 1; 1193 unsigned : 1; 1194 unsigned : 1; 1195 }; 1196 1197 struct 1198 { 1199 unsigned : 1; 1200 unsigned NOT_DONE : 1; 1201 unsigned : 1; 1202 unsigned : 1; 1203 unsigned : 1; 1204 unsigned : 1; 1205 unsigned : 1; 1206 unsigned : 1; 1207 }; 1208 1209 struct 1210 { 1211 unsigned : 2; 1212 unsigned CHS : 5; 1213 unsigned : 1; 1214 }; 1215 } __ADCON0bits_t; 1216 1217 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits; 1218 1219 #define _ADON 0x01 1220 #define _GO_NOT_DONE 0x02 1221 #define _ADGO 0x02 1222 #define _GO 0x02 1223 #define _NOT_DONE 0x02 1224 #define _CHS0 0x04 1225 #define _CHS1 0x08 1226 #define _CHS2 0x10 1227 #define _CHS3 0x20 1228 #define _CHS4 0x40 1229 1230 //============================================================================== 1231 1232 1233 //============================================================================== 1234 // ADCON1 Bits 1235 1236 extern __at(0x009E) __sfr ADCON1; 1237 1238 typedef union 1239 { 1240 struct 1241 { 1242 unsigned ADPREF0 : 1; 1243 unsigned ADPREF1 : 1; 1244 unsigned : 1; 1245 unsigned : 1; 1246 unsigned ADCS0 : 1; 1247 unsigned ADCS1 : 1; 1248 unsigned ADCS2 : 1; 1249 unsigned ADFM : 1; 1250 }; 1251 1252 struct 1253 { 1254 unsigned ADPREF : 2; 1255 unsigned : 6; 1256 }; 1257 1258 struct 1259 { 1260 unsigned : 4; 1261 unsigned ADCS : 3; 1262 unsigned : 1; 1263 }; 1264 } __ADCON1bits_t; 1265 1266 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits; 1267 1268 #define _ADPREF0 0x01 1269 #define _ADPREF1 0x02 1270 #define _ADCS0 0x10 1271 #define _ADCS1 0x20 1272 #define _ADCS2 0x40 1273 #define _ADFM 0x80 1274 1275 //============================================================================== 1276 1277 1278 //============================================================================== 1279 // ADCON2 Bits 1280 1281 extern __at(0x009F) __sfr ADCON2; 1282 1283 typedef union 1284 { 1285 struct 1286 { 1287 unsigned : 1; 1288 unsigned : 1; 1289 unsigned : 1; 1290 unsigned : 1; 1291 unsigned TRIGSEL0 : 1; 1292 unsigned TRIGSEL1 : 1; 1293 unsigned TRIGSEL2 : 1; 1294 unsigned TRIGSEL3 : 1; 1295 }; 1296 1297 struct 1298 { 1299 unsigned : 4; 1300 unsigned TRIGSEL : 4; 1301 }; 1302 } __ADCON2bits_t; 1303 1304 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits; 1305 1306 #define _TRIGSEL0 0x10 1307 #define _TRIGSEL1 0x20 1308 #define _TRIGSEL2 0x40 1309 #define _TRIGSEL3 0x80 1310 1311 //============================================================================== 1312 1313 1314 //============================================================================== 1315 // LATA Bits 1316 1317 extern __at(0x010C) __sfr LATA; 1318 1319 typedef struct 1320 { 1321 unsigned LATA0 : 1; 1322 unsigned LATA1 : 1; 1323 unsigned LATA2 : 1; 1324 unsigned : 1; 1325 unsigned LATA4 : 1; 1326 unsigned LATA5 : 1; 1327 unsigned : 1; 1328 unsigned : 1; 1329 } __LATAbits_t; 1330 1331 extern __at(0x010C) volatile __LATAbits_t LATAbits; 1332 1333 #define _LATA0 0x01 1334 #define _LATA1 0x02 1335 #define _LATA2 0x04 1336 #define _LATA4 0x10 1337 #define _LATA5 0x20 1338 1339 //============================================================================== 1340 1341 1342 //============================================================================== 1343 // LATB Bits 1344 1345 extern __at(0x010D) __sfr LATB; 1346 1347 typedef struct 1348 { 1349 unsigned : 1; 1350 unsigned : 1; 1351 unsigned : 1; 1352 unsigned : 1; 1353 unsigned LATB4 : 1; 1354 unsigned LATB5 : 1; 1355 unsigned LATB6 : 1; 1356 unsigned LATB7 : 1; 1357 } __LATBbits_t; 1358 1359 extern __at(0x010D) volatile __LATBbits_t LATBbits; 1360 1361 #define _LATB4 0x10 1362 #define _LATB5 0x20 1363 #define _LATB6 0x40 1364 #define _LATB7 0x80 1365 1366 //============================================================================== 1367 1368 1369 //============================================================================== 1370 // LATC Bits 1371 1372 extern __at(0x010E) __sfr LATC; 1373 1374 typedef struct 1375 { 1376 unsigned LATC0 : 1; 1377 unsigned LATC1 : 1; 1378 unsigned LATC2 : 1; 1379 unsigned LATC3 : 1; 1380 unsigned LATC4 : 1; 1381 unsigned LATC5 : 1; 1382 unsigned LATC6 : 1; 1383 unsigned LATC7 : 1; 1384 } __LATCbits_t; 1385 1386 extern __at(0x010E) volatile __LATCbits_t LATCbits; 1387 1388 #define _LATC0 0x01 1389 #define _LATC1 0x02 1390 #define _LATC2 0x04 1391 #define _LATC3 0x08 1392 #define _LATC4 0x10 1393 #define _LATC5 0x20 1394 #define _LATC6 0x40 1395 #define _LATC7 0x80 1396 1397 //============================================================================== 1398 1399 1400 //============================================================================== 1401 // CM1CON0 Bits 1402 1403 extern __at(0x0111) __sfr CM1CON0; 1404 1405 typedef struct 1406 { 1407 unsigned C1SYNC : 1; 1408 unsigned C1HYS : 1; 1409 unsigned C1SP : 1; 1410 unsigned : 1; 1411 unsigned C1POL : 1; 1412 unsigned C1OE : 1; 1413 unsigned C1OUT : 1; 1414 unsigned C1ON : 1; 1415 } __CM1CON0bits_t; 1416 1417 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits; 1418 1419 #define _C1SYNC 0x01 1420 #define _C1HYS 0x02 1421 #define _C1SP 0x04 1422 #define _C1POL 0x10 1423 #define _C1OE 0x20 1424 #define _C1OUT 0x40 1425 #define _C1ON 0x80 1426 1427 //============================================================================== 1428 1429 1430 //============================================================================== 1431 // CM1CON1 Bits 1432 1433 extern __at(0x0112) __sfr CM1CON1; 1434 1435 typedef union 1436 { 1437 struct 1438 { 1439 unsigned C1NCH0 : 1; 1440 unsigned C1NCH1 : 1; 1441 unsigned C1NCH2 : 1; 1442 unsigned : 1; 1443 unsigned C1PCH0 : 1; 1444 unsigned C1PCH1 : 1; 1445 unsigned C1INTN : 1; 1446 unsigned C1INTP : 1; 1447 }; 1448 1449 struct 1450 { 1451 unsigned C1NCH : 3; 1452 unsigned : 5; 1453 }; 1454 1455 struct 1456 { 1457 unsigned : 4; 1458 unsigned C1PCH : 2; 1459 unsigned : 2; 1460 }; 1461 } __CM1CON1bits_t; 1462 1463 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits; 1464 1465 #define _C1NCH0 0x01 1466 #define _C1NCH1 0x02 1467 #define _C1NCH2 0x04 1468 #define _C1PCH0 0x10 1469 #define _C1PCH1 0x20 1470 #define _C1INTN 0x40 1471 #define _C1INTP 0x80 1472 1473 //============================================================================== 1474 1475 1476 //============================================================================== 1477 // CM2CON0 Bits 1478 1479 extern __at(0x0113) __sfr CM2CON0; 1480 1481 typedef struct 1482 { 1483 unsigned C2SYNC : 1; 1484 unsigned C2HYS : 1; 1485 unsigned C2SP : 1; 1486 unsigned : 1; 1487 unsigned C2POL : 1; 1488 unsigned C2OE : 1; 1489 unsigned C2OUT : 1; 1490 unsigned C2ON : 1; 1491 } __CM2CON0bits_t; 1492 1493 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits; 1494 1495 #define _C2SYNC 0x01 1496 #define _C2HYS 0x02 1497 #define _C2SP 0x04 1498 #define _C2POL 0x10 1499 #define _C2OE 0x20 1500 #define _C2OUT 0x40 1501 #define _C2ON 0x80 1502 1503 //============================================================================== 1504 1505 1506 //============================================================================== 1507 // CM2CON1 Bits 1508 1509 extern __at(0x0114) __sfr CM2CON1; 1510 1511 typedef union 1512 { 1513 struct 1514 { 1515 unsigned C2NCH0 : 1; 1516 unsigned C2NCH1 : 1; 1517 unsigned C2NCH2 : 1; 1518 unsigned : 1; 1519 unsigned C2PCH0 : 1; 1520 unsigned C2PCH1 : 1; 1521 unsigned C2INTN : 1; 1522 unsigned C2INTP : 1; 1523 }; 1524 1525 struct 1526 { 1527 unsigned C2NCH : 3; 1528 unsigned : 5; 1529 }; 1530 1531 struct 1532 { 1533 unsigned : 4; 1534 unsigned C2PCH : 2; 1535 unsigned : 2; 1536 }; 1537 } __CM2CON1bits_t; 1538 1539 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits; 1540 1541 #define _C2NCH0 0x01 1542 #define _C2NCH1 0x02 1543 #define _C2NCH2 0x04 1544 #define _C2PCH0 0x10 1545 #define _C2PCH1 0x20 1546 #define _C2INTN 0x40 1547 #define _C2INTP 0x80 1548 1549 //============================================================================== 1550 1551 1552 //============================================================================== 1553 // CMOUT Bits 1554 1555 extern __at(0x0115) __sfr CMOUT; 1556 1557 typedef struct 1558 { 1559 unsigned MC1OUT : 1; 1560 unsigned MC2OUT : 1; 1561 unsigned : 1; 1562 unsigned : 1; 1563 unsigned : 1; 1564 unsigned : 1; 1565 unsigned : 1; 1566 unsigned : 1; 1567 } __CMOUTbits_t; 1568 1569 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits; 1570 1571 #define _MC1OUT 0x01 1572 #define _MC2OUT 0x02 1573 1574 //============================================================================== 1575 1576 1577 //============================================================================== 1578 // BORCON Bits 1579 1580 extern __at(0x0116) __sfr BORCON; 1581 1582 typedef struct 1583 { 1584 unsigned BORRDY : 1; 1585 unsigned : 1; 1586 unsigned : 1; 1587 unsigned : 1; 1588 unsigned : 1; 1589 unsigned : 1; 1590 unsigned BORFS : 1; 1591 unsigned SBOREN : 1; 1592 } __BORCONbits_t; 1593 1594 extern __at(0x0116) volatile __BORCONbits_t BORCONbits; 1595 1596 #define _BORRDY 0x01 1597 #define _BORFS 0x40 1598 #define _SBOREN 0x80 1599 1600 //============================================================================== 1601 1602 1603 //============================================================================== 1604 // FVRCON Bits 1605 1606 extern __at(0x0117) __sfr FVRCON; 1607 1608 typedef union 1609 { 1610 struct 1611 { 1612 unsigned ADFVR0 : 1; 1613 unsigned ADFVR1 : 1; 1614 unsigned CDAFVR0 : 1; 1615 unsigned CDAFVR1 : 1; 1616 unsigned TSRNG : 1; 1617 unsigned TSEN : 1; 1618 unsigned FVRRDY : 1; 1619 unsigned FVREN : 1; 1620 }; 1621 1622 struct 1623 { 1624 unsigned ADFVR : 2; 1625 unsigned : 6; 1626 }; 1627 1628 struct 1629 { 1630 unsigned : 2; 1631 unsigned CDAFVR : 2; 1632 unsigned : 4; 1633 }; 1634 } __FVRCONbits_t; 1635 1636 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits; 1637 1638 #define _ADFVR0 0x01 1639 #define _ADFVR1 0x02 1640 #define _CDAFVR0 0x04 1641 #define _CDAFVR1 0x08 1642 #define _TSRNG 0x10 1643 #define _TSEN 0x20 1644 #define _FVRRDY 0x40 1645 #define _FVREN 0x80 1646 1647 //============================================================================== 1648 1649 1650 //============================================================================== 1651 // DACCON0 Bits 1652 1653 extern __at(0x0118) __sfr DACCON0; 1654 1655 typedef union 1656 { 1657 struct 1658 { 1659 unsigned : 1; 1660 unsigned : 1; 1661 unsigned DACPSS0 : 1; 1662 unsigned DACPSS1 : 1; 1663 unsigned : 1; 1664 unsigned DACOE : 1; 1665 unsigned DACLPS : 1; 1666 unsigned DACEN : 1; 1667 }; 1668 1669 struct 1670 { 1671 unsigned : 2; 1672 unsigned DACPSS : 2; 1673 unsigned : 4; 1674 }; 1675 } __DACCON0bits_t; 1676 1677 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits; 1678 1679 #define _DACPSS0 0x04 1680 #define _DACPSS1 0x08 1681 #define _DACOE 0x20 1682 #define _DACLPS 0x40 1683 #define _DACEN 0x80 1684 1685 //============================================================================== 1686 1687 1688 //============================================================================== 1689 // DACCON1 Bits 1690 1691 extern __at(0x0119) __sfr DACCON1; 1692 1693 typedef union 1694 { 1695 struct 1696 { 1697 unsigned DACR0 : 1; 1698 unsigned DACR1 : 1; 1699 unsigned DACR2 : 1; 1700 unsigned DACR3 : 1; 1701 unsigned DACR4 : 1; 1702 unsigned : 1; 1703 unsigned : 1; 1704 unsigned : 1; 1705 }; 1706 1707 struct 1708 { 1709 unsigned DACR : 5; 1710 unsigned : 3; 1711 }; 1712 } __DACCON1bits_t; 1713 1714 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits; 1715 1716 #define _DACR0 0x01 1717 #define _DACR1 0x02 1718 #define _DACR2 0x04 1719 #define _DACR3 0x08 1720 #define _DACR4 0x10 1721 1722 //============================================================================== 1723 1724 1725 //============================================================================== 1726 // ANSELA Bits 1727 1728 extern __at(0x018C) __sfr ANSELA; 1729 1730 typedef struct 1731 { 1732 unsigned ANSA0 : 1; 1733 unsigned ANSA1 : 1; 1734 unsigned ANSA2 : 1; 1735 unsigned : 1; 1736 unsigned ANSA4 : 1; 1737 unsigned : 1; 1738 unsigned : 1; 1739 unsigned : 1; 1740 } __ANSELAbits_t; 1741 1742 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 1743 1744 #define _ANSA0 0x01 1745 #define _ANSA1 0x02 1746 #define _ANSA2 0x04 1747 #define _ANSA4 0x10 1748 1749 //============================================================================== 1750 1751 1752 //============================================================================== 1753 // ANSELB Bits 1754 1755 extern __at(0x018D) __sfr ANSELB; 1756 1757 typedef struct 1758 { 1759 unsigned : 1; 1760 unsigned : 1; 1761 unsigned : 1; 1762 unsigned : 1; 1763 unsigned ANSB4 : 1; 1764 unsigned ANSB5 : 1; 1765 unsigned : 1; 1766 unsigned : 1; 1767 } __ANSELBbits_t; 1768 1769 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits; 1770 1771 #define _ANSB4 0x10 1772 #define _ANSB5 0x20 1773 1774 //============================================================================== 1775 1776 1777 //============================================================================== 1778 // ANSELC Bits 1779 1780 extern __at(0x018E) __sfr ANSELC; 1781 1782 typedef struct 1783 { 1784 unsigned ANSC0 : 1; 1785 unsigned ANSC1 : 1; 1786 unsigned ANSC2 : 1; 1787 unsigned ANSC3 : 1; 1788 unsigned : 1; 1789 unsigned : 1; 1790 unsigned ANSC6 : 1; 1791 unsigned ANSC7 : 1; 1792 } __ANSELCbits_t; 1793 1794 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits; 1795 1796 #define _ANSC0 0x01 1797 #define _ANSC1 0x02 1798 #define _ANSC2 0x04 1799 #define _ANSC3 0x08 1800 #define _ANSC6 0x40 1801 #define _ANSC7 0x80 1802 1803 //============================================================================== 1804 1805 extern __at(0x0191) __sfr PMADR; 1806 extern __at(0x0191) __sfr PMADRL; 1807 extern __at(0x0192) __sfr PMADRH; 1808 extern __at(0x0193) __sfr PMDAT; 1809 extern __at(0x0193) __sfr PMDATL; 1810 extern __at(0x0194) __sfr PMDATH; 1811 1812 //============================================================================== 1813 // PMCON1 Bits 1814 1815 extern __at(0x0195) __sfr PMCON1; 1816 1817 typedef struct 1818 { 1819 unsigned RD : 1; 1820 unsigned WR : 1; 1821 unsigned WREN : 1; 1822 unsigned WRERR : 1; 1823 unsigned FREE : 1; 1824 unsigned LWLO : 1; 1825 unsigned CFGS : 1; 1826 unsigned : 1; 1827 } __PMCON1bits_t; 1828 1829 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits; 1830 1831 #define _RD 0x01 1832 #define _WR 0x02 1833 #define _WREN 0x04 1834 #define _WRERR 0x08 1835 #define _FREE 0x10 1836 #define _LWLO 0x20 1837 #define _CFGS 0x40 1838 1839 //============================================================================== 1840 1841 extern __at(0x0196) __sfr PMCON2; 1842 extern __at(0x0199) __sfr RCREG; 1843 extern __at(0x019A) __sfr TXREG; 1844 extern __at(0x019B) __sfr SPBRG; 1845 extern __at(0x019B) __sfr SPBRGL; 1846 extern __at(0x019C) __sfr SPBRGH; 1847 1848 //============================================================================== 1849 // RCSTA Bits 1850 1851 extern __at(0x019D) __sfr RCSTA; 1852 1853 typedef struct 1854 { 1855 unsigned RX9D : 1; 1856 unsigned OERR : 1; 1857 unsigned FERR : 1; 1858 unsigned ADDEN : 1; 1859 unsigned CREN : 1; 1860 unsigned SREN : 1; 1861 unsigned RX9 : 1; 1862 unsigned SPEN : 1; 1863 } __RCSTAbits_t; 1864 1865 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits; 1866 1867 #define _RX9D 0x01 1868 #define _OERR 0x02 1869 #define _FERR 0x04 1870 #define _ADDEN 0x08 1871 #define _CREN 0x10 1872 #define _SREN 0x20 1873 #define _RX9 0x40 1874 #define _SPEN 0x80 1875 1876 //============================================================================== 1877 1878 1879 //============================================================================== 1880 // TXSTA Bits 1881 1882 extern __at(0x019E) __sfr TXSTA; 1883 1884 typedef struct 1885 { 1886 unsigned TX9D : 1; 1887 unsigned TRMT : 1; 1888 unsigned BRGH : 1; 1889 unsigned SENDB : 1; 1890 unsigned SYNC : 1; 1891 unsigned TXEN : 1; 1892 unsigned TX9 : 1; 1893 unsigned CSRC : 1; 1894 } __TXSTAbits_t; 1895 1896 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits; 1897 1898 #define _TX9D 0x01 1899 #define _TRMT 0x02 1900 #define _BRGH 0x04 1901 #define _SENDB 0x08 1902 #define _SYNC 0x10 1903 #define _TXEN 0x20 1904 #define _TX9 0x40 1905 #define _CSRC 0x80 1906 1907 //============================================================================== 1908 1909 1910 //============================================================================== 1911 // BAUDCON Bits 1912 1913 extern __at(0x019F) __sfr BAUDCON; 1914 1915 typedef struct 1916 { 1917 unsigned ABDEN : 1; 1918 unsigned WUE : 1; 1919 unsigned : 1; 1920 unsigned BRG16 : 1; 1921 unsigned SCKP : 1; 1922 unsigned : 1; 1923 unsigned RCIDL : 1; 1924 unsigned ABDOVF : 1; 1925 } __BAUDCONbits_t; 1926 1927 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; 1928 1929 #define _ABDEN 0x01 1930 #define _WUE 0x02 1931 #define _BRG16 0x08 1932 #define _SCKP 0x10 1933 #define _RCIDL 0x40 1934 #define _ABDOVF 0x80 1935 1936 //============================================================================== 1937 1938 1939 //============================================================================== 1940 // WPUA Bits 1941 1942 extern __at(0x020C) __sfr WPUA; 1943 1944 typedef union 1945 { 1946 struct 1947 { 1948 unsigned WPUA0 : 1; 1949 unsigned WPUA1 : 1; 1950 unsigned WPUA2 : 1; 1951 unsigned WPUA3 : 1; 1952 unsigned WPUA4 : 1; 1953 unsigned WPUA5 : 1; 1954 unsigned : 1; 1955 unsigned : 1; 1956 }; 1957 1958 struct 1959 { 1960 unsigned WPUA : 6; 1961 unsigned : 2; 1962 }; 1963 } __WPUAbits_t; 1964 1965 extern __at(0x020C) volatile __WPUAbits_t WPUAbits; 1966 1967 #define _WPUA0 0x01 1968 #define _WPUA1 0x02 1969 #define _WPUA2 0x04 1970 #define _WPUA3 0x08 1971 #define _WPUA4 0x10 1972 #define _WPUA5 0x20 1973 1974 //============================================================================== 1975 1976 1977 //============================================================================== 1978 // WPUB Bits 1979 1980 extern __at(0x020D) __sfr WPUB; 1981 1982 typedef struct 1983 { 1984 unsigned : 1; 1985 unsigned : 1; 1986 unsigned : 1; 1987 unsigned : 1; 1988 unsigned WPUB4 : 1; 1989 unsigned WPUB5 : 1; 1990 unsigned WPUB6 : 1; 1991 unsigned WPUB7 : 1; 1992 } __WPUBbits_t; 1993 1994 extern __at(0x020D) volatile __WPUBbits_t WPUBbits; 1995 1996 #define _WPUB4 0x10 1997 #define _WPUB5 0x20 1998 #define _WPUB6 0x40 1999 #define _WPUB7 0x80 2000 2001 //============================================================================== 2002 2003 2004 //============================================================================== 2005 // WPUC Bits 2006 2007 extern __at(0x020E) __sfr WPUC; 2008 2009 typedef struct 2010 { 2011 unsigned WPUC0 : 1; 2012 unsigned WPUC1 : 1; 2013 unsigned WPUC2 : 1; 2014 unsigned WPUC3 : 1; 2015 unsigned WPUC4 : 1; 2016 unsigned WPUC5 : 1; 2017 unsigned WPUC6 : 1; 2018 unsigned WPUC7 : 1; 2019 } __WPUCbits_t; 2020 2021 extern __at(0x020E) volatile __WPUCbits_t WPUCbits; 2022 2023 #define _WPUC0 0x01 2024 #define _WPUC1 0x02 2025 #define _WPUC2 0x04 2026 #define _WPUC3 0x08 2027 #define _WPUC4 0x10 2028 #define _WPUC5 0x20 2029 #define _WPUC6 0x40 2030 #define _WPUC7 0x80 2031 2032 //============================================================================== 2033 2034 2035 //============================================================================== 2036 // ODCONA Bits 2037 2038 extern __at(0x028C) __sfr ODCONA; 2039 2040 typedef struct 2041 { 2042 unsigned ODA0 : 1; 2043 unsigned ODA1 : 1; 2044 unsigned ODA2 : 1; 2045 unsigned : 1; 2046 unsigned ODA4 : 1; 2047 unsigned ODA5 : 1; 2048 unsigned : 1; 2049 unsigned : 1; 2050 } __ODCONAbits_t; 2051 2052 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits; 2053 2054 #define _ODA0 0x01 2055 #define _ODA1 0x02 2056 #define _ODA2 0x04 2057 #define _ODA4 0x10 2058 #define _ODA5 0x20 2059 2060 //============================================================================== 2061 2062 2063 //============================================================================== 2064 // ODCONB Bits 2065 2066 extern __at(0x028D) __sfr ODCONB; 2067 2068 typedef struct 2069 { 2070 unsigned : 1; 2071 unsigned : 1; 2072 unsigned : 1; 2073 unsigned : 1; 2074 unsigned ODB4 : 1; 2075 unsigned ODB5 : 1; 2076 unsigned ODB6 : 1; 2077 unsigned ODB7 : 1; 2078 } __ODCONBbits_t; 2079 2080 extern __at(0x028D) volatile __ODCONBbits_t ODCONBbits; 2081 2082 #define _ODB4 0x10 2083 #define _ODB5 0x20 2084 #define _ODB6 0x40 2085 #define _ODB7 0x80 2086 2087 //============================================================================== 2088 2089 2090 //============================================================================== 2091 // ODCONC Bits 2092 2093 extern __at(0x028E) __sfr ODCONC; 2094 2095 typedef struct 2096 { 2097 unsigned ODC0 : 1; 2098 unsigned ODC1 : 1; 2099 unsigned ODC2 : 1; 2100 unsigned ODC3 : 1; 2101 unsigned ODC4 : 1; 2102 unsigned ODC5 : 1; 2103 unsigned ODC6 : 1; 2104 unsigned ODC7 : 1; 2105 } __ODCONCbits_t; 2106 2107 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits; 2108 2109 #define _ODC0 0x01 2110 #define _ODC1 0x02 2111 #define _ODC2 0x04 2112 #define _ODC3 0x08 2113 #define _ODC4 0x10 2114 #define _ODC5 0x20 2115 #define _ODC6 0x40 2116 #define _ODC7 0x80 2117 2118 //============================================================================== 2119 2120 2121 //============================================================================== 2122 // SLRCONA Bits 2123 2124 extern __at(0x030C) __sfr SLRCONA; 2125 2126 typedef struct 2127 { 2128 unsigned SLRA0 : 1; 2129 unsigned SLRA1 : 1; 2130 unsigned SLRA2 : 1; 2131 unsigned : 1; 2132 unsigned SLRA4 : 1; 2133 unsigned SLRA5 : 1; 2134 unsigned : 1; 2135 unsigned : 1; 2136 } __SLRCONAbits_t; 2137 2138 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits; 2139 2140 #define _SLRA0 0x01 2141 #define _SLRA1 0x02 2142 #define _SLRA2 0x04 2143 #define _SLRA4 0x10 2144 #define _SLRA5 0x20 2145 2146 //============================================================================== 2147 2148 2149 //============================================================================== 2150 // SLRCONB Bits 2151 2152 extern __at(0x030D) __sfr SLRCONB; 2153 2154 typedef struct 2155 { 2156 unsigned : 1; 2157 unsigned : 1; 2158 unsigned : 1; 2159 unsigned : 1; 2160 unsigned SLRB4 : 1; 2161 unsigned SLRB5 : 1; 2162 unsigned SLRB6 : 1; 2163 unsigned SLRB7 : 1; 2164 } __SLRCONBbits_t; 2165 2166 extern __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits; 2167 2168 #define _SLRB4 0x10 2169 #define _SLRB5 0x20 2170 #define _SLRB6 0x40 2171 #define _SLRB7 0x80 2172 2173 //============================================================================== 2174 2175 2176 //============================================================================== 2177 // SLRCONC Bits 2178 2179 extern __at(0x030E) __sfr SLRCONC; 2180 2181 typedef struct 2182 { 2183 unsigned SLRC0 : 1; 2184 unsigned SLRC1 : 1; 2185 unsigned SLRC2 : 1; 2186 unsigned SLRC3 : 1; 2187 unsigned SLRC4 : 1; 2188 unsigned SLRC5 : 1; 2189 unsigned SLRC6 : 1; 2190 unsigned SLRC7 : 1; 2191 } __SLRCONCbits_t; 2192 2193 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits; 2194 2195 #define _SLRC0 0x01 2196 #define _SLRC1 0x02 2197 #define _SLRC2 0x04 2198 #define _SLRC3 0x08 2199 #define _SLRC4 0x10 2200 #define _SLRC5 0x20 2201 #define _SLRC6 0x40 2202 #define _SLRC7 0x80 2203 2204 //============================================================================== 2205 2206 2207 //============================================================================== 2208 // INLVLA Bits 2209 2210 extern __at(0x038C) __sfr INLVLA; 2211 2212 typedef union 2213 { 2214 struct 2215 { 2216 unsigned INLVLA0 : 1; 2217 unsigned INLVLA1 : 1; 2218 unsigned INLVLA2 : 1; 2219 unsigned INLVLA3 : 1; 2220 unsigned INLVLA4 : 1; 2221 unsigned INLVLA5 : 1; 2222 unsigned : 1; 2223 unsigned : 1; 2224 }; 2225 2226 struct 2227 { 2228 unsigned INLVLA : 6; 2229 unsigned : 2; 2230 }; 2231 } __INLVLAbits_t; 2232 2233 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits; 2234 2235 #define _INLVLA0 0x01 2236 #define _INLVLA1 0x02 2237 #define _INLVLA2 0x04 2238 #define _INLVLA3 0x08 2239 #define _INLVLA4 0x10 2240 #define _INLVLA5 0x20 2241 2242 //============================================================================== 2243 2244 2245 //============================================================================== 2246 // INLVLB Bits 2247 2248 extern __at(0x038D) __sfr INLVLB; 2249 2250 typedef struct 2251 { 2252 unsigned : 1; 2253 unsigned : 1; 2254 unsigned : 1; 2255 unsigned : 1; 2256 unsigned INLVLB4 : 1; 2257 unsigned INLVLB5 : 1; 2258 unsigned INLVLB6 : 1; 2259 unsigned INLVLB7 : 1; 2260 } __INLVLBbits_t; 2261 2262 extern __at(0x038D) volatile __INLVLBbits_t INLVLBbits; 2263 2264 #define _INLVLB4 0x10 2265 #define _INLVLB5 0x20 2266 #define _INLVLB6 0x40 2267 #define _INLVLB7 0x80 2268 2269 //============================================================================== 2270 2271 2272 //============================================================================== 2273 // INLVLC Bits 2274 2275 extern __at(0x038E) __sfr INLVLC; 2276 2277 typedef struct 2278 { 2279 unsigned INLVLC0 : 1; 2280 unsigned INLVLC1 : 1; 2281 unsigned INLVLC2 : 1; 2282 unsigned INLVLC3 : 1; 2283 unsigned INLVLC4 : 1; 2284 unsigned INLVLC5 : 1; 2285 unsigned INLVLC6 : 1; 2286 unsigned INLVLC7 : 1; 2287 } __INLVLCbits_t; 2288 2289 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits; 2290 2291 #define _INLVLC0 0x01 2292 #define _INLVLC1 0x02 2293 #define _INLVLC2 0x04 2294 #define _INLVLC3 0x08 2295 #define _INLVLC4 0x10 2296 #define _INLVLC5 0x20 2297 #define _INLVLC6 0x40 2298 #define _INLVLC7 0x80 2299 2300 //============================================================================== 2301 2302 2303 //============================================================================== 2304 // IOCAP Bits 2305 2306 extern __at(0x0391) __sfr IOCAP; 2307 2308 typedef union 2309 { 2310 struct 2311 { 2312 unsigned IOCAP0 : 1; 2313 unsigned IOCAP1 : 1; 2314 unsigned IOCAP2 : 1; 2315 unsigned IOCAP3 : 1; 2316 unsigned IOCAP4 : 1; 2317 unsigned IOCAP5 : 1; 2318 unsigned : 1; 2319 unsigned : 1; 2320 }; 2321 2322 struct 2323 { 2324 unsigned IOCAP : 6; 2325 unsigned : 2; 2326 }; 2327 } __IOCAPbits_t; 2328 2329 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits; 2330 2331 #define _IOCAP0 0x01 2332 #define _IOCAP1 0x02 2333 #define _IOCAP2 0x04 2334 #define _IOCAP3 0x08 2335 #define _IOCAP4 0x10 2336 #define _IOCAP5 0x20 2337 2338 //============================================================================== 2339 2340 2341 //============================================================================== 2342 // IOCAN Bits 2343 2344 extern __at(0x0392) __sfr IOCAN; 2345 2346 typedef union 2347 { 2348 struct 2349 { 2350 unsigned IOCAN0 : 1; 2351 unsigned IOCAN1 : 1; 2352 unsigned IOCAN2 : 1; 2353 unsigned IOCAN3 : 1; 2354 unsigned IOCAN4 : 1; 2355 unsigned IOCAN5 : 1; 2356 unsigned : 1; 2357 unsigned : 1; 2358 }; 2359 2360 struct 2361 { 2362 unsigned IOCAN : 6; 2363 unsigned : 2; 2364 }; 2365 } __IOCANbits_t; 2366 2367 extern __at(0x0392) volatile __IOCANbits_t IOCANbits; 2368 2369 #define _IOCAN0 0x01 2370 #define _IOCAN1 0x02 2371 #define _IOCAN2 0x04 2372 #define _IOCAN3 0x08 2373 #define _IOCAN4 0x10 2374 #define _IOCAN5 0x20 2375 2376 //============================================================================== 2377 2378 2379 //============================================================================== 2380 // IOCAF Bits 2381 2382 extern __at(0x0393) __sfr IOCAF; 2383 2384 typedef union 2385 { 2386 struct 2387 { 2388 unsigned IOCAF0 : 1; 2389 unsigned IOCAF1 : 1; 2390 unsigned IOCAF2 : 1; 2391 unsigned IOCAF3 : 1; 2392 unsigned IOCAF4 : 1; 2393 unsigned IOCAF5 : 1; 2394 unsigned : 1; 2395 unsigned : 1; 2396 }; 2397 2398 struct 2399 { 2400 unsigned IOCAF : 6; 2401 unsigned : 2; 2402 }; 2403 } __IOCAFbits_t; 2404 2405 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits; 2406 2407 #define _IOCAF0 0x01 2408 #define _IOCAF1 0x02 2409 #define _IOCAF2 0x04 2410 #define _IOCAF3 0x08 2411 #define _IOCAF4 0x10 2412 #define _IOCAF5 0x20 2413 2414 //============================================================================== 2415 2416 2417 //============================================================================== 2418 // IOCBP Bits 2419 2420 extern __at(0x0394) __sfr IOCBP; 2421 2422 typedef struct 2423 { 2424 unsigned : 1; 2425 unsigned : 1; 2426 unsigned : 1; 2427 unsigned : 1; 2428 unsigned IOCBP4 : 1; 2429 unsigned IOCBP5 : 1; 2430 unsigned IOCBP6 : 1; 2431 unsigned IOCBP7 : 1; 2432 } __IOCBPbits_t; 2433 2434 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits; 2435 2436 #define _IOCBP4 0x10 2437 #define _IOCBP5 0x20 2438 #define _IOCBP6 0x40 2439 #define _IOCBP7 0x80 2440 2441 //============================================================================== 2442 2443 2444 //============================================================================== 2445 // IOCBN Bits 2446 2447 extern __at(0x0395) __sfr IOCBN; 2448 2449 typedef struct 2450 { 2451 unsigned : 1; 2452 unsigned : 1; 2453 unsigned : 1; 2454 unsigned : 1; 2455 unsigned IOCBN4 : 1; 2456 unsigned IOCBN5 : 1; 2457 unsigned IOCBN6 : 1; 2458 unsigned IOCBN7 : 1; 2459 } __IOCBNbits_t; 2460 2461 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits; 2462 2463 #define _IOCBN4 0x10 2464 #define _IOCBN5 0x20 2465 #define _IOCBN6 0x40 2466 #define _IOCBN7 0x80 2467 2468 //============================================================================== 2469 2470 2471 //============================================================================== 2472 // IOCBF Bits 2473 2474 extern __at(0x0396) __sfr IOCBF; 2475 2476 typedef struct 2477 { 2478 unsigned : 1; 2479 unsigned : 1; 2480 unsigned : 1; 2481 unsigned : 1; 2482 unsigned IOCBF4 : 1; 2483 unsigned IOCBF5 : 1; 2484 unsigned IOCBF6 : 1; 2485 unsigned IOCBF7 : 1; 2486 } __IOCBFbits_t; 2487 2488 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits; 2489 2490 #define _IOCBF4 0x10 2491 #define _IOCBF5 0x20 2492 #define _IOCBF6 0x40 2493 #define _IOCBF7 0x80 2494 2495 //============================================================================== 2496 2497 2498 //============================================================================== 2499 // IOCCP Bits 2500 2501 extern __at(0x0397) __sfr IOCCP; 2502 2503 typedef struct 2504 { 2505 unsigned IOCCP0 : 1; 2506 unsigned IOCCP1 : 1; 2507 unsigned IOCCP2 : 1; 2508 unsigned IOCCP3 : 1; 2509 unsigned IOCCP4 : 1; 2510 unsigned IOCCP5 : 1; 2511 unsigned IOCCP6 : 1; 2512 unsigned IOCCP7 : 1; 2513 } __IOCCPbits_t; 2514 2515 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits; 2516 2517 #define _IOCCP0 0x01 2518 #define _IOCCP1 0x02 2519 #define _IOCCP2 0x04 2520 #define _IOCCP3 0x08 2521 #define _IOCCP4 0x10 2522 #define _IOCCP5 0x20 2523 #define _IOCCP6 0x40 2524 #define _IOCCP7 0x80 2525 2526 //============================================================================== 2527 2528 2529 //============================================================================== 2530 // IOCCN Bits 2531 2532 extern __at(0x0398) __sfr IOCCN; 2533 2534 typedef struct 2535 { 2536 unsigned IOCCN0 : 1; 2537 unsigned IOCCN1 : 1; 2538 unsigned IOCCN2 : 1; 2539 unsigned IOCCN3 : 1; 2540 unsigned IOCCN4 : 1; 2541 unsigned IOCCN5 : 1; 2542 unsigned IOCCN6 : 1; 2543 unsigned IOCCN7 : 1; 2544 } __IOCCNbits_t; 2545 2546 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits; 2547 2548 #define _IOCCN0 0x01 2549 #define _IOCCN1 0x02 2550 #define _IOCCN2 0x04 2551 #define _IOCCN3 0x08 2552 #define _IOCCN4 0x10 2553 #define _IOCCN5 0x20 2554 #define _IOCCN6 0x40 2555 #define _IOCCN7 0x80 2556 2557 //============================================================================== 2558 2559 2560 //============================================================================== 2561 // IOCCF Bits 2562 2563 extern __at(0x0399) __sfr IOCCF; 2564 2565 typedef struct 2566 { 2567 unsigned IOCCF0 : 1; 2568 unsigned IOCCF1 : 1; 2569 unsigned IOCCF2 : 1; 2570 unsigned IOCCF3 : 1; 2571 unsigned IOCCF4 : 1; 2572 unsigned IOCCF5 : 1; 2573 unsigned IOCCF6 : 1; 2574 unsigned IOCCF7 : 1; 2575 } __IOCCFbits_t; 2576 2577 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits; 2578 2579 #define _IOCCF0 0x01 2580 #define _IOCCF1 0x02 2581 #define _IOCCF2 0x04 2582 #define _IOCCF3 0x08 2583 #define _IOCCF4 0x10 2584 #define _IOCCF5 0x20 2585 #define _IOCCF6 0x40 2586 #define _IOCCF7 0x80 2587 2588 //============================================================================== 2589 2590 2591 //============================================================================== 2592 // CWG1DBR Bits 2593 2594 extern __at(0x0691) __sfr CWG1DBR; 2595 2596 typedef union 2597 { 2598 struct 2599 { 2600 unsigned CWG1DBR0 : 1; 2601 unsigned CWG1DBR1 : 1; 2602 unsigned CWG1DBR2 : 1; 2603 unsigned CWG1DBR3 : 1; 2604 unsigned CWG1DBR4 : 1; 2605 unsigned CWG1DBR5 : 1; 2606 unsigned : 1; 2607 unsigned : 1; 2608 }; 2609 2610 struct 2611 { 2612 unsigned CWG1DBR : 6; 2613 unsigned : 2; 2614 }; 2615 } __CWG1DBRbits_t; 2616 2617 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits; 2618 2619 #define _CWG1DBR0 0x01 2620 #define _CWG1DBR1 0x02 2621 #define _CWG1DBR2 0x04 2622 #define _CWG1DBR3 0x08 2623 #define _CWG1DBR4 0x10 2624 #define _CWG1DBR5 0x20 2625 2626 //============================================================================== 2627 2628 2629 //============================================================================== 2630 // CWG1DBF Bits 2631 2632 extern __at(0x0692) __sfr CWG1DBF; 2633 2634 typedef union 2635 { 2636 struct 2637 { 2638 unsigned CWG1DBF0 : 1; 2639 unsigned CWG1DBF1 : 1; 2640 unsigned CWG1DBF2 : 1; 2641 unsigned CWG1DBF3 : 1; 2642 unsigned CWG1DBF4 : 1; 2643 unsigned CWG1DBF5 : 1; 2644 unsigned : 1; 2645 unsigned : 1; 2646 }; 2647 2648 struct 2649 { 2650 unsigned CWG1DBF : 6; 2651 unsigned : 2; 2652 }; 2653 } __CWG1DBFbits_t; 2654 2655 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits; 2656 2657 #define _CWG1DBF0 0x01 2658 #define _CWG1DBF1 0x02 2659 #define _CWG1DBF2 0x04 2660 #define _CWG1DBF3 0x08 2661 #define _CWG1DBF4 0x10 2662 #define _CWG1DBF5 0x20 2663 2664 //============================================================================== 2665 2666 2667 //============================================================================== 2668 // CWG1CON0 Bits 2669 2670 extern __at(0x0693) __sfr CWG1CON0; 2671 2672 typedef struct 2673 { 2674 unsigned G1CS0 : 1; 2675 unsigned : 1; 2676 unsigned : 1; 2677 unsigned G1POLA : 1; 2678 unsigned G1POLB : 1; 2679 unsigned G1OEA : 1; 2680 unsigned G1OEB : 1; 2681 unsigned G1EN : 1; 2682 } __CWG1CON0bits_t; 2683 2684 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits; 2685 2686 #define _G1CS0 0x01 2687 #define _G1POLA 0x08 2688 #define _G1POLB 0x10 2689 #define _G1OEA 0x20 2690 #define _G1OEB 0x40 2691 #define _G1EN 0x80 2692 2693 //============================================================================== 2694 2695 2696 //============================================================================== 2697 // CWG1CON1 Bits 2698 2699 extern __at(0x0694) __sfr CWG1CON1; 2700 2701 typedef union 2702 { 2703 struct 2704 { 2705 unsigned G1IS0 : 1; 2706 unsigned G1IS1 : 1; 2707 unsigned G1IS2 : 1; 2708 unsigned : 1; 2709 unsigned G1ASDLA0 : 1; 2710 unsigned G1ASDLA1 : 1; 2711 unsigned G1ASDLB0 : 1; 2712 unsigned G1ASDLB1 : 1; 2713 }; 2714 2715 struct 2716 { 2717 unsigned G1IS : 3; 2718 unsigned : 5; 2719 }; 2720 2721 struct 2722 { 2723 unsigned : 4; 2724 unsigned G1ASDLA : 2; 2725 unsigned : 2; 2726 }; 2727 2728 struct 2729 { 2730 unsigned : 6; 2731 unsigned G1ASDLB : 2; 2732 }; 2733 } __CWG1CON1bits_t; 2734 2735 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits; 2736 2737 #define _G1IS0 0x01 2738 #define _G1IS1 0x02 2739 #define _G1IS2 0x04 2740 #define _G1ASDLA0 0x10 2741 #define _G1ASDLA1 0x20 2742 #define _G1ASDLB0 0x40 2743 #define _G1ASDLB1 0x80 2744 2745 //============================================================================== 2746 2747 2748 //============================================================================== 2749 // CWG1CON2 Bits 2750 2751 extern __at(0x0695) __sfr CWG1CON2; 2752 2753 typedef struct 2754 { 2755 unsigned : 1; 2756 unsigned G1ASDSPPS : 1; 2757 unsigned G1ASDSC1 : 1; 2758 unsigned G1ASDSC2 : 1; 2759 unsigned : 1; 2760 unsigned : 1; 2761 unsigned G1ARSEN : 1; 2762 unsigned G1ASE : 1; 2763 } __CWG1CON2bits_t; 2764 2765 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits; 2766 2767 #define _G1ASDSPPS 0x02 2768 #define _G1ASDSC1 0x04 2769 #define _G1ASDSC2 0x08 2770 #define _G1ARSEN 0x40 2771 #define _G1ASE 0x80 2772 2773 //============================================================================== 2774 2775 2776 //============================================================================== 2777 // PWMEN Bits 2778 2779 extern __at(0x0D8E) __sfr PWMEN; 2780 2781 typedef union 2782 { 2783 struct 2784 { 2785 unsigned PWM1EN_A : 1; 2786 unsigned PWM2EN_A : 1; 2787 unsigned PWM3EN_A : 1; 2788 unsigned PWM4EN_A : 1; 2789 unsigned : 1; 2790 unsigned : 1; 2791 unsigned : 1; 2792 unsigned : 1; 2793 }; 2794 2795 struct 2796 { 2797 unsigned MPWM1EN : 1; 2798 unsigned MPWM2EN : 1; 2799 unsigned MPWM3EN : 1; 2800 unsigned : 1; 2801 unsigned : 1; 2802 unsigned : 1; 2803 unsigned : 1; 2804 unsigned : 1; 2805 }; 2806 } __PWMENbits_t; 2807 2808 extern __at(0x0D8E) volatile __PWMENbits_t PWMENbits; 2809 2810 #define _PWM1EN_A 0x01 2811 #define _MPWM1EN 0x01 2812 #define _PWM2EN_A 0x02 2813 #define _MPWM2EN 0x02 2814 #define _PWM3EN_A 0x04 2815 #define _MPWM3EN 0x04 2816 #define _PWM4EN_A 0x08 2817 2818 //============================================================================== 2819 2820 2821 //============================================================================== 2822 // PWMLD Bits 2823 2824 extern __at(0x0D8F) __sfr PWMLD; 2825 2826 typedef union 2827 { 2828 struct 2829 { 2830 unsigned PWM1LDA_A : 1; 2831 unsigned PWM2LDA_A : 1; 2832 unsigned PWM3LDA_A : 1; 2833 unsigned PWM4LDA_A : 1; 2834 unsigned : 1; 2835 unsigned : 1; 2836 unsigned : 1; 2837 unsigned : 1; 2838 }; 2839 2840 struct 2841 { 2842 unsigned MPWM1LD : 1; 2843 unsigned MPWM2LD : 1; 2844 unsigned MPWM3LD : 1; 2845 unsigned : 1; 2846 unsigned : 1; 2847 unsigned : 1; 2848 unsigned : 1; 2849 unsigned : 1; 2850 }; 2851 } __PWMLDbits_t; 2852 2853 extern __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits; 2854 2855 #define _PWM1LDA_A 0x01 2856 #define _MPWM1LD 0x01 2857 #define _PWM2LDA_A 0x02 2858 #define _MPWM2LD 0x02 2859 #define _PWM3LDA_A 0x04 2860 #define _MPWM3LD 0x04 2861 #define _PWM4LDA_A 0x08 2862 2863 //============================================================================== 2864 2865 2866 //============================================================================== 2867 // PWMOUT Bits 2868 2869 extern __at(0x0D90) __sfr PWMOUT; 2870 2871 typedef union 2872 { 2873 struct 2874 { 2875 unsigned PWM1OUT_A : 1; 2876 unsigned PWM2OUT_A : 1; 2877 unsigned PWM3OUT_A : 1; 2878 unsigned PWM4OUT_A : 1; 2879 unsigned : 1; 2880 unsigned : 1; 2881 unsigned : 1; 2882 unsigned : 1; 2883 }; 2884 2885 struct 2886 { 2887 unsigned MPWM1OUT : 1; 2888 unsigned MPWM2OUT : 1; 2889 unsigned MPWM3OUT : 1; 2890 unsigned : 1; 2891 unsigned : 1; 2892 unsigned : 1; 2893 unsigned : 1; 2894 unsigned : 1; 2895 }; 2896 } __PWMOUTbits_t; 2897 2898 extern __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits; 2899 2900 #define _PWM1OUT_A 0x01 2901 #define _MPWM1OUT 0x01 2902 #define _PWM2OUT_A 0x02 2903 #define _MPWM2OUT 0x02 2904 #define _PWM3OUT_A 0x04 2905 #define _MPWM3OUT 0x04 2906 #define _PWM4OUT_A 0x08 2907 2908 //============================================================================== 2909 2910 extern __at(0x0D91) __sfr PWM1PH; 2911 2912 //============================================================================== 2913 // PWM1PHL Bits 2914 2915 extern __at(0x0D91) __sfr PWM1PHL; 2916 2917 typedef struct 2918 { 2919 unsigned PWM1PHL0 : 1; 2920 unsigned PWM1PHL1 : 1; 2921 unsigned PWM1PHL2 : 1; 2922 unsigned PWM1PHL3 : 1; 2923 unsigned PWM1PHL4 : 1; 2924 unsigned PWM1PHL5 : 1; 2925 unsigned PWM1PHL6 : 1; 2926 unsigned PWM1PHL7 : 1; 2927 } __PWM1PHLbits_t; 2928 2929 extern __at(0x0D91) volatile __PWM1PHLbits_t PWM1PHLbits; 2930 2931 #define _PWM1PHL0 0x01 2932 #define _PWM1PHL1 0x02 2933 #define _PWM1PHL2 0x04 2934 #define _PWM1PHL3 0x08 2935 #define _PWM1PHL4 0x10 2936 #define _PWM1PHL5 0x20 2937 #define _PWM1PHL6 0x40 2938 #define _PWM1PHL7 0x80 2939 2940 //============================================================================== 2941 2942 2943 //============================================================================== 2944 // PWM1PHH Bits 2945 2946 extern __at(0x0D92) __sfr PWM1PHH; 2947 2948 typedef struct 2949 { 2950 unsigned PWM1PHH0 : 1; 2951 unsigned PWM1PHH1 : 1; 2952 unsigned PWM1PHH2 : 1; 2953 unsigned PWM1PHH3 : 1; 2954 unsigned PWM1PHH4 : 1; 2955 unsigned PWM1PHH5 : 1; 2956 unsigned PWM1PHH6 : 1; 2957 unsigned PWM1PHH7 : 1; 2958 } __PWM1PHHbits_t; 2959 2960 extern __at(0x0D92) volatile __PWM1PHHbits_t PWM1PHHbits; 2961 2962 #define _PWM1PHH0 0x01 2963 #define _PWM1PHH1 0x02 2964 #define _PWM1PHH2 0x04 2965 #define _PWM1PHH3 0x08 2966 #define _PWM1PHH4 0x10 2967 #define _PWM1PHH5 0x20 2968 #define _PWM1PHH6 0x40 2969 #define _PWM1PHH7 0x80 2970 2971 //============================================================================== 2972 2973 extern __at(0x0D93) __sfr PWM1DC; 2974 2975 //============================================================================== 2976 // PWM1DCL Bits 2977 2978 extern __at(0x0D93) __sfr PWM1DCL; 2979 2980 typedef struct 2981 { 2982 unsigned PWM1DCL0 : 1; 2983 unsigned PWM1DCL1 : 1; 2984 unsigned PWM1DCL2 : 1; 2985 unsigned PWM1DCL3 : 1; 2986 unsigned PWM1DCL4 : 1; 2987 unsigned PWM1DCL5 : 1; 2988 unsigned PWM1DCL6 : 1; 2989 unsigned PWM1DCL7 : 1; 2990 } __PWM1DCLbits_t; 2991 2992 extern __at(0x0D93) volatile __PWM1DCLbits_t PWM1DCLbits; 2993 2994 #define _PWM1DCL0 0x01 2995 #define _PWM1DCL1 0x02 2996 #define _PWM1DCL2 0x04 2997 #define _PWM1DCL3 0x08 2998 #define _PWM1DCL4 0x10 2999 #define _PWM1DCL5 0x20 3000 #define _PWM1DCL6 0x40 3001 #define _PWM1DCL7 0x80 3002 3003 //============================================================================== 3004 3005 3006 //============================================================================== 3007 // PWM1DCH Bits 3008 3009 extern __at(0x0D94) __sfr PWM1DCH; 3010 3011 typedef struct 3012 { 3013 unsigned PWM1DCH0 : 1; 3014 unsigned PWM1DCH1 : 1; 3015 unsigned PWM1DCH2 : 1; 3016 unsigned PWM1DCH3 : 1; 3017 unsigned PWM1DCH4 : 1; 3018 unsigned PWM1DCH5 : 1; 3019 unsigned PWM1DCH6 : 1; 3020 unsigned PWM1DCH7 : 1; 3021 } __PWM1DCHbits_t; 3022 3023 extern __at(0x0D94) volatile __PWM1DCHbits_t PWM1DCHbits; 3024 3025 #define _PWM1DCH0 0x01 3026 #define _PWM1DCH1 0x02 3027 #define _PWM1DCH2 0x04 3028 #define _PWM1DCH3 0x08 3029 #define _PWM1DCH4 0x10 3030 #define _PWM1DCH5 0x20 3031 #define _PWM1DCH6 0x40 3032 #define _PWM1DCH7 0x80 3033 3034 //============================================================================== 3035 3036 extern __at(0x0D95) __sfr PWM1PR; 3037 3038 //============================================================================== 3039 // PWM1PRL Bits 3040 3041 extern __at(0x0D95) __sfr PWM1PRL; 3042 3043 typedef struct 3044 { 3045 unsigned PWM1PRL0 : 1; 3046 unsigned PWM1PRL1 : 1; 3047 unsigned PWM1PRL2 : 1; 3048 unsigned PWM1PRL3 : 1; 3049 unsigned PWM1PRL4 : 1; 3050 unsigned PWM1PRL5 : 1; 3051 unsigned PWM1PRL6 : 1; 3052 unsigned PWM1PRL7 : 1; 3053 } __PWM1PRLbits_t; 3054 3055 extern __at(0x0D95) volatile __PWM1PRLbits_t PWM1PRLbits; 3056 3057 #define _PWM1PRL0 0x01 3058 #define _PWM1PRL1 0x02 3059 #define _PWM1PRL2 0x04 3060 #define _PWM1PRL3 0x08 3061 #define _PWM1PRL4 0x10 3062 #define _PWM1PRL5 0x20 3063 #define _PWM1PRL6 0x40 3064 #define _PWM1PRL7 0x80 3065 3066 //============================================================================== 3067 3068 3069 //============================================================================== 3070 // PWM1PRH Bits 3071 3072 extern __at(0x0D96) __sfr PWM1PRH; 3073 3074 typedef struct 3075 { 3076 unsigned PWM1PRH0 : 1; 3077 unsigned PWM1PRH1 : 1; 3078 unsigned PWM1PRH2 : 1; 3079 unsigned PWM1PRH3 : 1; 3080 unsigned PWM1PRH4 : 1; 3081 unsigned PWM1PRH5 : 1; 3082 unsigned PWM1PRH6 : 1; 3083 unsigned PWM1PRH7 : 1; 3084 } __PWM1PRHbits_t; 3085 3086 extern __at(0x0D96) volatile __PWM1PRHbits_t PWM1PRHbits; 3087 3088 #define _PWM1PRH0 0x01 3089 #define _PWM1PRH1 0x02 3090 #define _PWM1PRH2 0x04 3091 #define _PWM1PRH3 0x08 3092 #define _PWM1PRH4 0x10 3093 #define _PWM1PRH5 0x20 3094 #define _PWM1PRH6 0x40 3095 #define _PWM1PRH7 0x80 3096 3097 //============================================================================== 3098 3099 extern __at(0x0D97) __sfr PWM1OF; 3100 3101 //============================================================================== 3102 // PWM1OFL Bits 3103 3104 extern __at(0x0D97) __sfr PWM1OFL; 3105 3106 typedef struct 3107 { 3108 unsigned PWM1OFL0 : 1; 3109 unsigned PWM1OFL1 : 1; 3110 unsigned PWM1OFL2 : 1; 3111 unsigned PWM1OFL3 : 1; 3112 unsigned PWM1OFL4 : 1; 3113 unsigned PWM1OFL5 : 1; 3114 unsigned PWM1OFL6 : 1; 3115 unsigned PWM1OFL7 : 1; 3116 } __PWM1OFLbits_t; 3117 3118 extern __at(0x0D97) volatile __PWM1OFLbits_t PWM1OFLbits; 3119 3120 #define _PWM1OFL0 0x01 3121 #define _PWM1OFL1 0x02 3122 #define _PWM1OFL2 0x04 3123 #define _PWM1OFL3 0x08 3124 #define _PWM1OFL4 0x10 3125 #define _PWM1OFL5 0x20 3126 #define _PWM1OFL6 0x40 3127 #define _PWM1OFL7 0x80 3128 3129 //============================================================================== 3130 3131 3132 //============================================================================== 3133 // PWM1OFH Bits 3134 3135 extern __at(0x0D98) __sfr PWM1OFH; 3136 3137 typedef struct 3138 { 3139 unsigned PWM1OFH0 : 1; 3140 unsigned PWM1OFH1 : 1; 3141 unsigned PWM1OFH2 : 1; 3142 unsigned PWM1OFH3 : 1; 3143 unsigned PWM1OFH4 : 1; 3144 unsigned PWM1OFH5 : 1; 3145 unsigned PWM1OFH6 : 1; 3146 unsigned PWM1OFH7 : 1; 3147 } __PWM1OFHbits_t; 3148 3149 extern __at(0x0D98) volatile __PWM1OFHbits_t PWM1OFHbits; 3150 3151 #define _PWM1OFH0 0x01 3152 #define _PWM1OFH1 0x02 3153 #define _PWM1OFH2 0x04 3154 #define _PWM1OFH3 0x08 3155 #define _PWM1OFH4 0x10 3156 #define _PWM1OFH5 0x20 3157 #define _PWM1OFH6 0x40 3158 #define _PWM1OFH7 0x80 3159 3160 //============================================================================== 3161 3162 extern __at(0x0D99) __sfr PWM1TMR; 3163 3164 //============================================================================== 3165 // PWM1TMRL Bits 3166 3167 extern __at(0x0D99) __sfr PWM1TMRL; 3168 3169 typedef struct 3170 { 3171 unsigned PWM1TMRL0 : 1; 3172 unsigned PWM1TMRL1 : 1; 3173 unsigned PWM1TMRL2 : 1; 3174 unsigned PWM1TMRL3 : 1; 3175 unsigned PWM1TMRL4 : 1; 3176 unsigned PWM1TMRL5 : 1; 3177 unsigned PWM1TMRL6 : 1; 3178 unsigned PWM1TMRL7 : 1; 3179 } __PWM1TMRLbits_t; 3180 3181 extern __at(0x0D99) volatile __PWM1TMRLbits_t PWM1TMRLbits; 3182 3183 #define _PWM1TMRL0 0x01 3184 #define _PWM1TMRL1 0x02 3185 #define _PWM1TMRL2 0x04 3186 #define _PWM1TMRL3 0x08 3187 #define _PWM1TMRL4 0x10 3188 #define _PWM1TMRL5 0x20 3189 #define _PWM1TMRL6 0x40 3190 #define _PWM1TMRL7 0x80 3191 3192 //============================================================================== 3193 3194 3195 //============================================================================== 3196 // PWM1TMRH Bits 3197 3198 extern __at(0x0D9A) __sfr PWM1TMRH; 3199 3200 typedef struct 3201 { 3202 unsigned PWM1TMRH0 : 1; 3203 unsigned PWM1TMRH1 : 1; 3204 unsigned PWM1TMRH2 : 1; 3205 unsigned PWM1TMRH3 : 1; 3206 unsigned PWM1TMRH4 : 1; 3207 unsigned PWM1TMRH5 : 1; 3208 unsigned PWM1TMRH6 : 1; 3209 unsigned PWM1TMRH7 : 1; 3210 } __PWM1TMRHbits_t; 3211 3212 extern __at(0x0D9A) volatile __PWM1TMRHbits_t PWM1TMRHbits; 3213 3214 #define _PWM1TMRH0 0x01 3215 #define _PWM1TMRH1 0x02 3216 #define _PWM1TMRH2 0x04 3217 #define _PWM1TMRH3 0x08 3218 #define _PWM1TMRH4 0x10 3219 #define _PWM1TMRH5 0x20 3220 #define _PWM1TMRH6 0x40 3221 #define _PWM1TMRH7 0x80 3222 3223 //============================================================================== 3224 3225 3226 //============================================================================== 3227 // PWM1CON Bits 3228 3229 extern __at(0x0D9B) __sfr PWM1CON; 3230 3231 typedef union 3232 { 3233 struct 3234 { 3235 unsigned : 1; 3236 unsigned : 1; 3237 unsigned PWM1MODE0 : 1; 3238 unsigned PWM1MODE1 : 1; 3239 unsigned POL : 1; 3240 unsigned OUT : 1; 3241 unsigned OE : 1; 3242 unsigned EN : 1; 3243 }; 3244 3245 struct 3246 { 3247 unsigned : 1; 3248 unsigned : 1; 3249 unsigned MODE0 : 1; 3250 unsigned MODE1 : 1; 3251 unsigned PWM1POL : 1; 3252 unsigned PWM1OUT : 1; 3253 unsigned PWM1OE : 1; 3254 unsigned PWM1EN : 1; 3255 }; 3256 3257 struct 3258 { 3259 unsigned : 2; 3260 unsigned PWM1MODE : 2; 3261 unsigned : 4; 3262 }; 3263 3264 struct 3265 { 3266 unsigned : 2; 3267 unsigned MODE : 2; 3268 unsigned : 4; 3269 }; 3270 } __PWM1CONbits_t; 3271 3272 extern __at(0x0D9B) volatile __PWM1CONbits_t PWM1CONbits; 3273 3274 #define _PWM1MODE0 0x04 3275 #define _MODE0 0x04 3276 #define _PWM1MODE1 0x08 3277 #define _MODE1 0x08 3278 #define _POL 0x10 3279 #define _PWM1POL 0x10 3280 #define _OUT 0x20 3281 #define _PWM1OUT 0x20 3282 #define _OE 0x40 3283 #define _PWM1OE 0x40 3284 #define _EN 0x80 3285 #define _PWM1EN 0x80 3286 3287 //============================================================================== 3288 3289 3290 //============================================================================== 3291 // PWM1INTCON Bits 3292 3293 extern __at(0x0D9C) __sfr PWM1INTCON; 3294 3295 typedef union 3296 { 3297 struct 3298 { 3299 unsigned PRIE : 1; 3300 unsigned DCIE : 1; 3301 unsigned PHIE : 1; 3302 unsigned OFIE : 1; 3303 unsigned : 1; 3304 unsigned : 1; 3305 unsigned : 1; 3306 unsigned : 1; 3307 }; 3308 3309 struct 3310 { 3311 unsigned PWM1PRIE : 1; 3312 unsigned PWM1DCIE : 1; 3313 unsigned PWM1PHIE : 1; 3314 unsigned PWM1OFIE : 1; 3315 unsigned : 1; 3316 unsigned : 1; 3317 unsigned : 1; 3318 unsigned : 1; 3319 }; 3320 } __PWM1INTCONbits_t; 3321 3322 extern __at(0x0D9C) volatile __PWM1INTCONbits_t PWM1INTCONbits; 3323 3324 #define _PRIE 0x01 3325 #define _PWM1PRIE 0x01 3326 #define _DCIE 0x02 3327 #define _PWM1DCIE 0x02 3328 #define _PHIE 0x04 3329 #define _PWM1PHIE 0x04 3330 #define _OFIE 0x08 3331 #define _PWM1OFIE 0x08 3332 3333 //============================================================================== 3334 3335 3336 //============================================================================== 3337 // PWM1INTE Bits 3338 3339 extern __at(0x0D9C) __sfr PWM1INTE; 3340 3341 typedef union 3342 { 3343 struct 3344 { 3345 unsigned PRIE : 1; 3346 unsigned DCIE : 1; 3347 unsigned PHIE : 1; 3348 unsigned OFIE : 1; 3349 unsigned : 1; 3350 unsigned : 1; 3351 unsigned : 1; 3352 unsigned : 1; 3353 }; 3354 3355 struct 3356 { 3357 unsigned PWM1PRIE : 1; 3358 unsigned PWM1DCIE : 1; 3359 unsigned PWM1PHIE : 1; 3360 unsigned PWM1OFIE : 1; 3361 unsigned : 1; 3362 unsigned : 1; 3363 unsigned : 1; 3364 unsigned : 1; 3365 }; 3366 } __PWM1INTEbits_t; 3367 3368 extern __at(0x0D9C) volatile __PWM1INTEbits_t PWM1INTEbits; 3369 3370 #define _PWM1INTE_PRIE 0x01 3371 #define _PWM1INTE_PWM1PRIE 0x01 3372 #define _PWM1INTE_DCIE 0x02 3373 #define _PWM1INTE_PWM1DCIE 0x02 3374 #define _PWM1INTE_PHIE 0x04 3375 #define _PWM1INTE_PWM1PHIE 0x04 3376 #define _PWM1INTE_OFIE 0x08 3377 #define _PWM1INTE_PWM1OFIE 0x08 3378 3379 //============================================================================== 3380 3381 3382 //============================================================================== 3383 // PWM1INTF Bits 3384 3385 extern __at(0x0D9D) __sfr PWM1INTF; 3386 3387 typedef union 3388 { 3389 struct 3390 { 3391 unsigned PRIF : 1; 3392 unsigned DCIF : 1; 3393 unsigned PHIF : 1; 3394 unsigned OFIF : 1; 3395 unsigned : 1; 3396 unsigned : 1; 3397 unsigned : 1; 3398 unsigned : 1; 3399 }; 3400 3401 struct 3402 { 3403 unsigned PWM1PRIF : 1; 3404 unsigned PWM1DCIF : 1; 3405 unsigned PWM1PHIF : 1; 3406 unsigned PWM1OFIF : 1; 3407 unsigned : 1; 3408 unsigned : 1; 3409 unsigned : 1; 3410 unsigned : 1; 3411 }; 3412 } __PWM1INTFbits_t; 3413 3414 extern __at(0x0D9D) volatile __PWM1INTFbits_t PWM1INTFbits; 3415 3416 #define _PRIF 0x01 3417 #define _PWM1PRIF 0x01 3418 #define _DCIF 0x02 3419 #define _PWM1DCIF 0x02 3420 #define _PHIF 0x04 3421 #define _PWM1PHIF 0x04 3422 #define _OFIF 0x08 3423 #define _PWM1OFIF 0x08 3424 3425 //============================================================================== 3426 3427 3428 //============================================================================== 3429 // PWM1INTFLG Bits 3430 3431 extern __at(0x0D9D) __sfr PWM1INTFLG; 3432 3433 typedef union 3434 { 3435 struct 3436 { 3437 unsigned PRIF : 1; 3438 unsigned DCIF : 1; 3439 unsigned PHIF : 1; 3440 unsigned OFIF : 1; 3441 unsigned : 1; 3442 unsigned : 1; 3443 unsigned : 1; 3444 unsigned : 1; 3445 }; 3446 3447 struct 3448 { 3449 unsigned PWM1PRIF : 1; 3450 unsigned PWM1DCIF : 1; 3451 unsigned PWM1PHIF : 1; 3452 unsigned PWM1OFIF : 1; 3453 unsigned : 1; 3454 unsigned : 1; 3455 unsigned : 1; 3456 unsigned : 1; 3457 }; 3458 } __PWM1INTFLGbits_t; 3459 3460 extern __at(0x0D9D) volatile __PWM1INTFLGbits_t PWM1INTFLGbits; 3461 3462 #define _PWM1INTFLG_PRIF 0x01 3463 #define _PWM1INTFLG_PWM1PRIF 0x01 3464 #define _PWM1INTFLG_DCIF 0x02 3465 #define _PWM1INTFLG_PWM1DCIF 0x02 3466 #define _PWM1INTFLG_PHIF 0x04 3467 #define _PWM1INTFLG_PWM1PHIF 0x04 3468 #define _PWM1INTFLG_OFIF 0x08 3469 #define _PWM1INTFLG_PWM1OFIF 0x08 3470 3471 //============================================================================== 3472 3473 3474 //============================================================================== 3475 // PWM1CLKCON Bits 3476 3477 extern __at(0x0D9E) __sfr PWM1CLKCON; 3478 3479 typedef union 3480 { 3481 struct 3482 { 3483 unsigned PWM1CS0 : 1; 3484 unsigned PWM1CS1 : 1; 3485 unsigned : 1; 3486 unsigned : 1; 3487 unsigned PWM1PS0 : 1; 3488 unsigned PWM1PS1 : 1; 3489 unsigned PWM1PS2 : 1; 3490 unsigned : 1; 3491 }; 3492 3493 struct 3494 { 3495 unsigned CS0 : 1; 3496 unsigned CS1 : 1; 3497 unsigned : 1; 3498 unsigned : 1; 3499 unsigned PS0 : 1; 3500 unsigned PS1 : 1; 3501 unsigned PS2 : 1; 3502 unsigned : 1; 3503 }; 3504 3505 struct 3506 { 3507 unsigned PWM1CS : 2; 3508 unsigned : 6; 3509 }; 3510 3511 struct 3512 { 3513 unsigned CS : 2; 3514 unsigned : 6; 3515 }; 3516 3517 struct 3518 { 3519 unsigned : 4; 3520 unsigned PWM1PS : 3; 3521 unsigned : 1; 3522 }; 3523 3524 struct 3525 { 3526 unsigned : 4; 3527 unsigned PS : 3; 3528 unsigned : 1; 3529 }; 3530 } __PWM1CLKCONbits_t; 3531 3532 extern __at(0x0D9E) volatile __PWM1CLKCONbits_t PWM1CLKCONbits; 3533 3534 #define _PWM1CLKCON_PWM1CS0 0x01 3535 #define _PWM1CLKCON_CS0 0x01 3536 #define _PWM1CLKCON_PWM1CS1 0x02 3537 #define _PWM1CLKCON_CS1 0x02 3538 #define _PWM1CLKCON_PWM1PS0 0x10 3539 #define _PWM1CLKCON_PS0 0x10 3540 #define _PWM1CLKCON_PWM1PS1 0x20 3541 #define _PWM1CLKCON_PS1 0x20 3542 #define _PWM1CLKCON_PWM1PS2 0x40 3543 #define _PWM1CLKCON_PS2 0x40 3544 3545 //============================================================================== 3546 3547 3548 //============================================================================== 3549 // PWM1LDCON Bits 3550 3551 extern __at(0x0D9F) __sfr PWM1LDCON; 3552 3553 typedef union 3554 { 3555 struct 3556 { 3557 unsigned PWM1LDS0 : 1; 3558 unsigned PWM1LDS1 : 1; 3559 unsigned : 1; 3560 unsigned : 1; 3561 unsigned : 1; 3562 unsigned : 1; 3563 unsigned LDT : 1; 3564 unsigned LDA : 1; 3565 }; 3566 3567 struct 3568 { 3569 unsigned LDS0 : 1; 3570 unsigned LDS1 : 1; 3571 unsigned : 1; 3572 unsigned : 1; 3573 unsigned : 1; 3574 unsigned : 1; 3575 unsigned PWM1LDM : 1; 3576 unsigned PWM1LD : 1; 3577 }; 3578 3579 struct 3580 { 3581 unsigned PWM1LDS : 2; 3582 unsigned : 6; 3583 }; 3584 3585 struct 3586 { 3587 unsigned LDS : 2; 3588 unsigned : 6; 3589 }; 3590 } __PWM1LDCONbits_t; 3591 3592 extern __at(0x0D9F) volatile __PWM1LDCONbits_t PWM1LDCONbits; 3593 3594 #define _PWM1LDS0 0x01 3595 #define _LDS0 0x01 3596 #define _PWM1LDS1 0x02 3597 #define _LDS1 0x02 3598 #define _LDT 0x40 3599 #define _PWM1LDM 0x40 3600 #define _LDA 0x80 3601 #define _PWM1LD 0x80 3602 3603 //============================================================================== 3604 3605 3606 //============================================================================== 3607 // PWM1OFCON Bits 3608 3609 extern __at(0x0DA0) __sfr PWM1OFCON; 3610 3611 typedef union 3612 { 3613 struct 3614 { 3615 unsigned PWM1OFS0 : 1; 3616 unsigned PWM1OFS1 : 1; 3617 unsigned : 1; 3618 unsigned : 1; 3619 unsigned OFO : 1; 3620 unsigned PWM1OFM0 : 1; 3621 unsigned PWM1OFM1 : 1; 3622 unsigned : 1; 3623 }; 3624 3625 struct 3626 { 3627 unsigned OFS0 : 1; 3628 unsigned OFS1 : 1; 3629 unsigned : 1; 3630 unsigned : 1; 3631 unsigned PWM1OFMC : 1; 3632 unsigned OFM0 : 1; 3633 unsigned OFM1 : 1; 3634 unsigned : 1; 3635 }; 3636 3637 struct 3638 { 3639 unsigned OFS : 2; 3640 unsigned : 6; 3641 }; 3642 3643 struct 3644 { 3645 unsigned PWM1OFS : 2; 3646 unsigned : 6; 3647 }; 3648 3649 struct 3650 { 3651 unsigned : 5; 3652 unsigned OFM : 2; 3653 unsigned : 1; 3654 }; 3655 3656 struct 3657 { 3658 unsigned : 5; 3659 unsigned PWM1OFM : 2; 3660 unsigned : 1; 3661 }; 3662 } __PWM1OFCONbits_t; 3663 3664 extern __at(0x0DA0) volatile __PWM1OFCONbits_t PWM1OFCONbits; 3665 3666 #define _PWM1OFS0 0x01 3667 #define _OFS0 0x01 3668 #define _PWM1OFS1 0x02 3669 #define _OFS1 0x02 3670 #define _OFO 0x10 3671 #define _PWM1OFMC 0x10 3672 #define _PWM1OFM0 0x20 3673 #define _OFM0 0x20 3674 #define _PWM1OFM1 0x40 3675 #define _OFM1 0x40 3676 3677 //============================================================================== 3678 3679 extern __at(0x0DA1) __sfr PWM2PH; 3680 3681 //============================================================================== 3682 // PWM2PHL Bits 3683 3684 extern __at(0x0DA1) __sfr PWM2PHL; 3685 3686 typedef struct 3687 { 3688 unsigned PWM2PHL0 : 1; 3689 unsigned PWM2PHL1 : 1; 3690 unsigned PWM2PHL2 : 1; 3691 unsigned PWM2PHL3 : 1; 3692 unsigned PWM2PHL4 : 1; 3693 unsigned PWM2PHL5 : 1; 3694 unsigned PWM2PHL6 : 1; 3695 unsigned PWM2PHL7 : 1; 3696 } __PWM2PHLbits_t; 3697 3698 extern __at(0x0DA1) volatile __PWM2PHLbits_t PWM2PHLbits; 3699 3700 #define _PWM2PHL0 0x01 3701 #define _PWM2PHL1 0x02 3702 #define _PWM2PHL2 0x04 3703 #define _PWM2PHL3 0x08 3704 #define _PWM2PHL4 0x10 3705 #define _PWM2PHL5 0x20 3706 #define _PWM2PHL6 0x40 3707 #define _PWM2PHL7 0x80 3708 3709 //============================================================================== 3710 3711 3712 //============================================================================== 3713 // PWM2PHH Bits 3714 3715 extern __at(0x0DA2) __sfr PWM2PHH; 3716 3717 typedef struct 3718 { 3719 unsigned PWM2PHH0 : 1; 3720 unsigned PWM2PHH1 : 1; 3721 unsigned PWM2PHH2 : 1; 3722 unsigned PWM2PHH3 : 1; 3723 unsigned PWM2PHH4 : 1; 3724 unsigned PWM2PHH5 : 1; 3725 unsigned PWM2PHH6 : 1; 3726 unsigned PWM2PHH7 : 1; 3727 } __PWM2PHHbits_t; 3728 3729 extern __at(0x0DA2) volatile __PWM2PHHbits_t PWM2PHHbits; 3730 3731 #define _PWM2PHH0 0x01 3732 #define _PWM2PHH1 0x02 3733 #define _PWM2PHH2 0x04 3734 #define _PWM2PHH3 0x08 3735 #define _PWM2PHH4 0x10 3736 #define _PWM2PHH5 0x20 3737 #define _PWM2PHH6 0x40 3738 #define _PWM2PHH7 0x80 3739 3740 //============================================================================== 3741 3742 extern __at(0x0DA3) __sfr PWM2DC; 3743 3744 //============================================================================== 3745 // PWM2DCL Bits 3746 3747 extern __at(0x0DA3) __sfr PWM2DCL; 3748 3749 typedef struct 3750 { 3751 unsigned PWM2DCL0 : 1; 3752 unsigned PWM2DCL1 : 1; 3753 unsigned PWM2DCL2 : 1; 3754 unsigned PWM2DCL3 : 1; 3755 unsigned PWM2DCL4 : 1; 3756 unsigned PWM2DCL5 : 1; 3757 unsigned PWM2DCL6 : 1; 3758 unsigned PWM2DCL7 : 1; 3759 } __PWM2DCLbits_t; 3760 3761 extern __at(0x0DA3) volatile __PWM2DCLbits_t PWM2DCLbits; 3762 3763 #define _PWM2DCL0 0x01 3764 #define _PWM2DCL1 0x02 3765 #define _PWM2DCL2 0x04 3766 #define _PWM2DCL3 0x08 3767 #define _PWM2DCL4 0x10 3768 #define _PWM2DCL5 0x20 3769 #define _PWM2DCL6 0x40 3770 #define _PWM2DCL7 0x80 3771 3772 //============================================================================== 3773 3774 3775 //============================================================================== 3776 // PWM2DCH Bits 3777 3778 extern __at(0x0DA4) __sfr PWM2DCH; 3779 3780 typedef struct 3781 { 3782 unsigned PWM2DCH0 : 1; 3783 unsigned PWM2DCH1 : 1; 3784 unsigned PWM2DCH2 : 1; 3785 unsigned PWM2DCH3 : 1; 3786 unsigned PWM2DCH4 : 1; 3787 unsigned PWM2DCH5 : 1; 3788 unsigned PWM2DCH6 : 1; 3789 unsigned PWM2DCH7 : 1; 3790 } __PWM2DCHbits_t; 3791 3792 extern __at(0x0DA4) volatile __PWM2DCHbits_t PWM2DCHbits; 3793 3794 #define _PWM2DCH0 0x01 3795 #define _PWM2DCH1 0x02 3796 #define _PWM2DCH2 0x04 3797 #define _PWM2DCH3 0x08 3798 #define _PWM2DCH4 0x10 3799 #define _PWM2DCH5 0x20 3800 #define _PWM2DCH6 0x40 3801 #define _PWM2DCH7 0x80 3802 3803 //============================================================================== 3804 3805 extern __at(0x0DA5) __sfr PWM2PR; 3806 3807 //============================================================================== 3808 // PWM2PRL Bits 3809 3810 extern __at(0x0DA5) __sfr PWM2PRL; 3811 3812 typedef struct 3813 { 3814 unsigned PWM2PRL0 : 1; 3815 unsigned PWM2PRL1 : 1; 3816 unsigned PWM2PRL2 : 1; 3817 unsigned PWM2PRL3 : 1; 3818 unsigned PWM2PRL4 : 1; 3819 unsigned PWM2PRL5 : 1; 3820 unsigned PWM2PRL6 : 1; 3821 unsigned PWM2PRL7 : 1; 3822 } __PWM2PRLbits_t; 3823 3824 extern __at(0x0DA5) volatile __PWM2PRLbits_t PWM2PRLbits; 3825 3826 #define _PWM2PRL0 0x01 3827 #define _PWM2PRL1 0x02 3828 #define _PWM2PRL2 0x04 3829 #define _PWM2PRL3 0x08 3830 #define _PWM2PRL4 0x10 3831 #define _PWM2PRL5 0x20 3832 #define _PWM2PRL6 0x40 3833 #define _PWM2PRL7 0x80 3834 3835 //============================================================================== 3836 3837 3838 //============================================================================== 3839 // PWM2PRH Bits 3840 3841 extern __at(0x0DA6) __sfr PWM2PRH; 3842 3843 typedef struct 3844 { 3845 unsigned PWM2PRH0 : 1; 3846 unsigned PWM2PRH1 : 1; 3847 unsigned PWM2PRH2 : 1; 3848 unsigned PWM2PRH3 : 1; 3849 unsigned PWM2PRH4 : 1; 3850 unsigned PWM2PRH5 : 1; 3851 unsigned PWM2PRH6 : 1; 3852 unsigned PWM2PRH7 : 1; 3853 } __PWM2PRHbits_t; 3854 3855 extern __at(0x0DA6) volatile __PWM2PRHbits_t PWM2PRHbits; 3856 3857 #define _PWM2PRH0 0x01 3858 #define _PWM2PRH1 0x02 3859 #define _PWM2PRH2 0x04 3860 #define _PWM2PRH3 0x08 3861 #define _PWM2PRH4 0x10 3862 #define _PWM2PRH5 0x20 3863 #define _PWM2PRH6 0x40 3864 #define _PWM2PRH7 0x80 3865 3866 //============================================================================== 3867 3868 extern __at(0x0DA7) __sfr PWM2OF; 3869 3870 //============================================================================== 3871 // PWM2OFL Bits 3872 3873 extern __at(0x0DA7) __sfr PWM2OFL; 3874 3875 typedef struct 3876 { 3877 unsigned PWM2OFL0 : 1; 3878 unsigned PWM2OFL1 : 1; 3879 unsigned PWM2OFL2 : 1; 3880 unsigned PWM2OFL3 : 1; 3881 unsigned PWM2OFL4 : 1; 3882 unsigned PWM2OFL5 : 1; 3883 unsigned PWM2OFL6 : 1; 3884 unsigned PWM2OFL7 : 1; 3885 } __PWM2OFLbits_t; 3886 3887 extern __at(0x0DA7) volatile __PWM2OFLbits_t PWM2OFLbits; 3888 3889 #define _PWM2OFL0 0x01 3890 #define _PWM2OFL1 0x02 3891 #define _PWM2OFL2 0x04 3892 #define _PWM2OFL3 0x08 3893 #define _PWM2OFL4 0x10 3894 #define _PWM2OFL5 0x20 3895 #define _PWM2OFL6 0x40 3896 #define _PWM2OFL7 0x80 3897 3898 //============================================================================== 3899 3900 3901 //============================================================================== 3902 // PWM2OFH Bits 3903 3904 extern __at(0x0DA8) __sfr PWM2OFH; 3905 3906 typedef struct 3907 { 3908 unsigned PWM2OFH0 : 1; 3909 unsigned PWM2OFH1 : 1; 3910 unsigned PWM2OFH2 : 1; 3911 unsigned PWM2OFH3 : 1; 3912 unsigned PWM2OFH4 : 1; 3913 unsigned PWM2OFH5 : 1; 3914 unsigned PWM2OFH6 : 1; 3915 unsigned PWM2OFH7 : 1; 3916 } __PWM2OFHbits_t; 3917 3918 extern __at(0x0DA8) volatile __PWM2OFHbits_t PWM2OFHbits; 3919 3920 #define _PWM2OFH0 0x01 3921 #define _PWM2OFH1 0x02 3922 #define _PWM2OFH2 0x04 3923 #define _PWM2OFH3 0x08 3924 #define _PWM2OFH4 0x10 3925 #define _PWM2OFH5 0x20 3926 #define _PWM2OFH6 0x40 3927 #define _PWM2OFH7 0x80 3928 3929 //============================================================================== 3930 3931 extern __at(0x0DA9) __sfr PWM2TMR; 3932 3933 //============================================================================== 3934 // PWM2TMRL Bits 3935 3936 extern __at(0x0DA9) __sfr PWM2TMRL; 3937 3938 typedef struct 3939 { 3940 unsigned PWM2TMRL0 : 1; 3941 unsigned PWM2TMRL1 : 1; 3942 unsigned PWM2TMRL2 : 1; 3943 unsigned PWM2TMRL3 : 1; 3944 unsigned PWM2TMRL4 : 1; 3945 unsigned PWM2TMRL5 : 1; 3946 unsigned PWM2TMRL6 : 1; 3947 unsigned PWM2TMRL7 : 1; 3948 } __PWM2TMRLbits_t; 3949 3950 extern __at(0x0DA9) volatile __PWM2TMRLbits_t PWM2TMRLbits; 3951 3952 #define _PWM2TMRL0 0x01 3953 #define _PWM2TMRL1 0x02 3954 #define _PWM2TMRL2 0x04 3955 #define _PWM2TMRL3 0x08 3956 #define _PWM2TMRL4 0x10 3957 #define _PWM2TMRL5 0x20 3958 #define _PWM2TMRL6 0x40 3959 #define _PWM2TMRL7 0x80 3960 3961 //============================================================================== 3962 3963 3964 //============================================================================== 3965 // PWM2TMRH Bits 3966 3967 extern __at(0x0DAA) __sfr PWM2TMRH; 3968 3969 typedef struct 3970 { 3971 unsigned PWM2TMRH0 : 1; 3972 unsigned PWM2TMRH1 : 1; 3973 unsigned PWM2TMRH2 : 1; 3974 unsigned PWM2TMRH3 : 1; 3975 unsigned PWM2TMRH4 : 1; 3976 unsigned PWM2TMRH5 : 1; 3977 unsigned PWM2TMRH6 : 1; 3978 unsigned PWM2TMRH7 : 1; 3979 } __PWM2TMRHbits_t; 3980 3981 extern __at(0x0DAA) volatile __PWM2TMRHbits_t PWM2TMRHbits; 3982 3983 #define _PWM2TMRH0 0x01 3984 #define _PWM2TMRH1 0x02 3985 #define _PWM2TMRH2 0x04 3986 #define _PWM2TMRH3 0x08 3987 #define _PWM2TMRH4 0x10 3988 #define _PWM2TMRH5 0x20 3989 #define _PWM2TMRH6 0x40 3990 #define _PWM2TMRH7 0x80 3991 3992 //============================================================================== 3993 3994 3995 //============================================================================== 3996 // PWM2CON Bits 3997 3998 extern __at(0x0DAB) __sfr PWM2CON; 3999 4000 typedef union 4001 { 4002 struct 4003 { 4004 unsigned : 1; 4005 unsigned : 1; 4006 unsigned PWM2MODE0 : 1; 4007 unsigned PWM2MODE1 : 1; 4008 unsigned POL : 1; 4009 unsigned OUT : 1; 4010 unsigned OE : 1; 4011 unsigned EN : 1; 4012 }; 4013 4014 struct 4015 { 4016 unsigned : 1; 4017 unsigned : 1; 4018 unsigned MODE0 : 1; 4019 unsigned MODE1 : 1; 4020 unsigned PWM2POL : 1; 4021 unsigned PWM2OUT : 1; 4022 unsigned PWM2OE : 1; 4023 unsigned PWM2EN : 1; 4024 }; 4025 4026 struct 4027 { 4028 unsigned : 2; 4029 unsigned MODE : 2; 4030 unsigned : 4; 4031 }; 4032 4033 struct 4034 { 4035 unsigned : 2; 4036 unsigned PWM2MODE : 2; 4037 unsigned : 4; 4038 }; 4039 } __PWM2CONbits_t; 4040 4041 extern __at(0x0DAB) volatile __PWM2CONbits_t PWM2CONbits; 4042 4043 #define _PWM2CON_PWM2MODE0 0x04 4044 #define _PWM2CON_MODE0 0x04 4045 #define _PWM2CON_PWM2MODE1 0x08 4046 #define _PWM2CON_MODE1 0x08 4047 #define _PWM2CON_POL 0x10 4048 #define _PWM2CON_PWM2POL 0x10 4049 #define _PWM2CON_OUT 0x20 4050 #define _PWM2CON_PWM2OUT 0x20 4051 #define _PWM2CON_OE 0x40 4052 #define _PWM2CON_PWM2OE 0x40 4053 #define _PWM2CON_EN 0x80 4054 #define _PWM2CON_PWM2EN 0x80 4055 4056 //============================================================================== 4057 4058 4059 //============================================================================== 4060 // PWM2INTCON Bits 4061 4062 extern __at(0x0DAC) __sfr PWM2INTCON; 4063 4064 typedef union 4065 { 4066 struct 4067 { 4068 unsigned PRIE : 1; 4069 unsigned DCIE : 1; 4070 unsigned PHIE : 1; 4071 unsigned OFIE : 1; 4072 unsigned : 1; 4073 unsigned : 1; 4074 unsigned : 1; 4075 unsigned : 1; 4076 }; 4077 4078 struct 4079 { 4080 unsigned PWM2PRIE : 1; 4081 unsigned PWM2DCIE : 1; 4082 unsigned PWM2PHIE : 1; 4083 unsigned PWM2OFIE : 1; 4084 unsigned : 1; 4085 unsigned : 1; 4086 unsigned : 1; 4087 unsigned : 1; 4088 }; 4089 } __PWM2INTCONbits_t; 4090 4091 extern __at(0x0DAC) volatile __PWM2INTCONbits_t PWM2INTCONbits; 4092 4093 #define _PWM2INTCON_PRIE 0x01 4094 #define _PWM2INTCON_PWM2PRIE 0x01 4095 #define _PWM2INTCON_DCIE 0x02 4096 #define _PWM2INTCON_PWM2DCIE 0x02 4097 #define _PWM2INTCON_PHIE 0x04 4098 #define _PWM2INTCON_PWM2PHIE 0x04 4099 #define _PWM2INTCON_OFIE 0x08 4100 #define _PWM2INTCON_PWM2OFIE 0x08 4101 4102 //============================================================================== 4103 4104 4105 //============================================================================== 4106 // PWM2INTE Bits 4107 4108 extern __at(0x0DAC) __sfr PWM2INTE; 4109 4110 typedef union 4111 { 4112 struct 4113 { 4114 unsigned PRIE : 1; 4115 unsigned DCIE : 1; 4116 unsigned PHIE : 1; 4117 unsigned OFIE : 1; 4118 unsigned : 1; 4119 unsigned : 1; 4120 unsigned : 1; 4121 unsigned : 1; 4122 }; 4123 4124 struct 4125 { 4126 unsigned PWM2PRIE : 1; 4127 unsigned PWM2DCIE : 1; 4128 unsigned PWM2PHIE : 1; 4129 unsigned PWM2OFIE : 1; 4130 unsigned : 1; 4131 unsigned : 1; 4132 unsigned : 1; 4133 unsigned : 1; 4134 }; 4135 } __PWM2INTEbits_t; 4136 4137 extern __at(0x0DAC) volatile __PWM2INTEbits_t PWM2INTEbits; 4138 4139 #define _PWM2INTE_PRIE 0x01 4140 #define _PWM2INTE_PWM2PRIE 0x01 4141 #define _PWM2INTE_DCIE 0x02 4142 #define _PWM2INTE_PWM2DCIE 0x02 4143 #define _PWM2INTE_PHIE 0x04 4144 #define _PWM2INTE_PWM2PHIE 0x04 4145 #define _PWM2INTE_OFIE 0x08 4146 #define _PWM2INTE_PWM2OFIE 0x08 4147 4148 //============================================================================== 4149 4150 4151 //============================================================================== 4152 // PWM2INTF Bits 4153 4154 extern __at(0x0DAD) __sfr PWM2INTF; 4155 4156 typedef union 4157 { 4158 struct 4159 { 4160 unsigned PRIF : 1; 4161 unsigned DCIF : 1; 4162 unsigned PHIF : 1; 4163 unsigned OFIF : 1; 4164 unsigned : 1; 4165 unsigned : 1; 4166 unsigned : 1; 4167 unsigned : 1; 4168 }; 4169 4170 struct 4171 { 4172 unsigned PWM2PRIF : 1; 4173 unsigned PWM2DCIF : 1; 4174 unsigned PWM2PHIF : 1; 4175 unsigned PWM2OFIF : 1; 4176 unsigned : 1; 4177 unsigned : 1; 4178 unsigned : 1; 4179 unsigned : 1; 4180 }; 4181 } __PWM2INTFbits_t; 4182 4183 extern __at(0x0DAD) volatile __PWM2INTFbits_t PWM2INTFbits; 4184 4185 #define _PWM2INTF_PRIF 0x01 4186 #define _PWM2INTF_PWM2PRIF 0x01 4187 #define _PWM2INTF_DCIF 0x02 4188 #define _PWM2INTF_PWM2DCIF 0x02 4189 #define _PWM2INTF_PHIF 0x04 4190 #define _PWM2INTF_PWM2PHIF 0x04 4191 #define _PWM2INTF_OFIF 0x08 4192 #define _PWM2INTF_PWM2OFIF 0x08 4193 4194 //============================================================================== 4195 4196 4197 //============================================================================== 4198 // PWM2INTFLG Bits 4199 4200 extern __at(0x0DAD) __sfr PWM2INTFLG; 4201 4202 typedef union 4203 { 4204 struct 4205 { 4206 unsigned PRIF : 1; 4207 unsigned DCIF : 1; 4208 unsigned PHIF : 1; 4209 unsigned OFIF : 1; 4210 unsigned : 1; 4211 unsigned : 1; 4212 unsigned : 1; 4213 unsigned : 1; 4214 }; 4215 4216 struct 4217 { 4218 unsigned PWM2PRIF : 1; 4219 unsigned PWM2DCIF : 1; 4220 unsigned PWM2PHIF : 1; 4221 unsigned PWM2OFIF : 1; 4222 unsigned : 1; 4223 unsigned : 1; 4224 unsigned : 1; 4225 unsigned : 1; 4226 }; 4227 } __PWM2INTFLGbits_t; 4228 4229 extern __at(0x0DAD) volatile __PWM2INTFLGbits_t PWM2INTFLGbits; 4230 4231 #define _PWM2INTFLG_PRIF 0x01 4232 #define _PWM2INTFLG_PWM2PRIF 0x01 4233 #define _PWM2INTFLG_DCIF 0x02 4234 #define _PWM2INTFLG_PWM2DCIF 0x02 4235 #define _PWM2INTFLG_PHIF 0x04 4236 #define _PWM2INTFLG_PWM2PHIF 0x04 4237 #define _PWM2INTFLG_OFIF 0x08 4238 #define _PWM2INTFLG_PWM2OFIF 0x08 4239 4240 //============================================================================== 4241 4242 4243 //============================================================================== 4244 // PWM2CLKCON Bits 4245 4246 extern __at(0x0DAE) __sfr PWM2CLKCON; 4247 4248 typedef union 4249 { 4250 struct 4251 { 4252 unsigned PWM2CS0 : 1; 4253 unsigned PWM2CS1 : 1; 4254 unsigned : 1; 4255 unsigned : 1; 4256 unsigned PWM2PS0 : 1; 4257 unsigned PWM2PS1 : 1; 4258 unsigned PWM2PS2 : 1; 4259 unsigned : 1; 4260 }; 4261 4262 struct 4263 { 4264 unsigned CS0 : 1; 4265 unsigned CS1 : 1; 4266 unsigned : 1; 4267 unsigned : 1; 4268 unsigned PS0 : 1; 4269 unsigned PS1 : 1; 4270 unsigned PS2 : 1; 4271 unsigned : 1; 4272 }; 4273 4274 struct 4275 { 4276 unsigned PWM2CS : 2; 4277 unsigned : 6; 4278 }; 4279 4280 struct 4281 { 4282 unsigned CS : 2; 4283 unsigned : 6; 4284 }; 4285 4286 struct 4287 { 4288 unsigned : 4; 4289 unsigned PS : 3; 4290 unsigned : 1; 4291 }; 4292 4293 struct 4294 { 4295 unsigned : 4; 4296 unsigned PWM2PS : 3; 4297 unsigned : 1; 4298 }; 4299 } __PWM2CLKCONbits_t; 4300 4301 extern __at(0x0DAE) volatile __PWM2CLKCONbits_t PWM2CLKCONbits; 4302 4303 #define _PWM2CLKCON_PWM2CS0 0x01 4304 #define _PWM2CLKCON_CS0 0x01 4305 #define _PWM2CLKCON_PWM2CS1 0x02 4306 #define _PWM2CLKCON_CS1 0x02 4307 #define _PWM2CLKCON_PWM2PS0 0x10 4308 #define _PWM2CLKCON_PS0 0x10 4309 #define _PWM2CLKCON_PWM2PS1 0x20 4310 #define _PWM2CLKCON_PS1 0x20 4311 #define _PWM2CLKCON_PWM2PS2 0x40 4312 #define _PWM2CLKCON_PS2 0x40 4313 4314 //============================================================================== 4315 4316 4317 //============================================================================== 4318 // PWM2LDCON Bits 4319 4320 extern __at(0x0DAF) __sfr PWM2LDCON; 4321 4322 typedef union 4323 { 4324 struct 4325 { 4326 unsigned PWM2LDS0 : 1; 4327 unsigned PWM2LDS1 : 1; 4328 unsigned : 1; 4329 unsigned : 1; 4330 unsigned : 1; 4331 unsigned : 1; 4332 unsigned LDT : 1; 4333 unsigned LDA : 1; 4334 }; 4335 4336 struct 4337 { 4338 unsigned LDS0 : 1; 4339 unsigned LDS1 : 1; 4340 unsigned : 1; 4341 unsigned : 1; 4342 unsigned : 1; 4343 unsigned : 1; 4344 unsigned PWM2LDM : 1; 4345 unsigned PWM2LD : 1; 4346 }; 4347 4348 struct 4349 { 4350 unsigned PWM2LDS : 2; 4351 unsigned : 6; 4352 }; 4353 4354 struct 4355 { 4356 unsigned LDS : 2; 4357 unsigned : 6; 4358 }; 4359 } __PWM2LDCONbits_t; 4360 4361 extern __at(0x0DAF) volatile __PWM2LDCONbits_t PWM2LDCONbits; 4362 4363 #define _PWM2LDCON_PWM2LDS0 0x01 4364 #define _PWM2LDCON_LDS0 0x01 4365 #define _PWM2LDCON_PWM2LDS1 0x02 4366 #define _PWM2LDCON_LDS1 0x02 4367 #define _PWM2LDCON_LDT 0x40 4368 #define _PWM2LDCON_PWM2LDM 0x40 4369 #define _PWM2LDCON_LDA 0x80 4370 #define _PWM2LDCON_PWM2LD 0x80 4371 4372 //============================================================================== 4373 4374 4375 //============================================================================== 4376 // PWM2OFCON Bits 4377 4378 extern __at(0x0DB0) __sfr PWM2OFCON; 4379 4380 typedef union 4381 { 4382 struct 4383 { 4384 unsigned PWM2OFS0 : 1; 4385 unsigned PWM2OFS1 : 1; 4386 unsigned : 1; 4387 unsigned : 1; 4388 unsigned OFO : 1; 4389 unsigned PWM2OFM0 : 1; 4390 unsigned PWM2OFM1 : 1; 4391 unsigned : 1; 4392 }; 4393 4394 struct 4395 { 4396 unsigned OFS0 : 1; 4397 unsigned OFS1 : 1; 4398 unsigned : 1; 4399 unsigned : 1; 4400 unsigned PWM2OFMC : 1; 4401 unsigned OFM0 : 1; 4402 unsigned OFM1 : 1; 4403 unsigned : 1; 4404 }; 4405 4406 struct 4407 { 4408 unsigned OFS : 2; 4409 unsigned : 6; 4410 }; 4411 4412 struct 4413 { 4414 unsigned PWM2OFS : 2; 4415 unsigned : 6; 4416 }; 4417 4418 struct 4419 { 4420 unsigned : 5; 4421 unsigned PWM2OFM : 2; 4422 unsigned : 1; 4423 }; 4424 4425 struct 4426 { 4427 unsigned : 5; 4428 unsigned OFM : 2; 4429 unsigned : 1; 4430 }; 4431 } __PWM2OFCONbits_t; 4432 4433 extern __at(0x0DB0) volatile __PWM2OFCONbits_t PWM2OFCONbits; 4434 4435 #define _PWM2OFCON_PWM2OFS0 0x01 4436 #define _PWM2OFCON_OFS0 0x01 4437 #define _PWM2OFCON_PWM2OFS1 0x02 4438 #define _PWM2OFCON_OFS1 0x02 4439 #define _PWM2OFCON_OFO 0x10 4440 #define _PWM2OFCON_PWM2OFMC 0x10 4441 #define _PWM2OFCON_PWM2OFM0 0x20 4442 #define _PWM2OFCON_OFM0 0x20 4443 #define _PWM2OFCON_PWM2OFM1 0x40 4444 #define _PWM2OFCON_OFM1 0x40 4445 4446 //============================================================================== 4447 4448 extern __at(0x0DB1) __sfr PWM3PH; 4449 4450 //============================================================================== 4451 // PWM3PHL Bits 4452 4453 extern __at(0x0DB1) __sfr PWM3PHL; 4454 4455 typedef struct 4456 { 4457 unsigned PWM3PHL0 : 1; 4458 unsigned PWM3PHL1 : 1; 4459 unsigned PWM3PHL2 : 1; 4460 unsigned PWM3PHL3 : 1; 4461 unsigned PWM3PHL4 : 1; 4462 unsigned PWM3PHL5 : 1; 4463 unsigned PWM3PHL6 : 1; 4464 unsigned PWM3PHL7 : 1; 4465 } __PWM3PHLbits_t; 4466 4467 extern __at(0x0DB1) volatile __PWM3PHLbits_t PWM3PHLbits; 4468 4469 #define _PWM3PHL0 0x01 4470 #define _PWM3PHL1 0x02 4471 #define _PWM3PHL2 0x04 4472 #define _PWM3PHL3 0x08 4473 #define _PWM3PHL4 0x10 4474 #define _PWM3PHL5 0x20 4475 #define _PWM3PHL6 0x40 4476 #define _PWM3PHL7 0x80 4477 4478 //============================================================================== 4479 4480 4481 //============================================================================== 4482 // PWM3PHH Bits 4483 4484 extern __at(0x0DB2) __sfr PWM3PHH; 4485 4486 typedef struct 4487 { 4488 unsigned PWM3PHH0 : 1; 4489 unsigned PWM3PHH1 : 1; 4490 unsigned PWM3PHH2 : 1; 4491 unsigned PWM3PHH3 : 1; 4492 unsigned PWM3PHH4 : 1; 4493 unsigned PWM3PHH5 : 1; 4494 unsigned PWM3PHH6 : 1; 4495 unsigned PWM3PHH7 : 1; 4496 } __PWM3PHHbits_t; 4497 4498 extern __at(0x0DB2) volatile __PWM3PHHbits_t PWM3PHHbits; 4499 4500 #define _PWM3PHH0 0x01 4501 #define _PWM3PHH1 0x02 4502 #define _PWM3PHH2 0x04 4503 #define _PWM3PHH3 0x08 4504 #define _PWM3PHH4 0x10 4505 #define _PWM3PHH5 0x20 4506 #define _PWM3PHH6 0x40 4507 #define _PWM3PHH7 0x80 4508 4509 //============================================================================== 4510 4511 extern __at(0x0DB3) __sfr PWM3DC; 4512 4513 //============================================================================== 4514 // PWM3DCL Bits 4515 4516 extern __at(0x0DB3) __sfr PWM3DCL; 4517 4518 typedef struct 4519 { 4520 unsigned PWM3DCL0 : 1; 4521 unsigned PWM3DCL1 : 1; 4522 unsigned PWM3DCL2 : 1; 4523 unsigned PWM3DCL3 : 1; 4524 unsigned PWM3DCL4 : 1; 4525 unsigned PWM3DCL5 : 1; 4526 unsigned PWM3DCL6 : 1; 4527 unsigned PWM3DCL7 : 1; 4528 } __PWM3DCLbits_t; 4529 4530 extern __at(0x0DB3) volatile __PWM3DCLbits_t PWM3DCLbits; 4531 4532 #define _PWM3DCL0 0x01 4533 #define _PWM3DCL1 0x02 4534 #define _PWM3DCL2 0x04 4535 #define _PWM3DCL3 0x08 4536 #define _PWM3DCL4 0x10 4537 #define _PWM3DCL5 0x20 4538 #define _PWM3DCL6 0x40 4539 #define _PWM3DCL7 0x80 4540 4541 //============================================================================== 4542 4543 4544 //============================================================================== 4545 // PWM3DCH Bits 4546 4547 extern __at(0x0DB4) __sfr PWM3DCH; 4548 4549 typedef struct 4550 { 4551 unsigned PWM3DCH0 : 1; 4552 unsigned PWM3DCH1 : 1; 4553 unsigned PWM3DCH2 : 1; 4554 unsigned PWM3DCH3 : 1; 4555 unsigned PWM3DCH4 : 1; 4556 unsigned PWM3DCH5 : 1; 4557 unsigned PWM3DCH6 : 1; 4558 unsigned PWM3DCH7 : 1; 4559 } __PWM3DCHbits_t; 4560 4561 extern __at(0x0DB4) volatile __PWM3DCHbits_t PWM3DCHbits; 4562 4563 #define _PWM3DCH0 0x01 4564 #define _PWM3DCH1 0x02 4565 #define _PWM3DCH2 0x04 4566 #define _PWM3DCH3 0x08 4567 #define _PWM3DCH4 0x10 4568 #define _PWM3DCH5 0x20 4569 #define _PWM3DCH6 0x40 4570 #define _PWM3DCH7 0x80 4571 4572 //============================================================================== 4573 4574 extern __at(0x0DB5) __sfr PWM3PR; 4575 4576 //============================================================================== 4577 // PWM3PRL Bits 4578 4579 extern __at(0x0DB5) __sfr PWM3PRL; 4580 4581 typedef struct 4582 { 4583 unsigned PWM3PRL0 : 1; 4584 unsigned PWM3PRL1 : 1; 4585 unsigned PWM3PRL2 : 1; 4586 unsigned PWM3PRL3 : 1; 4587 unsigned PWM3PRL4 : 1; 4588 unsigned PWM3PRL5 : 1; 4589 unsigned PWM3PRL6 : 1; 4590 unsigned PWM3PRL7 : 1; 4591 } __PWM3PRLbits_t; 4592 4593 extern __at(0x0DB5) volatile __PWM3PRLbits_t PWM3PRLbits; 4594 4595 #define _PWM3PRL0 0x01 4596 #define _PWM3PRL1 0x02 4597 #define _PWM3PRL2 0x04 4598 #define _PWM3PRL3 0x08 4599 #define _PWM3PRL4 0x10 4600 #define _PWM3PRL5 0x20 4601 #define _PWM3PRL6 0x40 4602 #define _PWM3PRL7 0x80 4603 4604 //============================================================================== 4605 4606 4607 //============================================================================== 4608 // PWM3PRH Bits 4609 4610 extern __at(0x0DB6) __sfr PWM3PRH; 4611 4612 typedef struct 4613 { 4614 unsigned PWM3PRH0 : 1; 4615 unsigned PWM3PRH1 : 1; 4616 unsigned PWM3PRH2 : 1; 4617 unsigned PWM3PRH3 : 1; 4618 unsigned PWM3PRH4 : 1; 4619 unsigned PWM3PRH5 : 1; 4620 unsigned PWM3PRH6 : 1; 4621 unsigned PWM3PRH7 : 1; 4622 } __PWM3PRHbits_t; 4623 4624 extern __at(0x0DB6) volatile __PWM3PRHbits_t PWM3PRHbits; 4625 4626 #define _PWM3PRH0 0x01 4627 #define _PWM3PRH1 0x02 4628 #define _PWM3PRH2 0x04 4629 #define _PWM3PRH3 0x08 4630 #define _PWM3PRH4 0x10 4631 #define _PWM3PRH5 0x20 4632 #define _PWM3PRH6 0x40 4633 #define _PWM3PRH7 0x80 4634 4635 //============================================================================== 4636 4637 extern __at(0x0DB7) __sfr PWM3OF; 4638 4639 //============================================================================== 4640 // PWM3OFL Bits 4641 4642 extern __at(0x0DB7) __sfr PWM3OFL; 4643 4644 typedef struct 4645 { 4646 unsigned PWM3OFL0 : 1; 4647 unsigned PWM3OFL1 : 1; 4648 unsigned PWM3OFL2 : 1; 4649 unsigned PWM3OFL3 : 1; 4650 unsigned PWM3OFL4 : 1; 4651 unsigned PWM3OFL5 : 1; 4652 unsigned PWM3OFL6 : 1; 4653 unsigned PWM3OFL7 : 1; 4654 } __PWM3OFLbits_t; 4655 4656 extern __at(0x0DB7) volatile __PWM3OFLbits_t PWM3OFLbits; 4657 4658 #define _PWM3OFL0 0x01 4659 #define _PWM3OFL1 0x02 4660 #define _PWM3OFL2 0x04 4661 #define _PWM3OFL3 0x08 4662 #define _PWM3OFL4 0x10 4663 #define _PWM3OFL5 0x20 4664 #define _PWM3OFL6 0x40 4665 #define _PWM3OFL7 0x80 4666 4667 //============================================================================== 4668 4669 4670 //============================================================================== 4671 // PWM3OFH Bits 4672 4673 extern __at(0x0DB8) __sfr PWM3OFH; 4674 4675 typedef struct 4676 { 4677 unsigned PWM3OFH0 : 1; 4678 unsigned PWM3OFH1 : 1; 4679 unsigned PWM3OFH2 : 1; 4680 unsigned PWM3OFH3 : 1; 4681 unsigned PWM3OFH4 : 1; 4682 unsigned PWM3OFH5 : 1; 4683 unsigned PWM3OFH6 : 1; 4684 unsigned PWM3OFH7 : 1; 4685 } __PWM3OFHbits_t; 4686 4687 extern __at(0x0DB8) volatile __PWM3OFHbits_t PWM3OFHbits; 4688 4689 #define _PWM3OFH0 0x01 4690 #define _PWM3OFH1 0x02 4691 #define _PWM3OFH2 0x04 4692 #define _PWM3OFH3 0x08 4693 #define _PWM3OFH4 0x10 4694 #define _PWM3OFH5 0x20 4695 #define _PWM3OFH6 0x40 4696 #define _PWM3OFH7 0x80 4697 4698 //============================================================================== 4699 4700 extern __at(0x0DB9) __sfr PWM3TMR; 4701 4702 //============================================================================== 4703 // PWM3TMRL Bits 4704 4705 extern __at(0x0DB9) __sfr PWM3TMRL; 4706 4707 typedef struct 4708 { 4709 unsigned PWM3TMRL0 : 1; 4710 unsigned PWM3TMRL1 : 1; 4711 unsigned PWM3TMRL2 : 1; 4712 unsigned PWM3TMRL3 : 1; 4713 unsigned PWM3TMRL4 : 1; 4714 unsigned PWM3TMRL5 : 1; 4715 unsigned PWM3TMRL6 : 1; 4716 unsigned PWM3TMRL7 : 1; 4717 } __PWM3TMRLbits_t; 4718 4719 extern __at(0x0DB9) volatile __PWM3TMRLbits_t PWM3TMRLbits; 4720 4721 #define _PWM3TMRL0 0x01 4722 #define _PWM3TMRL1 0x02 4723 #define _PWM3TMRL2 0x04 4724 #define _PWM3TMRL3 0x08 4725 #define _PWM3TMRL4 0x10 4726 #define _PWM3TMRL5 0x20 4727 #define _PWM3TMRL6 0x40 4728 #define _PWM3TMRL7 0x80 4729 4730 //============================================================================== 4731 4732 4733 //============================================================================== 4734 // PWM3TMRH Bits 4735 4736 extern __at(0x0DBA) __sfr PWM3TMRH; 4737 4738 typedef struct 4739 { 4740 unsigned PWM3TMRH0 : 1; 4741 unsigned PWM3TMRH1 : 1; 4742 unsigned PWM3TMRH2 : 1; 4743 unsigned PWM3TMRH3 : 1; 4744 unsigned PWM3TMRH4 : 1; 4745 unsigned PWM3TMRH5 : 1; 4746 unsigned PWM3TMRH6 : 1; 4747 unsigned PWM3TMRH7 : 1; 4748 } __PWM3TMRHbits_t; 4749 4750 extern __at(0x0DBA) volatile __PWM3TMRHbits_t PWM3TMRHbits; 4751 4752 #define _PWM3TMRH0 0x01 4753 #define _PWM3TMRH1 0x02 4754 #define _PWM3TMRH2 0x04 4755 #define _PWM3TMRH3 0x08 4756 #define _PWM3TMRH4 0x10 4757 #define _PWM3TMRH5 0x20 4758 #define _PWM3TMRH6 0x40 4759 #define _PWM3TMRH7 0x80 4760 4761 //============================================================================== 4762 4763 4764 //============================================================================== 4765 // PWM3CON Bits 4766 4767 extern __at(0x0DBB) __sfr PWM3CON; 4768 4769 typedef union 4770 { 4771 struct 4772 { 4773 unsigned : 1; 4774 unsigned : 1; 4775 unsigned PWM3MODE0 : 1; 4776 unsigned PWM3MODE1 : 1; 4777 unsigned POL : 1; 4778 unsigned OUT : 1; 4779 unsigned OE : 1; 4780 unsigned EN : 1; 4781 }; 4782 4783 struct 4784 { 4785 unsigned : 1; 4786 unsigned : 1; 4787 unsigned MODE0 : 1; 4788 unsigned MODE1 : 1; 4789 unsigned PWM3POL : 1; 4790 unsigned PWM3OUT : 1; 4791 unsigned PWM3OE : 1; 4792 unsigned PWM3EN : 1; 4793 }; 4794 4795 struct 4796 { 4797 unsigned : 2; 4798 unsigned PWM3MODE : 2; 4799 unsigned : 4; 4800 }; 4801 4802 struct 4803 { 4804 unsigned : 2; 4805 unsigned MODE : 2; 4806 unsigned : 4; 4807 }; 4808 } __PWM3CONbits_t; 4809 4810 extern __at(0x0DBB) volatile __PWM3CONbits_t PWM3CONbits; 4811 4812 #define _PWM3CON_PWM3MODE0 0x04 4813 #define _PWM3CON_MODE0 0x04 4814 #define _PWM3CON_PWM3MODE1 0x08 4815 #define _PWM3CON_MODE1 0x08 4816 #define _PWM3CON_POL 0x10 4817 #define _PWM3CON_PWM3POL 0x10 4818 #define _PWM3CON_OUT 0x20 4819 #define _PWM3CON_PWM3OUT 0x20 4820 #define _PWM3CON_OE 0x40 4821 #define _PWM3CON_PWM3OE 0x40 4822 #define _PWM3CON_EN 0x80 4823 #define _PWM3CON_PWM3EN 0x80 4824 4825 //============================================================================== 4826 4827 4828 //============================================================================== 4829 // PWM3INTCON Bits 4830 4831 extern __at(0x0DBC) __sfr PWM3INTCON; 4832 4833 typedef union 4834 { 4835 struct 4836 { 4837 unsigned PRIE : 1; 4838 unsigned DCIE : 1; 4839 unsigned PHIE : 1; 4840 unsigned OFIE : 1; 4841 unsigned : 1; 4842 unsigned : 1; 4843 unsigned : 1; 4844 unsigned : 1; 4845 }; 4846 4847 struct 4848 { 4849 unsigned PWM3PRIE : 1; 4850 unsigned PWM3DCIE : 1; 4851 unsigned PWM3PHIE : 1; 4852 unsigned PWM3OFIE : 1; 4853 unsigned : 1; 4854 unsigned : 1; 4855 unsigned : 1; 4856 unsigned : 1; 4857 }; 4858 } __PWM3INTCONbits_t; 4859 4860 extern __at(0x0DBC) volatile __PWM3INTCONbits_t PWM3INTCONbits; 4861 4862 #define _PWM3INTCON_PRIE 0x01 4863 #define _PWM3INTCON_PWM3PRIE 0x01 4864 #define _PWM3INTCON_DCIE 0x02 4865 #define _PWM3INTCON_PWM3DCIE 0x02 4866 #define _PWM3INTCON_PHIE 0x04 4867 #define _PWM3INTCON_PWM3PHIE 0x04 4868 #define _PWM3INTCON_OFIE 0x08 4869 #define _PWM3INTCON_PWM3OFIE 0x08 4870 4871 //============================================================================== 4872 4873 4874 //============================================================================== 4875 // PWM3INTE Bits 4876 4877 extern __at(0x0DBC) __sfr PWM3INTE; 4878 4879 typedef union 4880 { 4881 struct 4882 { 4883 unsigned PRIE : 1; 4884 unsigned DCIE : 1; 4885 unsigned PHIE : 1; 4886 unsigned OFIE : 1; 4887 unsigned : 1; 4888 unsigned : 1; 4889 unsigned : 1; 4890 unsigned : 1; 4891 }; 4892 4893 struct 4894 { 4895 unsigned PWM3PRIE : 1; 4896 unsigned PWM3DCIE : 1; 4897 unsigned PWM3PHIE : 1; 4898 unsigned PWM3OFIE : 1; 4899 unsigned : 1; 4900 unsigned : 1; 4901 unsigned : 1; 4902 unsigned : 1; 4903 }; 4904 } __PWM3INTEbits_t; 4905 4906 extern __at(0x0DBC) volatile __PWM3INTEbits_t PWM3INTEbits; 4907 4908 #define _PWM3INTE_PRIE 0x01 4909 #define _PWM3INTE_PWM3PRIE 0x01 4910 #define _PWM3INTE_DCIE 0x02 4911 #define _PWM3INTE_PWM3DCIE 0x02 4912 #define _PWM3INTE_PHIE 0x04 4913 #define _PWM3INTE_PWM3PHIE 0x04 4914 #define _PWM3INTE_OFIE 0x08 4915 #define _PWM3INTE_PWM3OFIE 0x08 4916 4917 //============================================================================== 4918 4919 4920 //============================================================================== 4921 // PWM3INTF Bits 4922 4923 extern __at(0x0DBD) __sfr PWM3INTF; 4924 4925 typedef union 4926 { 4927 struct 4928 { 4929 unsigned PRIF : 1; 4930 unsigned DCIF : 1; 4931 unsigned PHIF : 1; 4932 unsigned OFIF : 1; 4933 unsigned : 1; 4934 unsigned : 1; 4935 unsigned : 1; 4936 unsigned : 1; 4937 }; 4938 4939 struct 4940 { 4941 unsigned PWM3PRIF : 1; 4942 unsigned PWM3DCIF : 1; 4943 unsigned PWM3PHIF : 1; 4944 unsigned PWM3OFIF : 1; 4945 unsigned : 1; 4946 unsigned : 1; 4947 unsigned : 1; 4948 unsigned : 1; 4949 }; 4950 } __PWM3INTFbits_t; 4951 4952 extern __at(0x0DBD) volatile __PWM3INTFbits_t PWM3INTFbits; 4953 4954 #define _PWM3INTF_PRIF 0x01 4955 #define _PWM3INTF_PWM3PRIF 0x01 4956 #define _PWM3INTF_DCIF 0x02 4957 #define _PWM3INTF_PWM3DCIF 0x02 4958 #define _PWM3INTF_PHIF 0x04 4959 #define _PWM3INTF_PWM3PHIF 0x04 4960 #define _PWM3INTF_OFIF 0x08 4961 #define _PWM3INTF_PWM3OFIF 0x08 4962 4963 //============================================================================== 4964 4965 4966 //============================================================================== 4967 // PWM3INTFLG Bits 4968 4969 extern __at(0x0DBD) __sfr PWM3INTFLG; 4970 4971 typedef union 4972 { 4973 struct 4974 { 4975 unsigned PRIF : 1; 4976 unsigned DCIF : 1; 4977 unsigned PHIF : 1; 4978 unsigned OFIF : 1; 4979 unsigned : 1; 4980 unsigned : 1; 4981 unsigned : 1; 4982 unsigned : 1; 4983 }; 4984 4985 struct 4986 { 4987 unsigned PWM3PRIF : 1; 4988 unsigned PWM3DCIF : 1; 4989 unsigned PWM3PHIF : 1; 4990 unsigned PWM3OFIF : 1; 4991 unsigned : 1; 4992 unsigned : 1; 4993 unsigned : 1; 4994 unsigned : 1; 4995 }; 4996 } __PWM3INTFLGbits_t; 4997 4998 extern __at(0x0DBD) volatile __PWM3INTFLGbits_t PWM3INTFLGbits; 4999 5000 #define _PWM3INTFLG_PRIF 0x01 5001 #define _PWM3INTFLG_PWM3PRIF 0x01 5002 #define _PWM3INTFLG_DCIF 0x02 5003 #define _PWM3INTFLG_PWM3DCIF 0x02 5004 #define _PWM3INTFLG_PHIF 0x04 5005 #define _PWM3INTFLG_PWM3PHIF 0x04 5006 #define _PWM3INTFLG_OFIF 0x08 5007 #define _PWM3INTFLG_PWM3OFIF 0x08 5008 5009 //============================================================================== 5010 5011 5012 //============================================================================== 5013 // PWM3CLKCON Bits 5014 5015 extern __at(0x0DBE) __sfr PWM3CLKCON; 5016 5017 typedef union 5018 { 5019 struct 5020 { 5021 unsigned PWM3CS0 : 1; 5022 unsigned PWM3CS1 : 1; 5023 unsigned : 1; 5024 unsigned : 1; 5025 unsigned PWM3PS0 : 1; 5026 unsigned PWM3PS1 : 1; 5027 unsigned PWM3PS2 : 1; 5028 unsigned : 1; 5029 }; 5030 5031 struct 5032 { 5033 unsigned CS0 : 1; 5034 unsigned CS1 : 1; 5035 unsigned : 1; 5036 unsigned : 1; 5037 unsigned PS0 : 1; 5038 unsigned PS1 : 1; 5039 unsigned PS2 : 1; 5040 unsigned : 1; 5041 }; 5042 5043 struct 5044 { 5045 unsigned PWM3CS : 2; 5046 unsigned : 6; 5047 }; 5048 5049 struct 5050 { 5051 unsigned CS : 2; 5052 unsigned : 6; 5053 }; 5054 5055 struct 5056 { 5057 unsigned : 4; 5058 unsigned PWM3PS : 3; 5059 unsigned : 1; 5060 }; 5061 5062 struct 5063 { 5064 unsigned : 4; 5065 unsigned PS : 3; 5066 unsigned : 1; 5067 }; 5068 } __PWM3CLKCONbits_t; 5069 5070 extern __at(0x0DBE) volatile __PWM3CLKCONbits_t PWM3CLKCONbits; 5071 5072 #define _PWM3CLKCON_PWM3CS0 0x01 5073 #define _PWM3CLKCON_CS0 0x01 5074 #define _PWM3CLKCON_PWM3CS1 0x02 5075 #define _PWM3CLKCON_CS1 0x02 5076 #define _PWM3CLKCON_PWM3PS0 0x10 5077 #define _PWM3CLKCON_PS0 0x10 5078 #define _PWM3CLKCON_PWM3PS1 0x20 5079 #define _PWM3CLKCON_PS1 0x20 5080 #define _PWM3CLKCON_PWM3PS2 0x40 5081 #define _PWM3CLKCON_PS2 0x40 5082 5083 //============================================================================== 5084 5085 5086 //============================================================================== 5087 // PWM3LDCON Bits 5088 5089 extern __at(0x0DBF) __sfr PWM3LDCON; 5090 5091 typedef union 5092 { 5093 struct 5094 { 5095 unsigned PWM3LDS0 : 1; 5096 unsigned PWM3LDS1 : 1; 5097 unsigned : 1; 5098 unsigned : 1; 5099 unsigned : 1; 5100 unsigned : 1; 5101 unsigned LDT : 1; 5102 unsigned LDA : 1; 5103 }; 5104 5105 struct 5106 { 5107 unsigned LDS0 : 1; 5108 unsigned LDS1 : 1; 5109 unsigned : 1; 5110 unsigned : 1; 5111 unsigned : 1; 5112 unsigned : 1; 5113 unsigned PWM3LDM : 1; 5114 unsigned PWM3LD : 1; 5115 }; 5116 5117 struct 5118 { 5119 unsigned LDS : 2; 5120 unsigned : 6; 5121 }; 5122 5123 struct 5124 { 5125 unsigned PWM3LDS : 2; 5126 unsigned : 6; 5127 }; 5128 } __PWM3LDCONbits_t; 5129 5130 extern __at(0x0DBF) volatile __PWM3LDCONbits_t PWM3LDCONbits; 5131 5132 #define _PWM3LDCON_PWM3LDS0 0x01 5133 #define _PWM3LDCON_LDS0 0x01 5134 #define _PWM3LDCON_PWM3LDS1 0x02 5135 #define _PWM3LDCON_LDS1 0x02 5136 #define _PWM3LDCON_LDT 0x40 5137 #define _PWM3LDCON_PWM3LDM 0x40 5138 #define _PWM3LDCON_LDA 0x80 5139 #define _PWM3LDCON_PWM3LD 0x80 5140 5141 //============================================================================== 5142 5143 5144 //============================================================================== 5145 // PWM3OFCON Bits 5146 5147 extern __at(0x0DC0) __sfr PWM3OFCON; 5148 5149 typedef union 5150 { 5151 struct 5152 { 5153 unsigned PWM3OFS0 : 1; 5154 unsigned PWM3OFS1 : 1; 5155 unsigned : 1; 5156 unsigned : 1; 5157 unsigned OFO : 1; 5158 unsigned PWM3OFM0 : 1; 5159 unsigned PWM3OFM1 : 1; 5160 unsigned : 1; 5161 }; 5162 5163 struct 5164 { 5165 unsigned OFS0 : 1; 5166 unsigned OFS1 : 1; 5167 unsigned : 1; 5168 unsigned : 1; 5169 unsigned PWM3OFMC : 1; 5170 unsigned OFM0 : 1; 5171 unsigned OFM1 : 1; 5172 unsigned : 1; 5173 }; 5174 5175 struct 5176 { 5177 unsigned OFS : 2; 5178 unsigned : 6; 5179 }; 5180 5181 struct 5182 { 5183 unsigned PWM3OFS : 2; 5184 unsigned : 6; 5185 }; 5186 5187 struct 5188 { 5189 unsigned : 5; 5190 unsigned OFM : 2; 5191 unsigned : 1; 5192 }; 5193 5194 struct 5195 { 5196 unsigned : 5; 5197 unsigned PWM3OFM : 2; 5198 unsigned : 1; 5199 }; 5200 } __PWM3OFCONbits_t; 5201 5202 extern __at(0x0DC0) volatile __PWM3OFCONbits_t PWM3OFCONbits; 5203 5204 #define _PWM3OFCON_PWM3OFS0 0x01 5205 #define _PWM3OFCON_OFS0 0x01 5206 #define _PWM3OFCON_PWM3OFS1 0x02 5207 #define _PWM3OFCON_OFS1 0x02 5208 #define _PWM3OFCON_OFO 0x10 5209 #define _PWM3OFCON_PWM3OFMC 0x10 5210 #define _PWM3OFCON_PWM3OFM0 0x20 5211 #define _PWM3OFCON_OFM0 0x20 5212 #define _PWM3OFCON_PWM3OFM1 0x40 5213 #define _PWM3OFCON_OFM1 0x40 5214 5215 //============================================================================== 5216 5217 extern __at(0x0DC1) __sfr PWM4PH; 5218 5219 //============================================================================== 5220 // PWM4PHL Bits 5221 5222 extern __at(0x0DC1) __sfr PWM4PHL; 5223 5224 typedef struct 5225 { 5226 unsigned PWM4PHL0 : 1; 5227 unsigned PWM4PHL1 : 1; 5228 unsigned PWM4PHL2 : 1; 5229 unsigned PWM4PHL3 : 1; 5230 unsigned PWM4PHL4 : 1; 5231 unsigned PWM4PHL5 : 1; 5232 unsigned PWM4PHL6 : 1; 5233 unsigned PWM4PHL7 : 1; 5234 } __PWM4PHLbits_t; 5235 5236 extern __at(0x0DC1) volatile __PWM4PHLbits_t PWM4PHLbits; 5237 5238 #define _PWM4PHL0 0x01 5239 #define _PWM4PHL1 0x02 5240 #define _PWM4PHL2 0x04 5241 #define _PWM4PHL3 0x08 5242 #define _PWM4PHL4 0x10 5243 #define _PWM4PHL5 0x20 5244 #define _PWM4PHL6 0x40 5245 #define _PWM4PHL7 0x80 5246 5247 //============================================================================== 5248 5249 5250 //============================================================================== 5251 // PWM4PHH Bits 5252 5253 extern __at(0x0DC2) __sfr PWM4PHH; 5254 5255 typedef struct 5256 { 5257 unsigned PWM4PHH0 : 1; 5258 unsigned PWM4PHH1 : 1; 5259 unsigned PWM4PHH2 : 1; 5260 unsigned PWM4PHH3 : 1; 5261 unsigned PWM4PHH4 : 1; 5262 unsigned PWM4PHH5 : 1; 5263 unsigned PWM4PHH6 : 1; 5264 unsigned PWM4PHH7 : 1; 5265 } __PWM4PHHbits_t; 5266 5267 extern __at(0x0DC2) volatile __PWM4PHHbits_t PWM4PHHbits; 5268 5269 #define _PWM4PHH0 0x01 5270 #define _PWM4PHH1 0x02 5271 #define _PWM4PHH2 0x04 5272 #define _PWM4PHH3 0x08 5273 #define _PWM4PHH4 0x10 5274 #define _PWM4PHH5 0x20 5275 #define _PWM4PHH6 0x40 5276 #define _PWM4PHH7 0x80 5277 5278 //============================================================================== 5279 5280 extern __at(0x0DC3) __sfr PWM4DC; 5281 5282 //============================================================================== 5283 // PWM4DCL Bits 5284 5285 extern __at(0x0DC3) __sfr PWM4DCL; 5286 5287 typedef struct 5288 { 5289 unsigned PWM4DCL0 : 1; 5290 unsigned PWM4DCL1 : 1; 5291 unsigned PWM4DCL2 : 1; 5292 unsigned PWM4DCL3 : 1; 5293 unsigned PWM4DCL4 : 1; 5294 unsigned PWM4DCL5 : 1; 5295 unsigned PWM4DCL6 : 1; 5296 unsigned PWM4DCL7 : 1; 5297 } __PWM4DCLbits_t; 5298 5299 extern __at(0x0DC3) volatile __PWM4DCLbits_t PWM4DCLbits; 5300 5301 #define _PWM4DCL0 0x01 5302 #define _PWM4DCL1 0x02 5303 #define _PWM4DCL2 0x04 5304 #define _PWM4DCL3 0x08 5305 #define _PWM4DCL4 0x10 5306 #define _PWM4DCL5 0x20 5307 #define _PWM4DCL6 0x40 5308 #define _PWM4DCL7 0x80 5309 5310 //============================================================================== 5311 5312 5313 //============================================================================== 5314 // PWM4DCH Bits 5315 5316 extern __at(0x0DC4) __sfr PWM4DCH; 5317 5318 typedef struct 5319 { 5320 unsigned PWM4DCH0 : 1; 5321 unsigned PWM4DCH1 : 1; 5322 unsigned PWM4DCH2 : 1; 5323 unsigned PWM4DCH3 : 1; 5324 unsigned PWM4DCH4 : 1; 5325 unsigned PWM4DCH5 : 1; 5326 unsigned PWM4DCH6 : 1; 5327 unsigned PWM4DCH7 : 1; 5328 } __PWM4DCHbits_t; 5329 5330 extern __at(0x0DC4) volatile __PWM4DCHbits_t PWM4DCHbits; 5331 5332 #define _PWM4DCH0 0x01 5333 #define _PWM4DCH1 0x02 5334 #define _PWM4DCH2 0x04 5335 #define _PWM4DCH3 0x08 5336 #define _PWM4DCH4 0x10 5337 #define _PWM4DCH5 0x20 5338 #define _PWM4DCH6 0x40 5339 #define _PWM4DCH7 0x80 5340 5341 //============================================================================== 5342 5343 extern __at(0x0DC5) __sfr PWM4PR; 5344 5345 //============================================================================== 5346 // PWM4PRL Bits 5347 5348 extern __at(0x0DC5) __sfr PWM4PRL; 5349 5350 typedef struct 5351 { 5352 unsigned PWM4PRL0 : 1; 5353 unsigned PWM4PRL1 : 1; 5354 unsigned PWM4PRL2 : 1; 5355 unsigned PWM4PRL3 : 1; 5356 unsigned PWM4PRL4 : 1; 5357 unsigned PWM4PRL5 : 1; 5358 unsigned PWM4PRL6 : 1; 5359 unsigned PWM4PRL7 : 1; 5360 } __PWM4PRLbits_t; 5361 5362 extern __at(0x0DC5) volatile __PWM4PRLbits_t PWM4PRLbits; 5363 5364 #define _PWM4PRL0 0x01 5365 #define _PWM4PRL1 0x02 5366 #define _PWM4PRL2 0x04 5367 #define _PWM4PRL3 0x08 5368 #define _PWM4PRL4 0x10 5369 #define _PWM4PRL5 0x20 5370 #define _PWM4PRL6 0x40 5371 #define _PWM4PRL7 0x80 5372 5373 //============================================================================== 5374 5375 5376 //============================================================================== 5377 // PWM4PRH Bits 5378 5379 extern __at(0x0DC6) __sfr PWM4PRH; 5380 5381 typedef struct 5382 { 5383 unsigned PWM4PRH0 : 1; 5384 unsigned PWM4PRH1 : 1; 5385 unsigned PWM4PRH2 : 1; 5386 unsigned PWM4PRH3 : 1; 5387 unsigned PWM4PRH4 : 1; 5388 unsigned PWM4PRH5 : 1; 5389 unsigned PWM4PRH6 : 1; 5390 unsigned PWM4PRH7 : 1; 5391 } __PWM4PRHbits_t; 5392 5393 extern __at(0x0DC6) volatile __PWM4PRHbits_t PWM4PRHbits; 5394 5395 #define _PWM4PRH0 0x01 5396 #define _PWM4PRH1 0x02 5397 #define _PWM4PRH2 0x04 5398 #define _PWM4PRH3 0x08 5399 #define _PWM4PRH4 0x10 5400 #define _PWM4PRH5 0x20 5401 #define _PWM4PRH6 0x40 5402 #define _PWM4PRH7 0x80 5403 5404 //============================================================================== 5405 5406 extern __at(0x0DC7) __sfr PWM4OF; 5407 5408 //============================================================================== 5409 // PWM4OFL Bits 5410 5411 extern __at(0x0DC7) __sfr PWM4OFL; 5412 5413 typedef struct 5414 { 5415 unsigned PWM4OFL0 : 1; 5416 unsigned PWM4OFL1 : 1; 5417 unsigned PWM4OFL2 : 1; 5418 unsigned PWM4OFL3 : 1; 5419 unsigned PWM4OFL4 : 1; 5420 unsigned PWM4OFL5 : 1; 5421 unsigned PWM4OFL6 : 1; 5422 unsigned PWM4OFL7 : 1; 5423 } __PWM4OFLbits_t; 5424 5425 extern __at(0x0DC7) volatile __PWM4OFLbits_t PWM4OFLbits; 5426 5427 #define _PWM4OFL0 0x01 5428 #define _PWM4OFL1 0x02 5429 #define _PWM4OFL2 0x04 5430 #define _PWM4OFL3 0x08 5431 #define _PWM4OFL4 0x10 5432 #define _PWM4OFL5 0x20 5433 #define _PWM4OFL6 0x40 5434 #define _PWM4OFL7 0x80 5435 5436 //============================================================================== 5437 5438 5439 //============================================================================== 5440 // PWM4OFH Bits 5441 5442 extern __at(0x0DC8) __sfr PWM4OFH; 5443 5444 typedef struct 5445 { 5446 unsigned PWM4OFH0 : 1; 5447 unsigned PWM4OFH1 : 1; 5448 unsigned PWM4OFH2 : 1; 5449 unsigned PWM4OFH3 : 1; 5450 unsigned PWM4OFH4 : 1; 5451 unsigned PWM4OFH5 : 1; 5452 unsigned PWM4OFH6 : 1; 5453 unsigned PWM4OFH7 : 1; 5454 } __PWM4OFHbits_t; 5455 5456 extern __at(0x0DC8) volatile __PWM4OFHbits_t PWM4OFHbits; 5457 5458 #define _PWM4OFH0 0x01 5459 #define _PWM4OFH1 0x02 5460 #define _PWM4OFH2 0x04 5461 #define _PWM4OFH3 0x08 5462 #define _PWM4OFH4 0x10 5463 #define _PWM4OFH5 0x20 5464 #define _PWM4OFH6 0x40 5465 #define _PWM4OFH7 0x80 5466 5467 //============================================================================== 5468 5469 extern __at(0x0DC9) __sfr PWM4TMR; 5470 5471 //============================================================================== 5472 // PWM4TMRL Bits 5473 5474 extern __at(0x0DC9) __sfr PWM4TMRL; 5475 5476 typedef struct 5477 { 5478 unsigned PWM4TMRL0 : 1; 5479 unsigned PWM4TMRL1 : 1; 5480 unsigned PWM4TMRL2 : 1; 5481 unsigned PWM4TMRL3 : 1; 5482 unsigned PWM4TMRL4 : 1; 5483 unsigned PWM4TMRL5 : 1; 5484 unsigned PWM4TMRL6 : 1; 5485 unsigned PWM4TMRL7 : 1; 5486 } __PWM4TMRLbits_t; 5487 5488 extern __at(0x0DC9) volatile __PWM4TMRLbits_t PWM4TMRLbits; 5489 5490 #define _PWM4TMRL0 0x01 5491 #define _PWM4TMRL1 0x02 5492 #define _PWM4TMRL2 0x04 5493 #define _PWM4TMRL3 0x08 5494 #define _PWM4TMRL4 0x10 5495 #define _PWM4TMRL5 0x20 5496 #define _PWM4TMRL6 0x40 5497 #define _PWM4TMRL7 0x80 5498 5499 //============================================================================== 5500 5501 5502 //============================================================================== 5503 // PWM4TMRH Bits 5504 5505 extern __at(0x0DCA) __sfr PWM4TMRH; 5506 5507 typedef struct 5508 { 5509 unsigned PWM4TMRH0 : 1; 5510 unsigned PWM4TMRH1 : 1; 5511 unsigned PWM4TMRH2 : 1; 5512 unsigned PWM4TMRH3 : 1; 5513 unsigned PWM4TMRH4 : 1; 5514 unsigned PWM4TMRH5 : 1; 5515 unsigned PWM4TMRH6 : 1; 5516 unsigned PWM4TMRH7 : 1; 5517 } __PWM4TMRHbits_t; 5518 5519 extern __at(0x0DCA) volatile __PWM4TMRHbits_t PWM4TMRHbits; 5520 5521 #define _PWM4TMRH0 0x01 5522 #define _PWM4TMRH1 0x02 5523 #define _PWM4TMRH2 0x04 5524 #define _PWM4TMRH3 0x08 5525 #define _PWM4TMRH4 0x10 5526 #define _PWM4TMRH5 0x20 5527 #define _PWM4TMRH6 0x40 5528 #define _PWM4TMRH7 0x80 5529 5530 //============================================================================== 5531 5532 5533 //============================================================================== 5534 // PWM4CON Bits 5535 5536 extern __at(0x0DCB) __sfr PWM4CON; 5537 5538 typedef union 5539 { 5540 struct 5541 { 5542 unsigned : 1; 5543 unsigned : 1; 5544 unsigned PWM4MODE0 : 1; 5545 unsigned PWM4MODE1 : 1; 5546 unsigned POL : 1; 5547 unsigned OUT : 1; 5548 unsigned OE : 1; 5549 unsigned EN : 1; 5550 }; 5551 5552 struct 5553 { 5554 unsigned : 1; 5555 unsigned : 1; 5556 unsigned MODE0 : 1; 5557 unsigned MODE1 : 1; 5558 unsigned PWM4POL : 1; 5559 unsigned PWM4OUT : 1; 5560 unsigned PWM4OE : 1; 5561 unsigned PWM4EN : 1; 5562 }; 5563 5564 struct 5565 { 5566 unsigned : 2; 5567 unsigned PWM4MODE : 2; 5568 unsigned : 4; 5569 }; 5570 5571 struct 5572 { 5573 unsigned : 2; 5574 unsigned MODE : 2; 5575 unsigned : 4; 5576 }; 5577 } __PWM4CONbits_t; 5578 5579 extern __at(0x0DCB) volatile __PWM4CONbits_t PWM4CONbits; 5580 5581 #define _PWM4CON_PWM4MODE0 0x04 5582 #define _PWM4CON_MODE0 0x04 5583 #define _PWM4CON_PWM4MODE1 0x08 5584 #define _PWM4CON_MODE1 0x08 5585 #define _PWM4CON_POL 0x10 5586 #define _PWM4CON_PWM4POL 0x10 5587 #define _PWM4CON_OUT 0x20 5588 #define _PWM4CON_PWM4OUT 0x20 5589 #define _PWM4CON_OE 0x40 5590 #define _PWM4CON_PWM4OE 0x40 5591 #define _PWM4CON_EN 0x80 5592 #define _PWM4CON_PWM4EN 0x80 5593 5594 //============================================================================== 5595 5596 5597 //============================================================================== 5598 // PWM4INTCON Bits 5599 5600 extern __at(0x0DCC) __sfr PWM4INTCON; 5601 5602 typedef union 5603 { 5604 struct 5605 { 5606 unsigned PRIE : 1; 5607 unsigned DCIE : 1; 5608 unsigned PHIE : 1; 5609 unsigned OFIE : 1; 5610 unsigned : 1; 5611 unsigned : 1; 5612 unsigned : 1; 5613 unsigned : 1; 5614 }; 5615 5616 struct 5617 { 5618 unsigned PWM4PRIE : 1; 5619 unsigned PWM4DCIE : 1; 5620 unsigned PWM4PHIE : 1; 5621 unsigned PWM4OFIE : 1; 5622 unsigned : 1; 5623 unsigned : 1; 5624 unsigned : 1; 5625 unsigned : 1; 5626 }; 5627 } __PWM4INTCONbits_t; 5628 5629 extern __at(0x0DCC) volatile __PWM4INTCONbits_t PWM4INTCONbits; 5630 5631 #define _PWM4INTCON_PRIE 0x01 5632 #define _PWM4INTCON_PWM4PRIE 0x01 5633 #define _PWM4INTCON_DCIE 0x02 5634 #define _PWM4INTCON_PWM4DCIE 0x02 5635 #define _PWM4INTCON_PHIE 0x04 5636 #define _PWM4INTCON_PWM4PHIE 0x04 5637 #define _PWM4INTCON_OFIE 0x08 5638 #define _PWM4INTCON_PWM4OFIE 0x08 5639 5640 //============================================================================== 5641 5642 5643 //============================================================================== 5644 // PWM4INTE Bits 5645 5646 extern __at(0x0DCC) __sfr PWM4INTE; 5647 5648 typedef union 5649 { 5650 struct 5651 { 5652 unsigned PRIE : 1; 5653 unsigned DCIE : 1; 5654 unsigned PHIE : 1; 5655 unsigned OFIE : 1; 5656 unsigned : 1; 5657 unsigned : 1; 5658 unsigned : 1; 5659 unsigned : 1; 5660 }; 5661 5662 struct 5663 { 5664 unsigned PWM4PRIE : 1; 5665 unsigned PWM4DCIE : 1; 5666 unsigned PWM4PHIE : 1; 5667 unsigned PWM4OFIE : 1; 5668 unsigned : 1; 5669 unsigned : 1; 5670 unsigned : 1; 5671 unsigned : 1; 5672 }; 5673 } __PWM4INTEbits_t; 5674 5675 extern __at(0x0DCC) volatile __PWM4INTEbits_t PWM4INTEbits; 5676 5677 #define _PWM4INTE_PRIE 0x01 5678 #define _PWM4INTE_PWM4PRIE 0x01 5679 #define _PWM4INTE_DCIE 0x02 5680 #define _PWM4INTE_PWM4DCIE 0x02 5681 #define _PWM4INTE_PHIE 0x04 5682 #define _PWM4INTE_PWM4PHIE 0x04 5683 #define _PWM4INTE_OFIE 0x08 5684 #define _PWM4INTE_PWM4OFIE 0x08 5685 5686 //============================================================================== 5687 5688 5689 //============================================================================== 5690 // PWM4INTF Bits 5691 5692 extern __at(0x0DCD) __sfr PWM4INTF; 5693 5694 typedef union 5695 { 5696 struct 5697 { 5698 unsigned PRIF : 1; 5699 unsigned DCIF : 1; 5700 unsigned PHIF : 1; 5701 unsigned OFIF : 1; 5702 unsigned : 1; 5703 unsigned : 1; 5704 unsigned : 1; 5705 unsigned : 1; 5706 }; 5707 5708 struct 5709 { 5710 unsigned PWM4PRIF : 1; 5711 unsigned PWM4DCIF : 1; 5712 unsigned PWM4PHIF : 1; 5713 unsigned PWM4OFIF : 1; 5714 unsigned : 1; 5715 unsigned : 1; 5716 unsigned : 1; 5717 unsigned : 1; 5718 }; 5719 } __PWM4INTFbits_t; 5720 5721 extern __at(0x0DCD) volatile __PWM4INTFbits_t PWM4INTFbits; 5722 5723 #define _PWM4INTF_PRIF 0x01 5724 #define _PWM4INTF_PWM4PRIF 0x01 5725 #define _PWM4INTF_DCIF 0x02 5726 #define _PWM4INTF_PWM4DCIF 0x02 5727 #define _PWM4INTF_PHIF 0x04 5728 #define _PWM4INTF_PWM4PHIF 0x04 5729 #define _PWM4INTF_OFIF 0x08 5730 #define _PWM4INTF_PWM4OFIF 0x08 5731 5732 //============================================================================== 5733 5734 5735 //============================================================================== 5736 // PWM4INTFLG Bits 5737 5738 extern __at(0x0DCD) __sfr PWM4INTFLG; 5739 5740 typedef union 5741 { 5742 struct 5743 { 5744 unsigned PRIF : 1; 5745 unsigned DCIF : 1; 5746 unsigned PHIF : 1; 5747 unsigned OFIF : 1; 5748 unsigned : 1; 5749 unsigned : 1; 5750 unsigned : 1; 5751 unsigned : 1; 5752 }; 5753 5754 struct 5755 { 5756 unsigned PWM4PRIF : 1; 5757 unsigned PWM4DCIF : 1; 5758 unsigned PWM4PHIF : 1; 5759 unsigned PWM4OFIF : 1; 5760 unsigned : 1; 5761 unsigned : 1; 5762 unsigned : 1; 5763 unsigned : 1; 5764 }; 5765 } __PWM4INTFLGbits_t; 5766 5767 extern __at(0x0DCD) volatile __PWM4INTFLGbits_t PWM4INTFLGbits; 5768 5769 #define _PWM4INTFLG_PRIF 0x01 5770 #define _PWM4INTFLG_PWM4PRIF 0x01 5771 #define _PWM4INTFLG_DCIF 0x02 5772 #define _PWM4INTFLG_PWM4DCIF 0x02 5773 #define _PWM4INTFLG_PHIF 0x04 5774 #define _PWM4INTFLG_PWM4PHIF 0x04 5775 #define _PWM4INTFLG_OFIF 0x08 5776 #define _PWM4INTFLG_PWM4OFIF 0x08 5777 5778 //============================================================================== 5779 5780 5781 //============================================================================== 5782 // PWM4CLKCON Bits 5783 5784 extern __at(0x0DCE) __sfr PWM4CLKCON; 5785 5786 typedef union 5787 { 5788 struct 5789 { 5790 unsigned PWM4CS0 : 1; 5791 unsigned PWM4CS1 : 1; 5792 unsigned : 1; 5793 unsigned : 1; 5794 unsigned PWM4PS0 : 1; 5795 unsigned PWM4PS1 : 1; 5796 unsigned PWM4PS2 : 1; 5797 unsigned : 1; 5798 }; 5799 5800 struct 5801 { 5802 unsigned CS0 : 1; 5803 unsigned CS1 : 1; 5804 unsigned : 1; 5805 unsigned : 1; 5806 unsigned PS0 : 1; 5807 unsigned PS1 : 1; 5808 unsigned PS2 : 1; 5809 unsigned : 1; 5810 }; 5811 5812 struct 5813 { 5814 unsigned CS : 2; 5815 unsigned : 6; 5816 }; 5817 5818 struct 5819 { 5820 unsigned PWM4CS : 2; 5821 unsigned : 6; 5822 }; 5823 5824 struct 5825 { 5826 unsigned : 4; 5827 unsigned PS : 3; 5828 unsigned : 1; 5829 }; 5830 5831 struct 5832 { 5833 unsigned : 4; 5834 unsigned PWM4PS : 3; 5835 unsigned : 1; 5836 }; 5837 } __PWM4CLKCONbits_t; 5838 5839 extern __at(0x0DCE) volatile __PWM4CLKCONbits_t PWM4CLKCONbits; 5840 5841 #define _PWM4CLKCON_PWM4CS0 0x01 5842 #define _PWM4CLKCON_CS0 0x01 5843 #define _PWM4CLKCON_PWM4CS1 0x02 5844 #define _PWM4CLKCON_CS1 0x02 5845 #define _PWM4CLKCON_PWM4PS0 0x10 5846 #define _PWM4CLKCON_PS0 0x10 5847 #define _PWM4CLKCON_PWM4PS1 0x20 5848 #define _PWM4CLKCON_PS1 0x20 5849 #define _PWM4CLKCON_PWM4PS2 0x40 5850 #define _PWM4CLKCON_PS2 0x40 5851 5852 //============================================================================== 5853 5854 5855 //============================================================================== 5856 // PWM4LDCON Bits 5857 5858 extern __at(0x0DCF) __sfr PWM4LDCON; 5859 5860 typedef union 5861 { 5862 struct 5863 { 5864 unsigned PWM4LDS0 : 1; 5865 unsigned PWM4LDS1 : 1; 5866 unsigned : 1; 5867 unsigned : 1; 5868 unsigned : 1; 5869 unsigned : 1; 5870 unsigned LDT : 1; 5871 unsigned LDA : 1; 5872 }; 5873 5874 struct 5875 { 5876 unsigned LDS0 : 1; 5877 unsigned LDS1 : 1; 5878 unsigned : 1; 5879 unsigned : 1; 5880 unsigned : 1; 5881 unsigned : 1; 5882 unsigned PWM4LDM : 1; 5883 unsigned PWM4LD : 1; 5884 }; 5885 5886 struct 5887 { 5888 unsigned LDS : 2; 5889 unsigned : 6; 5890 }; 5891 5892 struct 5893 { 5894 unsigned PWM4LDS : 2; 5895 unsigned : 6; 5896 }; 5897 } __PWM4LDCONbits_t; 5898 5899 extern __at(0x0DCF) volatile __PWM4LDCONbits_t PWM4LDCONbits; 5900 5901 #define _PWM4LDCON_PWM4LDS0 0x01 5902 #define _PWM4LDCON_LDS0 0x01 5903 #define _PWM4LDCON_PWM4LDS1 0x02 5904 #define _PWM4LDCON_LDS1 0x02 5905 #define _PWM4LDCON_LDT 0x40 5906 #define _PWM4LDCON_PWM4LDM 0x40 5907 #define _PWM4LDCON_LDA 0x80 5908 #define _PWM4LDCON_PWM4LD 0x80 5909 5910 //============================================================================== 5911 5912 5913 //============================================================================== 5914 // PWM4OFCON Bits 5915 5916 extern __at(0x0DD0) __sfr PWM4OFCON; 5917 5918 typedef union 5919 { 5920 struct 5921 { 5922 unsigned PWM4OFS0 : 1; 5923 unsigned PWM4OFS1 : 1; 5924 unsigned : 1; 5925 unsigned : 1; 5926 unsigned OFO : 1; 5927 unsigned PWM4OFM0 : 1; 5928 unsigned PWM4OFM1 : 1; 5929 unsigned : 1; 5930 }; 5931 5932 struct 5933 { 5934 unsigned OFS0 : 1; 5935 unsigned OFS1 : 1; 5936 unsigned : 1; 5937 unsigned : 1; 5938 unsigned PWM4OFMC : 1; 5939 unsigned OFM0 : 1; 5940 unsigned OFM1 : 1; 5941 unsigned : 1; 5942 }; 5943 5944 struct 5945 { 5946 unsigned OFS : 2; 5947 unsigned : 6; 5948 }; 5949 5950 struct 5951 { 5952 unsigned PWM4OFS : 2; 5953 unsigned : 6; 5954 }; 5955 5956 struct 5957 { 5958 unsigned : 5; 5959 unsigned PWM4OFM : 2; 5960 unsigned : 1; 5961 }; 5962 5963 struct 5964 { 5965 unsigned : 5; 5966 unsigned OFM : 2; 5967 unsigned : 1; 5968 }; 5969 } __PWM4OFCONbits_t; 5970 5971 extern __at(0x0DD0) volatile __PWM4OFCONbits_t PWM4OFCONbits; 5972 5973 #define _PWM4OFCON_PWM4OFS0 0x01 5974 #define _PWM4OFCON_OFS0 0x01 5975 #define _PWM4OFCON_PWM4OFS1 0x02 5976 #define _PWM4OFCON_OFS1 0x02 5977 #define _PWM4OFCON_OFO 0x10 5978 #define _PWM4OFCON_PWM4OFMC 0x10 5979 #define _PWM4OFCON_PWM4OFM0 0x20 5980 #define _PWM4OFCON_OFM0 0x20 5981 #define _PWM4OFCON_PWM4OFM1 0x40 5982 #define _PWM4OFCON_OFM1 0x40 5983 5984 //============================================================================== 5985 5986 5987 //============================================================================== 5988 // PPSLOCK Bits 5989 5990 extern __at(0x0E0F) __sfr PPSLOCK; 5991 5992 typedef struct 5993 { 5994 unsigned PPSLOCKED : 1; 5995 unsigned : 1; 5996 unsigned : 1; 5997 unsigned : 1; 5998 unsigned : 1; 5999 unsigned : 1; 6000 unsigned : 1; 6001 unsigned : 1; 6002 } __PPSLOCKbits_t; 6003 6004 extern __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits; 6005 6006 #define _PPSLOCKED 0x01 6007 6008 //============================================================================== 6009 6010 6011 //============================================================================== 6012 // INTPPS Bits 6013 6014 extern __at(0x0E10) __sfr INTPPS; 6015 6016 typedef union 6017 { 6018 struct 6019 { 6020 unsigned INTPPS0 : 1; 6021 unsigned INTPPS1 : 1; 6022 unsigned INTPPS2 : 1; 6023 unsigned INTPPS3 : 1; 6024 unsigned INTPPS4 : 1; 6025 unsigned : 1; 6026 unsigned : 1; 6027 unsigned : 1; 6028 }; 6029 6030 struct 6031 { 6032 unsigned INTPPS : 5; 6033 unsigned : 3; 6034 }; 6035 } __INTPPSbits_t; 6036 6037 extern __at(0x0E10) volatile __INTPPSbits_t INTPPSbits; 6038 6039 #define _INTPPS0 0x01 6040 #define _INTPPS1 0x02 6041 #define _INTPPS2 0x04 6042 #define _INTPPS3 0x08 6043 #define _INTPPS4 0x10 6044 6045 //============================================================================== 6046 6047 6048 //============================================================================== 6049 // T0CKIPPS Bits 6050 6051 extern __at(0x0E11) __sfr T0CKIPPS; 6052 6053 typedef union 6054 { 6055 struct 6056 { 6057 unsigned T0CKIPPS0 : 1; 6058 unsigned T0CKIPPS1 : 1; 6059 unsigned T0CKIPPS2 : 1; 6060 unsigned T0CKIPPS3 : 1; 6061 unsigned T0CKIPPS4 : 1; 6062 unsigned : 1; 6063 unsigned : 1; 6064 unsigned : 1; 6065 }; 6066 6067 struct 6068 { 6069 unsigned T0CKIPPS : 5; 6070 unsigned : 3; 6071 }; 6072 } __T0CKIPPSbits_t; 6073 6074 extern __at(0x0E11) volatile __T0CKIPPSbits_t T0CKIPPSbits; 6075 6076 #define _T0CKIPPS0 0x01 6077 #define _T0CKIPPS1 0x02 6078 #define _T0CKIPPS2 0x04 6079 #define _T0CKIPPS3 0x08 6080 #define _T0CKIPPS4 0x10 6081 6082 //============================================================================== 6083 6084 6085 //============================================================================== 6086 // T1CKIPPS Bits 6087 6088 extern __at(0x0E12) __sfr T1CKIPPS; 6089 6090 typedef union 6091 { 6092 struct 6093 { 6094 unsigned T1CKIPPS0 : 1; 6095 unsigned T1CKIPPS1 : 1; 6096 unsigned T1CKIPPS2 : 1; 6097 unsigned T1CKIPPS3 : 1; 6098 unsigned T1CKIPPS4 : 1; 6099 unsigned : 1; 6100 unsigned : 1; 6101 unsigned : 1; 6102 }; 6103 6104 struct 6105 { 6106 unsigned T1CKIPPS : 5; 6107 unsigned : 3; 6108 }; 6109 } __T1CKIPPSbits_t; 6110 6111 extern __at(0x0E12) volatile __T1CKIPPSbits_t T1CKIPPSbits; 6112 6113 #define _T1CKIPPS0 0x01 6114 #define _T1CKIPPS1 0x02 6115 #define _T1CKIPPS2 0x04 6116 #define _T1CKIPPS3 0x08 6117 #define _T1CKIPPS4 0x10 6118 6119 //============================================================================== 6120 6121 6122 //============================================================================== 6123 // T1GPPS Bits 6124 6125 extern __at(0x0E13) __sfr T1GPPS; 6126 6127 typedef union 6128 { 6129 struct 6130 { 6131 unsigned T1GPPS0 : 1; 6132 unsigned T1GPPS1 : 1; 6133 unsigned T1GPPS2 : 1; 6134 unsigned T1GPPS3 : 1; 6135 unsigned T1GPPS4 : 1; 6136 unsigned : 1; 6137 unsigned : 1; 6138 unsigned : 1; 6139 }; 6140 6141 struct 6142 { 6143 unsigned T1GPPS : 5; 6144 unsigned : 3; 6145 }; 6146 } __T1GPPSbits_t; 6147 6148 extern __at(0x0E13) volatile __T1GPPSbits_t T1GPPSbits; 6149 6150 #define _T1GPPS0 0x01 6151 #define _T1GPPS1 0x02 6152 #define _T1GPPS2 0x04 6153 #define _T1GPPS3 0x08 6154 #define _T1GPPS4 0x10 6155 6156 //============================================================================== 6157 6158 6159 //============================================================================== 6160 // CWG1INPPS Bits 6161 6162 extern __at(0x0E14) __sfr CWG1INPPS; 6163 6164 typedef union 6165 { 6166 struct 6167 { 6168 unsigned CWG1INPPS0 : 1; 6169 unsigned CWG1INPPS1 : 1; 6170 unsigned CWG1INPPS2 : 1; 6171 unsigned CWG1INPPS3 : 1; 6172 unsigned CWG1INPPS4 : 1; 6173 unsigned : 1; 6174 unsigned : 1; 6175 unsigned : 1; 6176 }; 6177 6178 struct 6179 { 6180 unsigned CWG1INPPS : 5; 6181 unsigned : 3; 6182 }; 6183 } __CWG1INPPSbits_t; 6184 6185 extern __at(0x0E14) volatile __CWG1INPPSbits_t CWG1INPPSbits; 6186 6187 #define _CWG1INPPS0 0x01 6188 #define _CWG1INPPS1 0x02 6189 #define _CWG1INPPS2 0x04 6190 #define _CWG1INPPS3 0x08 6191 #define _CWG1INPPS4 0x10 6192 6193 //============================================================================== 6194 6195 6196 //============================================================================== 6197 // RXPPS Bits 6198 6199 extern __at(0x0E15) __sfr RXPPS; 6200 6201 typedef union 6202 { 6203 struct 6204 { 6205 unsigned RXPPS0 : 1; 6206 unsigned RXPPS1 : 1; 6207 unsigned RXPPS2 : 1; 6208 unsigned RXPPS3 : 1; 6209 unsigned RXPPS4 : 1; 6210 unsigned : 1; 6211 unsigned : 1; 6212 unsigned : 1; 6213 }; 6214 6215 struct 6216 { 6217 unsigned RXPPS : 5; 6218 unsigned : 3; 6219 }; 6220 } __RXPPSbits_t; 6221 6222 extern __at(0x0E15) volatile __RXPPSbits_t RXPPSbits; 6223 6224 #define _RXPPS0 0x01 6225 #define _RXPPS1 0x02 6226 #define _RXPPS2 0x04 6227 #define _RXPPS3 0x08 6228 #define _RXPPS4 0x10 6229 6230 //============================================================================== 6231 6232 6233 //============================================================================== 6234 // CKPPS Bits 6235 6236 extern __at(0x0E16) __sfr CKPPS; 6237 6238 typedef union 6239 { 6240 struct 6241 { 6242 unsigned CKPPS0 : 1; 6243 unsigned CKPPS1 : 1; 6244 unsigned CKPPS2 : 1; 6245 unsigned CKPPS3 : 1; 6246 unsigned CKPPS4 : 1; 6247 unsigned : 1; 6248 unsigned : 1; 6249 unsigned : 1; 6250 }; 6251 6252 struct 6253 { 6254 unsigned CKPPS : 5; 6255 unsigned : 3; 6256 }; 6257 } __CKPPSbits_t; 6258 6259 extern __at(0x0E16) volatile __CKPPSbits_t CKPPSbits; 6260 6261 #define _CKPPS0 0x01 6262 #define _CKPPS1 0x02 6263 #define _CKPPS2 0x04 6264 #define _CKPPS3 0x08 6265 #define _CKPPS4 0x10 6266 6267 //============================================================================== 6268 6269 6270 //============================================================================== 6271 // ADCACTPPS Bits 6272 6273 extern __at(0x0E17) __sfr ADCACTPPS; 6274 6275 typedef union 6276 { 6277 struct 6278 { 6279 unsigned ADCACTPPS0 : 1; 6280 unsigned ADCACTPPS1 : 1; 6281 unsigned ADCACTPPS2 : 1; 6282 unsigned ADCACTPPS3 : 1; 6283 unsigned ADCACTPPS4 : 1; 6284 unsigned : 1; 6285 unsigned : 1; 6286 unsigned : 1; 6287 }; 6288 6289 struct 6290 { 6291 unsigned ADCACTPPS : 5; 6292 unsigned : 3; 6293 }; 6294 } __ADCACTPPSbits_t; 6295 6296 extern __at(0x0E17) volatile __ADCACTPPSbits_t ADCACTPPSbits; 6297 6298 #define _ADCACTPPS0 0x01 6299 #define _ADCACTPPS1 0x02 6300 #define _ADCACTPPS2 0x04 6301 #define _ADCACTPPS3 0x08 6302 #define _ADCACTPPS4 0x10 6303 6304 //============================================================================== 6305 6306 6307 //============================================================================== 6308 // RA0PPS Bits 6309 6310 extern __at(0x0E90) __sfr RA0PPS; 6311 6312 typedef union 6313 { 6314 struct 6315 { 6316 unsigned RA0PPS0 : 1; 6317 unsigned RA0PPS1 : 1; 6318 unsigned RA0PPS2 : 1; 6319 unsigned RA0PPS3 : 1; 6320 unsigned : 1; 6321 unsigned : 1; 6322 unsigned : 1; 6323 unsigned : 1; 6324 }; 6325 6326 struct 6327 { 6328 unsigned RA0PPS : 4; 6329 unsigned : 4; 6330 }; 6331 } __RA0PPSbits_t; 6332 6333 extern __at(0x0E90) volatile __RA0PPSbits_t RA0PPSbits; 6334 6335 #define _RA0PPS0 0x01 6336 #define _RA0PPS1 0x02 6337 #define _RA0PPS2 0x04 6338 #define _RA0PPS3 0x08 6339 6340 //============================================================================== 6341 6342 6343 //============================================================================== 6344 // RA1PPS Bits 6345 6346 extern __at(0x0E91) __sfr RA1PPS; 6347 6348 typedef union 6349 { 6350 struct 6351 { 6352 unsigned RA1PPS0 : 1; 6353 unsigned RA1PPS1 : 1; 6354 unsigned RA1PPS2 : 1; 6355 unsigned RA1PPS3 : 1; 6356 unsigned : 1; 6357 unsigned : 1; 6358 unsigned : 1; 6359 unsigned : 1; 6360 }; 6361 6362 struct 6363 { 6364 unsigned RA1PPS : 4; 6365 unsigned : 4; 6366 }; 6367 } __RA1PPSbits_t; 6368 6369 extern __at(0x0E91) volatile __RA1PPSbits_t RA1PPSbits; 6370 6371 #define _RA1PPS0 0x01 6372 #define _RA1PPS1 0x02 6373 #define _RA1PPS2 0x04 6374 #define _RA1PPS3 0x08 6375 6376 //============================================================================== 6377 6378 6379 //============================================================================== 6380 // RA2PPS Bits 6381 6382 extern __at(0x0E92) __sfr RA2PPS; 6383 6384 typedef union 6385 { 6386 struct 6387 { 6388 unsigned RA2PPS0 : 1; 6389 unsigned RA2PPS1 : 1; 6390 unsigned RA2PPS2 : 1; 6391 unsigned RA2PPS3 : 1; 6392 unsigned : 1; 6393 unsigned : 1; 6394 unsigned : 1; 6395 unsigned : 1; 6396 }; 6397 6398 struct 6399 { 6400 unsigned RA2PPS : 4; 6401 unsigned : 4; 6402 }; 6403 } __RA2PPSbits_t; 6404 6405 extern __at(0x0E92) volatile __RA2PPSbits_t RA2PPSbits; 6406 6407 #define _RA2PPS0 0x01 6408 #define _RA2PPS1 0x02 6409 #define _RA2PPS2 0x04 6410 #define _RA2PPS3 0x08 6411 6412 //============================================================================== 6413 6414 6415 //============================================================================== 6416 // RA4PPS Bits 6417 6418 extern __at(0x0E94) __sfr RA4PPS; 6419 6420 typedef union 6421 { 6422 struct 6423 { 6424 unsigned RA4PPS0 : 1; 6425 unsigned RA4PPS1 : 1; 6426 unsigned RA4PPS2 : 1; 6427 unsigned RA4PPS3 : 1; 6428 unsigned : 1; 6429 unsigned : 1; 6430 unsigned : 1; 6431 unsigned : 1; 6432 }; 6433 6434 struct 6435 { 6436 unsigned RA4PPS : 4; 6437 unsigned : 4; 6438 }; 6439 } __RA4PPSbits_t; 6440 6441 extern __at(0x0E94) volatile __RA4PPSbits_t RA4PPSbits; 6442 6443 #define _RA4PPS0 0x01 6444 #define _RA4PPS1 0x02 6445 #define _RA4PPS2 0x04 6446 #define _RA4PPS3 0x08 6447 6448 //============================================================================== 6449 6450 6451 //============================================================================== 6452 // RA5PPS Bits 6453 6454 extern __at(0x0E95) __sfr RA5PPS; 6455 6456 typedef union 6457 { 6458 struct 6459 { 6460 unsigned RA5PPS0 : 1; 6461 unsigned RA5PPS1 : 1; 6462 unsigned RA5PPS2 : 1; 6463 unsigned RA5PPS3 : 1; 6464 unsigned : 1; 6465 unsigned : 1; 6466 unsigned : 1; 6467 unsigned : 1; 6468 }; 6469 6470 struct 6471 { 6472 unsigned RA5PPS : 4; 6473 unsigned : 4; 6474 }; 6475 } __RA5PPSbits_t; 6476 6477 extern __at(0x0E95) volatile __RA5PPSbits_t RA5PPSbits; 6478 6479 #define _RA5PPS0 0x01 6480 #define _RA5PPS1 0x02 6481 #define _RA5PPS2 0x04 6482 #define _RA5PPS3 0x08 6483 6484 //============================================================================== 6485 6486 6487 //============================================================================== 6488 // RB4PPS Bits 6489 6490 extern __at(0x0E9C) __sfr RB4PPS; 6491 6492 typedef union 6493 { 6494 struct 6495 { 6496 unsigned RB4PPS0 : 1; 6497 unsigned RB4PPS1 : 1; 6498 unsigned RB4PPS2 : 1; 6499 unsigned RB4PPS3 : 1; 6500 unsigned : 1; 6501 unsigned : 1; 6502 unsigned : 1; 6503 unsigned : 1; 6504 }; 6505 6506 struct 6507 { 6508 unsigned RB4PPS : 4; 6509 unsigned : 4; 6510 }; 6511 } __RB4PPSbits_t; 6512 6513 extern __at(0x0E9C) volatile __RB4PPSbits_t RB4PPSbits; 6514 6515 #define _RB4PPS0 0x01 6516 #define _RB4PPS1 0x02 6517 #define _RB4PPS2 0x04 6518 #define _RB4PPS3 0x08 6519 6520 //============================================================================== 6521 6522 6523 //============================================================================== 6524 // RB5PPS Bits 6525 6526 extern __at(0x0E9D) __sfr RB5PPS; 6527 6528 typedef union 6529 { 6530 struct 6531 { 6532 unsigned RB5PPS0 : 1; 6533 unsigned RB5PPS1 : 1; 6534 unsigned RB5PPS2 : 1; 6535 unsigned RB5PPS3 : 1; 6536 unsigned : 1; 6537 unsigned : 1; 6538 unsigned : 1; 6539 unsigned : 1; 6540 }; 6541 6542 struct 6543 { 6544 unsigned RB5PPS : 4; 6545 unsigned : 4; 6546 }; 6547 } __RB5PPSbits_t; 6548 6549 extern __at(0x0E9D) volatile __RB5PPSbits_t RB5PPSbits; 6550 6551 #define _RB5PPS0 0x01 6552 #define _RB5PPS1 0x02 6553 #define _RB5PPS2 0x04 6554 #define _RB5PPS3 0x08 6555 6556 //============================================================================== 6557 6558 6559 //============================================================================== 6560 // RB6PPS Bits 6561 6562 extern __at(0x0E9E) __sfr RB6PPS; 6563 6564 typedef union 6565 { 6566 struct 6567 { 6568 unsigned RB6PPS0 : 1; 6569 unsigned RB6PPS1 : 1; 6570 unsigned RB6PPS2 : 1; 6571 unsigned RB6PPS3 : 1; 6572 unsigned : 1; 6573 unsigned : 1; 6574 unsigned : 1; 6575 unsigned : 1; 6576 }; 6577 6578 struct 6579 { 6580 unsigned RB6PPS : 4; 6581 unsigned : 4; 6582 }; 6583 } __RB6PPSbits_t; 6584 6585 extern __at(0x0E9E) volatile __RB6PPSbits_t RB6PPSbits; 6586 6587 #define _RB6PPS0 0x01 6588 #define _RB6PPS1 0x02 6589 #define _RB6PPS2 0x04 6590 #define _RB6PPS3 0x08 6591 6592 //============================================================================== 6593 6594 6595 //============================================================================== 6596 // RB7PPS Bits 6597 6598 extern __at(0x0E9F) __sfr RB7PPS; 6599 6600 typedef union 6601 { 6602 struct 6603 { 6604 unsigned RB7PPS0 : 1; 6605 unsigned RB7PPS1 : 1; 6606 unsigned RB7PPS2 : 1; 6607 unsigned RB7PPS3 : 1; 6608 unsigned : 1; 6609 unsigned : 1; 6610 unsigned : 1; 6611 unsigned : 1; 6612 }; 6613 6614 struct 6615 { 6616 unsigned RB7PPS : 4; 6617 unsigned : 4; 6618 }; 6619 } __RB7PPSbits_t; 6620 6621 extern __at(0x0E9F) volatile __RB7PPSbits_t RB7PPSbits; 6622 6623 #define _RB7PPS0 0x01 6624 #define _RB7PPS1 0x02 6625 #define _RB7PPS2 0x04 6626 #define _RB7PPS3 0x08 6627 6628 //============================================================================== 6629 6630 6631 //============================================================================== 6632 // RC0PPS Bits 6633 6634 extern __at(0x0EA0) __sfr RC0PPS; 6635 6636 typedef union 6637 { 6638 struct 6639 { 6640 unsigned RC0PPS0 : 1; 6641 unsigned RC0PPS1 : 1; 6642 unsigned RC0PPS2 : 1; 6643 unsigned RC0PPS3 : 1; 6644 unsigned : 1; 6645 unsigned : 1; 6646 unsigned : 1; 6647 unsigned : 1; 6648 }; 6649 6650 struct 6651 { 6652 unsigned RC0PPS : 4; 6653 unsigned : 4; 6654 }; 6655 } __RC0PPSbits_t; 6656 6657 extern __at(0x0EA0) volatile __RC0PPSbits_t RC0PPSbits; 6658 6659 #define _RC0PPS0 0x01 6660 #define _RC0PPS1 0x02 6661 #define _RC0PPS2 0x04 6662 #define _RC0PPS3 0x08 6663 6664 //============================================================================== 6665 6666 6667 //============================================================================== 6668 // RC1PPS Bits 6669 6670 extern __at(0x0EA1) __sfr RC1PPS; 6671 6672 typedef union 6673 { 6674 struct 6675 { 6676 unsigned RC1PPS0 : 1; 6677 unsigned RC1PPS1 : 1; 6678 unsigned RC1PPS2 : 1; 6679 unsigned RC1PPS3 : 1; 6680 unsigned : 1; 6681 unsigned : 1; 6682 unsigned : 1; 6683 unsigned : 1; 6684 }; 6685 6686 struct 6687 { 6688 unsigned RC1PPS : 4; 6689 unsigned : 4; 6690 }; 6691 } __RC1PPSbits_t; 6692 6693 extern __at(0x0EA1) volatile __RC1PPSbits_t RC1PPSbits; 6694 6695 #define _RC1PPS0 0x01 6696 #define _RC1PPS1 0x02 6697 #define _RC1PPS2 0x04 6698 #define _RC1PPS3 0x08 6699 6700 //============================================================================== 6701 6702 6703 //============================================================================== 6704 // RC2PPS Bits 6705 6706 extern __at(0x0EA2) __sfr RC2PPS; 6707 6708 typedef union 6709 { 6710 struct 6711 { 6712 unsigned RC1PPS0 : 1; 6713 unsigned RC1PPS1 : 1; 6714 unsigned RC1PPS2 : 1; 6715 unsigned RC1PPS3 : 1; 6716 unsigned : 1; 6717 unsigned : 1; 6718 unsigned : 1; 6719 unsigned : 1; 6720 }; 6721 6722 struct 6723 { 6724 unsigned RC1PPS : 4; 6725 unsigned : 4; 6726 }; 6727 } __RC2PPSbits_t; 6728 6729 extern __at(0x0EA2) volatile __RC2PPSbits_t RC2PPSbits; 6730 6731 #define _RC2PPS_RC1PPS0 0x01 6732 #define _RC2PPS_RC1PPS1 0x02 6733 #define _RC2PPS_RC1PPS2 0x04 6734 #define _RC2PPS_RC1PPS3 0x08 6735 6736 //============================================================================== 6737 6738 6739 //============================================================================== 6740 // RC3PPS Bits 6741 6742 extern __at(0x0EA3) __sfr RC3PPS; 6743 6744 typedef union 6745 { 6746 struct 6747 { 6748 unsigned RC3PPS0 : 1; 6749 unsigned RC3PPS1 : 1; 6750 unsigned RC3PPS2 : 1; 6751 unsigned RC3PPS3 : 1; 6752 unsigned : 1; 6753 unsigned : 1; 6754 unsigned : 1; 6755 unsigned : 1; 6756 }; 6757 6758 struct 6759 { 6760 unsigned RC3PPS : 4; 6761 unsigned : 4; 6762 }; 6763 } __RC3PPSbits_t; 6764 6765 extern __at(0x0EA3) volatile __RC3PPSbits_t RC3PPSbits; 6766 6767 #define _RC3PPS0 0x01 6768 #define _RC3PPS1 0x02 6769 #define _RC3PPS2 0x04 6770 #define _RC3PPS3 0x08 6771 6772 //============================================================================== 6773 6774 6775 //============================================================================== 6776 // RC4PPS Bits 6777 6778 extern __at(0x0EA4) __sfr RC4PPS; 6779 6780 typedef union 6781 { 6782 struct 6783 { 6784 unsigned RC4PPS0 : 1; 6785 unsigned RC4PPS1 : 1; 6786 unsigned RC4PPS2 : 1; 6787 unsigned RC4PPS3 : 1; 6788 unsigned : 1; 6789 unsigned : 1; 6790 unsigned : 1; 6791 unsigned : 1; 6792 }; 6793 6794 struct 6795 { 6796 unsigned RC4PPS : 4; 6797 unsigned : 4; 6798 }; 6799 } __RC4PPSbits_t; 6800 6801 extern __at(0x0EA4) volatile __RC4PPSbits_t RC4PPSbits; 6802 6803 #define _RC4PPS0 0x01 6804 #define _RC4PPS1 0x02 6805 #define _RC4PPS2 0x04 6806 #define _RC4PPS3 0x08 6807 6808 //============================================================================== 6809 6810 6811 //============================================================================== 6812 // RC5PPS Bits 6813 6814 extern __at(0x0EA5) __sfr RC5PPS; 6815 6816 typedef union 6817 { 6818 struct 6819 { 6820 unsigned RC5PPS0 : 1; 6821 unsigned RC5PPS1 : 1; 6822 unsigned RC5PPS2 : 1; 6823 unsigned RC5PPS3 : 1; 6824 unsigned : 1; 6825 unsigned : 1; 6826 unsigned : 1; 6827 unsigned : 1; 6828 }; 6829 6830 struct 6831 { 6832 unsigned RC5PPS : 4; 6833 unsigned : 4; 6834 }; 6835 } __RC5PPSbits_t; 6836 6837 extern __at(0x0EA5) volatile __RC5PPSbits_t RC5PPSbits; 6838 6839 #define _RC5PPS0 0x01 6840 #define _RC5PPS1 0x02 6841 #define _RC5PPS2 0x04 6842 #define _RC5PPS3 0x08 6843 6844 //============================================================================== 6845 6846 6847 //============================================================================== 6848 // RC6PPS Bits 6849 6850 extern __at(0x0EA6) __sfr RC6PPS; 6851 6852 typedef union 6853 { 6854 struct 6855 { 6856 unsigned RC6PPS0 : 1; 6857 unsigned RC6PPS1 : 1; 6858 unsigned RC6PPS2 : 1; 6859 unsigned RC6PPS3 : 1; 6860 unsigned : 1; 6861 unsigned : 1; 6862 unsigned : 1; 6863 unsigned : 1; 6864 }; 6865 6866 struct 6867 { 6868 unsigned RC6PPS : 4; 6869 unsigned : 4; 6870 }; 6871 } __RC6PPSbits_t; 6872 6873 extern __at(0x0EA6) volatile __RC6PPSbits_t RC6PPSbits; 6874 6875 #define _RC6PPS0 0x01 6876 #define _RC6PPS1 0x02 6877 #define _RC6PPS2 0x04 6878 #define _RC6PPS3 0x08 6879 6880 //============================================================================== 6881 6882 6883 //============================================================================== 6884 // RC7PPS Bits 6885 6886 extern __at(0x0EA7) __sfr RC7PPS; 6887 6888 typedef union 6889 { 6890 struct 6891 { 6892 unsigned RC7PPS0 : 1; 6893 unsigned RC7PPS1 : 1; 6894 unsigned RC7PPS2 : 1; 6895 unsigned RC7PPS3 : 1; 6896 unsigned : 1; 6897 unsigned : 1; 6898 unsigned : 1; 6899 unsigned : 1; 6900 }; 6901 6902 struct 6903 { 6904 unsigned RC7PPS : 4; 6905 unsigned : 4; 6906 }; 6907 } __RC7PPSbits_t; 6908 6909 extern __at(0x0EA7) volatile __RC7PPSbits_t RC7PPSbits; 6910 6911 #define _RC7PPS0 0x01 6912 #define _RC7PPS1 0x02 6913 #define _RC7PPS2 0x04 6914 #define _RC7PPS3 0x08 6915 6916 //============================================================================== 6917 6918 6919 //============================================================================== 6920 // STATUS_SHAD Bits 6921 6922 extern __at(0x0FE4) __sfr STATUS_SHAD; 6923 6924 typedef struct 6925 { 6926 unsigned C_SHAD : 1; 6927 unsigned DC_SHAD : 1; 6928 unsigned Z_SHAD : 1; 6929 unsigned : 1; 6930 unsigned : 1; 6931 unsigned : 1; 6932 unsigned : 1; 6933 unsigned : 1; 6934 } __STATUS_SHADbits_t; 6935 6936 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 6937 6938 #define _C_SHAD 0x01 6939 #define _DC_SHAD 0x02 6940 #define _Z_SHAD 0x04 6941 6942 //============================================================================== 6943 6944 extern __at(0x0FE5) __sfr WREG_SHAD; 6945 extern __at(0x0FE6) __sfr BSR_SHAD; 6946 extern __at(0x0FE7) __sfr PCLATH_SHAD; 6947 extern __at(0x0FE8) __sfr FSR0L_SHAD; 6948 extern __at(0x0FE8) __sfr FSR0_SHAD; 6949 extern __at(0x0FE9) __sfr FSR0H_SHAD; 6950 extern __at(0x0FEA) __sfr FSR1L_SHAD; 6951 extern __at(0x0FEA) __sfr FSR1_SHAD; 6952 extern __at(0x0FEB) __sfr FSR1H_SHAD; 6953 extern __at(0x0FED) __sfr STKPTR; 6954 extern __at(0x0FEE) __sfr TOS; 6955 extern __at(0x0FEE) __sfr TOSL; 6956 extern __at(0x0FEF) __sfr TOSH; 6957 6958 //============================================================================== 6959 // 6960 // Configuration Bits 6961 // 6962 //============================================================================== 6963 6964 #define _CONFIG1 0x8007 6965 #define _CONFIG2 0x8008 6966 6967 //----------------------------- CONFIG1 Options ------------------------------- 6968 6969 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator; I/O function on CLKIN pin. 6970 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin. 6971 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin. 6972 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin. 6973 #define _WDTE_OFF 0x3FE7 // WDT disabled. 6974 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register. 6975 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep. 6976 #define _WDTE_ON 0x3FFF // WDT enabled. 6977 #define _PWRTE_ON 0x3FDF // PWRT enabled. 6978 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 6979 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input. 6980 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR. 6981 #define _CP_ON 0x3F7F // Program memory code protection is enabled. 6982 #define _CP_OFF 0x3FFF // Program memory code protection is disabled. 6983 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled. 6984 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register. 6985 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep. 6986 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled. 6987 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin. 6988 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin. 6989 6990 //----------------------------- CONFIG2 Options ------------------------------- 6991 6992 #define _WRT_ALL 0x3FFC // 000h to FFFh write protected, no addresses may be modified by EECON control. 6993 #define _WRT_HALF 0x3FFD // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control. 6994 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control. 6995 #define _WRT_OFF 0x3FFF // Write protection off. 6996 #define _PPS1WAY_OFF 0x3FFB // PPSLOCKED Bit Can Be Cleared & Set Repeatedly. 6997 #define _PPS1WAY_ON 0x3FFF // PPSLOCKED Bit Can Be Cleared & Set Once. 6998 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled. 6999 #define _PLLEN_ON 0x3FFF // 4x PLL enabled. 7000 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset. 7001 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset. 7002 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected. 7003 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected. 7004 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected. 7005 #define _LPBOREN_ON 0x37FF // LPBOR is enabled. 7006 #define _LPBOREN_OFF 0x3FFF // LPBOR is disabled. 7007 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger. 7008 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins. 7009 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming. 7010 #define _LVP_ON 0x3FFF // Low-voltage programming enabled. 7011 7012 //============================================================================== 7013 7014 #define _DEVID1 0x8006 7015 7016 #define _IDLOC0 0x8000 7017 #define _IDLOC1 0x8001 7018 #define _IDLOC2 0x8002 7019 #define _IDLOC3 0x8003 7020 7021 //============================================================================== 7022 7023 #ifndef NO_BIT_DEFINES 7024 7025 #define ADCACTPPS0 ADCACTPPSbits.ADCACTPPS0 // bit 0 7026 #define ADCACTPPS1 ADCACTPPSbits.ADCACTPPS1 // bit 1 7027 #define ADCACTPPS2 ADCACTPPSbits.ADCACTPPS2 // bit 2 7028 #define ADCACTPPS3 ADCACTPPSbits.ADCACTPPS3 // bit 3 7029 #define ADCACTPPS4 ADCACTPPSbits.ADCACTPPS4 // bit 4 7030 7031 #define ADON ADCON0bits.ADON // bit 0 7032 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits 7033 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits 7034 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits 7035 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits 7036 #define CHS0 ADCON0bits.CHS0 // bit 2 7037 #define CHS1 ADCON0bits.CHS1 // bit 3 7038 #define CHS2 ADCON0bits.CHS2 // bit 4 7039 #define CHS3 ADCON0bits.CHS3 // bit 5 7040 #define CHS4 ADCON0bits.CHS4 // bit 6 7041 7042 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0 7043 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1 7044 #define ADCS0 ADCON1bits.ADCS0 // bit 4 7045 #define ADCS1 ADCON1bits.ADCS1 // bit 5 7046 #define ADCS2 ADCON1bits.ADCS2 // bit 6 7047 #define ADFM ADCON1bits.ADFM // bit 7 7048 7049 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4 7050 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5 7051 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6 7052 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7 7053 7054 #define ANSA0 ANSELAbits.ANSA0 // bit 0 7055 #define ANSA1 ANSELAbits.ANSA1 // bit 1 7056 #define ANSA2 ANSELAbits.ANSA2 // bit 2 7057 #define ANSA4 ANSELAbits.ANSA4 // bit 4 7058 7059 #define ANSB4 ANSELBbits.ANSB4 // bit 4 7060 #define ANSB5 ANSELBbits.ANSB5 // bit 5 7061 7062 #define ANSC0 ANSELCbits.ANSC0 // bit 0 7063 #define ANSC1 ANSELCbits.ANSC1 // bit 1 7064 #define ANSC2 ANSELCbits.ANSC2 // bit 2 7065 #define ANSC3 ANSELCbits.ANSC3 // bit 3 7066 #define ANSC6 ANSELCbits.ANSC6 // bit 6 7067 #define ANSC7 ANSELCbits.ANSC7 // bit 7 7068 7069 #define ABDEN BAUDCONbits.ABDEN // bit 0 7070 #define WUE BAUDCONbits.WUE // bit 1 7071 #define BRG16 BAUDCONbits.BRG16 // bit 3 7072 #define SCKP BAUDCONbits.SCKP // bit 4 7073 #define RCIDL BAUDCONbits.RCIDL // bit 6 7074 #define ABDOVF BAUDCONbits.ABDOVF // bit 7 7075 7076 #define BORRDY BORCONbits.BORRDY // bit 0 7077 #define BORFS BORCONbits.BORFS // bit 6 7078 #define SBOREN BORCONbits.SBOREN // bit 7 7079 7080 #define BSR0 BSRbits.BSR0 // bit 0 7081 #define BSR1 BSRbits.BSR1 // bit 1 7082 #define BSR2 BSRbits.BSR2 // bit 2 7083 #define BSR3 BSRbits.BSR3 // bit 3 7084 #define BSR4 BSRbits.BSR4 // bit 4 7085 7086 #define CKPPS0 CKPPSbits.CKPPS0 // bit 0 7087 #define CKPPS1 CKPPSbits.CKPPS1 // bit 1 7088 #define CKPPS2 CKPPSbits.CKPPS2 // bit 2 7089 #define CKPPS3 CKPPSbits.CKPPS3 // bit 3 7090 #define CKPPS4 CKPPSbits.CKPPS4 // bit 4 7091 7092 #define C1SYNC CM1CON0bits.C1SYNC // bit 0 7093 #define C1HYS CM1CON0bits.C1HYS // bit 1 7094 #define C1SP CM1CON0bits.C1SP // bit 2 7095 #define C1POL CM1CON0bits.C1POL // bit 4 7096 #define C1OE CM1CON0bits.C1OE // bit 5 7097 #define C1OUT CM1CON0bits.C1OUT // bit 6 7098 #define C1ON CM1CON0bits.C1ON // bit 7 7099 7100 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0 7101 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1 7102 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2 7103 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4 7104 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5 7105 #define C1INTN CM1CON1bits.C1INTN // bit 6 7106 #define C1INTP CM1CON1bits.C1INTP // bit 7 7107 7108 #define C2SYNC CM2CON0bits.C2SYNC // bit 0 7109 #define C2HYS CM2CON0bits.C2HYS // bit 1 7110 #define C2SP CM2CON0bits.C2SP // bit 2 7111 #define C2POL CM2CON0bits.C2POL // bit 4 7112 #define C2OE CM2CON0bits.C2OE // bit 5 7113 #define C2OUT CM2CON0bits.C2OUT // bit 6 7114 #define C2ON CM2CON0bits.C2ON // bit 7 7115 7116 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0 7117 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1 7118 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2 7119 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4 7120 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5 7121 #define C2INTN CM2CON1bits.C2INTN // bit 6 7122 #define C2INTP CM2CON1bits.C2INTP // bit 7 7123 7124 #define MC1OUT CMOUTbits.MC1OUT // bit 0 7125 #define MC2OUT CMOUTbits.MC2OUT // bit 1 7126 7127 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0 7128 #define G1POLA CWG1CON0bits.G1POLA // bit 3 7129 #define G1POLB CWG1CON0bits.G1POLB // bit 4 7130 #define G1OEA CWG1CON0bits.G1OEA // bit 5 7131 #define G1OEB CWG1CON0bits.G1OEB // bit 6 7132 #define G1EN CWG1CON0bits.G1EN // bit 7 7133 7134 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0 7135 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1 7136 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2 7137 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4 7138 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5 7139 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6 7140 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7 7141 7142 #define G1ASDSPPS CWG1CON2bits.G1ASDSPPS // bit 1 7143 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2 7144 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3 7145 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6 7146 #define G1ASE CWG1CON2bits.G1ASE // bit 7 7147 7148 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0 7149 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1 7150 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2 7151 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3 7152 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4 7153 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5 7154 7155 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0 7156 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1 7157 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2 7158 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3 7159 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4 7160 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5 7161 7162 #define CWG1INPPS0 CWG1INPPSbits.CWG1INPPS0 // bit 0 7163 #define CWG1INPPS1 CWG1INPPSbits.CWG1INPPS1 // bit 1 7164 #define CWG1INPPS2 CWG1INPPSbits.CWG1INPPS2 // bit 2 7165 #define CWG1INPPS3 CWG1INPPSbits.CWG1INPPS3 // bit 3 7166 #define CWG1INPPS4 CWG1INPPSbits.CWG1INPPS4 // bit 4 7167 7168 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2 7169 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3 7170 #define DACOE DACCON0bits.DACOE // bit 5 7171 #define DACLPS DACCON0bits.DACLPS // bit 6 7172 #define DACEN DACCON0bits.DACEN // bit 7 7173 7174 #define DACR0 DACCON1bits.DACR0 // bit 0 7175 #define DACR1 DACCON1bits.DACR1 // bit 1 7176 #define DACR2 DACCON1bits.DACR2 // bit 2 7177 #define DACR3 DACCON1bits.DACR3 // bit 3 7178 #define DACR4 DACCON1bits.DACR4 // bit 4 7179 7180 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0 7181 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1 7182 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2 7183 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3 7184 #define TSRNG FVRCONbits.TSRNG // bit 4 7185 #define TSEN FVRCONbits.TSEN // bit 5 7186 #define FVRRDY FVRCONbits.FVRRDY // bit 6 7187 #define FVREN FVRCONbits.FVREN // bit 7 7188 7189 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0 7190 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1 7191 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2 7192 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3 7193 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4 7194 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5 7195 7196 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4 7197 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5 7198 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6 7199 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7 7200 7201 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0 7202 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1 7203 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2 7204 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3 7205 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4 7206 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5 7207 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6 7208 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7 7209 7210 #define IOCIF INTCONbits.IOCIF // bit 0 7211 #define INTF INTCONbits.INTF // bit 1 7212 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits 7213 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits 7214 #define IOCIE INTCONbits.IOCIE // bit 3 7215 #define INTE INTCONbits.INTE // bit 4 7216 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits 7217 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits 7218 #define PEIE INTCONbits.PEIE // bit 6 7219 #define GIE INTCONbits.GIE // bit 7 7220 7221 #define INTPPS0 INTPPSbits.INTPPS0 // bit 0 7222 #define INTPPS1 INTPPSbits.INTPPS1 // bit 1 7223 #define INTPPS2 INTPPSbits.INTPPS2 // bit 2 7224 #define INTPPS3 INTPPSbits.INTPPS3 // bit 3 7225 #define INTPPS4 INTPPSbits.INTPPS4 // bit 4 7226 7227 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0 7228 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1 7229 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2 7230 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3 7231 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4 7232 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5 7233 7234 #define IOCAN0 IOCANbits.IOCAN0 // bit 0 7235 #define IOCAN1 IOCANbits.IOCAN1 // bit 1 7236 #define IOCAN2 IOCANbits.IOCAN2 // bit 2 7237 #define IOCAN3 IOCANbits.IOCAN3 // bit 3 7238 #define IOCAN4 IOCANbits.IOCAN4 // bit 4 7239 #define IOCAN5 IOCANbits.IOCAN5 // bit 5 7240 7241 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0 7242 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1 7243 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2 7244 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3 7245 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4 7246 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5 7247 7248 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4 7249 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5 7250 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6 7251 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7 7252 7253 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4 7254 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5 7255 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6 7256 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7 7257 7258 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4 7259 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5 7260 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6 7261 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7 7262 7263 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0 7264 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1 7265 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2 7266 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3 7267 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4 7268 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5 7269 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6 7270 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7 7271 7272 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0 7273 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1 7274 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2 7275 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3 7276 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4 7277 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5 7278 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6 7279 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7 7280 7281 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0 7282 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1 7283 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2 7284 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3 7285 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4 7286 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5 7287 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6 7288 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7 7289 7290 #define LATA0 LATAbits.LATA0 // bit 0 7291 #define LATA1 LATAbits.LATA1 // bit 1 7292 #define LATA2 LATAbits.LATA2 // bit 2 7293 #define LATA4 LATAbits.LATA4 // bit 4 7294 #define LATA5 LATAbits.LATA5 // bit 5 7295 7296 #define LATB4 LATBbits.LATB4 // bit 4 7297 #define LATB5 LATBbits.LATB5 // bit 5 7298 #define LATB6 LATBbits.LATB6 // bit 6 7299 #define LATB7 LATBbits.LATB7 // bit 7 7300 7301 #define LATC0 LATCbits.LATC0 // bit 0 7302 #define LATC1 LATCbits.LATC1 // bit 1 7303 #define LATC2 LATCbits.LATC2 // bit 2 7304 #define LATC3 LATCbits.LATC3 // bit 3 7305 #define LATC4 LATCbits.LATC4 // bit 4 7306 #define LATC5 LATCbits.LATC5 // bit 5 7307 #define LATC6 LATCbits.LATC6 // bit 6 7308 #define LATC7 LATCbits.LATC7 // bit 7 7309 7310 #define ODA0 ODCONAbits.ODA0 // bit 0 7311 #define ODA1 ODCONAbits.ODA1 // bit 1 7312 #define ODA2 ODCONAbits.ODA2 // bit 2 7313 #define ODA4 ODCONAbits.ODA4 // bit 4 7314 #define ODA5 ODCONAbits.ODA5 // bit 5 7315 7316 #define ODB4 ODCONBbits.ODB4 // bit 4 7317 #define ODB5 ODCONBbits.ODB5 // bit 5 7318 #define ODB6 ODCONBbits.ODB6 // bit 6 7319 #define ODB7 ODCONBbits.ODB7 // bit 7 7320 7321 #define ODC0 ODCONCbits.ODC0 // bit 0 7322 #define ODC1 ODCONCbits.ODC1 // bit 1 7323 #define ODC2 ODCONCbits.ODC2 // bit 2 7324 #define ODC3 ODCONCbits.ODC3 // bit 3 7325 #define ODC4 ODCONCbits.ODC4 // bit 4 7326 #define ODC5 ODCONCbits.ODC5 // bit 5 7327 #define ODC6 ODCONCbits.ODC6 // bit 6 7328 #define ODC7 ODCONCbits.ODC7 // bit 7 7329 7330 #define PS0 OPTION_REGbits.PS0 // bit 0 7331 #define PS1 OPTION_REGbits.PS1 // bit 1 7332 #define PS2 OPTION_REGbits.PS2 // bit 2 7333 #define PSA OPTION_REGbits.PSA // bit 3 7334 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits 7335 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits 7336 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits 7337 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits 7338 #define INTEDG OPTION_REGbits.INTEDG // bit 6 7339 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7 7340 7341 #define SCS0 OSCCONbits.SCS0 // bit 0 7342 #define SCS1 OSCCONbits.SCS1 // bit 1 7343 #define IRCF0 OSCCONbits.IRCF0 // bit 3 7344 #define IRCF1 OSCCONbits.IRCF1 // bit 4 7345 #define IRCF2 OSCCONbits.IRCF2 // bit 5 7346 #define IRCF3 OSCCONbits.IRCF3 // bit 6 7347 #define SPLLEN OSCCONbits.SPLLEN // bit 7 7348 7349 #define HFIOFS OSCSTATbits.HFIOFS // bit 0 7350 #define LFIOFR OSCSTATbits.LFIOFR // bit 1 7351 #define MFIOFR OSCSTATbits.MFIOFR // bit 2 7352 #define HFIOFL OSCSTATbits.HFIOFL // bit 3 7353 #define HFIOFR OSCSTATbits.HFIOFR // bit 4 7354 #define OSTS OSCSTATbits.OSTS // bit 5 7355 #define PLLR OSCSTATbits.PLLR // bit 6 7356 7357 #define TUN0 OSCTUNEbits.TUN0 // bit 0 7358 #define TUN1 OSCTUNEbits.TUN1 // bit 1 7359 #define TUN2 OSCTUNEbits.TUN2 // bit 2 7360 #define TUN3 OSCTUNEbits.TUN3 // bit 3 7361 #define TUN4 OSCTUNEbits.TUN4 // bit 4 7362 #define TUN5 OSCTUNEbits.TUN5 // bit 5 7363 7364 #define NOT_BOR PCONbits.NOT_BOR // bit 0 7365 #define NOT_POR PCONbits.NOT_POR // bit 1 7366 #define NOT_RI PCONbits.NOT_RI // bit 2 7367 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3 7368 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4 7369 #define STKUNF PCONbits.STKUNF // bit 6 7370 #define STKOVF PCONbits.STKOVF // bit 7 7371 7372 #define TMR1IE PIE1bits.TMR1IE // bit 0 7373 #define TMR2IE PIE1bits.TMR2IE // bit 1 7374 #define TXIE PIE1bits.TXIE // bit 4 7375 #define RCIE PIE1bits.RCIE // bit 5 7376 #define ADIE PIE1bits.ADIE // bit 6 7377 #define TMR1GIE PIE1bits.TMR1GIE // bit 7 7378 7379 #define C1IE PIE2bits.C1IE // bit 5 7380 #define C2IE PIE2bits.C2IE // bit 6 7381 7382 #define PWM1IE PIE3bits.PWM1IE // bit 4 7383 #define PWM2IE PIE3bits.PWM2IE // bit 5 7384 #define PWM3IE PIE3bits.PWM3IE // bit 6 7385 #define PWM4IE PIE3bits.PWM4IE // bit 7 7386 7387 #define TMR1IF PIR1bits.TMR1IF // bit 0 7388 #define TMR2IF PIR1bits.TMR2IF // bit 1 7389 #define TXIF PIR1bits.TXIF // bit 4 7390 #define RCIF PIR1bits.RCIF // bit 5 7391 #define ADIF PIR1bits.ADIF // bit 6 7392 #define TMR1GIF PIR1bits.TMR1GIF // bit 7 7393 7394 #define C1IF PIR2bits.C1IF // bit 5 7395 #define C2IF PIR2bits.C2IF // bit 6 7396 7397 #define PWM1IF PIR3bits.PWM1IF // bit 4 7398 #define PWM2IF PIR3bits.PWM2IF // bit 5 7399 #define PWM3IF PIR3bits.PWM3IF // bit 6 7400 #define PWM4IF PIR3bits.PWM4IF // bit 7 7401 7402 #define RD PMCON1bits.RD // bit 0 7403 #define WR PMCON1bits.WR // bit 1 7404 #define WREN PMCON1bits.WREN // bit 2 7405 #define WRERR PMCON1bits.WRERR // bit 3 7406 #define FREE PMCON1bits.FREE // bit 4 7407 #define LWLO PMCON1bits.LWLO // bit 5 7408 #define CFGS PMCON1bits.CFGS // bit 6 7409 7410 #define RA0 PORTAbits.RA0 // bit 0 7411 #define RA1 PORTAbits.RA1 // bit 1 7412 #define RA2 PORTAbits.RA2 // bit 2 7413 #define RA3 PORTAbits.RA3 // bit 3 7414 #define RA4 PORTAbits.RA4 // bit 4 7415 #define RA5 PORTAbits.RA5 // bit 5 7416 7417 #define RB4 PORTBbits.RB4 // bit 4 7418 #define RB5 PORTBbits.RB5 // bit 5 7419 #define RB6 PORTBbits.RB6 // bit 6 7420 #define RB7 PORTBbits.RB7 // bit 7 7421 7422 #define RC0 PORTCbits.RC0 // bit 0 7423 #define RC1 PORTCbits.RC1 // bit 1 7424 #define RC2 PORTCbits.RC2 // bit 2 7425 #define RC3 PORTCbits.RC3 // bit 3 7426 #define RC4 PORTCbits.RC4 // bit 4 7427 #define RC5 PORTCbits.RC5 // bit 5 7428 #define RC6 PORTCbits.RC6 // bit 6 7429 #define RC7 PORTCbits.RC7 // bit 7 7430 7431 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0 7432 7433 #define PWM1MODE0 PWM1CONbits.PWM1MODE0 // bit 2, shadows bit in PWM1CONbits 7434 #define MODE0 PWM1CONbits.MODE0 // bit 2, shadows bit in PWM1CONbits 7435 #define PWM1MODE1 PWM1CONbits.PWM1MODE1 // bit 3, shadows bit in PWM1CONbits 7436 #define MODE1 PWM1CONbits.MODE1 // bit 3, shadows bit in PWM1CONbits 7437 #define POL PWM1CONbits.POL // bit 4, shadows bit in PWM1CONbits 7438 #define PWM1POL PWM1CONbits.PWM1POL // bit 4, shadows bit in PWM1CONbits 7439 #define OUT PWM1CONbits.OUT // bit 5, shadows bit in PWM1CONbits 7440 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5, shadows bit in PWM1CONbits 7441 #define OE PWM1CONbits.OE // bit 6, shadows bit in PWM1CONbits 7442 #define PWM1OE PWM1CONbits.PWM1OE // bit 6, shadows bit in PWM1CONbits 7443 #define EN PWM1CONbits.EN // bit 7, shadows bit in PWM1CONbits 7444 #define PWM1EN PWM1CONbits.PWM1EN // bit 7, shadows bit in PWM1CONbits 7445 7446 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0 7447 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1 7448 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2 7449 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3 7450 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4 7451 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5 7452 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6 7453 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7 7454 7455 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 0 7456 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 1 7457 #define PWM1DCL2 PWM1DCLbits.PWM1DCL2 // bit 2 7458 #define PWM1DCL3 PWM1DCLbits.PWM1DCL3 // bit 3 7459 #define PWM1DCL4 PWM1DCLbits.PWM1DCL4 // bit 4 7460 #define PWM1DCL5 PWM1DCLbits.PWM1DCL5 // bit 5 7461 #define PWM1DCL6 PWM1DCLbits.PWM1DCL6 // bit 6 7462 #define PWM1DCL7 PWM1DCLbits.PWM1DCL7 // bit 7 7463 7464 #define PRIE PWM1INTCONbits.PRIE // bit 0, shadows bit in PWM1INTCONbits 7465 #define PWM1PRIE PWM1INTCONbits.PWM1PRIE // bit 0, shadows bit in PWM1INTCONbits 7466 #define DCIE PWM1INTCONbits.DCIE // bit 1, shadows bit in PWM1INTCONbits 7467 #define PWM1DCIE PWM1INTCONbits.PWM1DCIE // bit 1, shadows bit in PWM1INTCONbits 7468 #define PHIE PWM1INTCONbits.PHIE // bit 2, shadows bit in PWM1INTCONbits 7469 #define PWM1PHIE PWM1INTCONbits.PWM1PHIE // bit 2, shadows bit in PWM1INTCONbits 7470 #define OFIE PWM1INTCONbits.OFIE // bit 3, shadows bit in PWM1INTCONbits 7471 #define PWM1OFIE PWM1INTCONbits.PWM1OFIE // bit 3, shadows bit in PWM1INTCONbits 7472 7473 #define PRIF PWM1INTFbits.PRIF // bit 0, shadows bit in PWM1INTFbits 7474 #define PWM1PRIF PWM1INTFbits.PWM1PRIF // bit 0, shadows bit in PWM1INTFbits 7475 #define DCIF PWM1INTFbits.DCIF // bit 1, shadows bit in PWM1INTFbits 7476 #define PWM1DCIF PWM1INTFbits.PWM1DCIF // bit 1, shadows bit in PWM1INTFbits 7477 #define PHIF PWM1INTFbits.PHIF // bit 2, shadows bit in PWM1INTFbits 7478 #define PWM1PHIF PWM1INTFbits.PWM1PHIF // bit 2, shadows bit in PWM1INTFbits 7479 #define OFIF PWM1INTFbits.OFIF // bit 3, shadows bit in PWM1INTFbits 7480 #define PWM1OFIF PWM1INTFbits.PWM1OFIF // bit 3, shadows bit in PWM1INTFbits 7481 7482 #define PWM1LDS0 PWM1LDCONbits.PWM1LDS0 // bit 0, shadows bit in PWM1LDCONbits 7483 #define LDS0 PWM1LDCONbits.LDS0 // bit 0, shadows bit in PWM1LDCONbits 7484 #define PWM1LDS1 PWM1LDCONbits.PWM1LDS1 // bit 1, shadows bit in PWM1LDCONbits 7485 #define LDS1 PWM1LDCONbits.LDS1 // bit 1, shadows bit in PWM1LDCONbits 7486 #define LDT PWM1LDCONbits.LDT // bit 6, shadows bit in PWM1LDCONbits 7487 #define PWM1LDM PWM1LDCONbits.PWM1LDM // bit 6, shadows bit in PWM1LDCONbits 7488 #define LDA PWM1LDCONbits.LDA // bit 7, shadows bit in PWM1LDCONbits 7489 #define PWM1LD PWM1LDCONbits.PWM1LD // bit 7, shadows bit in PWM1LDCONbits 7490 7491 #define PWM1OFS0 PWM1OFCONbits.PWM1OFS0 // bit 0, shadows bit in PWM1OFCONbits 7492 #define OFS0 PWM1OFCONbits.OFS0 // bit 0, shadows bit in PWM1OFCONbits 7493 #define PWM1OFS1 PWM1OFCONbits.PWM1OFS1 // bit 1, shadows bit in PWM1OFCONbits 7494 #define OFS1 PWM1OFCONbits.OFS1 // bit 1, shadows bit in PWM1OFCONbits 7495 #define OFO PWM1OFCONbits.OFO // bit 4, shadows bit in PWM1OFCONbits 7496 #define PWM1OFMC PWM1OFCONbits.PWM1OFMC // bit 4, shadows bit in PWM1OFCONbits 7497 #define PWM1OFM0 PWM1OFCONbits.PWM1OFM0 // bit 5, shadows bit in PWM1OFCONbits 7498 #define OFM0 PWM1OFCONbits.OFM0 // bit 5, shadows bit in PWM1OFCONbits 7499 #define PWM1OFM1 PWM1OFCONbits.PWM1OFM1 // bit 6, shadows bit in PWM1OFCONbits 7500 #define OFM1 PWM1OFCONbits.OFM1 // bit 6, shadows bit in PWM1OFCONbits 7501 7502 #define PWM1OFH0 PWM1OFHbits.PWM1OFH0 // bit 0 7503 #define PWM1OFH1 PWM1OFHbits.PWM1OFH1 // bit 1 7504 #define PWM1OFH2 PWM1OFHbits.PWM1OFH2 // bit 2 7505 #define PWM1OFH3 PWM1OFHbits.PWM1OFH3 // bit 3 7506 #define PWM1OFH4 PWM1OFHbits.PWM1OFH4 // bit 4 7507 #define PWM1OFH5 PWM1OFHbits.PWM1OFH5 // bit 5 7508 #define PWM1OFH6 PWM1OFHbits.PWM1OFH6 // bit 6 7509 #define PWM1OFH7 PWM1OFHbits.PWM1OFH7 // bit 7 7510 7511 #define PWM1OFL0 PWM1OFLbits.PWM1OFL0 // bit 0 7512 #define PWM1OFL1 PWM1OFLbits.PWM1OFL1 // bit 1 7513 #define PWM1OFL2 PWM1OFLbits.PWM1OFL2 // bit 2 7514 #define PWM1OFL3 PWM1OFLbits.PWM1OFL3 // bit 3 7515 #define PWM1OFL4 PWM1OFLbits.PWM1OFL4 // bit 4 7516 #define PWM1OFL5 PWM1OFLbits.PWM1OFL5 // bit 5 7517 #define PWM1OFL6 PWM1OFLbits.PWM1OFL6 // bit 6 7518 #define PWM1OFL7 PWM1OFLbits.PWM1OFL7 // bit 7 7519 7520 #define PWM1PHH0 PWM1PHHbits.PWM1PHH0 // bit 0 7521 #define PWM1PHH1 PWM1PHHbits.PWM1PHH1 // bit 1 7522 #define PWM1PHH2 PWM1PHHbits.PWM1PHH2 // bit 2 7523 #define PWM1PHH3 PWM1PHHbits.PWM1PHH3 // bit 3 7524 #define PWM1PHH4 PWM1PHHbits.PWM1PHH4 // bit 4 7525 #define PWM1PHH5 PWM1PHHbits.PWM1PHH5 // bit 5 7526 #define PWM1PHH6 PWM1PHHbits.PWM1PHH6 // bit 6 7527 #define PWM1PHH7 PWM1PHHbits.PWM1PHH7 // bit 7 7528 7529 #define PWM1PHL0 PWM1PHLbits.PWM1PHL0 // bit 0 7530 #define PWM1PHL1 PWM1PHLbits.PWM1PHL1 // bit 1 7531 #define PWM1PHL2 PWM1PHLbits.PWM1PHL2 // bit 2 7532 #define PWM1PHL3 PWM1PHLbits.PWM1PHL3 // bit 3 7533 #define PWM1PHL4 PWM1PHLbits.PWM1PHL4 // bit 4 7534 #define PWM1PHL5 PWM1PHLbits.PWM1PHL5 // bit 5 7535 #define PWM1PHL6 PWM1PHLbits.PWM1PHL6 // bit 6 7536 #define PWM1PHL7 PWM1PHLbits.PWM1PHL7 // bit 7 7537 7538 #define PWM1PRH0 PWM1PRHbits.PWM1PRH0 // bit 0 7539 #define PWM1PRH1 PWM1PRHbits.PWM1PRH1 // bit 1 7540 #define PWM1PRH2 PWM1PRHbits.PWM1PRH2 // bit 2 7541 #define PWM1PRH3 PWM1PRHbits.PWM1PRH3 // bit 3 7542 #define PWM1PRH4 PWM1PRHbits.PWM1PRH4 // bit 4 7543 #define PWM1PRH5 PWM1PRHbits.PWM1PRH5 // bit 5 7544 #define PWM1PRH6 PWM1PRHbits.PWM1PRH6 // bit 6 7545 #define PWM1PRH7 PWM1PRHbits.PWM1PRH7 // bit 7 7546 7547 #define PWM1PRL0 PWM1PRLbits.PWM1PRL0 // bit 0 7548 #define PWM1PRL1 PWM1PRLbits.PWM1PRL1 // bit 1 7549 #define PWM1PRL2 PWM1PRLbits.PWM1PRL2 // bit 2 7550 #define PWM1PRL3 PWM1PRLbits.PWM1PRL3 // bit 3 7551 #define PWM1PRL4 PWM1PRLbits.PWM1PRL4 // bit 4 7552 #define PWM1PRL5 PWM1PRLbits.PWM1PRL5 // bit 5 7553 #define PWM1PRL6 PWM1PRLbits.PWM1PRL6 // bit 6 7554 #define PWM1PRL7 PWM1PRLbits.PWM1PRL7 // bit 7 7555 7556 #define PWM1TMRH0 PWM1TMRHbits.PWM1TMRH0 // bit 0 7557 #define PWM1TMRH1 PWM1TMRHbits.PWM1TMRH1 // bit 1 7558 #define PWM1TMRH2 PWM1TMRHbits.PWM1TMRH2 // bit 2 7559 #define PWM1TMRH3 PWM1TMRHbits.PWM1TMRH3 // bit 3 7560 #define PWM1TMRH4 PWM1TMRHbits.PWM1TMRH4 // bit 4 7561 #define PWM1TMRH5 PWM1TMRHbits.PWM1TMRH5 // bit 5 7562 #define PWM1TMRH6 PWM1TMRHbits.PWM1TMRH6 // bit 6 7563 #define PWM1TMRH7 PWM1TMRHbits.PWM1TMRH7 // bit 7 7564 7565 #define PWM1TMRL0 PWM1TMRLbits.PWM1TMRL0 // bit 0 7566 #define PWM1TMRL1 PWM1TMRLbits.PWM1TMRL1 // bit 1 7567 #define PWM1TMRL2 PWM1TMRLbits.PWM1TMRL2 // bit 2 7568 #define PWM1TMRL3 PWM1TMRLbits.PWM1TMRL3 // bit 3 7569 #define PWM1TMRL4 PWM1TMRLbits.PWM1TMRL4 // bit 4 7570 #define PWM1TMRL5 PWM1TMRLbits.PWM1TMRL5 // bit 5 7571 #define PWM1TMRL6 PWM1TMRLbits.PWM1TMRL6 // bit 6 7572 #define PWM1TMRL7 PWM1TMRLbits.PWM1TMRL7 // bit 7 7573 7574 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0 7575 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1 7576 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2 7577 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3 7578 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4 7579 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5 7580 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6 7581 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7 7582 7583 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 0 7584 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 1 7585 #define PWM2DCL2 PWM2DCLbits.PWM2DCL2 // bit 2 7586 #define PWM2DCL3 PWM2DCLbits.PWM2DCL3 // bit 3 7587 #define PWM2DCL4 PWM2DCLbits.PWM2DCL4 // bit 4 7588 #define PWM2DCL5 PWM2DCLbits.PWM2DCL5 // bit 5 7589 #define PWM2DCL6 PWM2DCLbits.PWM2DCL6 // bit 6 7590 #define PWM2DCL7 PWM2DCLbits.PWM2DCL7 // bit 7 7591 7592 #define PWM2OFH0 PWM2OFHbits.PWM2OFH0 // bit 0 7593 #define PWM2OFH1 PWM2OFHbits.PWM2OFH1 // bit 1 7594 #define PWM2OFH2 PWM2OFHbits.PWM2OFH2 // bit 2 7595 #define PWM2OFH3 PWM2OFHbits.PWM2OFH3 // bit 3 7596 #define PWM2OFH4 PWM2OFHbits.PWM2OFH4 // bit 4 7597 #define PWM2OFH5 PWM2OFHbits.PWM2OFH5 // bit 5 7598 #define PWM2OFH6 PWM2OFHbits.PWM2OFH6 // bit 6 7599 #define PWM2OFH7 PWM2OFHbits.PWM2OFH7 // bit 7 7600 7601 #define PWM2OFL0 PWM2OFLbits.PWM2OFL0 // bit 0 7602 #define PWM2OFL1 PWM2OFLbits.PWM2OFL1 // bit 1 7603 #define PWM2OFL2 PWM2OFLbits.PWM2OFL2 // bit 2 7604 #define PWM2OFL3 PWM2OFLbits.PWM2OFL3 // bit 3 7605 #define PWM2OFL4 PWM2OFLbits.PWM2OFL4 // bit 4 7606 #define PWM2OFL5 PWM2OFLbits.PWM2OFL5 // bit 5 7607 #define PWM2OFL6 PWM2OFLbits.PWM2OFL6 // bit 6 7608 #define PWM2OFL7 PWM2OFLbits.PWM2OFL7 // bit 7 7609 7610 #define PWM2PHH0 PWM2PHHbits.PWM2PHH0 // bit 0 7611 #define PWM2PHH1 PWM2PHHbits.PWM2PHH1 // bit 1 7612 #define PWM2PHH2 PWM2PHHbits.PWM2PHH2 // bit 2 7613 #define PWM2PHH3 PWM2PHHbits.PWM2PHH3 // bit 3 7614 #define PWM2PHH4 PWM2PHHbits.PWM2PHH4 // bit 4 7615 #define PWM2PHH5 PWM2PHHbits.PWM2PHH5 // bit 5 7616 #define PWM2PHH6 PWM2PHHbits.PWM2PHH6 // bit 6 7617 #define PWM2PHH7 PWM2PHHbits.PWM2PHH7 // bit 7 7618 7619 #define PWM2PHL0 PWM2PHLbits.PWM2PHL0 // bit 0 7620 #define PWM2PHL1 PWM2PHLbits.PWM2PHL1 // bit 1 7621 #define PWM2PHL2 PWM2PHLbits.PWM2PHL2 // bit 2 7622 #define PWM2PHL3 PWM2PHLbits.PWM2PHL3 // bit 3 7623 #define PWM2PHL4 PWM2PHLbits.PWM2PHL4 // bit 4 7624 #define PWM2PHL5 PWM2PHLbits.PWM2PHL5 // bit 5 7625 #define PWM2PHL6 PWM2PHLbits.PWM2PHL6 // bit 6 7626 #define PWM2PHL7 PWM2PHLbits.PWM2PHL7 // bit 7 7627 7628 #define PWM2PRH0 PWM2PRHbits.PWM2PRH0 // bit 0 7629 #define PWM2PRH1 PWM2PRHbits.PWM2PRH1 // bit 1 7630 #define PWM2PRH2 PWM2PRHbits.PWM2PRH2 // bit 2 7631 #define PWM2PRH3 PWM2PRHbits.PWM2PRH3 // bit 3 7632 #define PWM2PRH4 PWM2PRHbits.PWM2PRH4 // bit 4 7633 #define PWM2PRH5 PWM2PRHbits.PWM2PRH5 // bit 5 7634 #define PWM2PRH6 PWM2PRHbits.PWM2PRH6 // bit 6 7635 #define PWM2PRH7 PWM2PRHbits.PWM2PRH7 // bit 7 7636 7637 #define PWM2PRL0 PWM2PRLbits.PWM2PRL0 // bit 0 7638 #define PWM2PRL1 PWM2PRLbits.PWM2PRL1 // bit 1 7639 #define PWM2PRL2 PWM2PRLbits.PWM2PRL2 // bit 2 7640 #define PWM2PRL3 PWM2PRLbits.PWM2PRL3 // bit 3 7641 #define PWM2PRL4 PWM2PRLbits.PWM2PRL4 // bit 4 7642 #define PWM2PRL5 PWM2PRLbits.PWM2PRL5 // bit 5 7643 #define PWM2PRL6 PWM2PRLbits.PWM2PRL6 // bit 6 7644 #define PWM2PRL7 PWM2PRLbits.PWM2PRL7 // bit 7 7645 7646 #define PWM2TMRH0 PWM2TMRHbits.PWM2TMRH0 // bit 0 7647 #define PWM2TMRH1 PWM2TMRHbits.PWM2TMRH1 // bit 1 7648 #define PWM2TMRH2 PWM2TMRHbits.PWM2TMRH2 // bit 2 7649 #define PWM2TMRH3 PWM2TMRHbits.PWM2TMRH3 // bit 3 7650 #define PWM2TMRH4 PWM2TMRHbits.PWM2TMRH4 // bit 4 7651 #define PWM2TMRH5 PWM2TMRHbits.PWM2TMRH5 // bit 5 7652 #define PWM2TMRH6 PWM2TMRHbits.PWM2TMRH6 // bit 6 7653 #define PWM2TMRH7 PWM2TMRHbits.PWM2TMRH7 // bit 7 7654 7655 #define PWM2TMRL0 PWM2TMRLbits.PWM2TMRL0 // bit 0 7656 #define PWM2TMRL1 PWM2TMRLbits.PWM2TMRL1 // bit 1 7657 #define PWM2TMRL2 PWM2TMRLbits.PWM2TMRL2 // bit 2 7658 #define PWM2TMRL3 PWM2TMRLbits.PWM2TMRL3 // bit 3 7659 #define PWM2TMRL4 PWM2TMRLbits.PWM2TMRL4 // bit 4 7660 #define PWM2TMRL5 PWM2TMRLbits.PWM2TMRL5 // bit 5 7661 #define PWM2TMRL6 PWM2TMRLbits.PWM2TMRL6 // bit 6 7662 #define PWM2TMRL7 PWM2TMRLbits.PWM2TMRL7 // bit 7 7663 7664 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0 7665 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1 7666 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2 7667 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3 7668 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4 7669 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5 7670 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6 7671 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7 7672 7673 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 0 7674 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 1 7675 #define PWM3DCL2 PWM3DCLbits.PWM3DCL2 // bit 2 7676 #define PWM3DCL3 PWM3DCLbits.PWM3DCL3 // bit 3 7677 #define PWM3DCL4 PWM3DCLbits.PWM3DCL4 // bit 4 7678 #define PWM3DCL5 PWM3DCLbits.PWM3DCL5 // bit 5 7679 #define PWM3DCL6 PWM3DCLbits.PWM3DCL6 // bit 6 7680 #define PWM3DCL7 PWM3DCLbits.PWM3DCL7 // bit 7 7681 7682 #define PWM3OFH0 PWM3OFHbits.PWM3OFH0 // bit 0 7683 #define PWM3OFH1 PWM3OFHbits.PWM3OFH1 // bit 1 7684 #define PWM3OFH2 PWM3OFHbits.PWM3OFH2 // bit 2 7685 #define PWM3OFH3 PWM3OFHbits.PWM3OFH3 // bit 3 7686 #define PWM3OFH4 PWM3OFHbits.PWM3OFH4 // bit 4 7687 #define PWM3OFH5 PWM3OFHbits.PWM3OFH5 // bit 5 7688 #define PWM3OFH6 PWM3OFHbits.PWM3OFH6 // bit 6 7689 #define PWM3OFH7 PWM3OFHbits.PWM3OFH7 // bit 7 7690 7691 #define PWM3OFL0 PWM3OFLbits.PWM3OFL0 // bit 0 7692 #define PWM3OFL1 PWM3OFLbits.PWM3OFL1 // bit 1 7693 #define PWM3OFL2 PWM3OFLbits.PWM3OFL2 // bit 2 7694 #define PWM3OFL3 PWM3OFLbits.PWM3OFL3 // bit 3 7695 #define PWM3OFL4 PWM3OFLbits.PWM3OFL4 // bit 4 7696 #define PWM3OFL5 PWM3OFLbits.PWM3OFL5 // bit 5 7697 #define PWM3OFL6 PWM3OFLbits.PWM3OFL6 // bit 6 7698 #define PWM3OFL7 PWM3OFLbits.PWM3OFL7 // bit 7 7699 7700 #define PWM3PHH0 PWM3PHHbits.PWM3PHH0 // bit 0 7701 #define PWM3PHH1 PWM3PHHbits.PWM3PHH1 // bit 1 7702 #define PWM3PHH2 PWM3PHHbits.PWM3PHH2 // bit 2 7703 #define PWM3PHH3 PWM3PHHbits.PWM3PHH3 // bit 3 7704 #define PWM3PHH4 PWM3PHHbits.PWM3PHH4 // bit 4 7705 #define PWM3PHH5 PWM3PHHbits.PWM3PHH5 // bit 5 7706 #define PWM3PHH6 PWM3PHHbits.PWM3PHH6 // bit 6 7707 #define PWM3PHH7 PWM3PHHbits.PWM3PHH7 // bit 7 7708 7709 #define PWM3PHL0 PWM3PHLbits.PWM3PHL0 // bit 0 7710 #define PWM3PHL1 PWM3PHLbits.PWM3PHL1 // bit 1 7711 #define PWM3PHL2 PWM3PHLbits.PWM3PHL2 // bit 2 7712 #define PWM3PHL3 PWM3PHLbits.PWM3PHL3 // bit 3 7713 #define PWM3PHL4 PWM3PHLbits.PWM3PHL4 // bit 4 7714 #define PWM3PHL5 PWM3PHLbits.PWM3PHL5 // bit 5 7715 #define PWM3PHL6 PWM3PHLbits.PWM3PHL6 // bit 6 7716 #define PWM3PHL7 PWM3PHLbits.PWM3PHL7 // bit 7 7717 7718 #define PWM3PRH0 PWM3PRHbits.PWM3PRH0 // bit 0 7719 #define PWM3PRH1 PWM3PRHbits.PWM3PRH1 // bit 1 7720 #define PWM3PRH2 PWM3PRHbits.PWM3PRH2 // bit 2 7721 #define PWM3PRH3 PWM3PRHbits.PWM3PRH3 // bit 3 7722 #define PWM3PRH4 PWM3PRHbits.PWM3PRH4 // bit 4 7723 #define PWM3PRH5 PWM3PRHbits.PWM3PRH5 // bit 5 7724 #define PWM3PRH6 PWM3PRHbits.PWM3PRH6 // bit 6 7725 #define PWM3PRH7 PWM3PRHbits.PWM3PRH7 // bit 7 7726 7727 #define PWM3PRL0 PWM3PRLbits.PWM3PRL0 // bit 0 7728 #define PWM3PRL1 PWM3PRLbits.PWM3PRL1 // bit 1 7729 #define PWM3PRL2 PWM3PRLbits.PWM3PRL2 // bit 2 7730 #define PWM3PRL3 PWM3PRLbits.PWM3PRL3 // bit 3 7731 #define PWM3PRL4 PWM3PRLbits.PWM3PRL4 // bit 4 7732 #define PWM3PRL5 PWM3PRLbits.PWM3PRL5 // bit 5 7733 #define PWM3PRL6 PWM3PRLbits.PWM3PRL6 // bit 6 7734 #define PWM3PRL7 PWM3PRLbits.PWM3PRL7 // bit 7 7735 7736 #define PWM3TMRH0 PWM3TMRHbits.PWM3TMRH0 // bit 0 7737 #define PWM3TMRH1 PWM3TMRHbits.PWM3TMRH1 // bit 1 7738 #define PWM3TMRH2 PWM3TMRHbits.PWM3TMRH2 // bit 2 7739 #define PWM3TMRH3 PWM3TMRHbits.PWM3TMRH3 // bit 3 7740 #define PWM3TMRH4 PWM3TMRHbits.PWM3TMRH4 // bit 4 7741 #define PWM3TMRH5 PWM3TMRHbits.PWM3TMRH5 // bit 5 7742 #define PWM3TMRH6 PWM3TMRHbits.PWM3TMRH6 // bit 6 7743 #define PWM3TMRH7 PWM3TMRHbits.PWM3TMRH7 // bit 7 7744 7745 #define PWM3TMRL0 PWM3TMRLbits.PWM3TMRL0 // bit 0 7746 #define PWM3TMRL1 PWM3TMRLbits.PWM3TMRL1 // bit 1 7747 #define PWM3TMRL2 PWM3TMRLbits.PWM3TMRL2 // bit 2 7748 #define PWM3TMRL3 PWM3TMRLbits.PWM3TMRL3 // bit 3 7749 #define PWM3TMRL4 PWM3TMRLbits.PWM3TMRL4 // bit 4 7750 #define PWM3TMRL5 PWM3TMRLbits.PWM3TMRL5 // bit 5 7751 #define PWM3TMRL6 PWM3TMRLbits.PWM3TMRL6 // bit 6 7752 #define PWM3TMRL7 PWM3TMRLbits.PWM3TMRL7 // bit 7 7753 7754 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0 7755 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1 7756 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2 7757 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3 7758 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4 7759 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5 7760 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6 7761 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7 7762 7763 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 0 7764 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 1 7765 #define PWM4DCL2 PWM4DCLbits.PWM4DCL2 // bit 2 7766 #define PWM4DCL3 PWM4DCLbits.PWM4DCL3 // bit 3 7767 #define PWM4DCL4 PWM4DCLbits.PWM4DCL4 // bit 4 7768 #define PWM4DCL5 PWM4DCLbits.PWM4DCL5 // bit 5 7769 #define PWM4DCL6 PWM4DCLbits.PWM4DCL6 // bit 6 7770 #define PWM4DCL7 PWM4DCLbits.PWM4DCL7 // bit 7 7771 7772 #define PWM4OFH0 PWM4OFHbits.PWM4OFH0 // bit 0 7773 #define PWM4OFH1 PWM4OFHbits.PWM4OFH1 // bit 1 7774 #define PWM4OFH2 PWM4OFHbits.PWM4OFH2 // bit 2 7775 #define PWM4OFH3 PWM4OFHbits.PWM4OFH3 // bit 3 7776 #define PWM4OFH4 PWM4OFHbits.PWM4OFH4 // bit 4 7777 #define PWM4OFH5 PWM4OFHbits.PWM4OFH5 // bit 5 7778 #define PWM4OFH6 PWM4OFHbits.PWM4OFH6 // bit 6 7779 #define PWM4OFH7 PWM4OFHbits.PWM4OFH7 // bit 7 7780 7781 #define PWM4OFL0 PWM4OFLbits.PWM4OFL0 // bit 0 7782 #define PWM4OFL1 PWM4OFLbits.PWM4OFL1 // bit 1 7783 #define PWM4OFL2 PWM4OFLbits.PWM4OFL2 // bit 2 7784 #define PWM4OFL3 PWM4OFLbits.PWM4OFL3 // bit 3 7785 #define PWM4OFL4 PWM4OFLbits.PWM4OFL4 // bit 4 7786 #define PWM4OFL5 PWM4OFLbits.PWM4OFL5 // bit 5 7787 #define PWM4OFL6 PWM4OFLbits.PWM4OFL6 // bit 6 7788 #define PWM4OFL7 PWM4OFLbits.PWM4OFL7 // bit 7 7789 7790 #define PWM4PHH0 PWM4PHHbits.PWM4PHH0 // bit 0 7791 #define PWM4PHH1 PWM4PHHbits.PWM4PHH1 // bit 1 7792 #define PWM4PHH2 PWM4PHHbits.PWM4PHH2 // bit 2 7793 #define PWM4PHH3 PWM4PHHbits.PWM4PHH3 // bit 3 7794 #define PWM4PHH4 PWM4PHHbits.PWM4PHH4 // bit 4 7795 #define PWM4PHH5 PWM4PHHbits.PWM4PHH5 // bit 5 7796 #define PWM4PHH6 PWM4PHHbits.PWM4PHH6 // bit 6 7797 #define PWM4PHH7 PWM4PHHbits.PWM4PHH7 // bit 7 7798 7799 #define PWM4PHL0 PWM4PHLbits.PWM4PHL0 // bit 0 7800 #define PWM4PHL1 PWM4PHLbits.PWM4PHL1 // bit 1 7801 #define PWM4PHL2 PWM4PHLbits.PWM4PHL2 // bit 2 7802 #define PWM4PHL3 PWM4PHLbits.PWM4PHL3 // bit 3 7803 #define PWM4PHL4 PWM4PHLbits.PWM4PHL4 // bit 4 7804 #define PWM4PHL5 PWM4PHLbits.PWM4PHL5 // bit 5 7805 #define PWM4PHL6 PWM4PHLbits.PWM4PHL6 // bit 6 7806 #define PWM4PHL7 PWM4PHLbits.PWM4PHL7 // bit 7 7807 7808 #define PWM4PRH0 PWM4PRHbits.PWM4PRH0 // bit 0 7809 #define PWM4PRH1 PWM4PRHbits.PWM4PRH1 // bit 1 7810 #define PWM4PRH2 PWM4PRHbits.PWM4PRH2 // bit 2 7811 #define PWM4PRH3 PWM4PRHbits.PWM4PRH3 // bit 3 7812 #define PWM4PRH4 PWM4PRHbits.PWM4PRH4 // bit 4 7813 #define PWM4PRH5 PWM4PRHbits.PWM4PRH5 // bit 5 7814 #define PWM4PRH6 PWM4PRHbits.PWM4PRH6 // bit 6 7815 #define PWM4PRH7 PWM4PRHbits.PWM4PRH7 // bit 7 7816 7817 #define PWM4PRL0 PWM4PRLbits.PWM4PRL0 // bit 0 7818 #define PWM4PRL1 PWM4PRLbits.PWM4PRL1 // bit 1 7819 #define PWM4PRL2 PWM4PRLbits.PWM4PRL2 // bit 2 7820 #define PWM4PRL3 PWM4PRLbits.PWM4PRL3 // bit 3 7821 #define PWM4PRL4 PWM4PRLbits.PWM4PRL4 // bit 4 7822 #define PWM4PRL5 PWM4PRLbits.PWM4PRL5 // bit 5 7823 #define PWM4PRL6 PWM4PRLbits.PWM4PRL6 // bit 6 7824 #define PWM4PRL7 PWM4PRLbits.PWM4PRL7 // bit 7 7825 7826 #define PWM4TMRH0 PWM4TMRHbits.PWM4TMRH0 // bit 0 7827 #define PWM4TMRH1 PWM4TMRHbits.PWM4TMRH1 // bit 1 7828 #define PWM4TMRH2 PWM4TMRHbits.PWM4TMRH2 // bit 2 7829 #define PWM4TMRH3 PWM4TMRHbits.PWM4TMRH3 // bit 3 7830 #define PWM4TMRH4 PWM4TMRHbits.PWM4TMRH4 // bit 4 7831 #define PWM4TMRH5 PWM4TMRHbits.PWM4TMRH5 // bit 5 7832 #define PWM4TMRH6 PWM4TMRHbits.PWM4TMRH6 // bit 6 7833 #define PWM4TMRH7 PWM4TMRHbits.PWM4TMRH7 // bit 7 7834 7835 #define PWM4TMRL0 PWM4TMRLbits.PWM4TMRL0 // bit 0 7836 #define PWM4TMRL1 PWM4TMRLbits.PWM4TMRL1 // bit 1 7837 #define PWM4TMRL2 PWM4TMRLbits.PWM4TMRL2 // bit 2 7838 #define PWM4TMRL3 PWM4TMRLbits.PWM4TMRL3 // bit 3 7839 #define PWM4TMRL4 PWM4TMRLbits.PWM4TMRL4 // bit 4 7840 #define PWM4TMRL5 PWM4TMRLbits.PWM4TMRL5 // bit 5 7841 #define PWM4TMRL6 PWM4TMRLbits.PWM4TMRL6 // bit 6 7842 #define PWM4TMRL7 PWM4TMRLbits.PWM4TMRL7 // bit 7 7843 7844 #define PWM1EN_A PWMENbits.PWM1EN_A // bit 0, shadows bit in PWMENbits 7845 #define MPWM1EN PWMENbits.MPWM1EN // bit 0, shadows bit in PWMENbits 7846 #define PWM2EN_A PWMENbits.PWM2EN_A // bit 1, shadows bit in PWMENbits 7847 #define MPWM2EN PWMENbits.MPWM2EN // bit 1, shadows bit in PWMENbits 7848 #define PWM3EN_A PWMENbits.PWM3EN_A // bit 2, shadows bit in PWMENbits 7849 #define MPWM3EN PWMENbits.MPWM3EN // bit 2, shadows bit in PWMENbits 7850 #define PWM4EN_A PWMENbits.PWM4EN_A // bit 3 7851 7852 #define PWM1LDA_A PWMLDbits.PWM1LDA_A // bit 0, shadows bit in PWMLDbits 7853 #define MPWM1LD PWMLDbits.MPWM1LD // bit 0, shadows bit in PWMLDbits 7854 #define PWM2LDA_A PWMLDbits.PWM2LDA_A // bit 1, shadows bit in PWMLDbits 7855 #define MPWM2LD PWMLDbits.MPWM2LD // bit 1, shadows bit in PWMLDbits 7856 #define PWM3LDA_A PWMLDbits.PWM3LDA_A // bit 2, shadows bit in PWMLDbits 7857 #define MPWM3LD PWMLDbits.MPWM3LD // bit 2, shadows bit in PWMLDbits 7858 #define PWM4LDA_A PWMLDbits.PWM4LDA_A // bit 3 7859 7860 #define PWM1OUT_A PWMOUTbits.PWM1OUT_A // bit 0, shadows bit in PWMOUTbits 7861 #define MPWM1OUT PWMOUTbits.MPWM1OUT // bit 0, shadows bit in PWMOUTbits 7862 #define PWM2OUT_A PWMOUTbits.PWM2OUT_A // bit 1, shadows bit in PWMOUTbits 7863 #define MPWM2OUT PWMOUTbits.MPWM2OUT // bit 1, shadows bit in PWMOUTbits 7864 #define PWM3OUT_A PWMOUTbits.PWM3OUT_A // bit 2, shadows bit in PWMOUTbits 7865 #define MPWM3OUT PWMOUTbits.MPWM3OUT // bit 2, shadows bit in PWMOUTbits 7866 #define PWM4OUT_A PWMOUTbits.PWM4OUT_A // bit 3 7867 7868 #define RA0PPS0 RA0PPSbits.RA0PPS0 // bit 0 7869 #define RA0PPS1 RA0PPSbits.RA0PPS1 // bit 1 7870 #define RA0PPS2 RA0PPSbits.RA0PPS2 // bit 2 7871 #define RA0PPS3 RA0PPSbits.RA0PPS3 // bit 3 7872 7873 #define RA1PPS0 RA1PPSbits.RA1PPS0 // bit 0 7874 #define RA1PPS1 RA1PPSbits.RA1PPS1 // bit 1 7875 #define RA1PPS2 RA1PPSbits.RA1PPS2 // bit 2 7876 #define RA1PPS3 RA1PPSbits.RA1PPS3 // bit 3 7877 7878 #define RA2PPS0 RA2PPSbits.RA2PPS0 // bit 0 7879 #define RA2PPS1 RA2PPSbits.RA2PPS1 // bit 1 7880 #define RA2PPS2 RA2PPSbits.RA2PPS2 // bit 2 7881 #define RA2PPS3 RA2PPSbits.RA2PPS3 // bit 3 7882 7883 #define RA4PPS0 RA4PPSbits.RA4PPS0 // bit 0 7884 #define RA4PPS1 RA4PPSbits.RA4PPS1 // bit 1 7885 #define RA4PPS2 RA4PPSbits.RA4PPS2 // bit 2 7886 #define RA4PPS3 RA4PPSbits.RA4PPS3 // bit 3 7887 7888 #define RA5PPS0 RA5PPSbits.RA5PPS0 // bit 0 7889 #define RA5PPS1 RA5PPSbits.RA5PPS1 // bit 1 7890 #define RA5PPS2 RA5PPSbits.RA5PPS2 // bit 2 7891 #define RA5PPS3 RA5PPSbits.RA5PPS3 // bit 3 7892 7893 #define RB4PPS0 RB4PPSbits.RB4PPS0 // bit 0 7894 #define RB4PPS1 RB4PPSbits.RB4PPS1 // bit 1 7895 #define RB4PPS2 RB4PPSbits.RB4PPS2 // bit 2 7896 #define RB4PPS3 RB4PPSbits.RB4PPS3 // bit 3 7897 7898 #define RB5PPS0 RB5PPSbits.RB5PPS0 // bit 0 7899 #define RB5PPS1 RB5PPSbits.RB5PPS1 // bit 1 7900 #define RB5PPS2 RB5PPSbits.RB5PPS2 // bit 2 7901 #define RB5PPS3 RB5PPSbits.RB5PPS3 // bit 3 7902 7903 #define RB6PPS0 RB6PPSbits.RB6PPS0 // bit 0 7904 #define RB6PPS1 RB6PPSbits.RB6PPS1 // bit 1 7905 #define RB6PPS2 RB6PPSbits.RB6PPS2 // bit 2 7906 #define RB6PPS3 RB6PPSbits.RB6PPS3 // bit 3 7907 7908 #define RB7PPS0 RB7PPSbits.RB7PPS0 // bit 0 7909 #define RB7PPS1 RB7PPSbits.RB7PPS1 // bit 1 7910 #define RB7PPS2 RB7PPSbits.RB7PPS2 // bit 2 7911 #define RB7PPS3 RB7PPSbits.RB7PPS3 // bit 3 7912 7913 #define RC0PPS0 RC0PPSbits.RC0PPS0 // bit 0 7914 #define RC0PPS1 RC0PPSbits.RC0PPS1 // bit 1 7915 #define RC0PPS2 RC0PPSbits.RC0PPS2 // bit 2 7916 #define RC0PPS3 RC0PPSbits.RC0PPS3 // bit 3 7917 7918 #define RC1PPS0 RC1PPSbits.RC1PPS0 // bit 0 7919 #define RC1PPS1 RC1PPSbits.RC1PPS1 // bit 1 7920 #define RC1PPS2 RC1PPSbits.RC1PPS2 // bit 2 7921 #define RC1PPS3 RC1PPSbits.RC1PPS3 // bit 3 7922 7923 #define RC3PPS0 RC3PPSbits.RC3PPS0 // bit 0 7924 #define RC3PPS1 RC3PPSbits.RC3PPS1 // bit 1 7925 #define RC3PPS2 RC3PPSbits.RC3PPS2 // bit 2 7926 #define RC3PPS3 RC3PPSbits.RC3PPS3 // bit 3 7927 7928 #define RC4PPS0 RC4PPSbits.RC4PPS0 // bit 0 7929 #define RC4PPS1 RC4PPSbits.RC4PPS1 // bit 1 7930 #define RC4PPS2 RC4PPSbits.RC4PPS2 // bit 2 7931 #define RC4PPS3 RC4PPSbits.RC4PPS3 // bit 3 7932 7933 #define RC5PPS0 RC5PPSbits.RC5PPS0 // bit 0 7934 #define RC5PPS1 RC5PPSbits.RC5PPS1 // bit 1 7935 #define RC5PPS2 RC5PPSbits.RC5PPS2 // bit 2 7936 #define RC5PPS3 RC5PPSbits.RC5PPS3 // bit 3 7937 7938 #define RC6PPS0 RC6PPSbits.RC6PPS0 // bit 0 7939 #define RC6PPS1 RC6PPSbits.RC6PPS1 // bit 1 7940 #define RC6PPS2 RC6PPSbits.RC6PPS2 // bit 2 7941 #define RC6PPS3 RC6PPSbits.RC6PPS3 // bit 3 7942 7943 #define RC7PPS0 RC7PPSbits.RC7PPS0 // bit 0 7944 #define RC7PPS1 RC7PPSbits.RC7PPS1 // bit 1 7945 #define RC7PPS2 RC7PPSbits.RC7PPS2 // bit 2 7946 #define RC7PPS3 RC7PPSbits.RC7PPS3 // bit 3 7947 7948 #define RX9D RCSTAbits.RX9D // bit 0 7949 #define OERR RCSTAbits.OERR // bit 1 7950 #define FERR RCSTAbits.FERR // bit 2 7951 #define ADDEN RCSTAbits.ADDEN // bit 3 7952 #define CREN RCSTAbits.CREN // bit 4 7953 #define SREN RCSTAbits.SREN // bit 5 7954 #define RX9 RCSTAbits.RX9 // bit 6 7955 #define SPEN RCSTAbits.SPEN // bit 7 7956 7957 #define RXPPS0 RXPPSbits.RXPPS0 // bit 0 7958 #define RXPPS1 RXPPSbits.RXPPS1 // bit 1 7959 #define RXPPS2 RXPPSbits.RXPPS2 // bit 2 7960 #define RXPPS3 RXPPSbits.RXPPS3 // bit 3 7961 #define RXPPS4 RXPPSbits.RXPPS4 // bit 4 7962 7963 #define SLRA0 SLRCONAbits.SLRA0 // bit 0 7964 #define SLRA1 SLRCONAbits.SLRA1 // bit 1 7965 #define SLRA2 SLRCONAbits.SLRA2 // bit 2 7966 #define SLRA4 SLRCONAbits.SLRA4 // bit 4 7967 #define SLRA5 SLRCONAbits.SLRA5 // bit 5 7968 7969 #define SLRB4 SLRCONBbits.SLRB4 // bit 4 7970 #define SLRB5 SLRCONBbits.SLRB5 // bit 5 7971 #define SLRB6 SLRCONBbits.SLRB6 // bit 6 7972 #define SLRB7 SLRCONBbits.SLRB7 // bit 7 7973 7974 #define SLRC0 SLRCONCbits.SLRC0 // bit 0 7975 #define SLRC1 SLRCONCbits.SLRC1 // bit 1 7976 #define SLRC2 SLRCONCbits.SLRC2 // bit 2 7977 #define SLRC3 SLRCONCbits.SLRC3 // bit 3 7978 #define SLRC4 SLRCONCbits.SLRC4 // bit 4 7979 #define SLRC5 SLRCONCbits.SLRC5 // bit 5 7980 #define SLRC6 SLRCONCbits.SLRC6 // bit 6 7981 #define SLRC7 SLRCONCbits.SLRC7 // bit 7 7982 7983 #define C STATUSbits.C // bit 0 7984 #define DC STATUSbits.DC // bit 1 7985 #define Z STATUSbits.Z // bit 2 7986 #define NOT_PD STATUSbits.NOT_PD // bit 3 7987 #define NOT_TO STATUSbits.NOT_TO // bit 4 7988 7989 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0 7990 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1 7991 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2 7992 7993 #define T0CKIPPS0 T0CKIPPSbits.T0CKIPPS0 // bit 0 7994 #define T0CKIPPS1 T0CKIPPSbits.T0CKIPPS1 // bit 1 7995 #define T0CKIPPS2 T0CKIPPSbits.T0CKIPPS2 // bit 2 7996 #define T0CKIPPS3 T0CKIPPSbits.T0CKIPPS3 // bit 3 7997 #define T0CKIPPS4 T0CKIPPSbits.T0CKIPPS4 // bit 4 7998 7999 #define T1CKIPPS0 T1CKIPPSbits.T1CKIPPS0 // bit 0 8000 #define T1CKIPPS1 T1CKIPPSbits.T1CKIPPS1 // bit 1 8001 #define T1CKIPPS2 T1CKIPPSbits.T1CKIPPS2 // bit 2 8002 #define T1CKIPPS3 T1CKIPPSbits.T1CKIPPS3 // bit 3 8003 #define T1CKIPPS4 T1CKIPPSbits.T1CKIPPS4 // bit 4 8004 8005 #define TMR1ON T1CONbits.TMR1ON // bit 0 8006 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2 8007 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 8008 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 8009 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 8010 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6 8011 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7 8012 8013 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0 8014 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1 8015 #define T1GVAL T1GCONbits.T1GVAL // bit 2 8016 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits 8017 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits 8018 #define T1GSPM T1GCONbits.T1GSPM // bit 4 8019 #define T1GTM T1GCONbits.T1GTM // bit 5 8020 #define T1GPOL T1GCONbits.T1GPOL // bit 6 8021 #define TMR1GE T1GCONbits.TMR1GE // bit 7 8022 8023 #define T1GPPS0 T1GPPSbits.T1GPPS0 // bit 0 8024 #define T1GPPS1 T1GPPSbits.T1GPPS1 // bit 1 8025 #define T1GPPS2 T1GPPSbits.T1GPPS2 // bit 2 8026 #define T1GPPS3 T1GPPSbits.T1GPPS3 // bit 3 8027 #define T1GPPS4 T1GPPSbits.T1GPPS4 // bit 4 8028 8029 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0 8030 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1 8031 #define TMR2ON T2CONbits.TMR2ON // bit 2 8032 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3 8033 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4 8034 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5 8035 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6 8036 8037 #define TRISA0 TRISAbits.TRISA0 // bit 0 8038 #define TRISA1 TRISAbits.TRISA1 // bit 1 8039 #define TRISA2 TRISAbits.TRISA2 // bit 2 8040 #define TRISA3 TRISAbits.TRISA3 // bit 3 8041 #define TRISA4 TRISAbits.TRISA4 // bit 4 8042 #define TRISA5 TRISAbits.TRISA5 // bit 5 8043 8044 #define TRISB3 TRISBbits.TRISB3 // bit 4 8045 #define TRISB5 TRISBbits.TRISB5 // bit 5 8046 #define TRISB6 TRISBbits.TRISB6 // bit 6 8047 #define TRISB7 TRISBbits.TRISB7 // bit 7 8048 8049 #define TRISC0 TRISCbits.TRISC0 // bit 0 8050 #define TRISC1 TRISCbits.TRISC1 // bit 1 8051 #define TRISC2 TRISCbits.TRISC2 // bit 2 8052 #define TRISC3 TRISCbits.TRISC3 // bit 3 8053 #define TRISC4 TRISCbits.TRISC4 // bit 4 8054 #define TRISC5 TRISCbits.TRISC5 // bit 5 8055 #define TRISC6 TRISCbits.TRISC6 // bit 6 8056 #define TRISC7 TRISCbits.TRISC7 // bit 7 8057 8058 #define TX9D TXSTAbits.TX9D // bit 0 8059 #define TRMT TXSTAbits.TRMT // bit 1 8060 #define BRGH TXSTAbits.BRGH // bit 2 8061 #define SENDB TXSTAbits.SENDB // bit 3 8062 #define SYNC TXSTAbits.SYNC // bit 4 8063 #define TXEN TXSTAbits.TXEN // bit 5 8064 #define TX9 TXSTAbits.TX9 // bit 6 8065 #define CSRC TXSTAbits.CSRC // bit 7 8066 8067 #define SWDTEN WDTCONbits.SWDTEN // bit 0 8068 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1 8069 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2 8070 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3 8071 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4 8072 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5 8073 8074 #define WPUA0 WPUAbits.WPUA0 // bit 0 8075 #define WPUA1 WPUAbits.WPUA1 // bit 1 8076 #define WPUA2 WPUAbits.WPUA2 // bit 2 8077 #define WPUA3 WPUAbits.WPUA3 // bit 3 8078 #define WPUA4 WPUAbits.WPUA4 // bit 4 8079 #define WPUA5 WPUAbits.WPUA5 // bit 5 8080 8081 #define WPUB4 WPUBbits.WPUB4 // bit 4 8082 #define WPUB5 WPUBbits.WPUB5 // bit 5 8083 #define WPUB6 WPUBbits.WPUB6 // bit 6 8084 #define WPUB7 WPUBbits.WPUB7 // bit 7 8085 8086 #define WPUC0 WPUCbits.WPUC0 // bit 0 8087 #define WPUC1 WPUCbits.WPUC1 // bit 1 8088 #define WPUC2 WPUCbits.WPUC2 // bit 2 8089 #define WPUC3 WPUCbits.WPUC3 // bit 3 8090 #define WPUC4 WPUCbits.WPUC4 // bit 4 8091 #define WPUC5 WPUCbits.WPUC5 // bit 5 8092 #define WPUC6 WPUCbits.WPUC6 // bit 6 8093 #define WPUC7 WPUCbits.WPUC7 // bit 7 8094 8095 #endif // #ifndef NO_BIT_DEFINES 8096 8097 #endif // #ifndef __PIC16LF1579_H__ 8098