1 /*
2  * This definitions of the PIC16LF1719 MCU.
3  *
4  * This file is part of the GNU PIC library for SDCC, originally
5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6  *
7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:13 UTC.
8  *
9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10  * this license covers the code to the compiler and other executables,
11  * but explicitly does not cover any code or objects generated by sdcc.
12  *
13  * For pic device libraries and header files which are derived from
14  * Microchip header (.inc) and linker script (.lkr) files Microchip
15  * requires that "The header files should state that they are only to be
16  * used with authentic Microchip devices" which makes them incompatible
17  * with the GPL. Pic device libraries and header files are located at
18  * non-free/lib and non-free/include directories respectively.
19  * Sdcc should be run with the --use-non-free command line option in
20  * order to include non-free header files and libraries.
21  *
22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23  */
24 
25 #include <pic16lf1719.h>
26 
27 //==============================================================================
28 
29 __at(0x0000) __sfr INDF0;
30 
31 __at(0x0001) __sfr INDF1;
32 
33 __at(0x0002) __sfr PCL;
34 
35 __at(0x0003) __sfr STATUS;
36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
37 
38 __at(0x0004) __sfr FSR0;
39 
40 __at(0x0004) __sfr FSR0L;
41 
42 __at(0x0005) __sfr FSR0H;
43 
44 __at(0x0006) __sfr FSR1;
45 
46 __at(0x0006) __sfr FSR1L;
47 
48 __at(0x0007) __sfr FSR1H;
49 
50 __at(0x0008) __sfr BSR;
51 __at(0x0008) volatile __BSRbits_t BSRbits;
52 
53 __at(0x0009) __sfr WREG;
54 
55 __at(0x000A) __sfr PCLATH;
56 
57 __at(0x000B) __sfr INTCON;
58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
59 
60 __at(0x000C) __sfr PORTA;
61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
62 
63 __at(0x000D) __sfr PORTB;
64 __at(0x000D) volatile __PORTBbits_t PORTBbits;
65 
66 __at(0x000E) __sfr PORTC;
67 __at(0x000E) volatile __PORTCbits_t PORTCbits;
68 
69 __at(0x000F) __sfr PORTD;
70 __at(0x000F) volatile __PORTDbits_t PORTDbits;
71 
72 __at(0x0010) __sfr PORTE;
73 __at(0x0010) volatile __PORTEbits_t PORTEbits;
74 
75 __at(0x0011) __sfr PIR1;
76 __at(0x0011) volatile __PIR1bits_t PIR1bits;
77 
78 __at(0x0012) __sfr PIR2;
79 __at(0x0012) volatile __PIR2bits_t PIR2bits;
80 
81 __at(0x0013) __sfr PIR3;
82 __at(0x0013) volatile __PIR3bits_t PIR3bits;
83 
84 __at(0x0015) __sfr TMR0;
85 
86 __at(0x0016) __sfr TMR1;
87 
88 __at(0x0016) __sfr TMR1L;
89 
90 __at(0x0017) __sfr TMR1H;
91 
92 __at(0x0018) __sfr T1CON;
93 __at(0x0018) volatile __T1CONbits_t T1CONbits;
94 
95 __at(0x0019) __sfr T1GCON;
96 __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
97 
98 __at(0x001A) __sfr TMR2;
99 
100 __at(0x001B) __sfr PR2;
101 
102 __at(0x001C) __sfr T2CON;
103 __at(0x001C) volatile __T2CONbits_t T2CONbits;
104 
105 __at(0x008C) __sfr TRISA;
106 __at(0x008C) volatile __TRISAbits_t TRISAbits;
107 
108 __at(0x008D) __sfr TRISB;
109 __at(0x008D) volatile __TRISBbits_t TRISBbits;
110 
111 __at(0x008E) __sfr TRISC;
112 __at(0x008E) volatile __TRISCbits_t TRISCbits;
113 
114 __at(0x008F) __sfr TRISD;
115 __at(0x008F) volatile __TRISDbits_t TRISDbits;
116 
117 __at(0x0090) __sfr TRISE;
118 __at(0x0090) volatile __TRISEbits_t TRISEbits;
119 
120 __at(0x0091) __sfr PIE1;
121 __at(0x0091) volatile __PIE1bits_t PIE1bits;
122 
123 __at(0x0092) __sfr PIE2;
124 __at(0x0092) volatile __PIE2bits_t PIE2bits;
125 
126 __at(0x0093) __sfr PIE3;
127 __at(0x0093) volatile __PIE3bits_t PIE3bits;
128 
129 __at(0x0095) __sfr OPTION_REG;
130 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
131 
132 __at(0x0096) __sfr PCON;
133 __at(0x0096) volatile __PCONbits_t PCONbits;
134 
135 __at(0x0097) __sfr WDTCON;
136 __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
137 
138 __at(0x0098) __sfr OSCTUNE;
139 __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
140 
141 __at(0x0099) __sfr OSCCON;
142 __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
143 
144 __at(0x009A) __sfr OSCSTAT;
145 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
146 
147 __at(0x009B) __sfr ADRES;
148 
149 __at(0x009B) __sfr ADRESL;
150 
151 __at(0x009C) __sfr ADRESH;
152 
153 __at(0x009D) __sfr ADCON0;
154 __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
155 
156 __at(0x009E) __sfr ADCON1;
157 __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
158 
159 __at(0x009F) __sfr ADCON2;
160 __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
161 
162 __at(0x010C) __sfr LATA;
163 __at(0x010C) volatile __LATAbits_t LATAbits;
164 
165 __at(0x010D) __sfr LATB;
166 __at(0x010D) volatile __LATBbits_t LATBbits;
167 
168 __at(0x010E) __sfr LATC;
169 __at(0x010E) volatile __LATCbits_t LATCbits;
170 
171 __at(0x010F) __sfr LATD;
172 __at(0x010F) volatile __LATDbits_t LATDbits;
173 
174 __at(0x0110) __sfr LATE;
175 __at(0x0110) volatile __LATEbits_t LATEbits;
176 
177 __at(0x0111) __sfr CM1CON0;
178 __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
179 
180 __at(0x0112) __sfr CM1CON1;
181 __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
182 
183 __at(0x0113) __sfr CM2CON0;
184 __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
185 
186 __at(0x0114) __sfr CM2CON1;
187 __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
188 
189 __at(0x0115) __sfr CMOUT;
190 __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
191 
192 __at(0x0116) __sfr BORCON;
193 __at(0x0116) volatile __BORCONbits_t BORCONbits;
194 
195 __at(0x0117) __sfr FVRCON;
196 __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
197 
198 __at(0x0118) __sfr DAC1CON0;
199 __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits;
200 
201 __at(0x0119) __sfr DAC1CON1;
202 __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits;
203 
204 __at(0x011A) __sfr DAC2CON0;
205 __at(0x011A) volatile __DAC2CON0bits_t DAC2CON0bits;
206 
207 __at(0x011B) __sfr DAC2CON1;
208 __at(0x011B) volatile __DAC2CON1bits_t DAC2CON1bits;
209 
210 __at(0x011B) __sfr DAC2REF;
211 __at(0x011B) volatile __DAC2REFbits_t DAC2REFbits;
212 
213 __at(0x011C) __sfr ZCD1CON;
214 __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits;
215 
216 __at(0x018C) __sfr ANSELA;
217 __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
218 
219 __at(0x018D) __sfr ANSELB;
220 __at(0x018D) volatile __ANSELBbits_t ANSELBbits;
221 
222 __at(0x018E) __sfr ANSELC;
223 __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
224 
225 __at(0x018F) __sfr ANSELD;
226 __at(0x018F) volatile __ANSELDbits_t ANSELDbits;
227 
228 __at(0x0190) __sfr ANSELE;
229 __at(0x0190) volatile __ANSELEbits_t ANSELEbits;
230 
231 __at(0x0191) __sfr PMADR;
232 
233 __at(0x0191) __sfr PMADRL;
234 
235 __at(0x0192) __sfr PMADRH;
236 
237 __at(0x0193) __sfr PMDAT;
238 
239 __at(0x0193) __sfr PMDATL;
240 
241 __at(0x0194) __sfr PMDATH;
242 
243 __at(0x0195) __sfr PMCON1;
244 __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
245 
246 __at(0x0196) __sfr PMCON2;
247 
248 __at(0x0199) __sfr RC1REG;
249 
250 __at(0x0199) __sfr RCREG;
251 
252 __at(0x0199) __sfr RCREG1;
253 
254 __at(0x019A) __sfr TX1REG;
255 
256 __at(0x019A) __sfr TXREG;
257 
258 __at(0x019A) __sfr TXREG1;
259 
260 __at(0x019B) __sfr SP1BRG;
261 
262 __at(0x019B) __sfr SP1BRGL;
263 
264 __at(0x019B) __sfr SPBRG;
265 
266 __at(0x019B) __sfr SPBRG1;
267 
268 __at(0x019B) __sfr SPBRGL;
269 
270 __at(0x019C) __sfr SP1BRGH;
271 
272 __at(0x019C) __sfr SPBRGH;
273 
274 __at(0x019C) __sfr SPBRGH1;
275 
276 __at(0x019D) __sfr RC1STA;
277 __at(0x019D) volatile __RC1STAbits_t RC1STAbits;
278 
279 __at(0x019D) __sfr RCSTA;
280 __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
281 
282 __at(0x019D) __sfr RCSTA1;
283 __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits;
284 
285 __at(0x019E) __sfr TX1STA;
286 __at(0x019E) volatile __TX1STAbits_t TX1STAbits;
287 
288 __at(0x019E) __sfr TXSTA;
289 __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
290 
291 __at(0x019E) __sfr TXSTA1;
292 __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits;
293 
294 __at(0x019F) __sfr BAUD1CON;
295 __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits;
296 
297 __at(0x019F) __sfr BAUDCON;
298 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
299 
300 __at(0x019F) __sfr BAUDCON1;
301 __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits;
302 
303 __at(0x019F) __sfr BAUDCTL;
304 __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits;
305 
306 __at(0x019F) __sfr BAUDCTL1;
307 __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits;
308 
309 __at(0x020C) __sfr WPUA;
310 __at(0x020C) volatile __WPUAbits_t WPUAbits;
311 
312 __at(0x020D) __sfr WPUB;
313 __at(0x020D) volatile __WPUBbits_t WPUBbits;
314 
315 __at(0x020E) __sfr WPUC;
316 __at(0x020E) volatile __WPUCbits_t WPUCbits;
317 
318 __at(0x020F) __sfr WPUD;
319 __at(0x020F) volatile __WPUDbits_t WPUDbits;
320 
321 __at(0x0210) __sfr WPUE;
322 __at(0x0210) volatile __WPUEbits_t WPUEbits;
323 
324 __at(0x0211) __sfr SSP1BUF;
325 __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits;
326 
327 __at(0x0211) __sfr SSPBUF;
328 __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits;
329 
330 __at(0x0212) __sfr SSP1ADD;
331 __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits;
332 
333 __at(0x0212) __sfr SSPADD;
334 __at(0x0212) volatile __SSPADDbits_t SSPADDbits;
335 
336 __at(0x0213) __sfr SSP1MSK;
337 __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits;
338 
339 __at(0x0213) __sfr SSPMSK;
340 __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits;
341 
342 __at(0x0214) __sfr SSP1STAT;
343 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
344 
345 __at(0x0214) __sfr SSPSTAT;
346 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
347 
348 __at(0x0215) __sfr SSP1CON;
349 __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits;
350 
351 __at(0x0215) __sfr SSP1CON1;
352 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
353 
354 __at(0x0215) __sfr SSPCON;
355 __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
356 
357 __at(0x0215) __sfr SSPCON1;
358 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
359 
360 __at(0x0216) __sfr SSP1CON2;
361 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
362 
363 __at(0x0216) __sfr SSPCON2;
364 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
365 
366 __at(0x0217) __sfr SSP1CON3;
367 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
368 
369 __at(0x0217) __sfr SSPCON3;
370 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
371 
372 __at(0x028C) __sfr ODCONA;
373 __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
374 
375 __at(0x028D) __sfr ODCONB;
376 __at(0x028D) volatile __ODCONBbits_t ODCONBbits;
377 
378 __at(0x028E) __sfr ODCONC;
379 __at(0x028E) volatile __ODCONCbits_t ODCONCbits;
380 
381 __at(0x028F) __sfr ODCOND;
382 __at(0x028F) volatile __ODCONDbits_t ODCONDbits;
383 
384 __at(0x0290) __sfr ODCONE;
385 __at(0x0290) volatile __ODCONEbits_t ODCONEbits;
386 
387 __at(0x0291) __sfr CCPR1;
388 
389 __at(0x0291) __sfr CCPR1L;
390 
391 __at(0x0292) __sfr CCPR1H;
392 
393 __at(0x0293) __sfr CCP1CON;
394 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits;
395 
396 __at(0x0293) __sfr ECCP1CON;
397 __at(0x0293) volatile __ECCP1CONbits_t ECCP1CONbits;
398 
399 __at(0x0298) __sfr CCPR2;
400 
401 __at(0x0298) __sfr CCPR2L;
402 
403 __at(0x0299) __sfr CCPR2H;
404 
405 __at(0x029A) __sfr CCP2CON;
406 __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits;
407 
408 __at(0x029A) __sfr ECCP2CON;
409 __at(0x029A) volatile __ECCP2CONbits_t ECCP2CONbits;
410 
411 __at(0x029E) __sfr CCPTMRS;
412 __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits;
413 
414 __at(0x030C) __sfr SLRCONA;
415 __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
416 
417 __at(0x030D) __sfr SLRCONB;
418 __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits;
419 
420 __at(0x030E) __sfr SLRCONC;
421 __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits;
422 
423 __at(0x030F) __sfr SLRCOND;
424 __at(0x030F) volatile __SLRCONDbits_t SLRCONDbits;
425 
426 __at(0x0310) __sfr SLRCONE;
427 __at(0x0310) volatile __SLRCONEbits_t SLRCONEbits;
428 
429 __at(0x038C) __sfr INLVLA;
430 __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
431 
432 __at(0x038D) __sfr INLVLB;
433 __at(0x038D) volatile __INLVLBbits_t INLVLBbits;
434 
435 __at(0x038E) __sfr INLVLC;
436 __at(0x038E) volatile __INLVLCbits_t INLVLCbits;
437 
438 __at(0x038F) __sfr INLVLD;
439 __at(0x038F) volatile __INLVLDbits_t INLVLDbits;
440 
441 __at(0x0390) __sfr INLVLE;
442 __at(0x0390) volatile __INLVLEbits_t INLVLEbits;
443 
444 __at(0x0391) __sfr IOCAP;
445 __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
446 
447 __at(0x0392) __sfr IOCAN;
448 __at(0x0392) volatile __IOCANbits_t IOCANbits;
449 
450 __at(0x0393) __sfr IOCAF;
451 __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
452 
453 __at(0x0394) __sfr IOCBP;
454 __at(0x0394) volatile __IOCBPbits_t IOCBPbits;
455 
456 __at(0x0395) __sfr IOCBN;
457 __at(0x0395) volatile __IOCBNbits_t IOCBNbits;
458 
459 __at(0x0396) __sfr IOCBF;
460 __at(0x0396) volatile __IOCBFbits_t IOCBFbits;
461 
462 __at(0x0397) __sfr IOCCP;
463 __at(0x0397) volatile __IOCCPbits_t IOCCPbits;
464 
465 __at(0x0398) __sfr IOCCN;
466 __at(0x0398) volatile __IOCCNbits_t IOCCNbits;
467 
468 __at(0x0399) __sfr IOCCF;
469 __at(0x0399) volatile __IOCCFbits_t IOCCFbits;
470 
471 __at(0x039D) __sfr IOCEP;
472 __at(0x039D) volatile __IOCEPbits_t IOCEPbits;
473 
474 __at(0x039E) __sfr IOCEN;
475 __at(0x039E) volatile __IOCENbits_t IOCENbits;
476 
477 __at(0x039F) __sfr IOCEF;
478 __at(0x039F) volatile __IOCEFbits_t IOCEFbits;
479 
480 __at(0x0415) __sfr TMR4;
481 
482 __at(0x0416) __sfr PR4;
483 
484 __at(0x0417) __sfr T4CON;
485 __at(0x0417) volatile __T4CONbits_t T4CONbits;
486 
487 __at(0x041C) __sfr TMR6;
488 
489 __at(0x041D) __sfr PR6;
490 
491 __at(0x041E) __sfr T6CON;
492 __at(0x041E) volatile __T6CONbits_t T6CONbits;
493 
494 __at(0x0498) __sfr NCO1ACC;
495 
496 __at(0x0498) __sfr NCO1ACCL;
497 __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits;
498 
499 __at(0x0499) __sfr NCO1ACCH;
500 __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits;
501 
502 __at(0x049A) __sfr NCO1ACCU;
503 __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits;
504 
505 __at(0x049B) __sfr NCO1INC;
506 
507 __at(0x049B) __sfr NCO1INCL;
508 __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits;
509 
510 __at(0x049C) __sfr NCO1INCH;
511 __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits;
512 
513 __at(0x049D) __sfr NCO1INCU;
514 __at(0x049D) volatile __NCO1INCUbits_t NCO1INCUbits;
515 
516 __at(0x049E) __sfr NCO1CON;
517 __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits;
518 
519 __at(0x049F) __sfr NCO1CLK;
520 __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits;
521 
522 __at(0x0511) __sfr OPA1CON;
523 __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits;
524 
525 __at(0x0515) __sfr OPA2CON;
526 __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits;
527 
528 __at(0x0617) __sfr PWM3DCL;
529 __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
530 
531 __at(0x0618) __sfr PWM3DCH;
532 __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
533 
534 __at(0x0619) __sfr PWM3CON;
535 __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
536 
537 __at(0x0619) __sfr PWM3CON0;
538 __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits;
539 
540 __at(0x061A) __sfr PWM4DCL;
541 __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
542 
543 __at(0x061B) __sfr PWM4DCH;
544 __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
545 
546 __at(0x061C) __sfr PWM4CON;
547 __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
548 
549 __at(0x061C) __sfr PWM4CON0;
550 __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits;
551 
552 __at(0x0691) __sfr COG1PHR;
553 __at(0x0691) volatile __COG1PHRbits_t COG1PHRbits;
554 
555 __at(0x0692) __sfr COG1PHF;
556 __at(0x0692) volatile __COG1PHFbits_t COG1PHFbits;
557 
558 __at(0x0693) __sfr COG1BLKR;
559 __at(0x0693) volatile __COG1BLKRbits_t COG1BLKRbits;
560 
561 __at(0x0694) __sfr COG1BLKF;
562 __at(0x0694) volatile __COG1BLKFbits_t COG1BLKFbits;
563 
564 __at(0x0695) __sfr COG1DBR;
565 __at(0x0695) volatile __COG1DBRbits_t COG1DBRbits;
566 
567 __at(0x0696) __sfr COG1DBF;
568 __at(0x0696) volatile __COG1DBFbits_t COG1DBFbits;
569 
570 __at(0x0697) __sfr COG1CON0;
571 __at(0x0697) volatile __COG1CON0bits_t COG1CON0bits;
572 
573 __at(0x0698) __sfr COG1CON1;
574 __at(0x0698) volatile __COG1CON1bits_t COG1CON1bits;
575 
576 __at(0x0699) __sfr COG1RIS;
577 __at(0x0699) volatile __COG1RISbits_t COG1RISbits;
578 
579 __at(0x069A) __sfr COG1RSIM;
580 __at(0x069A) volatile __COG1RSIMbits_t COG1RSIMbits;
581 
582 __at(0x069B) __sfr COG1FIS;
583 __at(0x069B) volatile __COG1FISbits_t COG1FISbits;
584 
585 __at(0x069C) __sfr COG1FSIM;
586 __at(0x069C) volatile __COG1FSIMbits_t COG1FSIMbits;
587 
588 __at(0x069D) __sfr COG1ASD0;
589 __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits;
590 
591 __at(0x069E) __sfr COG1ASD1;
592 __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits;
593 
594 __at(0x069F) __sfr COG1STR;
595 __at(0x069F) volatile __COG1STRbits_t COG1STRbits;
596 
597 __at(0x0E0F) __sfr PPSLOCK;
598 __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits;
599 
600 __at(0x0E10) __sfr INTPPS;
601 
602 __at(0x0E11) __sfr T0CKIPPS;
603 
604 __at(0x0E12) __sfr T1CKIPPS;
605 
606 __at(0x0E13) __sfr T1GPPS;
607 
608 __at(0x0E14) __sfr CCP1PPS;
609 
610 __at(0x0E15) __sfr CCP2PPS;
611 
612 __at(0x0E17) __sfr COGINPPS;
613 
614 __at(0x0E20) __sfr SSPCLKPPS;
615 
616 __at(0x0E21) __sfr SSPDATPPS;
617 
618 __at(0x0E22) __sfr SSPSSPPS;
619 
620 __at(0x0E24) __sfr RXPPS;
621 
622 __at(0x0E25) __sfr CKPPS;
623 
624 __at(0x0E28) __sfr CLCIN0PPS;
625 
626 __at(0x0E29) __sfr CLCIN1PPS;
627 
628 __at(0x0E2A) __sfr CLCIN2PPS;
629 
630 __at(0x0E2B) __sfr CLCIN3PPS;
631 
632 __at(0x0E90) __sfr RA0PPS;
633 
634 __at(0x0E91) __sfr RA1PPS;
635 
636 __at(0x0E92) __sfr RA2PPS;
637 
638 __at(0x0E93) __sfr RA3PPS;
639 
640 __at(0x0E94) __sfr RA4PPS;
641 
642 __at(0x0E95) __sfr RA5PPS;
643 
644 __at(0x0E96) __sfr RA6PPS;
645 
646 __at(0x0E97) __sfr RA7PPS;
647 
648 __at(0x0E98) __sfr RB0PPS;
649 
650 __at(0x0E99) __sfr RB1PPS;
651 
652 __at(0x0E9A) __sfr RB2PPS;
653 
654 __at(0x0E9B) __sfr RB3PPS;
655 
656 __at(0x0E9C) __sfr RB4PPS;
657 
658 __at(0x0E9D) __sfr RB5PPS;
659 
660 __at(0x0E9E) __sfr RB6PPS;
661 
662 __at(0x0E9F) __sfr RB7PPS;
663 
664 __at(0x0EA0) __sfr RC0PPS;
665 
666 __at(0x0EA1) __sfr RC1PPS;
667 
668 __at(0x0EA2) __sfr RC2PPS;
669 
670 __at(0x0EA3) __sfr RC3PPS;
671 
672 __at(0x0EA4) __sfr RC4PPS;
673 
674 __at(0x0EA5) __sfr RC5PPS;
675 
676 __at(0x0EA6) __sfr RC6PPS;
677 
678 __at(0x0EA7) __sfr RC7PPS;
679 
680 __at(0x0EA8) __sfr RD0PPS;
681 
682 __at(0x0EA9) __sfr RD1PPS;
683 
684 __at(0x0EAA) __sfr RD2PPS;
685 
686 __at(0x0EAB) __sfr RD3PPS;
687 
688 __at(0x0EAC) __sfr RD4PPS;
689 
690 __at(0x0EAD) __sfr RD5PPS;
691 
692 __at(0x0EAE) __sfr RD6PPS;
693 
694 __at(0x0EAF) __sfr RD7PPS;
695 
696 __at(0x0EB0) __sfr RE0PPS;
697 
698 __at(0x0EB1) __sfr RE1PPS;
699 
700 __at(0x0EB2) __sfr RE2PPS;
701 
702 __at(0x0F0F) __sfr CLCDATA;
703 __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
704 
705 __at(0x0F10) __sfr CLC1CON;
706 __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
707 
708 __at(0x0F11) __sfr CLC1POL;
709 __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
710 
711 __at(0x0F12) __sfr CLC1SEL0;
712 __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
713 
714 __at(0x0F13) __sfr CLC1SEL1;
715 __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
716 
717 __at(0x0F14) __sfr CLC1SEL2;
718 __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits;
719 
720 __at(0x0F15) __sfr CLC1SEL3;
721 __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits;
722 
723 __at(0x0F16) __sfr CLC1GLS0;
724 __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits;
725 
726 __at(0x0F17) __sfr CLC1GLS1;
727 __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits;
728 
729 __at(0x0F18) __sfr CLC1GLS2;
730 __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits;
731 
732 __at(0x0F19) __sfr CLC1GLS3;
733 __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits;
734 
735 __at(0x0F1A) __sfr CLC2CON;
736 __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits;
737 
738 __at(0x0F1B) __sfr CLC2POL;
739 __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits;
740 
741 __at(0x0F1C) __sfr CLC2SEL0;
742 __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits;
743 
744 __at(0x0F1D) __sfr CLC2SEL1;
745 __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits;
746 
747 __at(0x0F1E) __sfr CLC2SEL2;
748 __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits;
749 
750 __at(0x0F1F) __sfr CLC2SEL3;
751 __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits;
752 
753 __at(0x0F20) __sfr CLC2GLS0;
754 __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits;
755 
756 __at(0x0F21) __sfr CLC2GLS1;
757 __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits;
758 
759 __at(0x0F22) __sfr CLC2GLS2;
760 __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits;
761 
762 __at(0x0F23) __sfr CLC2GLS3;
763 __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits;
764 
765 __at(0x0F24) __sfr CLC3CON;
766 __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits;
767 
768 __at(0x0F25) __sfr CLC3POL;
769 __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits;
770 
771 __at(0x0F26) __sfr CLC3SEL0;
772 __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits;
773 
774 __at(0x0F27) __sfr CLC3SEL1;
775 __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits;
776 
777 __at(0x0F28) __sfr CLC3SEL2;
778 __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits;
779 
780 __at(0x0F29) __sfr CLC3SEL3;
781 __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits;
782 
783 __at(0x0F2A) __sfr CLC3GLS0;
784 __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits;
785 
786 __at(0x0F2B) __sfr CLC3GLS1;
787 __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits;
788 
789 __at(0x0F2C) __sfr CLC3GLS2;
790 __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits;
791 
792 __at(0x0F2D) __sfr CLC3GLS3;
793 __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits;
794 
795 __at(0x0F2E) __sfr CLC4CON;
796 __at(0x0F2E) volatile __CLC4CONbits_t CLC4CONbits;
797 
798 __at(0x0F2F) __sfr CLC4POL;
799 __at(0x0F2F) volatile __CLC4POLbits_t CLC4POLbits;
800 
801 __at(0x0F30) __sfr CLC4SEL0;
802 __at(0x0F30) volatile __CLC4SEL0bits_t CLC4SEL0bits;
803 
804 __at(0x0F31) __sfr CLC4SEL1;
805 __at(0x0F31) volatile __CLC4SEL1bits_t CLC4SEL1bits;
806 
807 __at(0x0F32) __sfr CLC4SEL2;
808 __at(0x0F32) volatile __CLC4SEL2bits_t CLC4SEL2bits;
809 
810 __at(0x0F33) __sfr CLC4SEL3;
811 __at(0x0F33) volatile __CLC4SEL3bits_t CLC4SEL3bits;
812 
813 __at(0x0F34) __sfr CLC4GLS0;
814 __at(0x0F34) volatile __CLC4GLS0bits_t CLC4GLS0bits;
815 
816 __at(0x0F35) __sfr CLC4GLS1;
817 __at(0x0F35) volatile __CLC4GLS1bits_t CLC4GLS1bits;
818 
819 __at(0x0F36) __sfr CLC4GLS2;
820 __at(0x0F36) volatile __CLC4GLS2bits_t CLC4GLS2bits;
821 
822 __at(0x0F37) __sfr CLC4GLS3;
823 __at(0x0F37) volatile __CLC4GLS3bits_t CLC4GLS3bits;
824 
825 __at(0x0FE4) __sfr STATUS_SHAD;
826 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
827 
828 __at(0x0FE5) __sfr WREG_SHAD;
829 
830 __at(0x0FE6) __sfr BSR_SHAD;
831 
832 __at(0x0FE7) __sfr PCLATH_SHAD;
833 
834 __at(0x0FE8) __sfr FSR0L_SHAD;
835 
836 __at(0x0FE9) __sfr FSR0H_SHAD;
837 
838 __at(0x0FEA) __sfr FSR1L_SHAD;
839 
840 __at(0x0FEB) __sfr FSR1H_SHAD;
841 
842 __at(0x0FED) __sfr STKPTR;
843 
844 __at(0x0FEE) __sfr TOSL;
845 
846 __at(0x0FEF) __sfr TOSH;
847