1 /* 2 * This definitions of the PIC16LF18324 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:24 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #include <pic16lf18324.h> 26 27 //============================================================================== 28 29 __at(0x0000) __sfr INDF0; 30 31 __at(0x0001) __sfr INDF1; 32 33 __at(0x0002) __sfr PCL; 34 35 __at(0x0003) __sfr STATUS; 36 __at(0x0003) volatile __STATUSbits_t STATUSbits; 37 38 __at(0x0004) __sfr FSR0; 39 40 __at(0x0004) __sfr FSR0L; 41 42 __at(0x0005) __sfr FSR0H; 43 44 __at(0x0006) __sfr FSR1; 45 46 __at(0x0006) __sfr FSR1L; 47 48 __at(0x0007) __sfr FSR1H; 49 50 __at(0x0008) __sfr BSR; 51 __at(0x0008) volatile __BSRbits_t BSRbits; 52 53 __at(0x0009) __sfr WREG; 54 55 __at(0x000A) __sfr PCLATH; 56 57 __at(0x000B) __sfr INTCON; 58 __at(0x000B) volatile __INTCONbits_t INTCONbits; 59 60 __at(0x000C) __sfr PORTA; 61 __at(0x000C) volatile __PORTAbits_t PORTAbits; 62 63 __at(0x000E) __sfr PORTC; 64 __at(0x000E) volatile __PORTCbits_t PORTCbits; 65 66 __at(0x0010) __sfr PIR0; 67 __at(0x0010) volatile __PIR0bits_t PIR0bits; 68 69 __at(0x0011) __sfr PIR1; 70 __at(0x0011) volatile __PIR1bits_t PIR1bits; 71 72 __at(0x0012) __sfr PIR2; 73 __at(0x0012) volatile __PIR2bits_t PIR2bits; 74 75 __at(0x0013) __sfr PIR3; 76 __at(0x0013) volatile __PIR3bits_t PIR3bits; 77 78 __at(0x0014) __sfr PIR4; 79 __at(0x0014) volatile __PIR4bits_t PIR4bits; 80 81 __at(0x0015) __sfr TMR0L; 82 __at(0x0015) volatile __TMR0Lbits_t TMR0Lbits; 83 84 __at(0x0016) __sfr TMR0H; 85 __at(0x0016) volatile __TMR0Hbits_t TMR0Hbits; 86 87 __at(0x0017) __sfr T0CON0; 88 __at(0x0017) volatile __T0CON0bits_t T0CON0bits; 89 90 __at(0x0018) __sfr T0CON1; 91 __at(0x0018) volatile __T0CON1bits_t T0CON1bits; 92 93 __at(0x0019) __sfr TMR1; 94 95 __at(0x0019) __sfr TMR1L; 96 97 __at(0x001A) __sfr TMR1H; 98 99 __at(0x001B) __sfr T1CON; 100 __at(0x001B) volatile __T1CONbits_t T1CONbits; 101 102 __at(0x001C) __sfr T1GCON; 103 __at(0x001C) volatile __T1GCONbits_t T1GCONbits; 104 105 __at(0x001D) __sfr TMR2; 106 107 __at(0x001E) __sfr PR2; 108 109 __at(0x001F) __sfr T2CON; 110 __at(0x001F) volatile __T2CONbits_t T2CONbits; 111 112 __at(0x008C) __sfr TRISA; 113 __at(0x008C) volatile __TRISAbits_t TRISAbits; 114 115 __at(0x008E) __sfr TRISC; 116 __at(0x008E) volatile __TRISCbits_t TRISCbits; 117 118 __at(0x0090) __sfr PIE0; 119 __at(0x0090) volatile __PIE0bits_t PIE0bits; 120 121 __at(0x0091) __sfr PIE1; 122 __at(0x0091) volatile __PIE1bits_t PIE1bits; 123 124 __at(0x0092) __sfr PIE2; 125 __at(0x0092) volatile __PIE2bits_t PIE2bits; 126 127 __at(0x0093) __sfr PIE3; 128 __at(0x0093) volatile __PIE3bits_t PIE3bits; 129 130 __at(0x0094) __sfr PIE4; 131 __at(0x0094) volatile __PIE4bits_t PIE4bits; 132 133 __at(0x0097) __sfr WDTCON; 134 __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 135 136 __at(0x009B) __sfr ADRES; 137 138 __at(0x009B) __sfr ADRESL; 139 140 __at(0x009C) __sfr ADRESH; 141 142 __at(0x009D) __sfr ADCON0; 143 __at(0x009D) volatile __ADCON0bits_t ADCON0bits; 144 145 __at(0x009E) __sfr ADCON1; 146 __at(0x009E) volatile __ADCON1bits_t ADCON1bits; 147 148 __at(0x009F) __sfr ADACT; 149 __at(0x009F) volatile __ADACTbits_t ADACTbits; 150 151 __at(0x010C) __sfr LATA; 152 __at(0x010C) volatile __LATAbits_t LATAbits; 153 154 __at(0x010E) __sfr LATC; 155 __at(0x010E) volatile __LATCbits_t LATCbits; 156 157 __at(0x0111) __sfr CM1CON0; 158 __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits; 159 160 __at(0x0112) __sfr CM1CON1; 161 __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits; 162 163 __at(0x0113) __sfr CM2CON0; 164 __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits; 165 166 __at(0x0114) __sfr CM2CON1; 167 __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits; 168 169 __at(0x0115) __sfr CMOUT; 170 __at(0x0115) volatile __CMOUTbits_t CMOUTbits; 171 172 __at(0x0116) __sfr BORCON; 173 __at(0x0116) volatile __BORCONbits_t BORCONbits; 174 175 __at(0x0117) __sfr FVRCON; 176 __at(0x0117) volatile __FVRCONbits_t FVRCONbits; 177 178 __at(0x0118) __sfr DACCON0; 179 __at(0x0118) volatile __DACCON0bits_t DACCON0bits; 180 181 __at(0x0119) __sfr DACCON1; 182 __at(0x0119) volatile __DACCON1bits_t DACCON1bits; 183 184 __at(0x018C) __sfr ANSELA; 185 __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 186 187 __at(0x018E) __sfr ANSELC; 188 __at(0x018E) volatile __ANSELCbits_t ANSELCbits; 189 190 __at(0x0199) __sfr RC1REG; 191 192 __at(0x0199) __sfr RCREG; 193 194 __at(0x0199) __sfr RCREG1; 195 196 __at(0x019A) __sfr TX1REG; 197 198 __at(0x019A) __sfr TXREG; 199 200 __at(0x019A) __sfr TXREG1; 201 202 __at(0x019B) __sfr SP1BRG; 203 204 __at(0x019B) __sfr SP1BRGL; 205 206 __at(0x019B) __sfr SPBRG; 207 208 __at(0x019B) __sfr SPBRG1; 209 210 __at(0x019B) __sfr SPBRGL; 211 212 __at(0x019C) __sfr SP1BRGH; 213 214 __at(0x019C) __sfr SPBRGH; 215 216 __at(0x019C) __sfr SPBRGH1; 217 218 __at(0x019D) __sfr RC1STA; 219 __at(0x019D) volatile __RC1STAbits_t RC1STAbits; 220 221 __at(0x019D) __sfr RCSTA; 222 __at(0x019D) volatile __RCSTAbits_t RCSTAbits; 223 224 __at(0x019D) __sfr RCSTA1; 225 __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits; 226 227 __at(0x019E) __sfr TX1STA; 228 __at(0x019E) volatile __TX1STAbits_t TX1STAbits; 229 230 __at(0x019E) __sfr TXSTA; 231 __at(0x019E) volatile __TXSTAbits_t TXSTAbits; 232 233 __at(0x019E) __sfr TXSTA1; 234 __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits; 235 236 __at(0x019F) __sfr BAUD1CON; 237 __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits; 238 239 __at(0x019F) __sfr BAUDCON; 240 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; 241 242 __at(0x019F) __sfr BAUDCON1; 243 __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits; 244 245 __at(0x019F) __sfr BAUDCTL; 246 __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits; 247 248 __at(0x019F) __sfr BAUDCTL1; 249 __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits; 250 251 __at(0x020C) __sfr WPUA; 252 __at(0x020C) volatile __WPUAbits_t WPUAbits; 253 254 __at(0x020E) __sfr WPUC; 255 __at(0x020E) volatile __WPUCbits_t WPUCbits; 256 257 __at(0x0211) __sfr SSP1BUF; 258 __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits; 259 260 __at(0x0211) __sfr SSPBUF; 261 __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits; 262 263 __at(0x0212) __sfr SSP1ADD; 264 __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits; 265 266 __at(0x0212) __sfr SSPADD; 267 __at(0x0212) volatile __SSPADDbits_t SSPADDbits; 268 269 __at(0x0213) __sfr SSP1MSK; 270 __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits; 271 272 __at(0x0213) __sfr SSPMSK; 273 __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits; 274 275 __at(0x0214) __sfr SSP1STAT; 276 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits; 277 278 __at(0x0214) __sfr SSPSTAT; 279 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; 280 281 __at(0x0215) __sfr SSP1CON; 282 __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits; 283 284 __at(0x0215) __sfr SSP1CON1; 285 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits; 286 287 __at(0x0215) __sfr SSPCON; 288 __at(0x0215) volatile __SSPCONbits_t SSPCONbits; 289 290 __at(0x0215) __sfr SSPCON1; 291 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; 292 293 __at(0x0216) __sfr SSP1CON2; 294 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits; 295 296 __at(0x0216) __sfr SSPCON2; 297 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; 298 299 __at(0x0217) __sfr SSP1CON3; 300 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits; 301 302 __at(0x0217) __sfr SSPCON3; 303 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; 304 305 __at(0x028C) __sfr ODCONA; 306 __at(0x028C) volatile __ODCONAbits_t ODCONAbits; 307 308 __at(0x028E) __sfr ODCONC; 309 __at(0x028E) volatile __ODCONCbits_t ODCONCbits; 310 311 __at(0x0291) __sfr CCPR1; 312 313 __at(0x0291) __sfr CCPR1L; 314 315 __at(0x0292) __sfr CCPR1H; 316 317 __at(0x0293) __sfr CCP1CON; 318 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits; 319 320 __at(0x0294) __sfr CCP1CAP; 321 __at(0x0294) volatile __CCP1CAPbits_t CCP1CAPbits; 322 323 __at(0x0295) __sfr CCPR2; 324 325 __at(0x0295) __sfr CCPR2L; 326 327 __at(0x0296) __sfr CCPR2H; 328 329 __at(0x0297) __sfr CCP2CON; 330 __at(0x0297) volatile __CCP2CONbits_t CCP2CONbits; 331 332 __at(0x0298) __sfr CCP2CAP; 333 __at(0x0298) volatile __CCP2CAPbits_t CCP2CAPbits; 334 335 __at(0x029F) __sfr CCPTMRS; 336 __at(0x029F) volatile __CCPTMRSbits_t CCPTMRSbits; 337 338 __at(0x030C) __sfr SLRCONA; 339 __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits; 340 341 __at(0x030E) __sfr SLRCONC; 342 __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits; 343 344 __at(0x0311) __sfr CCPR3; 345 346 __at(0x0311) __sfr CCPR3L; 347 348 __at(0x0312) __sfr CCPR3H; 349 350 __at(0x0313) __sfr CCP3CON; 351 __at(0x0313) volatile __CCP3CONbits_t CCP3CONbits; 352 353 __at(0x0314) __sfr CCP3CAP; 354 __at(0x0314) volatile __CCP3CAPbits_t CCP3CAPbits; 355 356 __at(0x0315) __sfr CCPR4; 357 358 __at(0x0315) __sfr CCPR4L; 359 360 __at(0x0316) __sfr CCPR4H; 361 362 __at(0x0317) __sfr CCP4CON; 363 __at(0x0317) volatile __CCP4CONbits_t CCP4CONbits; 364 365 __at(0x0318) __sfr CCP4CAP; 366 __at(0x0318) volatile __CCP4CAPbits_t CCP4CAPbits; 367 368 __at(0x038C) __sfr INLVLA; 369 __at(0x038C) volatile __INLVLAbits_t INLVLAbits; 370 371 __at(0x038E) __sfr INLVLC; 372 __at(0x038E) volatile __INLVLCbits_t INLVLCbits; 373 374 __at(0x0391) __sfr IOCAP; 375 __at(0x0391) volatile __IOCAPbits_t IOCAPbits; 376 377 __at(0x0392) __sfr IOCAN; 378 __at(0x0392) volatile __IOCANbits_t IOCANbits; 379 380 __at(0x0393) __sfr IOCAF; 381 __at(0x0393) volatile __IOCAFbits_t IOCAFbits; 382 383 __at(0x0397) __sfr IOCCP; 384 __at(0x0397) volatile __IOCCPbits_t IOCCPbits; 385 386 __at(0x0398) __sfr IOCCN; 387 __at(0x0398) volatile __IOCCNbits_t IOCCNbits; 388 389 __at(0x0399) __sfr IOCCF; 390 __at(0x0399) volatile __IOCCFbits_t IOCCFbits; 391 392 __at(0x039A) __sfr CLKRCON; 393 __at(0x039A) volatile __CLKRCONbits_t CLKRCONbits; 394 395 __at(0x039C) __sfr MDCON; 396 __at(0x039C) volatile __MDCONbits_t MDCONbits; 397 398 __at(0x039D) __sfr MDSRC; 399 __at(0x039D) volatile __MDSRCbits_t MDSRCbits; 400 401 __at(0x039E) __sfr MDCARH; 402 __at(0x039E) volatile __MDCARHbits_t MDCARHbits; 403 404 __at(0x039F) __sfr MDCARL; 405 __at(0x039F) volatile __MDCARLbits_t MDCARLbits; 406 407 __at(0x040C) __sfr CCDNA; 408 __at(0x040C) volatile __CCDNAbits_t CCDNAbits; 409 410 __at(0x040E) __sfr CCDNC; 411 __at(0x040E) volatile __CCDNCbits_t CCDNCbits; 412 413 __at(0x0411) __sfr TMR3; 414 415 __at(0x0411) __sfr TMR3L; 416 417 __at(0x0412) __sfr TMR3H; 418 419 __at(0x0413) __sfr T3CON; 420 __at(0x0413) volatile __T3CONbits_t T3CONbits; 421 422 __at(0x0414) __sfr T3GCON; 423 __at(0x0414) volatile __T3GCONbits_t T3GCONbits; 424 425 __at(0x0415) __sfr TMR4; 426 427 __at(0x0416) __sfr PR4; 428 429 __at(0x0417) __sfr T4CON; 430 __at(0x0417) volatile __T4CONbits_t T4CONbits; 431 432 __at(0x0418) __sfr TMR5; 433 434 __at(0x0418) __sfr TMR5L; 435 436 __at(0x0419) __sfr TMR5H; 437 438 __at(0x041A) __sfr T5CON; 439 __at(0x041A) volatile __T5CONbits_t T5CONbits; 440 441 __at(0x041B) __sfr T5GCON; 442 __at(0x041B) volatile __T5GCONbits_t T5GCONbits; 443 444 __at(0x041C) __sfr TMR6; 445 446 __at(0x041D) __sfr PR6; 447 448 __at(0x041E) __sfr T6CON; 449 __at(0x041E) volatile __T6CONbits_t T6CONbits; 450 451 __at(0x041F) __sfr CCDCON; 452 __at(0x041F) volatile __CCDCONbits_t CCDCONbits; 453 454 __at(0x048C) __sfr CCDPA; 455 __at(0x048C) volatile __CCDPAbits_t CCDPAbits; 456 457 __at(0x048E) __sfr CCDPC; 458 __at(0x048E) volatile __CCDPCbits_t CCDPCbits; 459 460 __at(0x0498) __sfr NCO1ACC; 461 462 __at(0x0498) __sfr NCO1ACCL; 463 464 __at(0x0499) __sfr NCO1ACCH; 465 466 __at(0x049A) __sfr NCO1ACCU; 467 468 __at(0x049B) __sfr NCO1INC; 469 470 __at(0x049B) __sfr NCO1INCL; 471 472 __at(0x049C) __sfr NCO1INCH; 473 474 __at(0x049D) __sfr NCO1INCU; 475 476 __at(0x049E) __sfr NCO1CON; 477 __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits; 478 479 __at(0x049F) __sfr NCO1CLK; 480 481 __at(0x0617) __sfr PWM5DCL; 482 __at(0x0617) volatile __PWM5DCLbits_t PWM5DCLbits; 483 484 __at(0x0618) __sfr PWM5DCH; 485 __at(0x0618) volatile __PWM5DCHbits_t PWM5DCHbits; 486 487 __at(0x0619) __sfr PWM5CON; 488 __at(0x0619) volatile __PWM5CONbits_t PWM5CONbits; 489 490 __at(0x0619) __sfr PWM5CON0; 491 __at(0x0619) volatile __PWM5CON0bits_t PWM5CON0bits; 492 493 __at(0x061A) __sfr PWM6DCL; 494 __at(0x061A) volatile __PWM6DCLbits_t PWM6DCLbits; 495 496 __at(0x061B) __sfr PWM6DCH; 497 __at(0x061B) volatile __PWM6DCHbits_t PWM6DCHbits; 498 499 __at(0x061C) __sfr PWM6CON; 500 __at(0x061C) volatile __PWM6CONbits_t PWM6CONbits; 501 502 __at(0x061C) __sfr PWM6CON0; 503 __at(0x061C) volatile __PWM6CON0bits_t PWM6CON0bits; 504 505 __at(0x061F) __sfr PWMTMRS; 506 __at(0x061F) volatile __PWMTMRSbits_t PWMTMRSbits; 507 508 __at(0x0691) __sfr CWG1CLKCON; 509 __at(0x0691) volatile __CWG1CLKCONbits_t CWG1CLKCONbits; 510 511 __at(0x0692) __sfr CWG1DAT; 512 __at(0x0692) volatile __CWG1DATbits_t CWG1DATbits; 513 514 __at(0x0693) __sfr CWG1DBR; 515 __at(0x0693) volatile __CWG1DBRbits_t CWG1DBRbits; 516 517 __at(0x0694) __sfr CWG1DBF; 518 __at(0x0694) volatile __CWG1DBFbits_t CWG1DBFbits; 519 520 __at(0x0695) __sfr CWG1CON0; 521 __at(0x0695) volatile __CWG1CON0bits_t CWG1CON0bits; 522 523 __at(0x0696) __sfr CWG1CON1; 524 __at(0x0696) volatile __CWG1CON1bits_t CWG1CON1bits; 525 526 __at(0x0697) __sfr CWG1AS0; 527 __at(0x0697) volatile __CWG1AS0bits_t CWG1AS0bits; 528 529 __at(0x0698) __sfr CWG1AS1; 530 __at(0x0698) volatile __CWG1AS1bits_t CWG1AS1bits; 531 532 __at(0x0699) __sfr CWG1STR; 533 __at(0x0699) volatile __CWG1STRbits_t CWG1STRbits; 534 535 __at(0x0711) __sfr CWG2CLKCON; 536 __at(0x0711) volatile __CWG2CLKCONbits_t CWG2CLKCONbits; 537 538 __at(0x0712) __sfr CWG2DAT; 539 __at(0x0712) volatile __CWG2DATbits_t CWG2DATbits; 540 541 __at(0x0713) __sfr CWG2DBR; 542 __at(0x0713) volatile __CWG2DBRbits_t CWG2DBRbits; 543 544 __at(0x0714) __sfr CWG2DBF; 545 __at(0x0714) volatile __CWG2DBFbits_t CWG2DBFbits; 546 547 __at(0x0715) __sfr CWG2CON0; 548 __at(0x0715) volatile __CWG2CON0bits_t CWG2CON0bits; 549 550 __at(0x0716) __sfr CWG2CON1; 551 __at(0x0716) volatile __CWG2CON1bits_t CWG2CON1bits; 552 553 __at(0x0717) __sfr CWG2AS0; 554 __at(0x0717) volatile __CWG2AS0bits_t CWG2AS0bits; 555 556 __at(0x0718) __sfr CWG2AS1; 557 __at(0x0718) volatile __CWG2AS1bits_t CWG2AS1bits; 558 559 __at(0x0719) __sfr CWG2STR; 560 __at(0x0719) volatile __CWG2STRbits_t CWG2STRbits; 561 562 __at(0x0891) __sfr NVMADR; 563 564 __at(0x0891) __sfr NVMADRL; 565 __at(0x0891) volatile __NVMADRLbits_t NVMADRLbits; 566 567 __at(0x0892) __sfr NVMADRH; 568 __at(0x0892) volatile __NVMADRHbits_t NVMADRHbits; 569 570 __at(0x0893) __sfr NVMDAT; 571 572 __at(0x0893) __sfr NVMDATL; 573 __at(0x0893) volatile __NVMDATLbits_t NVMDATLbits; 574 575 __at(0x0894) __sfr NVMDATH; 576 __at(0x0894) volatile __NVMDATHbits_t NVMDATHbits; 577 578 __at(0x0895) __sfr NVMCON1; 579 __at(0x0895) volatile __NVMCON1bits_t NVMCON1bits; 580 581 __at(0x0896) __sfr NVMCON2; 582 583 __at(0x089B) __sfr PCON0; 584 __at(0x089B) volatile __PCON0bits_t PCON0bits; 585 586 __at(0x0911) __sfr PMD0; 587 __at(0x0911) volatile __PMD0bits_t PMD0bits; 588 589 __at(0x0912) __sfr PMD1; 590 __at(0x0912) volatile __PMD1bits_t PMD1bits; 591 592 __at(0x0913) __sfr PMD2; 593 __at(0x0913) volatile __PMD2bits_t PMD2bits; 594 595 __at(0x0914) __sfr PMD3; 596 __at(0x0914) volatile __PMD3bits_t PMD3bits; 597 598 __at(0x0915) __sfr PMD4; 599 __at(0x0915) volatile __PMD4bits_t PMD4bits; 600 601 __at(0x0916) __sfr PMD5; 602 __at(0x0916) volatile __PMD5bits_t PMD5bits; 603 604 __at(0x0918) __sfr CPUDOZE; 605 __at(0x0918) volatile __CPUDOZEbits_t CPUDOZEbits; 606 607 __at(0x0919) __sfr OSCCON1; 608 __at(0x0919) volatile __OSCCON1bits_t OSCCON1bits; 609 610 __at(0x091A) __sfr OSCCON2; 611 __at(0x091A) volatile __OSCCON2bits_t OSCCON2bits; 612 613 __at(0x091B) __sfr OSCCON3; 614 __at(0x091B) volatile __OSCCON3bits_t OSCCON3bits; 615 616 __at(0x091C) __sfr OSCSTAT1; 617 __at(0x091C) volatile __OSCSTAT1bits_t OSCSTAT1bits; 618 619 __at(0x091D) __sfr OSCEN; 620 __at(0x091D) volatile __OSCENbits_t OSCENbits; 621 622 __at(0x091E) __sfr OSCTUNE; 623 __at(0x091E) volatile __OSCTUNEbits_t OSCTUNEbits; 624 625 __at(0x091F) __sfr OSCFRQ; 626 __at(0x091F) volatile __OSCFRQbits_t OSCFRQbits; 627 628 __at(0x0E0F) __sfr PPSLOCK; 629 __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits; 630 631 __at(0x0E10) __sfr INTPPS; 632 __at(0x0E10) volatile __INTPPSbits_t INTPPSbits; 633 634 __at(0x0E11) __sfr T0CKIPPS; 635 __at(0x0E11) volatile __T0CKIPPSbits_t T0CKIPPSbits; 636 637 __at(0x0E12) __sfr T1CKIPPS; 638 __at(0x0E12) volatile __T1CKIPPSbits_t T1CKIPPSbits; 639 640 __at(0x0E13) __sfr T1GPPS; 641 __at(0x0E13) volatile __T1GPPSbits_t T1GPPSbits; 642 643 __at(0x0E14) __sfr CCP1PPS; 644 __at(0x0E14) volatile __CCP1PPSbits_t CCP1PPSbits; 645 646 __at(0x0E15) __sfr CCP2PPS; 647 __at(0x0E15) volatile __CCP2PPSbits_t CCP2PPSbits; 648 649 __at(0x0E16) __sfr CCP3PPS; 650 __at(0x0E16) volatile __CCP3PPSbits_t CCP3PPSbits; 651 652 __at(0x0E17) __sfr CCP4PPS; 653 __at(0x0E17) volatile __CCP4PPSbits_t CCP4PPSbits; 654 655 __at(0x0E18) __sfr CWG1PPS; 656 __at(0x0E18) volatile __CWG1PPSbits_t CWG1PPSbits; 657 658 __at(0x0E19) __sfr CWG2PPS; 659 __at(0x0E19) volatile __CWG2PPSbits_t CWG2PPSbits; 660 661 __at(0x0E1A) __sfr MDCIN1PPS; 662 __at(0x0E1A) volatile __MDCIN1PPSbits_t MDCIN1PPSbits; 663 664 __at(0x0E1B) __sfr MDCIN2PPS; 665 __at(0x0E1B) volatile __MDCIN2PPSbits_t MDCIN2PPSbits; 666 667 __at(0x0E1C) __sfr MDMINPPS; 668 __at(0x0E1C) volatile __MDMINPPSbits_t MDMINPPSbits; 669 670 __at(0x0E20) __sfr SSP1CLKPPS; 671 __at(0x0E20) volatile __SSP1CLKPPSbits_t SSP1CLKPPSbits; 672 673 __at(0x0E21) __sfr SSP1DATPPS; 674 __at(0x0E21) volatile __SSP1DATPPSbits_t SSP1DATPPSbits; 675 676 __at(0x0E22) __sfr SSP1SSPPS; 677 __at(0x0E22) volatile __SSP1SSPPSbits_t SSP1SSPPSbits; 678 679 __at(0x0E24) __sfr RXPPS; 680 __at(0x0E24) volatile __RXPPSbits_t RXPPSbits; 681 682 __at(0x0E25) __sfr TXPPS; 683 __at(0x0E25) volatile __TXPPSbits_t TXPPSbits; 684 685 __at(0x0E28) __sfr CLCIN0PPS; 686 __at(0x0E28) volatile __CLCIN0PPSbits_t CLCIN0PPSbits; 687 688 __at(0x0E29) __sfr CLCIN1PPS; 689 __at(0x0E29) volatile __CLCIN1PPSbits_t CLCIN1PPSbits; 690 691 __at(0x0E2A) __sfr CLCIN2PPS; 692 __at(0x0E2A) volatile __CLCIN2PPSbits_t CLCIN2PPSbits; 693 694 __at(0x0E2B) __sfr CLCIN3PPS; 695 __at(0x0E2B) volatile __CLCIN3PPSbits_t CLCIN3PPSbits; 696 697 __at(0x0E2C) __sfr T3CKIPPS; 698 699 __at(0x0E2D) __sfr T3GPPS; 700 701 __at(0x0E2E) __sfr T5CKIPPS; 702 703 __at(0x0E2F) __sfr T5GPPS; 704 705 __at(0x0E90) __sfr RA0PPS; 706 __at(0x0E90) volatile __RA0PPSbits_t RA0PPSbits; 707 708 __at(0x0E91) __sfr RA1PPS; 709 __at(0x0E91) volatile __RA1PPSbits_t RA1PPSbits; 710 711 __at(0x0E92) __sfr RA2PPS; 712 __at(0x0E92) volatile __RA2PPSbits_t RA2PPSbits; 713 714 __at(0x0E94) __sfr RA4PPS; 715 __at(0x0E94) volatile __RA4PPSbits_t RA4PPSbits; 716 717 __at(0x0E95) __sfr RA5PPS; 718 __at(0x0E95) volatile __RA5PPSbits_t RA5PPSbits; 719 720 __at(0x0EA0) __sfr RC0PPS; 721 __at(0x0EA0) volatile __RC0PPSbits_t RC0PPSbits; 722 723 __at(0x0EA1) __sfr RC1PPS; 724 __at(0x0EA1) volatile __RC1PPSbits_t RC1PPSbits; 725 726 __at(0x0EA2) __sfr RC2PPS; 727 __at(0x0EA2) volatile __RC2PPSbits_t RC2PPSbits; 728 729 __at(0x0EA3) __sfr RC3PPS; 730 __at(0x0EA3) volatile __RC3PPSbits_t RC3PPSbits; 731 732 __at(0x0EA4) __sfr RC4PPS; 733 __at(0x0EA4) volatile __RC4PPSbits_t RC4PPSbits; 734 735 __at(0x0EA5) __sfr RC5PPS; 736 __at(0x0EA5) volatile __RC5PPSbits_t RC5PPSbits; 737 738 __at(0x0F0F) __sfr CLCDATA; 739 __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits; 740 741 __at(0x0F10) __sfr CLC1CON; 742 __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits; 743 744 __at(0x0F11) __sfr CLC1POL; 745 __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits; 746 747 __at(0x0F12) __sfr CLC1SEL0; 748 __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits; 749 750 __at(0x0F13) __sfr CLC1SEL1; 751 __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits; 752 753 __at(0x0F14) __sfr CLC1SEL2; 754 __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits; 755 756 __at(0x0F15) __sfr CLC1SEL3; 757 __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits; 758 759 __at(0x0F16) __sfr CLC1GLS0; 760 __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits; 761 762 __at(0x0F17) __sfr CLC1GLS1; 763 __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits; 764 765 __at(0x0F18) __sfr CLC1GLS2; 766 __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits; 767 768 __at(0x0F19) __sfr CLC1GLS3; 769 __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits; 770 771 __at(0x0F1A) __sfr CLC2CON; 772 __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits; 773 774 __at(0x0F1B) __sfr CLC2POL; 775 __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits; 776 777 __at(0x0F1C) __sfr CLC2SEL0; 778 __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits; 779 780 __at(0x0F1D) __sfr CLC2SEL1; 781 __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits; 782 783 __at(0x0F1E) __sfr CLC2SEL2; 784 __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits; 785 786 __at(0x0F1F) __sfr CLC2SEL3; 787 __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits; 788 789 __at(0x0F20) __sfr CLC2GLS0; 790 __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits; 791 792 __at(0x0F21) __sfr CLC2GLS1; 793 __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits; 794 795 __at(0x0F22) __sfr CLC2GLS2; 796 __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits; 797 798 __at(0x0F23) __sfr CLC2GLS3; 799 __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits; 800 801 __at(0x0F24) __sfr CLC3CON; 802 __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits; 803 804 __at(0x0F25) __sfr CLC3POL; 805 __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits; 806 807 __at(0x0F26) __sfr CLC3SEL0; 808 __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits; 809 810 __at(0x0F27) __sfr CLC3SEL1; 811 __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits; 812 813 __at(0x0F28) __sfr CLC3SEL2; 814 __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits; 815 816 __at(0x0F29) __sfr CLC3SEL3; 817 __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits; 818 819 __at(0x0F2A) __sfr CLC3GLS0; 820 __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits; 821 822 __at(0x0F2B) __sfr CLC3GLS1; 823 __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits; 824 825 __at(0x0F2C) __sfr CLC3GLS2; 826 __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits; 827 828 __at(0x0F2D) __sfr CLC3GLS3; 829 __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits; 830 831 __at(0x0F2E) __sfr CLC4CON; 832 __at(0x0F2E) volatile __CLC4CONbits_t CLC4CONbits; 833 834 __at(0x0F2F) __sfr CLC4POL; 835 __at(0x0F2F) volatile __CLC4POLbits_t CLC4POLbits; 836 837 __at(0x0F30) __sfr CLC4SEL0; 838 __at(0x0F30) volatile __CLC4SEL0bits_t CLC4SEL0bits; 839 840 __at(0x0F31) __sfr CLC4SEL1; 841 __at(0x0F31) volatile __CLC4SEL1bits_t CLC4SEL1bits; 842 843 __at(0x0F32) __sfr CLC4SEL2; 844 __at(0x0F32) volatile __CLC4SEL2bits_t CLC4SEL2bits; 845 846 __at(0x0F33) __sfr CLC4SEL3; 847 __at(0x0F33) volatile __CLC4SEL3bits_t CLC4SEL3bits; 848 849 __at(0x0F34) __sfr CLC4GLS0; 850 __at(0x0F34) volatile __CLC4GLS0bits_t CLC4GLS0bits; 851 852 __at(0x0F35) __sfr CLC4GLS1; 853 __at(0x0F35) volatile __CLC4GLS1bits_t CLC4GLS1bits; 854 855 __at(0x0F36) __sfr CLC4GLS2; 856 __at(0x0F36) volatile __CLC4GLS2bits_t CLC4GLS2bits; 857 858 __at(0x0F37) __sfr CLC4GLS3; 859 __at(0x0F37) volatile __CLC4GLS3bits_t CLC4GLS3bits; 860 861 __at(0x0FE4) __sfr STATUS_SHAD; 862 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 863 864 __at(0x0FE5) __sfr WREG_SHAD; 865 866 __at(0x0FE6) __sfr BSR_SHAD; 867 868 __at(0x0FE7) __sfr PCLATH_SHAD; 869 870 __at(0x0FE8) __sfr FSR0L_SHAD; 871 872 __at(0x0FE9) __sfr FSR0H_SHAD; 873 874 __at(0x0FEA) __sfr FSR1L_SHAD; 875 876 __at(0x0FEB) __sfr FSR1H_SHAD; 877 878 __at(0x0FED) __sfr STKPTR; 879 880 __at(0x0FEE) __sfr TOSL; 881 882 __at(0x0FEF) __sfr TOSH; 883