1 /* 2 * This definitions of the PIC18LF2553 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:24:01 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #include <pic18lf2553.h> 26 27 //============================================================================== 28 29 __at(0x0F66) __sfr UFRM; 30 31 __at(0x0F66) __sfr UFRML; 32 __at(0x0F66) volatile __UFRMLbits_t UFRMLbits; 33 34 __at(0x0F67) __sfr UFRMH; 35 __at(0x0F67) volatile __UFRMHbits_t UFRMHbits; 36 37 __at(0x0F68) __sfr UIR; 38 __at(0x0F68) volatile __UIRbits_t UIRbits; 39 40 __at(0x0F69) __sfr UIE; 41 __at(0x0F69) volatile __UIEbits_t UIEbits; 42 43 __at(0x0F6A) __sfr UEIR; 44 __at(0x0F6A) volatile __UEIRbits_t UEIRbits; 45 46 __at(0x0F6B) __sfr UEIE; 47 __at(0x0F6B) volatile __UEIEbits_t UEIEbits; 48 49 __at(0x0F6C) __sfr USTAT; 50 __at(0x0F6C) volatile __USTATbits_t USTATbits; 51 52 __at(0x0F6D) __sfr UCON; 53 __at(0x0F6D) volatile __UCONbits_t UCONbits; 54 55 __at(0x0F6E) __sfr UADDR; 56 __at(0x0F6E) volatile __UADDRbits_t UADDRbits; 57 58 __at(0x0F6F) __sfr UCFG; 59 __at(0x0F6F) volatile __UCFGbits_t UCFGbits; 60 61 __at(0x0F70) __sfr UEP0; 62 __at(0x0F70) volatile __UEP0bits_t UEP0bits; 63 64 __at(0x0F71) __sfr UEP1; 65 __at(0x0F71) volatile __UEP1bits_t UEP1bits; 66 67 __at(0x0F72) __sfr UEP2; 68 __at(0x0F72) volatile __UEP2bits_t UEP2bits; 69 70 __at(0x0F73) __sfr UEP3; 71 __at(0x0F73) volatile __UEP3bits_t UEP3bits; 72 73 __at(0x0F74) __sfr UEP4; 74 __at(0x0F74) volatile __UEP4bits_t UEP4bits; 75 76 __at(0x0F75) __sfr UEP5; 77 __at(0x0F75) volatile __UEP5bits_t UEP5bits; 78 79 __at(0x0F76) __sfr UEP6; 80 __at(0x0F76) volatile __UEP6bits_t UEP6bits; 81 82 __at(0x0F77) __sfr UEP7; 83 __at(0x0F77) volatile __UEP7bits_t UEP7bits; 84 85 __at(0x0F78) __sfr UEP8; 86 __at(0x0F78) volatile __UEP8bits_t UEP8bits; 87 88 __at(0x0F79) __sfr UEP9; 89 __at(0x0F79) volatile __UEP9bits_t UEP9bits; 90 91 __at(0x0F7A) __sfr UEP10; 92 __at(0x0F7A) volatile __UEP10bits_t UEP10bits; 93 94 __at(0x0F7B) __sfr UEP11; 95 __at(0x0F7B) volatile __UEP11bits_t UEP11bits; 96 97 __at(0x0F7C) __sfr UEP12; 98 __at(0x0F7C) volatile __UEP12bits_t UEP12bits; 99 100 __at(0x0F7D) __sfr UEP13; 101 __at(0x0F7D) volatile __UEP13bits_t UEP13bits; 102 103 __at(0x0F7E) __sfr UEP14; 104 __at(0x0F7E) volatile __UEP14bits_t UEP14bits; 105 106 __at(0x0F7F) __sfr UEP15; 107 __at(0x0F7F) volatile __UEP15bits_t UEP15bits; 108 109 __at(0x0F80) __sfr PORTA; 110 __at(0x0F80) volatile __PORTAbits_t PORTAbits; 111 112 __at(0x0F81) __sfr PORTB; 113 __at(0x0F81) volatile __PORTBbits_t PORTBbits; 114 115 __at(0x0F82) __sfr PORTC; 116 __at(0x0F82) volatile __PORTCbits_t PORTCbits; 117 118 __at(0x0F84) __sfr PORTE; 119 __at(0x0F84) volatile __PORTEbits_t PORTEbits; 120 121 __at(0x0F89) __sfr LATA; 122 __at(0x0F89) volatile __LATAbits_t LATAbits; 123 124 __at(0x0F8A) __sfr LATB; 125 __at(0x0F8A) volatile __LATBbits_t LATBbits; 126 127 __at(0x0F8B) __sfr LATC; 128 __at(0x0F8B) volatile __LATCbits_t LATCbits; 129 130 __at(0x0F92) __sfr DDRA; 131 __at(0x0F92) volatile __DDRAbits_t DDRAbits; 132 133 __at(0x0F92) __sfr TRISA; 134 __at(0x0F92) volatile __TRISAbits_t TRISAbits; 135 136 __at(0x0F93) __sfr DDRB; 137 __at(0x0F93) volatile __DDRBbits_t DDRBbits; 138 139 __at(0x0F93) __sfr TRISB; 140 __at(0x0F93) volatile __TRISBbits_t TRISBbits; 141 142 __at(0x0F94) __sfr DDRC; 143 __at(0x0F94) volatile __DDRCbits_t DDRCbits; 144 145 __at(0x0F94) __sfr TRISC; 146 __at(0x0F94) volatile __TRISCbits_t TRISCbits; 147 148 __at(0x0F9B) __sfr OSCTUNE; 149 __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits; 150 151 __at(0x0F9D) __sfr PIE1; 152 __at(0x0F9D) volatile __PIE1bits_t PIE1bits; 153 154 __at(0x0F9E) __sfr PIR1; 155 __at(0x0F9E) volatile __PIR1bits_t PIR1bits; 156 157 __at(0x0F9F) __sfr IPR1; 158 __at(0x0F9F) volatile __IPR1bits_t IPR1bits; 159 160 __at(0x0FA0) __sfr PIE2; 161 __at(0x0FA0) volatile __PIE2bits_t PIE2bits; 162 163 __at(0x0FA1) __sfr PIR2; 164 __at(0x0FA1) volatile __PIR2bits_t PIR2bits; 165 166 __at(0x0FA2) __sfr IPR2; 167 __at(0x0FA2) volatile __IPR2bits_t IPR2bits; 168 169 __at(0x0FA6) __sfr EECON1; 170 __at(0x0FA6) volatile __EECON1bits_t EECON1bits; 171 172 __at(0x0FA7) __sfr EECON2; 173 174 __at(0x0FA8) __sfr EEDATA; 175 176 __at(0x0FA9) __sfr EEADR; 177 178 __at(0x0FAB) __sfr RCSTA; 179 __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits; 180 181 __at(0x0FAC) __sfr TXSTA; 182 __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits; 183 184 __at(0x0FAD) __sfr TXREG; 185 186 __at(0x0FAE) __sfr RCREG; 187 188 __at(0x0FAF) __sfr SPBRG; 189 190 __at(0x0FB0) __sfr SPBRGH; 191 192 __at(0x0FB1) __sfr T3CON; 193 __at(0x0FB1) volatile __T3CONbits_t T3CONbits; 194 195 __at(0x0FB2) __sfr TMR3; 196 197 __at(0x0FB2) __sfr TMR3L; 198 199 __at(0x0FB3) __sfr TMR3H; 200 201 __at(0x0FB4) __sfr CMCON; 202 __at(0x0FB4) volatile __CMCONbits_t CMCONbits; 203 204 __at(0x0FB5) __sfr CVRCON; 205 __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits; 206 207 __at(0x0FB6) __sfr CCP1AS; 208 __at(0x0FB6) volatile __CCP1ASbits_t CCP1ASbits; 209 210 __at(0x0FB6) __sfr ECCP1AS; 211 __at(0x0FB6) volatile __ECCP1ASbits_t ECCP1ASbits; 212 213 __at(0x0FB7) __sfr CCP1DEL; 214 __at(0x0FB7) volatile __CCP1DELbits_t CCP1DELbits; 215 216 __at(0x0FB7) __sfr ECCP1DEL; 217 __at(0x0FB7) volatile __ECCP1DELbits_t ECCP1DELbits; 218 219 __at(0x0FB8) __sfr BAUDCON; 220 __at(0x0FB8) volatile __BAUDCONbits_t BAUDCONbits; 221 222 __at(0x0FB8) __sfr BAUDCTL; 223 __at(0x0FB8) volatile __BAUDCTLbits_t BAUDCTLbits; 224 225 __at(0x0FBA) __sfr CCP2CON; 226 __at(0x0FBA) volatile __CCP2CONbits_t CCP2CONbits; 227 228 __at(0x0FBB) __sfr CCPR2; 229 230 __at(0x0FBB) __sfr CCPR2L; 231 232 __at(0x0FBC) __sfr CCPR2H; 233 234 __at(0x0FBD) __sfr CCP1CON; 235 __at(0x0FBD) volatile __CCP1CONbits_t CCP1CONbits; 236 237 __at(0x0FBE) __sfr CCPR1; 238 239 __at(0x0FBE) __sfr CCPR1L; 240 241 __at(0x0FBF) __sfr CCPR1H; 242 243 __at(0x0FC0) __sfr ADCON2; 244 __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits; 245 246 __at(0x0FC1) __sfr ADCON1; 247 __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits; 248 249 __at(0x0FC2) __sfr ADCON0; 250 __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits; 251 252 __at(0x0FC3) __sfr ADRES; 253 254 __at(0x0FC3) __sfr ADRESL; 255 256 __at(0x0FC4) __sfr ADRESH; 257 258 __at(0x0FC5) __sfr SSPCON2; 259 __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits; 260 261 __at(0x0FC6) __sfr SSPCON1; 262 __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits; 263 264 __at(0x0FC7) __sfr SSPSTAT; 265 __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits; 266 267 __at(0x0FC8) __sfr SSPADD; 268 269 __at(0x0FC9) __sfr SSPBUF; 270 271 __at(0x0FCA) __sfr T2CON; 272 __at(0x0FCA) volatile __T2CONbits_t T2CONbits; 273 274 __at(0x0FCB) __sfr PR2; 275 276 __at(0x0FCC) __sfr TMR2; 277 278 __at(0x0FCD) __sfr T1CON; 279 __at(0x0FCD) volatile __T1CONbits_t T1CONbits; 280 281 __at(0x0FCE) __sfr TMR1; 282 283 __at(0x0FCE) __sfr TMR1L; 284 285 __at(0x0FCF) __sfr TMR1H; 286 287 __at(0x0FD0) __sfr RCON; 288 __at(0x0FD0) volatile __RCONbits_t RCONbits; 289 290 __at(0x0FD1) __sfr WDTCON; 291 __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits; 292 293 __at(0x0FD2) __sfr HLVDCON; 294 __at(0x0FD2) volatile __HLVDCONbits_t HLVDCONbits; 295 296 __at(0x0FD2) __sfr LVDCON; 297 __at(0x0FD2) volatile __LVDCONbits_t LVDCONbits; 298 299 __at(0x0FD3) __sfr OSCCON; 300 __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits; 301 302 __at(0x0FD5) __sfr T0CON; 303 __at(0x0FD5) volatile __T0CONbits_t T0CONbits; 304 305 __at(0x0FD6) __sfr TMR0; 306 307 __at(0x0FD6) __sfr TMR0L; 308 309 __at(0x0FD7) __sfr TMR0H; 310 311 __at(0x0FD8) __sfr STATUS; 312 __at(0x0FD8) volatile __STATUSbits_t STATUSbits; 313 314 __at(0x0FD9) __sfr FSR2L; 315 316 __at(0x0FDA) __sfr FSR2H; 317 318 __at(0x0FDB) __sfr PLUSW2; 319 320 __at(0x0FDC) __sfr PREINC2; 321 322 __at(0x0FDD) __sfr POSTDEC2; 323 324 __at(0x0FDE) __sfr POSTINC2; 325 326 __at(0x0FDF) __sfr INDF2; 327 328 __at(0x0FE0) __sfr BSR; 329 330 __at(0x0FE1) __sfr FSR1L; 331 332 __at(0x0FE2) __sfr FSR1H; 333 334 __at(0x0FE3) __sfr PLUSW1; 335 336 __at(0x0FE4) __sfr PREINC1; 337 338 __at(0x0FE5) __sfr POSTDEC1; 339 340 __at(0x0FE6) __sfr POSTINC1; 341 342 __at(0x0FE7) __sfr INDF1; 343 344 __at(0x0FE8) __sfr WREG; 345 346 __at(0x0FE9) __sfr FSR0L; 347 348 __at(0x0FEA) __sfr FSR0H; 349 350 __at(0x0FEB) __sfr PLUSW0; 351 352 __at(0x0FEC) __sfr PREINC0; 353 354 __at(0x0FED) __sfr POSTDEC0; 355 356 __at(0x0FEE) __sfr POSTINC0; 357 358 __at(0x0FEF) __sfr INDF0; 359 360 __at(0x0FF0) __sfr INTCON3; 361 __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits; 362 363 __at(0x0FF1) __sfr INTCON2; 364 __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits; 365 366 __at(0x0FF2) __sfr INTCON; 367 __at(0x0FF2) volatile __INTCONbits_t INTCONbits; 368 369 __at(0x0FF3) __sfr PROD; 370 371 __at(0x0FF3) __sfr PRODL; 372 373 __at(0x0FF4) __sfr PRODH; 374 375 __at(0x0FF5) __sfr TABLAT; 376 377 __at(0x0FF6) __sfr TBLPTR; 378 379 __at(0x0FF6) __sfr TBLPTRL; 380 381 __at(0x0FF7) __sfr TBLPTRH; 382 383 __at(0x0FF8) __sfr TBLPTRU; 384 385 __at(0x0FF9) __sfr PC; 386 387 __at(0x0FF9) __sfr PCL; 388 389 __at(0x0FFA) __sfr PCLATH; 390 391 __at(0x0FFB) __sfr PCLATU; 392 393 __at(0x0FFC) __sfr STKPTR; 394 __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits; 395 396 __at(0x0FFD) __sfr TOS; 397 398 __at(0x0FFD) __sfr TOSL; 399 400 __at(0x0FFE) __sfr TOSH; 401 402 __at(0x0FFF) __sfr TOSU; 403