1 /* FPU control word bits. C-SKY version. 2 Copyright (C) 2018-2021 Free Software Foundation, Inc. 3 This file is part of the GNU C Library. 4 5 The GNU C Library is free software; you can redistribute it and/or 6 modify it under the terms of the GNU Lesser General Public 7 License as published by the Free Software Foundation; either 8 version 2.1 of the License, or (at your option) any later version. 9 10 The GNU C Library is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 Lesser General Public License for more details. 14 15 You should have received a copy of the GNU Lesser General Public 16 License along with the GNU C Library. If not, see 17 <https://www.gnu.org/licenses/>. */ 18 19 #ifndef _FPU_CONTROL_H 20 #define _FPU_CONTROL_H 21 22 /* C-SKY FPU floating point control register bits. 23 24 31-28 -> Reserved (read as 0, write with 0). 25 27 -> 0: Flush denormalized results to zero. 26 1: Flush denormalized results to signed minimal normal number. 27 26 -> Reserved (read as 0, write with 0). 28 25-24 -> Rounding control. 29 23-6 -> Reserved (read as 0, write with 0). 30 5 -> Enable exception for input denormalized exception. 31 4 -> Enable exception for inexact exception. 32 3 -> Enable exception for underflow exception. 33 2 -> Enable exception for overflow exception. 34 1 -> Enable exception for division by zero exception. 35 0 -> Enable exception for invalid operation exception. 36 37 Rounding Control: 38 00 - Rounding to nearest (RN). 39 01 - Rounding toward zero (RZ). 40 10 - Rounding (up) toward plus infinity (RP). 41 11 - Rounding (down)toward minus infinity (RM). 42 43 C-SKY FPU floating point exception status register bits. 44 45 15 -> Accumulate bit for any exception. 46 14 -> Reserved (read as 0, write with 0). 47 13 -> Cause bit for input denormalized exception. 48 12 -> Cause bit for inexact exception. 49 11 -> Cause bit for underflow exception. 50 10 -> Cause bit for overflow exception. 51 9 -> Cause bit for division by zero exception. 52 8 -> Cause bit for invalid operation exception. 53 7 -> Flag bit for any exception. 54 6 -> Reserved (read as 0, write with 0). 55 5 -> Flag exception for input denormalized exception. 56 4 -> Flag exception for inexact exception. 57 3 -> Flag exception for underflow exception. 58 2 -> Flag exception for overflow exception. 59 1 -> Flag exception for division by zero exception. 60 0 -> Flag exception for invalid operation exception. */ 61 62 #include <features.h> 63 64 #ifdef __csky_soft_float__ 65 66 # define _FPU_RESERVED 0xffffffff 67 # define _FPU_DEFAULT 0x00000000 68 typedef unsigned int fpu_control_t; 69 # define _FPU_GETCW(cw) (cw) = 0 70 # define _FPU_SETCW(cw) (void) (cw) 71 # define _FPU_GETFPSR(cw) (cw) = 0 72 # define _FPU_SETFPSR(cw) (void) (cw) 73 extern fpu_control_t __fpu_control; 74 75 #else /* __csky_soft_float__ */ 76 77 /* Masking of interrupts. */ 78 # define _FPU_MASK_IDE (1 << 5) /* Input denormalized exception. */ 79 # define _FPU_MASK_IXE (1 << 4) /* Inexact exception. */ 80 # define _FPU_MASK_UFE (1 << 3) /* Underflow exception. */ 81 # define _FPU_MASK_OFE (1 << 2) /* Overflow exception. */ 82 # define _FPU_MASK_DZE (1 << 1) /* Division by zero exception. */ 83 # define _FPU_MASK_IOE (1 << 0) /* Invalid operation exception. */ 84 85 # define _FPU_MASK_FEA (1 << 15) /* Case for any exception. */ 86 # define _FPU_MASK_FEC (1 << 7) /* Flag for any exception. */ 87 88 /* Flush denormalized numbers to zero. */ 89 # define _FPU_FLUSH_TZ 0x8000000 90 91 /* Rounding control. */ 92 # define _FPU_RC_NEAREST (0x0 << 24) /* RECOMMENDED. */ 93 # define _FPU_RC_ZERO (0x1 << 24) 94 # define _FPU_RC_UP (0x2 << 24) 95 # define _FPU_RC_DOWN (0x3 << 24) 96 97 # define _FPU_RESERVED 0xf460ffc0 /* Reserved bits in cw. */ 98 # define _FPU_FPSR_RESERVED 0xffff4040 99 100 /* The fdlibm code requires strict IEEE double precision arithmetic, 101 and no interrupts for exceptions, rounding to nearest. */ 102 103 # define _FPU_DEFAULT 0x00000000 104 # define _FPU_FPSR_DEFAULT 0x00000000 105 106 /* IEEE: same as above, but exceptions. */ 107 # define _FPU_FPCR_IEEE 0x0000001F 108 # define _FPU_FPSR_IEEE 0x00000000 109 110 /* Type of the control word. */ 111 typedef unsigned int fpu_control_t; 112 113 /* Macros for accessing the hardware control word. */ 114 # if (__CSKY__ == 2) 115 # define _FPU_GETCW(cw) __asm__ volatile ("mfcr %0, cr<1, 2>" : "=a" (cw)) 116 # define _FPU_SETCW(cw) __asm__ volatile ("mtcr %0, cr<1, 2>" : : "a" (cw)) 117 # define _FPU_GETFPSR(cw) __asm__ volatile ("mfcr %0, cr<2, 2>" : "=a" (cw)) 118 # define _FPU_SETFPSR(cw) __asm__ volatile ("mtcr %0, cr<2, 2>" : : "a" (cw)) 119 # else 120 # define _FPU_GETCW(cw) __asm__ volatile ("1: cprcr %0, cpcr2 \n" \ 121 " btsti %0, 31 \n" \ 122 " bt 1b \n" \ 123 " cprcr %0, cpcr1\n" : "=b" (cw)) 124 125 # define _FPU_SETCW(cw) __asm__ volatile ("1: cprcr r7, cpcr2 \n" \ 126 " btsti r7, 31 \n" \ 127 " bt 1b \n" \ 128 " cpwcr %0, cpcr1 \n" \ 129 : : "b" (cw) : "r7") 130 131 # define _FPU_GETFPSR(cw) __asm__ volatile ("1: cprcr %0, cpcr2 \n" \ 132 " btsti %0, 31 \n" \ 133 " bt 1b \n" \ 134 " cprcr %0, cpcr4\n" : "=b" (cw)) 135 136 # define _FPU_SETFPSR(cw) __asm__ volatile ("1: cprcr r7, cpcr2 \n" \ 137 " btsti r7, 31 \n" \ 138 " bt 1b \n" \ 139 " cpwcr %0, cpcr4 \n" \ 140 : : "b" (cw) : "r7") 141 # endif /* __CSKY__ != 2 */ 142 143 /* Default control word set at startup. */ 144 extern fpu_control_t __fpu_control; 145 146 #endif /* !__csky_soft_float__ */ 147 148 #endif /* fpu_control.h */