1 ;; ccp_628.asm 2 ;; 3 ;; This program attempts to test gpsim for correct behaviour of 4 ;; TMR1 and the CCP module on a 16F628. Specifically it is looking 5 ;; for a number of bugs that have crept in from time to time. 6 ;; 7 ;; Here are the tests performed: 8 ;; 9 ;; -- TMR1 can be pre-loaded while disabled and doesn't get "reset" on enable 10 ;; -- TMR1 driven Fosc/4 with prescale of 1 counts correctly 11 ;; -- TMR1 stops counting while disabled, as assessed once enabled again 12 ;; -- TMR1L and TMR1H contain the correct values when the CCP compare mode trips 13 ;; -- CCP1 in output compare mode actually drives the output pin 14 15 list p=16f628 16 include "p16f628.inc" 17 include "coff.inc" 18 19ifndef _CPD_OFF 20#define _CPD_OFF _DATA_CP_OFF 21endif 22 __CONFIG _CP_OFF & _CPD_OFF & _BODEN_ON & _MCLRE_OFF & _PWRTE_ON & _WDT_OFF & _INTRC_OSC_NOCLKOUT & _LVP_OFF 23 24 cblock 0x30 25 time_l 26 time_h 27 failures 28 endc 29 30 org 0 31 goto main 32 33 org 4 34isr: 35 .assert "tmr1l == 0x81 && tmr1h == 0x02, '*** FAILED TMR1 value does not match CCP'" 36 nop 37 38 btfss PORTB,3 39 .assert "'*** FAILED CCP1 output compare does not set pin'" 40 bsf PORTB,7 ; external indication of problem 41 42 bcf PIR1,CCP1IF 43 clrf CCP1CON 44 retfie 45 46 47main: 48 .sim "break c 0x10000" 49 banksel TRISB 50 movlw 0x00 51 movwf TRISB 52 bsf PIE1,CCP1IE 53 bsf INTCON,PEIE 54 55 banksel PORTB 56 clrf PORTB 57 58; Disable timer 1 59 bcf T1CON, TMR1ON 60 61 movlw 0x34 62 movwf TMR1L 63 movlw 0x12 64 movwf TMR1H 65 66; counter is set to 0x1234 - works 67 movf TMR1L,w 68 nop 69 .assert "W == 0x34, '*** FAILED 14bit TMR1 cannot write TMR1L'" 70 nop 71 72 movf TMR1H,w 73 nop 74 .assert "W == 0x12, '*** FAILED 14bit TMR1 cannot write TMR1H'" 75 76 nop 77 78; Enable timer 1 79 bsf T1CON, TMR1ON 80 81 .assert "(tmr1l == 0x35 && tmr1h == 0x12), '*** FAILED 14bit TMR1 value change on enable'" 82 nop 83 84 bcf T1CON,TMR1ON 85 movf TMR1H,w 86 movwf time_h 87 movf TMR1L,w 88 movwf time_l 89 .assert "W == 0x36, '*** FAILED 14bit TMR1 not running'" 90 nop 91 nop 92 nop 93 nop 94 95 bsf T1CON, TMR1ON 96 movf TMR1L,w 97 subwf time_l,w 98 99 .assert "W == 0xFF, '*** FAILED 14bit TMR1 keeps counting while disabled ***'" 100 nop 101; 102; test t0 running after wakeup from sleep by t1 103; 104 banksel OPTION_REG 105 bsf OPTION_REG,PSA ; bypass precounter 106 bcf OPTION_REG,T0CS 107 bsf PIE1,TMR1IE ; turn on interrupt 108 bcf INTCON,GIE 109 banksel T1CON 110 bsf T1CON,NOT_T1SYNC ;sync off 111 bsf T1CON,TMR1ON ; start timer 1 112 sleep 113 movf TMR0,W 114 bcf T1CON,NOT_T1SYNC ;sync off 115 bcf PIR1,TMR1IF 116 nop 117 nop 118 .assert "tmr0 != W, '*** FAILED CCP_628 test- TMR0 stopped after sleep'" 119 nop 120 121 122 clrf TMR1L 123 clrf TMR1H 124 125 movlw 0x7F 126 movwf CCPR1L 127 movlw 0x02 128 movwf CCPR1H 129 movlw 0x08 130 movwf CCP1CON 131 132 nop 133 btfsc PORTB,3 134 .assert "'*** FAILED CCP_628 output set too soon'" 135 nop 136 bsf PORTB,6 137 138 bsf INTCON,PEIE 139 bsf INTCON,GIE 140 141 clrf time_l 142dly1: 143 nop 144 nop 145 decfsz time_l,F 146 goto dly1 147 148 .assert "ccp1con == 0, '*** FAILED CCP_628 event not triggered'" 149 150 nop 151done: 152 .assert "'*** PASSED 16F628 TMR1 & CCP test'" 153 goto $ 154 155failed: 156 movlw 1 157 movwf failures 158 .assert "'*** FAILED 16F628 TMR1 & CCP test'" 159 goto done 160 161 end 162