1 /* $NetBSD: mcp23s17.h,v 1.1 2014/04/06 17:59:39 kardel Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank Kardel. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 #ifndef MCP23S17_H 32 #define MCP23S17_H 33 34 /* 35 * SPI connected 16-bit general purpose parallel I/O 36 * 37 * see http://ww1.microchip.com/downloads/en/DeviceDoc/21952b.pdf 38 */ 39 40 /* resources */ 41 #define MCP23x17_GPIO_NPINS 16 42 #define MCP23x17_GPIO_NPINS_MASK (MCP23x17_GPIO_NPINS-1) 43 44 /* address layout */ 45 #define MCP23x17_BANKADDR(BANK, ADDR, PORT) (((BANK) == 1) ? ((PORT) << 4 | (ADDR)) : ((ADDR)<<1 | (PORT))) 46 47 #define MCP23x17_IODIR(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x0, PORT) 48 #define MCP23x17_IODIRA(BANK) MCP23x17_IODIR(BANK, 0) 49 #define MCP23x17_IODIRB(BANK) MCP23x17_IODIR(BANK, 1) 50 #define MCP23x17_IPOL(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x1, PORT) 51 #define MCP23x17_IPOLA(BANK) MCP23x17_IPOL(BANK, 0) 52 #define MCP23x17_IPOLB(BANK) MCP23x17_IPOL(BANK, 1) 53 #define MCP23x17_GPINTEN(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x2, PORT) 54 #define MCP23x17_GPINTENA(BANK) MCP23x17_GPINTEN(BANK, 0) 55 #define MCP23x17_GPINTENB(BANK) MCP23x17_GPINTEN(BANK, 1) 56 #define MCP23x17_DEFVAL(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x3, PORT) 57 #define MCP23x17_DEFVALA(BANK) MCP23x17_DEFVAL(BANK, 0) 58 #define MCP23x17_DEFVALB(BANK) MCP23x17_DEFVAL(BANK, 1) 59 #define MCP23x17_INTCON(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x4, PORT) 60 #define MCP23x17_INTCONA(BANK) MCP23x17_INTCON(BANK, 0) 61 #define MCP23x17_INTCONB(BANK) MCP23x17_INTCON(BANK, 0) 62 #define MCP23x17_IOCON(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x5, PORT) 63 #define MCP23x17_IOCONA(BANK) MCP23x17_IOCON(BANK, 0) 64 #define MCP23x17_IOCONB(BANK) MCP23x17_IOCON(BANK, 1) 65 #define MCP23x17_GPPU(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x6, PORT) 66 #define MCP23x17_GPPUA(BANK) MCP23x17_GPPU(BANK, 0) 67 #define MCP23x17_GPPUB(BANK) MCP23x17_GPPU(BANK, 1) 68 #define MCP23x17_INTF(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x7, PORT) 69 #define MCP23x17_INTFA(BANK) MCP23x17_INTF(BANK, 0) 70 #define MCP23x17_INTFB(BANK) MCP23x17_INTF(BANK, 1) 71 #define MCP23x17_INTCAP(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x8, PORT) 72 #define MCP23x17_INTCAPA(BANK) MCP23x17_INTCAP(BANK, 0) 73 #define MCP23x17_INTCAPB(BANK) MCP23x17_INTCAP(BANK, 1) 74 #define MCP23x17_GPIO(BANK, PORT) MCP23x17_BANKADDR(BANK, 0x9, PORT) 75 #define MCP23x17_GPIOA(BANK) MCP23x17_GPIO(BANK, 0) 76 #define MCP23x17_GPIOB(BANK) MCP23x17_GPIO(BANK, 1) 77 #define MCP23x17_OLAT(BANK, PORT) MCP23x17_BANKADDR(BANK, 0xA, PORT) 78 #define MCP23x17_OLATA(BANK) MCP23x17_OLAT(BANK, 0) 79 #define MCP23x17_OLATB(BANK) MCP23x17_OLAT(BANK, 1) 80 81 /* commands */ 82 #define MCP23x17_OP_BASE_WR 0x40 /* write register */ 83 #define MCP23x17_OP_BASE_RD 0x41 /* read register */ 84 #define MCP23x17_OP_READ(HA) (MCP23x17_OP_BASE_RD|(HA)<<1) 85 #define MCP23x17_OP_WRITE(HA) (MCP23x17_OP_BASE_WR|(HA)<<1) 86 87 /* bits */ 88 #define MCP23x17_IOCON_BANK __BIT(7) /* select address layout */ 89 #define MCP23x17_IOCON_MIRROR __BIT(6) /* mirror INTA/INTB interrupt outputs */ 90 #define MCP23x17_IOCON_SEQOP __BIT(5) /* sequential address operation */ 91 #define MCP23x17_IOCON_DISLW __BIT(4) /* slew rate SDA output */ 92 #define MCP23x17_IOCON_HAEN __BIT(3) /* hardware address enable bit (only MCP23S17) */ 93 #define MCP23x17_IOCON_ODR __BIT(2) /* configure INT pin as open drain */ 94 #define MCP23x17_IOCON_INTPOL __BIT(1) /* INT pin polarity (unless ODR is set) */ 95 96 #endif 97