1 /* 2 * Copyright (c) 2009-2019, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file renderhal.h 24 //! \brief 25 //! 26 //! 27 //! \file renderhal.h 28 //! \brief Render Engine Interfaces shared across platforms 29 //! \details Platform Independent Hardware Interfaces 30 //! 31 #ifndef __RENDERHAL_H__ 32 #define __RENDERHAL_H__ 33 34 #include "mos_os.h" // Interface to OS functions 35 #include "mhw_state_heap.h" 36 #include "mhw_render.h" 37 38 #include "renderhal_dsh.h" 39 #include "mhw_memory_pool.h" 40 #include "cm_hal_hashtable.h" 41 #include "media_perf_profiler.h" 42 43 #include "frame_tracker.h" 44 45 46 class XRenderHal_Platform_Interface; 47 48 //------------------------------------------------------------------------------ 49 // Macros specific to RenderHal sub-comp 50 //------------------------------------------------------------------------------ 51 #define MHW_RENDERHAL_ASSERT(_expr) \ 52 MOS_ASSERT(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _expr) 53 54 #define MHW_RENDERHAL_ASSERTMESSAGE(_message, ...) \ 55 MOS_ASSERTMESSAGE(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _message, ##__VA_ARGS__) 56 57 #define MHW_RENDERHAL_NORMALMESSAGE(_message, ...) \ 58 MOS_NORMALMESSAGE(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _message, ##__VA_ARGS__) 59 60 #define MHW_RENDERHAL_VERBOSEMESSAGE(_message, ...) \ 61 MOS_VERBOSEMESSAGE(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _message, ##__VA_ARGS__) 62 63 #define MHW_RENDERHAL_FUNCTION_ENTER \ 64 MOS_FUNCTION_ENTER(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL) 65 66 #define MHW_RENDERHAL_FUNCTION_EXIT \ 67 MOS_FUNCTION_EXIT(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, eStatus) 68 69 #define MHW_RENDERHAL_CHK_STATUS(_stmt) \ 70 MOS_CHK_STATUS(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _stmt) 71 72 #define MHW_RENDERHAL_CHK_STATUS_MESSAGE(_stmt, _message, ...) \ 73 MOS_CHK_STATUS_MESSAGE(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _stmt, _message, ##__VA_ARGS__) 74 75 #define MHW_RENDERHAL_CHK_NULL(_ptr) \ 76 MOS_CHK_NULL(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _ptr) 77 78 #define MHW_RENDERHAL_CHK_NULL_NO_STATUS(_ptr) \ 79 MOS_CHK_NULL_NO_STATUS(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _ptr) 80 81 #define MHW_RENDERHAL_CHK_NULL_NO_STATUS_RETURN(_ptr) \ 82 MOS_CHK_NULL_NO_STATUS_RETURN(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _ptr) 83 84 #define MHW_RENDERHAL_CHK_NULL_RETURN(_ptr) \ 85 MOS_CHK_NULL_RETURN(MOS_COMPONENT_CM, MOS_CM_SUBCOMP_RENDERHAL, _ptr) 86 87 88 #define MHW_RENDERHAL_UNUSED(x) \ 89 MOS_UNUSED(x) 90 91 //! 92 //! \brief Kernel allocation control 93 //! 94 #define RENDERHAL_KERNEL_LOAD_FAIL -1 95 #define RENDERHAL_KERNEL_ALLOCATION_FREE 0 // Kernel entry free 96 #define RENDERHAL_KERNEL_ALLOCATION_USED 1 // Kernel entry in use 97 #define RENDERHAL_KERNEL_ALLOCATION_LOCKED 2 // Kernel entry locked (no garbage collection) 98 #define RENDERHAL_KERNEL_ALLOCATION_REMOVED 3 // Kernel entry in use, but no longer loaded in ISH to make room for others 99 #define RENDERHAL_KERNEL_ALLOCATION_LOADING 4 // Kernel selected to be loaded (was stale or used) 100 #define RENDERHAL_KERNEL_ALLOCATION_STALE 5 // Kernel memory block became invalid, needs to be reloaded 101 102 //! 103 //! \brief SSH defaults and limits 104 //! 105 #define RENDERHAL_SSH_INSTANCES 16 106 #define RENDERHAL_SSH_INSTANCES_MAX 64 107 108 #define RENDERHAL_SSH_BINDING_TABLES 1 109 #define RENDERHAL_SSH_BINDING_TABLES_MIN 1 110 #define RENDERHAL_SSH_BINDING_TABLES_MAX 16 111 #define RENDERHAL_SSH_BINDING_TABLE_ALIGN 64 112 113 #define RENDERHAL_SSH_SURFACE_STATES 40 114 #define RENDERHAL_SSH_SURFACE_STATES_MIN 16 115 #define RENDERHAL_SSH_SURFACE_STATES_MAX 256 116 117 #define RENDERHAL_SSH_SURFACES_PER_BT 64 118 #define RENDERHAL_SSH_SURFACES_PER_BT_MIN 4 119 #define RENDERHAL_SSH_SURFACES_PER_BT_MAX 256 120 121 //! 122 //! \brief Default size of area for sync, debugging, performance collecting 123 //! 124 #define RENDERHAL_SYNC_SIZE_MIN 128 125 #define RENDERHAL_SYNC_SIZE_MAX 4096 126 #define RENDERHAL_SYNC_SIZE 128 127 128 //! 129 //! \brief Default number of media states (Dynamic GSH mode) 130 //! 131 #define RENDERHAL_MEDIA_STATES 16 132 133 //! 134 //! \brief Default number of media IDs 135 //! 136 #define RENDERHAL_MEDIA_IDS 16 137 138 //! 139 //! \brief Max URB Size 140 //! 141 #define RENDERHAL_URB_SIZE_MAX 2048 142 143 //! 144 //! \brief Interface Descriptor Entries 145 //! 146 #define RENDERHAL_INTERFACE_DESCRIPTOR_ENTRIES_MAX 64 147 148 //! 149 //! \brief Max URB Entry Size 150 //! 151 #define RENDERHAL_URB_ENTRY_SIZE_MAX (RENDERHAL_URB_SIZE_MAX - RENDERHAL_INTERFACE_DESCRIPTOR_ENTRIES_MAX) 152 153 //! 154 //! \brief Max CURBE Allocation Size 155 //! 156 #define RENDERHAL_CURBE_SIZE_MAX (RENDERHAL_URB_SIZE_MAX - RENDERHAL_INTERFACE_DESCRIPTOR_ENTRIES_MAX) 157 158 //! 159 //! \brief Max Samplers 160 //! 161 #define RENDERHAL_SAMPLERS_AVS_MAX 8 162 163 //! 164 //! \brief Default Samplers 165 //! 166 #define RENDERHAL_SAMPLERS 16 167 #define RENDERHAL_SAMPLERS_VA 8 168 169 //! 170 //! \brief Default CURBE size in GSH 171 //! Use the size of composition kernel static param since it's the largest of all 172 //! 173 #define RENDERHAL_CURBE_SIZE 832 // MOS ALIGN CEIL(sizeof(GPGPU_WALKER_ISTAB_GMC_STATIC_DATA_G8), RENDERHAL_URB_BLOCK_ALIGN) 174 175 //! 176 //! \brief Default number of kernels that may be cached in GSH 177 //! 178 #define RENDERHAL_KERNEL_COUNT 32 179 180 //! 181 //! \brief Max number of kernels cached in GSH 182 //! 183 #define RENDERHAL_KERNEL_COUNT_MIN 2 184 185 //! 186 //! \brief Default kernel heap size 187 //! 188 #define RENDERHAL_KERNEL_HEAP 2097152 189 190 //! 191 //! \brief Min kernel heap size 192 //! 193 #define RENDERHAL_KERNEL_HEAP_MIN 65536 194 #define RENDERHAL_KERNEL_HEAP_MAX 2097152 195 196 //! 197 //! \brief Default kernel block size (granularity for kernel allocation) 198 //! 199 #define RENDERHAL_KERNEL_BLOCK_SIZE 65536 200 201 //! 202 //! \brief Default ISA ASM Debug Surface BTI 203 //! 204 #define RENDERHAL_ISA_ASM_SURFACE_BTI_DEFAULT 39 205 206 //! 207 //! \brief Min kernel block size 208 //! 209 #define RENDERHAL_KERNEL_BLOCK_MIN 1024 210 #define RENDERHAL_KERNEL_BLOCK_MAX 65536 211 212 //! 213 //! \brief Max number of Media Threads 214 //! 215 #define RENDERHAL_USE_MEDIA_THREADS_MAX 0 216 217 //! 218 //! \brief Number and size of palettes 219 //! 220 #define RENDERHAL_PALETTE_COUNT 2 221 #define RENDERHAL_PALETTE_MAX 2 222 223 #define RENDERHAL_PALETTE_ENTRIES 256 224 #define RENDERHAL_PALETTE_ENTRIES_MAX 256 225 226 //! 227 //! \brief SIP Size 228 //! 229 #define RENDERHAL_MAX_SIP_SIZE 0x4000 230 231 //! 232 //! \brief Number of chroma keys 233 //! 234 #define RENDERHAL_CHROMA_KEY_COUNT 4 235 #define RENDERHAL_CHROMA_KEY_MAX 4 236 237 //! 238 //! \brief Alignment 239 //! 240 #define RENDERHAL_KERNEL_BLOCK_ALIGN 64 241 #define RENDERHAL_URB_BLOCK_ALIGN 64 242 #define RENDERHAL_SYNC_BLOCK_ALIGN 128 243 #define RENDERHAL_CURBE_BLOCK_ALIGN 64 244 245 //! 246 //! \brief Max number of Y_Uoffset size 247 //! 248 #define RENDERHAL_MAX_YV12_PLANE_Y_U_OFFSET_G9 16383 249 250 //! 251 //! \brief Palette allocation id 252 //! 253 #define RENDERHAL_PALETTE_ID_ALLOCATE_ONLY -2 // Allocate but don't load palette 254 #define RENDERHAL_PALETTE_ID_ALLOCATE_LOAD -1 // Allocate and load palette 255 256 //! 257 //! \brief Hw Interface defaults 258 //! 259 #define RENDERHAL_TIMEOUT_MS_DEFAULT 100 260 #define RENDERHAL_EVENT_TIMEOUT_MS 5 261 262 //! 263 //! \brief Sampler State Indices 264 //! 265 #define RENDERHAL_SAMPLER_Y 1 266 #define RENDERHAL_SAMPLER_U 2 267 #define RENDERHAL_SAMPLER_V 3 268 #define RENDERHAL_SAMPLER_8x8_AVS_Y 4 269 #define RENDERHAL_SAMPLER_8x8_AVS_U 8 270 #define RENDERHAL_SAMPLER_8x8_AVS_V 12 271 272 //*----------------------------------------------------------------------------- 273 //| MMIO register offsets used for the EU debug support 274 //*----------------------------------------------------------------------------- 275 276 277 278 #define MEDIASTATE_AVS_MAX_DERIVATIVE_4_PIXELS 7 279 #define MEDIASTATE_AVS_MAX_DERIVATIVE_8_PIXELS 20 280 #define MEDIASTATE_AVS_TRANSITION_AREA_4_PIXELS 4 281 #define MEDIASTATE_AVS_TRANSITION_AREA_8_PIXELS 5 282 283 enum GFX_COMMON_TOKEN_SUBOPCODE 284 { 285 GFXSUBOP_BINDING_TABLE_STATE_TOKEN = 0xFE, 286 GFXSUBOP_SURFACE_STATE_TOKEN = 0xFF 287 }; 288 289 enum MEDIASTATE_AVS_SHARPNESS_LEVEL 290 { 291 MEDIASTATE_AVS_SHARPNESS_LEVEL_SMOOTH = 0, 292 MEDIASTATE_AVS_SHARPNESS_LEVEL_SHARP = 255 293 }; 294 295 enum ROTATION_MODE 296 { 297 ROTATION_IDENTITY = 0, 298 ROTATION_90 = 1, 299 ROTATION_180 = 2, 300 ROTATION_270 = 3, 301 }; 302 303 // Render chroma siting vertical value 304 enum CHROMA_SITING_VDIRECTION 305 { 306 CHROMA_SITING_VDIRECTION_0 = 0x0, 307 CHROMA_SITING_VDIRECTION_1_4 = 0x1, 308 CHROMA_SITING_VDIRECTION_1_2 = 0x2, 309 CHROMA_SITING_VDIRECTION_3_4 = 0x3, 310 CHROMA_SITING_VDIRECTION_1 = 0x4 311 }; 312 313 // Render chroma siting horizontal value 314 enum CHROMA_SITING_UDIRECTION 315 { 316 CHROMA_SITING_UDIRECTION_LEFT = 0x0, 317 CHROMA_SITING_UDIRECTION_CENTER = 0x1 318 }; 319 320 enum GFX3DSTATE_TILEWALK 321 { 322 GFX3DSTATE_TILEWALK_XMAJOR = 0, 323 GFX3DSTATE_TILEWALK_YMAJOR = 1 324 }; 325 326 enum MEDIA_STATE_DEBUG_COUNTER_CONTROL 327 { 328 MEDIASTATE_DEBUG_COUNTER_FREE_RUNNING = 0, 329 MEDIASTATE_DEBUG_COUNTER_FROZEN = 1, 330 MEDIASTATE_DEBUG_COUNTER_INITIALIZED_ONCE = 2, 331 MEDIASTATE_DEBUG_COUNTER_INITIALIZED_ALWAYS = 3 332 }; 333 334 enum MEDIASTATE_BINDING_TABLE_STATE_TYPE 335 { 336 MEDIASTATE_BTS_DEFAULT_TYPE = 0, 337 MEDIASTATE_BTS_DI_SAMPLE8x8_VME_TYPE = 1 338 }; 339 340 struct SURFACE_STATE_TOKEN_COMMON 341 { 342 // DWORD 0 343 union 344 { 345 struct 346 { 347 uint32_t Length : 8; // OP_LENGTH 348 uint32_t : 8; 349 uint32_t InstructionSubOpcode : 8; // GFX3DSTATE_PIPELINED_SUBOPCODE 350 uint32_t InstructionOpcode : 3; // GFX_OPCODE 351 uint32_t InstructionPipeLine : 2; // INSTRUCTION_PIPELINE 352 uint32_t InstructionType : 2; // INSTRUCTION_TYPE 353 uint32_t Token : 1; // bool 354 }; 355 356 // DriverID for IMOLA patching 357 struct 358 { 359 uint32_t DriverID; 360 }; 361 362 struct 363 { 364 uint32_t Value; 365 }; 366 } DW0; 367 368 // DWORD 1 369 union 370 { 371 struct 372 { 373 uint32_t SurfaceStateHeapOffset : 16; // U16 32-byte aligned 374 uint32_t SurfaceAllocationIndex : 16; // U16 375 }; 376 struct 377 { 378 uint32_t Value; 379 }; 380 } DW1; 381 382 // DWORD 2 383 union 384 { 385 struct 386 { 387 uint32_t SurfaceOffset : 32; 388 }; 389 struct 390 { 391 uint32_t Value; 392 }; 393 } DW2; 394 395 // DWORD 3 396 union 397 { 398 struct 399 { 400 uint32_t RenderTargetEnable : 1; // bool 401 uint32_t YUVPlane : 2; // U2 402 uint32_t SurfaceStateType : 1; // U1 403 uint32_t: 28; 404 }; 405 struct 406 { 407 uint32_t Value; 408 }; 409 } DW3; 410 411 // DWORD 4 412 union 413 { 414 struct 415 { 416 uint32_t SurfaceBaseAddress; // SurfaceBaseAddress[31:12] 417 }; 418 struct 419 { 420 uint32_t Value; 421 }; 422 } DW4; 423 424 // DWORD 5 425 union 426 { 427 struct 428 { 429 uint32_t SurfaceBaseAddress64 : BITFIELD_RANGE(0, 15); // SurfaceBaseAddress[47:32] 430 uint32_t : BITFIELD_RANGE(16, 31); 431 }; 432 struct 433 { 434 uint32_t Value; 435 }; 436 } DW5; 437 438 void* pResourceInfo; 439 440 }; 441 442 extern const SURFACE_STATE_TOKEN_COMMON g_cInit_SURFACE_STATE_TOKEN_COMMON; 443 444 // Forward declarations 445 typedef struct _RENDERHAL_SURFACE RENDERHAL_SURFACE, *PRENDERHAL_SURFACE; 446 typedef struct _RENDERHAL_INTERFACE RENDERHAL_INTERFACE, *PRENDERHAL_INTERFACE; 447 typedef struct _RENDERHAL_SURFACE_STATE_ENTRY *PRENDERHAL_SURFACE_STATE_ENTRY; 448 typedef const struct _RENDERHAL_KERNEL_PARAM CRENDERHAL_KERNEL_PARAM, *PCRENDERHAL_KERNEL_PARAM; 449 450 //! 451 //! Structure RENDERHAL_SETTINGS 452 //! \brief RenderHal Settings - creation parameters for RenderHal 453 //! 454 typedef struct _RENDERHAL_SETTINGS 455 { 456 int32_t iMediaStates; 457 458 PRENDERHAL_DYN_HEAP_SETTINGS pDynSettings; // Dynamic State Heap Settings 459 460 } RENDERHAL_SETTINGS, *PRENDERHAL_SETTINGS; 461 462 //! 463 //! Enum RENDERHAL_COMPONENT 464 //! \brief RenderHal client component ID (for debugging/timing) 465 //! 466 typedef enum _RENDERHAL_COMPONENT 467 { 468 RENDERHAL_COMPONENT_UNKNOWN = 0, 469 RENDERHAL_COMPONENT_COMP, 470 RENDERHAL_COMPONENT_DNDI, 471 RENDERHAL_COMPONENT_VEBOX, 472 RENDERHAL_COMPONENT_CM, 473 RENDERHAL_COMPONENT_16ALIGN, 474 RENDERHAL_COMPONENT_FAST1TON, 475 RENDERHAL_COMPONENT_HDR, 476 RENDERHAL_COMPONENT_COUNT_BASE, 477 RENDERHAL_COMPONENT_RESERVED_NUM = 15, 478 RENDERHAL_COMPONENT_COUNT 479 } RENDERHAL_COMPONENT; 480 481 //! 482 //! \brief Scaling Mode enum 483 //! 484 typedef enum _RENDERHAL_SCALING_MODE 485 { 486 RENDERHAL_SCALING_NEAREST, 487 RENDERHAL_SCALING_BILINEAR, 488 RENDERHAL_SCALING_AVS 489 } RENDERHAL_SCALING_MODE; 490 491 //! 492 //! \brief Surface types enum 493 //! IMPORTANT : SurfaceType_Layer[] must be updated to match this enum type 494 //! 495 typedef enum _RENDERHAL_SURFACE_TYPE 496 { 497 RENDERHAL_SURF_NONE = 0, 498 RENDERHAL_SURF_IN_BACKGROUND, 499 RENDERHAL_SURF_IN_PRIMARY, 500 RENDERHAL_SURF_IN_SUBSTREAM, 501 RENDERHAL_SURF_IN_REFERENCE, 502 RENDERHAL_SURF_OUT_RENDERTARGET, 503 RENDERHAL_SURF_TYPE_COUNT //!< Keep this line at the end 504 } RENDERHAL_SURFACE_TYPE; 505 506 //! 507 //! \brief Batch buffer types enum 508 //! 509 typedef enum _RENDERHAL_BB_TYPE 510 { 511 RENDERHAL_BB_TYPE_UNKNOWN = 0, // Batch Buffer created by unknown client 512 RENDERHAL_BB_TYPE_CM = 6, // Batch Buffer created by Media Development Framework (CM) component 513 RENDERHAL_BB_TYPE_COUNT 514 } RENDERHAL_BB_TYPE; 515 516 //! 517 //! \brief Sample Type enum 518 //! 519 typedef enum _RENDERHAL_SAMPLE_TYPE 520 { 521 RENDERHAL_SAMPLE_PROGRESSIVE, 522 RENDERHAL_SAMPLE_SINGLE_TOP_FIELD, 523 RENDERHAL_SAMPLE_SINGLE_BOTTOM_FIELD, 524 RENDERHAL_SAMPLE_INTERLEAVED_EVEN_FIRST_TOP_FIELD, 525 RENDERHAL_SAMPLE_INTERLEAVED_EVEN_FIRST_BOTTOM_FIELD, 526 RENDERHAL_SAMPLE_INTERLEAVED_ODD_FIRST_TOP_FIELD, 527 RENDERHAL_SAMPLE_INTERLEAVED_ODD_FIRST_BOTTOM_FIELD, 528 RENDERHAL_SAMPLE_INVALID //!< Keep this line at the end 529 } RENDERHAL_SAMPLE_TYPE; 530 531 //! 532 //! Structure RENDERHAL_GET_SURFACE_INFO 533 //! \brief Structure to retrieve Surface Infomation Parameters 534 //! 535 typedef struct _RENDERHAL_GET_SURFACE_INFO 536 { 537 uint32_t ArraySlice; 538 uint32_t MipSlice; 539 MOS_S3D_CHANNEL S3dChannel; 540 } RENDERHAL_GET_SURFACE_INFO, *PRENDERHAL_GET_SURFACE_INFO; 541 542 //! 543 //! \brief Structure of power control info 544 //! 545 typedef struct _RENDERHAL_POWEROPTION 546 { 547 uint16_t nSlice; //!< Number of slices to use: 0 (default), 1, 2... 548 uint16_t nSubSlice; //!< Number of subslices to use: 0 (default), 1, 2... 549 uint16_t nEU; //!< Number of EUs to use: 0 (default), 1, 2... 550 } RENDERHAL_POWEROPTION, *PRENDERHAL_POWEROPTION; 551 552 //! 553 //! Structure RENDERHAL_SURFACE 554 //! \brief RENDERHAL surface definition 555 //! 556 typedef struct _RENDERHAL_SURFACE 557 { 558 MOS_SURFACE OsSurface; //!< Surface provided by the client 559 560 // Auxiliary rendering parameters 561 RENDERHAL_SURFACE_TYPE SurfType; //!< Surface Type (context) 562 RENDERHAL_SCALING_MODE ScalingMode; //!< Scaling Mode 563 MHW_ROTATION Rotation; //!< Rotation Mode 564 uint32_t ChromaSiting; //!< Chroma Siting 565 566 // Src/Dst rectangles 567 RECT rcSrc; //!< Source rectangle 568 RECT rcDst; //!< Destination rectangle 569 RECT rcMaxSrc; //!< Max source rectangle 570 571 // Auxiliary VP parameters provided by client 572 bool bDeinterlaceEnable; //!< Active Deinterlace messages 573 bool bQueryVariance; //!< enable variance query 574 bool bInterlacedScaling; //!< Interlaced scaling 575 void *pDeinterlaceParams; //!< Pointer to Deinterlacing parameters 576 RENDERHAL_SAMPLE_TYPE SampleType; //!< Interlaced/Progressive sample type 577 int32_t iPaletteID; //!<Palette ID 578 } RENDERHAL_SURFACE , *PRENDERHAL_SURFACE; 579 580 //! 581 //! Structure RENDERHAL_OFFSET_OVERRIDE 582 //! \brief structure used to alloce Surface State overrides for Kernel 583 //! 584 typedef struct _RENDERHAL_OFFSET_OVERRIDE 585 { 586 // Y plane adjustment 587 int32_t iYOffsetAdjust; //!< Surface Offset adjustment for Y plane 588 int32_t iYOffsetX; //!< X-Offset override for Y plane 589 int32_t iYOffsetY; //!< Y-Offset override for Y plane 590 591 // UV plane overrides/adjustmenty 592 int32_t iUVOffsetAdjust; //!< Surface Offset adjustment for UV plane 593 int32_t iUVOffsetX; //!< X-Offset override for UV plane 594 int32_t iUVOffsetY; //!< Y-Offset override for UV plane 595 } RENDERHAL_OFFSET_OVERRIDE, *PRENDERHAL_OFFSET_OVERRIDE; 596 597 typedef enum _RENDERHAL_SURFACE_STATE_TYPE 598 { 599 RENDERHAL_SURFACE_TYPE_INVALID = 0, 600 RENDERHAL_SURFACE_TYPE_G8 , 601 RENDERHAL_SURFACE_TYPE_G9 , 602 RENDERHAL_SURFACE_TYPE_G10 , 603 RENDERHAL_SURFACE_TYPE_ADV_G8 , 604 RENDERHAL_SURFACE_TYPE_ADV_G9 , 605 RENDERHAL_SURFACE_TYPE_ADV_G10 606 } RENDERHAL_SURFACE_STATE_TYPE, *PRENDERHAL_SURFACE_STATE_TYPE; 607 608 typedef enum _RENDERHAL_PLANE_DEFINITION 609 { 610 RENDERHAL_PLANES_PL3 = 0, 611 RENDERHAL_PLANES_NV12 , 612 RENDERHAL_PLANES_YUY2 , 613 RENDERHAL_PLANES_UYVY , 614 RENDERHAL_PLANES_YVYU , 615 RENDERHAL_PLANES_VYUY , 616 RENDERHAL_PLANES_ARGB , 617 RENDERHAL_PLANES_XRGB , 618 RENDERHAL_PLANES_ABGR , 619 RENDERHAL_PLANES_XBGR , 620 RENDERHAL_PLANES_RGB16 , 621 RENDERHAL_PLANES_RGB24 , 622 RENDERHAL_PLANES_R16U , 623 RENDERHAL_PLANES_R16S , 624 RENDERHAL_PLANES_R32U , 625 RENDERHAL_PLANES_R32S , 626 RENDERHAL_PLANES_R32F , 627 RENDERHAL_PLANES_V8U8 , 628 RENDERHAL_PLANES_R8G8_UNORM , 629 RENDERHAL_PLANES_411P , 630 RENDERHAL_PLANES_411R , 631 RENDERHAL_PLANES_422H , 632 RENDERHAL_PLANES_422V , 633 RENDERHAL_PLANES_444P , 634 RENDERHAL_PLANES_RGBP , 635 RENDERHAL_PLANES_BGRP , 636 637 RENDERHAL_PLANES_AI44_PALLETE_0 , 638 RENDERHAL_PLANES_IA44_PALLETE_0 , 639 RENDERHAL_PLANES_P8_PALLETE_0 , 640 RENDERHAL_PLANES_A8P8_PALLETE_0 , 641 RENDERHAL_PLANES_AI44_PALLETE_1 , 642 RENDERHAL_PLANES_IA44_PALLETE_1 , 643 RENDERHAL_PLANES_P8_PALLETE_1 , 644 RENDERHAL_PLANES_A8P8_PALLETE_1 , 645 646 RENDERHAL_PLANES_AYUV , 647 RENDERHAL_PLANES_STMM , 648 RENDERHAL_PLANES_L8 , 649 650 RENDERHAL_PLANES_PL3_ADV , 651 RENDERHAL_PLANES_NV12_ADV , 652 RENDERHAL_PLANES_YUY2_ADV , 653 RENDERHAL_PLANES_UYVY_ADV , 654 RENDERHAL_PLANES_YVYU_ADV , 655 RENDERHAL_PLANES_VYUY_ADV , 656 RENDERHAL_PLANES_ARGB_ADV , 657 RENDERHAL_PLANES_ABGR_ADV , 658 RENDERHAL_PLANES_AYUV_ADV , 659 RENDERHAL_PLANES_STMM_ADV , 660 RENDERHAL_PLANES_L8_ADV , 661 RENDERHAL_PLANES_A8_ADV , 662 RENDERHAL_PLANES_A8 , 663 RENDERHAL_PLANES_R8 , 664 RENDERHAL_PLANES_NV12_2PLANES , 665 RENDERHAL_PLANES_NV12_2PLANES_ADV , 666 RENDERHAL_PLANES_411P_ADV , 667 RENDERHAL_PLANES_411R_ADV , 668 RENDERHAL_PLANES_422H_ADV , 669 RENDERHAL_PLANES_422V_ADV , 670 RENDERHAL_PLANES_444P_ADV , 671 RENDERHAL_PLANES_RGBP_ADV , 672 RENDERHAL_PLANES_BGRP_ADV , 673 RENDERHAL_PLANES_R16_UNORM , 674 RENDERHAL_PLANES_Y8 , 675 RENDERHAL_PLANES_Y1 , 676 RENDERHAL_PLANES_Y16U , 677 RENDERHAL_PLANES_Y16S , 678 RENDERHAL_PLANES_A16B16G16R16 , 679 RENDERHAL_PLANES_A16B16G16R16_ADV , 680 RENDERHAL_PLANES_R10G10B10A2 , 681 RENDERHAL_PLANES_R10G10B10A2_ADV , 682 RENDERHAL_PLANES_B10G10R10A2 , 683 RENDERHAL_PLANES_L16 , 684 RENDERHAL_PLANES_NV21 , 685 RENDERHAL_PLANES_YV12 , 686 RENDERHAL_PLANES_P016 , 687 RENDERHAL_PLANES_P016_2PLANES_ADV , 688 RENDERHAL_PLANES_P010 , 689 RENDERHAL_PLANES_P010_1PLANE , 690 RENDERHAL_PLANES_P010_1PLANE_ADV , 691 RENDERHAL_PLANES_IRW0 , 692 RENDERHAL_PLANES_IRW1 , 693 RENDERHAL_PLANES_IRW2 , 694 RENDERHAL_PLANES_IRW3 , 695 RENDERHAL_PLANES_A16B16G16R16F , 696 RENDERHAL_PLANES_R16G16_UNORM , 697 RENDERHAL_PLANES_R16_FLOAT , 698 RENDERHAL_PLANES_A16R16G16B16F , 699 RENDERHAL_PLANES_YUY2_2PLANES , 700 RENDERHAL_PLANES_Y210_ADV , 701 RENDERHAL_PLANES_Y210_RT , 702 RENDERHAL_PLANES_Y210 , 703 RENDERHAL_PLANES_Y210_1PLANE_ADV , 704 RENDERHAL_PLANES_R16G16_SINT , 705 RENDERHAL_PLANES_R24_UNORM_X8_TYPELESS, 706 RENDERHAL_PLANES_R32_FLOAT_X8X24_TYPELESS, 707 RENDERHAL_PLANES_P208, 708 RENDERHAL_PLANES_P208_1PLANE_ADV, 709 RENDERHAL_PLANES_Y416_RT, 710 RENDERHAL_PLANES_R32G32B32A32F, 711 RENDERHAL_PLANES_Y8_ADV, 712 713 RENDERHAL_PLANES_DEFINITION_COUNT 714 } RENDERHAL_PLANE_DEFINITION, *PRENDERHAL_PLANE_DEFINITION; 715 716 typedef enum _RENDERHAL_SS_BOUNDARY 717 { 718 RENDERHAL_SS_BOUNDARY_SRCRECT = 0, // use for sources read via sampler 719 RENDERHAL_SS_BOUNDARY_DSTRECT , // use for RT by default 720 RENDERHAL_SS_BOUNDARY_MAXSRCRECT, // use max source rect 721 RENDERHAL_SS_BOUNDARY_ORIGINAL, // use for surfs that are not source or RT 722 } RENDERHAL_SS_BOUNDARY; 723 724 //! 725 //! \brief Surface cache attributes 726 //! 727 #define RENDERHAL_MEMORY_OBJECT_CONTROL uint32_t 728 729 typedef struct _RENDERHAL_KERNEL_PARAM 730 { 731 int32_t GRF_Count; // Number of registers 732 int32_t BT_Count; // Number of BT entries 733 int32_t Sampler_Count; // Number of samplers 734 int32_t Thread_Count; // Number of threads (max) 735 int32_t GRF_Start_Register; // Start register 736 int32_t CURBE_Length; // Constant URB length (in 256-bits) 737 int32_t block_width; // Block width 738 int32_t block_height; // Block height 739 int32_t blocks_x; // Blocks in x 740 int32_t blocks_y; // Blocks in y 741 } RENDERHAL_KERNEL_PARAM, *PRENDERHAL_KERNEL_PARAM; 742 743 typedef struct _RENDERHAL_CLONE_KERNEL_PARAM 744 { 745 bool isClone; // If kernel has been cloned from another kernel (i.e. share same kernel binary) 746 bool isHeadKernel; // If kernel is the "head" kernel (i.e. this allocation contains the kernel binary) 747 int32_t referenceCount; // Number of cloned kernels currently pointing to the head kernel 748 int32_t cloneKernelID; // Kernel ID of source kernel (i.e. kernel used to clone) 749 int32_t kernelBinaryAllocID; // Allocation ID of the head kernel that contains the actual kernel binary 750 uint32_t dwOffsetForAllocID; // Save the offset for this allocation ID, if clone using a different offset to point to head kernel binary 751 }RENDERHAL_CLONE_KERNEL_PARAM, *PRENDERHAL_CLONE_KERNEL_PARAM; 752 753 typedef struct tagKdll_CacheEntry Kdll_CacheEntry; 754 typedef struct _RENDERHAL_KRN_ALLOCATION *PRENDERHAL_KRN_ALLOCATION; 755 typedef struct _RENDERHAL_KRN_ALLOC_LIST *PRENDERHAL_KRN_ALLOC_LIST; 756 757 typedef struct _RENDERHAL_KRN_ALLOCATION 758 { 759 int32_t iKID; // Interface descriptor ID for the kernel (for 2nd level buffer) 760 int32_t iKUID; // Kernel Unique ID 761 int32_t iKCID; // Kernel Cache ID 762 uint32_t dwSync; // Kernel last sync (used to determine whether the kernel may be unloaded) 763 FrameTrackerTokenFlat trackerToken; // Kernel last sync with multiple trackers 764 uint32_t dwOffset; // Kernel offset in GSH (from GSH base, 0 is KAC entry is available) 765 int32_t iSize; // Kernel block size in GSH (0 if not loaded) 766 uint32_t dwFlags : 4; // Kernel allocation flag 767 uint32_t dwCount : 28; // Kernel refresh counter 768 RENDERHAL_KERNEL_PARAM Params; // Kernel parameters for RenderHal (states, rendering, etc) 769 PMHW_KERNEL_PARAM pMhwKernelParam; // Pointer to Kernel parameters for MHW 770 Kdll_CacheEntry *pKernelEntry; // Pointer to Kernel entry for VP/KDLL 771 RENDERHAL_CLONE_KERNEL_PARAM cloneKernelParams; // CM - Clone kernel information 772 int32_t iAllocIndex; // Kernel allocation index (index in kernel allocation table) 773 774 // DSH - Dynamic list of kernel allocations 775 PMHW_STATE_HEAP_MEMORY_BLOCK pMemoryBlock; // Memory block in ISH 776 PRENDERHAL_KRN_ALLOCATION pNext; // Next kernel in list 777 PRENDERHAL_KRN_ALLOCATION pPrev; // Prev kernel in list 778 PRENDERHAL_KRN_ALLOC_LIST pList; // Points to current list, regardless of flag 779 uint32_t Reserved : 16; // Reserved - used for debugging 780 uint32_t : 16; // 781 char *szKernelName; // Kernel name - used for debugging 782 } RENDERHAL_KRN_ALLOCATION, *PRENDERHAL_KRN_ALLOCATION; 783 784 typedef struct _RENDERHAL_KRN_ALLOC_LIST 785 { 786 PRENDERHAL_KRN_ALLOCATION pHead; // Head of the list 787 PRENDERHAL_KRN_ALLOCATION pTail; // Tail of the list 788 int32_t iCount; // Number of objects 789 } RENDERHAL_KRN_ALLOC_LIST, *PRENDERHAL_KRN_ALLOC_LIST; 790 791 typedef struct _RENDERHAL_MEDIA_STATE *PRENDERHAL_MEDIA_STATE; 792 793 typedef struct _RENDERHAL_DYNAMIC_STATE *PRENDERHAL_DYNAMIC_STATE; 794 795 typedef struct _RENDERHAL_MEDIA_STATE 796 { 797 // set at creation time 798 uint32_t dwOffset; // Media State Base Address (from GSH base) - VFE 799 int32_t *piAllocation; // Kernel allocation table 800 801 // set at runtime 802 uint32_t dwSyncTag; // Sync Tag 803 FrameTrackerTokenFlat trackerToken; 804 uint32_t dwSyncCount; // Number of sync tags 805 int32_t iCurbeOffset; // Current CURBE Offset 806 uint32_t bBusy : 1; // 1 if the state is in use (must sync before use) 807 uint32_t : 15; 808 uint32_t Reserved: 16; 809 810 PRENDERHAL_MEDIA_STATE pPrev; // Next Media State 811 PRENDERHAL_MEDIA_STATE pNext; // Previous Media State 812 PRENDERHAL_DYNAMIC_STATE pDynamicState; // Dynamic states (nullptr if DSH not in use) 813 } RENDERHAL_MEDIA_STATE, *PRENDERHAL_MEDIA_STATE; 814 815 typedef struct _RENDERHAL_MEDIA_STATE_LIST 816 { 817 PRENDERHAL_MEDIA_STATE pHead; // Head of the list 818 PRENDERHAL_MEDIA_STATE pTail; // Tail of the list 819 int32_t iCount; // Number of objects 820 } RENDERHAL_MEDIA_STATE_LIST, *PRENDERHAL_MEDIA_STATE_LIST; 821 822 struct RENDERHAL_TR_RESOURCE { 823 MOS_RESOURCE osResource; 824 bool locked; 825 uint32_t *data; 826 uint32_t currentTrackerId; 827 }; 828 829 typedef struct _RENDERHAL_STATE_HEAP_SETTINGS 830 { 831 // Global GSH Allocation parameters 832 int32_t iSyncSize; // Sync area for sync, perf, debug 833 834 // Media State Allocation parameters 835 int32_t iMediaStateHeaps; // Number of Media State heaps 836 int32_t iMediaIDs; // Number of Media Interface Descriptors 837 int32_t iCurbeSize; // Size of CURBE area 838 int32_t iSamplers; // Number of Samplers/ID 839 int32_t iSamplersAVS; // Number of AVS Samplers/ID 840 int32_t iSamplersVA; // Number of Video Analytics Samplers/ID 841 int32_t iKernelCount; // Number of Kernels that can be loaded 842 int32_t iKernelHeapSize; // Size of GSH block for kernels 843 int32_t iKernelBlockSize; // Kernel allocation block 844 845 // Media VFE/ID configuration, limits 846 int32_t iPerThreadScratchSize; // Size of the Scratch memory per Thread 847 int32_t iSipSize; // SIP size 848 849 // Surface State Heap Settings 850 int32_t iSurfaceStateHeaps; // Number of SSH instances (same as iMediaStateHeaps) 851 int32_t iBindingTables; // Number of BT per SSH instance 852 int32_t iSurfaceStates; // Number of Surfaces per SSH 853 int32_t iSurfacesPerBT; // Number of Surfaces per BT 854 int32_t iBTAlignment; // BT Alignment size 855 } RENDERHAL_STATE_HEAP_SETTINGS, *PRENDERHAL_STATE_HEAP_SETTINGS; 856 857 typedef struct _RENDERHAL_STATE_HEAP 858 { 859 //--------------------------- 860 // General State Heap 861 //--------------------------- 862 uint32_t dwSizeGSH; // GSH size 863 MOS_RESOURCE GshOsResource; // GSH OS Buffer 864 bool bGshLocked; // GSH is locked 865 uint8_t *pGshBuffer; // Pointer to GSH buffer data 866 867 // Dynamic GSH sync 868 uint32_t dwOffsetSync; // Offset of sync/perf data in GSH 869 uint32_t dwSizeSync; // Size of sync data 870 871 // Synchronization / Performance / Statistics 872 volatile uint32_t *pSync; // Pointer to sync area (when locked) 873 uint32_t dwNextTag; // Next sync tag value to use 874 uint32_t dwSyncTag; // Last sync tag completed 875 uint32_t dwFrameId; // Last frame id completed 876 877 // Media states 878 int32_t iCurMediaState; // Current Media State Index 879 int32_t iNextMediaState; // Next Media State Index 880 PRENDERHAL_MEDIA_STATE pCurMediaState; // Current Media state in use 881 882 uint32_t dwOffsetMediaID; // Offset to Media IDs from Media State Base 883 uint32_t dwSizeMediaID; // Size of each Media ID 884 885 MHW_ID_ENTRY_PARAMS CurIDEntryParams = {}; // Parameters for current Interface Descriptor Entry 886 887 // Performance capture 888 uint32_t dwOffsetStartTime; // Offset to the start time of the media state 889 uint32_t dwStartTimeSize; // Size of Start time 890 uint32_t dwOffsetEndTime; // Offset to the end time of the media state 891 uint32_t dwEndTimeSize; // Size of end time 892 uint32_t dwOffsetComponentID; // Render Component 893 uint32_t dwComponentIDSize; // Render ComponentID size 894 uint32_t dwOffsetReserved; // Reserved (Curbe should be 64 aligned) 895 uint32_t dwReservedSize; // 64 - (start time + end time + component) 896 897 uint32_t dwOffsetCurbe; // Offset to Media CURBE data from Media State Base 898 uint32_t dwSizeCurbe; // Size of CURBE area 899 900 uint32_t dwOffsetSampler; // Offset to Media Samplers from Media State Base 901 uint32_t dwSizeSampler; // Size of Samplers 902 903 uint32_t dwOffsetSamplerIndirect; // Offset to Media Samplers Indirect State from Media State Base 904 uint32_t dwSizeSamplerIndirect; // Size of Samplers Indirect State 905 906 uint32_t dwOffsetSampler8x8Table; // Offset to Media Sampler State Table for AVS from Media State Base 907 uint32_t dwSizeSampler8x8Table; // Size of Sampler State Table for AVS 908 909 uint32_t dwOffsetSamplerVA; // Offset to Video Analytics Samplers from Media State Base 910 uint32_t dwSizeSamplerVA; // Size of VA Samplers 911 912 uint32_t dwOffsetSamplerAVS; // Offset to 8x8 Samplers from Media State Base 913 uint32_t dwSizeSamplerAVS; // Size of 8x8 Samplers 914 915 PRENDERHAL_MEDIA_STATE pMediaStates; // Media state table 916 917 // Dynamic Media states 918 PMHW_MEMORY_POOL pMediaStatesMemPool; // Media state memory allocations 919 RENDERHAL_MEDIA_STATE_LIST FreeStates; // Free media state objects (pool) 920 RENDERHAL_MEDIA_STATE_LIST ReservedStates; // Reserved media states 921 RENDERHAL_MEDIA_STATE_LIST SubmittedStates; // Submitted media states 922 923 //--------------------------- 924 // Surface State Heap 925 //--------------------------- 926 uint32_t dwSizeSSH; // SSH size 927 MOS_RESOURCE SshOsResource; // SSH OS Buffer 928 bool bSshLocked; // SSH is locked 929 uint8_t *pSshBuffer; // Pointer to SSH buffer base 930 uint32_t dwSshIntanceSize; // SSH instance size 931 932 // BT size, offsets to BT/SS entries in SSH 933 int32_t iBindingTableSize; // Size of each BT (in bytes) 934 int32_t iBindingTableOffset; // First BT offset in SSH buffer 935 int32_t iSurfaceStateOffset; // First SS offset in SSH buffer 936 937 // Array of Surface State control structures 938 PRENDERHAL_SURFACE_STATE_ENTRY pSurfaceEntry; 939 940 // Current allocations 941 int32_t iCurSshBufferIndex; // Current SSH Buffer instance in the SSH heap 942 int32_t iCurrentBindingTable; // Current BT 943 int32_t iCurrentSurfaceState; // Current SS 944 945 //--------------------------- 946 // Instruction State Heap 947 //--------------------------- 948 uint32_t dwSizeISH; // ISH size 949 MOS_RESOURCE IshOsResource; // ISH OS Buffer 950 bool bIshLocked; // ISH is locked 951 uint8_t *pIshBuffer; // Pointer to ISH buffer data 952 uint32_t dwKernelBase; // Offset of kernels in ISH 953 954 // Kernel Allocation 955 int32_t iKernelSize; // Kernel heap size 956 int32_t iKernelUsed; // Kernel heap used size 957 uint8_t *pKernelLoadMap; // Kernel load map 958 uint32_t dwAccessCounter; // Incremented when a kernel is loaded/used, for dynamic allocation 959 int32_t iKernelUsedForDump; // The kernel size to be dumped in oca buffer. 960 961 // Kernel Spill Area 962 uint32_t dwScratchSpaceSize; // Size of the Scratch Area 963 uint32_t dwScratchSpaceBase; // Base of the Scratch area 964 965 // System Routine 966 uint32_t dwSipBase; // Base of the System Routine 967 968 // Arrays created dynamically 969 PRENDERHAL_KRN_ALLOCATION pKernelAllocation; // Kernel allocation table (or linked list) 970 971 // Dynamic Kernel States 972 PMHW_MEMORY_POOL pKernelAllocMemPool; // Kernel states memory pool (mallocs) 973 RENDERHAL_KRN_ALLOC_LIST KernelAllocationPool; // Pool of kernel allocation objects 974 RENDERHAL_KRN_ALLOC_LIST KernelsSubmitted; // Kernel submission list 975 RENDERHAL_KRN_ALLOC_LIST KernelsAllocated; // kernel allocation list (kernels in ISH not currently being executed) 976 CmHashTable kernelHashTable; // Kernel hash table for faster kernel search 977 978 } RENDERHAL_STATE_HEAP, *PRENDERHAL_STATE_HEAP; 979 980 typedef struct _RENDERHAL_DYNAMIC_MEDIA_STATE_PARAMS 981 { 982 int32_t iMaxMediaIDs; // Maximum number of media interface descriptors 983 int32_t iMaxThreads; // Maximum number of threads to be executed (0 = limited to HW threads) - for scratch space allocation 984 int32_t iMaxSpillSize; // Maximum spill sizes among all kernels to be executed - used for scratch space allocation 985 int32_t iMaxCurbeOffset; // Maximum offset reserved for CURBE 986 int32_t iMaxCurbeSize; // Maximum size reserved for CURBE 987 int32_t iMaxSamplerIndex3D; // Maximum 3D sampler index 988 int32_t iMaxSamplerIndexAVS; // Maximum AVS sampler index 989 int32_t iMaxSamplerIndexConv; // Maximum Conv sampler index 990 int32_t iMaxSamplerIndexMisc; // Maximum Misc (VA) sampler index 991 int32_t iMax8x8Tables; // Maximum Number of 8x8 tables per MediaID 992 } RENDERHAL_DYNAMIC_MEDIA_STATE_PARAMS, *PRENDERHAL_DYNAMIC_MEDIA_STATE_PARAMS; 993 994 typedef struct _RENDERHAL_INTERFACE_DESCRIPTOR_PARAMS 995 { 996 int32_t iMediaID; 997 int32_t iBindingTableID; 998 int32_t iCurbeOffset; 999 int32_t iCurbeLength; 1000 int32_t iCrsThrdConstDataLn; 1001 int32_t iNumberThreadsInGroup; 1002 bool blGlobalBarrierEnable; 1003 bool blBarrierEnable; 1004 int32_t iSLMSize; 1005 } RENDERHAL_INTERFACE_DESCRIPTOR_PARAMS, *PRENDERHAL_INTERFACE_DESCRIPTOR_PARAMS; 1006 1007 //! 1008 //! \brief ======== HW Abstraction Params =================================== 1009 //! 1010 1011 typedef struct _RENDERHAL_SURFACE_STATE_PARAMS 1012 { 1013 RENDERHAL_SURFACE_STATE_TYPE Type : 5; // Type of surface state 1014 uint32_t bRenderTarget : 1; // Render target flag 1015 uint32_t bVertStride : 1; // VL Stride 1016 uint32_t bVertStrideOffs : 1; // VL Stride Offset 1017 uint32_t bWidthInDword_Y : 1; // Width in dwords 1018 uint32_t bWidthInDword_UV : 1; 1019 uint32_t bAVS : 1; // AVS scaling 1020 RENDERHAL_SS_BOUNDARY Boundary : 3; // boundary to be aligned to rcSrc/rcDst/actual wd/ht 1021 uint32_t bWidth16Align : 1; // When VDI Walker is enabled, input surface width must be 16 aligned 1022 uint32_t b2PlaneNV12NeededByKernel : 1; // Kernel needs surface state for both Y and UV 1023 uint32_t bForceNV12 : 1; // Forces format to be treated as NV12. Only used in FRC. 1024 uint32_t b32MWColorFillKern : 1; // Flag for 32x32 Media walker + ColorFill kernel case 1025 uint32_t bVASurface : 1; // Value is 1 if VA surface, 0 if AVS surface 1026 uint32_t AddressControl : 2; // 0 clamp, 1 mirror, 2, 3 reserved 1027 uint32_t bWAUseSrcHeight : 1; // Surface state height use src height or surface height 1028 uint32_t bWAUseSrcWidth : 1; // Surface state width use src width or surface width 1029 uint32_t bForce3DLUTR16G16 : 1; // Flag for 3D LUT source and targetsurface 1030 uint32_t bChromasiting : 1; // Flag for chromasiting use 1031 uint32_t bVmeUse : 1; // Flag for VME use 1032 uint32_t : 5; 1033 RENDERHAL_MEMORY_OBJECT_CONTROL MemObjCtl; // Caching attributes 1034 } RENDERHAL_SURFACE_STATE_PARAMS, *PRENDERHAL_SURFACE_STATE_PARAMS; 1035 1036 typedef struct _RENDERHAL_SURFACE_STATE_ENTRY 1037 { 1038 RENDERHAL_SURFACE_STATE_TYPE Type; // Type of surface state 1039 PMOS_SURFACE pSurface; // Pointer to OS surface 1040 uint8_t *pSurfaceState; // Pointer to Surface State 1041 SURFACE_STATE_TOKEN_COMMON SurfaceToken; // SurfaceS Token 1042 int32_t iSurfStateID; // Surface state ID 1043 uint32_t dwSurfStateOffset; // Surface state offset (SSH) 1044 uint32_t dwFormat; // Surface format 1045 uint32_t dwWidth; // Surface width 1046 uint32_t dwHeight; // Surface heigth 1047 uint32_t dwPitch; // Surface pitch 1048 uint32_t dwQPitch; // Surface qpitch 1049 uint32_t YUVPlane : 2; // Plane 1050 uint32_t bAVS : 1; // AVS scaling 1051 uint32_t bRenderTarget : 1; // Render target flag 1052 uint32_t bVertStride : 1; // VL Stride 1053 uint32_t bVertStrideOffs : 1; // VL Stride Offset 1054 uint32_t bWidthInDword : 1; // Width in dwords 1055 uint32_t bTiledSurface : 1; // Tiled surface 1056 uint32_t bTileWalk : 1; // Walk 0-X; 1-Y 1057 uint32_t bHalfPitchChroma : 1; // Half pitch for choma (AVS) 1058 uint32_t bInterleaveChroma: 1; // Interleaved chroma (AVS) 1059 uint32_t DirectionV : 3; // UV direction (AVS) 1060 uint32_t DirectionU : 1; // UV direction (AVS) 1061 uint32_t AddressControl : 2; // 0 Clamp, 1 Mirror, 2, 3 resserved 1062 uint32_t : 15; // RESERVED 1063 uint16_t wUXOffset; // (X,Y) offset U (AVS/ADI) 1064 uint16_t wUYOffset; // 1065 uint16_t wVXOffset; // (X,Y) offset V (AVS/ADI) 1066 uint16_t wVYOffset; // 1067 } RENDERHAL_SURFACE_STATE_ENTRY, *PRENDERHAL_SURFACE_STATE_ENTRY; 1068 1069 //! 1070 // \brief Helper parameters used by Mhw_SendGenericPrologCmd and to initiate command buffer attributes 1071 //! 1072 typedef struct _RENDERHAL_GENERIC_PROLOG_PARAMS 1073 { 1074 bool bMmcEnabled = 0; 1075 bool bEnableMediaFrameTracking = 0; 1076 uint32_t dwMediaFrameTrackingTag = 0; 1077 uint32_t dwMediaFrameTrackingAddrOffset = 0; 1078 PMOS_RESOURCE presMediaFrameTrackingSurface = nullptr; ~_RENDERHAL_GENERIC_PROLOG_PARAMS_RENDERHAL_GENERIC_PROLOG_PARAMS1079 virtual ~_RENDERHAL_GENERIC_PROLOG_PARAMS() {} 1080 } RENDERHAL_GENERIC_PROLOG_PARAMS, *PRENDERHAL_GENERIC_PROLOG_PARAMS; 1081 1082 //! 1083 // \brief Settings help to decide the value of L3 cache enabling register used for renderhal 1084 //! 1085 typedef struct _RENDERHAL_L3_CACHE_SETTINGS 1086 { 1087 bool bEnableSLM; // Enable SLM cache configuration 1088 bool bOverride; // Override cache settings 1089 1090 // Override values 1091 bool bL3CachingEnabled; 1092 1093 bool bCntlRegOverride; 1094 bool bCntlReg2Override; 1095 bool bCntlReg3Override; 1096 bool bSqcReg1Override; 1097 bool bSqcReg4Override; 1098 bool bLra1RegOverride; 1099 1100 uint32_t dwCntlReg; 1101 uint32_t dwCntlReg2; 1102 uint32_t dwCntlReg3; 1103 uint32_t dwSqcReg1; 1104 uint32_t dwSqcReg4; 1105 uint32_t dwLra1Reg; 1106 } RENDERHAL_L3_CACHE_SETTINGS, *PRENDERHAL_L3_CACHE_SETTINGS; 1107 1108 //! 1109 // \brief Settings of Predication 1110 //! 1111 typedef struct _RENDERHAL_PREDICATION_SETTINGS 1112 { 1113 MOS_RESOURCE *pPredicationResource; // Resource for predication 1114 MOS_RESOURCE *ptempPredicationBuffer; // Additional temp buffer for Predication due to the limitation of Cond_BB_End 1115 uint64_t predicationResOffset; // Offset for Predication resource 1116 bool predicationNotEqualZero; // Predication mode 1117 bool predicationEnabled; // Indicates whether or not Predication is enabled 1118 } RENDERHAL_PREDICATION_SETTINGS; 1119 1120 //! 1121 // \brief Settings of SetMarker 1122 //! 1123 typedef struct _RENDERHAL_SETMARKER_SETTINGS 1124 { 1125 MOS_RESOURCE *pSetMarkerResource; // Resource for SetMarker 1126 bool setMarkerEnabled; // Indicates whether or not SetMarker is enabled 1127 uint32_t setMarkerNumTs; // Number Timestamp for SetMarker 1128 } RENDERHAL_SETMARKER_SETTINGS; 1129 1130 typedef MhwMiInterface *PMHW_MI_INTERFACE; 1131 //! 1132 // \brief Hardware dependent render engine interface 1133 //! 1134 typedef struct _RENDERHAL_INTERFACE 1135 { 1136 // MOS/MHW Interfaces 1137 PMOS_INTERFACE pOsInterface; 1138 MhwCpInterface *pCpInterface; 1139 PXMHW_STATE_HEAP_INTERFACE pMhwStateHeap; 1140 PMHW_MI_INTERFACE pMhwMiInterface; 1141 MhwRenderInterface *pMhwRenderInterface; 1142 1143 // RenderHal State Heap 1144 PRENDERHAL_STATE_HEAP pStateHeap; 1145 uint32_t dwStateHeapSize; 1146 1147 // Linked list of batch buffers for synchronization 1148 PMHW_BATCH_BUFFER pBatchBufferList; // List of BB submitted 1149 1150 PMHW_MEMORY_POOL pBatchBufferMemPool; // Batch Buffer memory allocations (malloc) 1151 PMHW_BATCH_BUFFER_LIST BatchBufferPool; // Pool of BB objects (no GFX buffer) 1152 PMHW_BATCH_BUFFER_LIST BatchBuffersAllocated; // List of BB allocated (not executing, backed by GFX buffer) 1153 1154 // Auxiliary 1155 PLATFORM Platform; 1156 MEDIA_FEATURE_TABLE *pSkuTable; 1157 MEDIA_WA_TABLE *pWaTable; 1158 1159 // Hardware dependent parameters 1160 MHW_VFE_SCOREBOARD VfeScoreboard; 1161 PCMHW_SURFACE_PLANES pPlaneDefinitions; 1162 1163 // Settings and capabilities 1164 PMHW_RENDER_ENGINE_CAPS pHwCaps; // HW Capabilities 1165 PMHW_RENDER_STATE_SIZES pHwSizes; // Sizes of HW commands/states 1166 RENDERHAL_STATE_HEAP_SETTINGS StateHeapSettings; // State Heap Settings 1167 RENDERHAL_DYN_HEAP_SETTINGS DynamicHeapSettings; // Dynamic State Heap Settings 1168 1169 // MHW parameters 1170 MHW_STATE_BASE_ADDR_PARAMS StateBaseAddressParams; 1171 MHW_SIP_STATE_PARAMS SipStateParams; 1172 MHW_WALKER_MODE MediaWalkerMode; // Media object walker mode from Regkey: repel, dual mode, quad mode 1173 1174 RENDERHAL_SURFACE_STATE_TYPE SurfaceTypeDefault; // Surface State type default 1175 RENDERHAL_SURFACE_STATE_TYPE SurfaceTypeAdvanced; // Surface State type advanced 1176 1177 RENDERHAL_L3_CACHE_SETTINGS L3CacheSettings; // L3 Cache settings 1178 1179 bool bEnableYV12SinglePass; // Enabled YV12 single pass in 3D sampler 1180 bool bEnableP010SinglePass; // Enabled P010 single pass in sampler 1181 bool bSIPKernel; // SIP loaded 1182 bool bCSRKernel; // CSR loaded 1183 bool bTurboMode; // Turbo mode info to pass in cmdBuf 1184 bool bVDIWalker; // VDI Walker info from Regkey 1185 bool bRequestSingleSlice; // Single Slice Request flag 1186 bool bEUSaturationNoSSD; // No slice shutdown, must request 2 slices [CM EU saturation on] 1187 bool bEnableGpgpuMidBatchPreEmption; // Middle Batch Buffer Preemption 1188 bool bEnableGpgpuMidThreadPreEmption; // Middle Thread Preemption 1189 bool bComputeContextInUse; // Compute Context use for media 1190 1191 uint32_t dwMaskCrsThdConDataRdLn; // Unifies pfnSetupInterfaceDescriptor for g75,g8,... 1192 uint32_t dwMinNumberThreadsInGroup; // Unifies pfnSetupInterfaceDescriptor for g75,g8,... 1193 uint32_t dwCurbeBlockAlign; // Unifies pfnLoadCurbeData - Curbe Block Alignment 1194 uint32_t dwScratchSpaceMaxThreads; // Unifies pfnGetScratchSpaceSize - Threads used for scratch space calculation 1195 uint32_t dwSamplerAvsIncrement; // Unifies pfnSetSamplerStates 1196 1197 const void *sseuTable; // pointer of const VphalSseuSetting table on a platform 1198 1199 uint32_t dwIndirectHeapSize; 1200 uint32_t dwTimeoutMs; 1201 int32_t iMaxPalettes; 1202 int32_t iMaxPaletteEntries; 1203 MHW_PALETTE_PARAMS Palette[RENDERHAL_PALETTE_MAX]; 1204 1205 int32_t iMaxChromaKeys; 1206 int32_t iChromaKeyCount; 1207 MHW_CHROMAKEY_PARAMS ChromaKey[RENDERHAL_CHROMA_KEY_MAX]; 1208 1209 bool bHasCombinedAVSSamplerState; 1210 1211 // GD2 kernel debugging 1212 bool bIsaAsmDebugEnable; 1213 uint8_t cIsaAsmDebugSurfaceBTI; 1214 RENDERHAL_SURFACE IsaAsmDebugSurface; 1215 1216 // Performance collection 1217 bool bKerneltimeDump; 1218 double kernelTime[RENDERHAL_COMPONENT_COUNT]; 1219 1220 // Auxiliary data - for debugging purposes 1221 int32_t iMediaStatesInUse; // Media states in use 1222 int32_t iKernelsInUse; // Kernels in use 1223 int32_t iBuffersInUse; // BB in use 1224 1225 // Power option to control slice/subslice/EU shutdown 1226 RENDERHAL_POWEROPTION PowerOption; 1227 1228 // Indicates whether it's MDF load or not 1229 bool IsMDFLoad; 1230 1231 bool bDynamicStateHeap; //!< Indicates that DSH is in use 1232 1233 1234 FrameTrackerProducer trackerProducer; // Resource to mark command buffer completion 1235 RENDERHAL_TR_RESOURCE veBoxTrackerRes; // Resource to mark command buffer completion 1236 uint32_t currentTrackerIndex; // Record the tracker index 1237 1238 HeapManager *dgsheapManager; // Dynamic general state heap manager 1239 1240 #if (_DEBUG || _RELEASE_INTERNAL) 1241 // Dump state for VP debugging 1242 void *pStateDumper; 1243 #endif 1244 1245 // Pointer to vphal oca dumper object to dump vphal parameters. 1246 void *pVphalOcaDumper; 1247 1248 // Predication 1249 RENDERHAL_PREDICATION_SETTINGS PredicationParams; //!< Predication 1250 MOS_RESOURCE PredicationBuffer; //!< Predication buffer 1251 1252 // CSC Coefficient 1253 bool bCmfcCoeffUpdate; //!< CMFC CSC Coefficient Surface update flag 1254 int32_t iKernelAllocationID; //!< CMFC CSC Kernel Allocation ID 1255 PMOS_RESOURCE pCmfcCoeffSurface; //!< CMFC CSC Coefficient Surface 1256 1257 // SetMarker 1258 RENDERHAL_SETMARKER_SETTINGS SetMarkerParams; //!< SetMarker 1259 1260 // Indicates whether it's AVS or not 1261 bool bIsAVS; 1262 1263 bool isMMCEnabled; 1264 1265 MediaPerfProfiler *pPerfProfiler = nullptr; //!< Performance data profiler 1266 1267 //--------------------------- 1268 // HW interface functions 1269 //--------------------------- 1270 MOS_STATUS (* pfnInitialize)( 1271 PRENDERHAL_INTERFACE pRenderHal, 1272 PRENDERHAL_SETTINGS pSettings); 1273 1274 MOS_STATUS (* pfnDestroy) ( 1275 PRENDERHAL_INTERFACE pRenderHal); 1276 1277 MOS_STATUS (* pfnReset) ( 1278 PRENDERHAL_INTERFACE pRenderHal); 1279 1280 //--------------------------- 1281 // State Heap Functions 1282 //--------------------------- 1283 MOS_STATUS (* pfnAllocateStateHeaps) ( 1284 PRENDERHAL_INTERFACE pRenderHal, 1285 PRENDERHAL_STATE_HEAP_SETTINGS pSettings); 1286 1287 MOS_STATUS (* pfnFreeStateHeaps) ( 1288 PRENDERHAL_INTERFACE pRenderHal); 1289 1290 MOS_STATUS (* pfnRefreshSync) ( 1291 PRENDERHAL_INTERFACE pRenderHal); 1292 1293 //--------------------------- 1294 // SSH, surface states 1295 //--------------------------- 1296 MOS_STATUS (* pfnAssignSshInstance) ( 1297 PRENDERHAL_INTERFACE pRenderHal); 1298 1299 MOS_STATUS (* pfnGetSurfaceStateEntries) ( 1300 PRENDERHAL_INTERFACE pRenderHal, 1301 PRENDERHAL_SURFACE pRenderHalSurface, 1302 PRENDERHAL_SURFACE_STATE_PARAMS pParams, 1303 int32_t *piNumEntries, 1304 PRENDERHAL_SURFACE_STATE_ENTRY *ppSurfaceEntries); 1305 1306 MOS_STATUS (* pfnSetupSurfaceState) ( 1307 PRENDERHAL_INTERFACE pRenderHal, 1308 PRENDERHAL_SURFACE pRenderHalSurface, 1309 PRENDERHAL_SURFACE_STATE_PARAMS pParams, 1310 int32_t *piNumEntries, 1311 PRENDERHAL_SURFACE_STATE_ENTRY *ppSurfaceEntries, 1312 PRENDERHAL_OFFSET_OVERRIDE pOffsetOverride); 1313 1314 MOS_STATUS (*pfnSetupBufferSurfaceState) ( 1315 PRENDERHAL_INTERFACE pRenderHal, 1316 PRENDERHAL_SURFACE pRenderHalSurface, 1317 PRENDERHAL_SURFACE_STATE_PARAMS pParams, 1318 PRENDERHAL_SURFACE_STATE_ENTRY *ppSurfaceEntry); 1319 1320 MOS_STATUS (* pfnAssignSurfaceState) ( 1321 PRENDERHAL_INTERFACE pRenderHal, 1322 RENDERHAL_SURFACE_STATE_TYPE Type, 1323 PRENDERHAL_SURFACE_STATE_ENTRY *ppSurfaceEntry); 1324 1325 void (* pfnGetAlignUnit) ( 1326 uint16_t *pwWidthAlignUnit, 1327 uint16_t *pwHeightAlignUnit, 1328 PRENDERHAL_SURFACE pRenderHalSurface); 1329 1330 void (* pfnAdjustBoundary) ( 1331 PRENDERHAL_INTERFACE pRenderHal, 1332 PRENDERHAL_SURFACE pRenderHalSurface, 1333 RENDERHAL_SS_BOUNDARY Boundary, 1334 uint32_t *pdwSurfaceWidth, 1335 uint32_t *pdwSurfaceHeight); 1336 1337 uint32_t (* pfnSetSurfacesPerBT) ( 1338 PRENDERHAL_INTERFACE pRenderHal, 1339 uint32_t dwSurfacesPerBT); 1340 1341 uint16_t (* pfnCalculateYOffset) ( 1342 PMOS_INTERFACE pOsInterface, 1343 PMOS_RESOURCE pOsResource); 1344 1345 MOS_STATUS (* pfnAssignBindingTable) ( 1346 PRENDERHAL_INTERFACE pRenderHal, 1347 int32_t *piBindingTable); 1348 1349 MOS_STATUS (* pfnBindSurfaceState) ( 1350 PRENDERHAL_INTERFACE pRenderHal, 1351 int32_t iBindingTableIndex, 1352 int32_t iBindingTableEntry, 1353 PRENDERHAL_SURFACE_STATE_ENTRY pSurfaceEntry); 1354 1355 uint32_t (* pfnGetSurfaceMemoryObjectControl) ( 1356 PRENDERHAL_INTERFACE pRenderHal, 1357 PRENDERHAL_SURFACE_STATE_PARAMS pParams); 1358 1359 //--------------------------- 1360 // State Setup - HW + OS Specific 1361 //--------------------------- 1362 MOS_STATUS (* pfnSetupSurfaceStatesOs) ( 1363 PRENDERHAL_INTERFACE pRenderHal, 1364 PRENDERHAL_SURFACE_STATE_PARAMS pParams, 1365 PRENDERHAL_SURFACE_STATE_ENTRY pSurfaceStateEntry); 1366 1367 //--------------------------- 1368 // Batch Buffer 1369 //--------------------------- 1370 MOS_STATUS (* pfnAllocateBB) ( 1371 PRENDERHAL_INTERFACE pRenderHal, 1372 PMHW_BATCH_BUFFER pBatchBuffer, 1373 int32_t iSize); 1374 1375 MOS_STATUS (* pfnFreeBB) ( 1376 PRENDERHAL_INTERFACE pRenderHal, 1377 PMHW_BATCH_BUFFER pBatchBuffer); 1378 1379 MOS_STATUS (* pfnLockBB) ( 1380 PRENDERHAL_INTERFACE pRenderHal, 1381 PMHW_BATCH_BUFFER pBatchBuffer); 1382 1383 MOS_STATUS (* pfnUnlockBB) ( 1384 PRENDERHAL_INTERFACE pRenderHal, 1385 PMHW_BATCH_BUFFER pBatchBuffer); 1386 1387 //--------------------------- 1388 // Media State 1389 //--------------------------- 1390 PRENDERHAL_MEDIA_STATE (* pfnAssignMediaState) ( 1391 PRENDERHAL_INTERFACE pRenderHal, 1392 RENDERHAL_COMPONENT componentID); 1393 1394 //--------------------------- 1395 // Allocation 1396 //--------------------------- 1397 MOS_STATUS (* pfnEnablePalette) ( 1398 PRENDERHAL_INTERFACE pRenderHal, 1399 int32_t iPaletteID, 1400 int32_t iPaletteSize); 1401 1402 MOS_STATUS (* pfnAllocatePaletteID) ( 1403 PRENDERHAL_INTERFACE pRenderHal, 1404 int32_t *pPaletteID); 1405 1406 MOS_STATUS (* pfnFreePaletteID) ( 1407 PRENDERHAL_INTERFACE pRenderHal, 1408 int32_t *pPaletteID); 1409 1410 MOS_STATUS (* pfnGetPaletteEntry) ( 1411 PRENDERHAL_INTERFACE pRenderHal, 1412 int32_t iPaletteID, 1413 int32_t iInNumEntries, 1414 int32_t *piOutNumEntries, 1415 void **pPaletteData); 1416 1417 int32_t (* pfnAllocateChromaKey) ( 1418 PRENDERHAL_INTERFACE pRenderHal, 1419 uint32_t dwLow, 1420 uint32_t dwHigh); 1421 1422 int32_t (* pfnLoadCurbeData) ( 1423 PRENDERHAL_INTERFACE pRenderHal, 1424 PRENDERHAL_MEDIA_STATE pMediaState, 1425 void *pData, 1426 int32_t iSize); 1427 1428 MOS_STATUS (* pfnSetSamplerStates) ( 1429 PRENDERHAL_INTERFACE pRenderHal, 1430 int32_t iMediaID, 1431 PMHW_SAMPLER_STATE_PARAM pSamplerParams, 1432 int32_t iSamplers); 1433 1434 int32_t (* pfnAllocateMediaID) ( 1435 PRENDERHAL_INTERFACE pRenderHal, 1436 int32_t iKernelAllocationID, 1437 int32_t iBindingTableID, 1438 int32_t iCurbeOffset, 1439 int32_t iCurbeLength, 1440 int32_t iCrsThrdConstDataLn, 1441 PMHW_GPGPU_WALKER_PARAMS pGpGpuWalkerParams); 1442 1443 int32_t (* pfnGetMediaID) ( 1444 PRENDERHAL_INTERFACE pRenderHal, 1445 PRENDERHAL_MEDIA_STATE pMediaState, 1446 PRENDERHAL_KRN_ALLOCATION pKernelAllocation); 1447 1448 MOS_STATUS (* pfnSetupInterfaceDescriptor) ( 1449 PRENDERHAL_INTERFACE pRenderHal, 1450 PRENDERHAL_MEDIA_STATE pMediaState, 1451 PRENDERHAL_KRN_ALLOCATION pKernelAllocation, 1452 PRENDERHAL_INTERFACE_DESCRIPTOR_PARAMS pInterfaceDescriptorParams); 1453 1454 uint32_t (* pfnEncodeSLMSize)(PRENDERHAL_INTERFACE pRenderHal, uint32_t SLMSize); 1455 1456 //--------------------------- 1457 // Kernels 1458 //--------------------------- 1459 int32_t (* pfnLoadKernel) ( 1460 PRENDERHAL_INTERFACE pRenderHal, 1461 PCRENDERHAL_KERNEL_PARAM pParameters, 1462 PMHW_KERNEL_PARAM pKernel, 1463 Kdll_CacheEntry *pKernelEntry); 1464 1465 MOS_STATUS (* pfnUnloadKernel) ( 1466 PRENDERHAL_INTERFACE pRenderHal, 1467 int32_t iKernelAllocationID); 1468 1469 void (* pfnResetKernels) ( 1470 PRENDERHAL_INTERFACE pRenderHal); 1471 1472 void (* pfnTouchKernel) ( 1473 PRENDERHAL_INTERFACE pRenderHal, 1474 int32_t iKernelAllocationID); 1475 1476 int32_t (* pfnGetKernelOffset) ( 1477 PRENDERHAL_INTERFACE pRenderHal, 1478 int32_t iKernelAllocationIndex); 1479 1480 MOS_STATUS (* pfnUnregisterKernel) ( 1481 PRENDERHAL_INTERFACE pRenderHal, 1482 PRENDERHAL_KRN_ALLOCATION pKernelAllocation); 1483 1484 //--------------------------- 1485 // New Dynamic State Heap interfaces 1486 //--------------------------- 1487 MOS_STATUS(*pfnAssignSpaceInStateHeap)( 1488 uint32_t trackerIndex, 1489 FrameTrackerProducer *trackerProducer, 1490 HeapManager *heapManager, 1491 MemoryBlock *block, 1492 uint32_t size); 1493 1494 PRENDERHAL_MEDIA_STATE (* pfnAssignDynamicState) ( 1495 PRENDERHAL_INTERFACE pRenderHal, 1496 PRENDERHAL_DYNAMIC_MEDIA_STATE_PARAMS pParams, 1497 RENDERHAL_COMPONENT componentID); 1498 1499 MOS_STATUS (* pfnReleaseDynamicState) ( 1500 PRENDERHAL_INTERFACE pRenderHal, 1501 PRENDERHAL_MEDIA_STATE pMediaState); 1502 1503 MOS_STATUS (* pfnSubmitDynamicState) ( 1504 PRENDERHAL_INTERFACE pRenderHal, 1505 PRENDERHAL_MEDIA_STATE pMediaState); 1506 1507 int32_t (* pfnAllocateDynamicMediaID) ( 1508 PRENDERHAL_INTERFACE pRenderHal, 1509 PRENDERHAL_KRN_ALLOCATION pKernelAllocation, 1510 int32_t iBindingTableID, 1511 int32_t iCurbeOffset, 1512 int32_t iCurbeLength, 1513 int32_t iCrsThrdConstDataLn, 1514 PMHW_GPGPU_WALKER_PARAMS pGpGpuWalkerParams); 1515 1516 PRENDERHAL_KRN_ALLOCATION (* pfnLoadDynamicKernel) ( 1517 PRENDERHAL_INTERFACE pRenderHal, 1518 PCRENDERHAL_KERNEL_PARAM pParameters, 1519 PMHW_KERNEL_PARAM pKernel, 1520 uint32_t *pdwLoaded); 1521 1522 PRENDERHAL_KRN_ALLOCATION (* pfnSearchDynamicKernel) ( 1523 PRENDERHAL_INTERFACE pRenderHal, 1524 int32_t iKernelUniqueID, 1525 int32_t iCacheID); 1526 1527 PRENDERHAL_KRN_ALLOCATION (* pfnAllocateDynamicKernel) ( 1528 PRENDERHAL_INTERFACE pRenderHal, 1529 int32_t iKernelUniqueID, 1530 int32_t iCacheID); 1531 1532 MOS_STATUS (* pfnUnloadDynamicKernel) ( 1533 PRENDERHAL_INTERFACE pRenderHal, 1534 PRENDERHAL_KRN_ALLOCATION pKernelAllocation); 1535 1536 MOS_STATUS (* pfnRefreshDynamicKernels) ( 1537 PRENDERHAL_INTERFACE pRenderHal, 1538 uint32_t dwSpaceNeeded, 1539 uint32_t *pdwSizes, 1540 int32_t iCount); 1541 1542 void (* pfnResetDynamicKernels) ( 1543 PRENDERHAL_INTERFACE pRenderHal); 1544 1545 void (* pfnTouchDynamicKernel) ( 1546 PRENDERHAL_INTERFACE pRenderHal, 1547 PRENDERHAL_KRN_ALLOCATION pKernelAllocation); 1548 1549 MOS_STATUS (* pfnExpandKernelStateHeap)( 1550 PRENDERHAL_INTERFACE pRenderHal, 1551 uint32_t dwAdditionalKernelSpaceNeeded); 1552 1553 //--------------------------- 1554 // ISA ASM Debug support functions 1555 //--------------------------- 1556 int32_t (* pfnLoadDebugKernel)( 1557 PRENDERHAL_INTERFACE pRenderHal, 1558 PMHW_KERNEL_PARAM pKernel); 1559 1560 MOS_STATUS (* pfnLoadSipKernel) ( 1561 PRENDERHAL_INTERFACE pRenderHal, 1562 void *pSipKernel, 1563 uint32_t dwSipSize); 1564 1565 MOS_STATUS (* pfnSendSipStateCmd) ( 1566 PRENDERHAL_INTERFACE pRenderHal, 1567 PMOS_COMMAND_BUFFER pCmdBuffer); 1568 1569 //--------------------------- 1570 // HW interface configuration functions 1571 //--------------------------- 1572 MOS_STATUS (* pfnSetVfeStateParams) ( 1573 PRENDERHAL_INTERFACE pRenderHal, 1574 uint32_t dwDebugCounterControl, 1575 uint32_t dwMaximumNumberofThreads, 1576 uint32_t dwCURBEAllocationSize, 1577 uint32_t dwURBEntryAllocationSize, 1578 PMHW_VFE_SCOREBOARD pScoreboardParams); 1579 1580 bool (* pfnGetMediaWalkerStatus) ( 1581 PRENDERHAL_INTERFACE pRenderHal); 1582 1583 //--------------------------- 1584 // Command buffer programming functions 1585 //--------------------------- 1586 MOS_STATUS (* pfnSendStateBaseAddress) ( 1587 PRENDERHAL_INTERFACE pRenderHal, 1588 PMOS_COMMAND_BUFFER pCmdBuffer); 1589 1590 MOS_STATUS (* pfnSendMediaStates) ( 1591 PRENDERHAL_INTERFACE pRenderHal, 1592 PMOS_COMMAND_BUFFER pCmdBuffer, 1593 PMHW_WALKER_PARAMS pWalkerParams, 1594 PMHW_GPGPU_WALKER_PARAMS pGpGpuWalkerParams); 1595 1596 MOS_STATUS (* pfnInitCommandBuffer) ( 1597 PRENDERHAL_INTERFACE pRenderHal, 1598 PMOS_COMMAND_BUFFER pCmdBuffer, 1599 PRENDERHAL_GENERIC_PROLOG_PARAMS pGenericPrologParams); 1600 1601 MOS_STATUS (* pfnSendSurfaces) ( 1602 PRENDERHAL_INTERFACE pRenderHal, 1603 PMOS_COMMAND_BUFFER pCmdBuffer); 1604 1605 MOS_STATUS (* pfnSendSyncTag) ( 1606 PRENDERHAL_INTERFACE pRenderHal, 1607 PMOS_COMMAND_BUFFER pCmdBuffer); 1608 1609 MOS_STATUS (*pfnSendCscCoeffSurface) ( 1610 PRENDERHAL_INTERFACE pRenderHal, 1611 PMOS_COMMAND_BUFFER pCmdBuffer, 1612 PMOS_RESOURCE presCscCoeff, 1613 Kdll_CacheEntry *pKernelEntry); 1614 1615 void (* pfnSetupPrologParams) ( 1616 PRENDERHAL_INTERFACE renderHal, 1617 RENDERHAL_GENERIC_PROLOG_PARAMS *prologParams, 1618 PMOS_RESOURCE osResource, 1619 uint32_t offset, 1620 uint32_t tag); 1621 1622 // Samplers and other states 1623 MOS_STATUS (*pfnGetSamplerOffsetAndPtr) ( 1624 PRENDERHAL_INTERFACE pRenderHal, 1625 int32_t iMediaID, 1626 int32_t iSamplerID, 1627 PMHW_SAMPLER_STATE_PARAM pSamplerParams, 1628 uint32_t *pdwSamplerOffset, 1629 void **ppSampler); 1630 1631 MOS_STATUS (* pfnSendCurbeLoad) ( 1632 PRENDERHAL_INTERFACE pRenderHal, 1633 PMOS_COMMAND_BUFFER pCmdBuffer); 1634 1635 MOS_STATUS (* pfnSendMediaIdLoad) ( 1636 PRENDERHAL_INTERFACE pRenderHal, 1637 PMOS_COMMAND_BUFFER pCmdBuffer); 1638 1639 MOS_STATUS (* pfnSendChromaKey) ( 1640 PRENDERHAL_INTERFACE pRenderHal, 1641 PMOS_COMMAND_BUFFER pCmdBuffer); 1642 1643 MOS_STATUS (* pfnSendPalette) ( 1644 PRENDERHAL_INTERFACE pRenderHal, 1645 PMOS_COMMAND_BUFFER pCmdBuffer); 1646 1647 MOS_STATUS (* pfnSendSurfaceStateEntry) ( 1648 PRENDERHAL_INTERFACE pRenderHal, 1649 PMOS_COMMAND_BUFFER pCmdBuffer, 1650 PMHW_SURFACE_STATE_SEND_PARAMS pParams); 1651 1652 MOS_STATUS (* pfnSetSurfaceStateToken)( 1653 PRENDERHAL_INTERFACE pRenderHal, 1654 PMHW_SURFACE_TOKEN_PARAMS pParams, 1655 void *pSurfaceStateToken); 1656 1657 MOS_STATUS (* pfnSetSurfaceStateBuffer)( 1658 PRENDERHAL_INTERFACE pRenderHal, 1659 PMHW_RCS_SURFACE_PARAMS pParams, 1660 void *pSurfaceState); 1661 1662 //----------------------------- 1663 // Slice Shutdown Mode function 1664 //----------------------------- 1665 void (* pfnSetSliceShutdownMode) ( 1666 PRENDERHAL_INTERFACE pRenderHal, 1667 bool bMode); 1668 1669 //----------------------------- 1670 // General Slice Shut Down Mode function 1671 //----------------------------- 1672 void( *pfnSetPowerOptionMode ) ( 1673 PRENDERHAL_INTERFACE pRenderHal, 1674 PRENDERHAL_POWEROPTION pMode); 1675 1676 //----------------------------- 1677 // Enable Middle Batch Buffer Preemption 1678 //----------------------------- 1679 void (* pfnEnableGpgpuMiddleBatchBufferPreemption) ( 1680 PRENDERHAL_INTERFACE pRenderHal); 1681 1682 //----------------------------- 1683 // Enable Middle Thread Preemption 1684 //----------------------------- 1685 void (* pfnEnableGpgpuMiddleThreadPreemption) ( 1686 PRENDERHAL_INTERFACE pRenderHal); 1687 1688 //--------------------------- 1689 // Generic HAL Layer Commands and State Functions 1690 //--------------------------- 1691 void (* pfnConvertToNanoSeconds) ( 1692 PRENDERHAL_INTERFACE pRenderHal, 1693 uint64_t iTicks, 1694 uint64_t *piNs); 1695 1696 MOS_STATUS (* pfnSendRcsStatusTag) ( 1697 PRENDERHAL_INTERFACE pRenderHal, // [in] Hardware interface 1698 PMOS_COMMAND_BUFFER pCmdBuffer); // [in] Command Buffer 1699 1700 MOS_STATUS (* pfnSendTimingData) ( 1701 PRENDERHAL_INTERFACE pRenderHal, // [in] Hardware interface 1702 PMOS_COMMAND_BUFFER pCmdBuffer, // [in] Command Buffer 1703 bool bStartTime); // [in] Start Timestamp flag 1704 1705 uint32_t (* pfnGetScratchSpaceSize)( 1706 PRENDERHAL_INTERFACE pRenderHal, // [in] Hardware interface 1707 uint32_t iPerThreadScratchSpaceSize); // [in] Per thread scrach space size 1708 1709 bool (* pfnIs2PlaneNV12Needed) ( 1710 PRENDERHAL_INTERFACE pRenderHal, 1711 PRENDERHAL_SURFACE pRenderHalSurface, 1712 RENDERHAL_SS_BOUNDARY Boundary); 1713 1714 uint8_t (* pfnSetChromaDirection) ( 1715 PRENDERHAL_INTERFACE pRenderHal, 1716 PRENDERHAL_SURFACE pRenderHalSurface); 1717 1718 bool(*pfnPerThreadScratchSpaceStart2K) ( 1719 PRENDERHAL_INTERFACE pRenderHal); 1720 1721 //--------------------------- 1722 // Overwrite L3 Cache control register 1723 //--------------------------- 1724 MOS_STATUS (* pfnEnableL3Caching) ( 1725 PRENDERHAL_INTERFACE pRenderHal, 1726 PRENDERHAL_L3_CACHE_SETTINGS pCacheSettings); 1727 1728 MOS_STATUS(*pfnSetCacheOverrideParams) ( 1729 PRENDERHAL_INTERFACE pRenderHal, 1730 PRENDERHAL_L3_CACHE_SETTINGS pCacheSettings, 1731 bool bEnableSLM); 1732 1733 //----------------------------- 1734 //Platform related interface 1735 XRenderHal_Platform_Interface *pRenderHalPltInterface; 1736 1737 } RENDERHAL_INTERFACE; 1738 1739 //! 1740 //! \brief Functions 1741 //! 1742 1743 //! 1744 //! \brief Init Interface 1745 //! \details Initializes Render Hal Interface structure, responsible for HW 1746 //! abstraction of Render Engine for MDF/VP 1747 //! \param PRENDERHAL_INTERFACE pRenderHal 1748 //! [in] Pointer to Hardware Interface Structure 1749 //! \param MhwCpInterface** ppCpInterface 1750 //! [in/out] Pointer of pointer to MHW CP Interface Structure, which 1751 //! is created during renderhal initialization 1752 //! \param PMOS_INTERFACE pOsInterface 1753 //! [in] Pointer to OS Interface Structure 1754 //! \return MOS_STATUS 1755 //! MOS_STATUS_UNKNOWN : Invalid parameters 1756 //! 1757 MOS_STATUS RenderHal_InitInterface( 1758 PRENDERHAL_INTERFACE pRenderHal, 1759 MhwCpInterface **ppCpInterface, 1760 PMOS_INTERFACE pOsInterface); 1761 1762 //! 1763 //! \brief Init Interface using Dynamic State Heap 1764 //! \details Initializes RenderHal Interface structure, responsible for HW 1765 //! abstraction of HW Rendering Engine for CM(MDF) and VP. 1766 //! \param PRENDERHAL_INTERFACE pRenderHal 1767 //! [in] Pointer to RenderHal Interface Structure 1768 //! \param MhwCpInterface** ppCpInterface 1769 //! [in/out] Pointer of pointer to MHW CP Interface Structure, which 1770 //! is created during renderhal initialization 1771 //! \param PMOS_INTERFACE pOsInterface 1772 //! [in] Pointer to OS Interface Structure 1773 //! \return MOS_STATUS 1774 //! MOS_STATUS_UNKNOWN : Invalid parameters 1775 //! 1776 MOS_STATUS RenderHal_InitInterface_Dynamic( 1777 PRENDERHAL_INTERFACE pRenderHal, 1778 MhwCpInterface **ppCpInterface, 1779 PMOS_INTERFACE pOsInterface); 1780 1781 //! 1782 //! \brief Get Pixels Per Sample 1783 //! \details Get Number of Pixels per Dataport Sample 1784 //! \param MOS_FORMAT format 1785 //! [in] Surface Format 1786 //! \param uint32_t *pdwPixelsPerSampleUV 1787 //! [in] Pointer to dwPixelsPerSampleUV 1788 //! \return void 1789 //! 1790 void RenderHal_GetPixelsPerSample( 1791 MOS_FORMAT format, 1792 uint32_t *pdwPixelsPerSampleUV); 1793 1794 //! 1795 //! \brief Set Surface for HW Access 1796 //! \details Common Function for setting up surface state 1797 //! \param PRENDERHAL_INTERFACE pRenderHal 1798 //! [in] Pointer to Hardware Interface Structure 1799 //! \param PRENDERHAL_SURFACE pRenderHalSurface 1800 //! [in] Pointer to Render Hal Surface 1801 //! \param PRENDERHAL_SURFACE_STATE_PARAMS pSurfaceParams 1802 //! [in] Pointer to Surface Params 1803 //! \param int32_t iBindingTable 1804 //! [in] Binding Table to bind surface 1805 //! \param int32_t iBTEntry 1806 //! [in] Binding Table Entry index 1807 //! \param bool bWrite 1808 //! [in] Write mode flag 1809 //! \return MOS_STATUS 1810 //! MOS_STATUS_SUCCESS if success. Error code otherwise 1811 //! 1812 MOS_STATUS RenderHal_SetSurfaceForHwAccess( 1813 PRENDERHAL_INTERFACE pRenderHal, 1814 PRENDERHAL_SURFACE pRenderHalSurface, 1815 PRENDERHAL_SURFACE_STATE_PARAMS pSurfaceParams, 1816 int32_t iBindingTable, 1817 int32_t iBTEntry, 1818 bool bWrite); 1819 1820 //! 1821 //! \brief Set Buffer Surface for HW Access 1822 //! \details Common Function for setting up buffer surface state 1823 //! \param PRENDERHAL_INTERFACE pRenderHal 1824 //! [in] Pointer to Hardware Interface Structure 1825 //! \param PRENDERHAL_SURFACE pRenderHalSurface 1826 //! [in] Pointer to Render Hal Surface 1827 //! \param PRENDERHAL_SURFACE_STATE_PARAMS pSurfaceParams 1828 //! [in] Pointer to Surface Params 1829 //! \param int32_t iBindingTable 1830 //! [in] Binding Table to Bind Surface 1831 //! \param int32_t iBTEntry 1832 //! [in] Binding Table Entry index 1833 //! \param bool bWrite 1834 //! Write mode flag 1835 //! \return MOS_STATUS 1836 //! MOS_STATUS_SUCCESS if success. Error code otherwise 1837 //! 1838 MOS_STATUS RenderHal_SetBufferSurfaceForHwAccess( 1839 PRENDERHAL_INTERFACE pRenderHal, 1840 PRENDERHAL_SURFACE pRenderHalSurface, 1841 PRENDERHAL_SURFACE_STATE_PARAMS pSurfaceParams, 1842 int32_t iBindingTable, 1843 int32_t iBTEntry, 1844 bool bWrite); 1845 1846 //! 1847 //! \brief Get Surface Info from OsResource 1848 //! \details Update surface info in PRENDERHAL_SURFACE based on allocated OsResource 1849 //! \param PMOS_INTERFACE pOsInterface 1850 //! [in] Pointer to MOS_INTERFACE 1851 //! \param PRENDERHAL_GET_SURFACE_INFO pInfo 1852 //! [in] Pointer to RENDERHAL_GET_SURFACE_INFO 1853 //! \param PMOS_SURFACE pSurface 1854 //! [in/out] Pointer to PMOS_SURFACE 1855 //! \return MOS_STATUS 1856 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed 1857 //! 1858 MOS_STATUS RenderHal_GetSurfaceInfo( 1859 PMOS_INTERFACE pOsInterface, 1860 PRENDERHAL_GET_SURFACE_INFO pInfo, 1861 PMOS_SURFACE pSurface); 1862 1863 //! 1864 //! \brief Send Media States 1865 //! \details Send Media States 1866 //! \param PRENDERHAL_INTERFACE pRenderHal 1867 //! [in] Pointer to Hardware Interface Structure 1868 //! \param PMOS_COMMAND_BUFFER pCmdBuffer 1869 //! [in] Pointer to Command Buffer 1870 //! \param PRENDERHAL_GPGPU_WALKER_PARAMS pGpGpuWalkerParams 1871 //! [in] Pointer to GPGPU walker parameters 1872 //! \return MOS_STATUS 1873 //! 1874 MOS_STATUS RenderHal_SendMediaStates( 1875 PRENDERHAL_INTERFACE pRenderHal, 1876 PMOS_COMMAND_BUFFER pCmdBuffer, 1877 PMHW_WALKER_PARAMS pWalkerParams, 1878 PMHW_GPGPU_WALKER_PARAMS pGpGpuWalkerParams); 1879 1880 //! 1881 //! \brief Issue command to write timestamp 1882 //! \param [in] pRenderHal 1883 //! \param [in] pCmdBuffer 1884 //! \param [in] bStartTime 1885 //! \return MOS_STATUS 1886 //! 1887 MOS_STATUS RenderHal_SendTimingData( 1888 PRENDERHAL_INTERFACE pRenderHal, 1889 PMOS_COMMAND_BUFFER pCmdBuffer, 1890 bool bStartTime); 1891 1892 // Constants defined in RenderHal interface 1893 extern const MHW_PIPE_CONTROL_PARAMS g_cRenderHal_InitPipeControlParams; 1894 extern const MHW_VFE_PARAMS g_cRenderHal_InitVfeParams; 1895 extern const MHW_MEDIA_STATE_FLUSH_PARAM g_cRenderHal_InitMediaStateFlushParams; 1896 extern const RENDERHAL_KERNEL_PARAM g_cRenderHal_InitKernelParams; 1897 1898 #endif // __RENDERHAL_H__ 1899