1 /*
2 * Copyright (c) 2014-2018, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_state_heap_g10.c
24 //! \brief This modules implements HW interface layer to be used on all platforms on all operating systems/DDIs, across MHW components.
25 //!
26 #include "mhw_state_heap_g10.h"
27 #include "mhw_cp_interface.h"
28 #include "mhw_render_hwcmd_g10_X.h"
29
MHW_STATE_HEAP_INTERFACE_G10_X(PMOS_INTERFACE pInputOSInterface,int8_t bDynamicMode)30 MHW_STATE_HEAP_INTERFACE_G10_X::MHW_STATE_HEAP_INTERFACE_G10_X(
31 PMOS_INTERFACE pInputOSInterface, int8_t bDynamicMode):
32 MHW_STATE_HEAP_INTERFACE_GENERIC(pInputOSInterface, bDynamicMode)
33 {
34 m_wBtIdxAlignment = m_mhwNumBindingTableEntryOffset;
35 m_wIdAlignment = (1 << m_mhwGenericOffsetShift);
36 m_wCurbeAlignment = (1 << m_mhwGenericOffsetShift);
37
38 m_dwSizeSurfaceState = MOS_ALIGN_CEIL(mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
39 m_dwSizeSurfaceStateAdv = MOS_ALIGN_CEIL(mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
40 m_dwMaxSurfaceStateSize = MOS_MAX(m_dwSizeSurfaceState, m_dwSizeSurfaceStateAdv);
41 m_wSizeOfInterfaceDescriptor = mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD::byteSize;
42 m_wSizeOfCmdInterfaceDescriptorData = MOS_ALIGN_CEIL(m_wSizeOfInterfaceDescriptor, m_wIdAlignment);
43 m_wSizeOfCmdSamplerState = mhw_state_heap_g10_X::SAMPLER_STATE_CMD::byteSize;
44
45 InitHwSizes();
46 }
47
~MHW_STATE_HEAP_INTERFACE_G10_X()48 MHW_STATE_HEAP_INTERFACE_G10_X::~MHW_STATE_HEAP_INTERFACE_G10_X()
49 {
50 MHW_FUNCTION_ENTER;
51 }
52
InitHwSizes()53 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G10_X::InitHwSizes()
54 {
55 m_HwSizes.dwSizeMediaObjectHeaderCmd = mhw_render_g10_X::MEDIA_OBJECT_CMD::byteSize;
56 m_HwSizes.dwSizeSurfaceState = MOS_ALIGN_CEIL(mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
57 m_HwSizes.dwSizeSurfaceStateAvs = MOS_ALIGN_CEIL(mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
58 m_HwSizes.dwMaxSizeSurfaceState = MOS_MAX(m_HwSizes.dwSizeSurfaceState, m_HwSizes.dwSizeSurfaceStateAvs);
59 m_HwSizes.dwSizeBindingTableState = mhw_state_heap_g10_X::BINDING_TABLE_STATE_CMD::byteSize;
60 m_HwSizes.dwSizeSamplerState = mhw_state_heap_g10_X::SAMPLER_STATE_CMD::byteSize;
61 m_HwSizes.dwSizeSamplerIndirectState = mhw_state_heap_g10_X::SAMPLER_INDIRECT_STATE_CMD::byteSize;
62 m_HwSizes.dwSizeSamplerStateVA = mhw_state_heap_g10_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD::byteSize; // MinMaxFilter, Erode, Dilate functions
63 m_HwSizes.dwSizeSamplerStateVAConvolve = mhw_state_heap_g10_X::SAMPLER_STATE_8x8_CONVOLVE_CMD::byteSize;
64 m_HwSizes.dwSizeSamplerStateTable8x8 = mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_CMD::byteSize - 16 * sizeof(uint32_t); // match old definitions to table size
65 m_HwSizes.dwSizeSampler8x8Table =
66 MOS_ALIGN_CEIL(m_HwSizes.dwSizeSamplerStateTable8x8, MHW_SAMPLER_STATE_ALIGN);
67 m_HwSizes.dwSizeSamplerStateAvs =
68 MOS_ALIGN_CEIL(mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_CMD::byteSize, MHW_SAMPLER_STATE_AVS_ALIGN_MEDIA);
69 m_HwSizes.dwSizeInterfaceDescriptor = mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD::byteSize;
70 m_HwSizes.dwSizeMediaWalkerBlock = 16;
71
72 return MOS_STATUS_SUCCESS;
73 }
74
SetInterfaceDescriptorEntry(PMHW_ID_ENTRY_PARAMS pParams)75 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G10_X::SetInterfaceDescriptorEntry(
76 PMHW_ID_ENTRY_PARAMS pParams)
77 {
78 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
79
80 MHW_FUNCTION_ENTER;
81
82 //------------------------------------
83 MHW_MI_CHK_NULL(pParams);
84 //------------------------------------
85
86 // Ensures that the Media ID base is correct
87 MHW_ASSERT(MOS_IS_ALIGNED(pParams->dwMediaIdOffset, m_wIdAlignment));
88
89 uint8_t *pStateHeapBase;
90 if (pParams->pGeneralStateHeap)
91 {
92 pStateHeapBase = (uint8_t*)pParams->pGeneralStateHeap->pvLockedHeap;
93 }
94 else
95 {
96 pStateHeapBase = (uint8_t*)(GetDSHPointer()->pvLockedHeap);
97 }
98
99 mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD *pInterfaceDescriptor;
100 pInterfaceDescriptor = (mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD *)
101 (pStateHeapBase + // State Heap Base
102 pParams->dwMediaIdOffset + // Offset to first Media ID
103 pParams->iMediaId * m_wSizeOfInterfaceDescriptor); // Offset to current ID
104 *pInterfaceDescriptor = mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD();
105
106 pInterfaceDescriptor->DW0.KernelStartPointer = pParams->dwKernelOffset >> MHW_KERNEL_OFFSET_SHIFT;
107 pInterfaceDescriptor->DW3.SamplerStatePointer = pParams->dwSamplerOffset >> MHW_SAMPLER_SHIFT;
108 pInterfaceDescriptor->DW3.SamplerCount = pParams->dwSamplerCount;
109 pInterfaceDescriptor->DW4.BindingTablePointer = MOS_ROUNDUP_SHIFT(pParams->dwBindingTableOffset, MHW_BINDING_TABLE_ID_SHIFT);
110 pInterfaceDescriptor->DW5.ConstantUrbEntryReadOffset = pParams->iCurbeOffset >> MHW_CURBE_SHIFT;
111 pInterfaceDescriptor->DW5.ConstantIndirectUrbEntryReadLength = MOS_ROUNDUP_SHIFT(pParams->iCurbeLength, MHW_CURBE_SHIFT);
112 pInterfaceDescriptor->DW6.GlobalBarrierEnable = pParams->bGlobalBarrierEnable;
113 pInterfaceDescriptor->DW6.BarrierEnable = pParams->bBarrierEnable;
114 pInterfaceDescriptor->DW6.NumberOfThreadsInGpgpuThreadGroup = pParams->dwNumberofThreadsInGPGPUGroup;
115 pInterfaceDescriptor->DW6.SharedLocalMemorySize = pParams->dwSharedLocalMemorySize;
116 pInterfaceDescriptor->DW7.CrossThreadConstantDataReadLength = pParams->iCrsThdConDataRdLn >> MHW_THRD_CON_DATA_RD_SHIFT;
117
118 return eStatus;
119 }
120
AddInterfaceDescriptorData(PMHW_ID_ENTRY_PARAMS pParams)121 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G10_X::AddInterfaceDescriptorData(
122 PMHW_ID_ENTRY_PARAMS pParams)
123 {
124 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
125
126 MHW_FUNCTION_ENTER;
127
128 //------------------------------------
129 MHW_MI_CHK_NULL(pParams);
130 //------------------------------------
131
132 // Ensures that the Media ID base is correct
133 MHW_ASSERT(MOS_IS_ALIGNED(pParams->dwMediaIdOffset, m_wIdAlignment));
134
135 uint32_t offset = pParams->dwMediaIdOffset + pParams->iMediaId * m_wSizeOfInterfaceDescriptor;
136
137 mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD *pInterfaceDescriptor;
138 pInterfaceDescriptor = (mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD *)MOS_AllocMemory(sizeof(mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD));
139 MHW_MI_CHK_NULL(pInterfaceDescriptor);
140 *pInterfaceDescriptor = mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD();
141
142 pInterfaceDescriptor->DW0.KernelStartPointer = pParams->dwKernelOffset >> MHW_KERNEL_OFFSET_SHIFT;
143 pInterfaceDescriptor->DW3.SamplerStatePointer = pParams->dwSamplerOffset >> MHW_SAMPLER_SHIFT;
144 pInterfaceDescriptor->DW3.SamplerCount = pParams->dwSamplerCount;
145 pInterfaceDescriptor->DW4.BindingTablePointer = MOS_ROUNDUP_SHIFT(pParams->dwBindingTableOffset, MHW_BINDING_TABLE_ID_SHIFT);
146 pInterfaceDescriptor->DW5.ConstantUrbEntryReadOffset = pParams->iCurbeOffset >> MHW_CURBE_SHIFT;
147 pInterfaceDescriptor->DW5.ConstantIndirectUrbEntryReadLength = MOS_ROUNDUP_SHIFT(pParams->iCurbeLength, MHW_CURBE_SHIFT);
148 pInterfaceDescriptor->DW6.GlobalBarrierEnable = pParams->bGlobalBarrierEnable;
149 pInterfaceDescriptor->DW6.BarrierEnable = pParams->bBarrierEnable;
150 pInterfaceDescriptor->DW6.NumberOfThreadsInGpgpuThreadGroup = pParams->dwNumberofThreadsInGPGPUGroup;
151 pInterfaceDescriptor->DW6.SharedLocalMemorySize = pParams->dwSharedLocalMemorySize;
152 pInterfaceDescriptor->DW7.CrossThreadConstantDataReadLength = pParams->iCrsThdConDataRdLn >> MHW_THRD_CON_DATA_RD_SHIFT;
153
154 // need to subtract memory block's offset in current state heap for AddData API
155 offset -= pParams->memoryBlock->GetOffset();
156 pParams->memoryBlock->AddData(pInterfaceDescriptor, offset,
157 sizeof(mhw_state_heap_g10_X::INTERFACE_DESCRIPTOR_DATA_CMD));
158
159 MOS_SafeFreeMemory(pInterfaceDescriptor);
160
161 return eStatus;
162 }
163
SetSurfaceStateEntry(PMHW_SURFACE_STATE_PARAMS pParams)164 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G10_X::SetSurfaceStateEntry(
165 PMHW_SURFACE_STATE_PARAMS pParams)
166 {
167
168 if (!pParams)
169 {
170 return MOS_STATUS_INVALID_PARAMETER;
171 }
172
173 uint32_t TileMode = (pParams->bTiledSurface) ? ((pParams->bTileWalk == 0) ? 2 /*x-tile*/: 3 /*y-tile*/) : 0; /*linear*/
174
175 if (pParams->bUseAdvState)
176 {
177 // Obtain the Pointer to the Surface state from SSH Buffer
178 mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD* pSurfaceStateAdv =
179 (mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD*) pParams->pSurfaceState;
180
181 // Initialize Surface State
182 *pSurfaceStateAdv = mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD();
183
184 pSurfaceStateAdv->DW0.Rotation = pParams->RotationMode;
185 pSurfaceStateAdv->DW0.XOffset = pParams->iXOffset >> 2;
186 pSurfaceStateAdv->DW0.YOffset = pParams->iYOffset >> 2;
187 pSurfaceStateAdv->DW1.Width = pParams->dwWidth - 1;
188 pSurfaceStateAdv->DW1.Height = pParams->dwHeight - 1;
189 pSurfaceStateAdv->DW1.CrVCbUPixelOffsetVDirection = pParams->UVPixelOffsetVDirection & 3;
190 pSurfaceStateAdv->DW2.CrVCbUPixelOffsetVDirectionMsb = pParams->UVPixelOffsetVDirection >> 2;
191 pSurfaceStateAdv->DW2.CrVCbUPixelOffsetUDirection = pParams->UVPixelOffsetUDirection;
192 pSurfaceStateAdv->DW2.SurfaceFormat = pParams->dwFormat;
193 pSurfaceStateAdv->DW2.InterleaveChroma = pParams->bInterleaveChroma;
194 pSurfaceStateAdv->DW2.SurfacePitch = pParams->dwPitch - 1;
195 pSurfaceStateAdv->DW2.HalfPitchForChroma = pParams->bHalfPitchChroma;
196 pSurfaceStateAdv->DW2.TileMode = TileMode;
197 pSurfaceStateAdv->DW2.MemoryCompressionEnable = pParams->bCompressionEnabled;
198 pSurfaceStateAdv->DW2.MemoryCompressionMode = pParams->bCompressionMode;
199 pSurfaceStateAdv->DW3.XOffsetForUCb = pParams->dwXOffsetForU;
200 pSurfaceStateAdv->DW3.YOffsetForUCb = pParams->dwYOffsetForU;
201 pSurfaceStateAdv->DW4.XOffsetForVCr = pParams->dwXOffsetForV;
202 pSurfaceStateAdv->DW4.YOffsetForVCr = pParams->dwYOffsetForV;
203 pSurfaceStateAdv->DW5.VerticalLineStride = pParams->bVerticalLineStride;
204 pSurfaceStateAdv->DW5.VerticalLineStrideOffset = pParams->bVerticalLineStrideOffset;
205 pSurfaceStateAdv->DW5.SurfaceMemoryObjectControlState = pParams->dwCacheabilityControl;
206
207 // Return offset and pointer for patching
208 pParams->pdwCmd = (uint32_t *)&(pSurfaceStateAdv->DW6.Value);
209 pParams->dwLocationInCmd = 6;
210 }
211 else // not AVS
212 {
213 // Obtain the Pointer to the Surface state from SSH Buffer
214 mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD * pSurfaceState =
215 (mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD *) pParams->pSurfaceState;
216
217 // Initialize Surface State
218 *pSurfaceState = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD();
219
220 pSurfaceState->DW0.SurfaceType = pParams->SurfaceType3D;
221 pSurfaceState->DW0.SurfaceFormat = pParams->dwFormat;
222 pSurfaceState->DW0.TileMode = TileMode;
223 pSurfaceState->DW0.VerticalLineStride = pParams->bVerticalLineStride;
224 pSurfaceState->DW0.VerticalLineStrideOffset = pParams->bVerticalLineStrideOffset;
225 pSurfaceState->DW0.SurfaceHorizontalAlignment = 1;
226 pSurfaceState->DW0.SurfaceVerticalAlignment = 1;
227
228 pSurfaceState->DW1.MemoryObjectControlState = pParams->dwCacheabilityControl;
229
230 if (pParams->SurfaceType3D == GFX3DSTATE_SURFACETYPE_BUFFER)
231 { // Buffer resources - use original width/height/pitch/depth
232 pSurfaceState->DW2.Width = pParams->dwWidth;
233 pSurfaceState->DW2.Height = pParams->dwHeight;
234 pSurfaceState->DW3.SurfacePitch = pParams->dwPitch;
235 pSurfaceState->DW3.Depth = pParams->dwDepth;
236 }
237 else
238 {
239 pSurfaceState->DW1.SurfaceQpitch = pParams->dwQPitch >> 2;
240 pSurfaceState->DW2.Width = pParams->dwWidth - 1;
241 pSurfaceState->DW2.Height = pParams->dwHeight - 1;
242 pSurfaceState->DW3.SurfacePitch = pParams->dwPitch - 1;
243 pSurfaceState->DW3.Depth = pParams->dwDepth - 1;
244 }
245 pSurfaceState->DW4.RenderTargetAndSampleUnormRotation = pParams->RotationMode;
246 pSurfaceState->DW5.XOffset = pParams->iXOffset >> 2;
247 pSurfaceState->DW5.YOffset = pParams->iYOffset >> 2;
248 pSurfaceState->DW6.Obj0.SeparateUvPlaneEnable = pParams->bSeperateUVPlane;
249 pSurfaceState->DW6.Obj0.XOffsetForUOrUvPlane = pParams->dwXOffsetForU;
250 pSurfaceState->DW6.Obj0.YOffsetForUOrUvPlane = pParams->dwYOffsetForU;
251
252 // R8B8G8A8 is designed to represent media AYUV format.
253 // From Gen10+ 3D sampler doesn't support R8B8G8A8 format any more.
254 // Use R8G8B8A8 + Channel Select to fake it.
255 if (pParams->dwFormat == MHW_GFX3DSTATE_SURFACEFORMAT_R8B8G8A8_UNORM)
256 {
257 pSurfaceState->DW0.SurfaceFormat = MHW_GFX3DSTATE_SURFACEFORMAT_R8G8B8A8_UNORM;
258 pSurfaceState->DW7.ShaderChannelSelectAlpha = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_ALPHA_ALPHA;
259 pSurfaceState->DW7.ShaderChannelSelectBlue = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_GREEN_GREEN;
260 pSurfaceState->DW7.ShaderChannelSelectGreen = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_BLUE_BLUE;
261 pSurfaceState->DW7.ShaderChannelSelectRed = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_RED_RED;
262 }
263 else
264 {
265 pSurfaceState->DW7.ShaderChannelSelectAlpha = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_ALPHA_ALPHA;
266 pSurfaceState->DW7.ShaderChannelSelectBlue = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_BLUE_BLUE;
267 pSurfaceState->DW7.ShaderChannelSelectGreen = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_GREEN_GREEN;
268 pSurfaceState->DW7.ShaderChannelSelectRed = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_RED_RED;
269 }
270
271 pSurfaceState->DW7.MemoryCompressionEnable = pParams->bCompressionEnabled;
272 pSurfaceState->DW7.MemoryCompressionMode = pParams->bCompressionMode;
273 pSurfaceState->DW8_9.SurfaceBaseAddress = 0;
274
275 pSurfaceState->DW10_11.Obj3.XOffsetForVPlane = pParams->dwXOffsetForV;
276 pSurfaceState->DW10_11.Obj3.YOffsetForVPlane = pParams->dwYOffsetForV;
277
278 // Return offset and pointer for patching
279 pParams->pdwCmd = (uint32_t *)&(pSurfaceState->DW8_9.SurfaceBaseAddress);
280 pParams->dwLocationInCmd = 8;
281 }
282
283 return MOS_STATUS_SUCCESS;
284 }
285
SetSurfaceState(PMHW_KERNEL_STATE pKernelState,PMOS_COMMAND_BUFFER pCmdBuffer,uint32_t dwNumSurfaceStatesToSet,PMHW_RCS_SURFACE_PARAMS pParams)286 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G10_X::SetSurfaceState(
287 PMHW_KERNEL_STATE pKernelState,
288 PMOS_COMMAND_BUFFER pCmdBuffer,
289 uint32_t dwNumSurfaceStatesToSet,
290 PMHW_RCS_SURFACE_PARAMS pParams)
291 {
292 PMOS_INTERFACE pOsInterface;
293 uint8_t *pIndirectState = nullptr;
294 MHW_RESOURCE_PARAMS ResourceParams;
295 uint32_t uiIndirectStateOffset = 0, uiIndirectStateSize = 0;
296 PMHW_STATE_HEAP pStateHeap;
297 uint32_t dwSurfaceType = GFX3DSTATE_SURFACETYPE_NULL; // GFX3DSTATE_SURFACETYPE
298 uint32_t i; // Plane Index
299 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
300
301 MHW_FUNCTION_ENTER;
302
303 MHW_MI_CHK_NULL(pParams);
304 MHW_MI_CHK_NULL(pParams->psSurface);
305 MOS_UNUSED(dwNumSurfaceStatesToSet);
306
307 if (pParams->dwNumPlanes >= MHW_MAX_SURFACE_PLANES)
308 {
309 MHW_ASSERTMESSAGE("Invalid plane number provided");
310 eStatus = MOS_STATUS_INVALID_PARAMETER;
311 return eStatus;
312 }
313
314 pOsInterface = m_pOsInterface;
315 pStateHeap = &m_SurfaceStateHeap;
316
317 MHW_MI_CHK_NULL(pOsInterface);
318 MHW_MI_CHK_STATUS(pOsInterface->pfnGetIndirectStatePointer(pOsInterface, &pIndirectState));
319 MHW_MI_CHK_STATUS(pOsInterface->pfnGetIndirectState(pOsInterface, &uiIndirectStateOffset, &uiIndirectStateSize));
320
321 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
322 ResourceParams.dwLsbNum = 0; // MHW_STATE_HEAP_SURFACE_STATE_SHIFT
323
324 for ( i = 0; i < pParams->dwNumPlanes; i++)
325 {
326 MHW_ASSERT_INVALID_BINDING_TABLE_IDX(pParams->dwBindingTableOffset[i]);
327 MHW_MI_CHK_NULL(pKernelState);
328 uint32_t u32SurfaceOffsetInSsh =
329 pKernelState->dwSshOffset + pKernelState->dwBindingTableSize + // offset within SSH to start of surfaces for this kernel
330 (m_HwSizes.dwMaxSizeSurfaceState * pParams->dwBindingTableOffset[i]); // offset to the current surface
331 if (u32SurfaceOffsetInSsh + m_HwSizes.dwMaxSizeSurfaceState > uiIndirectStateOffset)
332 {
333 MHW_ASSERTMESSAGE("Location requested for surface state is outside the bounds of SSH");
334 return MOS_STATUS_INVALID_PARAMETER;
335 }
336 uint8_t *pLocationOfSurfaceInSsh = (uint8_t*)
337 (pIndirectState + u32SurfaceOffsetInSsh);
338
339 if (pParams->bUseAdvState)
340 {
341 mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD *pCmd =
342 (mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD*)pLocationOfSurfaceInSsh;
343 MHW_MI_CHK_NULL(pCmd);
344
345 *pCmd = mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD();
346
347 pCmd->DW1.Width = (pParams->dwWidthToUse[i] == 0) ?
348 pParams->psSurface->dwWidth - 1 : pParams->dwWidthToUse[i] - 1;
349 pCmd->DW1.Height = (pParams->dwHeightToUse[i] == 0) ?
350 pParams->psSurface->dwHeight - 1: pParams->dwHeightToUse[i] - 1;
351 pCmd->DW1.CrVCbUPixelOffsetVDirection = pParams->Direction;
352
353 pCmd->DW2.SurfacePitch = pParams->psSurface->dwPitch - 1;
354 pCmd->DW2.SurfaceFormat = pParams->ForceSurfaceFormat[i];
355 pCmd->DW2.InterleaveChroma = pParams->bInterleaveChroma;
356
357 if (IS_Y_MAJOR_TILE_FORMAT(pParams->psSurface->TileType))
358 {
359 pCmd->DW2.TileMode = mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD::TILE_MODE_TILEMODEYMAJOR;
360 }
361 else if (pParams->psSurface->TileType == MOS_TILE_LINEAR)
362 {
363 pCmd->DW2.TileMode = mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD::TILE_MODE_TILEMODELINEAR;
364 }
365 else if (pParams->psSurface->TileType == MOS_TILE_X)
366 {
367 pCmd->DW2.TileMode = mhw_state_heap_g10_X::MEDIA_SURFACE_STATE_CMD::TILE_MODE_TILEMODEXMAJOR;
368 }
369
370 if(pParams->psSurface->bCompressible)
371 {
372 MHW_MI_CHK_STATUS(pOsInterface->pfnGetMemoryCompressionMode(pOsInterface, &pParams->psSurface->OsResource, (PMOS_MEMCOMP_STATE) &pParams->psSurface->CompressionMode));
373
374 pCmd->DW2.MemoryCompressionEnable =
375 (pParams->psSurface->CompressionMode == MOS_MMC_DISABLED) ? 0 : 1;
376 pCmd->DW2.MemoryCompressionMode =
377 (pParams->psSurface->CompressionMode == MOS_MMC_VERTICAL) ? 1 : 0;
378 }
379
380 pCmd->DW5.SurfaceMemoryObjectControlState = pParams->dwCacheabilityControl;
381
382 pCmd->DW5.TiledResourceMode = Mhw_ConvertToTRMode(pParams->psSurface->TileType);
383
384 if (i == MHW_U_PLANE) // AVS U plane
385 {
386 // Lockoffset is the offset from base address of Y plane to the origin of U/V plane.
387 // So, We can get XOffsetforU by Lockoffset % pSurface->dwPitch, and get YOffsetForU by Lockoffset / pSurface->dwPitch
388 /*pCmd->DW0.XOffset = pParams->psSurface->UPlaneOffset.iXOffset >> 2;
389 pCmd->DW0.YOffset = pParams->psSurface->UPlaneOffset.iYOffset >> 2;
390
391 pCmd->DW3.XOffsetforU = ((uint32_t)pParams->psSurface->UPlaneOffset.iLockSurfaceOffset % pSurface->dwPitch);
392 pCmd->DW3.YOffsetforU = ((uint32_t)pParams->psSurface->UPlaneOffset.iLockSurfaceOffset / pSurface->dwPitch);*/
393
394 pCmd->DW3.YOffsetForUCb = pParams->psSurface->UPlaneOffset.iYOffset;
395 }
396 else if (i == MHW_V_PLANE) // AVS V plane
397 {
398 pCmd->DW0.XOffset = pParams->psSurface->VPlaneOffset.iXOffset >> 2;
399 pCmd->DW0.YOffset = pParams->psSurface->VPlaneOffset.iYOffset >> 2;
400
401 //pCmd->DW4.XOffsetforV = ((uint32_t)pParams->psSurface->UPlaneOffset.iLockSurfaceOffset % pSurface->dwPitch);
402 //pCmd->DW4.YOffsetforV = ((uint32_t)pParams->psSurface->VPlaneOffset.iLockSurfaceOffset / pSurface->dwPitch);
403 }
404 else // AVS/DNDI Y plane
405 {
406 pCmd->DW3.XOffsetForUCb = pParams->dwXOffset[MHW_U_PLANE];
407 pCmd->DW3.YOffsetForUCb = pParams->dwYOffset[MHW_U_PLANE];
408 pCmd->DW4.XOffsetForVCr = pParams->dwXOffset[MHW_V_PLANE];
409 pCmd->DW4.YOffsetForVCr = pParams->dwYOffset[MHW_V_PLANE];
410 }
411
412 pCmd->DW3.YOffsetForUCb = pParams->psSurface->UPlaneOffset.iYOffset;
413
414 ResourceParams.presResource = &pParams->psSurface->OsResource;
415 ResourceParams.dwOffset =
416 pParams->psSurface->dwOffset + pParams->dwBaseAddrOffset[i];
417 ResourceParams.pdwCmd = &(pCmd->DW6.Value);
418 ResourceParams.dwLocationInCmd = 6;
419 ResourceParams.bIsWritable = pParams->bIsWritable;
420 ResourceParams.dwOffsetInSSH =
421 uiIndirectStateOffset +
422 pKernelState->dwSshOffset +
423 pKernelState->dwBindingTableSize +
424 (pParams->dwBindingTableOffset[i] * m_dwMaxSurfaceStateSize);
425 ResourceParams.HwCommandType = MOS_SURFACE_STATE_ADV;
426
427 MHW_MI_CHK_STATUS(m_pfnAddResourceToCmd(
428 pOsInterface,
429 pCmdBuffer,
430 &ResourceParams));
431 }
432 else // 1D, 2D Surface
433 {
434 mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD *pCmd =
435 (mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD*)pLocationOfSurfaceInSsh;
436 MHW_MI_CHK_NULL(pCmd);
437
438 mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD CmdInit;
439 // Add additional defaults specific to media
440 CmdInit.DW0.SurfaceHorizontalAlignment = 1;
441 CmdInit.DW0.SurfaceVerticalAlignment = 1;
442 CmdInit.DW7.ShaderChannelSelectAlpha = CmdInit.SHADER_CHANNEL_SELECT_ALPHA_ALPHA;
443 CmdInit.DW7.ShaderChannelSelectBlue = CmdInit.SHADER_CHANNEL_SELECT_BLUE_BLUE;
444 CmdInit.DW7.ShaderChannelSelectGreen = CmdInit.SHADER_CHANNEL_SELECT_GREEN_GREEN;
445 CmdInit.DW7.ShaderChannelSelectRed = CmdInit.SHADER_CHANNEL_SELECT_RED_RED;
446 *pCmd = CmdInit;
447
448 MHW_MI_CHK_STATUS(Mhw_SurfaceFormatToType(
449 pParams->ForceSurfaceFormat[i],
450 pParams->psSurface,
451 &dwSurfaceType));
452
453 pCmd->DW0.SurfaceType = dwSurfaceType;
454 pCmd->DW0.VerticalLineStride = pParams->bVertLineStride;
455 pCmd->DW0.VerticalLineStrideOffset = pParams->bVertLineStrideOffs;
456 pCmd->DW0.MediaBoundaryPixelMode = pParams->MediaBoundaryPixelMode;
457 pCmd->DW0.SurfaceFormat = pParams->ForceSurfaceFormat[i];
458
459 if (IS_Y_MAJOR_TILE_FORMAT(pParams->psSurface->TileType))
460 {
461 pCmd->DW0.TileMode = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::TILE_MODE_YMAJOR;
462 }
463 else if (pParams->psSurface->TileType == MOS_TILE_LINEAR)
464 {
465 pCmd->DW0.TileMode = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::TILE_MODE_LINEAR;
466 }
467 else if (pParams->psSurface->TileType == MOS_TILE_X)
468 {
469 pCmd->DW0.TileMode = mhw_state_heap_g10_X::RENDER_SURFACE_STATE_CMD::TILE_MODE_XMAJOR;
470 }
471
472 pCmd->DW1.MemoryObjectControlState = pParams->dwCacheabilityControl;
473
474 pCmd->DW2.Width = (pParams->dwWidthToUse[i] == 0) ?
475 pParams->psSurface->dwWidth : pParams->dwWidthToUse[i];
476 pCmd->DW2.Height = (pParams->dwHeightToUse[i] == 0) ?
477 pParams->psSurface->dwHeight : pParams->dwHeightToUse[i];
478 pCmd->DW3.SurfacePitch = (pParams->dwPitchToUse[i] == 0) ?
479 pParams->psSurface->dwPitch : pParams->dwPitchToUse[i];
480
481 if(pParams->psSurface->bCompressible)
482 {
483 MHW_MI_CHK_STATUS(pOsInterface->pfnGetMemoryCompressionMode(pOsInterface, &pParams->psSurface->OsResource, (PMOS_MEMCOMP_STATE) &pParams->psSurface->CompressionMode));
484
485 pCmd->DW7.MemoryCompressionEnable =
486 (pParams->psSurface->CompressionMode == MOS_MMC_DISABLED) ? 0 : 1;
487 pCmd->DW7.MemoryCompressionMode =
488 (pParams->psSurface->CompressionMode == MOS_MMC_VERTICAL) ? 1 : 0;
489 }
490
491 pCmd->DW3.SurfacePitch--; // both for 1D & 2D surface
492 pCmd->DW3.Depth = pParams->psSurface->dwDepth;
493
494 if (dwSurfaceType == GFX3DSTATE_SURFACETYPE_BUFFER)
495 {
496 if (pCmd->DW0.TileMode)
497 {
498 MHW_ASSERTMESSAGE("1D surfaces should not be tiled!");
499 eStatus = MOS_STATUS_INVALID_PARAMETER;
500 return eStatus;
501 }
502 }
503 else // 2D Surface
504 {
505 pCmd->DW2.Width--;
506 pCmd->DW2.Height--;
507 pCmd->DW3.Depth--;
508 pCmd->DW5.XOffset = pParams->dwXOffset[i] >> 2;
509 pCmd->DW5.YOffset = pParams->dwYOffset[i] >> 2;
510 pCmd->DW5.TiledResourceMode = Mhw_ConvertToTRMode(pParams->psSurface->TileType);
511 }
512
513 ResourceParams.presResource = &pParams->psSurface->OsResource;
514 ResourceParams.dwOffset =
515 pParams->psSurface->dwOffset + pParams->dwBaseAddrOffset[i];
516 ResourceParams.pdwCmd = (pCmd->DW8_9.Value);
517 ResourceParams.dwLocationInCmd = 8;
518 ResourceParams.bIsWritable = pParams->bIsWritable;
519
520 ResourceParams.dwOffsetInSSH =
521 uiIndirectStateOffset +
522 pKernelState->dwSshOffset +
523 pKernelState->dwBindingTableSize +
524 (pParams->dwBindingTableOffset[i] * m_dwMaxSurfaceStateSize);
525 ResourceParams.HwCommandType = MOS_SURFACE_STATE;
526
527 MHW_MI_CHK_STATUS(m_pfnAddResourceToCmd(
528 pOsInterface,
529 pCmdBuffer,
530 &ResourceParams));
531 }
532 }
533
534 return eStatus;
535 }
536
537 //! \brief Initialize sampler states for Gen10
538 //! \details Initializes sampler states
539 //! \param PMHW_STATE_HEAP_INTERFACE pStateHeapInterface
540 //! [in] State heap interface
541 //! \param void *pSamplerStates
542 //! [in] Pointer to sampler states to reset
543 //! \param int32_t iSamplers
544 //! [in] Number of sampler entries to reset
545 //! \return MOS_STATUS
546 //! MOS_STATUS_SUCCESS if success, else fail reason
547 //!
InitSamplerStates(void * pSamplerStates,int32_t iSamplers)548 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G10_X::InitSamplerStates(
549 void *pSamplerStates,
550 int32_t iSamplers)
551 {
552 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
553
554 MHW_FUNCTION_ENTER;
555
556 MHW_MI_CHK_NULL(pSamplerStates);
557
558 mhw_state_heap_g10_X::SAMPLER_STATE_CMD SamplerStateInit;
559 // Add additional defaults specific to media
560 SamplerStateInit.DW0.MinModeFilter = SamplerStateInit.MIN_MODE_FILTER_LINEAR;
561 SamplerStateInit.DW0.MagModeFilter = SamplerStateInit.MAG_MODE_FILTER_LINEAR;
562 SamplerStateInit.DW0.TextureBorderColorMode = SamplerStateInit.TEXTURE_BORDER_COLOR_MODE_8BIT;
563 SamplerStateInit.DW0.SamplerDisable = true;
564 SamplerStateInit.DW1.ShadowFunction = SamplerStateInit.SHADOW_FUNCTION_PREFILTEROPNEVER;
565 SamplerStateInit.DW3.TczAddressControlMode = SamplerStateInit.TCZ_ADDRESS_CONTROL_MODE_CLAMP;
566 SamplerStateInit.DW3.TcyAddressControlMode = SamplerStateInit.TCY_ADDRESS_CONTROL_MODE_CLAMP;
567 SamplerStateInit.DW3.TcxAddressControlMode = SamplerStateInit.TCX_ADDRESS_CONTROL_MODE_CLAMP;
568 SamplerStateInit.DW3.RAddressMinFilterRoundingEnable = true;
569 SamplerStateInit.DW3.RAddressMagFilterRoundingEnable = true;
570 SamplerStateInit.DW3.VAddressMinFilterRoundingEnable = true;
571 SamplerStateInit.DW3.VAddressMagFilterRoundingEnable = true;
572 SamplerStateInit.DW3.UAddressMinFilterRoundingEnable = true;
573 SamplerStateInit.DW3.UAddressMagFilterRoundingEnable = true;
574
575 // Initialize Media Sampler States
576 uint8_t *pu8SamplerState = (uint8_t*)pSamplerStates;
577
578 for (; iSamplers > 0; iSamplers--)
579 {
580 MOS_SecureMemcpy(pu8SamplerState, SamplerStateInit.byteSize, &SamplerStateInit, SamplerStateInit.byteSize);
581 pu8SamplerState += SamplerStateInit.byteSize;
582 }
583
584 return eStatus;
585 }
586
587 //!
588 //! \brief Set Sampler State for Gen10
589 //! \details Set sampler state according to sampler type
590 //! \param PMHW_STATE_HEAP_INTERFACE pStateHeapInterface
591 //! [in] State heap interface
592 //! \param void *pSamplerBase
593 //! [in] Pointer to sampler state base in GSH
594 //! \param int32_t iSamplerIndex
595 //! [in] Sampler index to setup
596 //! \param PMHW_SAMPLER_STATE_PARAM pParam
597 //! [in] Sampler State param
598 //! \return MOS_STATUS
599 //!
SetSamplerState(void * pSampler,PMHW_SAMPLER_STATE_PARAM pParam)600 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G10_X::SetSamplerState(
601 void *pSampler,
602 PMHW_SAMPLER_STATE_PARAM pParam)
603 {
604 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
605
606 MHW_FUNCTION_ENTER;
607
608 MHW_MI_CHK_NULL(pParam);
609
610 if (pParam->pKernelState)
611 {
612 PMHW_KERNEL_STATE pKernelState;
613 uint32_t dwCurrSampler;
614 uint32_t dwNumSampler;
615
616 mhw_state_heap_g10_X::SAMPLER_STATE_CMD Cmd;
617 Cmd.DW0.MinModeFilter = Cmd.MIN_MODE_FILTER_LINEAR;
618 Cmd.DW0.MagModeFilter = Cmd.MAG_MODE_FILTER_LINEAR;
619 Cmd.DW0.TextureBorderColorMode = Cmd.TEXTURE_BORDER_COLOR_MODE_8BIT;
620 Cmd.DW1.ShadowFunction = Cmd.SHADOW_FUNCTION_PREFILTEROPNEVER;
621 Cmd.DW3.TczAddressControlMode = Cmd.TCZ_ADDRESS_CONTROL_MODE_CLAMP;
622 Cmd.DW3.TcyAddressControlMode = Cmd.TCY_ADDRESS_CONTROL_MODE_CLAMP;
623 Cmd.DW3.TcxAddressControlMode = Cmd.TCX_ADDRESS_CONTROL_MODE_CLAMP;
624 Cmd.DW3.RAddressMinFilterRoundingEnable = true;
625 Cmd.DW3.RAddressMagFilterRoundingEnable = true;
626 Cmd.DW3.VAddressMinFilterRoundingEnable = true;
627 Cmd.DW3.VAddressMagFilterRoundingEnable = true;
628 Cmd.DW3.UAddressMinFilterRoundingEnable = true;
629 Cmd.DW3.UAddressMagFilterRoundingEnable = true;
630 Cmd.DW0.SamplerDisable = false;
631
632 dwNumSampler = pParam->pKernelState->KernelParams.iSamplerCount;
633
634 for (dwCurrSampler = 0; dwCurrSampler < dwNumSampler; dwCurrSampler++)
635 {
636 if (pParam[dwCurrSampler].bInUse)
637 {
638 pKernelState = pParam[dwCurrSampler].pKernelState;
639
640 MHW_MI_CHK_NULL(pKernelState);
641
642 MHW_MI_CHK_STATUS(pKernelState->m_dshRegion.AddData(
643 &Cmd,
644 pKernelState->dwSamplerOffset + dwCurrSampler * Cmd.byteSize,
645 sizeof(Cmd)));
646 }
647 }
648 }
649 else if (pParam->bInUse)
650 {
651 MHW_MI_CHK_NULL(pSampler);
652
653 if (pParam->SamplerType == MHW_SAMPLER_TYPE_3D)
654 {
655 mhw_state_heap_g10_X::SAMPLER_STATE_CMD *pUnormSampler =
656 (mhw_state_heap_g10_X::SAMPLER_STATE_CMD*)pSampler;
657
658 mhw_state_heap_g10_X::SAMPLER_STATE_CMD UnormSamplerInit;
659
660 // Add additional defaults specific to media
661 UnormSamplerInit.DW0.MinModeFilter = UnormSamplerInit.MIN_MODE_FILTER_LINEAR;
662 UnormSamplerInit.DW0.MagModeFilter = UnormSamplerInit.MAG_MODE_FILTER_LINEAR;
663 UnormSamplerInit.DW0.TextureBorderColorMode = UnormSamplerInit.TEXTURE_BORDER_COLOR_MODE_8BIT;
664 UnormSamplerInit.DW0.SamplerDisable = false;
665 UnormSamplerInit.DW1.ShadowFunction = UnormSamplerInit.SHADOW_FUNCTION_PREFILTEROPNEVER;
666 UnormSamplerInit.DW3.TczAddressControlMode = UnormSamplerInit.TCZ_ADDRESS_CONTROL_MODE_CLAMP;
667 UnormSamplerInit.DW3.TcyAddressControlMode = UnormSamplerInit.TCY_ADDRESS_CONTROL_MODE_CLAMP;
668 UnormSamplerInit.DW3.TcxAddressControlMode = UnormSamplerInit.TCX_ADDRESS_CONTROL_MODE_CLAMP;
669 UnormSamplerInit.DW3.RAddressMinFilterRoundingEnable = true;
670 UnormSamplerInit.DW3.RAddressMagFilterRoundingEnable = true;
671 UnormSamplerInit.DW3.VAddressMinFilterRoundingEnable = true;
672 UnormSamplerInit.DW3.VAddressMagFilterRoundingEnable = true;
673 UnormSamplerInit.DW3.UAddressMinFilterRoundingEnable = true;
674 UnormSamplerInit.DW3.UAddressMagFilterRoundingEnable = true;
675
676 *pUnormSampler = UnormSamplerInit;
677
678 if (pParam->Unorm.SamplerFilterMode == MHW_SAMPLER_FILTER_NEAREST)
679 {
680 pUnormSampler->DW0.MinModeFilter = pUnormSampler->MIN_MODE_FILTER_NEAREST;
681 pUnormSampler->DW0.MagModeFilter = pUnormSampler->MAG_MODE_FILTER_NEAREST;
682 }
683 else if (pParam->Unorm.SamplerFilterMode == MHW_SAMPLER_FILTER_BILINEAR)
684 {
685 pUnormSampler->DW0.MinModeFilter = pUnormSampler->MIN_MODE_FILTER_LINEAR;
686 pUnormSampler->DW0.MagModeFilter = pUnormSampler->MAG_MODE_FILTER_LINEAR;
687 }
688 else
689 {
690 pUnormSampler->DW0.MinModeFilter = pParam->Unorm.MinFilter;
691 pUnormSampler->DW0.MagModeFilter = pParam->Unorm.MagFilter;
692 }
693
694 pUnormSampler->DW3.TcxAddressControlMode = pParam->Unorm.AddressU;
695 pUnormSampler->DW3.TcyAddressControlMode = pParam->Unorm.AddressV;
696 pUnormSampler->DW3.TczAddressControlMode = pParam->Unorm.AddressW;
697
698 if (pParam->Unorm.bBorderColorIsValid)
699 {
700 mhw_state_heap_g10_X::SAMPLER_INDIRECT_STATE_CMD *pUnormSamplerBorderColor =
701 (mhw_state_heap_g10_X::SAMPLER_INDIRECT_STATE_CMD*)pParam->Unorm.pIndirectState;
702
703 mhw_state_heap_g10_X::SAMPLER_INDIRECT_STATE_CMD UnormSamplerBorderColorInit;
704 *pUnormSamplerBorderColor = UnormSamplerBorderColorInit;
705
706 // Since the structure is a union between float, uint, and int, can use any to set the state DW
707 pUnormSamplerBorderColor->DW0.Obj0.BorderColorRed = pParam->Unorm.BorderColorRedU;
708 pUnormSamplerBorderColor->DW1.BorderColorGreen = pParam->Unorm.BorderColorGreenU;
709 pUnormSamplerBorderColor->DW2.BorderColorBlue = pParam->Unorm.BorderColorBlueU;
710 pUnormSamplerBorderColor->DW3.BorderColorAlpha = pParam->Unorm.BorderColorAlphaU;
711
712 pUnormSampler->DW2.IndirectStatePointer = pParam->Unorm.IndirectStateOffset >> MHW_SAMPLER_INDIRECT_SHIFT;
713 }
714
715 if (pParam->Unorm.bChromaKeyEnable)
716 {
717 pUnormSampler->DW1.ChromakeyEnable = true;
718 pUnormSampler->DW1.ChromakeyIndex = pParam->Unorm.ChromaKeyIndex;
719 pUnormSampler->DW1.ChromakeyMode = pParam->Unorm.ChromaKeyMode;
720 }
721 }
722
723 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_AVS)
724 {
725 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_CMD *pSamplerState8x8 =
726 (mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_CMD*)pSampler;
727
728 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_CMD SamplerState8x8Init;
729 // Add additional defaults specific to media
730 SamplerState8x8Init.DW0.GainFactor = 0;
731 SamplerState8x8Init.DW0.R3XCoefficient = 0;
732 SamplerState8x8Init.DW0.R3CCoefficient = 0;
733 SamplerState8x8Init.DW2.GlobalNoiseEstimation = 0;
734 SamplerState8x8Init.DW2.R5XCoefficient = 0;
735 SamplerState8x8Init.DW2.R5CxCoefficient = 0;
736 SamplerState8x8Init.DW2.R5XCoefficient = 0;
737 SamplerState8x8Init.DW3.SinAlpha = 101;
738 SamplerState8x8Init.DW3.CosAlpha = 79;
739 SamplerState8x8Init.DW4.ShuffleOutputwritebackForSample8X8 = 1;
740 SamplerState8x8Init.DW5.DiamondAlpha = 100;
741 SamplerState8x8Init.DW5.DiamondDu = 0;
742 SamplerState8x8Init.DW7.InvMarginVyl = 3300;
743 SamplerState8x8Init.DW8.InvMarginVyu = 1600;
744 SamplerState8x8Init.DW10.S0L = MOS_BITFIELD_VALUE((uint32_t)-5, 11);
745 SamplerState8x8Init.DW10.YSlope2 = 31;
746 SamplerState8x8Init.DW12.YSlope1 = 31;
747 SamplerState8x8Init.DW14.S0U = 256;
748 SamplerState8x8Init.DW15.S1U = 113;
749 SamplerState8x8Init.DW15.S2U = MOS_BITFIELD_VALUE((uint32_t)-179, 11);
750
751 *pSamplerState8x8 = SamplerState8x8Init;
752
753 // Set STE Params
754 pSamplerState8x8->DW3.SkinToneTunedIefEnable = pParam->Avs.bEnableSTDE;
755 if (pParam->Avs.bEnableSTDE)
756 {
757 pSamplerState8x8->DW5.Skindetailfactor = pParam->Avs.bSkinDetailFactor;
758 pSamplerState8x8->DW4.VyStdEnable = true;
759 }
760
761 if (pParam->Avs.bEnableIEF && pParam->Avs.wIEFFactor > 0)
762 {
763 pSamplerState8x8->DW0.GainFactor = pParam->Avs.wIEFFactor;
764 pSamplerState8x8->DW0.R3XCoefficient = pParam->Avs.wR3xCoefficient;
765 pSamplerState8x8->DW0.R3CCoefficient = pParam->Avs.wR3cCoefficient;
766 pSamplerState8x8->DW2.R5XCoefficient = pParam->Avs.wR5xCoefficient;
767 pSamplerState8x8->DW2.R5CxCoefficient = pParam->Avs.wR5cxCoefficient;
768 pSamplerState8x8->DW2.R5CCoefficient = pParam->Avs.wR5cCoefficient;
769 }
770
771 if (pParam->Avs.bEnableAVS)
772 {
773 pSamplerState8x8->DW0.GainFactor = pParam->Avs.GainFactor;
774 pSamplerState8x8->DW0.StrongEdgeThreshold = pParam->Avs.StrongEdgeThr;
775 pSamplerState8x8->DW0.WeakEdgeThreshold = pParam->Avs.WeakEdgeThr;
776 pSamplerState8x8->DW2.GlobalNoiseEstimation = pParam->Avs.GlobalNoiseEstm;
777 pSamplerState8x8->DW2.StrongEdgeWeight = pParam->Avs.StrongEdgeWght;
778 pSamplerState8x8->DW2.RegularWeight = pParam->Avs.RegularWght;
779 pSamplerState8x8->DW2.NonEdgeWeight = pParam->Avs.NonEdgeWght;
780 pSamplerState8x8->DW3.Enable8TapFilter = pParam->Avs.EightTapAFEnable;
781
782 //pSamplerState8x8->DW3.IEFBypass = pParam->pAVSParam.BypassIEF; This should be done through Kernel Gen8+
783 pSamplerState8x8->DW0.R3XCoefficient = pParam->Avs.wR3xCoefficient;
784 pSamplerState8x8->DW0.R3CCoefficient = pParam->Avs.wR3cCoefficient;
785 pSamplerState8x8->DW2.R5XCoefficient = pParam->Avs.wR5xCoefficient;
786 pSamplerState8x8->DW2.R5CxCoefficient = pParam->Avs.wR5cxCoefficient;
787 pSamplerState8x8->DW2.R5CCoefficient = pParam->Avs.wR5cCoefficient;
788
789 if (pParam->Avs.AdditionalOverridesUsed)
790 {
791 pSamplerState8x8->DW10.YSlope2 = pParam->Avs.YSlope2;
792 pSamplerState8x8->DW10.S0L = pParam->Avs.S0L;
793 pSamplerState8x8->DW12.YSlope1 = pParam->Avs.YSlope1;
794 pSamplerState8x8->DW15.S2U = pParam->Avs.S2U;
795 pSamplerState8x8->DW15.S1U = pParam->Avs.S1U;
796 }
797
798 // For HDC Direct Write, set Writeback same as Original Sample_8x8
799 if (pParam->Avs.bHdcDwEnable)
800 {
801 pSamplerState8x8->DW4.ShuffleOutputwritebackForSample8X8 = 0;
802 }
803
804 if (pParam->Avs.pMhwSamplerAvsTableParam)
805 {
806 MHW_MI_CHK_STATUS(LoadSamplerAvsTable(pSamplerState8x8, pParam->Avs.pMhwSamplerAvsTableParam));
807 }
808 else
809 {
810 MHW_ASSERTMESSAGE("Invalid sampler params for avs 8x8 table \n");
811 eStatus = MOS_STATUS_INVALID_PARAMETER;
812 return eStatus;
813 }
814 }
815 }
816 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_CONV)
817 {
818 uint32_t u32ConvolveTableNum;
819
820 if (pParam->Convolve.ui8ConvolveType == 0)
821 { // 2D convolve, 2048: size of CONV for Gen9+.
822 // how many tables need to be filled = total_bytes_of_tables / bytes_per_table
823 // = (total_sizeof_convolve - sizeof_DW0_to_DW15) / size_per_table
824 u32ConvolveTableNum = 62; // (2048 - 16*4) / 32
825 }
826 else if (pParam->Convolve.ui8ConvolveType == 1)
827 { // 1D convolve, 128: size of 1D CONV for Gen9+.
828 u32ConvolveTableNum = 2; // (128 - 16*4) / 32
829 }
830 else
831 { // 1P convolve, 1024 size of CONV for Gen8.
832 u32ConvolveTableNum = 30; // (1024 - 16*4) / 32
833 }
834
835 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_CONVOLVE_CMD *pSamplerConvolve =
836 (mhw_state_heap_g10_X::SAMPLER_STATE_8x8_CONVOLVE_CMD*)pSampler;
837
838 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_CONVOLVE_CMD SamplerConvolveInit;
839 *pSamplerConvolve = SamplerConvolveInit;
840
841 auto ConvolveTableEntries =
842 sizeof(pSamplerConvolve->FilterCoefficient300310) / sizeof(pSamplerConvolve->FilterCoefficient300310[0]);
843 if (ConvolveTableEntries < u32ConvolveTableNum)
844 {
845 MHW_ASSERTMESSAGE("Incorrect number of convolve entries requested!");
846 return MOS_STATUS_INVALID_PARAMETER;
847 }
848
849 pSamplerConvolve->DW0.Height = pParam->Convolve.ui8Height;
850 pSamplerConvolve->DW0.Width = pParam->Convolve.ui8Width;
851 pSamplerConvolve->DW0.ScaleDownValue = pParam->Convolve.ui8ScaledDownValue;
852 pSamplerConvolve->DW0.SizeOfTheCoefficient = pParam->Convolve.ui8SizeOfTheCoefficient;
853 pSamplerConvolve->DW0.MsbHeight = pParam->Convolve.ui8MSBHeight;
854 pSamplerConvolve->DW0.MsbWidth = pParam->Convolve.ui8MSBWidth;
855
856 for (uint32_t i = 0; i < u32ConvolveTableNum; i++)
857 {
858 pSamplerConvolve->FilterCoefficient300310[i].DW0.FilterCoefficient00 = pParam->Convolve.CoeffTable[i].wFilterCoeff[0];
859 pSamplerConvolve->FilterCoefficient300310[i].DW0.FilterCoefficient01 = pParam->Convolve.CoeffTable[i].wFilterCoeff[1];
860 pSamplerConvolve->FilterCoefficient300310[i].DW1.FilterCoefficient02 = pParam->Convolve.CoeffTable[i].wFilterCoeff[2];
861 pSamplerConvolve->FilterCoefficient300310[i].DW1.FilterCoefficient03 = pParam->Convolve.CoeffTable[i].wFilterCoeff[3];
862 pSamplerConvolve->FilterCoefficient300310[i].DW2.FilterCoefficient04 = pParam->Convolve.CoeffTable[i].wFilterCoeff[4];
863 pSamplerConvolve->FilterCoefficient300310[i].DW2.FilterCoefficient05 = pParam->Convolve.CoeffTable[i].wFilterCoeff[5];
864 pSamplerConvolve->FilterCoefficient300310[i].DW3.FilterCoefficient06 = pParam->Convolve.CoeffTable[i].wFilterCoeff[6];
865 pSamplerConvolve->FilterCoefficient300310[i].DW3.FilterCoefficient07 = pParam->Convolve.CoeffTable[i].wFilterCoeff[7];
866 pSamplerConvolve->FilterCoefficient300310[i].DW4.FilterCoefficient08 = pParam->Convolve.CoeffTable[i].wFilterCoeff[8];
867 pSamplerConvolve->FilterCoefficient300310[i].DW4.FilterCoefficient09 = pParam->Convolve.CoeffTable[i].wFilterCoeff[9];
868 pSamplerConvolve->FilterCoefficient300310[i].DW5.FilterCoefficient010 = pParam->Convolve.CoeffTable[i].wFilterCoeff[10];
869 pSamplerConvolve->FilterCoefficient300310[i].DW5.FilterCoefficient011 = pParam->Convolve.CoeffTable[i].wFilterCoeff[11];
870 pSamplerConvolve->FilterCoefficient300310[i].DW6.FilterCoefficient012 = pParam->Convolve.CoeffTable[i].wFilterCoeff[12];
871 pSamplerConvolve->FilterCoefficient300310[i].DW6.FilterCoefficient013 = pParam->Convolve.CoeffTable[i].wFilterCoeff[13];
872 pSamplerConvolve->FilterCoefficient300310[i].DW7.FilterCoefficient014 = pParam->Convolve.CoeffTable[i].wFilterCoeff[14];
873 pSamplerConvolve->FilterCoefficient300310[i].DW7.FilterCoefficient015 = pParam->Convolve.CoeffTable[i].wFilterCoeff[15];
874 }
875 }
876 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_MISC)
877 {
878 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD *pSamplerMisc =
879 (mhw_state_heap_g10_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD*)pSampler;
880
881 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD SamplerMiscInit;
882 *pSamplerMisc = SamplerMiscInit;
883
884 pSamplerMisc->DW0.HeightOfTheKernel = pParam->Misc.byteHeight;
885 pSamplerMisc->DW0.WidthOfTheKernel = pParam->Misc.byteWidth;
886 pSamplerMisc->DW0.BitMask16ForRow0150 = pParam->Misc.wRow[0];
887 pSamplerMisc->DW1.BitMask16ForRow1150 = pParam->Misc.wRow[1];
888 pSamplerMisc->DW1.BitMask16ForRow2150 = pParam->Misc.wRow[2];
889 pSamplerMisc->DW2.BitMask16ForRow3150 = pParam->Misc.wRow[3];
890 pSamplerMisc->DW2.BitMask16ForRow4150 = pParam->Misc.wRow[4];
891 pSamplerMisc->DW3.BitMask16ForRow5150 = pParam->Misc.wRow[5];
892 pSamplerMisc->DW3.BitMask16ForRow6150 = pParam->Misc.wRow[6];
893 pSamplerMisc->DW4.BitMask16ForRow7150 = pParam->Misc.wRow[7];
894 pSamplerMisc->DW4.BitMask16ForRow8150 = pParam->Misc.wRow[8];
895 pSamplerMisc->DW5.BitMask16ForRow9150 = pParam->Misc.wRow[9];
896 pSamplerMisc->DW5.BitMask16ForRow10150 = pParam->Misc.wRow[10];
897 pSamplerMisc->DW6.BitMask16ForRow11150 = pParam->Misc.wRow[11];
898 pSamplerMisc->DW6.BitMask16ForRow12150 = pParam->Misc.wRow[12];
899 pSamplerMisc->DW7.BitMask16ForRow13150 = pParam->Misc.wRow[13];
900 pSamplerMisc->DW7.BitMask16ForRow14150 = pParam->Misc.wRow[14];
901 }
902 else
903 {
904 MHW_ASSERTMESSAGE("Invalid sampler type '%d'", pParam->SamplerType);
905 return MOS_STATUS_INVALID_PARAMETER;
906 }
907 }
908
909 eStatus = MOS_STATUS_SUCCESS;
910
911 return eStatus;
912 }
913
AddSamplerStateData(uint32_t samplerOffset,MemoryBlock * memoryBlock,PMHW_SAMPLER_STATE_PARAM pParam)914 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G10_X::AddSamplerStateData(
915 uint32_t samplerOffset,
916 MemoryBlock *memoryBlock,
917 PMHW_SAMPLER_STATE_PARAM pParam)
918 {
919 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
920
921 MHW_MI_CHK_NULL(memoryBlock);
922 MHW_MI_CHK_NULL(pParam);
923
924 if (pParam->SamplerType == MHW_SAMPLER_TYPE_3D)
925 {
926 mhw_state_heap_g10_X::SAMPLER_STATE_CMD unormSampler;
927 mhw_state_heap_g10_X::SAMPLER_INDIRECT_STATE_CMD indirectState;
928
929 pParam->Unorm.pIndirectState = &indirectState;
930
931 MHW_MI_CHK_STATUS(SetSamplerState(&unormSampler, pParam));
932
933 // Add indirect state to heap if necessary
934 if (pParam->Unorm.bBorderColorIsValid)
935 {
936 // adjust unormSampler->DW2.IndirectStatePointer
937 // to include memoryBlock's offset from base of state heap
938 unormSampler.DW2.IndirectStatePointer =
939 (pParam->Unorm.IndirectStateOffset + memoryBlock->GetOffset())
940 >> MHW_SAMPLER_INDIRECT_SHIFT;
941
942 MHW_MI_CHK_STATUS(memoryBlock->AddData(
943 &indirectState,
944 pParam->Unorm.IndirectStateOffset,
945 sizeof(mhw_state_heap_g10_X::SAMPLER_INDIRECT_STATE_CMD)));
946 }
947
948 // Add sampler state data to heap
949 MHW_MI_CHK_STATUS(memoryBlock->AddData(
950 &unormSampler,
951 samplerOffset,
952 sizeof(mhw_state_heap_g10_X::SAMPLER_STATE_CMD)));
953 }
954 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_AVS)
955 {
956 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_CMD samplerState8x8;
957
958 MHW_MI_CHK_STATUS(SetSamplerState(&samplerState8x8, pParam));
959
960 // Add sampler data to heap
961 MHW_MI_CHK_STATUS(memoryBlock->AddData(
962 &samplerState8x8,
963 samplerOffset,
964 sizeof(mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_CMD)));
965 }
966 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_CONV)
967 {
968 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_CONVOLVE_CMD samplerConvolve;
969
970 MHW_MI_CHK_STATUS(SetSamplerState(&samplerConvolve, pParam));
971
972 MHW_MI_CHK_STATUS(memoryBlock->AddData(
973 &samplerConvolve,
974 samplerOffset,
975 sizeof(mhw_state_heap_g10_X::SAMPLER_STATE_8x8_CONVOLVE_CMD)));
976 }
977 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_MISC)
978 {
979 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD samplerMisc;
980
981 MHW_MI_CHK_STATUS(SetSamplerState(&samplerMisc, pParam));
982
983 MHW_MI_CHK_STATUS(memoryBlock->AddData(
984 &samplerMisc,
985 samplerOffset,
986 sizeof(mhw_state_heap_g10_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD)));
987
988 }
989 else
990 {
991 MHW_ASSERTMESSAGE("Invalid sampler type '%d'", pParam->SamplerType);
992 eStatus = MOS_STATUS_INVALID_PARAMETER;
993 }
994
995 return eStatus;
996 }
997
998
999 //!
1000 //! \brief Load Sampler 8X8 State Table for Gen9
1001 //! \details Load Sampler 8x8 State Table
1002 //! \param [in] void *pTable
1003 //! Pointer to 8x8 table in GSH to load
1004 //! \param [in] PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam
1005 //! Pointer to 8x8 sampler state params
1006 //! \return MOS_STATUS
1007 //!
LoadSamplerAvsTable(void * pvTable,PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam)1008 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G10_X::LoadSamplerAvsTable(
1009 void *pvTable,
1010 PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam)
1011 {
1012 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1013
1014 MHW_FUNCTION_ENTER;
1015
1016 MHW_MI_CHK_NULL(pvTable);
1017 MHW_MI_CHK_NULL(pMhwSamplerAvsTableParam);
1018
1019 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_CMD *pSampler8x8Avs =
1020 (mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_CMD*)pvTable;
1021
1022 // DW0 ~ DW15 are for sampler state and programmed in other function, so no need to setup for it here.
1023
1024 uint32_t u32ConvolveTableNum =
1025 sizeof(pSampler8x8Avs->FilterCoefficient016) / sizeof(pSampler8x8Avs->FilterCoefficient016[0]);
1026
1027 // DW16 ~ DW151 setting for table coefficients (DW0 ~ DW7) * 17
1028 for (uint32_t u32CoeffTableIdx = 0; u32CoeffTableIdx < u32ConvolveTableNum; u32CoeffTableIdx++)
1029 {
1030 PMHW_AVS_COEFFICIENT_PARAM pCoeffParam = &pMhwSamplerAvsTableParam->paMhwAvsCoeffParam[u32CoeffTableIdx];
1031 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_COEFFICIENTS_CMD *pCoeffTable =
1032 &pSampler8x8Avs->FilterCoefficient016[u32CoeffTableIdx];
1033 MHW_MI_CHK_NULL(pCoeffParam);
1034 MHW_MI_CHK_NULL(pCoeffTable);
1035
1036 pCoeffTable->DW0.Table0XFilterCoefficientN0 = pCoeffParam->ZeroXFilterCoefficient[0];
1037 pCoeffTable->DW0.Table0YFilterCoefficientN0 = pCoeffParam->ZeroYFilterCoefficient[0];
1038 pCoeffTable->DW0.Table0XFilterCoefficientN1 = pCoeffParam->ZeroXFilterCoefficient[1];
1039 pCoeffTable->DW0.Table0YFilterCoefficientN1 = pCoeffParam->ZeroYFilterCoefficient[1];
1040
1041 pCoeffTable->DW1.Table0XFilterCoefficientN2 = pCoeffParam->ZeroXFilterCoefficient[2];
1042 pCoeffTable->DW1.Table0YFilterCoefficientN2 = pCoeffParam->ZeroYFilterCoefficient[2];
1043 pCoeffTable->DW1.Table0XFilterCoefficientN3 = pCoeffParam->ZeroXFilterCoefficient[3];
1044 pCoeffTable->DW1.Table0YFilterCoefficientN3 = pCoeffParam->ZeroYFilterCoefficient[3];
1045
1046 pCoeffTable->DW2.Table0XFilterCoefficientN4 = pCoeffParam->ZeroXFilterCoefficient[4];
1047 pCoeffTable->DW2.Table0YFilterCoefficientN4 = pCoeffParam->ZeroYFilterCoefficient[4];
1048 pCoeffTable->DW2.Table0XFilterCoefficientN5 = pCoeffParam->ZeroXFilterCoefficient[5];
1049 pCoeffTable->DW2.Table0YFilterCoefficientN5 = pCoeffParam->ZeroYFilterCoefficient[5];
1050
1051 pCoeffTable->DW3.Table0XFilterCoefficientN6 = pCoeffParam->ZeroXFilterCoefficient[6];
1052 pCoeffTable->DW3.Table0YFilterCoefficientN6 = pCoeffParam->ZeroYFilterCoefficient[6];
1053 pCoeffTable->DW3.Table0XFilterCoefficientN7 = pCoeffParam->ZeroXFilterCoefficient[7];
1054 pCoeffTable->DW3.Table0YFilterCoefficientN7 = pCoeffParam->ZeroYFilterCoefficient[7];
1055
1056 pCoeffTable->DW4.Table1XFilterCoefficientN2 = pCoeffParam->OneXFilterCoefficient[0];
1057 pCoeffTable->DW4.Table1XFilterCoefficientN3 = pCoeffParam->OneXFilterCoefficient[1];
1058 pCoeffTable->DW5.Table1XFilterCoefficientN4 = pCoeffParam->OneXFilterCoefficient[2];
1059 pCoeffTable->DW5.Table1XFilterCoefficientN5 = pCoeffParam->OneXFilterCoefficient[3];
1060
1061 pCoeffTable->DW6.Table1YFilterCoefficientN2 = pCoeffParam->OneYFilterCoefficient[0];
1062 pCoeffTable->DW6.Table1YFilterCoefficientN3 = pCoeffParam->OneYFilterCoefficient[1];
1063 pCoeffTable->DW7.Table1YFilterCoefficientN4 = pCoeffParam->OneYFilterCoefficient[2];
1064 pCoeffTable->DW7.Table1YFilterCoefficientN5 = pCoeffParam->OneYFilterCoefficient[3];
1065 }
1066
1067 // DW152 ~ DW153 setting for table control
1068 pSampler8x8Avs->DW152.TransitionAreaWith8Pixels = pMhwSamplerAvsTableParam->byteTransitionArea8Pixels; // 3-bits
1069 pSampler8x8Avs->DW152.TransitionAreaWith4Pixels = pMhwSamplerAvsTableParam->byteTransitionArea4Pixels; // 3-bits
1070 pSampler8x8Avs->DW152.MaxDerivative8Pixels = pMhwSamplerAvsTableParam->byteMaxDerivative8Pixels;
1071 pSampler8x8Avs->DW152.MaxDerivative4Pixels = pMhwSamplerAvsTableParam->byteMaxDerivative4Pixels;
1072 pSampler8x8Avs->DW152.DefaultSharpnessLevel = pMhwSamplerAvsTableParam->byteDefaultSharpnessLevel;
1073
1074 pSampler8x8Avs->DW153.RgbAdaptive = pMhwSamplerAvsTableParam->bEnableRGBAdaptive;
1075 pSampler8x8Avs->DW153.AdaptiveFilterForAllChannels = pMhwSamplerAvsTableParam->bAdaptiveFilterAllChannels;
1076 pSampler8x8Avs->DW153.BypassYAdaptiveFiltering = pMhwSamplerAvsTableParam->bBypassYAdaptiveFiltering;
1077 pSampler8x8Avs->DW153.BypassXAdaptiveFiltering = pMhwSamplerAvsTableParam->bBypassXAdaptiveFiltering;
1078
1079 u32ConvolveTableNum =
1080 sizeof(pSampler8x8Avs->FilterCoefficient1731) / sizeof(pSampler8x8Avs->FilterCoefficient1731[0]);
1081 // DW160 ~ DW279 setting for extra table coefficients (DW0 ~ DW7) * 15
1082 for (uint32_t u32CoeffTableIdx = 0; u32CoeffTableIdx < u32ConvolveTableNum; u32CoeffTableIdx++)
1083 {
1084 PMHW_AVS_COEFFICIENT_PARAM pCoeffParamExtra = &pMhwSamplerAvsTableParam->paMhwAvsCoeffParamExtra[u32CoeffTableIdx];
1085 mhw_state_heap_g10_X::SAMPLER_STATE_8x8_AVS_COEFFICIENTS_CMD *pCoeffTableExtra =
1086 &pSampler8x8Avs->FilterCoefficient1731[u32CoeffTableIdx];
1087 MHW_MI_CHK_NULL(pCoeffParamExtra);
1088 MHW_MI_CHK_NULL(pCoeffTableExtra);
1089
1090 pCoeffTableExtra->DW0.Table0XFilterCoefficientN0 = pCoeffParamExtra->ZeroXFilterCoefficient[0];
1091 pCoeffTableExtra->DW0.Table0YFilterCoefficientN0 = pCoeffParamExtra->ZeroYFilterCoefficient[0];
1092 pCoeffTableExtra->DW0.Table0XFilterCoefficientN1 = pCoeffParamExtra->ZeroXFilterCoefficient[1];
1093 pCoeffTableExtra->DW0.Table0YFilterCoefficientN1 = pCoeffParamExtra->ZeroYFilterCoefficient[1];
1094
1095 pCoeffTableExtra->DW1.Table0XFilterCoefficientN2 = pCoeffParamExtra->ZeroXFilterCoefficient[2];
1096 pCoeffTableExtra->DW1.Table0YFilterCoefficientN2 = pCoeffParamExtra->ZeroYFilterCoefficient[2];
1097 pCoeffTableExtra->DW1.Table0XFilterCoefficientN3 = pCoeffParamExtra->ZeroXFilterCoefficient[3];
1098 pCoeffTableExtra->DW1.Table0YFilterCoefficientN3 = pCoeffParamExtra->ZeroYFilterCoefficient[3];
1099
1100 pCoeffTableExtra->DW2.Table0XFilterCoefficientN4 = pCoeffParamExtra->ZeroXFilterCoefficient[4];
1101 pCoeffTableExtra->DW2.Table0YFilterCoefficientN4 = pCoeffParamExtra->ZeroYFilterCoefficient[4];
1102 pCoeffTableExtra->DW2.Table0XFilterCoefficientN5 = pCoeffParamExtra->ZeroXFilterCoefficient[5];
1103 pCoeffTableExtra->DW2.Table0YFilterCoefficientN5 = pCoeffParamExtra->ZeroYFilterCoefficient[5];
1104
1105 pCoeffTableExtra->DW3.Table0XFilterCoefficientN6 = pCoeffParamExtra->ZeroXFilterCoefficient[6];
1106 pCoeffTableExtra->DW3.Table0YFilterCoefficientN6 = pCoeffParamExtra->ZeroYFilterCoefficient[6];
1107 pCoeffTableExtra->DW3.Table0XFilterCoefficientN7 = pCoeffParamExtra->ZeroXFilterCoefficient[7];
1108 pCoeffTableExtra->DW3.Table0YFilterCoefficientN7 = pCoeffParamExtra->ZeroYFilterCoefficient[7];
1109
1110 pCoeffTableExtra->DW4.Table1XFilterCoefficientN2 = pCoeffParamExtra->OneXFilterCoefficient[0];
1111 pCoeffTableExtra->DW4.Table1XFilterCoefficientN3 = pCoeffParamExtra->OneXFilterCoefficient[1];
1112 pCoeffTableExtra->DW5.Table1XFilterCoefficientN4 = pCoeffParamExtra->OneXFilterCoefficient[2];
1113 pCoeffTableExtra->DW5.Table1XFilterCoefficientN5 = pCoeffParamExtra->OneXFilterCoefficient[3];
1114
1115 pCoeffTableExtra->DW6.Table1YFilterCoefficientN2 = pCoeffParamExtra->OneYFilterCoefficient[0];
1116 pCoeffTableExtra->DW6.Table1YFilterCoefficientN3 = pCoeffParamExtra->OneYFilterCoefficient[1];
1117 pCoeffTableExtra->DW7.Table1YFilterCoefficientN4 = pCoeffParamExtra->OneYFilterCoefficient[2];
1118 pCoeffTableExtra->DW7.Table1YFilterCoefficientN5 = pCoeffParamExtra->OneYFilterCoefficient[3];
1119 }
1120
1121 return eStatus;
1122 }
1123
1124