1 /*
2 * Copyright (c) 2014-2017, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_state_heap_g8.c
24 //! \brief This modules implements HW interface layer to be used on all platforms on all operating systems/DDIs, across MHW components.
25 //!
26 #include "mhw_state_heap_g8.h"
27 #include "mhw_cp_interface.h"
28 #include "mhw_render_hwcmd_g8_X.h"
29
MHW_STATE_HEAP_INTERFACE_G8_X(PMOS_INTERFACE pInputOSInterface,int8_t bDynamicMode)30 MHW_STATE_HEAP_INTERFACE_G8_X::MHW_STATE_HEAP_INTERFACE_G8_X(
31 PMOS_INTERFACE pInputOSInterface, int8_t bDynamicMode):
32 MHW_STATE_HEAP_INTERFACE_GENERIC(pInputOSInterface, bDynamicMode)
33 {
34 m_wBtIdxAlignment = m_mhwNumBindingTableEntryOffset;
35 m_wIdAlignment = (1 << m_mhwGenericOffsetShift);
36 m_wCurbeAlignment = (1 << m_mhwGenericOffsetShift);
37
38 m_dwSizeSurfaceState = MOS_ALIGN_CEIL(mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
39 m_dwSizeSurfaceStateAdv = MOS_ALIGN_CEIL(mhw_state_heap_g8_X::MEDIA_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
40 m_dwMaxSurfaceStateSize = MOS_MAX(m_dwSizeSurfaceState, m_dwSizeSurfaceStateAdv);
41 m_wSizeOfInterfaceDescriptor = mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD::byteSize;
42 m_wSizeOfCmdInterfaceDescriptorData = MOS_ALIGN_CEIL(m_wSizeOfInterfaceDescriptor, m_wIdAlignment);
43 m_wSizeOfCmdSamplerState = mhw_state_heap_g8_X::SAMPLER_STATE_CMD::byteSize;
44
45 InitHwSizes();
46 }
47
~MHW_STATE_HEAP_INTERFACE_G8_X()48 MHW_STATE_HEAP_INTERFACE_G8_X::~MHW_STATE_HEAP_INTERFACE_G8_X()
49 {
50 MHW_FUNCTION_ENTER;
51 }
52
InitHwSizes()53 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G8_X::InitHwSizes()
54 {
55 m_HwSizes.dwSizeMediaObjectHeaderCmd = mhw_render_g8_X::MEDIA_OBJECT_CMD::byteSize;
56 m_HwSizes.dwSizeSurfaceState = MOS_ALIGN_CEIL(mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
57 m_HwSizes.dwSizeSurfaceStateAvs = MOS_ALIGN_CEIL(mhw_state_heap_g8_X::MEDIA_SURFACE_STATE_CMD::byteSize, MHW_SURFACE_STATE_ALIGN);
58 m_HwSizes.dwMaxSizeSurfaceState = MOS_MAX(m_HwSizes.dwSizeSurfaceState, m_HwSizes.dwSizeSurfaceStateAvs);
59 m_HwSizes.dwSizeBindingTableState = mhw_state_heap_g8_X::BINDING_TABLE_STATE_CMD::byteSize;
60 m_HwSizes.dwSizeSamplerState = mhw_state_heap_g8_X::SAMPLER_STATE_CMD::byteSize;
61 m_HwSizes.dwSizeSamplerIndirectState = mhw_state_heap_g8_X::SAMPLER_INDIRECT_STATE_CMD::byteSize;
62 m_HwSizes.dwSizeSamplerStateVA = mhw_state_heap_g8_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD::byteSize; // MinMaxFilter, Erode, Dilate functions
63 m_HwSizes.dwSizeSamplerStateVAConvolve = mhw_state_heap_g8_X::SAMPLER_STATE_8x8_CONVOLVE_CMD::byteSize;
64 m_HwSizes.dwSizeSamplerStateTable8x8 = mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_CMD::byteSize - 16 * sizeof(uint32_t); // match old definitions to table size
65 m_HwSizes.dwSizeSampler8x8Table =
66 MOS_ALIGN_CEIL(m_HwSizes.dwSizeSamplerStateTable8x8, MHW_SAMPLER_STATE_ALIGN);
67 m_HwSizes.dwSizeSamplerStateAvs =
68 MOS_ALIGN_CEIL(mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_CMD::byteSize, MHW_SAMPLER_STATE_AVS_ALIGN_MEDIA);
69 m_HwSizes.dwSizeInterfaceDescriptor = mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD::byteSize;
70 m_HwSizes.dwSizeMediaWalkerBlock = 32;
71
72 return MOS_STATUS_SUCCESS;
73 }
74
SetSurfaceState(PMHW_KERNEL_STATE pKernelState,PMOS_COMMAND_BUFFER pCmdBuffer,uint32_t dwNumSurfaceStatesToSet,PMHW_RCS_SURFACE_PARAMS pParams)75 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G8_X::SetSurfaceState(
76 PMHW_KERNEL_STATE pKernelState,
77 PMOS_COMMAND_BUFFER pCmdBuffer,
78 uint32_t dwNumSurfaceStatesToSet,
79 PMHW_RCS_SURFACE_PARAMS pParams)
80 {
81 PMOS_INTERFACE pOsInterface;
82 uint8_t *pIndirectState = nullptr;
83 MHW_RESOURCE_PARAMS ResourceParams;
84 uint32_t uiIndirectStateOffset = 0, uiIndirectStateSize = 0;
85 PMHW_STATE_HEAP pStateHeap;
86 uint32_t dwSurfaceType = GFX3DSTATE_SURFACETYPE_NULL; // GFX3DSTATE_SURFACETYPE
87 uint32_t i; // Plane Index
88 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
89
90 MHW_FUNCTION_ENTER;
91
92 MHW_MI_CHK_NULL(pParams);
93 MHW_MI_CHK_NULL(pParams->psSurface);
94 MOS_UNUSED(dwNumSurfaceStatesToSet);
95
96 if (pParams->dwNumPlanes >= MHW_MAX_SURFACE_PLANES)
97 {
98 MHW_ASSERTMESSAGE("Invalid plane number provided");
99 eStatus = MOS_STATUS_INVALID_PARAMETER;
100 return eStatus;
101 }
102
103 pOsInterface = m_pOsInterface;
104 pStateHeap = &m_SurfaceStateHeap;
105
106 MHW_MI_CHK_NULL(pOsInterface);
107 MHW_MI_CHK_STATUS(pOsInterface->pfnGetIndirectStatePointer(pOsInterface, &pIndirectState));
108 MHW_MI_CHK_STATUS(pOsInterface->pfnGetIndirectState(pOsInterface, &uiIndirectStateOffset, &uiIndirectStateSize));
109
110 MOS_ZeroMemory(&ResourceParams, sizeof(ResourceParams));
111 ResourceParams.dwLsbNum = 0; // MHW_STATE_HEAP_SURFACE_STATE_SHIFT
112
113 for ( i = 0; i < pParams->dwNumPlanes; i++)
114 {
115 MHW_ASSERT_INVALID_BINDING_TABLE_IDX(pParams->dwBindingTableOffset[i]);
116 MHW_MI_CHK_NULL(pKernelState);
117 uint32_t u32SurfaceOffsetInSsh =
118 pKernelState->dwSshOffset + pKernelState->dwBindingTableSize + // offset within SSH to start of surfaces for this kernel
119 (m_HwSizes.dwMaxSizeSurfaceState * pParams->dwBindingTableOffset[i]); // offset to the current surface
120 if (u32SurfaceOffsetInSsh + m_HwSizes.dwMaxSizeSurfaceState > uiIndirectStateOffset)
121 {
122 MHW_ASSERTMESSAGE("Location requested for surface state is outside the bounds of SSH");
123 return MOS_STATUS_INVALID_PARAMETER;
124 }
125 uint8_t *pLocationOfSurfaceInSsh = (uint8_t*)
126 (pIndirectState + u32SurfaceOffsetInSsh);
127
128 if (pParams->bUseAdvState)
129 {
130 mhw_state_heap_g8_X::MEDIA_SURFACE_STATE_CMD *pCmd =
131 (mhw_state_heap_g8_X::MEDIA_SURFACE_STATE_CMD*)pLocationOfSurfaceInSsh;
132 MHW_MI_CHK_NULL(pCmd);
133 *pCmd = mhw_state_heap_g8_X::MEDIA_SURFACE_STATE_CMD();
134
135 pCmd->DW1.Width = (pParams->dwWidthToUse[i] == 0) ?
136 pParams->psSurface->dwWidth - 1 : pParams->dwWidthToUse[i] - 1;
137 pCmd->DW1.Height = (pParams->dwHeightToUse[i] == 0) ?
138 pParams->psSurface->dwHeight - 1 : pParams->dwHeightToUse[i] - 1;
139 pCmd->DW1.CrVCbUPixelOffsetVDirection = pParams->Direction;
140
141 pCmd->DW2.SurfacePitch = pParams->psSurface->dwPitch - 1;
142 pCmd->DW2.SurfaceFormat = pParams->ForceSurfaceFormat[i];
143 pCmd->DW2.InterleaveChroma = pParams->bInterleaveChroma;
144 pCmd->DW2.TileMode =
145 ((pParams->psSurface->TileType != MOS_TILE_LINEAR) << 1) |
146 ((pParams->psSurface->TileType == MOS_TILE_Y) ? 0x1 : 0x0);
147
148 pCmd->DW5.SurfaceMemoryObjectControlState = pParams->dwCacheabilityControl;
149
150 if (i == MHW_U_PLANE)
151 {
152 pCmd->DW3.XOffsetForUCb = pParams->psSurface->UPlaneOffset.iXOffset;
153 pCmd->DW3.YOffsetForUCb = pParams->psSurface->UPlaneOffset.iYOffset;
154 }
155 else if (i == MHW_V_PLANE)
156 {
157 pCmd->DW4.XOffsetForVCr = pParams->psSurface->VPlaneOffset.iXOffset;
158 pCmd->DW4.YOffsetForVCr = pParams->psSurface->VPlaneOffset.iYOffset;
159 }
160 else // Y/Generic Plane
161 {
162 pCmd->DW3.XOffsetForUCb = pParams->dwXOffset[MHW_U_PLANE];
163 pCmd->DW3.YOffsetForUCb = pParams->dwYOffset[MHW_U_PLANE];
164 pCmd->DW4.XOffsetForVCr = pParams->dwXOffset[MHW_V_PLANE];
165 pCmd->DW4.YOffsetForVCr = pParams->dwYOffset[MHW_V_PLANE];
166 }
167
168 ResourceParams.presResource = &pParams->psSurface->OsResource;
169 ResourceParams.dwOffset =
170 pParams->psSurface->dwOffset + pParams->dwBaseAddrOffset[i];
171 ResourceParams.pdwCmd = &(pCmd->DW6.Value);
172 ResourceParams.dwLocationInCmd = 6;
173 ResourceParams.bIsWritable = pParams->bIsWritable;
174 ResourceParams.dwOffsetInSSH =
175 uiIndirectStateOffset +
176 pKernelState->dwSshOffset +
177 pKernelState->dwBindingTableSize +
178 (pParams->dwBindingTableOffset[i] * m_dwMaxSurfaceStateSize);
179 ResourceParams.HwCommandType = MOS_SURFACE_STATE_ADV;
180
181 MHW_MI_CHK_STATUS(m_pfnAddResourceToCmd(
182 pOsInterface,
183 pCmdBuffer,
184 &ResourceParams));
185 }
186 else // 1D, 2D Surface
187 {
188 mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD *pCmd =
189 (mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD*)pLocationOfSurfaceInSsh;
190
191 mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD CmdInit;
192 // Add additional defaults specific to media
193 CmdInit.DW0.SurfaceHorizontalAlignment = 1;
194 CmdInit.DW0.SurfaceVerticalAlignment = 1;
195 CmdInit.DW7.ShaderChannelSelectAlpha = CmdInit.SHADER_CHANNEL_SELECT_ALPHA_ALPHA;
196 CmdInit.DW7.ShaderChannelSelectBlue = CmdInit.SHADER_CHANNEL_SELECT_BLUE_BLUE;
197 CmdInit.DW7.ShaderChannelSelectGreen = CmdInit.SHADER_CHANNEL_SELECT_GREEN_GREEN;
198 CmdInit.DW7.ShaderChannelSelectRed = CmdInit.SHADER_CHANNEL_SELECT_RED_RED;
199 *pCmd = CmdInit;
200
201 MHW_MI_CHK_STATUS(Mhw_SurfaceFormatToType(
202 pParams->ForceSurfaceFormat[i],
203 pParams->psSurface,
204 &dwSurfaceType));
205
206 pCmd->DW0.SurfaceType = dwSurfaceType;
207 pCmd->DW0.VerticalLineStride = pParams->bVertLineStride;
208 pCmd->DW0.VerticalLineStrideOffset = pParams->bVertLineStrideOffs;
209 pCmd->DW0.SurfaceFormat = pParams->ForceSurfaceFormat[i];
210 pCmd->DW0.TileMode =
211 ((pParams->psSurface->TileType != MOS_TILE_LINEAR) << 1) |
212 ((pParams->psSurface->TileType == MOS_TILE_Y) ? 0x1 : 0x0);
213
214 pCmd->DW1.MemoryObjectControlState = pParams->dwCacheabilityControl;
215
216 pCmd->DW2.Width = (pParams->dwWidthToUse[i] == 0) ?
217 pParams->psSurface->dwWidth : pParams->dwWidthToUse[i];
218 pCmd->DW2.Height = (pParams->dwHeightToUse[i] == 0) ?
219 pParams->psSurface->dwHeight : pParams->dwHeightToUse[i];
220 pCmd->DW3.SurfacePitch = (pParams->dwPitchToUse[i] == 0) ?
221 pParams->psSurface->dwPitch : pParams->dwPitchToUse[i];
222
223 pCmd->DW3.SurfacePitch--; // both for 1D & 2D surface
224 pCmd->DW3.Depth = pParams->psSurface->dwDepth;
225
226 if (dwSurfaceType == GFX3DSTATE_SURFACETYPE_BUFFER) // 1D Surface
227 {
228 if (pCmd->DW0.TileMode)
229 {
230 MHW_ASSERTMESSAGE("1D surfaces should not be tiled!");
231 eStatus = MOS_STATUS_INVALID_PARAMETER;
232 return eStatus;
233 }
234 }
235 else // 2D Surface
236 {
237 pCmd->DW2.Width--;
238 pCmd->DW2.Height--;
239 pCmd->DW3.Depth--;
240
241 pCmd->DW5.XOffset = pParams->dwXOffset[i] >> 2;
242 pCmd->DW5.YOffset = pParams->dwYOffset[i] >> 2;
243 }
244
245 ResourceParams.presResource = &pParams->psSurface->OsResource;
246 ResourceParams.dwOffset =
247 pParams->psSurface->dwOffset + pParams->dwBaseAddrOffset[i];
248 ResourceParams.pdwCmd = (pCmd->DW8_9.Value);
249 ResourceParams.dwLocationInCmd = 8;
250 ResourceParams.bIsWritable = pParams->bIsWritable;
251
252 ResourceParams.dwOffsetInSSH =
253 uiIndirectStateOffset +
254 pKernelState->dwSshOffset +
255 pKernelState->dwBindingTableSize +
256 (pParams->dwBindingTableOffset[i] * m_dwMaxSurfaceStateSize);
257 ResourceParams.HwCommandType = MOS_SURFACE_STATE;
258
259 MHW_MI_CHK_STATUS(m_pfnAddResourceToCmd(
260 pOsInterface,
261 pCmdBuffer,
262 &ResourceParams));
263 }
264 }
265
266 return eStatus;
267 }
268
SetInterfaceDescriptorEntry(PMHW_ID_ENTRY_PARAMS pParams)269 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G8_X::SetInterfaceDescriptorEntry(
270 PMHW_ID_ENTRY_PARAMS pParams)
271 {
272 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
273
274 MHW_FUNCTION_ENTER;
275
276 //------------------------------------
277 MHW_MI_CHK_NULL(pParams);
278 //------------------------------------
279
280 // Ensures that the Media ID base is correct
281 MHW_ASSERT(MOS_IS_ALIGNED(pParams->dwMediaIdOffset, m_wIdAlignment));
282
283 uint8_t *pStateHeapBase;
284 if (pParams->pGeneralStateHeap)
285 {
286 pStateHeapBase = (uint8_t*)pParams->pGeneralStateHeap->pvLockedHeap;
287 }
288 else
289 {
290 pStateHeapBase = (uint8_t*)(GetDSHPointer()->pvLockedHeap);
291 }
292
293 mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD *pInterfaceDescriptor;
294
295 pInterfaceDescriptor = (mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD *)
296 (pStateHeapBase + // State Heap Base
297 pParams->dwMediaIdOffset + // Offset to first Media ID
298 pParams->iMediaId * m_wSizeOfInterfaceDescriptor); // Offset to current ID
299 MHW_MI_CHK_NULL(pInterfaceDescriptor);
300 *pInterfaceDescriptor = mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD();
301
302 pInterfaceDescriptor->DW0.KernelStartPointer = pParams->dwKernelOffset >> MHW_KERNEL_OFFSET_SHIFT;
303 pInterfaceDescriptor->DW3.SamplerStatePointer = pParams->dwSamplerOffset >> MHW_SAMPLER_SHIFT;
304 pInterfaceDescriptor->DW3.SamplerCount = pParams->dwSamplerCount;
305 pInterfaceDescriptor->DW4.BindingTablePointer = MOS_ROUNDUP_SHIFT(pParams->dwBindingTableOffset, MHW_BINDING_TABLE_ID_SHIFT);
306 pInterfaceDescriptor->DW5.ConstantUrbEntryReadOffset = pParams->iCurbeOffset >> MHW_CURBE_SHIFT;
307 pInterfaceDescriptor->DW5.ConstantIndirectUrbEntryReadLength = MOS_ROUNDUP_SHIFT(pParams->iCurbeLength, MHW_CURBE_SHIFT);
308 pInterfaceDescriptor->DW6.BarrierEnable = pParams->bBarrierEnable;
309 pInterfaceDescriptor->DW6.NumberOfThreadsInGpgpuThreadGroup = pParams->dwNumberofThreadsInGPGPUGroup;
310 pInterfaceDescriptor->DW6.SharedLocalMemorySize = pParams->dwSharedLocalMemorySize;
311 pInterfaceDescriptor->DW7.CrossThreadConstantDataReadLength = pParams->iCrsThdConDataRdLn >> MHW_THRD_CON_DATA_RD_SHIFT;
312
313 return eStatus;
314 }
315
AddInterfaceDescriptorData(PMHW_ID_ENTRY_PARAMS pParams)316 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G8_X::AddInterfaceDescriptorData(
317 PMHW_ID_ENTRY_PARAMS pParams)
318 {
319 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
320
321 MHW_FUNCTION_ENTER;
322
323 //------------------------------------
324 MHW_MI_CHK_NULL(pParams);
325 //------------------------------------
326
327 // Ensures that the Media ID base is correct
328 MHW_ASSERT(MOS_IS_ALIGNED(pParams->dwMediaIdOffset, m_wIdAlignment));
329
330 uint32_t offset = pParams->dwMediaIdOffset + pParams->iMediaId * m_wSizeOfInterfaceDescriptor;
331
332 mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD *pInterfaceDescriptor;
333 pInterfaceDescriptor = (mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD *)MOS_AllocMemory(sizeof(mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD));
334 MHW_MI_CHK_NULL(pInterfaceDescriptor);
335 *pInterfaceDescriptor = mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD();
336
337 pInterfaceDescriptor->DW0.KernelStartPointer = pParams->dwKernelOffset >> MHW_KERNEL_OFFSET_SHIFT;
338 pInterfaceDescriptor->DW3.SamplerStatePointer = pParams->dwSamplerOffset >> MHW_SAMPLER_SHIFT;
339 pInterfaceDescriptor->DW3.SamplerCount = pParams->dwSamplerCount;
340 pInterfaceDescriptor->DW4.BindingTablePointer = MOS_ROUNDUP_SHIFT(pParams->dwBindingTableOffset, MHW_BINDING_TABLE_ID_SHIFT);
341 pInterfaceDescriptor->DW5.ConstantUrbEntryReadOffset = pParams->iCurbeOffset >> MHW_CURBE_SHIFT;
342 pInterfaceDescriptor->DW5.ConstantIndirectUrbEntryReadLength = MOS_ROUNDUP_SHIFT(pParams->iCurbeLength, MHW_CURBE_SHIFT);
343 pInterfaceDescriptor->DW6.BarrierEnable = pParams->bBarrierEnable;
344 pInterfaceDescriptor->DW6.NumberOfThreadsInGpgpuThreadGroup = pParams->dwNumberofThreadsInGPGPUGroup;
345 pInterfaceDescriptor->DW6.SharedLocalMemorySize = pParams->dwSharedLocalMemorySize;
346 pInterfaceDescriptor->DW7.CrossThreadConstantDataReadLength = pParams->iCrsThdConDataRdLn >> MHW_THRD_CON_DATA_RD_SHIFT;
347
348 // need to subtract memory block's offset in current state heap for AddData API
349 offset -= pParams->memoryBlock->GetOffset();
350 pParams->memoryBlock->AddData(pInterfaceDescriptor, offset,
351 sizeof(mhw_state_heap_g8_X::INTERFACE_DESCRIPTOR_DATA_CMD));
352
353 MOS_SafeFreeMemory(pInterfaceDescriptor);
354
355 return eStatus;
356 }
357
SetSurfaceStateEntry(PMHW_SURFACE_STATE_PARAMS pParams)358 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G8_X::SetSurfaceStateEntry(
359 PMHW_SURFACE_STATE_PARAMS pParams)
360 {
361 MHW_MI_CHK_NULL(pParams);
362
363 uint32_t TileMode = (pParams->bTiledSurface) ? ((pParams->bTileWalk == 0) ? 2 /*x-tile*/: 3 /*y-tile*/) : 0; /*linear*/
364
365 if (pParams->bUseAdvState)
366 {
367 // Obtain the Pointer to the Surface state from SSH Buffer
368 mhw_state_heap_g8_X::MEDIA_SURFACE_STATE_CMD *pSurfaceStateAdv =
369 (mhw_state_heap_g8_X::MEDIA_SURFACE_STATE_CMD *)pParams->pSurfaceState;
370 MHW_MI_CHK_NULL(pSurfaceStateAdv);
371
372 // Initialize Surface State
373 *pSurfaceStateAdv = mhw_state_heap_g8_X::MEDIA_SURFACE_STATE_CMD();
374
375 pSurfaceStateAdv->DW1.Width = pParams->dwWidth - 1;
376 pSurfaceStateAdv->DW1.Height = pParams->dwHeight - 1;
377 pSurfaceStateAdv->DW1.CrVCbUPixelOffsetVDirection = pParams->UVPixelOffsetVDirection;
378 pSurfaceStateAdv->DW2.SurfaceFormat = pParams->dwFormat;
379 pSurfaceStateAdv->DW2.InterleaveChroma = pParams->bInterleaveChroma;
380 pSurfaceStateAdv->DW2.SurfacePitch = pParams->dwPitch - 1;
381 pSurfaceStateAdv->DW2.HalfPitchForChroma = pParams->bHalfPitchChroma;
382 pSurfaceStateAdv->DW2.TileMode = TileMode;
383 pSurfaceStateAdv->DW3.XOffsetForUCb = pParams->dwXOffsetForU;
384 pSurfaceStateAdv->DW3.YOffsetForUCb = pParams->dwYOffsetForU;
385 pSurfaceStateAdv->DW4.XOffsetForVCr = pParams->dwXOffsetForV;
386 pSurfaceStateAdv->DW4.YOffsetForVCr = pParams->dwYOffsetForV;
387 pSurfaceStateAdv->DW5.VerticalLineStride = pParams->bVerticalLineStride;
388 pSurfaceStateAdv->DW5.VerticalLineStrideOffset = pParams->bVerticalLineStrideOffset;
389 pSurfaceStateAdv->DW5.SurfaceMemoryObjectControlState = pParams->dwCacheabilityControl;
390
391 // Return offset and pointer for patching
392 pParams->pdwCmd = (uint32_t *)&(pSurfaceStateAdv->DW6.Value);
393 pParams->dwLocationInCmd = 6;
394 }
395 else // not AVS
396 {
397 // Obtain the Pointer to the Surface state from SSH Buffer
398 mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD *pSurfaceState =
399 (mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD *)pParams->pSurfaceState;
400 MHW_MI_CHK_NULL(pSurfaceState);
401
402 // Initialize Surface State
403 *pSurfaceState = mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD();
404
405 pSurfaceState->DW0.SurfaceType = pParams->SurfaceType3D;
406 pSurfaceState->DW0.SurfaceFormat = pParams->dwFormat;
407 pSurfaceState->DW0.TileMode = TileMode;
408 pSurfaceState->DW0.VerticalLineStride = pParams->bVerticalLineStride;
409 pSurfaceState->DW0.VerticalLineStrideOffset = pParams->bVerticalLineStrideOffset;
410 pSurfaceState->DW0.SurfaceHorizontalAlignment = 1;
411 pSurfaceState->DW0.SurfaceVerticalAlignment = 1;
412
413 pSurfaceState->DW1.MemoryObjectControlState = pParams->dwCacheabilityControl;
414
415 if (pParams->SurfaceType3D == GFX3DSTATE_SURFACETYPE_BUFFER)
416 { // Buffer resources - use original width/height/pitch/depth
417 pSurfaceState->DW2.Width = pParams->dwWidth;
418 pSurfaceState->DW2.Height = pParams->dwHeight;
419 pSurfaceState->DW3.SurfacePitch = pParams->dwPitch;
420 pSurfaceState->DW3.Depth = pParams->dwDepth;
421 }
422 else
423 {
424 pSurfaceState->DW2.Width = pParams->dwWidth - 1;
425 pSurfaceState->DW2.Height = pParams->dwHeight - 1;
426 pSurfaceState->DW3.SurfacePitch = pParams->dwPitch - 1;
427 pSurfaceState->DW3.Depth = pParams->dwDepth - 1;
428 }
429
430 pSurfaceState->DW5.XOffset = pParams->iXOffset >> 2;
431 pSurfaceState->DW5.YOffset = pParams->iYOffset >> 2;
432 pSurfaceState->DW6.Obj0.XOffsetForUOrUvPlane = pParams->dwXOffsetForU;
433 pSurfaceState->DW6.Obj0.YOffsetForUOrUvPlane = pParams->dwYOffsetForU;
434
435 pSurfaceState->DW7.ShaderChannelSelectAlpha = mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_ALPHA_ALPHA;
436 pSurfaceState->DW7.ShaderChannelSelectBlue = mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_BLUE_BLUE;
437 pSurfaceState->DW7.ShaderChannelSelectGreen = mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_GREEN_GREEN;
438 pSurfaceState->DW7.ShaderChannelSelectRed = mhw_state_heap_g8_X::RENDER_SURFACE_STATE_CMD::SHADER_CHANNEL_SELECT_RED_RED;
439
440 // Return offset and pointer for patching
441 pParams->pdwCmd = (uint32_t *)&(pSurfaceState->DW8_9.SurfaceBaseAddress);
442 pParams->dwLocationInCmd = 8;
443 }
444 return MOS_STATUS_SUCCESS;
445 }
446
InitSamplerStates(void * pSamplerStates,int32_t iSamplers)447 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G8_X::InitSamplerStates(
448 void *pSamplerStates,
449 int32_t iSamplers)
450 {
451 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
452
453 MHW_FUNCTION_ENTER;
454
455 MHW_MI_CHK_NULL(pSamplerStates);
456
457 mhw_state_heap_g8_X::SAMPLER_STATE_CMD SamplerStateInit;
458 // Add additional defaults specific to media
459 SamplerStateInit.DW0.MinModeFilter = SamplerStateInit.MIN_MODE_FILTER_LINEAR;
460 SamplerStateInit.DW0.MagModeFilter = SamplerStateInit.MAG_MODE_FILTER_LINEAR;
461 SamplerStateInit.DW0.TextureBorderColorMode = SamplerStateInit.TEXTURE_BORDER_COLOR_MODE_8BIT;
462 SamplerStateInit.DW0.SamplerDisable = true;
463 SamplerStateInit.DW1.ShadowFunction = SamplerStateInit.SHADOW_FUNCTION_PREFILTEROPNEVER;
464 SamplerStateInit.DW3.TczAddressControlMode = SamplerStateInit.TCZ_ADDRESS_CONTROL_MODE_CLAMP;
465 SamplerStateInit.DW3.TcyAddressControlMode = SamplerStateInit.TCY_ADDRESS_CONTROL_MODE_CLAMP;
466 SamplerStateInit.DW3.TcxAddressControlMode = SamplerStateInit.TCX_ADDRESS_CONTROL_MODE_CLAMP;
467 SamplerStateInit.DW3.RAddressMinFilterRoundingEnable = true;
468 SamplerStateInit.DW3.RAddressMagFilterRoundingEnable = true;
469 SamplerStateInit.DW3.VAddressMinFilterRoundingEnable = true;
470 SamplerStateInit.DW3.VAddressMagFilterRoundingEnable = true;
471 SamplerStateInit.DW3.UAddressMinFilterRoundingEnable = true;
472 SamplerStateInit.DW3.UAddressMagFilterRoundingEnable = true;
473
474 // Initialize Media Sampler States
475 uint8_t *pu8SamplerState = (uint8_t*)pSamplerStates;
476
477 for (; iSamplers > 0; iSamplers--)
478 {
479 MOS_SecureMemcpy(pu8SamplerState, SamplerStateInit.byteSize, &SamplerStateInit, SamplerStateInit.byteSize);
480 pu8SamplerState += SamplerStateInit.byteSize;
481 }
482
483 return eStatus;
484 }
485
486 //!
487 //! \brief Load Sampler 8X8 State Table for Gen8
488 //! \details Load Sampler 8x8 State Table
489 //! \param [in] void *pTable
490 //! Pointer to 8x8 table in GSH to load
491 //! \param [in] PMHW_SAMPLER_AVS_TABLE_PARAM mhwSamplerAvsTableParam
492 //! Pointer to 8x8 sampler state
493 //! \return MOS_STATUS
494 //!
LoadSamplerAvsTable(void * pvTable,PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam)495 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G8_X::LoadSamplerAvsTable(
496 void *pvTable,
497 PMHW_SAMPLER_AVS_TABLE_PARAM pMhwSamplerAvsTableParam)
498 {
499 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
500
501 MHW_FUNCTION_ENTER;
502
503 MHW_MI_CHK_NULL(pvTable);
504 MHW_MI_CHK_NULL(pMhwSamplerAvsTableParam);
505
506 // DW0 ~ DW15 are for sampler state and programmed in other function, so no need to setup for it here.
507
508 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_CMD *pSampler8x8Avs =
509 (mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_CMD*)pvTable;
510
511 uint32_t u32ConvolveTableNum =
512 sizeof(pSampler8x8Avs->FilterCoefficient016) / sizeof(pSampler8x8Avs->FilterCoefficient016[0]);
513
514 // DW16 ~ DW151 setting for table coefficients (DW0 ~ DW7) * 17
515 for (uint32_t u32CoeffTableIdx = 0; u32CoeffTableIdx < u32ConvolveTableNum; u32CoeffTableIdx++)
516 {
517 PMHW_AVS_COEFFICIENT_PARAM pCoeffParam = &pMhwSamplerAvsTableParam->paMhwAvsCoeffParam[u32CoeffTableIdx];
518 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_COEFFICIENTS_CMD *pCoeffTable =
519 &pSampler8x8Avs->FilterCoefficient016[u32CoeffTableIdx];
520
521 pCoeffTable->DW0.Table0XFilterCoefficientN0 = pCoeffParam->ZeroXFilterCoefficient[0];
522 pCoeffTable->DW0.Table0YFilterCoefficientN0 = pCoeffParam->ZeroYFilterCoefficient[0];
523 pCoeffTable->DW0.Table0XFilterCoefficientN1 = pCoeffParam->ZeroXFilterCoefficient[1];
524 pCoeffTable->DW0.Table0YFilterCoefficientN1 = pCoeffParam->ZeroYFilterCoefficient[1];
525
526 pCoeffTable->DW1.Table0XFilterCoefficientN2 = pCoeffParam->ZeroXFilterCoefficient[2];
527 pCoeffTable->DW1.Table0YFilterCoefficientN2 = pCoeffParam->ZeroYFilterCoefficient[2];
528 pCoeffTable->DW1.Table0XFilterCoefficientN3 = pCoeffParam->ZeroXFilterCoefficient[3];
529 pCoeffTable->DW1.Table0YFilterCoefficientN3 = pCoeffParam->ZeroYFilterCoefficient[3];
530
531 pCoeffTable->DW2.Table0XFilterCoefficientN4 = pCoeffParam->ZeroXFilterCoefficient[4];
532 pCoeffTable->DW2.Table0YFilterCoefficientN4 = pCoeffParam->ZeroYFilterCoefficient[4];
533 pCoeffTable->DW2.Table0XFilterCoefficientN5 = pCoeffParam->ZeroXFilterCoefficient[5];
534 pCoeffTable->DW2.Table0YFilterCoefficientN5 = pCoeffParam->ZeroYFilterCoefficient[5];
535
536 pCoeffTable->DW3.Table0XFilterCoefficientN6 = pCoeffParam->ZeroXFilterCoefficient[6];
537 pCoeffTable->DW3.Table0YFilterCoefficientN6 = pCoeffParam->ZeroYFilterCoefficient[6];
538 pCoeffTable->DW3.Table0XFilterCoefficientN7 = pCoeffParam->ZeroXFilterCoefficient[7];
539 pCoeffTable->DW3.Table0YFilterCoefficientN7 = pCoeffParam->ZeroYFilterCoefficient[7];
540
541 pCoeffTable->DW4.Table1XFilterCoefficientN2 = pCoeffParam->OneXFilterCoefficient[0];
542 pCoeffTable->DW4.Table1XFilterCoefficientN3 = pCoeffParam->OneXFilterCoefficient[1];
543 pCoeffTable->DW5.Table1XFilterCoefficientN4 = pCoeffParam->OneXFilterCoefficient[2];
544 pCoeffTable->DW5.Table1XFilterCoefficientN5 = pCoeffParam->OneXFilterCoefficient[3];
545
546 pCoeffTable->DW6.Table1YFilterCoefficientN2 = pCoeffParam->OneYFilterCoefficient[0];
547 pCoeffTable->DW6.Table1YFilterCoefficientN3 = pCoeffParam->OneYFilterCoefficient[1];
548 pCoeffTable->DW7.Table1YFilterCoefficientN4 = pCoeffParam->OneYFilterCoefficient[2];
549 pCoeffTable->DW7.Table1YFilterCoefficientN5 = pCoeffParam->OneYFilterCoefficient[3];
550 }
551
552 // DW152 ~ DW153 setting for table control
553 pSampler8x8Avs->DW152.TransitionAreaWith8Pixels = pMhwSamplerAvsTableParam->byteTransitionArea8Pixels; // 3-bits
554 pSampler8x8Avs->DW152.TransitionAreaWith4Pixels = pMhwSamplerAvsTableParam->byteTransitionArea4Pixels; // 3-bits
555 pSampler8x8Avs->DW152.MaxDerivative8Pixels = pMhwSamplerAvsTableParam->byteMaxDerivative8Pixels;
556 pSampler8x8Avs->DW152.MaxDerivative4Pixels = pMhwSamplerAvsTableParam->byteMaxDerivative4Pixels;
557 pSampler8x8Avs->DW152.DefaultSharpnessLevel = pMhwSamplerAvsTableParam->byteDefaultSharpnessLevel;
558
559 pSampler8x8Avs->DW153.RgbAdaptive = pMhwSamplerAvsTableParam->bEnableRGBAdaptive;
560 pSampler8x8Avs->DW153.AdaptiveFilterForAllChannels = pMhwSamplerAvsTableParam->bAdaptiveFilterAllChannels;
561 pSampler8x8Avs->DW153.BypassYAdaptiveFiltering = pMhwSamplerAvsTableParam->bBypassYAdaptiveFiltering;
562 pSampler8x8Avs->DW153.BypassXAdaptiveFiltering = pMhwSamplerAvsTableParam->bBypassXAdaptiveFiltering;
563
564 return eStatus;
565 }
566
567 //!
568 //! \brief Set Sampler State for Gen8
569 //! \details Set sampler state according to sampler type
570 //! \param PMHW_STATE_HEAP_INTERFACE pStateHeapInterface
571 //! [in] State heap interface
572 //! \param void *pSampler
573 //! [in] Pointer to sampler state in GSH
574 //! \param PMHW_SAMPLER_STATE_PARAM pParam
575 //! [in] Sampler State param
576 //! \return MOS_STATUS
577 //!
SetSamplerState(void * pSampler,PMHW_SAMPLER_STATE_PARAM pParam)578 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G8_X::SetSamplerState(
579 void *pSampler,
580 PMHW_SAMPLER_STATE_PARAM pParam)
581 {
582 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
583
584 MHW_FUNCTION_ENTER;
585
586 MHW_MI_CHK_NULL(pSampler);
587 MHW_MI_CHK_NULL(pParam);
588
589 if (pParam->bInUse)
590 {
591 if (pParam->SamplerType == MHW_SAMPLER_TYPE_3D)
592 {
593 mhw_state_heap_g8_X::SAMPLER_STATE_CMD *pUnormSampler =
594 (mhw_state_heap_g8_X::SAMPLER_STATE_CMD*)pSampler;
595
596 mhw_state_heap_g8_X::SAMPLER_STATE_CMD UnormSamplerInit;
597
598 // Add additional defaults specific to media
599 UnormSamplerInit.DW0.MinModeFilter = UnormSamplerInit.MIN_MODE_FILTER_LINEAR;
600 UnormSamplerInit.DW0.MagModeFilter = UnormSamplerInit.MAG_MODE_FILTER_LINEAR;
601 UnormSamplerInit.DW0.TextureBorderColorMode = UnormSamplerInit.TEXTURE_BORDER_COLOR_MODE_8BIT;
602 UnormSamplerInit.DW0.SamplerDisable = false;
603 UnormSamplerInit.DW1.ShadowFunction = UnormSamplerInit.SHADOW_FUNCTION_PREFILTEROPNEVER;
604 UnormSamplerInit.DW3.TczAddressControlMode = UnormSamplerInit.TCZ_ADDRESS_CONTROL_MODE_CLAMP;
605 UnormSamplerInit.DW3.TcyAddressControlMode = UnormSamplerInit.TCY_ADDRESS_CONTROL_MODE_CLAMP;
606 UnormSamplerInit.DW3.TcxAddressControlMode = UnormSamplerInit.TCX_ADDRESS_CONTROL_MODE_CLAMP;
607 UnormSamplerInit.DW3.RAddressMinFilterRoundingEnable = true;
608 UnormSamplerInit.DW3.RAddressMagFilterRoundingEnable = true;
609 UnormSamplerInit.DW3.VAddressMinFilterRoundingEnable = true;
610 UnormSamplerInit.DW3.VAddressMagFilterRoundingEnable = true;
611 UnormSamplerInit.DW3.UAddressMinFilterRoundingEnable = true;
612 UnormSamplerInit.DW3.UAddressMagFilterRoundingEnable = true;
613
614 *pUnormSampler = UnormSamplerInit;
615
616 if (pParam->Unorm.SamplerFilterMode == MHW_SAMPLER_FILTER_NEAREST)
617 {
618 pUnormSampler->DW0.MinModeFilter = pUnormSampler->MIN_MODE_FILTER_NEAREST;
619 pUnormSampler->DW0.MagModeFilter = pUnormSampler->MAG_MODE_FILTER_NEAREST;
620 }
621 else if (pParam->Unorm.SamplerFilterMode == MHW_SAMPLER_FILTER_BILINEAR)
622 {
623 pUnormSampler->DW0.MinModeFilter = pUnormSampler->MIN_MODE_FILTER_LINEAR;
624 pUnormSampler->DW0.MagModeFilter = pUnormSampler->MAG_MODE_FILTER_LINEAR;
625 }
626 else
627 {
628 pUnormSampler->DW0.MinModeFilter = pParam->Unorm.MinFilter;
629 pUnormSampler->DW0.MagModeFilter = pParam->Unorm.MagFilter;
630 }
631
632 pUnormSampler->DW3.TcxAddressControlMode = pParam->Unorm.AddressU;
633 pUnormSampler->DW3.TcyAddressControlMode = pParam->Unorm.AddressV;
634 pUnormSampler->DW3.TczAddressControlMode = pParam->Unorm.AddressW;
635
636 if (pParam->Unorm.bBorderColorIsValid)
637 {
638 mhw_state_heap_g8_X::SAMPLER_INDIRECT_STATE_CMD *pUnormSamplerBorderColor =
639 (mhw_state_heap_g8_X::SAMPLER_INDIRECT_STATE_CMD*)pParam->Unorm.pIndirectState;
640 MHW_MI_CHK_NULL(pUnormSamplerBorderColor);
641
642 mhw_state_heap_g8_X::SAMPLER_INDIRECT_STATE_CMD UnormSamplerBorderColorInit;
643 *pUnormSamplerBorderColor = UnormSamplerBorderColorInit;
644
645 // Since the structure is a union between float, uint, and int, can use any to set the state DW
646 pUnormSamplerBorderColor->DW0.Obj1.BorderColorRed = pParam->Unorm.BorderColorRedU;
647 pUnormSamplerBorderColor->DW1.BorderColorGreen = pParam->Unorm.BorderColorGreenU;
648 pUnormSamplerBorderColor->DW2.BorderColorBlue = pParam->Unorm.BorderColorBlueU;
649 pUnormSamplerBorderColor->DW3.BorderColorAlpha = pParam->Unorm.BorderColorAlphaU;
650
651 pUnormSampler->DW2.IndirectStatePointer = pParam->Unorm.IndirectStateOffset >> MHW_SAMPLER_INDIRECT_SHIFT;
652 }
653 }
654 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_AVS)
655 {
656 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_CMD *pSamplerState8x8 =
657 (mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_CMD*)pSampler;
658
659 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_CMD SamplerState8x8Init;
660 // Add additional defaults specific to media
661 SamplerState8x8Init.DW0.GainFactor = 0;
662 SamplerState8x8Init.DW0.R3XCoefficient = 0;
663 SamplerState8x8Init.DW0.R3CCoefficient = 0;
664 SamplerState8x8Init.DW2.GlobalNoiseEstimation = 0;
665 SamplerState8x8Init.DW2.R5XCoefficient = 0;
666 SamplerState8x8Init.DW2.R5CxCoefficient = 0;
667 SamplerState8x8Init.DW2.R5XCoefficient = 0;
668 SamplerState8x8Init.DW3.SinAlpha = 101;
669 SamplerState8x8Init.DW3.CosAlpha = 79;
670 SamplerState8x8Init.DW5.DiamondAlpha = 100;
671 SamplerState8x8Init.DW5.DiamondDu = 0;
672 SamplerState8x8Init.DW7.InvMarginVyl = 3300;
673 SamplerState8x8Init.DW8.InvMarginVyu = 1600;
674 SamplerState8x8Init.DW10.S0L = MOS_BITFIELD_VALUE((uint32_t)-5, 11);
675 SamplerState8x8Init.DW10.YSlope2 = 31;
676 SamplerState8x8Init.DW12.YSlope1 = 31;
677 SamplerState8x8Init.DW14.S0U = 256;
678 SamplerState8x8Init.DW15.S1U = 113;
679 SamplerState8x8Init.DW15.S2U = MOS_BITFIELD_VALUE((uint32_t)-179, 11);
680
681 *pSamplerState8x8 = SamplerState8x8Init;
682
683 // Set 8-Tap Adaptive Filter
684 if (pParam->Avs.b8TapAdaptiveEnable)
685 {
686 pSamplerState8x8->DW3.Enable8TapFilter = MHW_SAMPLER_FILTER_8_TAP_ADATIVE;
687 }
688
689 // Set STE Params
690 pSamplerState8x8->DW3.SkinToneTunedIefEnable = pParam->Avs.bEnableSTDE;
691 if (pParam->Avs.bEnableSTDE)
692 {
693 pSamplerState8x8->DW5.Skindetailfactor = pParam->Avs.bSkinDetailFactor;
694 pSamplerState8x8->DW4.VyStdEnable = true;
695 }
696
697 // Setup IEF coefficients
698 // Note: IEFBypass now has to be done through kernel
699 if (pParam->Avs.bEnableIEF && pParam->Avs.wIEFFactor > 0)
700 {
701 pSamplerState8x8->DW0.GainFactor = pParam->Avs.wIEFFactor;
702 pSamplerState8x8->DW0.R3XCoefficient = pParam->Avs.wR3xCoefficient;
703 pSamplerState8x8->DW0.R3CCoefficient = pParam->Avs.wR3cCoefficient;
704 pSamplerState8x8->DW2.R5XCoefficient = pParam->Avs.wR5xCoefficient;
705 pSamplerState8x8->DW2.R5CxCoefficient = pParam->Avs.wR5cxCoefficient;
706 pSamplerState8x8->DW2.R5CCoefficient = pParam->Avs.wR5cCoefficient;
707 }
708
709 if (pParam->Avs.bEnableAVS)
710 {
711 pSamplerState8x8->DW0.GainFactor = pParam->Avs.GainFactor;
712 pSamplerState8x8->DW0.StrongEdgeThreshold = pParam->Avs.StrongEdgeThr;
713 pSamplerState8x8->DW0.WeakEdgeThreshold = pParam->Avs.WeakEdgeThr;
714 pSamplerState8x8->DW2.GlobalNoiseEstimation = pParam->Avs.GlobalNoiseEstm;
715 pSamplerState8x8->DW2.StrongEdgeWeight = pParam->Avs.StrongEdgeWght;
716 pSamplerState8x8->DW2.RegularWeight = pParam->Avs.RegularWght;
717 pSamplerState8x8->DW2.NonEdgeWeight = pParam->Avs.NonEdgeWght;
718 pSamplerState8x8->DW3.Enable8TapFilter = pParam->Avs.EightTapAFEnable;
719 pSamplerState8x8->DW0.R3XCoefficient = pParam->Avs.wR3xCoefficient;
720 pSamplerState8x8->DW0.R3CCoefficient = pParam->Avs.wR3cCoefficient;
721 pSamplerState8x8->DW2.R5XCoefficient = pParam->Avs.wR5xCoefficient;
722 pSamplerState8x8->DW2.R5CxCoefficient = pParam->Avs.wR5cxCoefficient;
723 pSamplerState8x8->DW2.R5CCoefficient = pParam->Avs.wR5cCoefficient;
724
725 if (pParam->Avs.AdditionalOverridesUsed)
726 {
727 pSamplerState8x8->DW10.YSlope2 = pParam->Avs.YSlope2;
728 pSamplerState8x8->DW10.S0L = pParam->Avs.S0L;
729 pSamplerState8x8->DW12.YSlope1 = pParam->Avs.YSlope1;
730 pSamplerState8x8->DW15.S2U = pParam->Avs.S2U;
731 pSamplerState8x8->DW15.S1U = pParam->Avs.S1U;
732 }
733
734 if (pParam->Avs.pMhwSamplerAvsTableParam)
735 {
736 MHW_MI_CHK_STATUS(LoadSamplerAvsTable(pSamplerState8x8, pParam->Avs.pMhwSamplerAvsTableParam));
737 }
738 else
739 {
740 MHW_ASSERTMESSAGE("Invalid sampler params for avs 8x8 table");
741 eStatus = MOS_STATUS_INVALID_PARAMETER;
742 return eStatus;
743 }
744 }
745 }
746 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_CONV)
747 {
748 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_CONVOLVE_CMD *pSamplerConvolve =
749 (mhw_state_heap_g8_X::SAMPLER_STATE_8x8_CONVOLVE_CMD*)pSampler;
750
751 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_CONVOLVE_CMD SamplerConvolveInit;
752 *pSamplerConvolve = SamplerConvolveInit;
753
754 pSamplerConvolve->DW0.Height = pParam->Convolve.ui8Height;
755 pSamplerConvolve->DW0.Width = pParam->Convolve.ui8Width;
756 pSamplerConvolve->DW0.ScaleDownValue = pParam->Convolve.ui8ScaledDownValue;
757 pSamplerConvolve->DW0.SizeOfTheCoefficient = pParam->Convolve.ui8SizeOfTheCoefficient;
758
759 uint32_t u32ConvolveTableNum =
760 sizeof(pSamplerConvolve->FilterCoefficient150150) / sizeof(pSamplerConvolve->FilterCoefficient150150[0]);
761 for (uint32_t i = 0; i < u32ConvolveTableNum; i++)
762 {
763 pSamplerConvolve->FilterCoefficient150150[i].DW0.FilterCoefficient00 = pParam->Convolve.CoeffTable[i].wFilterCoeff[0];
764 pSamplerConvolve->FilterCoefficient150150[i].DW0.FilterCoefficient01 = pParam->Convolve.CoeffTable[i].wFilterCoeff[1];
765 pSamplerConvolve->FilterCoefficient150150[i].DW1.FilterCoefficient02 = pParam->Convolve.CoeffTable[i].wFilterCoeff[2];
766 pSamplerConvolve->FilterCoefficient150150[i].DW1.FilterCoefficient03 = pParam->Convolve.CoeffTable[i].wFilterCoeff[3];
767 pSamplerConvolve->FilterCoefficient150150[i].DW2.FilterCoefficient04 = pParam->Convolve.CoeffTable[i].wFilterCoeff[4];
768 pSamplerConvolve->FilterCoefficient150150[i].DW2.FilterCoefficient05 = pParam->Convolve.CoeffTable[i].wFilterCoeff[5];
769 pSamplerConvolve->FilterCoefficient150150[i].DW3.FilterCoefficient06 = pParam->Convolve.CoeffTable[i].wFilterCoeff[6];
770 pSamplerConvolve->FilterCoefficient150150[i].DW3.FilterCoefficient07 = pParam->Convolve.CoeffTable[i].wFilterCoeff[7];
771 pSamplerConvolve->FilterCoefficient150150[i].DW4.FilterCoefficient08 = pParam->Convolve.CoeffTable[i].wFilterCoeff[8];
772 pSamplerConvolve->FilterCoefficient150150[i].DW4.FilterCoefficient09 = pParam->Convolve.CoeffTable[i].wFilterCoeff[9];
773 pSamplerConvolve->FilterCoefficient150150[i].DW5.FilterCoefficient010 = pParam->Convolve.CoeffTable[i].wFilterCoeff[10];
774 pSamplerConvolve->FilterCoefficient150150[i].DW5.FilterCoefficient011 = pParam->Convolve.CoeffTable[i].wFilterCoeff[11];
775 pSamplerConvolve->FilterCoefficient150150[i].DW6.FilterCoefficient012 = pParam->Convolve.CoeffTable[i].wFilterCoeff[12];
776 pSamplerConvolve->FilterCoefficient150150[i].DW6.FilterCoefficient013 = pParam->Convolve.CoeffTable[i].wFilterCoeff[13];
777 pSamplerConvolve->FilterCoefficient150150[i].DW7.FilterCoefficient014 = pParam->Convolve.CoeffTable[i].wFilterCoeff[14];
778 pSamplerConvolve->FilterCoefficient150150[i].DW7.FilterCoefficient015 = pParam->Convolve.CoeffTable[i].wFilterCoeff[15];
779 }
780 }
781 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_MISC)
782 {
783 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD *pSamplerMisc =
784 (mhw_state_heap_g8_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD*)pSampler;
785
786 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD SamplerMiscInit;
787 *pSamplerMisc = SamplerMiscInit;
788
789 pSamplerMisc->DW0.HeightOfTheKernel = pParam->Misc.byteHeight;
790 pSamplerMisc->DW0.WidthOfTheKernel = pParam->Misc.byteWidth;
791 pSamplerMisc->DW0.BitMask16ForRow0150 = pParam->Misc.wRow[0];
792 pSamplerMisc->DW1.BitMask16ForRow1150 = pParam->Misc.wRow[1];
793 pSamplerMisc->DW1.BitMask16ForRow2150 = pParam->Misc.wRow[2];
794 pSamplerMisc->DW2.BitMask16ForRow3150 = pParam->Misc.wRow[3];
795 pSamplerMisc->DW2.BitMask16ForRow4150 = pParam->Misc.wRow[4];
796 pSamplerMisc->DW3.BitMask16ForRow5150 = pParam->Misc.wRow[5];
797 pSamplerMisc->DW3.BitMask16ForRow6150 = pParam->Misc.wRow[6];
798 pSamplerMisc->DW4.BitMask16ForRow7150 = pParam->Misc.wRow[7];
799 pSamplerMisc->DW4.BitMask16ForRow8150 = pParam->Misc.wRow[8];
800 pSamplerMisc->DW5.BitMask16ForRow9150 = pParam->Misc.wRow[9];
801 pSamplerMisc->DW5.BitMask16ForRow10150 = pParam->Misc.wRow[10];
802 pSamplerMisc->DW6.BitMask16ForRow11150 = pParam->Misc.wRow[11];
803 pSamplerMisc->DW6.BitMask16ForRow12150 = pParam->Misc.wRow[12];
804 pSamplerMisc->DW7.BitMask16ForRow13150 = pParam->Misc.wRow[13];
805 pSamplerMisc->DW7.BitMask16ForRow14150 = pParam->Misc.wRow[14];
806 }
807 else
808 {
809 MHW_ASSERTMESSAGE("Invalid sampler type '%d'", pParam->SamplerType);
810 eStatus = MOS_STATUS_INVALID_PARAMETER;
811 return eStatus;
812 }
813 }
814 eStatus = MOS_STATUS_SUCCESS;
815
816 return eStatus;
817 }
818
AddSamplerStateData(uint32_t samplerOffset,MemoryBlock * memoryBlock,PMHW_SAMPLER_STATE_PARAM pParam)819 MOS_STATUS MHW_STATE_HEAP_INTERFACE_G8_X::AddSamplerStateData(
820 uint32_t samplerOffset,
821 MemoryBlock *memoryBlock,
822 PMHW_SAMPLER_STATE_PARAM pParam)
823 {
824 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
825
826 MHW_MI_CHK_NULL(memoryBlock);
827 MHW_MI_CHK_NULL(pParam);
828
829 if (pParam->SamplerType == MHW_SAMPLER_TYPE_3D)
830 {
831 mhw_state_heap_g8_X::SAMPLER_STATE_CMD unormSampler;
832 mhw_state_heap_g8_X::SAMPLER_INDIRECT_STATE_CMD indirectState;
833
834 pParam->Unorm.pIndirectState = &indirectState;
835
836 MHW_MI_CHK_STATUS(SetSamplerState(&unormSampler, pParam));
837
838 // Add indirect state to heap if necessary
839 if (pParam->Unorm.bBorderColorIsValid)
840 {
841 // adjust unormSampler->DW2.IndirectStatePointer
842 // to include memoryBlock's offset from base of state heap
843 unormSampler.DW2.IndirectStatePointer =
844 (pParam->Unorm.IndirectStateOffset + memoryBlock->GetOffset())
845 >> MHW_SAMPLER_INDIRECT_SHIFT;
846
847 MHW_MI_CHK_STATUS(memoryBlock->AddData(
848 &indirectState,
849 pParam->Unorm.IndirectStateOffset,
850 sizeof(mhw_state_heap_g8_X::SAMPLER_INDIRECT_STATE_CMD)));
851 }
852
853 // Add sampler state data to heap
854 MHW_MI_CHK_STATUS(memoryBlock->AddData(
855 &unormSampler,
856 samplerOffset,
857 sizeof(mhw_state_heap_g8_X::SAMPLER_STATE_CMD)));
858 }
859 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_AVS)
860 {
861 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_CMD samplerState8x8;
862
863 MHW_MI_CHK_STATUS(SetSamplerState(&samplerState8x8, pParam));
864
865 // Add sampler data to heap
866 MHW_MI_CHK_STATUS(memoryBlock->AddData(
867 &samplerState8x8,
868 samplerOffset,
869 sizeof(mhw_state_heap_g8_X::SAMPLER_STATE_8x8_AVS_CMD)));
870 }
871 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_CONV)
872 {
873 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_CONVOLVE_CMD samplerConvolve;
874
875 MHW_MI_CHK_STATUS(SetSamplerState(&samplerConvolve, pParam));
876
877 MHW_MI_CHK_STATUS(memoryBlock->AddData(
878 &samplerConvolve,
879 samplerOffset,
880 sizeof(mhw_state_heap_g8_X::SAMPLER_STATE_8x8_CONVOLVE_CMD)));
881 }
882 else if (pParam->SamplerType == MHW_SAMPLER_TYPE_MISC)
883 {
884 mhw_state_heap_g8_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD samplerMisc;
885
886 MHW_MI_CHK_STATUS(SetSamplerState(&samplerMisc, pParam));
887
888 MHW_MI_CHK_STATUS(memoryBlock->AddData(
889 &samplerMisc,
890 samplerOffset,
891 sizeof(mhw_state_heap_g8_X::SAMPLER_STATE_8x8_ERODE_DILATE_MINMAXFILTER_CMD)));
892
893 }
894 else
895 {
896 MHW_ASSERTMESSAGE("Invalid sampler type '%d'", pParam->SamplerType);
897 eStatus = MOS_STATUS_INVALID_PARAMETER;
898 }
899
900 return eStatus;
901 }
902