1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Core of Xen paravirt_ops implementation.
4 *
5 * This file contains the xen_paravirt_ops structure itself, and the
6 * implementations for:
7 * - privileged instructions
8 * - interrupt flags
9 * - segment operations
10 * - booting and setup
11 *
12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
13 */
14
15 #include <linux/cpu.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/preempt.h>
20 #include <linux/hardirq.h>
21 #include <linux/percpu.h>
22 #include <linux/delay.h>
23 #include <linux/start_kernel.h>
24 #include <linux/sched.h>
25 #include <linux/kprobes.h>
26 #include <linux/memblock.h>
27 #include <linux/export.h>
28 #include <linux/mm.h>
29 #include <linux/page-flags.h>
30 #include <linux/highmem.h>
31 #include <linux/console.h>
32 #include <linux/pci.h>
33 #include <linux/gfp.h>
34 #include <linux/edd.h>
35 #include <linux/objtool.h>
36
37 #include <xen/xen.h>
38 #include <xen/events.h>
39 #include <xen/interface/xen.h>
40 #include <xen/interface/version.h>
41 #include <xen/interface/physdev.h>
42 #include <xen/interface/vcpu.h>
43 #include <xen/interface/memory.h>
44 #include <xen/interface/nmi.h>
45 #include <xen/interface/xen-mca.h>
46 #include <xen/features.h>
47 #include <xen/page.h>
48 #include <xen/hvc-console.h>
49 #include <xen/acpi.h>
50
51 #include <asm/paravirt.h>
52 #include <asm/apic.h>
53 #include <asm/page.h>
54 #include <asm/xen/pci.h>
55 #include <asm/xen/hypercall.h>
56 #include <asm/xen/hypervisor.h>
57 #include <asm/xen/cpuid.h>
58 #include <asm/fixmap.h>
59 #include <asm/processor.h>
60 #include <asm/proto.h>
61 #include <asm/msr-index.h>
62 #include <asm/traps.h>
63 #include <asm/setup.h>
64 #include <asm/desc.h>
65 #include <asm/pgalloc.h>
66 #include <asm/tlbflush.h>
67 #include <asm/reboot.h>
68 #include <asm/stackprotector.h>
69 #include <asm/hypervisor.h>
70 #include <asm/mach_traps.h>
71 #include <asm/mwait.h>
72 #include <asm/pci_x86.h>
73 #include <asm/cpu.h>
74 #ifdef CONFIG_X86_IOPL_IOPERM
75 #include <asm/io_bitmap.h>
76 #endif
77
78 #ifdef CONFIG_ACPI
79 #include <linux/acpi.h>
80 #include <asm/acpi.h>
81 #include <acpi/pdc_intel.h>
82 #include <acpi/processor.h>
83 #include <xen/interface/platform.h>
84 #endif
85
86 #include "xen-ops.h"
87 #include "mmu.h"
88 #include "smp.h"
89 #include "multicalls.h"
90 #include "pmu.h"
91
92 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */
93
94 void *xen_initial_gdt;
95
96 static int xen_cpu_up_prepare_pv(unsigned int cpu);
97 static int xen_cpu_dead_pv(unsigned int cpu);
98
99 struct tls_descs {
100 struct desc_struct desc[3];
101 };
102
103 /*
104 * Updating the 3 TLS descriptors in the GDT on every task switch is
105 * surprisingly expensive so we avoid updating them if they haven't
106 * changed. Since Xen writes different descriptors than the one
107 * passed in the update_descriptor hypercall we keep shadow copies to
108 * compare against.
109 */
110 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
111
xen_banner(void)112 static void __init xen_banner(void)
113 {
114 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
115 struct xen_extraversion extra;
116 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
117
118 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name);
119 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
120 version >> 16, version & 0xffff, extra.extraversion,
121 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
122 }
123
xen_pv_init_platform(void)124 static void __init xen_pv_init_platform(void)
125 {
126 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP));
127
128 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
129 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
130
131 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */
132 xen_vcpu_info_reset(0);
133
134 /* pvclock is in shared info area */
135 xen_init_time_ops();
136 }
137
xen_pv_guest_late_init(void)138 static void __init xen_pv_guest_late_init(void)
139 {
140 #ifndef CONFIG_SMP
141 /* Setup shared vcpu info for non-smp configurations */
142 xen_setup_vcpu_info_placement();
143 #endif
144 }
145
146 /* Check if running on Xen version (major, minor) or later */
147 bool
xen_running_on_version_or_later(unsigned int major,unsigned int minor)148 xen_running_on_version_or_later(unsigned int major, unsigned int minor)
149 {
150 unsigned int version;
151
152 if (!xen_domain())
153 return false;
154
155 version = HYPERVISOR_xen_version(XENVER_version, NULL);
156 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
157 ((version >> 16) > major))
158 return true;
159 return false;
160 }
161
162 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
163 static __read_mostly unsigned int cpuid_leaf5_edx_val;
164
xen_cpuid(unsigned int * ax,unsigned int * bx,unsigned int * cx,unsigned int * dx)165 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
166 unsigned int *cx, unsigned int *dx)
167 {
168 unsigned maskebx = ~0;
169
170 /*
171 * Mask out inconvenient features, to try and disable as many
172 * unsupported kernel subsystems as possible.
173 */
174 switch (*ax) {
175 case CPUID_MWAIT_LEAF:
176 /* Synthesize the values.. */
177 *ax = 0;
178 *bx = 0;
179 *cx = cpuid_leaf5_ecx_val;
180 *dx = cpuid_leaf5_edx_val;
181 return;
182
183 case 0xb:
184 /* Suppress extended topology stuff */
185 maskebx = 0;
186 break;
187 }
188
189 asm(XEN_EMULATE_PREFIX "cpuid"
190 : "=a" (*ax),
191 "=b" (*bx),
192 "=c" (*cx),
193 "=d" (*dx)
194 : "0" (*ax), "2" (*cx));
195
196 *bx &= maskebx;
197 }
198 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
199
xen_check_mwait(void)200 static bool __init xen_check_mwait(void)
201 {
202 #ifdef CONFIG_ACPI
203 struct xen_platform_op op = {
204 .cmd = XENPF_set_processor_pminfo,
205 .u.set_pminfo.id = -1,
206 .u.set_pminfo.type = XEN_PM_PDC,
207 };
208 uint32_t buf[3];
209 unsigned int ax, bx, cx, dx;
210 unsigned int mwait_mask;
211
212 /* We need to determine whether it is OK to expose the MWAIT
213 * capability to the kernel to harvest deeper than C3 states from ACPI
214 * _CST using the processor_harvest_xen.c module. For this to work, we
215 * need to gather the MWAIT_LEAF values (which the cstate.c code
216 * checks against). The hypervisor won't expose the MWAIT flag because
217 * it would break backwards compatibility; so we will find out directly
218 * from the hardware and hypercall.
219 */
220 if (!xen_initial_domain())
221 return false;
222
223 /*
224 * When running under platform earlier than Xen4.2, do not expose
225 * mwait, to avoid the risk of loading native acpi pad driver
226 */
227 if (!xen_running_on_version_or_later(4, 2))
228 return false;
229
230 ax = 1;
231 cx = 0;
232
233 native_cpuid(&ax, &bx, &cx, &dx);
234
235 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
236 (1 << (X86_FEATURE_MWAIT % 32));
237
238 if ((cx & mwait_mask) != mwait_mask)
239 return false;
240
241 /* We need to emulate the MWAIT_LEAF and for that we need both
242 * ecx and edx. The hypercall provides only partial information.
243 */
244
245 ax = CPUID_MWAIT_LEAF;
246 bx = 0;
247 cx = 0;
248 dx = 0;
249
250 native_cpuid(&ax, &bx, &cx, &dx);
251
252 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
253 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
254 */
255 buf[0] = ACPI_PDC_REVISION_ID;
256 buf[1] = 1;
257 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
258
259 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
260
261 if ((HYPERVISOR_platform_op(&op) == 0) &&
262 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
263 cpuid_leaf5_ecx_val = cx;
264 cpuid_leaf5_edx_val = dx;
265 }
266 return true;
267 #else
268 return false;
269 #endif
270 }
271
xen_check_xsave(void)272 static bool __init xen_check_xsave(void)
273 {
274 unsigned int cx, xsave_mask;
275
276 cx = cpuid_ecx(1);
277
278 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
279 (1 << (X86_FEATURE_OSXSAVE % 32));
280
281 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
282 return (cx & xsave_mask) == xsave_mask;
283 }
284
xen_init_capabilities(void)285 static void __init xen_init_capabilities(void)
286 {
287 setup_force_cpu_cap(X86_FEATURE_XENPV);
288 setup_clear_cpu_cap(X86_FEATURE_DCA);
289 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
290 setup_clear_cpu_cap(X86_FEATURE_MTRR);
291 setup_clear_cpu_cap(X86_FEATURE_ACC);
292 setup_clear_cpu_cap(X86_FEATURE_X2APIC);
293 setup_clear_cpu_cap(X86_FEATURE_SME);
294
295 /*
296 * Xen PV would need some work to support PCID: CR3 handling as well
297 * as xen_flush_tlb_others() would need updating.
298 */
299 setup_clear_cpu_cap(X86_FEATURE_PCID);
300
301 if (!xen_initial_domain())
302 setup_clear_cpu_cap(X86_FEATURE_ACPI);
303
304 if (xen_check_mwait())
305 setup_force_cpu_cap(X86_FEATURE_MWAIT);
306 else
307 setup_clear_cpu_cap(X86_FEATURE_MWAIT);
308
309 if (!xen_check_xsave()) {
310 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
311 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
312 }
313 }
314
xen_set_debugreg(int reg,unsigned long val)315 static void xen_set_debugreg(int reg, unsigned long val)
316 {
317 HYPERVISOR_set_debugreg(reg, val);
318 }
319
xen_get_debugreg(int reg)320 static unsigned long xen_get_debugreg(int reg)
321 {
322 return HYPERVISOR_get_debugreg(reg);
323 }
324
xen_end_context_switch(struct task_struct * next)325 static void xen_end_context_switch(struct task_struct *next)
326 {
327 xen_mc_flush();
328 paravirt_end_context_switch(next);
329 }
330
xen_store_tr(void)331 static unsigned long xen_store_tr(void)
332 {
333 return 0;
334 }
335
336 /*
337 * Set the page permissions for a particular virtual address. If the
338 * address is a vmalloc mapping (or other non-linear mapping), then
339 * find the linear mapping of the page and also set its protections to
340 * match.
341 */
set_aliased_prot(void * v,pgprot_t prot)342 static void set_aliased_prot(void *v, pgprot_t prot)
343 {
344 int level;
345 pte_t *ptep;
346 pte_t pte;
347 unsigned long pfn;
348 unsigned char dummy;
349 void *va;
350
351 ptep = lookup_address((unsigned long)v, &level);
352 BUG_ON(ptep == NULL);
353
354 pfn = pte_pfn(*ptep);
355 pte = pfn_pte(pfn, prot);
356
357 /*
358 * Careful: update_va_mapping() will fail if the virtual address
359 * we're poking isn't populated in the page tables. We don't
360 * need to worry about the direct map (that's always in the page
361 * tables), but we need to be careful about vmap space. In
362 * particular, the top level page table can lazily propagate
363 * entries between processes, so if we've switched mms since we
364 * vmapped the target in the first place, we might not have the
365 * top-level page table entry populated.
366 *
367 * We disable preemption because we want the same mm active when
368 * we probe the target and when we issue the hypercall. We'll
369 * have the same nominal mm, but if we're a kernel thread, lazy
370 * mm dropping could change our pgd.
371 *
372 * Out of an abundance of caution, this uses __get_user() to fault
373 * in the target address just in case there's some obscure case
374 * in which the target address isn't readable.
375 */
376
377 preempt_disable();
378
379 copy_from_kernel_nofault(&dummy, v, 1);
380
381 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
382 BUG();
383
384 va = __va(PFN_PHYS(pfn));
385
386 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
387 BUG();
388
389 preempt_enable();
390 }
391
xen_alloc_ldt(struct desc_struct * ldt,unsigned entries)392 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
393 {
394 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
395 int i;
396
397 /*
398 * We need to mark the all aliases of the LDT pages RO. We
399 * don't need to call vm_flush_aliases(), though, since that's
400 * only responsible for flushing aliases out the TLBs, not the
401 * page tables, and Xen will flush the TLB for us if needed.
402 *
403 * To avoid confusing future readers: none of this is necessary
404 * to load the LDT. The hypervisor only checks this when the
405 * LDT is faulted in due to subsequent descriptor access.
406 */
407
408 for (i = 0; i < entries; i += entries_per_page)
409 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
410 }
411
xen_free_ldt(struct desc_struct * ldt,unsigned entries)412 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
413 {
414 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
415 int i;
416
417 for (i = 0; i < entries; i += entries_per_page)
418 set_aliased_prot(ldt + i, PAGE_KERNEL);
419 }
420
xen_set_ldt(const void * addr,unsigned entries)421 static void xen_set_ldt(const void *addr, unsigned entries)
422 {
423 struct mmuext_op *op;
424 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
425
426 trace_xen_cpu_set_ldt(addr, entries);
427
428 op = mcs.args;
429 op->cmd = MMUEXT_SET_LDT;
430 op->arg1.linear_addr = (unsigned long)addr;
431 op->arg2.nr_ents = entries;
432
433 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
434
435 xen_mc_issue(PARAVIRT_LAZY_CPU);
436 }
437
xen_load_gdt(const struct desc_ptr * dtr)438 static void xen_load_gdt(const struct desc_ptr *dtr)
439 {
440 unsigned long va = dtr->address;
441 unsigned int size = dtr->size + 1;
442 unsigned long pfn, mfn;
443 int level;
444 pte_t *ptep;
445 void *virt;
446
447 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
448 BUG_ON(size > PAGE_SIZE);
449 BUG_ON(va & ~PAGE_MASK);
450
451 /*
452 * The GDT is per-cpu and is in the percpu data area.
453 * That can be virtually mapped, so we need to do a
454 * page-walk to get the underlying MFN for the
455 * hypercall. The page can also be in the kernel's
456 * linear range, so we need to RO that mapping too.
457 */
458 ptep = lookup_address(va, &level);
459 BUG_ON(ptep == NULL);
460
461 pfn = pte_pfn(*ptep);
462 mfn = pfn_to_mfn(pfn);
463 virt = __va(PFN_PHYS(pfn));
464
465 make_lowmem_page_readonly((void *)va);
466 make_lowmem_page_readonly(virt);
467
468 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
469 BUG();
470 }
471
472 /*
473 * load_gdt for early boot, when the gdt is only mapped once
474 */
xen_load_gdt_boot(const struct desc_ptr * dtr)475 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
476 {
477 unsigned long va = dtr->address;
478 unsigned int size = dtr->size + 1;
479 unsigned long pfn, mfn;
480 pte_t pte;
481
482 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
483 BUG_ON(size > PAGE_SIZE);
484 BUG_ON(va & ~PAGE_MASK);
485
486 pfn = virt_to_pfn(va);
487 mfn = pfn_to_mfn(pfn);
488
489 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
490
491 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
492 BUG();
493
494 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
495 BUG();
496 }
497
desc_equal(const struct desc_struct * d1,const struct desc_struct * d2)498 static inline bool desc_equal(const struct desc_struct *d1,
499 const struct desc_struct *d2)
500 {
501 return !memcmp(d1, d2, sizeof(*d1));
502 }
503
load_TLS_descriptor(struct thread_struct * t,unsigned int cpu,unsigned int i)504 static void load_TLS_descriptor(struct thread_struct *t,
505 unsigned int cpu, unsigned int i)
506 {
507 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
508 struct desc_struct *gdt;
509 xmaddr_t maddr;
510 struct multicall_space mc;
511
512 if (desc_equal(shadow, &t->tls_array[i]))
513 return;
514
515 *shadow = t->tls_array[i];
516
517 gdt = get_cpu_gdt_rw(cpu);
518 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
519 mc = __xen_mc_entry(0);
520
521 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
522 }
523
xen_load_tls(struct thread_struct * t,unsigned int cpu)524 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
525 {
526 /*
527 * In lazy mode we need to zero %fs, otherwise we may get an
528 * exception between the new %fs descriptor being loaded and
529 * %fs being effectively cleared at __switch_to().
530 */
531 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
532 loadsegment(fs, 0);
533
534 xen_mc_batch();
535
536 load_TLS_descriptor(t, cpu, 0);
537 load_TLS_descriptor(t, cpu, 1);
538 load_TLS_descriptor(t, cpu, 2);
539
540 xen_mc_issue(PARAVIRT_LAZY_CPU);
541 }
542
xen_load_gs_index(unsigned int idx)543 static void xen_load_gs_index(unsigned int idx)
544 {
545 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
546 BUG();
547 }
548
xen_write_ldt_entry(struct desc_struct * dt,int entrynum,const void * ptr)549 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
550 const void *ptr)
551 {
552 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
553 u64 entry = *(u64 *)ptr;
554
555 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
556
557 preempt_disable();
558
559 xen_mc_flush();
560 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
561 BUG();
562
563 preempt_enable();
564 }
565
566 void noist_exc_debug(struct pt_regs *regs);
567
DEFINE_IDTENTRY_RAW(xenpv_exc_nmi)568 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi)
569 {
570 /* On Xen PV, NMI doesn't use IST. The C part is the same as native. */
571 exc_nmi(regs);
572 }
573
DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault)574 DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault)
575 {
576 /* On Xen PV, DF doesn't use IST. The C part is the same as native. */
577 exc_double_fault(regs, error_code);
578 }
579
DEFINE_IDTENTRY_RAW(xenpv_exc_debug)580 DEFINE_IDTENTRY_RAW(xenpv_exc_debug)
581 {
582 /*
583 * There's no IST on Xen PV, but we still need to dispatch
584 * to the correct handler.
585 */
586 if (user_mode(regs))
587 noist_exc_debug(regs);
588 else
589 exc_debug(regs);
590 }
591
DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap)592 DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap)
593 {
594 /* This should never happen and there is no way to handle it. */
595 pr_err("Unknown trap in Xen PV mode.");
596 BUG();
597 }
598
599 #ifdef CONFIG_X86_MCE
DEFINE_IDTENTRY_RAW(xenpv_exc_machine_check)600 DEFINE_IDTENTRY_RAW(xenpv_exc_machine_check)
601 {
602 /*
603 * There's no IST on Xen PV, but we still need to dispatch
604 * to the correct handler.
605 */
606 if (user_mode(regs))
607 noist_exc_machine_check(regs);
608 else
609 exc_machine_check(regs);
610 }
611 #endif
612
613 struct trap_array_entry {
614 void (*orig)(void);
615 void (*xen)(void);
616 bool ist_okay;
617 };
618
619 #define TRAP_ENTRY(func, ist_ok) { \
620 .orig = asm_##func, \
621 .xen = xen_asm_##func, \
622 .ist_okay = ist_ok }
623
624 #define TRAP_ENTRY_REDIR(func, ist_ok) { \
625 .orig = asm_##func, \
626 .xen = xen_asm_xenpv_##func, \
627 .ist_okay = ist_ok }
628
629 static struct trap_array_entry trap_array[] = {
630 TRAP_ENTRY_REDIR(exc_debug, true ),
631 TRAP_ENTRY_REDIR(exc_double_fault, true ),
632 #ifdef CONFIG_X86_MCE
633 TRAP_ENTRY_REDIR(exc_machine_check, true ),
634 #endif
635 TRAP_ENTRY_REDIR(exc_nmi, true ),
636 TRAP_ENTRY(exc_int3, false ),
637 TRAP_ENTRY(exc_overflow, false ),
638 #ifdef CONFIG_IA32_EMULATION
639 { entry_INT80_compat, xen_entry_INT80_compat, false },
640 #endif
641 TRAP_ENTRY(exc_page_fault, false ),
642 TRAP_ENTRY(exc_divide_error, false ),
643 TRAP_ENTRY(exc_bounds, false ),
644 TRAP_ENTRY(exc_invalid_op, false ),
645 TRAP_ENTRY(exc_device_not_available, false ),
646 TRAP_ENTRY(exc_coproc_segment_overrun, false ),
647 TRAP_ENTRY(exc_invalid_tss, false ),
648 TRAP_ENTRY(exc_segment_not_present, false ),
649 TRAP_ENTRY(exc_stack_segment, false ),
650 TRAP_ENTRY(exc_general_protection, false ),
651 TRAP_ENTRY(exc_spurious_interrupt_bug, false ),
652 TRAP_ENTRY(exc_coprocessor_error, false ),
653 TRAP_ENTRY(exc_alignment_check, false ),
654 TRAP_ENTRY(exc_simd_coprocessor_error, false ),
655 };
656
get_trap_addr(void ** addr,unsigned int ist)657 static bool __ref get_trap_addr(void **addr, unsigned int ist)
658 {
659 unsigned int nr;
660 bool ist_okay = false;
661 bool found = false;
662
663 /*
664 * Replace trap handler addresses by Xen specific ones.
665 * Check for known traps using IST and whitelist them.
666 * The debugger ones are the only ones we care about.
667 * Xen will handle faults like double_fault, so we should never see
668 * them. Warn if there's an unexpected IST-using fault handler.
669 */
670 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
671 struct trap_array_entry *entry = trap_array + nr;
672
673 if (*addr == entry->orig) {
674 *addr = entry->xen;
675 ist_okay = entry->ist_okay;
676 found = true;
677 break;
678 }
679 }
680
681 if (nr == ARRAY_SIZE(trap_array) &&
682 *addr >= (void *)early_idt_handler_array[0] &&
683 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
684 nr = (*addr - (void *)early_idt_handler_array[0]) /
685 EARLY_IDT_HANDLER_SIZE;
686 *addr = (void *)xen_early_idt_handler_array[nr];
687 found = true;
688 }
689
690 if (!found)
691 *addr = (void *)xen_asm_exc_xen_unknown_trap;
692
693 if (WARN_ON(found && ist != 0 && !ist_okay))
694 return false;
695
696 return true;
697 }
698
cvt_gate_to_trap(int vector,const gate_desc * val,struct trap_info * info)699 static int cvt_gate_to_trap(int vector, const gate_desc *val,
700 struct trap_info *info)
701 {
702 unsigned long addr;
703
704 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
705 return 0;
706
707 info->vector = vector;
708
709 addr = gate_offset(val);
710 if (!get_trap_addr((void **)&addr, val->bits.ist))
711 return 0;
712 info->address = addr;
713
714 info->cs = gate_segment(val);
715 info->flags = val->bits.dpl;
716 /* interrupt gates clear IF */
717 if (val->bits.type == GATE_INTERRUPT)
718 info->flags |= 1 << 2;
719
720 return 1;
721 }
722
723 /* Locations of each CPU's IDT */
724 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
725
726 /* Set an IDT entry. If the entry is part of the current IDT, then
727 also update Xen. */
xen_write_idt_entry(gate_desc * dt,int entrynum,const gate_desc * g)728 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
729 {
730 unsigned long p = (unsigned long)&dt[entrynum];
731 unsigned long start, end;
732
733 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
734
735 preempt_disable();
736
737 start = __this_cpu_read(idt_desc.address);
738 end = start + __this_cpu_read(idt_desc.size) + 1;
739
740 xen_mc_flush();
741
742 native_write_idt_entry(dt, entrynum, g);
743
744 if (p >= start && (p + 8) <= end) {
745 struct trap_info info[2];
746
747 info[1].address = 0;
748
749 if (cvt_gate_to_trap(entrynum, g, &info[0]))
750 if (HYPERVISOR_set_trap_table(info))
751 BUG();
752 }
753
754 preempt_enable();
755 }
756
xen_convert_trap_info(const struct desc_ptr * desc,struct trap_info * traps)757 static void xen_convert_trap_info(const struct desc_ptr *desc,
758 struct trap_info *traps)
759 {
760 unsigned in, out, count;
761
762 count = (desc->size+1) / sizeof(gate_desc);
763 BUG_ON(count > 256);
764
765 for (in = out = 0; in < count; in++) {
766 gate_desc *entry = (gate_desc *)(desc->address) + in;
767
768 if (cvt_gate_to_trap(in, entry, &traps[out]))
769 out++;
770 }
771 traps[out].address = 0;
772 }
773
xen_copy_trap_info(struct trap_info * traps)774 void xen_copy_trap_info(struct trap_info *traps)
775 {
776 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
777
778 xen_convert_trap_info(desc, traps);
779 }
780
781 /* Load a new IDT into Xen. In principle this can be per-CPU, so we
782 hold a spinlock to protect the static traps[] array (static because
783 it avoids allocation, and saves stack space). */
xen_load_idt(const struct desc_ptr * desc)784 static void xen_load_idt(const struct desc_ptr *desc)
785 {
786 static DEFINE_SPINLOCK(lock);
787 static struct trap_info traps[257];
788
789 trace_xen_cpu_load_idt(desc);
790
791 spin_lock(&lock);
792
793 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
794
795 xen_convert_trap_info(desc, traps);
796
797 xen_mc_flush();
798 if (HYPERVISOR_set_trap_table(traps))
799 BUG();
800
801 spin_unlock(&lock);
802 }
803
804 /* Write a GDT descriptor entry. Ignore LDT descriptors, since
805 they're handled differently. */
xen_write_gdt_entry(struct desc_struct * dt,int entry,const void * desc,int type)806 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
807 const void *desc, int type)
808 {
809 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
810
811 preempt_disable();
812
813 switch (type) {
814 case DESC_LDT:
815 case DESC_TSS:
816 /* ignore */
817 break;
818
819 default: {
820 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
821
822 xen_mc_flush();
823 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
824 BUG();
825 }
826
827 }
828
829 preempt_enable();
830 }
831
832 /*
833 * Version of write_gdt_entry for use at early boot-time needed to
834 * update an entry as simply as possible.
835 */
xen_write_gdt_entry_boot(struct desc_struct * dt,int entry,const void * desc,int type)836 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
837 const void *desc, int type)
838 {
839 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
840
841 switch (type) {
842 case DESC_LDT:
843 case DESC_TSS:
844 /* ignore */
845 break;
846
847 default: {
848 xmaddr_t maddr = virt_to_machine(&dt[entry]);
849
850 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
851 dt[entry] = *(struct desc_struct *)desc;
852 }
853
854 }
855 }
856
xen_load_sp0(unsigned long sp0)857 static void xen_load_sp0(unsigned long sp0)
858 {
859 struct multicall_space mcs;
860
861 mcs = xen_mc_entry(0);
862 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
863 xen_mc_issue(PARAVIRT_LAZY_CPU);
864 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
865 }
866
867 #ifdef CONFIG_X86_IOPL_IOPERM
xen_invalidate_io_bitmap(void)868 static void xen_invalidate_io_bitmap(void)
869 {
870 struct physdev_set_iobitmap iobitmap = {
871 .bitmap = NULL,
872 .nr_ports = 0,
873 };
874
875 native_tss_invalidate_io_bitmap();
876 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
877 }
878
xen_update_io_bitmap(void)879 static void xen_update_io_bitmap(void)
880 {
881 struct physdev_set_iobitmap iobitmap;
882 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw);
883
884 native_tss_update_io_bitmap();
885
886 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) +
887 tss->x86_tss.io_bitmap_base;
888 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID)
889 iobitmap.nr_ports = 0;
890 else
891 iobitmap.nr_ports = IO_BITMAP_BITS;
892
893 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
894 }
895 #endif
896
xen_io_delay(void)897 static void xen_io_delay(void)
898 {
899 }
900
901 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
902
xen_read_cr0(void)903 static unsigned long xen_read_cr0(void)
904 {
905 unsigned long cr0 = this_cpu_read(xen_cr0_value);
906
907 if (unlikely(cr0 == 0)) {
908 cr0 = native_read_cr0();
909 this_cpu_write(xen_cr0_value, cr0);
910 }
911
912 return cr0;
913 }
914
xen_write_cr0(unsigned long cr0)915 static void xen_write_cr0(unsigned long cr0)
916 {
917 struct multicall_space mcs;
918
919 this_cpu_write(xen_cr0_value, cr0);
920
921 /* Only pay attention to cr0.TS; everything else is
922 ignored. */
923 mcs = xen_mc_entry(0);
924
925 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
926
927 xen_mc_issue(PARAVIRT_LAZY_CPU);
928 }
929
xen_write_cr4(unsigned long cr4)930 static void xen_write_cr4(unsigned long cr4)
931 {
932 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
933
934 native_write_cr4(cr4);
935 }
936
xen_read_msr_safe(unsigned int msr,int * err)937 static u64 xen_read_msr_safe(unsigned int msr, int *err)
938 {
939 u64 val;
940
941 if (pmu_msr_read(msr, &val, err))
942 return val;
943
944 val = native_read_msr_safe(msr, err);
945 switch (msr) {
946 case MSR_IA32_APICBASE:
947 val &= ~X2APIC_ENABLE;
948 break;
949 }
950 return val;
951 }
952
xen_write_msr_safe(unsigned int msr,unsigned low,unsigned high)953 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
954 {
955 int ret;
956 unsigned int which;
957 u64 base;
958
959 ret = 0;
960
961 switch (msr) {
962 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
963 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
964 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
965
966 set:
967 base = ((u64)high << 32) | low;
968 if (HYPERVISOR_set_segment_base(which, base) != 0)
969 ret = -EIO;
970 break;
971
972 case MSR_STAR:
973 case MSR_CSTAR:
974 case MSR_LSTAR:
975 case MSR_SYSCALL_MASK:
976 case MSR_IA32_SYSENTER_CS:
977 case MSR_IA32_SYSENTER_ESP:
978 case MSR_IA32_SYSENTER_EIP:
979 /* Fast syscall setup is all done in hypercalls, so
980 these are all ignored. Stub them out here to stop
981 Xen console noise. */
982 break;
983
984 default:
985 if (!pmu_msr_write(msr, low, high, &ret))
986 ret = native_write_msr_safe(msr, low, high);
987 }
988
989 return ret;
990 }
991
xen_read_msr(unsigned int msr)992 static u64 xen_read_msr(unsigned int msr)
993 {
994 /*
995 * This will silently swallow a #GP from RDMSR. It may be worth
996 * changing that.
997 */
998 int err;
999
1000 return xen_read_msr_safe(msr, &err);
1001 }
1002
xen_write_msr(unsigned int msr,unsigned low,unsigned high)1003 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
1004 {
1005 /*
1006 * This will silently swallow a #GP from WRMSR. It may be worth
1007 * changing that.
1008 */
1009 xen_write_msr_safe(msr, low, high);
1010 }
1011
1012 /* This is called once we have the cpu_possible_mask */
xen_setup_vcpu_info_placement(void)1013 void __init xen_setup_vcpu_info_placement(void)
1014 {
1015 int cpu;
1016
1017 for_each_possible_cpu(cpu) {
1018 /* Set up direct vCPU id mapping for PV guests. */
1019 per_cpu(xen_vcpu_id, cpu) = cpu;
1020
1021 /*
1022 * xen_vcpu_setup(cpu) can fail -- in which case it
1023 * falls back to the shared_info version for cpus
1024 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS.
1025 *
1026 * xen_cpu_up_prepare_pv() handles the rest by failing
1027 * them in hotplug.
1028 */
1029 (void) xen_vcpu_setup(cpu);
1030 }
1031
1032 /*
1033 * xen_vcpu_setup managed to place the vcpu_info within the
1034 * percpu area for all cpus, so make use of it.
1035 */
1036 if (xen_have_vcpu_info_placement) {
1037 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1038 pv_ops.irq.irq_disable =
1039 __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1040 pv_ops.irq.irq_enable =
1041 __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1042 pv_ops.mmu.read_cr2 =
1043 __PV_IS_CALLEE_SAVE(xen_read_cr2_direct);
1044 }
1045 }
1046
1047 static const struct pv_info xen_info __initconst = {
1048 .extra_user_64bit_cs = FLAT_USER_CS64,
1049 .name = "Xen",
1050 };
1051
1052 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1053 .cpuid = xen_cpuid,
1054
1055 .set_debugreg = xen_set_debugreg,
1056 .get_debugreg = xen_get_debugreg,
1057
1058 .read_cr0 = xen_read_cr0,
1059 .write_cr0 = xen_write_cr0,
1060
1061 .write_cr4 = xen_write_cr4,
1062
1063 .wbinvd = native_wbinvd,
1064
1065 .read_msr = xen_read_msr,
1066 .write_msr = xen_write_msr,
1067
1068 .read_msr_safe = xen_read_msr_safe,
1069 .write_msr_safe = xen_write_msr_safe,
1070
1071 .read_pmc = xen_read_pmc,
1072
1073 .load_tr_desc = paravirt_nop,
1074 .set_ldt = xen_set_ldt,
1075 .load_gdt = xen_load_gdt,
1076 .load_idt = xen_load_idt,
1077 .load_tls = xen_load_tls,
1078 .load_gs_index = xen_load_gs_index,
1079
1080 .alloc_ldt = xen_alloc_ldt,
1081 .free_ldt = xen_free_ldt,
1082
1083 .store_tr = xen_store_tr,
1084
1085 .write_ldt_entry = xen_write_ldt_entry,
1086 .write_gdt_entry = xen_write_gdt_entry,
1087 .write_idt_entry = xen_write_idt_entry,
1088 .load_sp0 = xen_load_sp0,
1089
1090 #ifdef CONFIG_X86_IOPL_IOPERM
1091 .invalidate_io_bitmap = xen_invalidate_io_bitmap,
1092 .update_io_bitmap = xen_update_io_bitmap,
1093 #endif
1094 .io_delay = xen_io_delay,
1095
1096 .start_context_switch = paravirt_start_context_switch,
1097 .end_context_switch = xen_end_context_switch,
1098 };
1099
xen_restart(char * msg)1100 static void xen_restart(char *msg)
1101 {
1102 xen_reboot(SHUTDOWN_reboot);
1103 }
1104
xen_machine_halt(void)1105 static void xen_machine_halt(void)
1106 {
1107 xen_reboot(SHUTDOWN_poweroff);
1108 }
1109
xen_machine_power_off(void)1110 static void xen_machine_power_off(void)
1111 {
1112 if (pm_power_off)
1113 pm_power_off();
1114 xen_reboot(SHUTDOWN_poweroff);
1115 }
1116
xen_crash_shutdown(struct pt_regs * regs)1117 static void xen_crash_shutdown(struct pt_regs *regs)
1118 {
1119 xen_reboot(SHUTDOWN_crash);
1120 }
1121
1122 static const struct machine_ops xen_machine_ops __initconst = {
1123 .restart = xen_restart,
1124 .halt = xen_machine_halt,
1125 .power_off = xen_machine_power_off,
1126 .shutdown = xen_machine_halt,
1127 .crash_shutdown = xen_crash_shutdown,
1128 .emergency_restart = xen_emergency_restart,
1129 };
1130
xen_get_nmi_reason(void)1131 static unsigned char xen_get_nmi_reason(void)
1132 {
1133 unsigned char reason = 0;
1134
1135 /* Construct a value which looks like it came from port 0x61. */
1136 if (test_bit(_XEN_NMIREASON_io_error,
1137 &HYPERVISOR_shared_info->arch.nmi_reason))
1138 reason |= NMI_REASON_IOCHK;
1139 if (test_bit(_XEN_NMIREASON_pci_serr,
1140 &HYPERVISOR_shared_info->arch.nmi_reason))
1141 reason |= NMI_REASON_SERR;
1142
1143 return reason;
1144 }
1145
xen_boot_params_init_edd(void)1146 static void __init xen_boot_params_init_edd(void)
1147 {
1148 #if IS_ENABLED(CONFIG_EDD)
1149 struct xen_platform_op op;
1150 struct edd_info *edd_info;
1151 u32 *mbr_signature;
1152 unsigned nr;
1153 int ret;
1154
1155 edd_info = boot_params.eddbuf;
1156 mbr_signature = boot_params.edd_mbr_sig_buffer;
1157
1158 op.cmd = XENPF_firmware_info;
1159
1160 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1161 for (nr = 0; nr < EDDMAXNR; nr++) {
1162 struct edd_info *info = edd_info + nr;
1163
1164 op.u.firmware_info.index = nr;
1165 info->params.length = sizeof(info->params);
1166 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1167 &info->params);
1168 ret = HYPERVISOR_platform_op(&op);
1169 if (ret)
1170 break;
1171
1172 #define C(x) info->x = op.u.firmware_info.u.disk_info.x
1173 C(device);
1174 C(version);
1175 C(interface_support);
1176 C(legacy_max_cylinder);
1177 C(legacy_max_head);
1178 C(legacy_sectors_per_track);
1179 #undef C
1180 }
1181 boot_params.eddbuf_entries = nr;
1182
1183 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1184 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1185 op.u.firmware_info.index = nr;
1186 ret = HYPERVISOR_platform_op(&op);
1187 if (ret)
1188 break;
1189 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1190 }
1191 boot_params.edd_mbr_sig_buf_entries = nr;
1192 #endif
1193 }
1194
1195 /*
1196 * Set up the GDT and segment registers for -fstack-protector. Until
1197 * we do this, we have to be careful not to call any stack-protected
1198 * function, which is most of the kernel.
1199 */
xen_setup_gdt(int cpu)1200 static void __init xen_setup_gdt(int cpu)
1201 {
1202 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot;
1203 pv_ops.cpu.load_gdt = xen_load_gdt_boot;
1204
1205 switch_to_new_gdt(cpu);
1206
1207 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry;
1208 pv_ops.cpu.load_gdt = xen_load_gdt;
1209 }
1210
xen_dom0_set_legacy_features(void)1211 static void __init xen_dom0_set_legacy_features(void)
1212 {
1213 x86_platform.legacy.rtc = 1;
1214 }
1215
1216 /* First C function to be called on Xen boot */
xen_start_kernel(void)1217 asmlinkage __visible void __init xen_start_kernel(void)
1218 {
1219 struct physdev_set_iopl set_iopl;
1220 unsigned long initrd_start = 0;
1221 int rc;
1222
1223 if (!xen_start_info)
1224 return;
1225
1226 xen_domain_type = XEN_PV_DOMAIN;
1227 xen_start_flags = xen_start_info->flags;
1228
1229 xen_setup_features();
1230
1231 /* Install Xen paravirt ops */
1232 pv_info = xen_info;
1233 pv_ops.cpu = xen_cpu_ops;
1234 paravirt_iret = xen_iret;
1235 xen_init_irq_ops();
1236
1237 /*
1238 * Setup xen_vcpu early because it is needed for
1239 * local_irq_disable(), irqs_disabled(), e.g. in printk().
1240 *
1241 * Don't do the full vcpu_info placement stuff until we have
1242 * the cpu_possible_mask and a non-dummy shared_info.
1243 */
1244 xen_vcpu_info_reset(0);
1245
1246 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1247
1248 x86_init.resources.memory_setup = xen_memory_setup;
1249 x86_init.irqs.intr_mode_select = x86_init_noop;
1250 x86_init.irqs.intr_mode_init = x86_init_noop;
1251 x86_init.oem.arch_setup = xen_arch_setup;
1252 x86_init.oem.banner = xen_banner;
1253 x86_init.hyper.init_platform = xen_pv_init_platform;
1254 x86_init.hyper.guest_late_init = xen_pv_guest_late_init;
1255
1256 /*
1257 * Set up some pagetable state before starting to set any ptes.
1258 */
1259
1260 xen_setup_machphys_mapping();
1261 xen_init_mmu_ops();
1262
1263 /* Prevent unwanted bits from being set in PTEs. */
1264 __supported_pte_mask &= ~_PAGE_GLOBAL;
1265 __default_kernel_pte_mask &= ~_PAGE_GLOBAL;
1266
1267 /*
1268 * Prevent page tables from being allocated in highmem, even
1269 * if CONFIG_HIGHPTE is enabled.
1270 */
1271 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1272
1273 /* Get mfn list */
1274 xen_build_dynamic_phys_to_machine();
1275
1276 /*
1277 * Set up kernel GDT and segment registers, mainly so that
1278 * -fstack-protector code can be executed.
1279 */
1280 xen_setup_gdt(0);
1281
1282 /* Work out if we support NX */
1283 get_cpu_cap(&boot_cpu_data);
1284 x86_configure_nx();
1285
1286 /* Determine virtual and physical address sizes */
1287 get_cpu_address_sizes(&boot_cpu_data);
1288
1289 /* Let's presume PV guests always boot on vCPU with id 0. */
1290 per_cpu(xen_vcpu_id, 0) = 0;
1291
1292 idt_setup_early_handler();
1293
1294 xen_init_capabilities();
1295
1296 #ifdef CONFIG_X86_LOCAL_APIC
1297 /*
1298 * set up the basic apic ops.
1299 */
1300 xen_init_apic();
1301 #endif
1302
1303 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1304 pv_ops.mmu.ptep_modify_prot_start =
1305 xen_ptep_modify_prot_start;
1306 pv_ops.mmu.ptep_modify_prot_commit =
1307 xen_ptep_modify_prot_commit;
1308 }
1309
1310 machine_ops = xen_machine_ops;
1311
1312 /*
1313 * The only reliable way to retain the initial address of the
1314 * percpu gdt_page is to remember it here, so we can go and
1315 * mark it RW later, when the initial percpu area is freed.
1316 */
1317 xen_initial_gdt = &per_cpu(gdt_page, 0);
1318
1319 xen_smp_init();
1320
1321 #ifdef CONFIG_ACPI_NUMA
1322 /*
1323 * The pages we from Xen are not related to machine pages, so
1324 * any NUMA information the kernel tries to get from ACPI will
1325 * be meaningless. Prevent it from trying.
1326 */
1327 disable_srat();
1328 #endif
1329 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
1330
1331 local_irq_disable();
1332 early_boot_irqs_disabled = true;
1333
1334 xen_raw_console_write("mapping kernel into physical memory\n");
1335 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1336 xen_start_info->nr_pages);
1337 xen_reserve_special_pages();
1338
1339 /*
1340 * We used to do this in xen_arch_setup, but that is too late
1341 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1342 * early_amd_init which pokes 0xcf8 port.
1343 */
1344 set_iopl.iopl = 1;
1345 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1346 if (rc != 0)
1347 xen_raw_printk("physdev_op failed %d\n", rc);
1348
1349
1350 if (xen_start_info->mod_start) {
1351 if (xen_start_info->flags & SIF_MOD_START_PFN)
1352 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1353 else
1354 initrd_start = __pa(xen_start_info->mod_start);
1355 }
1356
1357 /* Poke various useful things into boot_params */
1358 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1359 boot_params.hdr.ramdisk_image = initrd_start;
1360 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1361 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1362 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1363
1364 if (!xen_initial_domain()) {
1365 add_preferred_console("xenboot", 0, NULL);
1366 if (pci_xen)
1367 x86_init.pci.arch_init = pci_xen_init;
1368 } else {
1369 const struct dom0_vga_console_info *info =
1370 (void *)((char *)xen_start_info +
1371 xen_start_info->console.dom0.info_off);
1372 struct xen_platform_op op = {
1373 .cmd = XENPF_firmware_info,
1374 .interface_version = XENPF_INTERFACE_VERSION,
1375 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1376 };
1377
1378 x86_platform.set_legacy_features =
1379 xen_dom0_set_legacy_features;
1380 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1381 xen_start_info->console.domU.mfn = 0;
1382 xen_start_info->console.domU.evtchn = 0;
1383
1384 if (HYPERVISOR_platform_op(&op) == 0)
1385 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1386
1387 /* Make sure ACS will be enabled */
1388 pci_request_acs();
1389
1390 xen_acpi_sleep_register();
1391
1392 /* Avoid searching for BIOS MP tables */
1393 x86_init.mpparse.find_smp_config = x86_init_noop;
1394 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1395
1396 xen_boot_params_init_edd();
1397
1398 #ifdef CONFIG_ACPI
1399 /*
1400 * Disable selecting "Firmware First mode" for correctable
1401 * memory errors, as this is the duty of the hypervisor to
1402 * decide.
1403 */
1404 acpi_disable_cmcff = 1;
1405 #endif
1406 }
1407
1408 if (!boot_params.screen_info.orig_video_isVGA)
1409 add_preferred_console("tty", 0, NULL);
1410 add_preferred_console("hvc", 0, NULL);
1411 if (boot_params.screen_info.orig_video_isVGA)
1412 add_preferred_console("tty", 0, NULL);
1413
1414 #ifdef CONFIG_PCI
1415 /* PCI BIOS service won't work from a PV guest. */
1416 pci_probe &= ~PCI_PROBE_BIOS;
1417 #endif
1418 xen_raw_console_write("about to get started...\n");
1419
1420 /* We need this for printk timestamps */
1421 xen_setup_runstate_info(0);
1422
1423 xen_efi_init(&boot_params);
1424
1425 /* Start the world */
1426 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1427 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1428 }
1429
xen_cpu_up_prepare_pv(unsigned int cpu)1430 static int xen_cpu_up_prepare_pv(unsigned int cpu)
1431 {
1432 int rc;
1433
1434 if (per_cpu(xen_vcpu, cpu) == NULL)
1435 return -ENODEV;
1436
1437 xen_setup_timer(cpu);
1438
1439 rc = xen_smp_intr_init(cpu);
1440 if (rc) {
1441 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
1442 cpu, rc);
1443 return rc;
1444 }
1445
1446 rc = xen_smp_intr_init_pv(cpu);
1447 if (rc) {
1448 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
1449 cpu, rc);
1450 return rc;
1451 }
1452
1453 return 0;
1454 }
1455
xen_cpu_dead_pv(unsigned int cpu)1456 static int xen_cpu_dead_pv(unsigned int cpu)
1457 {
1458 xen_smp_intr_free(cpu);
1459 xen_smp_intr_free_pv(cpu);
1460
1461 xen_teardown_timer(cpu);
1462
1463 return 0;
1464 }
1465
xen_platform_pv(void)1466 static uint32_t __init xen_platform_pv(void)
1467 {
1468 if (xen_pv_domain())
1469 return xen_cpuid_base();
1470
1471 return 0;
1472 }
1473
1474 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
1475 .name = "Xen PV",
1476 .detect = xen_platform_pv,
1477 .type = X86_HYPER_XEN_PV,
1478 .runtime.pin_vcpu = xen_pin_vcpu,
1479 .ignore_nopv = true,
1480 };
1481