1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copyright © 2019 Intel Corporation
4 */
5
6 #ifndef __INTEL_DP_H__
7 #define __INTEL_DP_H__
8
9 #include <linux/types.h>
10
11 #include "i915_reg.h"
12
13 enum intel_output_format;
14 enum pipe;
15 enum port;
16 struct drm_connector_state;
17 struct drm_encoder;
18 struct drm_i915_private;
19 struct drm_modeset_acquire_ctx;
20 struct drm_dp_vsc_sdp;
21 struct intel_atomic_state;
22 struct intel_connector;
23 struct intel_crtc_state;
24 struct intel_digital_port;
25 struct intel_dp;
26 struct intel_encoder;
27
28 struct link_config_limits {
29 int min_clock, max_clock;
30 int min_lane_count, max_lane_count;
31 int min_bpp, max_bpp;
32 };
33
34 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
35 struct intel_crtc_state *pipe_config,
36 struct link_config_limits *limits);
37 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
38 const struct drm_connector_state *conn_state);
39 int intel_dp_min_bpp(enum intel_output_format output_format);
40 bool intel_dp_init_connector(struct intel_digital_port *dig_port,
41 struct intel_connector *intel_connector);
42 void intel_dp_set_link_params(struct intel_dp *intel_dp,
43 int link_rate, int lane_count);
44 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
45 int link_rate, u8 lane_count);
46 int intel_dp_retrain_link(struct intel_encoder *encoder,
47 struct drm_modeset_acquire_ctx *ctx);
48 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
49 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
50 const struct intel_crtc_state *crtc_state);
51 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
52 const struct intel_crtc_state *crtc_state,
53 bool enable);
54 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
55 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
56 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
57 int intel_dp_compute_config(struct intel_encoder *encoder,
58 struct intel_crtc_state *pipe_config,
59 struct drm_connector_state *conn_state);
60 bool intel_dp_is_edp(struct intel_dp *intel_dp);
61 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
62 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
63 bool long_hpd);
64 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
65 const struct drm_connector_state *conn_state);
66 void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
67 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
68 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
69 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
70 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
71 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
72
73 void intel_edp_drrs_enable(struct intel_dp *intel_dp,
74 const struct intel_crtc_state *crtc_state);
75 void intel_edp_drrs_disable(struct intel_dp *intel_dp,
76 const struct intel_crtc_state *crtc_state);
77 void intel_edp_drrs_update(struct intel_dp *intel_dp,
78 const struct intel_crtc_state *crtc_state);
79 void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
80 unsigned int frontbuffer_bits);
81 void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
82 unsigned int frontbuffer_bits);
83
84 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
85 u8 *link_bw, u8 *rate_select);
86 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
87 bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp);
88
89 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
90 int intel_dp_link_required(int pixel_clock, int bpp);
91 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
92 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
93 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
94 const struct drm_connector_state *conn_state);
95 void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
96 const struct intel_crtc_state *crtc_state,
97 const struct drm_connector_state *conn_state,
98 struct drm_dp_vsc_sdp *vsc);
99 void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
100 const struct intel_crtc_state *crtc_state,
101 struct drm_dp_vsc_sdp *vsc);
102 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
103 const struct intel_crtc_state *crtc_state,
104 const struct drm_connector_state *conn_state);
105 void intel_read_dp_sdp(struct intel_encoder *encoder,
106 struct intel_crtc_state *crtc_state,
107 unsigned int type);
108 bool intel_digital_port_connected(struct intel_encoder *encoder);
109
intel_dp_unused_lane_mask(int lane_count)110 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
111 {
112 return ~((1 << lane_count) - 1) & 0xf;
113 }
114
115 u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
116
117 void intel_ddi_update_pipe(struct intel_atomic_state *state,
118 struct intel_encoder *encoder,
119 const struct intel_crtc_state *crtc_state,
120 const struct drm_connector_state *conn_state);
121
122 int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
123 struct intel_connector *intel_connector);
124
125 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
126 struct intel_crtc_state *crtc_state);
127 void intel_dp_sync_state(struct intel_encoder *encoder,
128 const struct intel_crtc_state *crtc_state);
129
130 void intel_dp_check_frl_training(struct intel_dp *intel_dp);
131 void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
132 const struct intel_crtc_state *crtc_state);
133 void intel_dp_phy_test(struct intel_encoder *encoder);
134
135 #endif /* __INTEL_DP_H__ */
136