1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2012-2015, NVIDIA Corporation.
4 */
5
6 #ifndef HOST1X_DEV_H
7 #define HOST1X_DEV_H
8
9 #include <linux/device.h>
10 #include <linux/iommu.h>
11 #include <linux/iova.h>
12 #include <linux/platform_device.h>
13 #include <linux/reset.h>
14
15 #include "cdma.h"
16 #include "channel.h"
17 #include "intr.h"
18 #include "job.h"
19 #include "syncpt.h"
20
21 struct host1x_syncpt;
22 struct host1x_syncpt_base;
23 struct host1x_channel;
24 struct host1x_cdma;
25 struct host1x_job;
26 struct push_buffer;
27 struct output;
28 struct dentry;
29
30 struct host1x_channel_ops {
31 int (*init)(struct host1x_channel *channel, struct host1x *host,
32 unsigned int id);
33 int (*submit)(struct host1x_job *job);
34 };
35
36 struct host1x_cdma_ops {
37 void (*start)(struct host1x_cdma *cdma);
38 void (*stop)(struct host1x_cdma *cdma);
39 void (*flush)(struct host1x_cdma *cdma);
40 int (*timeout_init)(struct host1x_cdma *cdma);
41 void (*timeout_destroy)(struct host1x_cdma *cdma);
42 void (*freeze)(struct host1x_cdma *cdma);
43 void (*resume)(struct host1x_cdma *cdma, u32 getptr);
44 void (*timeout_cpu_incr)(struct host1x_cdma *cdma, u32 getptr,
45 u32 syncpt_incrs, u32 syncval, u32 nr_slots);
46 };
47
48 struct host1x_pushbuffer_ops {
49 void (*init)(struct push_buffer *pb);
50 };
51
52 struct host1x_debug_ops {
53 void (*debug_init)(struct dentry *de);
54 void (*show_channel_cdma)(struct host1x *host,
55 struct host1x_channel *ch,
56 struct output *o);
57 void (*show_channel_fifo)(struct host1x *host,
58 struct host1x_channel *ch,
59 struct output *o);
60 void (*show_mlocks)(struct host1x *host, struct output *output);
61
62 };
63
64 struct host1x_syncpt_ops {
65 void (*restore)(struct host1x_syncpt *syncpt);
66 void (*restore_wait_base)(struct host1x_syncpt *syncpt);
67 void (*load_wait_base)(struct host1x_syncpt *syncpt);
68 u32 (*load)(struct host1x_syncpt *syncpt);
69 int (*cpu_incr)(struct host1x_syncpt *syncpt);
70 void (*assign_to_channel)(struct host1x_syncpt *syncpt,
71 struct host1x_channel *channel);
72 void (*enable_protection)(struct host1x *host);
73 };
74
75 struct host1x_intr_ops {
76 int (*init_host_sync)(struct host1x *host, u32 cpm,
77 void (*syncpt_thresh_work)(struct work_struct *work));
78 void (*set_syncpt_threshold)(
79 struct host1x *host, unsigned int id, u32 thresh);
80 void (*enable_syncpt_intr)(struct host1x *host, unsigned int id);
81 void (*disable_syncpt_intr)(struct host1x *host, unsigned int id);
82 void (*disable_all_syncpt_intrs)(struct host1x *host);
83 int (*free_syncpt_irq)(struct host1x *host);
84 };
85
86 struct host1x_sid_entry {
87 unsigned int base;
88 unsigned int offset;
89 unsigned int limit;
90 };
91
92 struct host1x_info {
93 unsigned int nb_channels; /* host1x: number of channels supported */
94 unsigned int nb_pts; /* host1x: number of syncpoints supported */
95 unsigned int nb_bases; /* host1x: number of syncpoint bases supported */
96 unsigned int nb_mlocks; /* host1x: number of mlocks supported */
97 int (*init)(struct host1x *host1x); /* initialize per SoC ops */
98 unsigned int sync_offset; /* offset of syncpoint registers */
99 u64 dma_mask; /* mask of addressable memory */
100 bool has_wide_gather; /* supports GATHER_W opcode */
101 bool has_hypervisor; /* has hypervisor registers */
102 unsigned int num_sid_entries;
103 const struct host1x_sid_entry *sid_table;
104 /*
105 * On T20-T148, the boot chain may setup DC to increment syncpoints
106 * 26/27 on VBLANK. As such we cannot use these syncpoints until
107 * the display driver disables VBLANK increments.
108 */
109 bool reserve_vblank_syncpts;
110 };
111
112 struct host1x {
113 const struct host1x_info *info;
114
115 void __iomem *regs;
116 void __iomem *hv_regs; /* hypervisor region */
117 struct host1x_syncpt *syncpt;
118 struct host1x_syncpt_base *bases;
119 struct device *dev;
120 struct clk *clk;
121 struct reset_control *rst;
122
123 struct iommu_group *group;
124 struct iommu_domain *domain;
125 struct iova_domain iova;
126 dma_addr_t iova_end;
127
128 struct mutex intr_mutex;
129 int intr_syncpt_irq;
130
131 const struct host1x_syncpt_ops *syncpt_op;
132 const struct host1x_intr_ops *intr_op;
133 const struct host1x_channel_ops *channel_op;
134 const struct host1x_cdma_ops *cdma_op;
135 const struct host1x_pushbuffer_ops *cdma_pb_op;
136 const struct host1x_debug_ops *debug_op;
137
138 struct host1x_syncpt *nop_sp;
139
140 struct mutex syncpt_mutex;
141
142 struct host1x_channel_list channel_list;
143
144 struct dentry *debugfs;
145
146 struct mutex devices_lock;
147 struct list_head devices;
148
149 struct list_head list;
150
151 struct device_dma_parameters dma_parms;
152 };
153
154 void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v);
155 u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r);
156 void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v);
157 u32 host1x_sync_readl(struct host1x *host1x, u32 r);
158 void host1x_ch_writel(struct host1x_channel *ch, u32 r, u32 v);
159 u32 host1x_ch_readl(struct host1x_channel *ch, u32 r);
160
host1x_hw_syncpt_restore(struct host1x * host,struct host1x_syncpt * sp)161 static inline void host1x_hw_syncpt_restore(struct host1x *host,
162 struct host1x_syncpt *sp)
163 {
164 host->syncpt_op->restore(sp);
165 }
166
host1x_hw_syncpt_restore_wait_base(struct host1x * host,struct host1x_syncpt * sp)167 static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host,
168 struct host1x_syncpt *sp)
169 {
170 host->syncpt_op->restore_wait_base(sp);
171 }
172
host1x_hw_syncpt_load_wait_base(struct host1x * host,struct host1x_syncpt * sp)173 static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host,
174 struct host1x_syncpt *sp)
175 {
176 host->syncpt_op->load_wait_base(sp);
177 }
178
host1x_hw_syncpt_load(struct host1x * host,struct host1x_syncpt * sp)179 static inline u32 host1x_hw_syncpt_load(struct host1x *host,
180 struct host1x_syncpt *sp)
181 {
182 return host->syncpt_op->load(sp);
183 }
184
host1x_hw_syncpt_cpu_incr(struct host1x * host,struct host1x_syncpt * sp)185 static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host,
186 struct host1x_syncpt *sp)
187 {
188 return host->syncpt_op->cpu_incr(sp);
189 }
190
host1x_hw_syncpt_assign_to_channel(struct host1x * host,struct host1x_syncpt * sp,struct host1x_channel * ch)191 static inline void host1x_hw_syncpt_assign_to_channel(
192 struct host1x *host, struct host1x_syncpt *sp,
193 struct host1x_channel *ch)
194 {
195 return host->syncpt_op->assign_to_channel(sp, ch);
196 }
197
host1x_hw_syncpt_enable_protection(struct host1x * host)198 static inline void host1x_hw_syncpt_enable_protection(struct host1x *host)
199 {
200 return host->syncpt_op->enable_protection(host);
201 }
202
host1x_hw_intr_init_host_sync(struct host1x * host,u32 cpm,void (* syncpt_thresh_work)(struct work_struct *))203 static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm,
204 void (*syncpt_thresh_work)(struct work_struct *))
205 {
206 return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work);
207 }
208
host1x_hw_intr_set_syncpt_threshold(struct host1x * host,unsigned int id,u32 thresh)209 static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host,
210 unsigned int id,
211 u32 thresh)
212 {
213 host->intr_op->set_syncpt_threshold(host, id, thresh);
214 }
215
host1x_hw_intr_enable_syncpt_intr(struct host1x * host,unsigned int id)216 static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host,
217 unsigned int id)
218 {
219 host->intr_op->enable_syncpt_intr(host, id);
220 }
221
host1x_hw_intr_disable_syncpt_intr(struct host1x * host,unsigned int id)222 static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host,
223 unsigned int id)
224 {
225 host->intr_op->disable_syncpt_intr(host, id);
226 }
227
host1x_hw_intr_disable_all_syncpt_intrs(struct host1x * host)228 static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host)
229 {
230 host->intr_op->disable_all_syncpt_intrs(host);
231 }
232
host1x_hw_intr_free_syncpt_irq(struct host1x * host)233 static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host)
234 {
235 return host->intr_op->free_syncpt_irq(host);
236 }
237
host1x_hw_channel_init(struct host1x * host,struct host1x_channel * channel,unsigned int id)238 static inline int host1x_hw_channel_init(struct host1x *host,
239 struct host1x_channel *channel,
240 unsigned int id)
241 {
242 return host->channel_op->init(channel, host, id);
243 }
244
host1x_hw_channel_submit(struct host1x * host,struct host1x_job * job)245 static inline int host1x_hw_channel_submit(struct host1x *host,
246 struct host1x_job *job)
247 {
248 return host->channel_op->submit(job);
249 }
250
host1x_hw_cdma_start(struct host1x * host,struct host1x_cdma * cdma)251 static inline void host1x_hw_cdma_start(struct host1x *host,
252 struct host1x_cdma *cdma)
253 {
254 host->cdma_op->start(cdma);
255 }
256
host1x_hw_cdma_stop(struct host1x * host,struct host1x_cdma * cdma)257 static inline void host1x_hw_cdma_stop(struct host1x *host,
258 struct host1x_cdma *cdma)
259 {
260 host->cdma_op->stop(cdma);
261 }
262
host1x_hw_cdma_flush(struct host1x * host,struct host1x_cdma * cdma)263 static inline void host1x_hw_cdma_flush(struct host1x *host,
264 struct host1x_cdma *cdma)
265 {
266 host->cdma_op->flush(cdma);
267 }
268
host1x_hw_cdma_timeout_init(struct host1x * host,struct host1x_cdma * cdma)269 static inline int host1x_hw_cdma_timeout_init(struct host1x *host,
270 struct host1x_cdma *cdma)
271 {
272 return host->cdma_op->timeout_init(cdma);
273 }
274
host1x_hw_cdma_timeout_destroy(struct host1x * host,struct host1x_cdma * cdma)275 static inline void host1x_hw_cdma_timeout_destroy(struct host1x *host,
276 struct host1x_cdma *cdma)
277 {
278 host->cdma_op->timeout_destroy(cdma);
279 }
280
host1x_hw_cdma_freeze(struct host1x * host,struct host1x_cdma * cdma)281 static inline void host1x_hw_cdma_freeze(struct host1x *host,
282 struct host1x_cdma *cdma)
283 {
284 host->cdma_op->freeze(cdma);
285 }
286
host1x_hw_cdma_resume(struct host1x * host,struct host1x_cdma * cdma,u32 getptr)287 static inline void host1x_hw_cdma_resume(struct host1x *host,
288 struct host1x_cdma *cdma, u32 getptr)
289 {
290 host->cdma_op->resume(cdma, getptr);
291 }
292
host1x_hw_cdma_timeout_cpu_incr(struct host1x * host,struct host1x_cdma * cdma,u32 getptr,u32 syncpt_incrs,u32 syncval,u32 nr_slots)293 static inline void host1x_hw_cdma_timeout_cpu_incr(struct host1x *host,
294 struct host1x_cdma *cdma,
295 u32 getptr,
296 u32 syncpt_incrs,
297 u32 syncval, u32 nr_slots)
298 {
299 host->cdma_op->timeout_cpu_incr(cdma, getptr, syncpt_incrs, syncval,
300 nr_slots);
301 }
302
host1x_hw_pushbuffer_init(struct host1x * host,struct push_buffer * pb)303 static inline void host1x_hw_pushbuffer_init(struct host1x *host,
304 struct push_buffer *pb)
305 {
306 host->cdma_pb_op->init(pb);
307 }
308
host1x_hw_debug_init(struct host1x * host,struct dentry * de)309 static inline void host1x_hw_debug_init(struct host1x *host, struct dentry *de)
310 {
311 if (host->debug_op && host->debug_op->debug_init)
312 host->debug_op->debug_init(de);
313 }
314
host1x_hw_show_channel_cdma(struct host1x * host,struct host1x_channel * channel,struct output * o)315 static inline void host1x_hw_show_channel_cdma(struct host1x *host,
316 struct host1x_channel *channel,
317 struct output *o)
318 {
319 host->debug_op->show_channel_cdma(host, channel, o);
320 }
321
host1x_hw_show_channel_fifo(struct host1x * host,struct host1x_channel * channel,struct output * o)322 static inline void host1x_hw_show_channel_fifo(struct host1x *host,
323 struct host1x_channel *channel,
324 struct output *o)
325 {
326 host->debug_op->show_channel_fifo(host, channel, o);
327 }
328
host1x_hw_show_mlocks(struct host1x * host,struct output * o)329 static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o)
330 {
331 host->debug_op->show_mlocks(host, o);
332 }
333
334 extern struct platform_driver tegra_mipi_driver;
335
336 #endif
337