1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device driver for the via ADB on (many) Mac II-class machines
4 *
5 * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
6 * Also derived from code Copyright (C) 1996 Paul Mackerras.
7 *
8 * With various updates provided over the years by Michael Schmitz,
9 * Guideo Koerber and others.
10 *
11 * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
12 *
13 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
14 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
15 * - Big overhaul, should actually work now.
16 * 2006-12-31 Finn Thain - Another overhaul.
17 *
18 * Suggested reading:
19 * Inside Macintosh, ch. 5 ADB Manager
20 * Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
21 * Rockwell R6522 VIA datasheet
22 *
23 * Apple's "ADB Analyzer" bus sniffer is invaluable:
24 * ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
25 */
26
27 #include <stdarg.h>
28 #include <linux/types.h>
29 #include <linux/errno.h>
30 #include <linux/kernel.h>
31 #include <linux/delay.h>
32 #include <linux/adb.h>
33 #include <linux/interrupt.h>
34 #include <linux/init.h>
35 #include <asm/macintosh.h>
36 #include <asm/macints.h>
37 #include <asm/mac_via.h>
38
39 static volatile unsigned char *via;
40
41 /* VIA registers - spaced 0x200 bytes apart */
42 #define RS 0x200 /* skip between registers */
43 #define B 0 /* B-side data */
44 #define A RS /* A-side data */
45 #define DIRB (2*RS) /* B-side direction (1=output) */
46 #define DIRA (3*RS) /* A-side direction (1=output) */
47 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
48 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
49 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
50 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
51 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
52 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
53 #define SR (10*RS) /* Shift register */
54 #define ACR (11*RS) /* Auxiliary control register */
55 #define PCR (12*RS) /* Peripheral control register */
56 #define IFR (13*RS) /* Interrupt flag register */
57 #define IER (14*RS) /* Interrupt enable register */
58 #define ANH (15*RS) /* A-side data, no handshake */
59
60 /* Bits in B data register: all active low */
61 #define CTLR_IRQ 0x08 /* Controller rcv status (input) */
62 #define ST_MASK 0x30 /* mask for selecting ADB state bits */
63
64 /* Bits in ACR */
65 #define SR_CTRL 0x1c /* Shift register control bits */
66 #define SR_EXT 0x0c /* Shift on external clock */
67 #define SR_OUT 0x10 /* Shift out if 1 */
68
69 /* Bits in IFR and IER */
70 #define IER_SET 0x80 /* set bits in IER */
71 #define IER_CLR 0 /* clear bits in IER */
72 #define SR_INT 0x04 /* Shift register full/empty */
73
74 /* ADB transaction states according to GMHW */
75 #define ST_CMD 0x00 /* ADB state: command byte */
76 #define ST_EVEN 0x10 /* ADB state: even data byte */
77 #define ST_ODD 0x20 /* ADB state: odd data byte */
78 #define ST_IDLE 0x30 /* ADB state: idle, nothing to send */
79
80 /* ADB command byte structure */
81 #define ADDR_MASK 0xF0
82 #define CMD_MASK 0x0F
83 #define OP_MASK 0x0C
84 #define TALK 0x0C
85
86 static int macii_init_via(void);
87 static void macii_start(void);
88 static irqreturn_t macii_interrupt(int irq, void *arg);
89 static void macii_queue_poll(void);
90
91 static int macii_probe(void);
92 static int macii_init(void);
93 static int macii_send_request(struct adb_request *req, int sync);
94 static int macii_write(struct adb_request *req);
95 static int macii_autopoll(int devs);
96 static void macii_poll(void);
97 static int macii_reset_bus(void);
98
99 struct adb_driver via_macii_driver = {
100 .name = "Mac II",
101 .probe = macii_probe,
102 .init = macii_init,
103 .send_request = macii_send_request,
104 .autopoll = macii_autopoll,
105 .poll = macii_poll,
106 .reset_bus = macii_reset_bus,
107 };
108
109 static enum macii_state {
110 idle,
111 sending,
112 reading,
113 } macii_state;
114
115 static struct adb_request *current_req; /* first request struct in the queue */
116 static struct adb_request *last_req; /* last request struct in the queue */
117 static unsigned char reply_buf[16]; /* storage for autopolled replies */
118 static unsigned char *reply_ptr; /* next byte in reply_buf or req->reply */
119 static bool reading_reply; /* store reply in reply_buf else req->reply */
120 static int data_index; /* index of the next byte to send from req->data */
121 static int reply_len; /* number of bytes received in reply_buf or req->reply */
122 static int status; /* VIA's ADB status bits captured upon interrupt */
123 static bool bus_timeout; /* no data was sent by the device */
124 static bool srq_asserted; /* have to poll for the device that asserted it */
125 static u8 last_cmd; /* the most recent command byte transmitted */
126 static u8 last_talk_cmd; /* the most recent Talk command byte transmitted */
127 static u8 last_poll_cmd; /* the most recent Talk R0 command byte transmitted */
128 static unsigned int autopoll_devs; /* bits set are device addresses to poll */
129
130 /* Check for MacII style ADB */
macii_probe(void)131 static int macii_probe(void)
132 {
133 if (macintosh_config->adb_type != MAC_ADB_II)
134 return -ENODEV;
135
136 via = via1;
137
138 pr_info("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
139 return 0;
140 }
141
142 /* Initialize the driver */
macii_init(void)143 static int macii_init(void)
144 {
145 unsigned long flags;
146 int err;
147
148 local_irq_save(flags);
149
150 err = macii_init_via();
151 if (err)
152 goto out;
153
154 err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB",
155 macii_interrupt);
156 if (err)
157 goto out;
158
159 macii_state = idle;
160 out:
161 local_irq_restore(flags);
162 return err;
163 }
164
165 /* initialize the hardware */
macii_init_via(void)166 static int macii_init_via(void)
167 {
168 unsigned char x;
169
170 /* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
171 via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;
172
173 /* Set up state: idle */
174 via[B] |= ST_IDLE;
175
176 /* Shift register on input */
177 via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
178
179 /* Wipe any pending data and int */
180 x = via[SR];
181
182 return 0;
183 }
184
185 /* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
macii_queue_poll(void)186 static void macii_queue_poll(void)
187 {
188 static struct adb_request req;
189 unsigned char poll_command;
190 unsigned int poll_addr;
191
192 /* This only polls devices in the autopoll list, which assumes that
193 * unprobed devices never assert SRQ. That could happen if a device was
194 * plugged in after the adb bus scan. Unplugging it again will resolve
195 * the problem. This behaviour is similar to MacOS.
196 */
197 if (!autopoll_devs)
198 return;
199
200 /* The device most recently polled may not be the best device to poll
201 * right now. Some other device(s) may have signalled SRQ (the active
202 * device won't do that). Or the autopoll list may have been changed.
203 * Try polling the next higher address.
204 */
205 poll_addr = (last_poll_cmd & ADDR_MASK) >> 4;
206 if ((srq_asserted && last_cmd == last_poll_cmd) ||
207 !(autopoll_devs & (1 << poll_addr))) {
208 unsigned int higher_devs;
209
210 higher_devs = autopoll_devs & -(1 << (poll_addr + 1));
211 poll_addr = ffs(higher_devs ? higher_devs : autopoll_devs) - 1;
212 }
213
214 /* Send a Talk Register 0 command */
215 poll_command = ADB_READREG(poll_addr, 0);
216
217 /* No need to repeat this Talk command. The transceiver will do that
218 * as long as it is idle.
219 */
220 if (poll_command == last_cmd)
221 return;
222
223 adb_request(&req, NULL, ADBREQ_NOSEND, 1, poll_command);
224
225 req.sent = 0;
226 req.complete = 0;
227 req.reply_len = 0;
228 req.next = current_req;
229
230 if (WARN_ON(current_req)) {
231 current_req = &req;
232 } else {
233 current_req = &req;
234 last_req = &req;
235 }
236 }
237
238 /* Send an ADB request; if sync, poll out the reply 'till it's done */
macii_send_request(struct adb_request * req,int sync)239 static int macii_send_request(struct adb_request *req, int sync)
240 {
241 int err;
242
243 err = macii_write(req);
244 if (err)
245 return err;
246
247 if (sync)
248 while (!req->complete)
249 macii_poll();
250
251 return 0;
252 }
253
254 /* Send an ADB request (append to request queue) */
macii_write(struct adb_request * req)255 static int macii_write(struct adb_request *req)
256 {
257 unsigned long flags;
258
259 if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {
260 req->complete = 1;
261 return -EINVAL;
262 }
263
264 req->next = NULL;
265 req->sent = 0;
266 req->complete = 0;
267 req->reply_len = 0;
268
269 local_irq_save(flags);
270
271 if (current_req != NULL) {
272 last_req->next = req;
273 last_req = req;
274 } else {
275 current_req = req;
276 last_req = req;
277 if (macii_state == idle)
278 macii_start();
279 }
280
281 local_irq_restore(flags);
282
283 return 0;
284 }
285
286 /* Start auto-polling */
macii_autopoll(int devs)287 static int macii_autopoll(int devs)
288 {
289 unsigned long flags;
290
291 local_irq_save(flags);
292
293 /* bit 1 == device 1, and so on. */
294 autopoll_devs = (unsigned int)devs & 0xFFFE;
295
296 if (!current_req) {
297 macii_queue_poll();
298 if (current_req && macii_state == idle)
299 macii_start();
300 }
301
302 local_irq_restore(flags);
303
304 return 0;
305 }
306
307 /* Prod the chip without interrupts */
macii_poll(void)308 static void macii_poll(void)
309 {
310 macii_interrupt(0, NULL);
311 }
312
313 /* Reset the bus */
macii_reset_bus(void)314 static int macii_reset_bus(void)
315 {
316 struct adb_request req;
317
318 /* Command = 0, Address = ignored */
319 adb_request(&req, NULL, ADBREQ_NOSEND, 1, ADB_BUSRESET);
320 macii_send_request(&req, 1);
321
322 /* Don't want any more requests during the Global Reset low time. */
323 udelay(3000);
324
325 return 0;
326 }
327
328 /* Start sending ADB packet */
macii_start(void)329 static void macii_start(void)
330 {
331 struct adb_request *req;
332
333 req = current_req;
334
335 /* Now send it. Be careful though, that first byte of the request
336 * is actually ADB_PACKET; the real data begins at index 1!
337 * And req->nbytes is the number of bytes of real data plus one.
338 */
339
340 /* Output mode */
341 via[ACR] |= SR_OUT;
342 /* Load data */
343 via[SR] = req->data[1];
344 /* set ADB state to 'command' */
345 via[B] = (via[B] & ~ST_MASK) | ST_CMD;
346
347 macii_state = sending;
348 data_index = 2;
349
350 bus_timeout = false;
351 srq_asserted = false;
352 }
353
354 /*
355 * The notorious ADB interrupt handler - does all of the protocol handling.
356 * Relies on the ADB controller sending and receiving data, thereby
357 * generating shift register interrupts (SR_INT) for us. This means there has
358 * to be activity on the ADB bus. The chip will poll to achieve this.
359 *
360 * The VIA Port B output signalling works as follows. After the ADB transceiver
361 * sees a transition on the PB4 and PB5 lines it will crank over the VIA shift
362 * register which eventually raises the SR_INT interrupt. The PB4/PB5 outputs
363 * are toggled with each byte as the ADB transaction progresses.
364 *
365 * Request with no reply expected (and empty transceiver buffer):
366 * CMD -> IDLE
367 * Request with expected reply packet (or with buffered autopoll packet):
368 * CMD -> EVEN -> ODD -> EVEN -> ... -> IDLE
369 * Unsolicited packet:
370 * IDLE -> EVEN -> ODD -> EVEN -> ... -> IDLE
371 */
macii_interrupt(int irq,void * arg)372 static irqreturn_t macii_interrupt(int irq, void *arg)
373 {
374 int x;
375 struct adb_request *req;
376 unsigned long flags;
377
378 local_irq_save(flags);
379
380 if (!arg) {
381 /* Clear the SR IRQ flag when polling. */
382 if (via[IFR] & SR_INT)
383 via[IFR] = SR_INT;
384 else {
385 local_irq_restore(flags);
386 return IRQ_NONE;
387 }
388 }
389
390 status = via[B] & (ST_MASK | CTLR_IRQ);
391
392 switch (macii_state) {
393 case idle:
394 WARN_ON((status & ST_MASK) != ST_IDLE);
395
396 reply_ptr = reply_buf;
397 reading_reply = false;
398
399 bus_timeout = false;
400 srq_asserted = false;
401
402 x = via[SR];
403
404 if (!(status & CTLR_IRQ)) {
405 /* /CTLR_IRQ asserted in idle state means we must
406 * read an autopoll reply from the transceiver buffer.
407 */
408 macii_state = reading;
409 *reply_ptr = x;
410 reply_len = 1;
411 } else {
412 /* bus timeout */
413 reply_len = 0;
414 break;
415 }
416
417 /* set ADB state = even for first data byte */
418 via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
419 break;
420
421 case sending:
422 req = current_req;
423
424 if (status == (ST_CMD | CTLR_IRQ)) {
425 /* /CTLR_IRQ de-asserted after the command byte means
426 * the host can continue with the transaction.
427 */
428
429 /* Store command byte */
430 last_cmd = req->data[1];
431 if ((last_cmd & OP_MASK) == TALK) {
432 last_talk_cmd = last_cmd;
433 if ((last_cmd & CMD_MASK) == ADB_READREG(0, 0))
434 last_poll_cmd = last_cmd;
435 }
436 }
437
438 if (status == ST_CMD) {
439 /* /CTLR_IRQ asserted after the command byte means we
440 * must read an autopoll reply. The first byte was
441 * lost because the shift register was an output.
442 */
443 macii_state = reading;
444
445 reading_reply = false;
446 reply_ptr = reply_buf;
447 *reply_ptr = last_talk_cmd;
448 reply_len = 1;
449
450 /* reset to shift in */
451 via[ACR] &= ~SR_OUT;
452 x = via[SR];
453 } else if (data_index >= req->nbytes) {
454 req->sent = 1;
455
456 if (req->reply_expected) {
457 macii_state = reading;
458
459 reading_reply = true;
460 reply_ptr = req->reply;
461 *reply_ptr = req->data[1];
462 reply_len = 1;
463
464 via[ACR] &= ~SR_OUT;
465 x = via[SR];
466 } else if ((req->data[1] & OP_MASK) == TALK) {
467 macii_state = reading;
468
469 reading_reply = false;
470 reply_ptr = reply_buf;
471 *reply_ptr = req->data[1];
472 reply_len = 1;
473
474 via[ACR] &= ~SR_OUT;
475 x = via[SR];
476
477 req->complete = 1;
478 current_req = req->next;
479 if (req->done)
480 (*req->done)(req);
481 } else {
482 macii_state = idle;
483
484 req->complete = 1;
485 current_req = req->next;
486 if (req->done)
487 (*req->done)(req);
488 break;
489 }
490 } else {
491 via[SR] = req->data[data_index++];
492 }
493
494 if ((via[B] & ST_MASK) == ST_CMD) {
495 /* just sent the command byte, set to EVEN */
496 via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
497 } else {
498 /* invert state bits, toggle ODD/EVEN */
499 via[B] ^= ST_MASK;
500 }
501 break;
502
503 case reading:
504 x = via[SR];
505 WARN_ON((status & ST_MASK) == ST_CMD ||
506 (status & ST_MASK) == ST_IDLE);
507
508 if (!(status & CTLR_IRQ)) {
509 if (status == ST_EVEN && reply_len == 1) {
510 bus_timeout = true;
511 } else if (status == ST_ODD && reply_len == 2) {
512 srq_asserted = true;
513 } else {
514 macii_state = idle;
515
516 if (bus_timeout)
517 reply_len = 0;
518
519 if (reading_reply) {
520 struct adb_request *req = current_req;
521
522 req->reply_len = reply_len;
523
524 req->complete = 1;
525 current_req = req->next;
526 if (req->done)
527 (*req->done)(req);
528 } else if (reply_len && autopoll_devs &&
529 reply_buf[0] == last_poll_cmd) {
530 adb_input(reply_buf, reply_len, 1);
531 }
532 break;
533 }
534 }
535
536 if (reply_len < ARRAY_SIZE(reply_buf)) {
537 reply_ptr++;
538 *reply_ptr = x;
539 reply_len++;
540 }
541
542 /* invert state bits, toggle ODD/EVEN */
543 via[B] ^= ST_MASK;
544 break;
545
546 default:
547 break;
548 }
549
550 if (macii_state == idle) {
551 if (!current_req)
552 macii_queue_poll();
553
554 if (current_req)
555 macii_start();
556
557 if (macii_state == idle) {
558 via[ACR] &= ~SR_OUT;
559 x = via[SR];
560 via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
561 }
562 }
563
564 local_irq_restore(flags);
565 return IRQ_HANDLED;
566 }
567