1 /*
2 * Copyright (c) 2017-2019, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codec_def_common_encode.h
24 //! \brief Defines common types and macros shared by CodecHal, MHW, and DDI layer for encode.
25 //! \details All codec_def_encode may include this file which should not contain any DDI specific code.
26 //!
27 #ifndef __CODEC_DEF_COMMON_ENCODE_H__
28 #define __CODEC_DEF_COMMON_ENCODE_H__
29
30 #include "mos_defs.h"
31
32 #define CODEC_NUM_REF_BUFFERS (CODEC_MAX_NUM_REF_FRAME + 1) // Max 16 references (for AVC) + 1 for the current frame
33 #define CODEC_NUM_NON_REF_BUFFERS 3
34 #define CODEC_NUM_TRACKED_BUFFERS (CODEC_NUM_REF_BUFFERS + CODEC_NUM_NON_REF_BUFFERS)
35 #define CODEC_CURR_TRACKED_BUFFER CODEC_NUM_TRACKED_BUFFERS
36
37 //BRC
38 #define BRC_IMG_STATE_SIZE_PER_PASS 128
39 #define BRC_IMG_STATE_SIZE_PER_PASS_G10 144
40 #define BRC_IMG_STATE_SIZE_PER_PASS_G11 192
41
42 // Quality/Performance differentiators for HSW AVC Encode
43 #define NUM_TARGET_USAGE_MODES 8
44 #define NUM_VDENC_TARGET_USAGE_MODES 8
45
46 //weighted prediction
47 #define CODEC_NUM_WP_FRAME 8
48 #define CODEC_MAX_FORWARD_WP_FRAME 6
49 #define CODEC_MAX_BACKWARD_WP_FRAME 2
50 #define CODEC_WP_OUTPUT_L0_START 0
51 #define CODEC_WP_OUTPUT_L1_START 6
52
53 #define CODEC_720P_MAX_PIC_WIDTH 1280
54 #define CODEC_720P_MAX_PIC_HEIGHT 1280
55
56 #define CODEC_MAX_PIC_WIDTH 1920
57 #define CODEC_MAX_PIC_HEIGHT 1920 // Tablet usage in portrait mode, image resolution = 1200x1920, so change MAX_HEIGHT to 1920
58
59 #define CODEC_2K_MAX_PIC_WIDTH 2048
60 #define CODEC_2K_MAX_PIC_HEIGHT 2048
61
62 #define CODEC_4K_VC1_MAX_PIC_WIDTH 3840
63 #define CODEC_4K_VC1_MAX_PIC_HEIGHT 3840
64
65 #define CODEC_4K_MAX_PIC_WIDTH 4096
66 #define CODEC_4K_MAX_PIC_HEIGHT 4096
67
68 #define CODEC_8K_MAX_PIC_WIDTH 8192
69 #define CODEC_8K_MAX_PIC_HEIGHT 8192
70
71 #define CODEC_16K_MAX_PIC_WIDTH 16384
72 #define CODEC_12K_MAX_PIC_HEIGHT 12288
73 #define CODEC_16K_MAX_PIC_HEIGHT 16384
74
75 #define CODECHAL_MAD_BUFFER_SIZE 4 // buffer size is 4 bytes
76
77 #define CODEC_128_MIN_PIC_WIDTH 128
78 #define CODEC_96_MIN_PIC_HEIGHT 96
79
80 // HME
81 #define SCALE_FACTOR_2x 2
82 #define SCALE_FACTOR_4x 4
83 #define SCALE_FACTOR_16x 16
84 #define SCALE_FACTOR_32x 32
85
86 #define CODECHAL_VP9_MB_CODE_SIZE 204
87
88 typedef struct tagENCODE_RECT
89 {
90 uint16_t Top; // [0..(FrameHeight+ M-1)/M -1]
91 uint16_t Bottom; // [0..(FrameHeight+ M-1)/M -1]
92 uint16_t Left; // [0..(FrameWidth+15)/16-1]
93 uint16_t Right; // [0..(FrameWidth+15)/16-1]
94 } ENCODE_RECT;
95
96 typedef struct tagMOVE_RECT
97 {
98 uint32_t SourcePointX;
99 uint32_t SourcePointY;
100 uint32_t DestRectTop;
101 uint32_t DestRectBottom;
102 uint32_t DestRectLeft;
103 uint32_t DestRectRight;
104 } MOVE_RECT;
105
106 /*! \brief Defines ROI settings.
107 *
108 * {Top, Bottom, Left, Right} defines the ROI boundary. The values are in unit of blocks. The block size M should use LCU size (e.g. sif LCU size is 32x32, M is 32). And its range should be within the frame boundary, so that:
109 * 0 <= Top <= Bottom <= (FrameHeight+ M-1)/M -1
110 * 0 <= Left <= Right <= (FrameWidth+M-1)/M-1
111 * If input range is out of frame boundary, driver should trim it.
112 * ROI alignes with LCU based rectangular blocks and cannot have arbitrary pixel-based location.
113 * Region overlapping is allowed. For MBs reside within more than one ROIs, parameters from ROI with smaller index rules. For example, when ROI[0] and ROI[1] overlap on a certain area, the QP value for the overlapped area will be determined by value of ROI[0]. The order of ROI[] reflects objects’ relative relationship of depth. Foreground objects should have ROI index smaller than background objects.
114 */
115 typedef struct _CODEC_ROI
116 {
117 uint16_t Top; //!< [0..(FrameHeight+15)/16-1]
118 uint16_t Bottom; //!< [0..(FrameHeight+15)/16-1]
119 uint16_t Left; //!< [0..(FrameWidth+15)/16-1]
120 uint16_t Right; //!< [0..(FrameWidth+15)/16-1]
121 /*! \brief For ROIValueInDeltaQP equals CQP case, this parameter gives explicit delta QP value of ROI regional QP vs. frame QP.
122 *
123 * Value range [-51..51]. If regional QP PriorityLevelOfDQp + QpY is out of range of [0..51], driver should crop it. It could be applied on both CQP and BRC cases. For ROIValueInDeltaQP equals 0BRC cases, this parameter describes the priority level of the ROI region. Value range [-3..3]. The higher the absolute value, the bigger range of delta QP is allowed. And it is usually applies on BRC case. BRC will decide the actual delta QP value. Positive priority level means negative delta QP should be applied. And negative priority level means positive delta QP which implies the region should be intentionally blurred. In either case, value Priority level 0 means same as non-ROI region. It is suggested that application does not set value 0. But if it happens, driver will treat that ROI as part of non-ROI background.
124 */
125 char PriorityLevelOrDQp;
126 } CODEC_ROI, *PCODEC_ROI;
127
128 /*! \brief Indicates the uncompressed input color space
129 *
130 * Valid only when input is ARGB format.
131 */
132 typedef enum _CODEC_INPUT_COLORSPACE
133 {
134 ECOLORSPACE_P709 = 0,
135 ECOLORSPACE_P601 = 1,
136 ECOLORSPACE_P2020 = 2
137 } CODEC_INPUT_COLORSPACE, ENCODE_INPUT_COLORSPACE;
138
139 /*! \brief Indicates the tolerance the application has to variations in the frame size.
140 *
141 * For example, wireless display scenarios may require very steady bitrate to reduce buffering time. It affects the BRC algorithm used, but may or may not have an effect based on the combination of other BRC parameters. Only valid when the driver reports support for FrameSizeToleranceSupport.
142 */
143 typedef enum _CODEC_FRAMESIZE_TOLERANCE
144 {
145 EFRAMESIZETOL_NORMAL = 0,
146 EFRAMESIZETOL_LOW = 1, //!< Maps to "sliding window"
147 EFRAMESIZETOL_EXTREMELY_LOW = 2 //!< Maps to "low delay"
148 } CODEC_FRAMESIZE_TOLERANCE, ENCODE_FRAMESIZE_TOLERANCE;
149
150 /*! \brief Provides a hint to encoder about the scenario for the encoding session.
151 *
152 * BRC algorithm may tune differently based on this info.
153 */
154 typedef enum _CODEC_SCENARIO
155 {
156 ESCENARIO_UNKNOWN = 0,
157 ESCENARIO_DISPLAYREMOTING = 1,
158 ESCENARIO_VIDEOCONFERENCE = 2,
159 ESCENARIO_ARCHIVE = 3,
160 ESCENARIO_LIVESTREAMING = 4,
161 ESCENARIO_VIDEOCAPTURE = 5,
162 ESCENARIO_VIDEOSURVEILLANCE = 6,
163 ESCENARIO_GAMESTREAMING = 7,
164 ESCENARIO_REMOTEGAMING = 8
165 } CODEC_SCENARIO, ENCODE_SCENARIO;
166
167 /*! \brief Provides a hint to encoder about the content for the encoding session.
168 */
169 typedef enum _CODEC_CONTENT
170 {
171 ECONTENT_UNKNOWN = 0,
172 ECONTENT_FULLSCREENVIDEO = 1,
173 ECONTENT_NONVIDEOSCREEN = 2
174 } CODEC_CONTENT, ENCODE_CONTENT;
175
176 typedef enum
177 {
178 RATECONTROL_CBR = 1,
179 RATECONTROL_VBR = 2,
180 RATECONTROL_CQP = 3,
181 RATECONTROL_AVBR = 4,
182 RATECONTROL_RESERVED0 = 8, // This is used by MSDK for Lookahead and hence not used here
183 RATECONTROL_ICQ = 9,
184 RATECONTROL_VCM = 10,
185 RATECONTROL_QVBR = 14,
186 RATECONTROL_CQL = 15,
187 RATECONTROL_IWD_VBR = 100
188 } RATE_CONTROL_METHOD;
189
190 //!
191 //! \brief Help function to check if the rate control method is BRC
192 //!
193 //! \param [in] rc
194 //! Rate control method
195 //!
196 //! \return True if using BRC , else return false
197 //!
IsRateControlBrc(uint8_t rc)198 inline bool IsRateControlBrc(uint8_t rc)
199 {
200 return (rc == RATECONTROL_CBR) ||
201 (rc == RATECONTROL_VBR) ||
202 (rc == RATECONTROL_AVBR) ||
203 (rc == RATECONTROL_VCM) ||
204 (rc == RATECONTROL_ICQ) ||
205 (rc == RATECONTROL_CQL) ||
206 (rc == RATECONTROL_QVBR);
207 }
208
209 typedef enum
210 {
211 DEFAULT_WEIGHTED_INTER_PRED_MODE = 0,
212 EXPLICIT_WEIGHTED_INTER_PRED_MODE = 1,
213 IMPLICIT_WEIGHTED_INTER_PRED_MODE = 2,
214 INVALID_WEIGHTED_INTER_PRED_MODE = -1
215 } WEIGHTED_INTER_PRED_MODE;
216
217 // used from MHW & DDI
218 typedef enum
219 {
220 ROLLING_I_DISABLED = 0,
221 ROLLING_I_COLUMN = 1,
222 ROLLING_I_ROW = 2,
223 ROLLING_I_SQUARE = 3
224 } ROLLING_I_SETTING;
225
226 typedef enum
227 {
228 BRC_ROLLING_I_DISABLED = 0,
229 BRC_ROLLING_I_COLUMN = 4,
230 BRC_ROLLING_I_ROW = 8,
231 BRC_ROLLING_I_SQUARE = 12,
232 BRC_ROLLING_I_QP = 13
233 }BRC_ROLLING_I_SETTING;
234
235 typedef enum _CODECHAL_MFX_SURFACE_ID
236 {
237 CODECHAL_MFX_REF_SURFACE_ID = 0,
238 CODECHAL_MFX_SRC_SURFACE_ID = 4,
239 CODECHAL_MFX_DSRECON_SURFACE_ID = 5
240 } CODECHAL_MFX_SURFACE_ID;
241
242 typedef enum _CODECHAL_HCP_SURFACE_ID
243 {
244 CODECHAL_HCP_DECODED_SURFACE_ID = 0,
245 CODECHAL_HCP_SRC_SURFACE_ID = 1, // Encode
246 CODECHAL_HCP_LAST_SURFACE_ID = 2, // VP9
247 CODECHAL_HCP_GOLDEN_SURFACE_ID = 3, // VP9
248 CODECHAL_HCP_ALTREF_SURFACE_ID = 4, // VP9
249 CODECHAL_HCP_REF_SURFACE_ID = 5
250 } CODECHAL_HCP_SURFACE_ID;
251
252 // ---------------------------
253 // Structures
254 // ---------------------------
255 // used from MHW & DDI
256 typedef struct _BSBuffer
257 {
258 uint8_t *pBase;
259 uint8_t *pCurrent;
260 uint32_t SliceOffset; // Slice offset, always byte aligned
261 uint8_t BitOffset; // bit offset for pCurrent.
262 uint32_t BitSize; // bit size per slice, first slice may include SPS & PPS
263 uint32_t BufferSize; // buffer size
264 } BSBuffer, *PBSBuffer;
265
266 typedef struct _CODEC_ENCODER_SLCDATA
267 {
268 uint32_t SliceOffset;
269 uint32_t BitSize;
270 uint32_t CmdOffset;
271 uint32_t SkipEmulationByteCount;
272
273 // MPEG2 only
274 struct
275 {
276 uint8_t SliceGroup;
277 uint16_t NextSgMbXCnt;
278 uint16_t NextSgMbYCnt;
279 };
280 } CODEC_ENCODER_SLCDATA, *PCODEC_ENCODER_SLCDATA;
281
282 typedef struct _CODECHAL_NAL_UNIT_PARAMS
283 {
284 uint32_t uiNalUnitType;
285 uint32_t uiOffset;
286 uint32_t uiSize;
287 bool bInsertEmulationBytes;
288 uint32_t uiSkipEmulationCheckCount;
289 } CODECHAL_NAL_UNIT_PARAMS, *PCODECHAL_NAL_UNIT_PARAMS;
290
291 typedef struct tagFRAMERATE
292 {
293 uint32_t Numerator;
294 uint32_t Denominator;
295 } FRAMERATE;
296
297 /*********************************************************************************\
298 Constants for VDENC costing look-up-tables
299 \*********************************************************************************/
300 typedef enum _CODEC_VDENC_LUTMODE
301 {
302 CODEC_VDENC_LUTMODE_INTRA_SADMPM = 0x00,
303 CODEC_VDENC_LUTMODE_INTRA_32x32 = 0x01,
304 CODEC_VDENC_LUTMODE_INTRA_16x16 = 0x02,
305 CODEC_VDENC_LUTMODE_INTRA_8x8 = 0x03,
306 CODEC_VDENC_LUTMODE_INTER_32x16 = 0x04,
307 CODEC_VDENC_LUTMODE_INTER_16x32 = 0x04,
308 CODEC_VDENC_LUTMODE_INTER_AMP = 0x04, //All asymmetrical shapes
309 CODEC_VDENC_LUTMODE_INTER_16x16 = 0x05,
310 CODEC_VDENC_LUTMODE_INTER_16x8 = 0x06,
311 CODEC_VDENC_LUTMODE_INTER_8x16 = 0x06,
312 CODEC_VDENC_LUTMODE_INTER_8x8 = 0x07,
313 CODEC_VDENC_LUTMODE_INTER_32x32 = 0x08,
314 CODEC_VDENC_LUTMODE_INTER_BIDIR = 0x09,
315 CODEC_VDENC_LUTMODE_REF_ID = 0x0A,
316 CODEC_VDENC_LUTMODE_INTRA_CHROMA = 0x0B,
317 CODEC_VDENC_LUTMODE_INTRA_NxN = 0x0C,
318 CODEC_VDENC_LUTMODE_INTRA_RDEMPM = 0x0D,
319 CODEC_VDENC_LUTMODE_MERGE_32X32 = 0x0E,
320 CODEC_VDENC_LUTMODE_MERGE_16x16 = 0x0F,
321 CODEC_VDENC_LUTMODE_MERGE_8x8 = 0x10,
322 CODEC_VDENC_LUTMODE_SKIP_32X32 = 0x11,
323 CODEC_VDENC_LUTMODE_SKIP_16x16 = 0x12,
324 CODEC_VDENC_LUTMODE_SKIP_8x8 = 0x13,
325 CODEC_VDENC_LUTMODE_INTRA_DC_32x32_SAD = 0x14,
326 CODEC_VDENC_LUTMODE_INTRA_DC_16x16_SAD = 0x15,
327 CODEC_VDENC_LUTMODE_INTRA_DC_8x8_SAD = 0x16,
328 CODEC_VDENC_LUTMODE_INTRA_DC_4x4_SAD = 0x17,
329 CODEC_VDENC_LUTMODE_INTRA_NONDC_32x32_SAD = 0x18,
330 CODEC_VDENC_LUTMODE_INTRA_NONDC_16x16_SAD = 0x19,
331 CODEC_VDENC_LUTMODE_INTRA_NONDC_8x8_SAD = 0x1A,
332 CODEC_VDENC_LUTMODE_INTRA_NONDC_4x4_SAD = 0x1B,
333 CODEC_VDENC_LUTMODE_INTRA_DC_32x32_RD = 0x1C,
334 CODEC_VDENC_LUTMODE_INTRA_DC_8x8_RD = 0x1D,
335 CODEC_VDENC_LUTMODE_INTRA_NONDC_32x32_RD = 0x1E,
336 CODEC_VDENC_LUTMODE_INTRA_NONDC_8x8_RD = 0x1F,
337 CODEC_VDENC_LUTMODE_INTRA_LEFT_BOUNDARY_SAD = 0x20,
338 CODEC_VDENC_LUTMODE_INTRA_TOP_BOUNDARY_SAD = 0x21,
339 CODEC_VDENC_LUTMODE_INTRA_TU_SPLIT = 0x22,
340 CODEC_VDENC_LUTMODE_INTER_TU_SPLIT = 0x23,
341 CODEC_VDENC_LUTMODE_TU_CBF_FLAG = 0x24,
342 CODEC_VDENC_LUTMODE_INTRA_TU_32_CBF_FLAG = CODEC_VDENC_LUTMODE_TU_CBF_FLAG + 0,
343 CODEC_VDENC_LUTMODE_INTRA_TU_16_CBF_FLAG = CODEC_VDENC_LUTMODE_TU_CBF_FLAG + 1,
344 CODEC_VDENC_LUTMODE_INTRA_TU_8_CBF_FLAG = CODEC_VDENC_LUTMODE_TU_CBF_FLAG + 2,
345 CODEC_VDENC_LUTMODE_INTRA_TU_4_CBF_FLAG = CODEC_VDENC_LUTMODE_TU_CBF_FLAG + 3,
346 CODEC_VDENC_LUTMODE_INTER_TU_32_CBF_FLAG = CODEC_VDENC_LUTMODE_TU_CBF_FLAG + 4,
347 CODEC_VDENC_LUTMODE_INTER_TU_16_CBF_FLAG = CODEC_VDENC_LUTMODE_TU_CBF_FLAG + 5,
348 CODEC_VDENC_LUTMODE_INTER_TU_8_CBF_FLAG = CODEC_VDENC_LUTMODE_TU_CBF_FLAG + 6,
349 CODEC_VDENC_LUTMODE_INTER_TU_4_CBF_FLAG = CODEC_VDENC_LUTMODE_TU_CBF_FLAG + 7,
350
351 CODEC_VDENC_LUTMODE_TU_COEF_EST = 0x2C,
352 CODEC_VDENC_LUTMODE_INTRA_TU_32_NZC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 0,
353 CODEC_VDENC_LUTMODE_INTRA_TU_16_NZC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 1,
354 CODEC_VDENC_LUTMODE_INTRA_TU_8_NZC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 2,
355 CODEC_VDENC_LUTMODE_INTRA_TU_4_NZC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 3,
356 CODEC_VDENC_LUTMODE_INTER_TU_32_NZC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 4,
357 CODEC_VDENC_LUTMODE_INTER_TU_16_NZC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 5,
358 CODEC_VDENC_LUTMODE_INTER_TU_8_NZC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 6,
359 CODEC_VDENC_LUTMODE_INTER_TU_4_NZC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 7,
360
361 CODEC_VDENC_LUTMODE_INTRA_TU_32_NSIGC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 8,
362 CODEC_VDENC_LUTMODE_INTRA_TU_16_NSIGC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 9,
363 CODEC_VDENC_LUTMODE_INTRA_TU_8_NSIGC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 10,
364 CODEC_VDENC_LUTMODE_INTRA_TU_4_NSIGC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 11,
365 CODEC_VDENC_LUTMODE_INTER_TU_32_NSIGC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 12,
366 CODEC_VDENC_LUTMODE_INTER_TU_16_NSIGC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 13,
367 CODEC_VDENC_LUTMODE_INTER_TU_8_NSIGC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 14,
368 CODEC_VDENC_LUTMODE_INTER_TU_4_NSIGC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 15,
369
370 CODEC_VDENC_LUTMODE_INTRA_TU_32_NSUBSETC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 16,
371 CODEC_VDENC_LUTMODE_INTRA_TU_16_NSUBSETC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 17,
372 CODEC_VDENC_LUTMODE_INTRA_TU_8_NSUBSETC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 18,
373 CODEC_VDENC_LUTMODE_INTRA_TU_4_NSUBSETC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 19,
374 CODEC_VDENC_LUTMODE_INTER_TU_32_NSUBSETC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 20,
375 CODEC_VDENC_LUTMODE_INTER_TU_16_NSUBSETC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 21,
376 CODEC_VDENC_LUTMODE_INTER_TU_8_NSUBSETC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 22,
377 CODEC_VDENC_LUTMODE_INTER_TU_4_NSUBSETC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 23,
378
379 CODEC_VDENC_LUTMODE_INTRA_TU_32_NLEVELC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 24,
380 CODEC_VDENC_LUTMODE_INTRA_TU_16_NLEVELC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 25,
381 CODEC_VDENC_LUTMODE_INTRA_TU_8_NLEVELC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 26,
382 CODEC_VDENC_LUTMODE_INTRA_TU_4_NLEVELC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 27,
383 CODEC_VDENC_LUTMODE_INTER_TU_32_NLEVELC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 28,
384 CODEC_VDENC_LUTMODE_INTER_TU_16_NLEVELC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 29,
385 CODEC_VDENC_LUTMODE_INTER_TU_8_NLEVELC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 30,
386 CODEC_VDENC_LUTMODE_INTER_TU_4_NLEVELC = CODEC_VDENC_LUTMODE_TU_COEF_EST + 31,
387
388 // VP9 specific cost
389 CODEC_VDENC_LUTMODE_INTRA_32x16 = 0x4C,
390 CODEC_VDENC_LUTMODE_INTRA_16x8 = 0x4D,
391 CODEC_VDENC_LUTMODE_INTER_NEARESTMV = 0x4E,
392 CODEC_VDENC_LUTMODE_INTER_NEARMV = 0x4F,
393 CODEC_VDENC_LUTMODE_INTER_ZEROMV = 0x50,
394 CODEC_VDENC_LUTMODE_TU_DEPTH0 = 0x51,
395 CODEC_VDENC_LUTMODE_TU_DEPTH1 = 0x52,
396 CODEC_VDENC_LUTMODE_TU_DEPTH2 = 0x53,
397
398 CODEC_VDENC_LUTMODE_INTRA_64X64DC = 0x54,
399 CODEC_VDENC_LUTMODE_MERGE_64X64 = 0x55,
400 CODEC_VDENC_LUTMODE_SKIP_64X64 = 0x56,
401
402 CODEC_VDENC_NUM_MODE_COST = 0x57
403 } CODEC_VDENC_LUTMODE;
404
405 // Batch buffer type
406 enum
407 {
408 MB_ENC_Frame_BB = 0,
409 MB_ENC_Field_BB,
410 //Add new buffer type here
411 NUM_ENCODE_BB_TYPE
412 };
413
414 typedef enum
415 {
416 FRAME_NO_SKIP = 0, // encode as normal, no skip frames
417 FRAME_SKIP_NORMAL = 1 // one or more frames were skipped prior to curr frame. Encode curr frame as normal, update BRC
418 } FRAME_SKIP_FLAG;
419
420 typedef enum _CODEC_SLICE_STRUCTS
421 {
422 CODECHAL_SLICE_STRUCT_ONESLICE = 0, // Once slice for the whole frame
423 CODECHAL_SLICE_STRUCT_POW2ROWS = 1, // Slices are power of 2 number of rows, all slices the same
424 CODECHAL_SLICE_STRUCT_ROWSLICE = 2, // Slices are any number of rows, all slices the same
425 CODECHAL_SLICE_STRUCT_ARBITRARYROWSLICE = 3, // Slices are any number of rows, slices can be different
426 CODECHAL_SLICE_STRUCT_ARBITRARYMBSLICE = 4 // Slices are any number of MBs, slices can be different
427 // 5 - 7 are Reserved
428 } CODEC_SLICE_STRUCTS;
429
430 //FEI Encode Macros
431 #define CodecHalIsFeiEncode(codecFunction) \
432 ( codecFunction == CODECHAL_FUNCTION_FEI_PRE_ENC || \
433 codecFunction == CODECHAL_FUNCTION_FEI_ENC || \
434 codecFunction == CODECHAL_FUNCTION_FEI_PAK || \
435 codecFunction == CODECHAL_FUNCTION_FEI_ENC_PAK)
436
437 //Encode Macros
438 #define CodecHalIsEncode(codecFunction) \
439 (codecFunction == CODECHAL_FUNCTION_ENC || \
440 codecFunction == CODECHAL_FUNCTION_PAK || \
441 codecFunction == CODECHAL_FUNCTION_ENC_PAK || \
442 codecFunction == CODECHAL_FUNCTION_ENC_VDENC_PAK ||\
443 codecFunction == CODECHAL_FUNCTION_HYBRIDPAK) || \
444 CodecHalIsFeiEncode(codecFunction)
445
446 #define CodecHalUsesVideoEngine(codecFunction) \
447 (codecFunction == CODECHAL_FUNCTION_PAK || \
448 codecFunction == CODECHAL_FUNCTION_ENC_PAK || \
449 codecFunction == CODECHAL_FUNCTION_ENC_VDENC_PAK || \
450 codecFunction == CODECHAL_FUNCTION_FEI_PAK || \
451 codecFunction == CODECHAL_FUNCTION_FEI_ENC_PAK)
452
453 #define CodecHalUsesRenderEngine(codecFunction, standard) \
454 (codecFunction == CODECHAL_FUNCTION_ENC || \
455 (codecFunction == CODECHAL_FUNCTION_ENC_PAK) || \
456 codecFunction == CODECHAL_FUNCTION_HYBRIDPAK || \
457 ((codecFunction == CODECHAL_FUNCTION_DECODE) && (standard == CODECHAL_VC1)) || \
458 codecFunction == CODECHAL_FUNCTION_ENC_VDENC_PAK || \
459 codecFunction == CODECHAL_FUNCTION_FEI_PRE_ENC || \
460 codecFunction == CODECHAL_FUNCTION_FEI_ENC || \
461 codecFunction == CODECHAL_FUNCTION_FEI_ENC_PAK)
462
463 #define CodecHalUsesOnlyRenderEngine(codecFunction) \
464 (codecFunction == CODECHAL_FUNCTION_ENC || \
465 codecFunction == CODECHAL_FUNCTION_FEI_ENC || \
466 codecFunction == CODECHAL_FUNCTION_HYBRIDPAK)
467
468 #define CodecHalUsesVdencEngine(codecFunction) \
469 (codecFunction == CODECHAL_FUNCTION_ENC_VDENC_PAK)
470
471 #define CodecHalUsesPakEngine(codecFunction) \
472 (codecFunction == CODECHAL_FUNCTION_PAK || \
473 codecFunction == CODECHAL_FUNCTION_ENC_PAK)
474
475 #define CodecHalIsRateControlBrc(rateControl, standard) (\
476 (rateControl == RATECONTROL_CBR) || \
477 (rateControl == RATECONTROL_VBR) || \
478 (rateControl == RATECONTROL_AVBR) || \
479 (rateControl == RATECONTROL_CQL) || \
480 ((( rateControl == RATECONTROL_VCM) || \
481 ( rateControl == RATECONTROL_ICQ) || \
482 ( rateControl == RATECONTROL_QVBR) || \
483 ( rateControl == RATECONTROL_IWD_VBR)) && \
484 ( standard == CODECHAL_AVC )) )
485
486 // The current definition of the first encode mode CODECHAL_ENCODE_MODE_AVC should be used
487 // as a base for subsequent encode modes
488 #define CODECHAL_ENCODE_MODE_BIT_OFFSET ((uint32_t)(log((double)CODECHAL_ENCODE_MODE_AVC)/log(2.)))
489 #define CODECHAL_ENCODE_MODE_BIT_MASK (( 1L << CODECHAL_ENCODE_MODE_BIT_OFFSET) - 1 )
490
491 #endif // __CODEC_DEF_COMMON_ENCODE_H__
492