1 /*===================== begin_copyright_notice ==================================
2
3 # Copyright (c) 2021, Intel Corporation
4
5 # Permission is hereby granted, free of charge, to any person obtaining a
6 # copy of this software and associated documentation files (the "Software"),
7 # to deal in the Software without restriction, including without limitation
8 # the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 # and/or sell copies of the Software, and to permit persons to whom the
10 # Software is furnished to do so, subject to the following conditions:
11
12 # The above copyright notice and this permission notice shall be included
13 # in all copies or substantial portions of the Software.
14
15 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16 # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 # OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 # OTHER DEALINGS IN THE SOFTWARE.
22
23 ======================= end_copyright_notice ==================================*/
24 //!
25 //! \file vphal_renderer_xe_xpm_plus.cpp
26 //! \brief VPHAL top level rendering component and the entry to low level renderers
27 //! \details The top renderer is responsible for coordinating the sequence of calls to low level renderers, e.g. DNDI or Comp
28 //!
29 #include "vphal_render_vebox_xe_xpm.h"
30 #include "vphal_renderer_xe_xpm_plus.h"
31 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
32 #include "igvpkrn_xe_xpm_plus.h"
33 #include "igvpkrn_xe_xpm_plus_cmfcpatch.h"
34 #endif
35 #include "vphal_render_composite_xe_xpm_plus.h"
36
37 extern const Kdll_RuleEntry g_KdllRuleTable_xe_xpm_plus[];
38
GetCacheCntl(PMOS_INTERFACE pOsInterface,PLATFORM * pPlatform,MEDIA_FEATURE_TABLE * pSkuTable,PVPHAL_RENDER_CACHE_CNTL pSettings)39 void VphalRendererXe_Xpm_Plus::GetCacheCntl(
40 PMOS_INTERFACE pOsInterface,
41 PLATFORM *pPlatform,
42 MEDIA_FEATURE_TABLE *pSkuTable,
43 PVPHAL_RENDER_CACHE_CNTL pSettings)
44
45 {
46 MOS_HW_RESOURCE_DEF Usage;
47 MEMORY_OBJECT_CONTROL_STATE MemObjCtrl;
48
49 VPHAL_RENDER_CHK_NULL_NO_STATUS_RETURN(pOsInterface);
50 VPHAL_RENDER_CHK_NULL_NO_STATUS_RETURN(pSettings);
51
52 // Read user feature key to control L3 on PVC. it is only Workaround for Emu limitation.
53 // after silicon, we need remove it.
54 bool l3Enabled = false;
55 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
56 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
57 MOS_USER_FEATURE_INVALID_KEY_ASSERT(MOS_UserFeature_ReadValue_ID(
58 nullptr,
59 __MEDIA_USER_FEATURE_VALUE_RENDER_ENABLE_EUFUSION_ID,
60 &userFeatureData,
61 pOsInterface->pOsContext));
62
63 l3Enabled = userFeatureData.bData ? true : false;
64
65 if (pSettings->bCompositing && (!l3Enabled))
66 {
67 pSettings->Composite.bL3CachingEnabled = true;
68
69 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Composite.PrimaryInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_RCS);
70 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Composite.InputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_RCS);
71 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Composite.TargetSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT_RCS);
72 }
73 else
74 {
75 pSettings->Composite.bL3CachingEnabled = false;
76
77 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Composite.PrimaryInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT_RCS);
78 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Composite.InputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT_RCS);
79 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Composite.TargetSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT_RCS);
80 }
81
82 if (pSettings->bDnDi)
83 {
84 pSettings->DnDi.bL3CachingEnabled = false;
85
86 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.CurrentInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
87 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.PreviousInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
88 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.STMMInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
89 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.STMMOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
90 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.DnOutSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
91 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.CurrentOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
92 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.StatisticsOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
93 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.AlphaOrVignetteSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
94 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.LaceOrAceOrRgbHistogramSurfCtrl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
95 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.SkinScoreSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
96 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.LaceLookUpTablesSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
97 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.Vebox3DLookUpTablesSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_FF);
98 }
99 else
100 {
101 pSettings->DnDi.bL3CachingEnabled = false;
102
103 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.CurrentInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
104 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.PreviousInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
105 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.STMMInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
106 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.STMMOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
107 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.DnOutSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
108 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.CurrentOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
109 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.StatisticsOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
110 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.AlphaOrVignetteSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
111 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.LaceOrAceOrRgbHistogramSurfCtrl, MOS_MP_RESOURCE_USAGE_DEFAULT);
112 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.SkinScoreSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
113 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.LaceLookUpTablesSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
114 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.Vebox3DLookUpTablesSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
115 }
116
117 if (pSettings->bLace)
118 {
119 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.FrameHistogramSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_RCS);
120 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.AggregatedHistogramSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_RCS);
121 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.StdStatisticsSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_RCS);
122 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.PwlfInSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_RCS);
123 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.PwlfOutSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_RCS);
124 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.WeitCoefSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState_RCS);
125 }
126 else
127 {
128 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.FrameHistogramSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
129 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.AggregatedHistogramSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
130 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.StdStatisticsSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
131 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.PwlfInSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
132 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.PwlfOutSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
133 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.WeitCoefSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
134 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.GlobalToneMappingCurveLUTSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
135 }
136
137 }
138
AllocateRenderComponents(PMHW_VEBOX_INTERFACE pVeboxInterface,PMHW_SFC_INTERFACE pSfcInterface)139 MOS_STATUS VphalRendererXe_Xpm_Plus::AllocateRenderComponents(
140 PMHW_VEBOX_INTERFACE pVeboxInterface,
141 PMHW_SFC_INTERFACE pSfcInterface)
142 {
143 MOS_STATUS eStatus;
144 VPHAL_RENDER_CACHE_CNTL CacheCntl;
145
146 VPHAL_RENDER_CHK_NULL_RETURN(m_pRenderHal);
147
148 eStatus = MOS_STATUS_SUCCESS;
149
150 // Get the cache settings
151 MOS_ZeroMemory(&CacheCntl, sizeof(CacheCntl));
152
153 CacheCntl.bCompositing = true;
154
155 VPHAL_RENDERER_GET_CACHE_CNTL(this,
156 m_pOsInterface,
157 &m_pRenderHal->Platform,
158 m_pSkuTable,
159 &CacheCntl);
160
161 // Initialize Advanced Processing Interface
162 pRender[VPHAL_RENDER_ID_VEBOX] = MOS_New(
163 VPHAL_VEBOX_STATE_XE_XPM,
164 m_pOsInterface,
165 pVeboxInterface,
166 pSfcInterface,
167 m_pRenderHal,
168 &VeboxExecState[0],
169 &PerfData,
170 CacheCntl.DnDi,
171 &eStatus);
172 if (!pRender[VPHAL_RENDER_ID_VEBOX] ||
173 (eStatus != MOS_STATUS_SUCCESS))
174 {
175 eStatus = MOS_STATUS_NO_SPACE;
176 VPHAL_RENDER_ASSERTMESSAGE("Allocate Vebox Render Fail.");
177 return eStatus;
178 }
179
180 pRender[VPHAL_RENDER_ID_VEBOX2] = MOS_New(
181 VPHAL_VEBOX_STATE_XE_XPM,
182 m_pOsInterface,
183 pVeboxInterface,
184 pSfcInterface,
185 m_pRenderHal,
186 &VeboxExecState[1],
187 &PerfData,
188 CacheCntl.DnDi,
189 &eStatus);
190 if (!pRender[VPHAL_RENDER_ID_VEBOX2] ||
191 (eStatus != MOS_STATUS_SUCCESS))
192 {
193 eStatus = MOS_STATUS_NO_SPACE;
194 VPHAL_RENDER_ASSERTMESSAGE("Allocate Vebox Render Fail.");
195 return eStatus;
196 }
197
198 // Allocate Composite State
199 pRender[VPHAL_RENDER_ID_COMPOSITE] = MOS_New(
200 CompositeStateXe_Xpm_Plus,
201 m_pOsInterface,
202 m_pRenderHal,
203 &PerfData,
204 CacheCntl.Composite,
205 &eStatus);
206 if (!pRender[VPHAL_RENDER_ID_COMPOSITE] ||
207 (eStatus != MOS_STATUS_SUCCESS))
208 {
209 eStatus = MOS_STATUS_NO_SPACE;
210 VPHAL_RENDER_ASSERTMESSAGE("Allocate Composite Render Fail.");
211 return eStatus;
212 }
213
214 return eStatus;
215 }
216
InitKdllParam()217 MOS_STATUS VphalRendererXe_Xpm_Plus::InitKdllParam()
218 {
219 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
220
221 // Override kernel binary for CMFC/SWSB
222 if (bEnableCMFC)
223 {
224 pKernelDllRules = g_KdllRuleTable_xe_xpm_plus;
225 #if defined(ENABLE_KERNELS) && !defined(_FULL_OPEN_SOURCE)
226 pcKernelBin = (const void *)IGVPKRN_XE_XPM_PLUS;
227 dwKernelBinSize = IGVPKRN_XE_XPM_PLUS_SIZE;
228 pcFcPatchBin = (const void *)IGVPKRN_XE_XPM_PLUS_CMFCPATCH;
229 dwFcPatchBinSize = IGVPKRN_XE_XPM_PLUS_CMFCPATCH_SIZE;
230 #else
231 pcKernelBin = nullptr;
232 dwKernelBinSize = 0;
233 pcFcPatchBin = nullptr;
234 dwFcPatchBinSize = 0;
235 #endif
236 }
237
238 if ((NULL == pcFcPatchBin) || (0 == dwFcPatchBinSize))
239 {
240 bEnableCMFC = false;
241 }
242
243 if (bEnableCMFC && (NULL != pcFcPatchBin) && (0 != dwFcPatchBinSize))
244 {
245 m_pRenderHal->bEnableP010SinglePass = true;
246 }
247 else
248 {
249 m_pRenderHal->bEnableP010SinglePass = false;
250 }
251
252 return eStatus;
253 }
254
Render(PCVPHAL_RENDER_PARAMS pcRenderParams)255 MOS_STATUS VphalRendererXe_Xpm_Plus::Render(
256 PCVPHAL_RENDER_PARAMS pcRenderParams)
257 {
258 MOS_STATUS eStatus;
259 PMOS_INTERFACE pOsInterface;
260 PRENDERHAL_INTERFACE pRenderHal;
261 VPHAL_RENDER_PARAMS RenderParams; // Make a copy of render params
262 PVPHAL_SURFACE pSrcLeft[VPHAL_MAX_SOURCES]; // Array of sources referring to left view stereo content
263 PVPHAL_SURFACE pSrcRight[VPHAL_MAX_SOURCES]; // Array of sources referring to right view stereo content
264 uint32_t uiRenderPasses; // Number of rendering passes in this one call to VpHal_RndrRender()
265 uint32_t uiCurrentRenderPass; // Current render pass
266 uint32_t uiDst;
267 VPHAL_GET_SURFACE_INFO Info;
268
269 //--------------------------------------------
270 VPHAL_RENDER_ASSERT(pcRenderParams);
271 VPHAL_RENDER_ASSERT(m_pOsInterface);
272 VPHAL_RENDER_ASSERT(m_pRenderHal);
273 VPHAL_RENDER_ASSERT(pKernelDllState);
274 VPHAL_RENDER_ASSERT(pRender[VPHAL_RENDER_ID_COMPOSITE]);
275 //--------------------------------------------
276
277 eStatus = MOS_STATUS_SUCCESS;
278 pOsInterface = m_pOsInterface;
279 pRenderHal = m_pRenderHal;
280
281 // Validate render target
282 if (pcRenderParams->pTarget[0] == nullptr ||
283 Mos_ResourceIsNull(&(pcRenderParams->pTarget[0]->OsResource)))
284 {
285 VPHAL_RENDER_ASSERTMESSAGE("Invalid Render Target.");
286 eStatus = MOS_STATUS_UNKNOWN;
287 goto finish;
288 }
289
290 // Protection mechanism, Only KBL+ support P010 output.
291 if (IsFormatSupported(pcRenderParams) == false)
292 {
293 VPHAL_RENDER_ASSERTMESSAGE("Invalid Render Target Output Format.");
294 eStatus = MOS_STATUS_UNKNOWN;
295 goto finish;
296 }
297
298 VPHAL_DBG_STATE_DUMP_SET_CURRENT_FRAME_COUNT(uiFrameCounter);
299
300 // Validate max number sources
301 if (pcRenderParams->uSrcCount > VPHAL_MAX_SOURCES)
302 {
303 VPHAL_RENDER_ASSERTMESSAGE("Invalid number of samples.");
304 eStatus = MOS_STATUS_UNKNOWN;
305 goto finish;
306 }
307
308 // Validate max number targets
309 if (pcRenderParams->uDstCount > VPHAL_MAX_TARGETS)
310 {
311 VPHAL_RENDER_ASSERTMESSAGE("Invalid number of targets.");
312 eStatus = MOS_STATUS_UNKNOWN;
313 goto finish;
314 }
315
316 // Copy the Render Params structure (so we can update it)
317 RenderParams = *pcRenderParams;
318
319 VPHAL_DBG_PARAMETERS_DUMPPER_DUMP_XML(&RenderParams);
320
321 // Get resource information for render target
322 MOS_ZeroMemory(&Info, sizeof(VPHAL_GET_SURFACE_INFO));
323
324 for (uiDst = 0; uiDst < RenderParams.uDstCount; uiDst++)
325 {
326 VPHAL_RENDER_CHK_STATUS(VpHal_GetSurfaceInfo(
327 m_pOsInterface,
328 &Info,
329 RenderParams.pTarget[uiDst]));
330 }
331
332 // Set the component info
333 m_pOsInterface->Component = pcRenderParams->Component;
334
335 // Init component(DDI entry point) info for perf measurement
336 m_pOsInterface->pfnSetPerfTag(m_pOsInterface, VPHAL_NONE);
337
338 // Increment frame ID for performance measurement
339 m_pOsInterface->pfnIncPerfFrameID(m_pOsInterface);
340
341 // Enable Turbo mode if sku present and DDI requests it
342 if (m_pSkuTable && MEDIA_IS_SKU(m_pSkuTable, FtrMediaTurboMode))
343 {
344 m_pRenderHal->bTurboMode = RenderParams.bTurboMode;
345 }
346
347 // Reset feature reporting
348 m_reporting->InitReportValue();
349
350 MOS_ZeroMemory(pSrcLeft, sizeof(PVPHAL_SURFACE) * VPHAL_MAX_SOURCES);
351 MOS_ZeroMemory(pSrcRight, sizeof(PVPHAL_SURFACE) * VPHAL_MAX_SOURCES);
352
353 VPHAL_RENDER_CHK_STATUS(PrepareSources(
354 &RenderParams,
355 pSrcLeft,
356 pSrcRight,
357 &uiRenderPasses));
358
359 //set GpuContext
360 VPHAL_RENDER_CHK_STATUS(SetRenderGpuContext(RenderParams));
361
362 // align rectangle and source surface
363 for (uiDst = 0; uiDst < RenderParams.uDstCount; uiDst++)
364 {
365 VPHAL_RENDER_CHK_STATUS(VpHal_RndrRectSurfaceAlignment(RenderParams.pTarget[uiDst], RenderParams.pTarget[uiDst]->Format));
366 }
367
368 for (uiCurrentRenderPass = 0;
369 uiCurrentRenderPass < uiRenderPasses;
370 uiCurrentRenderPass++)
371 {
372 // Assign source surfaces for current rendering pass
373 MOS_SecureMemcpy(
374 RenderParams.pSrc,
375 sizeof(PVPHAL_SURFACE) * VPHAL_MAX_SOURCES,
376 (uiCurrentRenderPass == 0) ? pSrcLeft : pSrcRight,
377 sizeof(PVPHAL_SURFACE) * VPHAL_MAX_SOURCES);
378
379 MOS_ZeroMemory(&Info, sizeof(VPHAL_GET_SURFACE_INFO));
380
381 for (uiDst = 0; uiDst < RenderParams.uDstCount; uiDst++)
382 {
383 Info.S3dChannel = RenderParams.pTarget[uiDst]->Channel;
384 Info.ArraySlice = uiCurrentRenderPass;
385
386 VPHAL_RENDER_CHK_STATUS(VpHal_GetSurfaceInfo(
387 m_pOsInterface,
388 &Info,
389 RenderParams.pTarget[uiDst]));
390 }
391
392 // Update channel. 0 = mono or stereo left, 1 = stereo right
393 uiCurrentChannel = uiCurrentRenderPass;
394
395 // for interlaced scaling : two field --> one interleaved mode
396 if (pcRenderParams->pSrc[0]->InterlacedScalingType == ISCALING_FIELD_TO_INTERLEAVED)
397 {
398 RenderParams.pSrc[0]->rcDst.bottom = RenderParams.pSrc[0]->rcDst.bottom / 2;
399 RenderParams.pSrc[0]->pBwdRef->rcDst.bottom = RenderParams.pSrc[0]->rcDst.bottom;
400 RenderParams.pSrc[0]->pBwdRef->InterlacedScalingType = ISCALING_FIELD_TO_INTERLEAVED;
401 if (RenderParams.pSrc[0]->SampleType == SAMPLE_SINGLE_TOP_FIELD)
402 {
403 RenderParams.pSrc[0]->pBwdRef->SampleType = SAMPLE_SINGLE_BOTTOM_FIELD;
404 RenderParams.pTarget[0]->SampleType = SAMPLE_INTERLEAVED_EVEN_FIRST_TOP_FIELD;
405 }
406 else
407 {
408 RenderParams.pSrc[0]->pBwdRef->SampleType = SAMPLE_SINGLE_TOP_FIELD;
409 RenderParams.pTarget[0]->SampleType = SAMPLE_INTERLEAVED_ODD_FIRST_BOTTOM_FIELD;
410 }
411 if (RenderParams.pSrc[0]->pBwdRef->pDeinterlaceParams)
412 {
413 MOS_FreeMemory(RenderParams.pSrc[0]->pBwdRef->pDeinterlaceParams);
414 RenderParams.pSrc[0]->pBwdRef->pDeinterlaceParams = nullptr;
415 }
416
417 for (int uiField = 0; uiField < 2; uiField++)
418 {
419 if (uiField == 0)
420 {
421 VPHAL_RENDER_CHK_STATUS(RenderPass(&RenderParams));
422 }
423 else
424 {
425 RenderParams.pSrc[0] = RenderParams.pSrc[0]->pBwdRef;
426 RenderParams.pSrc[0]->SurfType = SURF_IN_PRIMARY;
427 VPHAL_RENDER_CHK_STATUS(RenderPass(&RenderParams));
428 }
429 }
430 }
431 else
432 {
433 VPHAL_RENDER_CHK_STATUS(RenderPass(&RenderParams));
434 }
435 }
436 finish:
437 uiFrameCounter++;
438 return eStatus;
439 }
440