1 /* 2 * Copyright (c) 2017-2021, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 /* 24 * Copyright (c) 2010 The WebM project authors. All Rights Reserved. 25 * 26 * Use of this source code is governed by a BSD-style license 27 * that can be found in the LICENSE file in the root of the source 28 * tree. An additional intellectual property rights grant can be found 29 * in the file PATENTS. All contributing project authors may 30 * be found in the AUTHORS file in the root of the source tree. 31 */ 32 33 //! 34 //! \file codechal_vdenc_vp9_base.h 35 //! \brief Defines base class for VP9 VDENC encoder. 36 //! 37 38 #ifndef __CODECHAL_VDENC_VP9_BASE_H__ 39 #define __CODECHAL_VDENC_VP9_BASE_H__ 40 41 #include "codechal_encoder_base.h" 42 #include "codechal_huc_cmd_initializer.h" 43 #include "codec_def_vp9_probs.h" 44 #include "codechal_debug.h" 45 46 #define CODECHAL_ENCODE_VP9_MAX_NUM_HCP_PIPE 4 47 #define CODECHAL_VP9_ENCODE_RECYCLED_BUFFER_NUM (CODECHAL_ENCODE_RECYCLED_BUFFER_NUM * CODECHAL_ENCODE_VP9_MAX_NUM_HCP_PIPE) // for salability, need 1 buffer per pipe, 48 #define CODECHAL_ENCODE_VP9_NUM_SYNC_TAGS 36 49 #define CODECHAL_ENCODE_VP9_INIT_DSH_SIZE (MHW_PAGE_SIZE * 3) 50 #define CODECHAL_ENCODE_VP9_SUPERFRAME_REPEATED_HEADER_SIZE 1 51 #define CODECHAL_ENCODE_VP9_SUPERFRAME_MARKER_HEADER_SIZE 1 52 #define CODECHAL_ENCODE_VP9_HUC_BRC_DATA_BUFFER_SIZE (16*4) 53 #define CODECHAL_ENCODE_VP9_PAK_INSERT_UNCOMPRESSED_HEADER 80 54 #define CODECHAL_ENCODE_VP9_BRC_SUPER_FRAME_BUFFER_SIZE MOS_ALIGN_CEIL(3 + 2 * sizeof(uint32_t), sizeof(uint32_t)) 55 #define CODECHAL_ENCODE_VP9_VDENC_DATA_EXTENSION_SIZE 32 56 #define CODECHAL_ENCODE_VP9_PIC_STATE_BUFFER_SIZE_PER_PASS 192 // 42 DWORDs for Pic State one uint32_t for BB End + 5 uint32_tS reserved to make it aligned for kernel read 57 #define CODECHAL_ENCODE_VP9_MIN_TILE_SIZE_WIDTH 256 58 #define CODECHAL_ENCODE_VP9_MIN_TILE_SIZE_HEIGHT 128 59 #define CODECHAL_ENCODE_VP9_NUM_MAX_L0_REF 3 60 #define CODECHAL_ENCODE_VP9_HUC_SUPERFRAME_PASS 2 61 #define CODECHAL_ENCODE_VP9_REF_SEGMENT_DISABLED 0xFF 62 #define CODECHAL_ENCODE_VP9_BRC_MAX_NUM_OF_PASSES 4 63 #define CODECHAL_ENCODE_VP9_CQP_NUM_OF_PASSES 2 64 #define CODECHAL_ENCODE_VP9_BRC_DEFAULT_NUM_OF_PASSES 2 // 2 Passes minimum so HuC is Run twice, second PAK is conditional. 65 #define CODECHAL_ENCODE_VP9_BRC_HISTORY_BUFFER_SIZE 768 66 #define CODECHAL_ENCODE_VP9_BRC_CONSTANTSURFACE_SIZE 17792 67 #define CODECHAL_ENCODE_VP9_SEGMENT_STATE_BUFFER_SIZE 256 68 #define CODECHAL_ENCODE_VP9_BRC_BITSTREAM_SIZE_BUFFER_SIZE 16 69 #define CODECHAL_ENCODE_VP9_BRC_MSDK_PAK_BUFFER_SIZE 64 70 #define CODECHAL_VDENC_VP9_BRC_HUC_STATUS_ERROR_MASK (1 << 30) 71 #define CODECHAL_VDENC_VP9_BRC_HUC_STATUS_ARITHMETIC_OVERFLOW_ERROR_MASK (1 << 27) 72 #define CODECHAL_VDENC_VP9_BRC_HUC_STATUS_MEMORY_ACCESS_ERROR_MASK (1 << 26) 73 #define CODECHAL_VDENC_VP9_BRC_HUC_STATUS_DMEM_ERROR_MASK (1 << 24) 74 75 #define VP9SWBRCLIB "VP9BRCDLL.dll" 76 77 typedef struct _HUC_AUX_BUFFER 78 { 79 uint32_t Function; // reserved for function related flags 80 uint32_t HuCStatus; // HuC Status 81 uint8_t BRC_PrevSceneChgType_U8; 82 uint8_t BRC_PrevSceneChgFrmAway_U8; 83 uint8_t rsvd2; 84 uint8_t rsvd3; 85 uint32_t RSVD[13]; 86 } HUC_AUX_BUFFER, *PHUC_AUX_BUFFER; 87 #define CODECHAL_ENCODE_VP9_FRAME_HEADER_SIZE 4096 88 #define CODECHAL_ENCODE_VP9_MAX_NAL_UNIT_TYPE 1 // only support one NAL unit for uncompressed header 89 #define ENCODE_VP9_8K_PIC_WIDTH 8192 90 #define ENCODE_VP9_8K_PIC_HEIGHT 8192 91 #define ENCODE_VP9_16K_PIC_WIDTH 16384 92 #define ENCODE_VP9_16K_PIC_HEIGHT 16384 93 94 extern const uint8_t Keyframe_Default_Probs[2048]; 95 extern const uint8_t Inter_Default_Probs[2048]; 96 extern const uint8_t LF_VALUE_QP_LOOKUP[256]; 97 98 //! 99 //! \struct BRC_BITSTREAM_SIZE_BUFFER 100 //! \brief Brc bitstream size buffer 101 //! 102 struct BRC_BITSTREAM_SIZE_BUFFER 103 { 104 uint32_t dwHcpBitstreamByteCountFrame; 105 uint32_t dwHcpImageStatusControl; 106 uint32_t Reserved[2]; 107 }; 108 109 //! 110 //! \struct CU_DATA 111 //! \brief CU data 112 //! 113 struct CU_DATA 114 { 115 // DW0 116 uint32_t cu_size : 2; 117 uint32_t Res_DW0_2_3 : 2; 118 uint32_t cu_part_mode : 2; // 0=2Nx2N,1=2NxN,2=Nx2N,3=NxN(8x8 only) 119 uint32_t Res_DW0_6_7 : 2; 120 uint32_t intra_chroma_mode0 : 4; // 0=DC,1=V,2=H,3=TM,4=D45,5=D135,6=D117,7=D153,8=D207,9=D63 121 uint32_t Res_DW0_12_15 : 4; 122 uint32_t intra_chroma_mode1 : 4; // 0=DC,1=V,2=H,3=TM,4=D45,5=D135,6=D117,7=D153,8=D207,9=D63 123 uint32_t cu_pred_mode0 : 1; // 1=Intra,0=Inter 124 uint32_t cu_pred_mode1 : 1; 125 uint32_t Res_DW0_23_22 : 2; 126 uint32_t interpred_comp0 : 1; // 0=single,1=compound 127 uint32_t interpred_comp1 : 1; 128 uint32_t Res_DW0_31_26 : 6; 129 130 //DW1 131 uint32_t intra_mode0 : 4; // 0=DC,1=V,2=H,3=TM,4=D45,5=D135,6=D117,7=D153,8=D207,9=D63 132 uint32_t Res_DW1_4_7 : 4; 133 uint32_t intra_mode1 : 4; // 0=DC,1=V,2=H,3=TM,4=D45,5=D135,6=D117,7=D153,8=D207,9=D63 134 uint32_t Res_DW1_12_15 : 4; 135 uint32_t intra_mode2 : 4; // 0=DC,1=V,2=H,3=TM,4=D45,5=D135,6=D117,7=D153,8=D207,9=D63 136 uint32_t Res_DW1_20_23 : 4; 137 uint32_t intra_mode3 : 4; // 0=DC,1=V,2=H,3=TM,4=D45,5=D135,6=D117,7=D153,8=D207,9=D63 138 uint32_t Res_DW1_28_31 : 4; 139 140 //DW2 141 int16_t mvx_l0_part0 : 16; 142 int16_t mvy_l0_part0 : 16; 143 144 //DW3 145 int16_t mvx_l0_part1 : 16; 146 int16_t mvy_l0_part1 : 16; 147 148 //DW4 149 int16_t mvx_l0_part2 : 16; 150 int16_t mvy_l0_part2 : 16; 151 152 //DW5 153 int16_t mvx_l0_part3 : 16; 154 int16_t mvy_l0_part3 : 16; 155 156 //DW6 157 int16_t mvx_l1_part0 : 16; 158 int16_t mvy_l1_part0 : 16; 159 160 //DW7 161 int16_t mvx_l1_part1 : 16; 162 int16_t mvy_l1_part1 : 16; 163 164 //DW8 165 int16_t mvx_l1_part2 : 16; 166 int16_t mvy_l1_part2 : 16; 167 168 //DW9 169 int16_t mvx_l1_part3 : 16; 170 int16_t mvy_l1_part3 : 16; 171 172 //DW10 173 uint32_t refframe_part0_l0 : 2; // 0=intra,1=last,2=golden,3=altref 174 uint32_t Res_DW10_2_3 : 2; 175 uint32_t refframe_part1_l0 : 2; // 0=intra,1=last,2=golden,3=altref 176 uint32_t Res_DW10_6_7 : 2; 177 uint32_t refframe_part0_l1 : 2; // 0=intra,1=last,2=golden,3=altref 178 uint32_t Res_DW10_10_11 : 2; 179 uint32_t refframe_part1_l1 : 2; // 0=intra,1=last,2=golden,3=altref 180 uint32_t Res_DW10_14_15 : 2; 181 uint32_t round_part0 : 3; 182 uint32_t Res_DW10_19 : 1; 183 uint32_t round_part1 : 3; 184 uint32_t Res_DW10_23_31 : 9; 185 186 //DW11 187 uint32_t tu_size0 : 2; 188 uint32_t tu_size1 : 2; 189 uint32_t Res_DW11_4_13 : 10; 190 uint32_t segidx_pred0 : 1; 191 uint32_t segidx_pred1 : 1; 192 uint32_t segidx_part0 : 3; 193 uint32_t segidx_part1 : 3; 194 uint32_t mc_filtertype_part0 : 2; 195 uint32_t mc_filtertype_part1 : 2; 196 uint32_t Res_DW11_26_31 : 6; 197 198 uint32_t Res_DW12 : 32; 199 200 uint32_t Res_DW13 : 32; 201 202 uint32_t Res_DW14 : 32; 203 204 uint32_t Res_DW15 : 32; 205 206 }; 207 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(CU_DATA)) == 16); 208 209 //! 210 //! \enum VP9_MBBRC_MODE 211 //! \brief VP9 mbbrc mode 212 //! 213 enum VP9_MBBRC_MODE 214 { 215 //Target usage determines whether MBBRC is enabled or not. 216 //Currently for all the target usages it is enabled. 217 //once the performance is measured for performance TU mode, decision will be taken 218 //whether to enable or disable MBBRC. 219 MBBRC_ENABLED_TU_DEPENDENCY = 0, 220 MBBRC_ENABLED = 1, 221 MBBRC_DISABLED = 2 222 223 }; 224 225 //! 226 //! \enum TU_MODE 227 //! \brief TU mode 228 //! 229 enum TU_MODE 230 { 231 TU_QUALITY = 1, 232 TU_NORMAL = 4, 233 TU_PERFORMANCE = 7 234 }; 235 236 //! 237 //! \enum DYS_REF_FLAGS 238 //! \brief DYS reference flags 239 //! 240 enum DYS_REF_FLAGS 241 { 242 DYS_REF_NONE = 0, 243 DYS_REF_LAST = (1 << 0), 244 DYS_REF_GOLDEN = (1 << 1), 245 DYS_REF_ALT = (1 << 2), 246 }; 247 248 //! 249 //! \enum PRED_MODE 250 //! \brief Pred mode 251 //! 252 enum PRED_MODE 253 { 254 PRED_MODE_SINGLE = 0, 255 PRED_MODE_COMPOUND = 1, 256 PRED_MODE_HYBRID = 2 257 }; 258 259 //! 260 //! \class CodechalVdencVp9State 261 //! \brief Codechal Vdenc Vp9 state 262 //! 263 class CodechalVdencVp9State : public CodechalEncoderState 264 { 265 public: 266 //! 267 //! \struct Compressed Header 268 //! \brief Compressed header 269 //! 270 struct CompressedHeader 271 { 272 union { 273 struct { 274 uint8_t valid : 1; // valid =1, invalid = 0 275 uint8_t bin_probdiff : 1; // 1= bin, 0 = prob diff 276 uint8_t prob : 1; // 0 = 128, 1 = 252 277 uint8_t bin : 1; 278 uint8_t reserved : 4; 279 } fields; 280 uint8_t value; 281 }; 282 }; 283 284 //! 285 //! \struct DysSamplerStateParams 286 //! \brief Dys sampler state parameters 287 //! 288 struct DysSamplerStateParams 289 { 290 PMHW_KERNEL_STATE pKernelState; 291 }; 292 293 //! 294 //! \struct DysCurbeParams 295 //! \brief Dys curbe parameters 296 //! 297 struct DysCurbeParams 298 { 299 uint32_t dwInputWidth; 300 uint32_t dwInputHeight; 301 uint32_t dwOutputWidth; 302 uint32_t dwOutputHeight; 303 PMHW_KERNEL_STATE pKernelState; 304 }; 305 306 //! 307 //! \struct DysKernelParams 308 //! \brief Dys kernel parameters 309 //! 310 struct DysKernelParams 311 { 312 uint32_t dwInputWidth; 313 uint32_t dwInputHeight; 314 uint32_t dwOutputWidth; 315 uint32_t dwOutputHeight; 316 PMOS_SURFACE psInputSurface; 317 PMOS_SURFACE psOutputSurface; 318 }; 319 320 //! 321 //! \struct HcpPakObject 322 //! \brief HCP pak object 323 //! 324 struct HcpPakObject 325 { 326 // DW0 327 struct 328 { 329 uint32_t DwordLength : 16; //[15:0] 330 uint32_t SubOp : 7; //[22:16] 331 uint32_t Opcode : 6; //[28:23] 332 uint32_t Type : 3; //[31:29] 333 } DW0; 334 335 //DW1 336 struct 337 { 338 uint32_t Split_flag_level2_level1part0 : 4; 339 uint32_t Split_flag_level2_level1part1 : 4; 340 uint32_t Split_flag_level2_level1part2 : 4; 341 uint32_t Split_flag_level2_level1part3 : 4; 342 uint32_t Split_flag_level1 : 4; 343 uint32_t Split_flag_level0 : 1; 344 uint32_t Reserved21_23 : 3; 345 uint32_t CU_count_minus1 : 6; 346 uint32_t IsLastSBFrameflag : 1; 347 uint32_t IsLastSBTileflag : 1; 348 } DW1; 349 350 //DW2 351 struct 352 { 353 uint32_t Current_SB_X_Addr : 16; 354 uint32_t Current_SB_Y_Addr : 16; 355 } DW2; 356 357 //DW3 358 uint32_t Reserved_DW03 : 32; 359 360 }; 361 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(HcpPakObject)) == 4); 362 363 //! 364 //! \struct HucFrameCtrl 365 //! \brief HUC frame contol 366 //! 367 struct HucFrameCtrl 368 { 369 uint32_t FrameType; //0:INTRA, 1:INTER // DW15 370 uint32_t ShowFrame; // DW16 371 uint32_t ErrorResilientMode; // DW17 372 uint32_t IntraOnly; // DW18 373 uint32_t ContextReset; // DW19 374 uint32_t LastRefFrameBias; // DW20 375 uint32_t GoldenRefFrameBias; // DW21 376 uint32_t AltRefFrameBias; // DW22 377 uint32_t AllowHighPrecisionMv; // DW23 378 uint32_t McompFilterMode; // DW24 379 uint32_t TxMode; // DW25 380 uint32_t RefreshFrameContext; // DW26 381 uint32_t FrameParallelDecode; // DW27 382 uint32_t CompPredMode; // DW28 383 uint32_t FrameContextIdx; // DW29 384 uint32_t SharpnessLevel; // DW30 385 uint32_t SegOn; // DW31 386 uint32_t SegMapUpdate; // DW32 387 uint32_t SegUpdateData; // DW33 388 uint8_t Rsvd[13]; // DW34-36, first byte of 37 389 uint8_t log2TileCols; // DW37 390 uint8_t log2TileRows; // DW37 391 uint8_t Reserved[5]; // DW37 last byte, DW38 392 }; 393 394 //! 395 //! \struct HucBrcBuffers 396 //! \brief HUC brc buffers 397 //! 398 struct HucBrcBuffers 399 { 400 MOS_RESOURCE resBrcHistoryBuffer; 401 MOS_RESOURCE resBrcConstantDataBuffer; 402 MOS_RESOURCE resBrcMsdkPakBuffer; 403 MOS_RESOURCE resBrcMbEncCurbeWriteBuffer; 404 MOS_RESOURCE resMbEncAdvancedDsh; 405 MOS_RESOURCE resPicStateBrcReadBuffer; 406 MOS_RESOURCE resPicStateBrcWriteHucReadBuffer; 407 MOS_RESOURCE resPicStateHucWriteBuffer; 408 MOS_RESOURCE resSegmentStateBrcReadBuffer; 409 MOS_RESOURCE resSegmentStateBrcWriteBuffer; 410 MOS_RESOURCE resBrcBitstreamSizeBuffer; 411 MOS_RESOURCE resBrcHucDataBuffer; 412 }; 413 //! 414 //! \struct HucPrevFrameInfo 415 //! \brief HUC definition: PrevFrameInfo 416 //! 417 struct HucPrevFrameInfo 418 { 419 uint32_t IntraOnly; // DW39 420 uint32_t FrameWidth; // DW40 421 uint32_t FrameHeight; // DW41 422 uint32_t KeyFrame; // DW42 423 uint32_t ShowFrame; // DW43 424 }; 425 426 //! 427 //! \struct HucProbDmem 428 //! \brief HUC prob dmem 429 //! 430 struct HucProbDmem 431 { 432 uint32_t HuCPassNum; 433 uint32_t FrameWidth; 434 uint32_t FrameHeight; 435 uint32_t Rsvd32[6]; 436 char SegmentRef[CODEC_VP9_MAX_SEGMENTS]; 437 uint8_t SegmentSkip[CODEC_VP9_MAX_SEGMENTS]; 438 uint8_t SegCodeAbs; 439 uint8_t SegTemporalUpdate; 440 uint8_t LastRefIndex; 441 uint8_t GoldenRefIndex; 442 uint8_t AltRefIndex; 443 uint8_t RefreshFrameFlags; 444 uint8_t RefFrameFlags; 445 uint8_t ContextFrameTypes; 446 HucFrameCtrl FrameCtrl; 447 HucPrevFrameInfo PrevFrameInfo; 448 uint8_t Rsvd[2]; 449 uint8_t FrameToShow; 450 uint8_t LoadKeyFrameDefaultProbs; 451 uint32_t FrameSize; 452 uint32_t Reserved1; 453 uint32_t RePak; 454 uint16_t LFLevelBitOffset; 455 uint16_t QIndexBitOffset; 456 uint16_t SegBitOffset; 457 uint16_t SegLengthInBits; 458 uint16_t UnCompHdrTotalLengthInBits; 459 uint16_t SegUpdateDisable; 460 int32_t RePakThreshold[256]; 461 uint16_t PicStateOffset; 462 uint16_t SLBBSize; 463 uint8_t StreamInEnable; 464 uint8_t StreamInSegEnable; 465 uint8_t DisableDMA; 466 uint8_t IVFHeaderSize; 467 uint8_t Reserved[44]; 468 }; 469 470 //! 471 //! \struct HucBrcInitDmem 472 //! \brief HUC brc init dmem 473 //! 474 struct HucBrcInitDmem 475 { 476 uint32_t BRCFunc; // 0: Init; 2: Reset 477 uint32_t ProfileLevelMaxFrame; // Limit on maximum frame size based on selected profile and level, and can be user defined 478 uint32_t InitBufFullness; // Initial buffer fullness 479 uint32_t BufSize; // Buffer size 480 uint32_t TargetBitrate; // Average(target) bit rate 481 uint32_t MaxRate; // Maximum bit rate in bits per second (bps). 482 uint32_t MinRate; // Minimum bit rate 483 uint32_t FrameRateM; // Framerate numerator 484 uint32_t FrameRateD; // Framerate denominator 485 uint32_t RSVD32[4]; // Reserved, MBZ 486 487 uint16_t BRCFlag; // BRC flag 488 uint16_t GopP; // number of P frames in a GOP 489 uint16_t Reserved; 490 uint16_t FrameWidth; // Frame width 491 uint16_t FrameHeight; // Frame height 492 uint16_t MinQP; // Minimum QP 493 uint16_t MaxQP; // Maximum QP 494 uint16_t LevelQP; // Level QP 495 uint16_t GoldenFrameInterval; // Golden frame interval 496 uint16_t EnableScaling; // Enable resolution scaling 497 uint16_t OvershootCBR; // default: 115, CBR overshoot percentage 498 uint16_t RSVD16[5]; // Reserved, MBZ 499 500 int8_t InstRateThreshP0[4]; // Instant rate threshold for P frame 501 int8_t Reserved2[4]; 502 int8_t InstRateThreshI0[4]; 503 int8_t DevThreshPB0[8]; // Deviation threshold for P and B frame 504 int8_t DevThreshVBR0[8]; // Deviation threshold for VBR control 505 int8_t DevThreshI0[8]; // Deviation threshold for I frame 506 507 uint8_t InitQPP; 508 uint8_t InitQPI; 509 uint8_t RSVD3; 510 uint8_t Total_Level; 511 uint8_t MaxLevel_Ratio[16]; 512 uint8_t SlidingWindowEnable; 513 uint8_t SlidingWindowSize; 514 uint8_t RSVD8[47]; // Reserved, MBZ 515 }; 516 517 //! 518 //! \struct HucBrcUpdateDmem 519 //! \brief HUC brc update dmem 520 //! 521 struct HucBrcUpdateDmem 522 { 523 int32_t UPD_TARGET_BUF_FULLNESS_U32; //passed by the driver 524 uint32_t UPD_FRAMENUM_U32; //passed by the driver 525 int32_t UPD_HRD_BUFF_FULLNESS_UPPER_I32; //passed by the driver 526 int32_t UPD_HRD_BUFF_FULLNESS_LOWER_I32; //passed by the driver 527 uint32_t RSVD32[7]; // mbz 528 529 uint16_t UPD_startGAdjFrame_U16[4]; // start global adjust frame (4 items) 530 uint16_t UPD_CurWidth_U16; // current width 531 uint16_t UPD_CurHeight_U16; // current height 532 uint16_t UPD_Asyn_U16; 533 uint16_t UPD_VDEncImgStateOffset; // the image state start position in bytes from the begining of Second Level BB 534 uint16_t UPD_SLBBSize; // second level batch buffer total size in bytes 535 uint16_t UPD_PicStateOffset; // the pic state offset in bytes from the beginning of second level batch buffer 536 uint16_t RSVD16[6]; // mbz 537 538 uint8_t UPD_OVERFLOW_FLAG_U8; //passed by the driver 539 uint8_t UPD_BRCFlag_U8; //BRC flag, 0 - nothing to report, others - BRCPIC\BRCCUR flag defines 1 - scene change, etc // RSVD on G10, remove when G11 drops dependency 540 uint8_t UPD_MaxNumPAKs_U8; //maximum number of PAKs (default set to 4) 541 int8_t UPD_CurrFrameType_U8; //current frame type (0:P, 1:B, 2:I) 542 uint8_t UPD_QPThreshold_U8[4]; // QP threshold (4 entries) 543 uint8_t UPD_gRateRatioThreshold_U8[6]; // global rate ratio threshold (6 items) 544 int8_t UPD_startGAdjMult_U8[5]; // start global adjust mult (5 items) 545 int8_t UPD_startGAdjDiv_U8[5]; // start global adjust div (5 items) 546 int8_t UPD_gRateRatioThresholdQP_U8[7]; // global rate ratio threshold QP (7 items) 547 uint8_t UPD_DistThreshldI_U8[9]; //(N_DISTORION_THRESHLDS+1) distortion thresholds for I frames 548 uint8_t UPD_DistThreshldP_U8[9]; //(N_DISTORION_THRESHLDS+1) distortion thresholds for P frames 549 uint8_t UPD_DistThreshldB_U8[9]; //(N_DISTORION_THRESHLDS+1) distortion thresholds for B frames; no needed for Vp8 - to clean up 550 int8_t UPD_MaxFrameThreshI_U8[5]; //num qp threshld + 1 of multiplyers 551 int8_t UPD_MaxFrameThreshP_U8[5]; //num qp threshld + 1 of multiplyers 552 int8_t UPD_MaxFrameThreshB_U8[5]; //num qp threshld + 1 of multiplyers; no needed for Vp8 - to clean up 553 uint8_t UPD_PAKPassNum_U8; // current pak pass number 554 uint8_t UPD_ACQQp_U8; 555 int8_t UPD_DeltaQPForSadZone0_I8; 556 int8_t UPD_DeltaQPForSadZone1_I8; 557 int8_t UPD_DeltaQPForSadZone2_I8; 558 int8_t UPD_DeltaQPForSadZone3_I8; 559 int8_t UPD_DeltaQPForMvZero_I8; 560 int8_t UPD_DeltaQPForMvZone0_I8; 561 int8_t UPD_DeltaQPForMvZone1_I8; 562 int8_t UPD_DeltaQPForMvZone2_I8; 563 uint8_t UPD_Temporal_Level_U8; 564 uint8_t UPD_SegMapGenerating_U8; // Default 0: HuC does not update segmentation state; 1: HuC updates all 8 segmentation states in second level batch buffer 565 uint8_t RSVD8[95]; // mbz 566 }; 567 568 //! 569 //! \struct HucBrcDataBuffer 570 //! \brief HUC brc data buffer 571 //! 572 struct HucBrcDataBuffer 573 { 574 //DW0-DW4 575 uint32_t Reserved1[5]; 576 577 // DW5 578 union 579 { 580 struct 581 { 582 uint32_t NextFrameWidth : MOS_BITFIELD_RANGE(0, 15); 583 uint32_t NextFrameHeight : MOS_BITFIELD_RANGE(16, 31); 584 }; 585 struct 586 { 587 uint32_t Value; 588 }; 589 } DW5; 590 591 // DW6, DW7 592 uint32_t Reserved2[2]; 593 }; 594 595 //! 596 //! \struct DysBindingTable 597 //! \brief Dys binding table 598 //! 599 struct DysBindingTable 600 { 601 uint32_t dysInputFrameNv12 = 0; 602 uint32_t dysOutputFrameY = 1; 603 uint32_t dysOutputFrameUV = 2; 604 }; 605 606 //! 607 //! \struct DysSurfaceParams 608 //! \brief Dys surface data 609 //! 610 struct DysSurfaceParams 611 { 612 PMOS_SURFACE inputFrameSurface; 613 PMOS_SURFACE outputFrameSurface; 614 uint32_t verticalLineStride; 615 uint32_t verticalLineStrideOffset; 616 DysBindingTable* dysBindingTable; 617 PMHW_KERNEL_STATE kernelState; 618 }; 619 620 //! 621 //! \struct DysStaticData 622 //! \brief Dys static data 623 //! 624 struct DysStaticData 625 { 626 // DW0 627 union 628 { 629 struct 630 { 631 uint32_t InputFrameWidth : MOS_BITFIELD_RANGE(0, 15); 632 uint32_t InputFrameHeight : MOS_BITFIELD_RANGE(16, 31); 633 }; 634 struct 635 { 636 uint32_t Value; 637 }; 638 } DW0; 639 640 // DW1 641 union 642 { 643 struct 644 { 645 uint32_t OutputFrameWidth : MOS_BITFIELD_RANGE(0, 15); 646 uint32_t OutputFrameHeight : MOS_BITFIELD_RANGE(16, 31); 647 }; 648 struct 649 { 650 uint32_t Value; 651 }; 652 } DW1; 653 654 // DW2 655 union 656 { 657 struct 658 { 659 float DeltaU; 660 }; 661 662 uint32_t Value; 663 } DW2; 664 665 // DW3 666 union 667 { 668 struct 669 { 670 float DeltaV; 671 }; 672 673 uint32_t Value; 674 } DW3; 675 676 // DW4 - DW15 677 uint32_t Reserved[12]; 678 679 // DW16 680 union 681 { 682 struct 683 { 684 uint32_t InputFrameNV12SurfBTI : MOS_BITFIELD_RANGE(0, 31); 685 }; 686 struct 687 { 688 uint32_t Value; 689 }; 690 } DW16; 691 692 // DW17 693 union 694 { 695 struct 696 { 697 uint32_t OutputFrameYSurfBTI : MOS_BITFIELD_RANGE(0, 31); 698 }; 699 struct 700 { 701 uint32_t Value; 702 }; 703 } DW17; 704 705 // DW18 706 union 707 { 708 struct 709 { 710 uint32_t AVSSampleIdx : MOS_BITFIELD_RANGE(0, 31); 711 }; 712 struct 713 { 714 uint32_t Value; 715 }; 716 } DW18; 717 }; 718 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(DysStaticData)) == 19); 719 720 typedef enum VP9BufferType 721 { 722 eVp9UnknownBuff = 0, 723 eVp9INLINE_DMEM, 724 eVp9HISTORY_BUFF, 725 eVp9VDENC_STATISTICS_BUFF, 726 eVp9PAK_STATISTICS_BUFF, 727 eVp9INPUT_SLBB_BUFF, 728 eVp9BRC_DATA_BUFF, 729 eVp9CONSTANT_DATA_BUFF, 730 eVp9OUTPUT_SLBB_BUFF, 731 eVp9PAKMMIO_BUFF, 732 eVp9AUX_BUFF 733 } VP9BufferType; 734 735 //! 736 //! \struct VdencVmeState 737 //! \brief Vdenc vme state 738 //! 739 struct VdencVmeState 740 { 741 PCODEC_REF_LIST pRefList[CODECHAL_NUM_UNCOMPRESSED_SURFACE_HEVC]; 742 CODEC_PIC_ID PicIdx[CODEC_MAX_NUM_REF_FRAME_HEVC]; 743 MOS_SURFACE s16xMeMvDataBuffer; 744 MOS_SURFACE s4xMeMvDataBuffer; 745 MOS_SURFACE s32xMeMvDataBuffer; 746 MOS_SURFACE s4xMeDistortionBuffer; 747 uint8_t Level; 748 uint16_t direct_spatial_mv_pred_flag; 749 uint32_t dwBiWeight; 750 bool bFirstFieldIdrPic; 751 bool bMbaff; 752 EncodeBrcBuffers BrcBuffer; 753 754 bool b16xMeInUse; 755 bool b4xMeInUse; 756 bool segmapProvided; 757 758 //Sequence Params 759 uint8_t TargetUsage; 760 uint8_t GopRefDist; 761 762 //Picture Params 763 CODEC_PICTURE CurrOriginalPic; 764 int8_t QpY; 765 766 //Slice Params 767 CODEC_PICTURE RefPicList[2][CODEC_MAX_NUM_REF_FRAME_HEVC]; 768 uint8_t num_ref_idx_l0_active_minus1; // [0..15] 769 uint8_t num_ref_idx_l1_active_minus1; // [0..15] 770 int8_t slice_qp_delta; 771 }; 772 773 //! 774 //! \struct VdencMeCurbe 775 //! \brief Vdenc Me curbe 776 //! 777 struct VdencMeCurbe 778 { 779 // DW0 780 union 781 { 782 struct 783 { 784 uint32_t SkipModeEn : MOS_BITFIELD_BIT( 0 ); 785 uint32_t AdaptiveEn : MOS_BITFIELD_BIT( 1 ); 786 uint32_t BiMixDis : MOS_BITFIELD_BIT( 2 ); 787 uint32_t : MOS_BITFIELD_RANGE( 3, 4 ); 788 uint32_t EarlyImeSuccessEn : MOS_BITFIELD_BIT( 5 ); 789 uint32_t : MOS_BITFIELD_BIT( 6 ); 790 uint32_t T8x8FlagForInterEn : MOS_BITFIELD_BIT( 7 ); 791 uint32_t : MOS_BITFIELD_RANGE( 8,23 ); 792 uint32_t EarlyImeStop : MOS_BITFIELD_RANGE( 24,31 ); 793 }; 794 struct 795 { 796 uint32_t Value; 797 }; 798 } DW0; 799 800 // DW1 801 union 802 { 803 struct 804 { 805 uint32_t MaxNumMVs : MOS_BITFIELD_RANGE( 0, 5 ); 806 uint32_t : MOS_BITFIELD_RANGE( 6,15 ); 807 uint32_t BiWeight : MOS_BITFIELD_RANGE( 16,21 ); 808 uint32_t : MOS_BITFIELD_RANGE( 22,27 ); 809 uint32_t UniMixDisable : MOS_BITFIELD_BIT( 28 ); 810 uint32_t : MOS_BITFIELD_RANGE( 29,31 ); 811 }; 812 struct 813 { 814 uint32_t Value; 815 }; 816 } DW1; 817 818 // DW2 819 union 820 { 821 struct 822 { 823 uint32_t MaxLenSP : MOS_BITFIELD_RANGE( 0, 7 ); 824 uint32_t MaxNumSU : MOS_BITFIELD_RANGE( 8, 15 ); 825 uint32_t : MOS_BITFIELD_RANGE( 16, 31); 826 }; 827 struct 828 { 829 uint32_t Value; 830 }; 831 } DW2; 832 833 // DW3 834 union 835 { 836 struct 837 { 838 uint32_t SrcSize : MOS_BITFIELD_RANGE( 0, 1 ); 839 uint32_t : MOS_BITFIELD_RANGE( 2, 3 ); 840 uint32_t MbTypeRemap : MOS_BITFIELD_RANGE( 4, 5 ); 841 uint32_t SrcAccess : MOS_BITFIELD_BIT( 6 ); 842 uint32_t RefAccess : MOS_BITFIELD_BIT( 7 ); 843 uint32_t SearchCtrl : MOS_BITFIELD_RANGE( 8,10 ); 844 uint32_t DualSearchPathOption : MOS_BITFIELD_BIT( 11 ); 845 uint32_t SubPelMode : MOS_BITFIELD_RANGE( 12,13 ); 846 uint32_t SkipType : MOS_BITFIELD_BIT( 14 ); 847 uint32_t DisableFieldCacheAlloc : MOS_BITFIELD_BIT( 15 ); 848 uint32_t InterChromaMode : MOS_BITFIELD_BIT( 16 ); 849 uint32_t FTEnable : MOS_BITFIELD_BIT( 17 ); 850 uint32_t BMEDisableFBR : MOS_BITFIELD_BIT( 18 ); 851 uint32_t BlockBasedSkipEnable : MOS_BITFIELD_BIT( 19 ); 852 uint32_t InterSAD : MOS_BITFIELD_RANGE( 20,21 ); 853 uint32_t IntraSAD : MOS_BITFIELD_RANGE( 22,23 ); 854 uint32_t SubMbPartMask : MOS_BITFIELD_RANGE( 24,30 ); 855 uint32_t : MOS_BITFIELD_BIT( 31 ); 856 }; 857 struct 858 { 859 uint32_t Value; 860 }; 861 } DW3; 862 863 // DW4 864 union 865 { 866 struct 867 { 868 uint32_t : MOS_BITFIELD_RANGE(0, 7); 869 uint32_t PictureHeightMinus1 : MOS_BITFIELD_RANGE(8, 15); 870 uint32_t PictureWidth : MOS_BITFIELD_RANGE(16, 23); 871 uint32_t : MOS_BITFIELD_RANGE(24, 31); 872 }; 873 struct 874 { 875 uint32_t Value; 876 }; 877 } DW4; 878 879 // DW5 880 union 881 { 882 struct 883 { 884 uint32_t : MOS_BITFIELD_RANGE(0, 7); 885 uint32_t QpPrimeY : MOS_BITFIELD_RANGE(8, 15); 886 uint32_t RefWidth : MOS_BITFIELD_RANGE( 16,23 ); 887 uint32_t RefHeight : MOS_BITFIELD_RANGE( 24,31 ); 888 }; 889 struct 890 { 891 uint32_t Value; 892 }; 893 } DW5; 894 895 // DW6 896 union 897 { 898 struct 899 { 900 uint32_t : MOS_BITFIELD_BIT(0); 901 uint32_t InputStreamInEn : MOS_BITFIELD_BIT(1); 902 uint32_t LCUSize : MOS_BITFIELD_BIT(2); 903 uint32_t WriteDistortions : MOS_BITFIELD_BIT(3); 904 uint32_t UseMvFromPrevStep : MOS_BITFIELD_BIT(4); 905 uint32_t : MOS_BITFIELD_RANGE(5, 7); 906 uint32_t SuperCombineDist : MOS_BITFIELD_RANGE(8, 15); 907 uint32_t MaxVmvR : MOS_BITFIELD_RANGE(16, 31); 908 }; 909 struct 910 { 911 uint32_t Value; 912 }; 913 } DW6; 914 915 // DW7 916 union 917 { 918 struct 919 { 920 uint32_t : MOS_BITFIELD_RANGE(0, 15); 921 uint32_t MVCostScaleFactor : MOS_BITFIELD_RANGE( 16,17 ); 922 uint32_t BilinearEnable : MOS_BITFIELD_BIT( 18 ); 923 uint32_t SrcFieldPolarity : MOS_BITFIELD_BIT( 19 ); 924 uint32_t WeightedSADHAAR : MOS_BITFIELD_BIT( 20 ); 925 uint32_t AConlyHAAR : MOS_BITFIELD_BIT( 21 ); 926 uint32_t RefIDCostMode : MOS_BITFIELD_BIT( 22 ); 927 uint32_t : MOS_BITFIELD_BIT( 23 ); 928 uint32_t SkipCenterMask : MOS_BITFIELD_RANGE( 24,31 ); 929 }; 930 struct 931 { 932 uint32_t Value; 933 }; 934 } DW7; 935 936 // DW8 937 union 938 { 939 struct 940 { 941 uint32_t Mode0Cost : MOS_BITFIELD_RANGE( 0, 7 ); 942 uint32_t Mode1Cost : MOS_BITFIELD_RANGE( 8,15 ); 943 uint32_t Mode2Cost : MOS_BITFIELD_RANGE( 16,23 ); 944 uint32_t Mode3Cost : MOS_BITFIELD_RANGE( 24,31 ); 945 }; 946 struct 947 { 948 uint32_t Value; 949 }; 950 } DW8; 951 952 // DW9 953 union 954 { 955 struct 956 { 957 uint32_t Mode4Cost : MOS_BITFIELD_RANGE( 0, 7 ); 958 uint32_t Mode5Cost : MOS_BITFIELD_RANGE( 8,15 ); 959 uint32_t Mode6Cost : MOS_BITFIELD_RANGE( 16,23 ); 960 uint32_t Mode7Cost : MOS_BITFIELD_RANGE( 24,31 ); 961 }; 962 struct 963 { 964 uint32_t Value; 965 }; 966 } DW9; 967 968 // DW10 969 union 970 { 971 struct 972 { 973 uint32_t Mode8Cost : MOS_BITFIELD_RANGE( 0, 7 ); 974 uint32_t Mode9Cost : MOS_BITFIELD_RANGE( 8,15 ); 975 uint32_t RefIDCost : MOS_BITFIELD_RANGE( 16,23 ); 976 uint32_t ChromaIntraModeCost : MOS_BITFIELD_RANGE( 24,31 ); 977 }; 978 struct 979 { 980 uint32_t Value; 981 }; 982 } DW10; 983 984 // DW11 985 union 986 { 987 struct 988 { 989 uint32_t MV0Cost : MOS_BITFIELD_RANGE( 0, 7 ); 990 uint32_t MV1Cost : MOS_BITFIELD_RANGE( 8,15 ); 991 uint32_t MV2Cost : MOS_BITFIELD_RANGE( 16,23 ); 992 uint32_t MV3Cost : MOS_BITFIELD_RANGE( 24,31 ); 993 }; 994 struct 995 { 996 uint32_t Value; 997 }; 998 } DW11; 999 1000 // DW12 1001 union 1002 { 1003 struct 1004 { 1005 uint32_t MV4Cost : MOS_BITFIELD_RANGE( 0, 7 ); 1006 uint32_t MV5Cost : MOS_BITFIELD_RANGE( 8,15 ); 1007 uint32_t MV6Cost : MOS_BITFIELD_RANGE( 16,23 ); 1008 uint32_t MV7Cost : MOS_BITFIELD_RANGE( 24,31 ); 1009 }; 1010 struct 1011 { 1012 uint32_t Value; 1013 }; 1014 } DW12; 1015 1016 // DW13 1017 union 1018 { 1019 struct 1020 { 1021 uint32_t NumRefIdxL0MinusOne : MOS_BITFIELD_RANGE(0, 7); 1022 uint32_t NumRefIdxL1MinusOne : MOS_BITFIELD_RANGE(8, 15); 1023 uint32_t RefStreaminCost : MOS_BITFIELD_RANGE(16, 23); 1024 uint32_t ROIEnable : MOS_BITFIELD_RANGE(24, 26); 1025 uint32_t : MOS_BITFIELD_RANGE(27, 31); 1026 }; 1027 struct 1028 { 1029 uint32_t Value; 1030 }; 1031 } DW13; 1032 1033 // DW14 1034 union 1035 { 1036 struct 1037 { 1038 uint32_t List0RefID0FieldParity : MOS_BITFIELD_BIT(0); 1039 uint32_t List0RefID1FieldParity : MOS_BITFIELD_BIT(1); 1040 uint32_t List0RefID2FieldParity : MOS_BITFIELD_BIT(2); 1041 uint32_t List0RefID3FieldParity : MOS_BITFIELD_BIT(3); 1042 uint32_t List0RefID4FieldParity : MOS_BITFIELD_BIT(4); 1043 uint32_t List0RefID5FieldParity : MOS_BITFIELD_BIT(5); 1044 uint32_t List0RefID6FieldParity : MOS_BITFIELD_BIT(6); 1045 uint32_t List0RefID7FieldParity : MOS_BITFIELD_BIT(7); 1046 uint32_t List1RefID0FieldParity : MOS_BITFIELD_BIT(8); 1047 uint32_t List1RefID1FieldParity : MOS_BITFIELD_BIT(9); 1048 uint32_t : MOS_BITFIELD_RANGE(10, 31); 1049 }; 1050 struct 1051 { 1052 uint32_t Value; 1053 }; 1054 } DW14; 1055 1056 // DW15 1057 union 1058 { 1059 struct 1060 { 1061 uint32_t PrevMvReadPosFactor : MOS_BITFIELD_RANGE(0, 7); 1062 uint32_t MvShiftFactor : MOS_BITFIELD_RANGE(8, 15); 1063 uint32_t Reserved : MOS_BITFIELD_RANGE(16, 31); 1064 }; 1065 struct 1066 { 1067 uint32_t Value; 1068 }; 1069 } DW15; 1070 1071 struct 1072 { 1073 // DW16 1074 union 1075 { 1076 struct 1077 { 1078 SearchPathDelta SPDelta_0; 1079 SearchPathDelta SPDelta_1; 1080 SearchPathDelta SPDelta_2; 1081 SearchPathDelta SPDelta_3; 1082 }; 1083 struct 1084 { 1085 uint32_t Value; 1086 }; 1087 } DW16; 1088 1089 // DW17 1090 union 1091 { 1092 struct 1093 { 1094 SearchPathDelta SPDelta_4; 1095 SearchPathDelta SPDelta_5; 1096 SearchPathDelta SPDelta_6; 1097 SearchPathDelta SPDelta_7; 1098 }; 1099 struct 1100 { 1101 uint32_t Value; 1102 }; 1103 } DW17; 1104 1105 // DW18 1106 union 1107 { 1108 struct 1109 { 1110 SearchPathDelta SPDelta_8; 1111 SearchPathDelta SPDelta_9; 1112 SearchPathDelta SPDelta_10; 1113 SearchPathDelta SPDelta_11; 1114 }; 1115 struct 1116 { 1117 uint32_t Value; 1118 }; 1119 } DW18; 1120 1121 // DW19 1122 union 1123 { 1124 struct 1125 { 1126 SearchPathDelta SPDelta_12; 1127 SearchPathDelta SPDelta_13; 1128 SearchPathDelta SPDelta_14; 1129 SearchPathDelta SPDelta_15; 1130 }; 1131 struct 1132 { 1133 uint32_t Value; 1134 }; 1135 } DW19; 1136 1137 // DW20 1138 union 1139 { 1140 struct 1141 { 1142 SearchPathDelta SPDelta_16; 1143 SearchPathDelta SPDelta_17; 1144 SearchPathDelta SPDelta_18; 1145 SearchPathDelta SPDelta_19; 1146 }; 1147 struct 1148 { 1149 uint32_t Value; 1150 }; 1151 } DW20; 1152 1153 // DW21 1154 union 1155 { 1156 struct 1157 { 1158 SearchPathDelta SPDelta_20; 1159 SearchPathDelta SPDelta_21; 1160 SearchPathDelta SPDelta_22; 1161 SearchPathDelta SPDelta_23; 1162 }; 1163 struct 1164 { 1165 uint32_t Value; 1166 }; 1167 } DW21; 1168 1169 // DW22 1170 union 1171 { 1172 struct 1173 { 1174 SearchPathDelta SPDelta_24; 1175 SearchPathDelta SPDelta_25; 1176 SearchPathDelta SPDelta_26; 1177 SearchPathDelta SPDelta_27; 1178 }; 1179 struct 1180 { 1181 uint32_t Value; 1182 }; 1183 } DW22; 1184 1185 // DW23 1186 union 1187 { 1188 struct 1189 { 1190 SearchPathDelta SPDelta_28; 1191 SearchPathDelta SPDelta_29; 1192 SearchPathDelta SPDelta_30; 1193 SearchPathDelta SPDelta_31; 1194 }; 1195 struct 1196 { 1197 uint32_t Value; 1198 }; 1199 } DW23; 1200 1201 // DW24 1202 union 1203 { 1204 struct 1205 { 1206 SearchPathDelta SPDelta_32; 1207 SearchPathDelta SPDelta_33; 1208 SearchPathDelta SPDelta_34; 1209 SearchPathDelta SPDelta_35; 1210 }; 1211 struct 1212 { 1213 uint32_t Value; 1214 }; 1215 } DW24; 1216 1217 // DW25 1218 union 1219 { 1220 struct 1221 { 1222 SearchPathDelta SPDelta_36; 1223 SearchPathDelta SPDelta_37; 1224 SearchPathDelta SPDelta_38; 1225 SearchPathDelta SPDelta_39; 1226 }; 1227 struct 1228 { 1229 uint32_t Value; 1230 }; 1231 } DW25; 1232 1233 // DW26 1234 union 1235 { 1236 struct 1237 { 1238 SearchPathDelta SPDelta_40; 1239 SearchPathDelta SPDelta_41; 1240 SearchPathDelta SPDelta_42; 1241 SearchPathDelta SPDelta_43; 1242 }; 1243 struct 1244 { 1245 uint32_t Value; 1246 }; 1247 } DW26; 1248 1249 // DW27 1250 union 1251 { 1252 struct 1253 { 1254 SearchPathDelta SPDelta_44; 1255 SearchPathDelta SPDelta_45; 1256 SearchPathDelta SPDelta_46; 1257 SearchPathDelta SPDelta_47; 1258 }; 1259 struct 1260 { 1261 uint32_t Value; 1262 }; 1263 } DW27; 1264 1265 // DW28 1266 union 1267 { 1268 struct 1269 { 1270 SearchPathDelta SPDelta_48; 1271 SearchPathDelta SPDelta_49; 1272 SearchPathDelta SPDelta_50; 1273 SearchPathDelta SPDelta_51; 1274 }; 1275 struct 1276 { 1277 uint32_t Value; 1278 }; 1279 } DW28; 1280 1281 // DW29 1282 union 1283 { 1284 struct 1285 { 1286 SearchPathDelta SPDelta_52; 1287 SearchPathDelta SPDelta_53; 1288 SearchPathDelta SPDelta_54; 1289 SearchPathDelta SPDelta_55; 1290 }; 1291 struct 1292 { 1293 uint32_t Value; 1294 }; 1295 } DW29; 1296 } SPDelta; 1297 1298 // DW30 1299 union 1300 { 1301 struct 1302 { 1303 uint32_t ActualMBWidth : MOS_BITFIELD_RANGE(0, 15); 1304 uint32_t ActualMBHeight : MOS_BITFIELD_RANGE(16, 31); 1305 }; 1306 struct 1307 { 1308 uint32_t Value; 1309 }; 1310 } DW30; 1311 1312 // DW31 1313 union 1314 { 1315 struct 1316 { 1317 uint32_t RoiCtrl : MOS_BITFIELD_RANGE( 0, 7 ); 1318 uint32_t MaxTuSize : MOS_BITFIELD_RANGE( 8, 9 ); 1319 uint32_t MaxCuSize : MOS_BITFIELD_RANGE( 10, 11 ); 1320 uint32_t NumImePredictors : MOS_BITFIELD_RANGE( 12, 15 ); 1321 uint32_t Reserved : MOS_BITFIELD_RANGE( 16, 23 ); 1322 uint32_t PuTypeCtrl : MOS_BITFIELD_RANGE( 24, 31 ); 1323 }; 1324 struct 1325 { 1326 uint32_t Value; 1327 }; 1328 } DW31; 1329 1330 // DW32 1331 union 1332 { 1333 struct 1334 { 1335 uint32_t ForceMvx0 : MOS_BITFIELD_RANGE(0, 15); 1336 uint32_t ForceMvy0 : MOS_BITFIELD_RANGE(16, 31); 1337 }; 1338 struct 1339 { 1340 uint32_t Value; 1341 }; 1342 } DW32; 1343 1344 // DW33 1345 union 1346 { 1347 struct 1348 { 1349 uint32_t ForceMvx1 : MOS_BITFIELD_RANGE(0, 15); 1350 uint32_t ForceMvy1 : MOS_BITFIELD_RANGE(16, 31); 1351 }; 1352 struct 1353 { 1354 uint32_t Value; 1355 }; 1356 } DW33; 1357 1358 // DW34 1359 union 1360 { 1361 struct 1362 { 1363 uint32_t ForceMvx2 : MOS_BITFIELD_RANGE(0, 15); 1364 uint32_t ForceMvy2 : MOS_BITFIELD_RANGE(16, 31); 1365 }; 1366 struct 1367 { 1368 uint32_t Value; 1369 }; 1370 } DW34; 1371 1372 // DW35 1373 union 1374 { 1375 struct 1376 { 1377 uint32_t ForceMvx3 : MOS_BITFIELD_RANGE(0, 15); 1378 uint32_t ForceMvy3 : MOS_BITFIELD_RANGE(16, 31); 1379 }; 1380 struct 1381 { 1382 uint32_t Value; 1383 }; 1384 } DW35; 1385 1386 // DW36 1387 union 1388 { 1389 struct 1390 { 1391 uint32_t ForceRefIdx0 : MOS_BITFIELD_RANGE(0, 3); 1392 uint32_t ForceRefIdx1 : MOS_BITFIELD_RANGE(4, 7); 1393 uint32_t ForceRefIdx2 : MOS_BITFIELD_RANGE(8, 11); 1394 uint32_t ForceRefIdx3 : MOS_BITFIELD_RANGE(12, 15); 1395 uint32_t NumMergeCandCu8x8 : MOS_BITFIELD_RANGE(16, 19); 1396 uint32_t NumMergeCandCu16x16 : MOS_BITFIELD_RANGE(20, 23); 1397 uint32_t NumMergeCandCu32x32 : MOS_BITFIELD_RANGE(24, 27); 1398 uint32_t NumMergeCandCu64x64 : MOS_BITFIELD_RANGE(28, 31); 1399 }; 1400 struct 1401 { 1402 uint32_t Value; 1403 }; 1404 } DW36; 1405 1406 // DW37 1407 union 1408 { 1409 struct 1410 { 1411 uint32_t SegID : MOS_BITFIELD_RANGE(0, 15); 1412 uint32_t QpEnable : MOS_BITFIELD_RANGE(16, 19); 1413 uint32_t SegIDEnable : MOS_BITFIELD_BIT(20); 1414 uint32_t Reserved : MOS_BITFIELD_RANGE(21, 22); 1415 uint32_t ForceRefIdEnable : MOS_BITFIELD_BIT(23); 1416 uint32_t Reserved1 : MOS_BITFIELD_RANGE(24, 31); 1417 }; 1418 struct 1419 { 1420 uint32_t Value; 1421 }; 1422 } DW37; 1423 1424 // DW38 1425 union 1426 { 1427 struct 1428 { 1429 uint32_t ForceQp0 : MOS_BITFIELD_RANGE(0, 7); 1430 uint32_t ForceQp1 : MOS_BITFIELD_RANGE(8, 15); 1431 uint32_t ForceQp2 : MOS_BITFIELD_RANGE(16, 23); 1432 uint32_t ForceQp3 : MOS_BITFIELD_RANGE(24, 31); 1433 }; 1434 struct 1435 { 1436 uint32_t Value; 1437 }; 1438 } DW38; 1439 1440 // DW39 1441 union 1442 { 1443 struct 1444 { 1445 uint32_t Reserved : MOS_BITFIELD_RANGE(0, 31); 1446 }; 1447 struct 1448 { 1449 uint32_t Value; 1450 }; 1451 } DW39; 1452 1453 // DW40 1454 union 1455 { 1456 struct 1457 { 1458 uint32_t _4xMeMvOutputDataSurfIndex : MOS_BITFIELD_RANGE(0, 31); 1459 }; 1460 struct 1461 { 1462 uint32_t Value; 1463 }; 1464 } DW40; 1465 1466 // DW41 1467 union 1468 { 1469 struct 1470 { 1471 uint32_t _16xOr32xMeMvInputDataSurfIndex : MOS_BITFIELD_RANGE(0, 31); 1472 }; 1473 struct 1474 { 1475 uint32_t Value; 1476 }; 1477 } DW41; 1478 1479 // DW42 1480 union 1481 { 1482 struct 1483 { 1484 uint32_t _4xMeOutputDistSurfIndex : MOS_BITFIELD_RANGE(0, 31); 1485 }; 1486 struct 1487 { 1488 uint32_t Value; 1489 }; 1490 } DW42; 1491 1492 // DW43 1493 union 1494 { 1495 struct 1496 { 1497 uint32_t _4xMeOutputBrcDistSurfIndex : MOS_BITFIELD_RANGE(0, 31); 1498 }; 1499 struct 1500 { 1501 uint32_t Value; 1502 }; 1503 } DW43; 1504 1505 // DW44 1506 union 1507 { 1508 struct 1509 { 1510 uint32_t VMEFwdInterPredictionSurfIndex : MOS_BITFIELD_RANGE(0, 31); 1511 }; 1512 struct 1513 { 1514 uint32_t Value; 1515 }; 1516 } DW44; 1517 1518 // DW45 1519 union 1520 { 1521 struct 1522 { 1523 uint32_t VMEBwdInterPredictionSurfIndex : MOS_BITFIELD_RANGE(0, 31); 1524 }; 1525 struct 1526 { 1527 uint32_t Value; 1528 }; 1529 } DW45; 1530 1531 // DW46 1532 union 1533 { 1534 struct 1535 { 1536 uint32_t VDEncStreamInOutputSurfIndex : MOS_BITFIELD_RANGE(0, 31); 1537 }; 1538 struct 1539 { 1540 uint32_t Value; 1541 }; 1542 } DW46; 1543 1544 // DW47 1545 union 1546 { 1547 struct 1548 { 1549 uint32_t VDEncStreamInInputSurfIndex : MOS_BITFIELD_RANGE(0, 31); 1550 }; 1551 struct 1552 { 1553 uint32_t Value; 1554 }; 1555 } DW47; 1556 }; 1557 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(VdencMeCurbe)) == 48); 1558 1559 /* BinIdx for compressed header generation for PAK */ 1560 /* The first value indicates previous SE index and second value indicates the size of the previous SE*/ 1561 static constexpr uint32_t PAK_TX_MODE_IDX = 0; //idx=0 1562 static constexpr uint32_t PAK_TX_MODE_SELECT_IDX = (PAK_TX_MODE_IDX + 2); //idx=2 1563 static constexpr uint32_t PAK_TX_8x8_PROB_IDX = (PAK_TX_MODE_SELECT_IDX + 1); //idx=3 1564 static constexpr uint32_t PAK_TX_16x16_PROB_IDX = (PAK_TX_8x8_PROB_IDX + 4); //idx=7 1565 static constexpr uint32_t PAK_TX_32x32_PROB_IDX = (PAK_TX_16x16_PROB_IDX + 8); //idx=15 1566 static constexpr uint32_t PAK_TX_4x4_COEFF_PROB_IDX = (PAK_TX_32x32_PROB_IDX + 12); //idx=27 1567 static constexpr uint32_t PAK_TX_8x8_COEFF_PROB_IDX = (PAK_TX_4x4_COEFF_PROB_IDX + 793); //idx=820 1568 static constexpr uint32_t PAK_TX_16x16_COEFF_PROB_IDX = (PAK_TX_8x8_COEFF_PROB_IDX + 793); //idx=1613 1569 static constexpr uint32_t PAK_TX_32x32_COEFF_PROB_IDX = (PAK_TX_16x16_COEFF_PROB_IDX + 793); //idx=2406 1570 static constexpr uint32_t PAK_SKIP_CONTEXT_IDX = (PAK_TX_32x32_COEFF_PROB_IDX + 793); //idx=3199 1571 static constexpr uint32_t PAK_INTER_MODE_CTX_IDX = (PAK_SKIP_CONTEXT_IDX + 6); //idx=3205 1572 static constexpr uint32_t PAK_SWITCHABLE_FILTER_CTX_IDX = (PAK_INTER_MODE_CTX_IDX + 42); //idx=3247 1573 static constexpr uint32_t PAK_INTRA_INTER_CTX_IDX = (PAK_SWITCHABLE_FILTER_CTX_IDX + 16); //idx=3263 1574 static constexpr uint32_t PAK_COMPOUND_PRED_MODE_IDX = (PAK_INTRA_INTER_CTX_IDX + 8); //idx=3271 1575 static constexpr uint32_t PAK_HYBRID_PRED_CTX_IDX = (PAK_COMPOUND_PRED_MODE_IDX + 2); //idx=3273 1576 static constexpr uint32_t PAK_SINGLE_REF_PRED_CTX_IDX = (PAK_HYBRID_PRED_CTX_IDX + 10); //idx=3283 1577 static constexpr uint32_t PAK_CMPUND_PRED_CTX_IDX = (PAK_SINGLE_REF_PRED_CTX_IDX + 20); //idx=3303 1578 static constexpr uint32_t PAK_INTRA_MODE_PROB_CTX_IDX = (PAK_CMPUND_PRED_CTX_IDX + 10); //idx=3313 1579 static constexpr uint32_t PAK_PARTITION_PROB_IDX = (PAK_INTRA_MODE_PROB_CTX_IDX + 72); //idx=3385 1580 static constexpr uint32_t PAK_MVJOINTS_PROB_IDX = (PAK_PARTITION_PROB_IDX + 96); //idx=3481 1581 static constexpr uint32_t PAK_MVCOMP0_IDX = (PAK_MVJOINTS_PROB_IDX + 24); //idx=3505 1582 static constexpr uint32_t PAK_MVCOMP1_IDX = (PAK_MVCOMP0_IDX + 176); //idx=3681 1583 static constexpr uint32_t PAK_MVFRAC_COMP0_IDX = (PAK_MVCOMP1_IDX + 176); //idx=3857 1584 static constexpr uint32_t PAK_MVFRAC_COMP1_IDX = (PAK_MVFRAC_COMP0_IDX + 72); //idx=3929 1585 static constexpr uint32_t PAK_MVHP_COMP0_IDX = (PAK_MVFRAC_COMP1_IDX + 72); //idx=4001 1586 static constexpr uint32_t PAK_MVHP_COMP1_IDX = (PAK_MVHP_COMP0_IDX + 16); //idx=4017 1587 static constexpr uint32_t PAK_COMPRESSED_HDR_SYNTAX_ELEMS = (PAK_MVHP_COMP1_IDX + 16); //=4033 1588 1589 static constexpr uint32_t m_dysStaticDataSize = sizeof(DysStaticData); 1590 1591 static constexpr uint32_t m_brcMaxNumPasses = 3; 1592 static constexpr uint32_t m_numUncompressedSurface = 128; 1593 static constexpr uint32_t m_brcConstantSurfaceSize = 1664; 1594 static constexpr uint32_t m_segmentStateBlockSize = 32; 1595 static constexpr uint32_t m_probabilityCounterBufferSize = 193 * CODECHAL_CACHELINE_SIZE; 1596 1597 static constexpr float m_devStdFps = 30.0; 1598 static constexpr float m_bpsRatioLow = 0.1f; 1599 static constexpr float m_bpsRatioHigh = 3.5; 1600 static constexpr int32_t m_numInstRateThresholds = 4; 1601 static constexpr int32_t m_numDevThresholds = 8; 1602 static constexpr int32_t m_posMultPb = 50; 1603 static constexpr int32_t m_negMultPb = -50; 1604 static constexpr int32_t m_posMultVbr = 100; 1605 static constexpr int32_t m_negMultVbr = -50; 1606 1607 static constexpr uint32_t m_maxMvLen = 511; 1608 1609 static constexpr int8_t m_instRateThresholdI[m_numInstRateThresholds] = { 30, 50, 90, 115 }; 1610 static constexpr int8_t m_instRateThresholdP[m_numInstRateThresholds] = { 30, 50, 70, 120 }; 1611 static constexpr double m_devThresholdFpNegI[m_numDevThresholds / 2] = { 0.80, 0.60, 0.34, 0.2 }; 1612 static constexpr double m_devThresholdFpPosI[m_numDevThresholds / 2] = { 0.2, 0.4, 0.66, 0.9 }; 1613 static constexpr double m_devThresholdFpNegPB[m_numDevThresholds / 2] = { 0.90, 0.66, 0.46, 0.3 }; 1614 static constexpr double m_devThresholdFpPosPB[m_numDevThresholds / 2] = { 0.3, 0.46, 0.70, 0.90 }; 1615 static constexpr double m_devThresholdVbrNeg[m_numDevThresholds / 2] = { 0.90, 0.70, 0.50, 0.3 }; 1616 static constexpr double m_devThresholdVbrPos[m_numDevThresholds / 2] = { 0.4, 0.5, 0.75, 0.90 }; 1617 1618 static constexpr uint32_t m_vdboxHucVp9VdencBrcInitKernelDescriptor = 11; //!< VDBox Huc VDEnc Brc init kernel descriptor 1619 static constexpr uint32_t m_vdboxHucVp9VdencBrcUpdateKernelDescriptor = 12; //!< VDBox Huc VDEnc Brc init kernel descriptor 1620 static constexpr uint32_t m_vdboxHucVp9VdencProbKernelDescriptor = 13; //!< VDBox Huc VDEnc prob kernel descriptor 1621 static constexpr uint32_t m_vdboxHucPakIntegrationKernelDescriptor = 15; //!< VDBox Huc PAK integration kernel descriptor 1622 1623 static const uint32_t m_vdencMeCurbeInit[48]; 1624 static const uint32_t m_brcInitDmem[48]; 1625 static const uint32_t m_brcUpdateDmem[64]; 1626 static const uint32_t m_probDmem[320]; 1627 static const uint32_t m_brcConstData[2][416]; 1628 static const uint32_t m_samplerFilterCoeffs[32][6]; 1629 1630 static const uint32_t m_dysNumSurfaces = 3; 1631 1632 static constexpr uint16_t m_cmd1Size = 120; 1633 static constexpr uint16_t m_cmd2Size = 148; 1634 1635 // Parameters passed from application 1636 PCODEC_VP9_ENCODE_SEQUENCE_PARAMS m_vp9SeqParams = nullptr; //!< Pointer to sequence parameters 1637 PCODEC_VP9_ENCODE_PIC_PARAMS m_vp9PicParams = nullptr; //!< Pointer to picture parameters 1638 PCODEC_VP9_ENCODE_SEGMENT_PARAMS m_vp9SegmentParams = nullptr; //!< Pointer to segment parameters 1639 1640 CODEC_PIC_ID m_picIdx[CODEC_VP9_NUM_REF_FRAMES]; 1641 PCODEC_REF_LIST m_refList[m_numUncompressedSurface]; 1642 PCODECHAL_NAL_UNIT_PARAMS* m_nalUnitParams = nullptr; 1643 uint32_t m_numNalUnit = 0; 1644 1645 uint32_t m_maxPicWidth = 0; 1646 uint32_t m_maxPicHeight = 0; 1647 uint32_t m_picWidthInSb = 0; 1648 uint32_t m_picHeightInSb = 0; 1649 uint32_t m_picSizeInSb = 0; 1650 1651 uint8_t m_txMode = 0; 1652 bool m_hmeEnabled = false; 1653 bool m_16xMeEnabled = false; 1654 bool m_brcEnabled = false; 1655 bool m_brcInit = false; 1656 bool m_brcReset = false; 1657 bool m_advancedDshInUse = false; 1658 bool m_mbBrcEnabled = false; 1659 bool m_waitForEnc = false; 1660 bool m_adaptiveRepakSupported = false; 1661 bool m_tsEnabled = false; 1662 bool m_superFrameHucPass = false; 1663 bool m_storeSingleTaskPhaseSupported = false; //For dynamic scaling, need to save the original state 1664 uint8_t m_refFrameFlags = 0; 1665 uint8_t m_numRefFrames = 0; 1666 uint8_t m_dysRefFrameFlags = 0; 1667 uint8_t m_dysCurrFrameFlag = 0; 1668 uint32_t m_vdencPicStateSecondLevelBatchBufferSize = 0; 1669 1670 MOS_RESOURCE m_resDeblockingFilterLineBuffer; 1671 MOS_RESOURCE m_resDeblockingFilterTileLineBuffer; 1672 MOS_RESOURCE m_resDeblockingFilterTileColumnBuffer; 1673 MOS_RESOURCE m_resMetadataLineBuffer; 1674 MOS_RESOURCE m_resMetadataTileLineBuffer; 1675 MOS_RESOURCE m_resMetadataTileColumnBuffer; 1676 MOS_RESOURCE m_resProbBuffer[CODEC_VP9_NUM_CONTEXTS]; 1677 MOS_RESOURCE m_resSegmentIdBuffer; 1678 MOS_RESOURCE m_resHvcLineRowstoreBuffer; // Handle of HVC Line Row Store surface 1679 MOS_RESOURCE m_resHvcTileRowstoreBuffer; // Handle of HVC Tile Row Store surface 1680 MOS_RESOURCE m_resProbabilityDeltaBuffer; 1681 MOS_RESOURCE m_resTileRecordStrmOutBuffer; 1682 MOS_RESOURCE m_resCuStatsStrmOutBuffer; 1683 MOS_RESOURCE m_resCompressedHeaderBuffer; 1684 MOS_RESOURCE m_resProbabilityCounterBuffer; 1685 MOS_RESOURCE m_resModeDecision[2]; 1686 MOS_RESOURCE m_resFrameStatStreamOutBuffer; 1687 MOS_RESOURCE m_resSseSrcPixelRowStoreBuffer; 1688 1689 bool m_clearAllToKey[CODEC_VP9_NUM_CONTEXTS] = { false }; 1690 bool m_isPreCtx0InterProbSaved = false; 1691 uint8_t m_preCtx0InterProbSaved[CODECHAL_VP9_INTER_PROB_SIZE] = { 0 }; 1692 1693 HucPrevFrameInfo m_prevFrameInfo; 1694 1695 uint8_t m_contextFrameTypes[CODEC_VP9_NUM_CONTEXTS] = { 0 }; 1696 uint8_t m_currMvTemporalBufferIndex = 0; 1697 1698 bool m_hucEnabled = false; 1699 bool m_segmentMapAllocated = false; 1700 MOS_RESOURCE m_resHucProbDmemBuffer[3][CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; 1701 MOS_RESOURCE m_resHucDefaultProbBuffer; 1702 MOS_RESOURCE m_resHucProbOutputBuffer; 1703 MOS_RESOURCE m_resHucPakInsertUncompressedHeaderReadBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; 1704 MOS_RESOURCE m_resHucPakInsertUncompressedHeaderWriteBuffer; 1705 MOS_RESOURCE m_resHucPakMmioBuffer; 1706 MOS_RESOURCE m_resHucDebugOutputBuffer; 1707 MOS_SURFACE m_mbSegmentMapSurface; 1708 MOS_SURFACE m_output16X16InterModes; 1709 1710 uint32_t m_rePakThreshold[CODEC_VP9_QINDEX_RANGE] = { 0 }; 1711 1712 // ME 1713 MOS_SURFACE m_4xMeMvDataBuffer; 1714 MOS_SURFACE m_16xMeMvDataBuffer; 1715 MOS_SURFACE m_4xMeDistortionBuffer; 1716 1717 // BRC 1718 HucBrcBuffers m_brcBuffers; 1719 1720 // DYS 1721 MHW_KERNEL_STATE m_dysKernelState; 1722 DysBindingTable m_dysBindingTable; 1723 uint32_t m_dysDshSize = 0; 1724 1725 // pointer to the reference surfaces 1726 PMOS_SURFACE m_lastRefPic = nullptr; 1727 PMOS_SURFACE m_goldenRefPic = nullptr; 1728 PMOS_SURFACE m_altRefPic = nullptr; 1729 1730 bool m_segmentMapProvided = false; 1731 bool m_dysVdencMultiPassEnabled = false; 1732 bool m_dysHucEnabled = false; 1733 bool m_dysCqp = false; 1734 bool m_dysBrc = false; 1735 bool m_vdencPakonlyMultipassEnabled = false; 1736 bool m_vdencPakObjCmdStreamOutEnabled = false; 1737 bool m_prevFrameSegEnabled = false; 1738 uint32_t m_vdencPictureState2ndLevelBatchBufferSize = 0; 1739 uint16_t m_sadQpLambda = 0; 1740 uint16_t m_rdQpLambda = 0; 1741 uint16_t m_hucPicStateOffset = 0; 1742 uint16_t m_hucSlbbSize = 0; 1743 uint8_t m_vdencMvCosts[12] = { 0 }; 1744 uint8_t m_vdencRdMvCosts[12] = { 0 }; 1745 uint8_t m_vdencHmeMvCosts[8] = { 0 }; 1746 uint8_t m_vdencModeCosts[CODEC_VDENC_NUM_MODE_COST] = { 0 }; 1747 uint32_t *m_mapBuffer = nullptr; 1748 uint32_t m_segStreamInHeight = 0; 1749 uint32_t m_segStreamInWidth = 0; 1750 double m_inputBitsPerFrame = 0.0; 1751 double m_curTargetFullness = 0.0; 1752 uint16_t m_slbbImgStateOffset = 0; 1753 uint32_t m_defaultPictureStatesSize = 0; 1754 uint32_t m_defaultPicturePatchListSize = 0; 1755 uint32_t m_defaultHucCmdsSize = 0; 1756 uint32_t m_defaultHucPatchListSize = 0; 1757 1758 MOS_RESOURCE m_resVdencIntraRowStoreScratchBuffer; // Handle of intra row store surface 1759 MOS_RESOURCE m_resVdencBrcStatsBuffer; 1760 MOS_RESOURCE m_resVdencSegmentMapStreamOut; 1761 MOS_RESOURCE m_resVdencPictureState2NdLevelBatchBufferRead[3][CODECHAL_VP9_ENCODE_RECYCLED_BUFFER_NUM]; 1762 MOS_RESOURCE m_resVdencPictureState2NdLevelBatchBufferWrite[CODECHAL_VP9_ENCODE_RECYCLED_BUFFER_NUM]; 1763 uint16_t m_vdencPictureState2ndLevelBBIndex = 0; 1764 MOS_RESOURCE m_resVdencDysPictureState2NdLevelBatchBuffer; 1765 MOS_RESOURCE m_resVdencBrcInitDmemBuffer; 1766 MOS_RESOURCE m_resVdencBrcUpdateDmemBuffer[3]; 1767 MOS_RESOURCE m_resVdencDataExtensionBuffer; 1768 CODECHAL_ENCODE_BUFFER m_resPakcuLevelStreamoutData; 1769 CODECHAL_ENCODE_BUFFER m_resPakSliceLevelStreamutData; 1770 1771 uint32_t m_maxTileNumber = 1; 1772 1773 uint32_t m_bitDepth = 0; 1774 uint8_t m_chromaFormat = 0; 1775 uint32_t m_sizeOfSseSrcPixelRowStoreBufferPerLcu = 0; 1776 PCODECHAL_CMD_INITIALIZER m_hucCmdInitializer = nullptr; 1777 1778 protected: 1779 //! 1780 //! \brief Constructor 1781 //! 1782 CodechalVdencVp9State(CodechalHwInterface* hwInterface, 1783 CodechalDebugInterface* debugInterface, 1784 PCODECHAL_STANDARD_INFO standardInfo); 1785 1786 //! 1787 //! \brief Set pipe buffer address parameter 1788 //! \details Set pipe buffer address parameter in MMC case 1789 //! 1790 //! \param [in,out] pipeBufAddrParams 1791 //! Pointer to PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS 1792 //! \param [in] refSurface 1793 //! Pointer to reference surfaces 1794 //! \param [in] cmdBuffer 1795 //! Pointer to MOS command buffer 1796 //! 1797 //! \return MOS_STATUS 1798 //! MOS_STATUS_SUCCESS if success, else fail reason 1799 //! 1800 virtual MOS_STATUS SetPipeBufAddr( 1801 PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS pipeBufAddrParams, 1802 PMOS_SURFACE refSurface[3], 1803 PMOS_COMMAND_BUFFER cmdBuffer); 1804 1805 public: 1806 //! 1807 //! \brief Destructor 1808 //! ~CodechalVdencVp9State()1809 virtual ~CodechalVdencVp9State() {}; 1810 GetCurrentPass()1811 virtual int GetCurrentPass() 1812 { 1813 return m_currPass; 1814 } 1815 GetNumPasses()1816 virtual int GetNumPasses() 1817 { 1818 return m_numPasses; 1819 } 1820 IsFirstPass()1821 virtual bool IsFirstPass() 1822 { 1823 return (m_currPass == 0) ? true : false; 1824 } 1825 IsLastPass()1826 virtual bool IsLastPass() 1827 { 1828 return (m_currPass == m_numPasses) ? true : false; 1829 } 1830 1831 //! 1832 //! \brief Perform platform capability check 1833 //! 1834 //! \return MOS_STATUS 1835 //! MOS_STATUS_SUCCESS if success, else fail reason 1836 //! PlatformCapabilityCheck()1837 virtual MOS_STATUS PlatformCapabilityCheck() 1838 { 1839 return MOS_STATUS_SUCCESS; 1840 } 1841 1842 virtual MOS_STATUS SetupSegmentationStreamIn() = 0; 1843 1844 virtual void SetHcpPipeModeSelectParams(MHW_VDBOX_PIPE_MODE_SELECT_PARAMS& pipeModeSelectParams); 1845 1846 virtual void SetHcpIndObjBaseAddrParams(MHW_VDBOX_IND_OBJ_BASE_ADDR_PARAMS& indObjBaseAddrParams); 1847 1848 virtual MOS_STATUS InitializePicture(const EncoderParams& params); 1849 1850 virtual MOS_STATUS AllocateResources(); 1851 1852 virtual void FreeResources(); 1853 1854 virtual MOS_STATUS Initialize(CodechalSetting * settings); 1855 1856 //! 1857 //! \brief Execute kernel functions 1858 //! 1859 //! \return MOS_STATUS 1860 //! MOS_STATUS_SUCCESS if success, else fail reason 1861 //! 1862 MOS_STATUS ExecuteKernelFunctions() = 0; 1863 1864 //! 1865 //! \brief Execute slice level 1866 //! 1867 //! \return MOS_STATUS 1868 //! MOS_STATUS_SUCCESS if success, else fail reason 1869 //! 1870 MOS_STATUS ExecuteSliceLevel(); 1871 1872 virtual MOS_STATUS ExecuteDysSliceLevel(); 1873 1874 virtual MOS_STATUS HuCVp9Prob(); 1875 1876 virtual MOS_STATUS HuCBrcUpdate(); 1877 1878 virtual MOS_STATUS HuCBrcInitReset(); 1879 1880 virtual MOS_STATUS ExecutePictureLevel(); 1881 1882 virtual MOS_STATUS ExecuteDysPictureLevel(); 1883 1884 virtual MOS_STATUS SetHcpPipeBufAddrParams(MHW_VDBOX_PIPE_BUF_ADDR_PARAMS& pipeBufAddrParams, 1885 PMOS_SURFACE* refSurface, 1886 PMOS_SURFACE* refSurfaceNonScaled, 1887 PMOS_SURFACE* dsRefSurface4x, 1888 PMOS_SURFACE* dsRefSurface8x); 1889 1890 virtual MOS_STATUS SetSequenceStructs(); 1891 1892 virtual MOS_STATUS SetPictureStructs(); 1893 1894 virtual MOS_STATUS SetRowstoreCachingOffsets(); 1895 1896 //! 1897 //! \brief User feature key report 1898 //! 1899 //! \return MOS_STATUS 1900 //! MOS_STATUS_SUCCESS if success, else fail reason 1901 //! 1902 MOS_STATUS UserFeatureKeyReport(); 1903 1904 //! 1905 //! \brief Read Hcp status 1906 //! 1907 //! \param [in] cmdBuffer 1908 //! Pointer to command buffer 1909 //! 1910 //! \return MOS_STATUS 1911 //! MOS_STATUS_SUCCESS if success, else fail reason 1912 //! 1913 MOS_STATUS ReadHcpStatus( 1914 PMOS_COMMAND_BUFFER cmdBuffer); 1915 1916 virtual MOS_STATUS ConstructPicStateBatchBuf( 1917 PMOS_RESOURCE picStateBuffer); 1918 1919 //! 1920 //! \brief Construct super frame 1921 //! 1922 //! \return MOS_STATUS 1923 //! MOS_STATUS_SUCCESS if success, else fail reason 1924 //! 1925 MOS_STATUS ConstructSuperFrame(); 1926 1927 //! 1928 //! \brief Set dmem HuC Vp9 Prob 1929 //! 1930 //! \return MOS_STATUS 1931 //! MOS_STATUS_SUCCESS if success, else fail reason 1932 //! 1933 virtual MOS_STATUS SetDmemHuCVp9Prob(); 1934 1935 //! 1936 //! \brief Store HuC status to register 1937 //! 1938 //! \return MOS_STATUS 1939 //! MOS_STATUS_SUCCESS if success, else fail reason 1940 //! 1941 MOS_STATUS StoreHuCStatus2Register(PMOS_COMMAND_BUFFER cmdBuffer); 1942 1943 //! 1944 //! \brief Add store HUC_ERROR_STATUS register command in the command buffer 1945 //! 1946 //! \param [in] mmioRegisters 1947 //! Pointer to mmio huc register 1948 //! \param [in] cmdBuffer 1949 //! Pointer to the command buffer 1950 //! \param [in] addToEnncodeStatus 1951 //! Flag to indicate whether huc error status will be stored in encode status buffer 1952 //! 1953 //! \return MOS_STATUS 1954 //! MOS_STATUS_SUCCESS if success, else fail reason 1955 //! 1956 MOS_STATUS StoreHucErrorStatus(MmioRegistersHuc *mmioRegisters, PMOS_COMMAND_BUFFER cmdBuffer, bool addToEnncodeStatus); 1957 1958 //! 1959 //! \brief Init brc constant buffer 1960 //! 1961 //! \param [in] brcConstResource 1962 //! Pointer to MOS resource 1963 //! \param [in] pictureCodingType 1964 //! Picture coding type 1965 //! 1966 //! \return MOS_STATUS 1967 //! MOS_STATUS_SUCCESS if success, else fail reason 1968 //! 1969 MOS_STATUS InitBrcConstantBuffer( 1970 PMOS_RESOURCE brcConstResource, 1971 uint16_t pictureCodingType); 1972 1973 //! 1974 //! \brief Compute VD Encode BRC initQP 1975 //! 1976 //! \param [in] initQpI 1977 //! Init QPI 1978 //! \param [in] initQpP 1979 //! Init QPP 1980 //! 1981 //! \return MOS_STATUS 1982 //! MOS_STATUS_SUCCESS if success, else fail reason 1983 //! 1984 MOS_STATUS ComputeVDEncBRCInitQP( 1985 int32_t* initQpI, 1986 int32_t* initQpP); 1987 1988 //! 1989 //! \brief Set dmem huc brc update 1990 //! 1991 //! \return MOS_STATUS 1992 //! MOS_STATUS_SUCCESS if success, else fail reason 1993 //! 1994 MOS_STATUS SetDmemHuCBrcUpdate(); 1995 1996 //! 1997 //! \brief Set dmem huc brc init reset 1998 //! 1999 //! \return MOS_STATUS 2000 //! MOS_STATUS_SUCCESS if success, else fail reason 2001 //! 2002 MOS_STATUS SetDmemHuCBrcInitReset(); 2003 2004 //! 2005 //! \brief Software BRC 2006 //! 2007 //! \param [in] update 2008 //! Update status 2009 //! 2010 //! \return MOS_STATUS 2011 //! MOS_STATUS_SUCCESS if success, else fail reason 2012 //! 2013 MOS_STATUS SoftwareBRC(bool update); 2014 2015 //! 2016 //! \brief 2017 //! 2018 //! \param [in] idx 2019 //! Index 2020 //! \param [in] width 2021 //! Width 2022 //! \param [in] blockSize 2023 //! Block size 2024 //! \param [in] bufferPitch 2025 //! Buffer pitch 2026 //! 2027 //! \return uint32_t 2028 //! Return 0if call success, else -1 if fail 2029 //! 2030 uint32_t CalculateBufferOffset( 2031 uint32_t idx, 2032 uint32_t width, 2033 uint32_t blockSize, 2034 uint32_t bufferPitch); 2035 2036 //! 2037 //! \brief Pak construct picture state batch buffer 2038 //! 2039 //! \param [in] picStateBuffer 2040 //! Pointer to MOS surface 2041 //! 2042 //! \return MOS_STATUS 2043 //! MOS_STATUS_SUCCESS if success, else fail reason 2044 //! 2045 MOS_STATUS PakConstructPicStateBatchBuf( 2046 PMOS_RESOURCE picStateBuffer); 2047 2048 //! 2049 //! \brief Return if this surface has to be compressed 2050 //! 2051 //! \param [in] isDownScaledSurface 2052 //! indicating if surface is downscaled 2053 //! 2054 //! \return int32_t 2055 //! 1 if to be compressed 2056 //! 0 if not 2057 //! 2058 virtual bool IsToBeCompressed(bool isDownScaledSurface); 2059 2060 //! 2061 //! \brief Dys Reference frames 2062 //! 2063 //! \return MOS_STATUS 2064 //! MOS_STATUS_SUCCESS if success, else fail reason 2065 //! 2066 MOS_STATUS DysRefFrames(); 2067 2068 //! 2069 //! \brief Set sampler state Dys 2070 //! 2071 //! \param [in] params 2072 //! Pointer to Dys sampler state parameters 2073 //! 2074 //! \return MOS_STATUS 2075 //! MOS_STATUS_SUCCESS if success, else fail reason 2076 //! 2077 MOS_STATUS SetSamplerStateDys( 2078 DysSamplerStateParams* params); 2079 2080 //! 2081 //! \brief Set curbe Dys 2082 //! 2083 //! \param [in] params 2084 //! Pointer to Dys curbe parameters 2085 //! 2086 //! \return MOS_STATUS 2087 //! MOS_STATUS_SUCCESS if success, else fail reason 2088 //! 2089 MOS_STATUS SetCurbeDys( 2090 DysCurbeParams* params); 2091 2092 //! 2093 //! \brief Send Dys surfaces 2094 //! 2095 //! \param [in] cmdBuffer 2096 //! Pointer to MOS command buffer 2097 //! \param [in] params 2098 //! Pointer to Dys surface parameters 2099 //! 2100 //! \return MOS_STATUS 2101 //! MOS_STATUS_SUCCESS if success, else fail reason 2102 //! 2103 MOS_STATUS SendDysSurfaces( 2104 PMOS_COMMAND_BUFFER cmdBuffer, 2105 DysSurfaceParams* params); 2106 2107 //! 2108 //! \brief Dys kernel 2109 //! 2110 //! \param [in] dysKernelParams 2111 //! Pointer to Dys kernel parameters 2112 //! 2113 //! \return MOS_STATUS 2114 //! MOS_STATUS_SUCCESS if success, else fail reason 2115 //! 2116 virtual MOS_STATUS DysKernel( 2117 DysKernelParams* dysKernelParams); 2118 2119 //! 2120 //! \brief Initalize ME state 2121 //! 2122 //! \param [in] state 2123 //! Pointer to Vdenc vme state 2124 //! 2125 //! \return MOS_STATUS 2126 //! MOS_STATUS_SUCCESS if success, else fail reason 2127 //! 2128 MOS_STATUS InitMEState(VdencVmeState* state); 2129 2130 //! 2131 //! \brief Vdenc set curbe hme kernel 2132 //! 2133 //! \param [in] state 2134 //! Pointer to Vdenc vme state 2135 //! 2136 //! \return MOS_STATUS 2137 //! MOS_STATUS_SUCCESS if success, else fail reason 2138 //! 2139 MOS_STATUS VdencSetCurbeHmeKernel( 2140 VdencVmeState* state); 2141 2142 //! 2143 //! \brief Sets the SurfaceStates for 16xMe and 4xME 2144 //! \details Sets the Input and Output SurfaceStates for respective BTI for 2145 //! 16xMe and 4xME using the parameters from the input kernel state. 2146 //! 2147 //! \param state 2148 //! [in] Parameters used for setting up the CURBE 2149 //! \param cmdBuffer 2150 //! [in] Command buffer 2151 //! 2152 //! \return MOS_STATUS 2153 //! MOS_STATUS_SUCCESS if success, else fail reason 2154 //! 2155 MOS_STATUS VdencSendHmeSurfaces( 2156 VdencVmeState* state, 2157 PMOS_COMMAND_BUFFER cmdBuffer); 2158 2159 //! 2160 //! \brief Vdenc hme kernel 2161 //! 2162 //! \param [in] state 2163 //! Pointer to Vdenc vme state 2164 //! 2165 //! \return MOS_STATUS 2166 //! MOS_STATUS_SUCCESS if success, else fail reason 2167 //! 2168 MOS_STATUS VdencHmeKernel( 2169 VdencVmeState* state); 2170 2171 virtual PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS CreateHcpPipeBufAddrParams(PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS pipeBufAddrParams); 2172 2173 //! 2174 //! \brief Set hcp ds surface params 2175 //! 2176 //! \param [in] dsSurfaceParams 2177 //! Pointer to MHW vdbox surface parameters 2178 //! 2179 //! \return MOS_STATUS 2180 //! MOS_STATUS_SUCCESS if success, else fail reason 2181 //! 2182 void SetHcpDsSurfaceParams(MHW_VDBOX_SURFACE_PARAMS* dsSurfaceParams); 2183 2184 //! 2185 //! \brief Resize 4x and 8x DS recon Surfaces to VDEnc 2186 //! 2187 //! \param [in] bufIdx 2188 //! Index of the surface 2189 //! 2190 //! \return MOS_STATUS 2191 //! MOS_STATUS_SUCCESS if success, else fail reason 2192 //! 2193 MOS_STATUS Resize4x8xforDS( 2194 uint8_t bufIdx); 2195 2196 //! 2197 //! \brief Set hcp source surface parameters 2198 //! 2199 //! \param [in] surfaceParams 2200 //! Pointer to MHW vdbox surface parameters 2201 //! \param [in] refSurface 2202 //! Pointer to MOS surface 2203 //! \param [in] refSurfaceNonScaled 2204 //! Pointer to MOS surface 2205 //! \param [in] dsRefSurface4x 2206 //! Pointer to MOS surface 2207 //! \param [in] dsRefSurface8x 2208 //! Pointer to MOS surface 2209 //! 2210 //! \return MOS_STATUS 2211 //! MOS_STATUS_SUCCESS if success, else fail reason 2212 //! 2213 2214 MOS_STATUS SetHcpSrcSurfaceParams(MHW_VDBOX_SURFACE_PARAMS* surfaceParams, 2215 PMOS_SURFACE* refSurface, 2216 PMOS_SURFACE* refSurfaceNonScaled, 2217 PMOS_SURFACE* dsRefSurface4x, 2218 PMOS_SURFACE* dsRefSurface8x); 2219 2220 virtual MOS_STATUS GetStatusReport( 2221 EncodeStatus* encodeStatus, 2222 EncodeStatusReport* encodeStatusReport); 2223 2224 //! 2225 //! \brief Get reference buffer slot index 2226 //! 2227 //! \param [in] refreshFlags 2228 //! Refresh flags 2229 //! 2230 //! \return uint8_t 2231 //! Return 0 if call success, else -1 if fail 2232 //! 2233 uint8_t GetReferenceBufferSlotIndex(uint8_t refreshFlags); 2234 2235 //! 2236 //! \brief Put data for compressed header 2237 //! 2238 //! \param [in] compressedHdr 2239 //! Compressed header 2240 //! \param [in] bit 2241 //! Bit 2242 //! \param [in] prob 2243 //! Prob 2244 //! \param [in] binIdx 2245 //! Bin index 2246 //! 2247 void PutDataForCompressedHdr( 2248 CompressedHeader* compressedHdr, 2249 uint32_t bit, 2250 uint32_t prob, 2251 uint32_t binIdx); 2252 2253 //! 2254 //! \brief Allocate resources brc 2255 //! 2256 //! \return MOS_STATUS 2257 //! MOS_STATUS_SUCCESS if success, else fail reason 2258 //! 2259 MOS_STATUS AllocateResourcesBrc(); 2260 2261 //! 2262 //! \brief Release resources brc 2263 //! 2264 void ReleaseResourcesBrc(); 2265 2266 //! 2267 //! \brief Calculate temporal ratios 2268 //! 2269 //! \param [in] numberOfLayers 2270 //! Number of layers 2271 //! \param [in] maxTemporalBitrate 2272 //! Max temporal frame rate 2273 //! \param [in] maxTemporalFrameRate 2274 //! Frame rate 2275 //! \param [in] maxLevelRatios 2276 //! Max level ratios 2277 //! 2278 //! \return MOS_STATUS 2279 //! MOS_STATUS_SUCCESS if success, else fail reason 2280 //! 2281 MOS_STATUS CalculateTemporalRatios( 2282 uint16_t numberOfLayers, 2283 uint32_t maxTemporalBitrate, 2284 FRAME_RATE maxTemporalFrameRate, 2285 uint8_t* maxLevelRatios); 2286 2287 //! 2288 //! \brief Calculate normalized denominator 2289 //! 2290 //! \param [in] frameRates 2291 //! Pointer to frame rate 2292 //! \param [in] numberOfLayers 2293 //! Number of layers 2294 //! \param [in] normalizedDenominator 2295 //! Normalized denominator 2296 //! 2297 //! \return uint32_t 2298 //! Return 0 if call success, else -1 if fail 2299 //! 2300 uint32_t CalculateNormalizedDenominator( 2301 FRAME_RATE* frameRates, 2302 uint16_t numberOfLayers, 2303 uint32_t normalizedDenominator); 2304 2305 //! 2306 //! \brief Calculate rePak thresholds 2307 //! \details 2308 //! 2309 //! \return MOS_STATUS 2310 //! MOS_STATUS_SUCCESS if success, else fail reason 2311 //! 2312 MOS_STATUS CalculateRePakThresholds(); 2313 2314 //! 2315 //! \brief Construct Pak insert object batch buf 2316 //! \details 2317 //! 2318 //! \param [in] pakInsertObjBuffer 2319 //! Pointer to MOS resource 2320 //! 2321 //! \return MOS_STATUS 2322 //! MOS_STATUS_SUCCESS if success, else fail reason 2323 //! 2324 MOS_STATUS ConstructPakInsertObjBatchBuf( 2325 PMOS_RESOURCE pakInsertObjBuffer); 2326 2327 //! 2328 //! \brief Refresh frame internal buffers 2329 //! \details 2330 //! 2331 //! \return MOS_STATUS 2332 //! MOS_STATUS_SUCCESS if success, else fail reason 2333 //! 2334 MOS_STATUS RefreshFrameInternalBuffers(); 2335 2336 //! 2337 //! \brief Allocate Mb brc segment map surface 2338 //! \details 2339 //! 2340 //! \return MOS_STATUS 2341 //! MOS_STATUS_SUCCESS if success, else fail reason 2342 //! 2343 MOS_STATUS AllocateMbBrcSegMapSurface(); 2344 2345 //! 2346 //! \brief Init context buffer 2347 //! \details 2348 //! \param [in,out] ctxBuffer 2349 //! Pointer to context buffer 2350 //! 2351 //! \param [in] setToKey 2352 //! Specify if it's key frame 2353 //! 2354 //! \return MOS_STATUS 2355 //! MOS_STATUS_SUCCESS if success, else fail reason 2356 //! 2357 MOS_STATUS ContextBufferInit( 2358 uint8_t *ctxBuffer, 2359 bool setToKey); 2360 2361 //! 2362 //! \brief Populate prob values which are different between Key and Non-Key frame 2363 //! \details 2364 //! \param [in,out] ctxBuffer 2365 //! Pointer to context buffer 2366 //! 2367 //! \param [in] setToKey 2368 //! Specify if it's key frame 2369 //! 2370 //! \return MOS_STATUS 2371 //! MOS_STATUS_SUCCESS if success, else fail reason 2372 //! 2373 MOS_STATUS CtxBufDiffInit( 2374 uint8_t *ctxBuffer, 2375 bool setToKey); 2376 2377 //! 2378 //! \brief Calculate Vdenc Picture State CommandSize 2379 //! 2380 //! \return MOS_STATUS 2381 //! MOS_STATUS_SUCCESS if success 2382 //! 2383 virtual MOS_STATUS CalculateVdencPictureStateCommandSize(); 2384 2385 //! 2386 //! \brief Initialize MMC state 2387 //! 2388 //! \return MOS_STATUS 2389 //! MOS_STATUS_SUCCESS if success 2390 //! 2391 virtual MOS_STATUS InitMmcState(); 2392 2393 virtual MOS_STATUS VerifyCommandBufferSize(); 2394 2395 virtual MOS_STATUS GetCommandBuffer(PMOS_COMMAND_BUFFER cmdBuffer); 2396 2397 virtual MOS_STATUS ReturnCommandBuffer(PMOS_COMMAND_BUFFER cmdBuffer); 2398 2399 virtual MOS_STATUS SubmitCommandBuffer( 2400 PMOS_COMMAND_BUFFER cmdBuffer, 2401 bool nullRendering); 2402 2403 #if USE_CODECHAL_DEBUG_TOOL 2404 MOS_STATUS DumpSegmentParams( 2405 PCODEC_VP9_ENCODE_SEGMENT_PARAMS segmentParams); 2406 2407 MOS_STATUS DumpSeqParams( 2408 PCODEC_VP9_ENCODE_SEQUENCE_PARAMS seqParams); 2409 2410 MOS_STATUS DumpPicParams( 2411 PCODEC_VP9_ENCODE_PIC_PARAMS picParams); 2412 #endif 2413 }; 2414 2415 #endif // __CODECHAL_VDENC_VP9_BASE_H__ 2416 2417