1 /*
2 * Copyright (c) 2018-2021, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file vp_vebox_cmd_packet.cpp
24 //! \brief vebox packet which used in by mediapipline.
25 //! \details vebox packet provide the structures and generate the cmd buffer which mediapipline will used.
26 //!
27
28 #include "vp_vebox_cmd_packet.h"
29 #include "vp_utils.h"
30 #include "mos_resource_defs.h"
31 #include "hal_oca_interface.h"
32 #include "vp_render_sfc_m12.h"
33 #include "vp_render_ief.h"
34 #include "vp_feature_caps.h"
35 #include "vp_platform_interface.h"
36
37 namespace vp {
38
39 #define INTERP(x0, x1, x, y0, y1) ((uint32_t) floor(y0+(x-x0)*(y1-y0)/(double)(x1-x0)))
40
41 const uint32_t VpVeboxCmdPacket::m_satP1Table[MHW_STE_FACTOR_MAX + 1] = {
42 0x00000000, 0xfffffffe, 0xfffffffc, 0xfffffffa, 0xfffffff6, 0xfffffff4, 0xfffffff2, 0xfffffff0, 0xffffffee, 0xffffffec };
43
44 const uint32_t VpVeboxCmdPacket::m_satS0Table[MHW_STE_FACTOR_MAX + 1] = {
45 0x000000ef, 0x00000100, 0x00000113, 0x00000129, 0x0000017a, 0x000001a2, 0x000001d3, 0x00000211, 0x00000262, 0x000002d1 };
46
47 const uint32_t VpVeboxCmdPacket::m_satS1Table[MHW_STE_FACTOR_MAX + 1] = {
48 0x000000ab, 0x00000080, 0x00000066, 0x00000055, 0x000000c2, 0x000000b9, 0x000000b0, 0x000000a9, 0x000000a2, 0x0000009c };
49
SetupSurfaceStates(PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)50 void VpVeboxCmdPacket::SetupSurfaceStates(
51 PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)
52 {
53 VP_FUNC_CALL();
54
55 VP_PUBLIC_CHK_NULL_NO_STATUS_RETURN(pVeboxSurfaceStateCmdParams);
56 MOS_ZeroMemory(pVeboxSurfaceStateCmdParams, sizeof(VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS));
57 pVeboxSurfaceStateCmdParams->pSurfInput = m_veboxPacketSurface.pCurrInput;
58 pVeboxSurfaceStateCmdParams->pSurfOutput = m_veboxPacketSurface.pCurrOutput;
59 pVeboxSurfaceStateCmdParams->pSurfSTMM = m_veboxPacketSurface.pSTMMInput;
60 pVeboxSurfaceStateCmdParams->pSurfDNOutput = m_veboxPacketSurface.pDenoisedCurrOutput;
61 pVeboxSurfaceStateCmdParams->bDIEnable = m_PacketCaps.bDI;
62 pVeboxSurfaceStateCmdParams->b3DlutEnable = m_PacketCaps.bHDR3DLUT; // Need to consider cappipe
63 }
64
SetupVeboxState(PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)65 MOS_STATUS VpVeboxCmdPacket::SetupVeboxState(
66 PMHW_VEBOX_STATE_CMD_PARAMS pVeboxStateCmdParams)
67 {
68 VP_FUNC_CALL();
69
70 PMHW_VEBOX_MODE pVeboxMode = nullptr;
71 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
72
73 VP_RENDER_CHK_NULL_RETURN(pVeboxStateCmdParams);
74 VP_RENDER_CHK_NULL_RETURN(m_hwInterface);
75
76 pVeboxMode = &pVeboxStateCmdParams->VeboxMode;
77 VP_RENDER_CHK_NULL_RETURN(pVeboxMode);
78
79 VpVeboxRenderData* pRenderData = GetLastExecRenderData();
80 VP_RENDER_ASSERT(pRenderData);
81
82 MOS_ZeroMemory(pVeboxStateCmdParams, sizeof(*pVeboxStateCmdParams));
83
84 // Always enable the global iecp to align with the legacy path.
85 // For next step, need to enable it only when necessary.
86 pVeboxMode->GlobalIECPEnable = true;
87
88 pVeboxMode->DIEnable = m_PacketCaps.bDI;
89
90 pVeboxMode->SFCParallelWriteEnable = m_IsSfcUsed &&
91 (m_PacketCaps.bDN || m_PacketCaps.bDI);
92 pVeboxMode->DNEnable = m_PacketCaps.bDN;
93 pVeboxMode->DNDIFirstFrame = m_DNDIFirstFrame;
94 pVeboxMode->DIOutputFrames = m_DIOutputFrames;
95 pVeboxMode->DisableEncoderStatistics = true;
96 pVeboxMode->DisableTemporalDenoiseFilter = false;
97
98 if (!m_PacketCaps.bDI &&
99 m_PacketCaps.bDN &&
100 (IS_RGB_CSPACE(m_currentSurface->ColorSpace)))
101 {
102 // RGB DN must disable Temporal filter in Vebox
103 pVeboxMode->DisableTemporalDenoiseFilter = true;
104 pVeboxMode->GlobalIECPEnable = true;
105 }
106
107 pVeboxMode->ColorGamutCompressionEnable = m_PacketCaps.bCGC && !m_PacketCaps.bBt2020ToRGB;
108 pVeboxMode->ColorGamutExpansionEnable = m_PacketCaps.bBt2020ToRGB;
109
110 pVeboxStateCmdParams->bUseVeboxHeapKernelResource = UseKernelResource();
111
112 //Set up Chroma Sampling
113 pVeboxStateCmdParams->ChromaSampling = pRenderData->GetChromaSubSamplingParams();
114
115 // Permanent program limitation that should go in all the configurations of SKLGT which have 2 VEBOXes (i.e. GT3 & GT4)
116 // VEBOX1 should be disabled whenever there is an VE-SFC workload.
117 // This is because we have only one SFC all the GT configurations and that SFC is tied to VEBOX0.Hence the programming restriction.
118 if (m_IsSfcUsed)
119 {
120 pVeboxMode->SingleSliceVeboxEnable = 1;
121 }
122 else
123 {
124 pVeboxMode->SingleSliceVeboxEnable = 0;
125 }
126 return eStatus;
127 }
128
InitCmdBufferWithVeParams(PRENDERHAL_INTERFACE pRenderHal,MOS_COMMAND_BUFFER & CmdBuffer,PRENDERHAL_GENERIC_PROLOG_PARAMS pGenericPrologParams)129 MOS_STATUS VpVeboxCmdPacket::InitCmdBufferWithVeParams(
130 PRENDERHAL_INTERFACE pRenderHal,
131 MOS_COMMAND_BUFFER & CmdBuffer,
132 PRENDERHAL_GENERIC_PROLOG_PARAMS pGenericPrologParams)
133 {
134 VP_FUNC_CALL();
135
136 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
137 RENDERHAL_GENERIC_PROLOG_PARAMS_G12 genericPrologParamsG12 = {};
138
139 genericPrologParamsG12.bEnableMediaFrameTracking = pGenericPrologParams->bEnableMediaFrameTracking;
140 genericPrologParamsG12.bMmcEnabled = pGenericPrologParams->bMmcEnabled;
141 genericPrologParamsG12.dwMediaFrameTrackingAddrOffset = pGenericPrologParams->dwMediaFrameTrackingAddrOffset;
142 genericPrologParamsG12.dwMediaFrameTrackingTag = pGenericPrologParams->dwMediaFrameTrackingTag;
143 genericPrologParamsG12.presMediaFrameTrackingSurface = pGenericPrologParams->presMediaFrameTrackingSurface;
144
145 genericPrologParamsG12.VEngineHintParams.BatchBufferCount = 2;
146 //genericPrologParamsG12.VEngineHintParams.resScalableBatchBufs[0] = CmdBuffer[0].OsResource;
147 //genericPrologParamsG12.VEngineHintParams.resScalableBatchBufs[1] = CmdBuffer[1].OsResource;
148 genericPrologParamsG12.VEngineHintParams.UsingFrameSplit = true;
149 genericPrologParamsG12.VEngineHintParams.UsingSFC = false;
150 genericPrologParamsG12.VEngineHintParams.EngineInstance[0] = 0;
151 genericPrologParamsG12.VEngineHintParams.EngineInstance[1] = 1;
152 genericPrologParamsG12.VEngineHintParams.NeedSyncWithPrevious = true;
153 genericPrologParamsG12.VEngineHintParams.SameEngineAsLastSubmission = true;
154
155 pRenderHal->pOsInterface->VEEnable = false;
156
157 // Initialize command buffer and insert prolog
158 VP_RENDER_CHK_STATUS_RETURN(pRenderHal->pfnInitCommandBuffer(
159 pRenderHal,
160 &CmdBuffer,
161 (PRENDERHAL_GENERIC_PROLOG_PARAMS)&genericPrologParamsG12));
162
163 return eStatus;
164 }
165
166 //!
167 //! \brief Vebox initialize STMM History
168 //! \details Initialize STMM History surface
169 //! Description:
170 //! This function is used by VEBox for initializing
171 //! the STMM surface. The STMM / Denoise history is a custom surface used
172 //! for both input and output. Each cache line contains data for 4 4x4s.
173 //! The STMM for each 4x4 is 8 bytes, while the denoise history is 1 byte
174 //! and the chroma denoise history is 1 byte for each U and V.
175 //! Byte Data\n
176 //! 0 STMM for 2 luma values at luma Y=0, X=0 to 1\n
177 //! 1 STMM for 2 luma values at luma Y=0, X=2 to 3\n
178 //! 2 Luma Denoise History for 4x4 at 0,0\n
179 //! 3 Not Used\n
180 //! 4-5 STMM for luma from X=4 to 7\n
181 //! 6 Luma Denoise History for 4x4 at 0,4\n
182 //! 7 Not Used\n
183 //! 8-15 Repeat for 4x4s at 0,8 and 0,12\n
184 //! 16 STMM for 2 luma values at luma Y=1,X=0 to 1\n
185 //! 17 STMM for 2 luma values at luma Y=1, X=2 to 3\n
186 //! 18 U Chroma Denoise History\n
187 //! 19 Not Used\n
188 //! 20-31 Repeat for 3 4x4s at 1,4, 1,8 and 1,12\n
189 //! 32 STMM for 2 luma values at luma Y=2,X=0 to 1\n
190 //! 33 STMM for 2 luma values at luma Y=2, X=2 to 3\n
191 //! 34 V Chroma Denoise History\n
192 //! 35 Not Used\n
193 //! 36-47 Repeat for 3 4x4s at 2,4, 2,8 and 2,12\n
194 //! 48 STMM for 2 luma values at luma Y=3,X=0 to 1\n
195 //! 49 STMM for 2 luma values at luma Y=3, X=2 to 3\n
196 //! 50-51 Not Used\n
197 //! 36-47 Repeat for 3 4x4s at 3,4, 3,8 and 3,12\n
198 //! \return MOS_STATUS
199 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
200 //!
InitSTMMHistory()201 MOS_STATUS VpVeboxCmdPacket::InitSTMMHistory()
202 {
203 VP_FUNC_CALL();
204
205 MOS_STATUS eStatus;
206 uint32_t dwSize;
207 int32_t x, y;
208 uint8_t* pByte;
209 MOS_LOCK_PARAMS LockFlags;
210 PVP_SURFACE stmmSurface = GetSurface(SurfaceTypeSTMMIn);
211 eStatus = MOS_STATUS_SUCCESS;
212
213 VP_PUBLIC_CHK_NULL_RETURN(stmmSurface);
214 VP_PUBLIC_CHK_NULL_RETURN(stmmSurface->osSurface);
215
216 MOS_ZeroMemory(&LockFlags, sizeof(MOS_LOCK_PARAMS));
217
218 LockFlags.WriteOnly = 1;
219 LockFlags.TiledAsTiled = 1; // Set TiledAsTiled flag for STMM surface initialization.
220
221 // Lock the surface for writing
222 pByte = (uint8_t*)m_allocator->Lock(
223 &stmmSurface->osSurface->OsResource,
224 &LockFlags);
225
226 VPHAL_RENDER_CHK_NULL(pByte);
227
228 dwSize = stmmSurface->osSurface->dwWidth >> 2;
229
230 // Fill STMM surface with DN history init values.
231 for (y = 0; y < (int32_t)stmmSurface->osSurface->dwHeight; y++)
232 {
233 for (x = 0; x < (int32_t)dwSize; x++)
234 {
235 MOS_FillMemory(pByte, 2, DNDI_HISTORY_INITVALUE);
236 // skip denosie history init.
237 pByte += 4;
238 }
239
240 pByte += stmmSurface->osSurface->dwPitch - stmmSurface->osSurface->dwWidth;
241 }
242
243 // Unlock the surface
244 VPHAL_RENDER_CHK_STATUS(m_allocator->UnLock(&stmmSurface->osSurface->OsResource));
245
246 finish:
247 return eStatus;
248 }
249
IsFormatMMCSupported(MOS_FORMAT Format)250 bool VpVeboxCmdPacket::IsFormatMMCSupported(MOS_FORMAT Format)
251 {
252 VP_FUNC_CALL();
253
254 // Check if Sample Format is supported
255 if ((Format != Format_YUY2) &&
256 (Format != Format_Y210) &&
257 (Format != Format_Y410) &&
258 (Format != Format_Y216) &&
259 (Format != Format_Y416) &&
260 (Format != Format_P010) &&
261 (Format != Format_P016) &&
262 (Format != Format_AYUV) &&
263 (Format != Format_NV21) &&
264 (Format != Format_NV12) &&
265 (Format != Format_UYVY) &&
266 (Format != Format_YUYV) &&
267 (Format != Format_R10G10B10A2) &&
268 (Format != Format_B10G10R10A2) &&
269 (Format != Format_A8B8G8R8) &&
270 (Format != Format_X8B8G8R8) &&
271 (Format != Format_A8R8G8B8) &&
272 (Format != Format_X8R8G8B8) &&
273 (Format != Format_A16B16G16R16F) &&
274 (Format != Format_A16R16G16B16F))
275 {
276 VP_RENDER_NORMALMESSAGE("Unsupported Format '0x%08x' for VEBOX MMC ouput.", Format);
277 return false;
278 }
279
280 return true;
281 }
282
SetSfcMmcParams()283 MOS_STATUS VpVeboxCmdPacket::SetSfcMmcParams()
284 {
285 VP_FUNC_CALL();
286 VP_PUBLIC_CHK_NULL_RETURN(m_sfcRender);
287 VP_PUBLIC_CHK_NULL_RETURN(m_renderTarget);
288 VP_PUBLIC_CHK_NULL_RETURN(m_renderTarget->osSurface);
289 VP_PUBLIC_CHK_NULL_RETURN(m_mmc);
290
291 VP_PUBLIC_CHK_STATUS_RETURN(m_sfcRender->SetMmcParams(m_renderTarget->osSurface,
292 IsFormatMMCSupported(m_renderTarget->osSurface->Format),
293 m_mmc->IsMmcEnabled()));
294
295 return MOS_STATUS_SUCCESS;
296 }
297
GetSurface(SurfaceType type)298 VP_SURFACE *VpVeboxCmdPacket::GetSurface(SurfaceType type)
299 {
300 VP_FUNC_CALL();
301
302 auto it = m_surfSetting.surfGroup.find(type);
303 VP_SURFACE *surf = (m_surfSetting.surfGroup.end() != it) ? it->second : nullptr;
304 if (SurfaceTypeVeboxCurrentOutput == type && nullptr == surf && !m_IsSfcUsed)
305 {
306 // Vebox output case.
307 surf = m_renderTarget;
308 }
309 else if (SurfaceTypeVeboxInput == type && surf)
310 {
311 // The vp surface object for external surface will be destroyed by hw filter before packet submit.
312 // Store the vp surface object inside packet.
313 if (MOS_FAILED(m_allocator->CopyVpSurface(*m_currentSurface ,*surf)))
314 {
315 return nullptr;
316 }
317 m_currentSurface->rcMaxSrc = m_currentSurface->rcSrc;
318 surf = m_currentSurface;
319 }
320 else if (SurfaceTypeVeboxPreviousInput == type && surf)
321 {
322 // The vp surface object for external surface will be destroyed by hw filter before packet submit.
323 // Store the vp surface object inside packet.
324 if (MOS_FAILED(m_allocator->CopyVpSurface(*m_previousSurface ,*surf)))
325 {
326 return nullptr;
327 }
328 surf = m_previousSurface;
329 }
330 return surf;
331 }
332
SetScalingParams(PSFC_SCALING_PARAMS scalingParams)333 MOS_STATUS VpVeboxCmdPacket::SetScalingParams(PSFC_SCALING_PARAMS scalingParams)
334 {
335 VP_FUNC_CALL();
336
337 VP_PUBLIC_CHK_NULL_RETURN(scalingParams);
338 // Scaing only can be apply to SFC path
339 if (m_PacketCaps.bSFC)
340 {
341 VP_PUBLIC_CHK_NULL_RETURN(m_sfcRender);
342 VP_PUBLIC_CHK_STATUS_RETURN(m_sfcRender->SetScalingParams(scalingParams));
343
344 //---------------------------------
345 // Set SFC State: mmc
346 //---------------------------------
347 SetSfcMmcParams();
348
349 return MOS_STATUS_SUCCESS;
350 }
351 else
352 {
353 VP_RENDER_NORMALMESSAGE("Scaling is enabled in SFC, pls recheck the features enabling in SFC");
354 return MOS_STATUS_INVALID_PARAMETER;
355 }
356 }
357
SetSfcCSCParams(PSFC_CSC_PARAMS cscParams)358 MOS_STATUS VpVeboxCmdPacket::SetSfcCSCParams(PSFC_CSC_PARAMS cscParams)
359 {
360 VP_FUNC_CALL();
361
362 VP_PUBLIC_CHK_NULL_RETURN(cscParams);
363
364 if (m_PacketCaps.bSFC)
365 {
366 VP_PUBLIC_CHK_NULL_RETURN(m_sfcRender);
367 VP_PUBLIC_CHK_STATUS_RETURN(m_sfcRender->SetCSCParams(cscParams));
368 return MOS_STATUS_SUCCESS;
369 }
370 else
371 {
372 VP_RENDER_NORMALMESSAGE("CSC/IEF for Output is enabled in SFC, pls recheck the features enabling in SFC");
373 return MOS_STATUS_INVALID_PARAMETER;
374 }
375 }
376
SetVeboxBeCSCParams(PVEBOX_CSC_PARAMS cscParams)377 MOS_STATUS VpVeboxCmdPacket::SetVeboxBeCSCParams(PVEBOX_CSC_PARAMS cscParams)
378 {
379 VP_FUNC_CALL();
380
381 VP_RENDER_CHK_NULL_RETURN(cscParams);
382
383 VpVeboxRenderData* pRenderData = GetLastExecRenderData();
384 VP_RENDER_ASSERT(pRenderData);
385
386 pRenderData->IECP.BeCSC.bBeCSCEnabled = cscParams->bCSCEnabled;
387
388 MHW_VEBOX_IECP_PARAMS& veboxIecpParams = pRenderData->GetIECPParams();
389
390 if (m_CscInputCspace != cscParams->inputColorSpace ||
391 m_CscOutputCspace != cscParams->outputColorSpace)
392 {
393 // For VE 3DLUT HDR cases, CSC params will be overriden in VeboxInterface_BT2020YUVToRGB
394 VeboxGetBeCSCMatrix(
395 cscParams->inputColorSpace,
396 cscParams->outputColorSpace,
397 cscParams->inputFormat);
398
399 veboxIecpParams.srcFormat = cscParams->inputFormat;
400 veboxIecpParams.dstFormat = cscParams->outputFormat;
401 veboxIecpParams.ColorSpace = (MHW_CSPACE)cscParams->inputColorSpace;
402 }
403
404 if (m_PacketCaps.bVebox &&
405 m_PacketCaps.bBeCSC &&
406 cscParams->bCSCEnabled)
407 {
408 veboxIecpParams.bCSCEnable = true;
409 veboxIecpParams.pfCscCoeff = m_fCscCoeff;
410 veboxIecpParams.pfCscInOffset = m_fCscInOffset;
411 veboxIecpParams.pfCscOutOffset = m_fCscOutOffset;
412 }
413
414 VP_RENDER_CHK_STATUS_RETURN(SetVeboxOutputAlphaParams(cscParams));
415 VP_RENDER_CHK_STATUS_RETURN(SetVeboxChromasitingParams(cscParams));
416
417 return MOS_STATUS_SUCCESS;
418 }
419
SetVeboxOutputAlphaParams(PVEBOX_CSC_PARAMS cscParams)420 MOS_STATUS VpVeboxCmdPacket::SetVeboxOutputAlphaParams(PVEBOX_CSC_PARAMS cscParams)
421 {
422 VP_FUNC_CALL();
423
424 VP_RENDER_CHK_NULL_RETURN(cscParams);
425
426 VpVeboxRenderData* pRenderData = GetLastExecRenderData();
427 VP_RENDER_ASSERT(pRenderData);
428
429 MHW_VEBOX_IECP_PARAMS& veboxIecpParams = pRenderData->GetIECPParams();
430
431 if (IS_ALPHA_FORMAT(cscParams->outputFormat))
432 {
433 veboxIecpParams.bAlphaEnable = true;
434 }
435 else
436 {
437 veboxIecpParams.bAlphaEnable = false;
438 return MOS_STATUS_SUCCESS;
439 }
440
441 MOS_FORMAT outFormat = cscParams->outputFormat;
442
443 if (cscParams->alphaParams != nullptr)
444 {
445 switch (cscParams->alphaParams->AlphaMode)
446 {
447 case VPHAL_ALPHA_FILL_MODE_NONE:
448 if (outFormat == Format_A8R8G8B8)
449 {
450 veboxIecpParams.wAlphaValue =
451 (uint8_t)(0xff * cscParams->alphaParams->fAlpha);
452 }
453 else
454 {
455 veboxIecpParams.wAlphaValue = 0xff;
456 }
457 break;
458
459 // VEBOX does not support Background Color
460 case VPHAL_ALPHA_FILL_MODE_BACKGROUND:
461
462 // VPHAL_ALPHA_FILL_MODE_SOURCE_STREAM case is hit when the
463 // input does not have alpha
464 // So we set Opaque alpha channel.
465 case VPHAL_ALPHA_FILL_MODE_SOURCE_STREAM:
466 case VPHAL_ALPHA_FILL_MODE_OPAQUE:
467 default:
468 veboxIecpParams.wAlphaValue = 0xff;
469 break;
470 }
471 }
472 else
473 {
474 veboxIecpParams.wAlphaValue = 0xff;
475 }
476
477 return MOS_STATUS_SUCCESS;
478 }
479
SetVeboxChromasitingParams(PVEBOX_CSC_PARAMS cscParams)480 MOS_STATUS VpVeboxCmdPacket::SetVeboxChromasitingParams(PVEBOX_CSC_PARAMS cscParams)
481 {
482 VP_FUNC_CALL();
483
484 VP_RENDER_CHK_NULL_RETURN(cscParams);
485
486 VpVeboxRenderData* pRenderData = GetLastExecRenderData();
487 VP_RENDER_ASSERT(pRenderData);
488
489 MHW_VEBOX_CHROMA_SAMPLING& veboxChromaSamplingParams = pRenderData->GetChromaSubSamplingParams();
490
491 veboxChromaSamplingParams.BypassChromaDownsampling = cscParams->bypassCDS;
492 veboxChromaSamplingParams.BypassChromaUpsampling = cscParams->bypassCUS;
493 veboxChromaSamplingParams.ChromaDownsamplingCoSitedHorizontalOffset = cscParams->chromaDownSamplingHorizontalCoef;
494 veboxChromaSamplingParams.ChromaDownsamplingCoSitedVerticalOffset = cscParams->chromaDownSamplingVerticalCoef;
495 veboxChromaSamplingParams.ChromaUpsamplingCoSitedHorizontalOffset = cscParams->chromaUpSamplingHorizontalCoef;
496 veboxChromaSamplingParams.ChromaUpsamplingCoSitedVerticalOffset = cscParams->chromaUpSamplingVerticalCoef;
497
498 return MOS_STATUS_SUCCESS;
499 }
500
SetSfcRotMirParams(PSFC_ROT_MIR_PARAMS rotMirParams)501 MOS_STATUS VpVeboxCmdPacket::SetSfcRotMirParams(PSFC_ROT_MIR_PARAMS rotMirParams)
502 {
503 VP_FUNC_CALL();
504
505 VP_PUBLIC_CHK_NULL_RETURN(rotMirParams);
506
507 if (m_PacketCaps.bSFC)
508 {
509 VP_PUBLIC_CHK_NULL_RETURN(m_sfcRender);
510 VP_PUBLIC_CHK_STATUS_RETURN(m_sfcRender->SetRotMirParams(rotMirParams));
511 return MOS_STATUS_SUCCESS;
512 }
513 else
514 {
515 VP_RENDER_NORMALMESSAGE("CSC/IEF for Output is enabled in SFC, pls recheck the features enabling in SFC");
516 return MOS_STATUS_INVALID_PARAMETER;
517 }
518
519 }
520
521 //!
522 //! \brief Vebox Populate VEBOX parameters
523 //! \details Populate the Vebox VEBOX state parameters to VEBOX RenderData
524 //! \param [in] bDnEnabled
525 //! true if DN being enabled
526 //! \param [in] pChromaParams
527 //! true to Chroma DN being enabled
528 //! \param [in] pLumaParams
529 //! Pointer to Luma DN and DI parameter
530 //! \param [in] pChromaParams
531 //! Pointer to Chroma DN parameter
532 //! \return MOS_STATUS
533 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
534 //!
ConfigDnLumaChromaParams(bool bDnEnabled,bool bChromaDenoise,PVP_SAMPLER_STATE_DN_PARAM pLumaParams,PVPHAL_DNUV_PARAMS pChromaParams)535 MOS_STATUS VpVeboxCmdPacket::ConfigDnLumaChromaParams(
536 bool bDnEnabled,
537 bool bChromaDenoise,
538 PVP_SAMPLER_STATE_DN_PARAM pLumaParams,
539 PVPHAL_DNUV_PARAMS pChromaParams
540 )
541 {
542 VP_FUNC_CALL();
543
544 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
545
546 VP_PUBLIC_CHK_NULL_RETURN(pRenderData);
547
548 MHW_VEBOX_DNDI_PARAMS &veboxDNDIParams = pRenderData->GetDNDIParams();
549
550 // Luma Denoise Params
551 if (bDnEnabled && pLumaParams)
552 {
553 veboxDNDIParams.dwDenoiseASDThreshold = pLumaParams->dwDenoiseASDThreshold;
554 veboxDNDIParams.dwDenoiseHistoryDelta = pLumaParams->dwDenoiseHistoryDelta;
555 veboxDNDIParams.dwDenoiseMaximumHistory = pLumaParams->dwDenoiseMaximumHistory;
556 veboxDNDIParams.dwDenoiseSTADThreshold = pLumaParams->dwDenoiseSTADThreshold;
557 veboxDNDIParams.dwDenoiseSCMThreshold = pLumaParams->dwDenoiseSCMThreshold;
558 veboxDNDIParams.dwDenoiseMPThreshold = pLumaParams->dwDenoiseMPThreshold;
559 veboxDNDIParams.dwLTDThreshold = pLumaParams->dwLTDThreshold;
560 veboxDNDIParams.dwTDThreshold = pLumaParams->dwTDThreshold;
561 veboxDNDIParams.dwGoodNeighborThreshold = pLumaParams->dwGoodNeighborThreshold;
562 }
563
564 // Chroma Denoise Params
565 if (bChromaDenoise && pChromaParams)
566 {
567 veboxDNDIParams.dwChromaSTADThreshold = pChromaParams->dwSTADThresholdU; // Use U threshold for now
568 veboxDNDIParams.dwChromaLTDThreshold = pChromaParams->dwLTDThresholdU; // Use U threshold for now
569 veboxDNDIParams.dwChromaTDThreshold = pChromaParams->dwTDThresholdU; // Use U threshold for now
570 }
571
572 return MOS_STATUS_SUCCESS;
573 }
574
575 //!
576 //! \brief Configure FMD parameter
577 //! \details Configure FMD parameters for DNDI State
578 //! \param [in] bProgressive
579 //! true if sample being progressive
580 //! \param [in] bAutoDenoise
581 //! true if auto denoise being enabled
582 //! \param [out] pLumaParams
583 //! Pointer to DNDI Param for set FMD parameters
584 //! \return MOS_STATUS
585 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
586 //!
ConfigFMDParams(bool bProgressive,bool bAutoDenoise,bool bFmdEnabled)587 MOS_STATUS VpVeboxCmdPacket::ConfigFMDParams(bool bProgressive, bool bAutoDenoise, bool bFmdEnabled)
588 {
589 VP_FUNC_CALL();
590
591 return MOS_STATUS_SUCCESS;
592 }
593
SetDnParams(PVEBOX_DN_PARAMS pDnParams)594 MOS_STATUS VpVeboxCmdPacket::SetDnParams(
595 PVEBOX_DN_PARAMS pDnParams)
596 {
597 VP_FUNC_CALL();
598
599 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
600 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
601 VP_SAMPLER_STATE_DN_PARAM lumaParams = {};
602 VPHAL_DNUV_PARAMS chromaParams = {};
603
604 VP_RENDER_ASSERT(pDnParams);
605 VP_RENDER_ASSERT(pRenderData);
606
607 pRenderData->DN.bDnEnabled = pDnParams->bDnEnabled;
608 pRenderData->DN.bAutoDetect = pDnParams->bAutoDetect;
609 pRenderData->DN.bChromaDnEnabled = pDnParams->bChromaDenoise;
610 pRenderData->DN.bHvsDnEnabled = pDnParams->bEnableHVSDenoise;
611
612 pRenderData->GetDNDIParams().bChromaDNEnable = pDnParams->bChromaDenoise;
613 pRenderData->GetDNDIParams().bProgressiveDN = pDnParams->bDnEnabled && pDnParams->bProgressive;
614 pRenderData->GetHVSParams().QP = pDnParams->HVSDenoise.QP;
615 pRenderData->GetHVSParams().Mode = pDnParams->HVSDenoise.Mode;
616
617 GetDnLumaParams(pDnParams->bDnEnabled, pDnParams->bAutoDetect, pDnParams->fDenoiseFactor, m_PacketCaps.bRefValid, &lumaParams);
618 GetDnChromaParams(pDnParams->bChromaDenoise, pDnParams->bAutoDetect, pDnParams->fDenoiseFactor, &chromaParams);
619
620 // Setup Denoise Params
621 ConfigLumaPixRange(pDnParams->bDnEnabled, pDnParams->bAutoDetect, pDnParams->fDenoiseFactor);
622 ConfigChromaPixRange(pDnParams->bChromaDenoise, pDnParams->bAutoDetect, pDnParams->fDenoiseFactor);
623 ConfigDnLumaChromaParams(pDnParams->bDnEnabled, pDnParams->bChromaDenoise, &lumaParams, &chromaParams);
624
625 // bDNDITopFirst in DNDI parameters need be configured during SetDIParams.
626
627 return eStatus;
628 }
629
SetSteParams(PVEBOX_STE_PARAMS pSteParams)630 MOS_STATUS VpVeboxCmdPacket::SetSteParams(
631 PVEBOX_STE_PARAMS pSteParams)
632 {
633 VP_FUNC_CALL();
634
635 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
636 MHW_VEBOX_IECP_PARAMS& mhwVeboxIecpParams = pRenderData->GetIECPParams();
637
638 VP_RENDER_ASSERT(pSteParams);
639 VP_RENDER_ASSERT(pRenderData);
640
641 if (pSteParams->bEnableSTE)
642 {
643 pRenderData->IECP.STE.bSteEnabled = true;
644 mhwVeboxIecpParams.ColorPipeParams.bActive = true;
645 mhwVeboxIecpParams.ColorPipeParams.bEnableSTE = true;
646
647 if (pSteParams->dwSTEFactor > MHW_STE_FACTOR_MAX)
648 {
649 mhwVeboxIecpParams.ColorPipeParams.SteParams.dwSTEFactor = MHW_STE_FACTOR_MAX;
650 mhwVeboxIecpParams.ColorPipeParams.SteParams.satP1 = m_satP1Table[MHW_STE_FACTOR_MAX];
651 mhwVeboxIecpParams.ColorPipeParams.SteParams.satS0 = m_satS0Table[MHW_STE_FACTOR_MAX];
652 mhwVeboxIecpParams.ColorPipeParams.SteParams.satS1 = m_satS1Table[MHW_STE_FACTOR_MAX];
653 }
654 else
655 {
656 mhwVeboxIecpParams.ColorPipeParams.SteParams.dwSTEFactor = pSteParams->dwSTEFactor;
657 mhwVeboxIecpParams.ColorPipeParams.SteParams.satP1 = m_satP1Table[pSteParams->dwSTEFactor];
658 mhwVeboxIecpParams.ColorPipeParams.SteParams.satS0 = m_satS0Table[pSteParams->dwSTEFactor];
659 mhwVeboxIecpParams.ColorPipeParams.SteParams.satS1 = m_satS1Table[pSteParams->dwSTEFactor];
660 }
661 }
662 else
663 {
664 pRenderData->IECP.STE.bSteEnabled = false;
665 mhwVeboxIecpParams.ColorPipeParams.bEnableSTE = false;
666 }
667
668 return MOS_STATUS_SUCCESS;
669 }
670
SetTccParams(PVEBOX_TCC_PARAMS pTccParams)671 MOS_STATUS VpVeboxCmdPacket::SetTccParams(
672 PVEBOX_TCC_PARAMS pTccParams)
673 {
674 VP_FUNC_CALL();
675
676 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
677 MHW_VEBOX_IECP_PARAMS& mhwVeboxIecpParams = pRenderData->GetIECPParams();
678
679 VP_RENDER_ASSERT(pTccParams);
680 VP_RENDER_ASSERT(pRenderData);
681
682 if (pTccParams->bEnableTCC)
683 {
684 pRenderData->IECP.TCC.bTccEnabled = true;
685 mhwVeboxIecpParams.ColorPipeParams.bActive = true;
686 mhwVeboxIecpParams.ColorPipeParams.bEnableTCC = true;
687 mhwVeboxIecpParams.ColorPipeParams.TccParams.Magenta = pTccParams->Magenta;
688 mhwVeboxIecpParams.ColorPipeParams.TccParams.Red = pTccParams->Red;
689 mhwVeboxIecpParams.ColorPipeParams.TccParams.Yellow = pTccParams->Yellow;
690 mhwVeboxIecpParams.ColorPipeParams.TccParams.Green = pTccParams->Green;
691 mhwVeboxIecpParams.ColorPipeParams.TccParams.Cyan = pTccParams->Cyan;
692 mhwVeboxIecpParams.ColorPipeParams.TccParams.Blue = pTccParams->Blue;
693 }
694 else
695 {
696 pRenderData->IECP.TCC.bTccEnabled = false;
697 mhwVeboxIecpParams.ColorPipeParams.bEnableTCC = false;
698 }
699
700 return MOS_STATUS_SUCCESS;
701 }
702
SetProcampParams(PVEBOX_PROCAMP_PARAMS pProcampParams)703 MOS_STATUS VpVeboxCmdPacket::SetProcampParams(
704 PVEBOX_PROCAMP_PARAMS pProcampParams)
705 {
706 VP_FUNC_CALL();
707
708 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
709 MHW_VEBOX_IECP_PARAMS& mhwVeboxIecpParams = pRenderData->GetIECPParams();
710
711 VP_RENDER_ASSERT(pProcampParams);
712 VP_RENDER_ASSERT(pRenderData);
713
714 if (pProcampParams->bEnableProcamp)
715 {
716 pRenderData->IECP.PROCAMP.bProcampEnabled = true;
717 mhwVeboxIecpParams.ProcAmpParams.bActive = true;
718 mhwVeboxIecpParams.ProcAmpParams.bEnabled = true;
719 mhwVeboxIecpParams.ProcAmpParams.brightness = (uint32_t)MOS_F_ROUND(pProcampParams->fBrightness * 16.0F); // S7.4
720 mhwVeboxIecpParams.ProcAmpParams.contrast = (uint32_t)MOS_UF_ROUND(pProcampParams->fContrast * 128.0F); // U4.7
721 mhwVeboxIecpParams.ProcAmpParams.sinCS = (uint32_t)MOS_F_ROUND(sin(MHW_DEGREE_TO_RADIAN(pProcampParams->fHue)) *
722 pProcampParams->fContrast *
723 pProcampParams->fSaturation * 256.0F); // S7.8
724 mhwVeboxIecpParams.ProcAmpParams.cosCS = (uint32_t)MOS_F_ROUND(cos(MHW_DEGREE_TO_RADIAN(pProcampParams->fHue)) *
725 pProcampParams->fContrast *
726 pProcampParams->fSaturation * 256.0F); // S7.8
727 }
728 else
729 {
730 pRenderData->IECP.PROCAMP.bProcampEnabled = false;
731 mhwVeboxIecpParams.ProcAmpParams.bActive = false;
732 mhwVeboxIecpParams.ProcAmpParams.bEnabled = false;
733 }
734
735 return MOS_STATUS_SUCCESS;
736 }
737
IsTopField(VPHAL_SAMPLE_TYPE sampleType)738 bool VpVeboxCmdPacket::IsTopField(VPHAL_SAMPLE_TYPE sampleType)
739 {
740 return sampleType == SAMPLE_INTERLEAVED_EVEN_FIRST_TOP_FIELD ||
741 sampleType == SAMPLE_INTERLEAVED_ODD_FIRST_TOP_FIELD;
742 }
743
IsTopFieldFirst(VPHAL_SAMPLE_TYPE sampleType)744 bool VpVeboxCmdPacket::IsTopFieldFirst(VPHAL_SAMPLE_TYPE sampleType)
745 {
746 return m_DNDIFirstFrame ?
747 IsTopField(sampleType) : // For no reference case, just do DI for current field.
748 (sampleType == SAMPLE_INTERLEAVED_EVEN_FIRST_TOP_FIELD ||
749 sampleType == SAMPLE_INTERLEAVED_EVEN_FIRST_BOTTOM_FIELD);
750 }
751
SetDiParams(PVEBOX_DI_PARAMS diParams)752 MOS_STATUS VpVeboxCmdPacket::SetDiParams(PVEBOX_DI_PARAMS diParams)
753 {
754 VP_FUNC_CALL();
755
756 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
757 VpVeboxRenderData *renderData = GetLastExecRenderData();
758 VP_SAMPLER_STATE_DN_PARAM lumaParams = {};
759 VPHAL_DNUV_PARAMS chromaParams = {};
760
761 VP_PUBLIC_CHK_NULL_RETURN(diParams);
762 VP_PUBLIC_CHK_NULL_RETURN(renderData);
763
764 renderData->DI.value = 0;
765 renderData->DI.bDeinterlace = diParams->bDiEnabled;
766 renderData->DI.bQueryVariance = diParams->bEnableQueryVariance;
767 renderData->DI.bTFF = IsTopFieldFirst(diParams->sampleTypeInput);
768 renderData->DI.bFmdEnabled = diParams->enableFMD;
769
770 // for 30i->30fps + SFC
771 if (m_PacketCaps.bSFC && !diParams->b60fpsDi)
772 {
773 // Set BLT1's Current DI Output as BLT2's input, it is always under Mode0
774 // BLT1 output 1st field of current frame for the following cases:
775 if (m_DNDIFirstFrame ||
776 (diParams->sampleTypeInput == SAMPLE_INTERLEAVED_ODD_FIRST_BOTTOM_FIELD) ||
777 (diParams->sampleTypeInput == SAMPLE_INTERLEAVED_EVEN_FIRST_TOP_FIELD) ||
778 (diParams->sampleTypeInput == SAMPLE_SINGLE_TOP_FIELD) ||
779 (diParams->sampleTypeInput == SAMPLE_PROGRESSIVE))
780 {
781 m_DIOutputFrames = MEDIA_VEBOX_DI_OUTPUT_CURRENT;
782 }
783 else
784 {
785 // First sample output - 2nd field of the previous frame
786 m_DIOutputFrames = MEDIA_VEBOX_DI_OUTPUT_PREVIOUS;
787 }
788 }
789 // for 30i->60fps or other 30i->30fps cases
790 else
791 {
792 m_DIOutputFrames = m_DNDIFirstFrame ?
793 MEDIA_VEBOX_DI_OUTPUT_CURRENT :
794 MEDIA_VEBOX_DI_OUTPUT_BOTH;
795 }
796
797 VP_PUBLIC_CHK_STATUS_RETURN(SetDiParams(diParams->bDiEnabled, diParams->bSCDEnabled, diParams->bHDContent, diParams->sampleTypeInput, renderData->GetDNDIParams()));
798
799 return eStatus;
800 }
801
SetDiParams(bool bDiEnabled,bool bSCDEnabled,bool bHDContent,VPHAL_SAMPLE_TYPE sampleTypeInput,MHW_VEBOX_DNDI_PARAMS & param)802 MOS_STATUS VpVeboxCmdPacket::SetDiParams(bool bDiEnabled, bool bSCDEnabled, bool bHDContent, VPHAL_SAMPLE_TYPE sampleTypeInput, MHW_VEBOX_DNDI_PARAMS ¶m)
803 {
804 VP_FUNC_CALL();
805
806 if (!bDiEnabled)
807 {
808 return MOS_STATUS_SUCCESS;
809 }
810
811 param.bDNDITopFirst = IsTopFieldFirst(sampleTypeInput);
812 param.dwLumaTDMWeight = VPHAL_VEBOX_DI_LUMA_TDM_WEIGHT_NATUAL;
813 param.dwChromaTDMWeight = VPHAL_VEBOX_DI_CHROMA_TDM_WEIGHT_NATUAL;
814 param.dwSHCMDelta = VPHAL_VEBOX_DI_SHCM_DELTA_NATUAL;
815 param.dwSHCMThreshold = VPHAL_VEBOX_DI_SHCM_THRESHOLD_NATUAL;
816 param.dwSVCMDelta = VPHAL_VEBOX_DI_SVCM_DELTA_NATUAL;
817 param.dwSVCMThreshold = VPHAL_VEBOX_DI_SVCM_THRESHOLD_NATUAL;
818 param.bFasterConvergence = false;
819 param.bTDMLumaSmallerWindow = false;
820 param.bTDMChromaSmallerWindow = false;
821 param.dwLumaTDMCoringThreshold = VPHAL_VEBOX_DI_LUMA_TDM_CORING_THRESHOLD_NATUAL;
822 param.dwChromaTDMCoringThreshold = VPHAL_VEBOX_DI_CHROMA_TDM_CORING_THRESHOLD_NATUAL;
823 param.bBypassDeflickerFilter = true;
824 param.bUseSyntheticContentMedian = false;
825 param.bLocalCheck = true;
826 param.bSyntheticContentCheck = false;
827 param.dwDirectionCheckThreshold = VPHAL_VEBOX_DI_DIRECTION_CHECK_THRESHOLD_NATUAL;
828 param.dwTearingLowThreshold = VPHAL_VEBOX_DI_TEARING_LOW_THRESHOLD_NATUAL;
829 param.dwTearingHighThreshold = VPHAL_VEBOX_DI_TEARING_HIGH_THRESHOLD_NATUAL;
830 param.dwDiffCheckSlackThreshold = VPHAL_VEBOX_DI_DIFF_CHECK_SLACK_THRESHOLD_NATUAL;
831 param.dwSADWT0 = VPHAL_VEBOX_DI_SAD_WT0_NATUAL;
832 param.dwSADWT1 = VPHAL_VEBOX_DI_SAD_WT1_NATUAL;
833 param.dwSADWT2 = VPHAL_VEBOX_DI_SAD_WT2_NATUAL;
834 param.dwSADWT3 = VPHAL_VEBOX_DI_SAD_WT3_NATUAL;
835 param.dwSADWT4 = VPHAL_VEBOX_DI_SAD_WT4_NATUAL;
836 param.dwSADWT6 = VPHAL_VEBOX_DI_SAD_WT6_NATUAL;
837 param.bSCDEnable = bSCDEnabled;
838
839 if (bHDContent)
840 {
841 param.dwLPFWtLUT0 = VPHAL_VEBOX_DI_LPFWTLUT0_HD_NATUAL;
842 param.dwLPFWtLUT1 = VPHAL_VEBOX_DI_LPFWTLUT1_HD_NATUAL;
843 param.dwLPFWtLUT2 = VPHAL_VEBOX_DI_LPFWTLUT2_HD_NATUAL;
844 param.dwLPFWtLUT3 = VPHAL_VEBOX_DI_LPFWTLUT3_HD_NATUAL;
845 param.dwLPFWtLUT4 = VPHAL_VEBOX_DI_LPFWTLUT4_HD_NATUAL;
846 param.dwLPFWtLUT5 = VPHAL_VEBOX_DI_LPFWTLUT5_HD_NATUAL;
847 param.dwLPFWtLUT6 = VPHAL_VEBOX_DI_LPFWTLUT6_HD_NATUAL;
848 param.dwLPFWtLUT7 = VPHAL_VEBOX_DI_LPFWTLUT7_HD_NATUAL;
849 }
850 else
851 {
852 param.dwLPFWtLUT0 = VPHAL_VEBOX_DI_LPFWTLUT0_SD_NATUAL;
853 param.dwLPFWtLUT1 = VPHAL_VEBOX_DI_LPFWTLUT1_SD_NATUAL;
854 param.dwLPFWtLUT2 = VPHAL_VEBOX_DI_LPFWTLUT2_SD_NATUAL;
855 param.dwLPFWtLUT3 = VPHAL_VEBOX_DI_LPFWTLUT3_SD_NATUAL;
856 param.dwLPFWtLUT4 = VPHAL_VEBOX_DI_LPFWTLUT4_SD_NATUAL;
857 param.dwLPFWtLUT5 = VPHAL_VEBOX_DI_LPFWTLUT5_SD_NATUAL;
858 param.dwLPFWtLUT6 = VPHAL_VEBOX_DI_LPFWTLUT6_SD_NATUAL;
859 param.dwLPFWtLUT7 = VPHAL_VEBOX_DI_LPFWTLUT7_SD_NATUAL;
860 }
861
862 return MOS_STATUS_SUCCESS;
863 }
864
SetupDiIecpState(bool bDiScdEnable,PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)865 MOS_STATUS VpVeboxCmdPacket::SetupDiIecpState(
866 bool bDiScdEnable,
867 PMHW_VEBOX_DI_IECP_CMD_PARAMS pVeboxDiIecpCmdParams)
868 {
869 VP_FUNC_CALL();
870
871 uint32_t dwWidth = 0;
872 uint32_t dwHeight = 0;
873 MHW_VEBOX_SURFACE_PARAMS MhwVeboxSurfaceParam = {};
874 PMHW_VEBOX_INTERFACE pVeboxInterface = nullptr;
875 MHW_VEBOX_SURFACE_CNTL_PARAMS VeboxSurfCntlParams = {};
876 PVP_SURFACE pSurface = nullptr;
877 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
878
879 VP_RENDER_CHK_NULL_RETURN(m_hwInterface);
880 pVeboxInterface = m_hwInterface->m_veboxInterface;
881
882 VP_RENDER_CHK_NULL_RETURN(pVeboxInterface);
883 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pCurrInput);
884 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pCurrInput->osSurface);
885 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pStatisticsOutput);
886 VP_RENDER_CHK_NULL_RETURN(m_surfMemCacheCtl);
887
888 MOS_ZeroMemory(pVeboxDiIecpCmdParams, sizeof(*pVeboxDiIecpCmdParams));
889
890 // Align dwEndingX with surface state
891 VP_RENDER_CHK_STATUS_RETURN(InitVeboxSurfaceParams(
892 m_veboxPacketSurface.pCurrInput, &MhwVeboxSurfaceParam));
893 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->VeboxAdjustBoundary(
894 &MhwVeboxSurfaceParam,
895 &dwWidth,
896 &dwHeight,
897 m_PacketCaps.bDI));
898
899 pVeboxDiIecpCmdParams->dwStartingX = 0;
900 pVeboxDiIecpCmdParams->dwEndingX = dwWidth-1;
901
902 pVeboxDiIecpCmdParams->pOsResCurrInput = &m_veboxPacketSurface.pCurrInput->osSurface->OsResource;
903 pVeboxDiIecpCmdParams->dwCurrInputSurfOffset = m_veboxPacketSurface.pCurrInput->osSurface->dwOffset;
904 pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value = m_surfMemCacheCtl->DnDi.CurrentInputSurfMemObjCtl;
905
906 // Update control bits for current surface
907 if (m_mmc->IsMmcEnabled())
908 {
909 pSurface = m_veboxPacketSurface.pCurrInput;
910 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
911 VeboxSurfCntlParams.bIsCompressed = pSurface->osSurface->bIsCompressed;
912 VeboxSurfCntlParams.CompressionMode = pSurface->osSurface->CompressionMode;
913 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->AddVeboxSurfaceControlBits(
914 &VeboxSurfCntlParams,
915 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrInputSurfCtrl.Value)));
916 }
917
918 // Reference surface
919 if (m_veboxPacketSurface.pPrevInput)
920 {
921 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pPrevInput->osSurface);
922 pVeboxDiIecpCmdParams->pOsResPrevInput = &m_veboxPacketSurface.pPrevInput->osSurface->OsResource;
923 pVeboxDiIecpCmdParams->dwPrevInputSurfOffset = m_veboxPacketSurface.pPrevInput->osSurface->dwOffset;
924 pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value = m_surfMemCacheCtl->DnDi.PreviousInputSurfMemObjCtl;
925
926 // Update control bits for PastSurface surface
927 if (m_mmc->IsMmcEnabled())
928 {
929 pSurface = m_veboxPacketSurface.pPrevInput;
930 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
931 VeboxSurfCntlParams.bIsCompressed = pSurface->osSurface->bIsCompressed;
932 VeboxSurfCntlParams.CompressionMode = pSurface->osSurface->CompressionMode;
933 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->AddVeboxSurfaceControlBits(
934 &VeboxSurfCntlParams,
935 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevInputSurfCtrl.Value)));
936 }
937 }
938
939 // VEBOX final output surface
940 if (m_veboxPacketSurface.pCurrOutput)
941 {
942 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pCurrOutput->osSurface);
943 pVeboxDiIecpCmdParams->pOsResCurrOutput = &m_veboxPacketSurface.pCurrOutput->osSurface->OsResource;
944 pVeboxDiIecpCmdParams->dwCurrOutputSurfOffset = m_veboxPacketSurface.pCurrOutput->osSurface->dwOffset;
945 pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value = m_surfMemCacheCtl->DnDi.CurrentOutputSurfMemObjCtl;
946
947 // Update control bits for Current Output Surf
948 if (m_mmc->IsMmcEnabled())
949 {
950 pSurface = m_veboxPacketSurface.pCurrOutput;
951 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
952 VeboxSurfCntlParams.bIsCompressed = pSurface->osSurface->bIsCompressed;
953 VeboxSurfCntlParams.CompressionMode = pSurface->osSurface->CompressionMode;
954 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->AddVeboxSurfaceControlBits(
955 &VeboxSurfCntlParams,
956 (uint32_t *)&(pVeboxDiIecpCmdParams->CurrOutputSurfCtrl.Value)));
957 }
958 }
959
960 if (m_veboxPacketSurface.pPrevOutput)
961 {
962 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pPrevOutput->osSurface);
963 pVeboxDiIecpCmdParams->pOsResPrevOutput = &m_veboxPacketSurface.pPrevOutput->osSurface->OsResource;
964 pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value = m_surfMemCacheCtl->DnDi.CurrentOutputSurfMemObjCtl;
965
966 // Update control bits for PrevOutput surface
967 if (m_mmc->IsMmcEnabled())
968 {
969 pSurface = m_veboxPacketSurface.pPrevOutput;
970 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
971 VeboxSurfCntlParams.bIsCompressed = pSurface->osSurface->bIsCompressed;
972 VeboxSurfCntlParams.CompressionMode = pSurface->osSurface->CompressionMode;
973 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->AddVeboxSurfaceControlBits(
974 &VeboxSurfCntlParams,
975 (uint32_t *)&(pVeboxDiIecpCmdParams->PrevOutputSurfCtrl.Value)));
976 }
977 }
978
979 // DN intermediate output surface
980 if (m_veboxPacketSurface.pDenoisedCurrOutput)
981 {
982 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pDenoisedCurrOutput->osSurface);
983 pVeboxDiIecpCmdParams->pOsResDenoisedCurrOutput = &m_veboxPacketSurface.pDenoisedCurrOutput->osSurface->OsResource;
984 pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value = m_surfMemCacheCtl->DnDi.DnOutSurfMemObjCtl;
985
986 // Update control bits for DenoisedCurrOutputSurf surface
987 if (m_mmc->IsMmcEnabled())
988 {
989 pSurface = m_veboxPacketSurface.pDenoisedCurrOutput;
990 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
991 VeboxSurfCntlParams.bIsCompressed = pSurface->osSurface->bIsCompressed;
992 VeboxSurfCntlParams.CompressionMode = pSurface->osSurface->CompressionMode;
993 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
994 &VeboxSurfCntlParams,
995 (uint32_t *)&(pVeboxDiIecpCmdParams->DenoisedCurrOutputSurfCtrl.Value)));
996 }
997 }
998
999 // STMM surface
1000 if (m_veboxPacketSurface.pSTMMInput && m_veboxPacketSurface.pSTMMOutput)
1001 {
1002 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pSTMMInput->osSurface);
1003 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pSTMMOutput->osSurface);
1004
1005 // STMM in
1006 pVeboxDiIecpCmdParams->pOsResStmmInput = &m_veboxPacketSurface.pSTMMInput->osSurface->OsResource;
1007 pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value = m_surfMemCacheCtl->DnDi.STMMInputSurfMemObjCtl;
1008
1009 // Update control bits for stmm input surface
1010 if (m_mmc->IsMmcEnabled())
1011 {
1012 pSurface = m_veboxPacketSurface.pSTMMInput;
1013 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1014 VeboxSurfCntlParams.bIsCompressed = pSurface->osSurface->bIsCompressed;
1015 VeboxSurfCntlParams.CompressionMode = pSurface->osSurface->CompressionMode;
1016 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1017 &VeboxSurfCntlParams,
1018 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmInputSurfCtrl.Value)));
1019 }
1020
1021 // STMM out
1022 pVeboxDiIecpCmdParams->pOsResStmmOutput = &m_veboxPacketSurface.pSTMMOutput->osSurface->OsResource;
1023 pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value = m_surfMemCacheCtl->DnDi.STMMOutputSurfMemObjCtl;
1024
1025 // Update control bits for stmm output surface
1026 if (m_mmc->IsMmcEnabled())
1027 {
1028 pSurface = m_veboxPacketSurface.pSTMMOutput;
1029 MOS_ZeroMemory(&VeboxSurfCntlParams, sizeof(VeboxSurfCntlParams));
1030 VeboxSurfCntlParams.bIsCompressed = pSurface->osSurface->bIsCompressed;
1031 VeboxSurfCntlParams.CompressionMode = pSurface->osSurface->CompressionMode;
1032 VPHAL_RENDER_CHK_STATUS(pVeboxInterface->AddVeboxSurfaceControlBits(
1033 &VeboxSurfCntlParams,
1034 (uint32_t *)&(pVeboxDiIecpCmdParams->StmmOutputSurfCtrl.Value)));
1035 }
1036 }
1037
1038 pVeboxDiIecpCmdParams->pOsResStatisticsOutput = &m_veboxPacketSurface.pStatisticsOutput->osSurface->OsResource;
1039 pVeboxDiIecpCmdParams->StatisticsOutputSurfCtrl.Value = m_surfMemCacheCtl->DnDi.StatisticsOutputSurfMemObjCtl;
1040
1041 finish:
1042 return eStatus;
1043 }
1044
UseKernelResource()1045 bool VpVeboxCmdPacket::UseKernelResource()
1046 {
1047 VP_FUNC_CALL();
1048
1049 return false;
1050 }
1051
InitVeboxSurfaceParams(PVP_SURFACE pVpHalVeboxSurface,PMHW_VEBOX_SURFACE_PARAMS pMhwVeboxSurface)1052 MOS_STATUS VpVeboxCmdPacket::InitVeboxSurfaceParams(
1053 PVP_SURFACE pVpHalVeboxSurface,
1054 PMHW_VEBOX_SURFACE_PARAMS pMhwVeboxSurface)
1055 {
1056 VP_FUNC_CALL();
1057
1058 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1059
1060 VP_RENDER_CHK_NULL_RETURN(pVpHalVeboxSurface);
1061 VP_RENDER_CHK_NULL_RETURN(pVpHalVeboxSurface->osSurface);
1062 VP_RENDER_CHK_NULL_RETURN(pMhwVeboxSurface);
1063
1064 MOS_ZeroMemory(pMhwVeboxSurface, sizeof(*pMhwVeboxSurface));
1065 pMhwVeboxSurface->bActive = true;
1066 pMhwVeboxSurface->Format = pVpHalVeboxSurface->osSurface->Format;
1067 pMhwVeboxSurface->dwWidth = pVpHalVeboxSurface->osSurface->dwWidth;
1068 pMhwVeboxSurface->dwHeight = pVpHalVeboxSurface->osSurface->dwHeight;
1069 pMhwVeboxSurface->dwPitch = pVpHalVeboxSurface->osSurface->dwPitch;
1070 pMhwVeboxSurface->dwBitDepth = pVpHalVeboxSurface->osSurface->dwDepth;
1071 pMhwVeboxSurface->TileType = pVpHalVeboxSurface->osSurface->TileType;
1072 pMhwVeboxSurface->TileModeGMM = pVpHalVeboxSurface->osSurface->TileModeGMM;
1073 pMhwVeboxSurface->bGMMTileEnabled = pVpHalVeboxSurface->osSurface->bGMMTileEnabled;
1074 if (pVpHalVeboxSurface->rcMaxSrc.top == pVpHalVeboxSurface->rcMaxSrc.bottom ||
1075 pVpHalVeboxSurface->rcMaxSrc.left == pVpHalVeboxSurface->rcMaxSrc.right)
1076 {
1077 // If rcMaxSrc is invalid, just use rcSrc.
1078 pMhwVeboxSurface->rcMaxSrc = pVpHalVeboxSurface->rcSrc;
1079 }
1080 else
1081 {
1082 pMhwVeboxSurface->rcMaxSrc = pVpHalVeboxSurface->rcMaxSrc;
1083 }
1084 pMhwVeboxSurface->rcSrc = pVpHalVeboxSurface->rcSrc;
1085 pMhwVeboxSurface->bVEBOXCroppingUsed = pVpHalVeboxSurface->bVEBOXCroppingUsed;
1086 pMhwVeboxSurface->pOsResource = &pVpHalVeboxSurface->osSurface->OsResource;
1087 pMhwVeboxSurface->bIsCompressed = pVpHalVeboxSurface->osSurface->bIsCompressed;
1088
1089 if (pVpHalVeboxSurface->osSurface->dwPitch > 0)
1090 {
1091 pMhwVeboxSurface->dwUYoffset = ((pVpHalVeboxSurface->osSurface->UPlaneOffset.iSurfaceOffset - pVpHalVeboxSurface->osSurface->YPlaneOffset.iSurfaceOffset) / pVpHalVeboxSurface->osSurface->dwPitch)
1092 + pVpHalVeboxSurface->osSurface->UPlaneOffset.iYOffset;
1093 }
1094 return eStatus;
1095 }
1096
SendVeboxCmd(MOS_COMMAND_BUFFER * commandBuffer)1097 MOS_STATUS VpVeboxCmdPacket::SendVeboxCmd(MOS_COMMAND_BUFFER* commandBuffer)
1098 {
1099 VP_FUNC_CALL();
1100
1101 MOS_STATUS eStatus;
1102 int32_t iRemaining;
1103 MHW_VEBOX_DI_IECP_CMD_PARAMS VeboxDiIecpCmdParams;
1104 VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS VeboxSurfaceStateCmdParams;
1105 MHW_VEBOX_SURFACE_STATE_CMD_PARAMS MhwVeboxSurfaceStateCmdParams;
1106 MHW_VEBOX_STATE_CMD_PARAMS VeboxStateCmdParams;
1107 MHW_MI_FLUSH_DW_PARAMS FlushDwParams;
1108 PMHW_VEBOX_INTERFACE pVeboxInterface;
1109 RENDERHAL_GENERIC_PROLOG_PARAMS GenericPrologParams;
1110
1111 eStatus = MOS_STATUS_SUCCESS;
1112 pVeboxInterface = m_hwInterface->m_veboxInterface;
1113 iRemaining = 0;
1114
1115 VP_RENDER_CHK_NULL_RETURN(commandBuffer);
1116
1117 eStatus = PrepareVeboxCmd(
1118 commandBuffer,
1119 GenericPrologParams,
1120 iRemaining);
1121
1122 if (eStatus != MOS_STATUS_SUCCESS)
1123 {
1124 CmdErrorHanlde(commandBuffer, iRemaining);
1125 }
1126 else
1127 {
1128 eStatus = RenderVeboxCmd(
1129 commandBuffer,
1130 VeboxDiIecpCmdParams,
1131 VeboxSurfaceStateCmdParams,
1132 MhwVeboxSurfaceStateCmdParams,
1133 VeboxStateCmdParams,
1134 FlushDwParams,
1135 &GenericPrologParams);
1136 if (eStatus != MOS_STATUS_SUCCESS)
1137 {
1138 // Failed -> discard all changes in Command Buffer
1139 CmdErrorHanlde(commandBuffer, iRemaining);
1140 }
1141 }
1142
1143 return eStatus;
1144 }
1145
CmdErrorHanlde(MOS_COMMAND_BUFFER * CmdBuffer,int32_t & iRemaining)1146 void VpVeboxCmdPacket::CmdErrorHanlde(
1147 MOS_COMMAND_BUFFER *CmdBuffer,
1148 int32_t &iRemaining)
1149 {
1150 VP_FUNC_CALL();
1151
1152 int32_t i= 0;
1153
1154 VP_PUBLIC_CHK_NULL_NO_STATUS_RETURN(CmdBuffer);
1155 // Buffer overflow - display overflow size
1156 if (CmdBuffer->iRemaining < 0)
1157 {
1158 VP_RENDER_ASSERTMESSAGE("Command Buffer overflow by %d bytes", CmdBuffer->iRemaining);
1159 }
1160
1161 // Move command buffer back to beginning
1162 i = iRemaining - CmdBuffer->iRemaining;
1163 CmdBuffer->iRemaining = iRemaining;
1164 CmdBuffer->iOffset -= i;
1165 CmdBuffer->pCmdPtr = CmdBuffer->pCmdBase + CmdBuffer->iOffset / sizeof(uint32_t);
1166 }
1167
PrepareVeboxCmd(MOS_COMMAND_BUFFER * CmdBuffer,RENDERHAL_GENERIC_PROLOG_PARAMS & GenericPrologParams,int32_t & iRemaining)1168 MOS_STATUS VpVeboxCmdPacket::PrepareVeboxCmd(
1169 MOS_COMMAND_BUFFER* CmdBuffer,
1170 RENDERHAL_GENERIC_PROLOG_PARAMS& GenericPrologParams,
1171 int32_t& iRemaining)
1172 {
1173 VP_FUNC_CALL();
1174
1175 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1176 PMOS_INTERFACE pOsInterface = m_hwInterface->m_osInterface;
1177 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
1178 PMOS_RESOURCE gpuStatusBuffer = nullptr;
1179
1180 VP_RENDER_CHK_NULL_RETURN(CmdBuffer);
1181 VP_RENDER_CHK_NULL_RETURN(pOsInterface);
1182 VP_RENDER_CHK_NULL_RETURN(m_currentSurface);
1183 VP_RENDER_CHK_NULL_RETURN(m_currentSurface->osSurface);
1184
1185 // Set initial state
1186 iRemaining = CmdBuffer->iRemaining;
1187
1188 //---------------------------
1189 // Set Performance Tags
1190 //---------------------------
1191 VP_RENDER_CHK_STATUS_RETURN(VeboxSetPerfTag());
1192 pOsInterface->pfnResetPerfBufferID(pOsInterface);
1193 pOsInterface->pfnSetPerfTag(pOsInterface, pRenderData->PerfTag);
1194
1195 MOS_ZeroMemory(&GenericPrologParams, sizeof(GenericPrologParams));
1196
1197 VP_RENDER_CHK_STATUS_RETURN(SetMediaFrameTracking(GenericPrologParams));
1198
1199 return eStatus;
1200 }
1201
RenderVeboxCmd(MOS_COMMAND_BUFFER * CmdBuffer,MHW_VEBOX_DI_IECP_CMD_PARAMS & VeboxDiIecpCmdParams,VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS & VeboxSurfaceStateCmdParams,MHW_VEBOX_SURFACE_STATE_CMD_PARAMS & MhwVeboxSurfaceStateCmdParams,MHW_VEBOX_STATE_CMD_PARAMS & VeboxStateCmdParams,MHW_MI_FLUSH_DW_PARAMS & FlushDwParams,PRENDERHAL_GENERIC_PROLOG_PARAMS pGenericPrologParams)1202 MOS_STATUS VpVeboxCmdPacket::RenderVeboxCmd(
1203 MOS_COMMAND_BUFFER *CmdBuffer,
1204 MHW_VEBOX_DI_IECP_CMD_PARAMS &VeboxDiIecpCmdParams,
1205 VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS &VeboxSurfaceStateCmdParams,
1206 MHW_VEBOX_SURFACE_STATE_CMD_PARAMS &MhwVeboxSurfaceStateCmdParams,
1207 MHW_VEBOX_STATE_CMD_PARAMS &VeboxStateCmdParams,
1208 MHW_MI_FLUSH_DW_PARAMS &FlushDwParams,
1209 PRENDERHAL_GENERIC_PROLOG_PARAMS pGenericPrologParams)
1210 {
1211 VP_FUNC_CALL();
1212
1213 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1214 PRENDERHAL_INTERFACE pRenderHal;
1215 PMOS_INTERFACE pOsInterface;
1216 PMHW_MI_INTERFACE pMhwMiInterface;
1217 PMHW_VEBOX_INTERFACE pVeboxInterface;
1218 bool bDiVarianceEnable;
1219 const MHW_VEBOX_HEAP *pVeboxHeap = nullptr;
1220 VpVeboxRenderData * pRenderData = GetLastExecRenderData();
1221 MediaPerfProfiler * pPerfProfiler = nullptr;
1222 MOS_CONTEXT * pOsContext = nullptr;
1223 PMHW_MI_MMIOREGISTERS pMmioRegisters = nullptr;
1224 MOS_COMMAND_BUFFER CmdBufferInUse;
1225 PMOS_COMMAND_BUFFER pCmdBufferInUse = nullptr;
1226 uint32_t curPipe = 0;
1227 uint8_t inputPipe = 0;
1228 uint32_t numPipe = 1;
1229 bool bMultipipe = false;
1230
1231 VP_RENDER_CHK_NULL_RETURN(m_hwInterface->m_renderHal);
1232 VP_RENDER_CHK_NULL_RETURN(m_hwInterface->m_mhwMiInterface);
1233 VP_RENDER_CHK_NULL_RETURN(m_hwInterface->m_osInterface);
1234 VP_RENDER_CHK_NULL_RETURN(m_hwInterface->m_veboxInterface);
1235 VP_RENDER_CHK_NULL_RETURN(m_hwInterface->m_osInterface->pOsContext);
1236 VP_RENDER_CHK_NULL_RETURN(m_hwInterface->m_mhwMiInterface->GetMmioRegisters());
1237 VP_RENDER_CHK_NULL_RETURN(pRenderData);
1238 VP_RENDER_CHK_NULL_RETURN(CmdBuffer);
1239
1240 pRenderHal = m_hwInterface->m_renderHal;
1241 pMhwMiInterface = m_hwInterface->m_mhwMiInterface;
1242 pOsInterface = m_hwInterface->m_osInterface;
1243 pVeboxInterface = m_hwInterface->m_veboxInterface;
1244 pPerfProfiler = pRenderHal->pPerfProfiler;
1245 pOsContext = m_hwInterface->m_osInterface->pOsContext;
1246 pMmioRegisters = pMhwMiInterface->GetMmioRegisters();
1247 pCmdBufferInUse = CmdBuffer;
1248
1249 auto scalability = GetMediaScalability();
1250
1251 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->GetVeboxHeapInfo(&pVeboxHeap));
1252 VP_RENDER_CHK_NULL_RETURN(pVeboxHeap);
1253
1254 #ifdef _MMC_SUPPORTED
1255
1256 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->setVeboxPrologCmd(pMhwMiInterface, CmdBuffer));
1257
1258 #endif
1259
1260 // Initialize the scalability
1261 curPipe = scalability->GetCurrentPipe();
1262 inputPipe = (uint8_t)curPipe;
1263 numPipe = scalability->GetPipeNumber();
1264 bMultipipe = (numPipe > 1) ? true : false;
1265 pVeboxInterface->SetVeboxIndex(0, numPipe, m_IsSfcUsed);
1266
1267 bDiVarianceEnable = m_PacketCaps.bDI;
1268
1269 SetupSurfaceStates(
1270 &VeboxSurfaceStateCmdParams);
1271
1272 SetupVeboxState(
1273 &VeboxStateCmdParams);
1274
1275 VP_RENDER_CHK_STATUS_RETURN(SetupDiIecpState(
1276 bDiVarianceEnable,
1277 &VeboxDiIecpCmdParams));
1278
1279 VP_RENDER_CHK_STATUS_RETURN(IsCmdParamsValid(
1280 VeboxStateCmdParams,
1281 VeboxDiIecpCmdParams,
1282 VeboxSurfaceStateCmdParams));
1283
1284 // Initialize command buffer and insert prolog
1285 VP_RENDER_CHK_STATUS_RETURN(InitCmdBufferWithVeParams(pRenderHal, *CmdBuffer, pGenericPrologParams));
1286
1287 //---------------------------------
1288 // Initialize Vebox Surface State Params
1289 //---------------------------------
1290 VP_RENDER_CHK_STATUS_RETURN(InitVeboxSurfaceStateCmdParams(
1291 &VeboxSurfaceStateCmdParams, &MhwVeboxSurfaceStateCmdParams));
1292
1293 for (curPipe = 0; curPipe < numPipe; curPipe++)
1294 {
1295 if (bMultipipe)
1296 {
1297 // initialize the command buffer struct
1298 MOS_ZeroMemory(&CmdBufferInUse, sizeof(MOS_COMMAND_BUFFER));
1299 bool frameTrackingRequested = m_PacketCaps.lastSubmission && (numPipe - 1 == curPipe);
1300 scalability->SetCurrentPipeIndex((uint8_t)curPipe);
1301 scalability->GetCmdBuffer(&CmdBufferInUse, frameTrackingRequested);
1302 pCmdBufferInUse = &CmdBufferInUse;
1303 }
1304 else
1305 {
1306 pCmdBufferInUse = CmdBuffer;
1307 }
1308 pVeboxInterface->SetVeboxIndex(curPipe, numPipe, m_IsSfcUsed);
1309
1310 HalOcaInterface::On1stLevelBBStart(*pCmdBufferInUse, *pOsContext, pOsInterface->CurrentGpuContextHandle, *pMhwMiInterface, *pMmioRegisters);
1311
1312 char ocaMsg[] = "VP APG Vebox Packet";
1313 HalOcaInterface::TraceMessage(*pCmdBufferInUse, *pOsContext, ocaMsg, sizeof(ocaMsg));
1314
1315 HalOcaInterface::TraceOcaSkuValue(*pCmdBufferInUse, *pOsInterface);
1316
1317 // Add vphal param to log.
1318 HalOcaInterface::DumpVphalParam(*pCmdBufferInUse, *pOsContext, pRenderHal->pVphalOcaDumper);
1319
1320 VP_RENDER_CHK_STATUS_RETURN(pPerfProfiler->AddPerfCollectStartCmd((void *)pRenderHal, pOsInterface, pRenderHal->pMhwMiInterface, pCmdBufferInUse));
1321
1322 VP_RENDER_CHK_STATUS_RETURN(NullHW::StartPredicate(pRenderHal->pMhwMiInterface, pCmdBufferInUse));
1323
1324 // Add compressible info of input/output surface to log
1325 if (this->m_currentSurface && VeboxSurfaceStateCmdParams.pSurfOutput)
1326 {
1327 std::string info = "in_comps = " + std::to_string(int(this->m_currentSurface->osSurface->bCompressible)) + ", out_comps = " + std::to_string(int(VeboxSurfaceStateCmdParams.pSurfOutput->osSurface->bCompressible));
1328 const char *ocaLog = info.c_str();
1329 HalOcaInterface::TraceMessage(*pCmdBufferInUse, *pOsContext, ocaLog, info.size());
1330 }
1331
1332 if (bMultipipe)
1333 {
1334 // Insert prolog with VE params
1335 #ifdef _MMC_SUPPORTED
1336
1337 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->setVeboxPrologCmd(pMhwMiInterface, pCmdBufferInUse));
1338
1339 #endif
1340
1341 MHW_GENERIC_PROLOG_PARAMS genericPrologParams;
1342 MOS_ZeroMemory(&genericPrologParams, sizeof(genericPrologParams));
1343 genericPrologParams.pOsInterface = pRenderHal->pOsInterface;
1344 genericPrologParams.pvMiInterface = pRenderHal->pMhwMiInterface;
1345 genericPrologParams.bMmcEnabled = pGenericPrologParams ? pGenericPrologParams->bMmcEnabled : false;
1346 VP_RENDER_CHK_STATUS_RETURN(Mhw_SendGenericPrologCmd(pCmdBufferInUse, &genericPrologParams));
1347
1348 VP_RENDER_CHK_STATUS_RETURN(scalability->SyncPipe(syncAllPipes, 0, pCmdBufferInUse));
1349
1350 // Enable Watchdog Timer
1351 VP_RENDER_CHK_STATUS_RETURN(pMhwMiInterface->AddWatchdogTimerStartCmd(pCmdBufferInUse));
1352
1353 #if (_DEBUG || _RELEASE_INTERNAL)
1354 // Add noop for simu no output issue
1355 if (curPipe > 0)
1356 {
1357 pMhwMiInterface->AddMiNoop(pCmdBufferInUse, nullptr);
1358 pMhwMiInterface->AddMiNoop(pCmdBufferInUse, nullptr);
1359 pMhwMiInterface->AddMiNoop(pCmdBufferInUse, nullptr);
1360 pMhwMiInterface->AddMiNoop(pCmdBufferInUse, nullptr);
1361 if (m_IsSfcUsed)
1362 {
1363 pMhwMiInterface->AddMiNoop(pCmdBufferInUse, nullptr);
1364 pMhwMiInterface->AddMiNoop(pCmdBufferInUse, nullptr);
1365 pMhwMiInterface->AddMiNoop(pCmdBufferInUse, nullptr);
1366 pMhwMiInterface->AddMiNoop(pCmdBufferInUse, nullptr);
1367 }
1368 }
1369 #endif
1370 }
1371
1372 //---------------------------------
1373 // Send CMD: Vebox_State
1374 //---------------------------------
1375 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->AddVeboxState(
1376 pCmdBufferInUse,
1377 &VeboxStateCmdParams,
1378 0));
1379
1380 //---------------------------------
1381 // Send CMD: Vebox_Surface_State
1382 //---------------------------------
1383 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->AddVeboxSurfaces(
1384 pCmdBufferInUse,
1385 &MhwVeboxSurfaceStateCmdParams));
1386
1387 //---------------------------------
1388 // Send CMD: SFC pipe commands
1389 //---------------------------------
1390 if (m_IsSfcUsed)
1391 {
1392 VP_RENDER_CHK_NULL_RETURN(m_sfcRender);
1393
1394 VP_RENDER_CHK_STATUS_RETURN(m_sfcRender->SetSfcPipe(curPipe, numPipe));
1395
1396 VP_RENDER_CHK_STATUS_RETURN(m_sfcRender->SetupSfcState(m_renderTarget));
1397
1398 VP_RENDER_CHK_STATUS_RETURN(m_sfcRender->SendSfcCmd(
1399 (pRenderData->DI.bDeinterlace || pRenderData->DN.bDnEnabled),
1400 pCmdBufferInUse));
1401 }
1402
1403 HalOcaInterface::OnDispatch(*pCmdBufferInUse, *pOsContext, *pMhwMiInterface, *pMmioRegisters);
1404
1405 //---------------------------------
1406 // Send CMD: Vebox_DI_IECP
1407 //---------------------------------
1408 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->AddVeboxDiIecp(
1409 pCmdBufferInUse,
1410 &VeboxDiIecpCmdParams));
1411
1412 VP_RENDER_CHK_NULL_RETURN(pOsInterface);
1413 VP_RENDER_CHK_NULL_RETURN(pOsInterface->pfnGetSkuTable);
1414 auto *skuTable = pOsInterface->pfnGetSkuTable(pOsInterface);
1415 if (skuTable && MEDIA_IS_SKU(skuTable, FtrEnablePPCFlush))
1416 {
1417 // Add PPC fulsh
1418 MOS_ZeroMemory(&FlushDwParams, sizeof(FlushDwParams));
1419 FlushDwParams.bEnablePPCFlush = true;
1420 VP_RENDER_CHK_STATUS_RETURN(pMhwMiInterface->AddMiFlushDwCmd(pCmdBufferInUse, &FlushDwParams));
1421 }
1422
1423 if (bMultipipe)
1424 {
1425 // MI FlushDw, for vebox output green block issue
1426 MOS_ZeroMemory(&FlushDwParams, sizeof(FlushDwParams));
1427 VP_RENDER_CHK_STATUS_RETURN(pMhwMiInterface->AddMiFlushDwCmd(pCmdBufferInUse, &FlushDwParams));
1428
1429 VP_RENDER_CHK_STATUS_RETURN(scalability->SyncPipe(syncAllPipes, 0, pCmdBufferInUse));
1430 }
1431
1432 //---------------------------------
1433 // Write GPU Status Tag for Tag based synchronization
1434 //---------------------------------
1435 if (!pOsInterface->bEnableKmdMediaFrameTracking)
1436 {
1437 VP_RENDER_CHK_STATUS_RETURN(SendVecsStatusTag(
1438 pMhwMiInterface,
1439 pOsInterface,
1440 pCmdBufferInUse));
1441 }
1442
1443 //---------------------------------
1444 // Write Sync tag for Vebox Heap Synchronization
1445 // If KMD frame tracking is on, the synchronization of Vebox Heap will use Status tag which
1446 // is updated using KMD frame tracking.
1447 //---------------------------------
1448 if (!pOsInterface->bEnableKmdMediaFrameTracking)
1449 {
1450 MOS_ZeroMemory(&FlushDwParams, sizeof(FlushDwParams));
1451 FlushDwParams.pOsResource = (PMOS_RESOURCE)&pVeboxHeap->DriverResource;
1452 FlushDwParams.dwResourceOffset = pVeboxHeap->uiOffsetSync;
1453 FlushDwParams.dwDataDW1 = pVeboxHeap->dwNextTag;
1454 VP_RENDER_CHK_STATUS_RETURN(pMhwMiInterface->AddMiFlushDwCmd(
1455 pCmdBufferInUse,
1456 &FlushDwParams));
1457 }
1458
1459 if (bMultipipe)
1460 {
1461 // Disable Watchdog Timer
1462 VP_RENDER_CHK_STATUS_RETURN(pMhwMiInterface->AddWatchdogTimerStopCmd(pCmdBufferInUse));
1463 }
1464
1465 VP_RENDER_CHK_STATUS_RETURN(NullHW::StopPredicate(pRenderHal->pMhwMiInterface, pCmdBufferInUse));
1466
1467 VP_RENDER_CHK_STATUS_RETURN(pPerfProfiler->AddPerfCollectEndCmd((void *)pRenderHal, pOsInterface, pRenderHal->pMhwMiInterface, pCmdBufferInUse));
1468
1469 HalOcaInterface::On1stLevelBBEnd(*pCmdBufferInUse, *pOsInterface);
1470
1471 if (pOsInterface->bNoParsingAssistanceInKmd)
1472 {
1473 VP_RENDER_CHK_STATUS_RETURN(pMhwMiInterface->AddMiBatchBufferEnd(
1474 pCmdBufferInUse,
1475 nullptr));
1476 }
1477 else if (RndrCommonIsMiBBEndNeeded(pOsInterface))
1478 {
1479 // Add Batch Buffer end command (HW/OS dependent)
1480 VP_RENDER_CHK_STATUS_RETURN(pMhwMiInterface->AddMiBatchBufferEnd(
1481 pCmdBufferInUse,
1482 nullptr));
1483 }
1484
1485 if (bMultipipe)
1486 {
1487 scalability->ReturnCmdBuffer(pCmdBufferInUse);
1488 }
1489 }
1490
1491 if (bMultipipe)
1492 {
1493 scalability->SetCurrentPipeIndex(inputPipe);
1494 WriteUserFeature(__MEDIA_USER_FEATURE_VALUE_ENABLE_VEBOX_SCALABILITY_MODE_ID, true, m_hwInterface->m_osInterface->pOsContext);
1495 }
1496 else
1497 {
1498 WriteUserFeature(__MEDIA_USER_FEATURE_VALUE_ENABLE_VEBOX_SCALABILITY_MODE_ID, false, m_hwInterface->m_osInterface->pOsContext);
1499 }
1500
1501 MT_LOG2(MT_VP_HAL_RENDER_VE, MT_NORMAL, MT_VP_MHW_VE_SCALABILITY_EN, bMultipipe, MT_VP_MHW_VE_SCALABILITY_USE_SFC, m_IsSfcUsed);
1502
1503 return eStatus;
1504 }
1505
InitVeboxSurfaceStateCmdParams(PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVpHalVeboxSurfaceStateCmdParams,PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pMhwVeboxSurfaceStateCmdParams)1506 MOS_STATUS VpVeboxCmdPacket::InitVeboxSurfaceStateCmdParams(
1507 PVPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS pVpHalVeboxSurfaceStateCmdParams,
1508 PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pMhwVeboxSurfaceStateCmdParams)
1509 {
1510 VP_FUNC_CALL();
1511
1512 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1513
1514 VP_RENDER_CHK_NULL_RETURN(pVpHalVeboxSurfaceStateCmdParams);
1515 VP_RENDER_CHK_NULL_RETURN(pMhwVeboxSurfaceStateCmdParams);
1516
1517 MOS_ZeroMemory(pMhwVeboxSurfaceStateCmdParams, sizeof(*pMhwVeboxSurfaceStateCmdParams));
1518
1519 pMhwVeboxSurfaceStateCmdParams->bDIEnable = pVpHalVeboxSurfaceStateCmdParams->bDIEnable;
1520 pMhwVeboxSurfaceStateCmdParams->b3DlutEnable = pVpHalVeboxSurfaceStateCmdParams->b3DlutEnable;
1521
1522 if (pVpHalVeboxSurfaceStateCmdParams->pSurfInput)
1523 {
1524 VP_RENDER_CHK_NULL_RETURN(pVpHalVeboxSurfaceStateCmdParams->pSurfInput->osSurface);
1525 VP_RENDER_CHK_STATUS_RETURN(InitVeboxSurfaceParams(
1526 pVpHalVeboxSurfaceStateCmdParams->pSurfInput,
1527 &pMhwVeboxSurfaceStateCmdParams->SurfInput));
1528 pMhwVeboxSurfaceStateCmdParams->SurfInput.dwYoffset = pVpHalVeboxSurfaceStateCmdParams->pSurfInput->osSurface->YPlaneOffset.iYOffset;
1529 MT_LOG2(MT_VP_MHW_VE_SURFSTATE_INPUT, MT_NORMAL, MT_SURF_TILE_MODE, pVpHalVeboxSurfaceStateCmdParams->pSurfInput->osSurface->TileModeGMM,
1530 MT_SURF_MOS_FORMAT, pVpHalVeboxSurfaceStateCmdParams->pSurfInput->osSurface->Format);
1531 }
1532 if (pVpHalVeboxSurfaceStateCmdParams->pSurfOutput)
1533 {
1534 VP_RENDER_CHK_NULL_RETURN(pVpHalVeboxSurfaceStateCmdParams->pSurfOutput->osSurface);
1535 pMhwVeboxSurfaceStateCmdParams->bOutputValid = true;
1536 VP_RENDER_CHK_STATUS_RETURN(InitVeboxSurfaceParams(
1537 pVpHalVeboxSurfaceStateCmdParams->pSurfOutput,
1538 &pMhwVeboxSurfaceStateCmdParams->SurfOutput));
1539 pMhwVeboxSurfaceStateCmdParams->SurfOutput.dwYoffset = pVpHalVeboxSurfaceStateCmdParams->pSurfOutput->osSurface->YPlaneOffset.iYOffset;
1540 MT_LOG2(MT_VP_MHW_VE_SURFSTATE_OUT, MT_NORMAL, MT_SURF_TILE_MODE, pVpHalVeboxSurfaceStateCmdParams->pSurfOutput->osSurface->TileModeGMM,
1541 MT_SURF_MOS_FORMAT, pVpHalVeboxSurfaceStateCmdParams->pSurfOutput->osSurface->Format);
1542 }
1543 if (pVpHalVeboxSurfaceStateCmdParams->pSurfSTMM)
1544 {
1545 VP_RENDER_CHK_NULL_RETURN(pVpHalVeboxSurfaceStateCmdParams->pSurfSTMM->osSurface);
1546 VP_RENDER_CHK_STATUS_RETURN(InitVeboxSurfaceParams(
1547 pVpHalVeboxSurfaceStateCmdParams->pSurfSTMM,
1548 &pMhwVeboxSurfaceStateCmdParams->SurfSTMM));
1549 MT_LOG2(MT_VP_MHW_VE_SURFSTATE_STMM, MT_NORMAL, MT_SURF_TILE_MODE, pVpHalVeboxSurfaceStateCmdParams->pSurfSTMM->osSurface->TileModeGMM,
1550 MT_SURF_MOS_FORMAT, pVpHalVeboxSurfaceStateCmdParams->pSurfSTMM->osSurface->Format);
1551 }
1552 if (pVpHalVeboxSurfaceStateCmdParams->pSurfDNOutput)
1553 {
1554 VP_RENDER_CHK_NULL_RETURN(pVpHalVeboxSurfaceStateCmdParams->pSurfDNOutput->osSurface);
1555 VP_RENDER_CHK_STATUS_RETURN(InitVeboxSurfaceParams(
1556 pVpHalVeboxSurfaceStateCmdParams->pSurfDNOutput,
1557 &pMhwVeboxSurfaceStateCmdParams->SurfDNOutput));
1558 pMhwVeboxSurfaceStateCmdParams->SurfDNOutput.dwYoffset = pVpHalVeboxSurfaceStateCmdParams->pSurfDNOutput->osSurface->YPlaneOffset.iYOffset;
1559 MT_LOG2(MT_VP_MHW_VE_SURFSTATE_DNOUT, MT_NORMAL, MT_SURF_TILE_MODE, pVpHalVeboxSurfaceStateCmdParams->pSurfDNOutput->osSurface->TileModeGMM,
1560 MT_SURF_MOS_FORMAT, pVpHalVeboxSurfaceStateCmdParams->pSurfDNOutput->osSurface->Format);
1561 }
1562 if (pVpHalVeboxSurfaceStateCmdParams->pSurfSkinScoreOutput)
1563 {
1564 VP_RENDER_CHK_NULL_RETURN(pVpHalVeboxSurfaceStateCmdParams->pSurfSkinScoreOutput->osSurface);
1565 VP_RENDER_CHK_STATUS_RETURN(InitVeboxSurfaceParams(
1566 pVpHalVeboxSurfaceStateCmdParams->pSurfSkinScoreOutput,
1567 &pMhwVeboxSurfaceStateCmdParams->SurfSkinScoreOutput));
1568 MT_LOG2(MT_VP_MHW_VE_SURFSTATE_SKINSCORE, MT_NORMAL, MT_SURF_TILE_MODE, pVpHalVeboxSurfaceStateCmdParams->pSurfSkinScoreOutput->osSurface->TileModeGMM,
1569 MT_SURF_MOS_FORMAT, pVpHalVeboxSurfaceStateCmdParams->pSurfSkinScoreOutput->osSurface->Format);
1570 }
1571
1572 if (m_inputDepth)
1573 {
1574 pMhwVeboxSurfaceStateCmdParams->SurfInput.dwBitDepth = m_inputDepth;
1575 }
1576
1577 return eStatus;
1578 }
1579
SendVecsStatusTag(PMHW_MI_INTERFACE pMhwMiInterface,PMOS_INTERFACE pOsInterface,PMOS_COMMAND_BUFFER pCmdBuffer)1580 MOS_STATUS VpVeboxCmdPacket::SendVecsStatusTag(
1581 PMHW_MI_INTERFACE pMhwMiInterface,
1582 PMOS_INTERFACE pOsInterface,
1583 PMOS_COMMAND_BUFFER pCmdBuffer)
1584 {
1585 VP_FUNC_CALL();
1586
1587 PMOS_RESOURCE gpuStatusBuffer = nullptr;
1588 MHW_MI_FLUSH_DW_PARAMS FlushDwParams;
1589 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1590
1591 //------------------------------------
1592 VP_RENDER_CHK_NULL_RETURN(pMhwMiInterface);
1593 VP_RENDER_CHK_NULL_RETURN(pOsInterface);
1594 VP_RENDER_CHK_NULL_RETURN(pCmdBuffer);
1595
1596 // Get GPU Status buffer
1597 pOsInterface->pfnGetGpuStatusBufferResource(pOsInterface, gpuStatusBuffer);
1598 VP_RENDER_CHK_NULL_RETURN(gpuStatusBuffer);
1599
1600 // Register the buffer
1601 VP_RENDER_CHK_STATUS_RETURN(pOsInterface->pfnRegisterResource(
1602 pOsInterface,
1603 gpuStatusBuffer,
1604 true,
1605 true));
1606
1607 MOS_ZeroMemory(&FlushDwParams, sizeof(FlushDwParams));
1608 FlushDwParams.pOsResource = gpuStatusBuffer;
1609 FlushDwParams.dwResourceOffset = pOsInterface->pfnGetGpuStatusTagOffset(pOsInterface, MOS_GPU_CONTEXT_VEBOX);
1610 FlushDwParams.dwDataDW1 = pOsInterface->pfnGetGpuStatusTag(pOsInterface, MOS_GPU_CONTEXT_VEBOX);
1611 VP_RENDER_CHK_STATUS_RETURN(pMhwMiInterface->AddMiFlushDwCmd(
1612 pCmdBuffer,
1613 &FlushDwParams));
1614
1615 // Increase buffer tag for next usage
1616 pOsInterface->pfnIncrementGpuStatusTag(pOsInterface, MOS_GPU_CONTEXT_VEBOX);
1617
1618 return eStatus;
1619 }
1620
RndrCommonIsMiBBEndNeeded(PMOS_INTERFACE pOsInterface)1621 bool VpVeboxCmdPacket::RndrCommonIsMiBBEndNeeded(
1622 PMOS_INTERFACE pOsInterface)
1623 {
1624 VP_FUNC_CALL();
1625
1626 bool needed = false;
1627
1628 if (nullptr == pOsInterface)
1629 return false;
1630
1631 return needed;
1632 }
1633
InitSfcRender()1634 MOS_STATUS VpVeboxCmdPacket::InitSfcRender()
1635 {
1636 VP_FUNC_CALL();
1637
1638 if (nullptr == m_sfcRender)
1639 {
1640 VP_RENDER_CHK_NULL_RETURN(m_hwInterface);
1641 VP_RENDER_CHK_NULL_RETURN(m_hwInterface->m_vpPlatformInterface);
1642 VP_RENDER_CHK_STATUS_RETURN(m_hwInterface->m_vpPlatformInterface->CreateSfcRender(
1643 m_sfcRender,
1644 *m_hwInterface,
1645 m_allocator));
1646 VP_RENDER_CHK_NULL_RETURN(m_sfcRender);
1647 }
1648 VP_PUBLIC_CHK_STATUS_RETURN(m_sfcRender->Init());
1649 return MOS_STATUS_SUCCESS;
1650 }
1651
DumpVeboxStateHeap()1652 MOS_STATUS VpVeboxCmdPacket::DumpVeboxStateHeap()
1653 {
1654 VP_FUNC_CALL();
1655
1656 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1657 #if (_DEBUG || _RELEASE_INTERNAL)
1658 static uint32_t counter = 0;
1659 VP_SURFACE driverResource = {};
1660 VP_SURFACE kernelResource = {};
1661 MOS_SURFACE driverSurface = {};
1662 MOS_SURFACE kernelSurface = {};
1663
1664 const MHW_VEBOX_HEAP* pVeboxHeap = nullptr;
1665 PMHW_VEBOX_INTERFACE pVeboxInterface = m_hwInterface->m_veboxInterface;
1666 VpDebugInterface* debuginterface = (VpDebugInterface*)m_hwInterface->m_debugInterface;
1667 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->GetVeboxHeapInfo(&pVeboxHeap));
1668 VP_RENDER_CHK_NULL_RETURN(pVeboxHeap);
1669
1670 driverResource.osSurface = &driverSurface;
1671 kernelResource.osSurface = &kernelSurface;
1672 driverResource.osSurface->OsResource = pVeboxHeap->DriverResource;
1673 kernelResource.osSurface->OsResource = pVeboxHeap->KernelResource;
1674
1675 VPHAL_GET_SURFACE_INFO info = {};
1676 m_allocator->GetSurfaceInfo(&driverResource, info);
1677 m_allocator->GetSurfaceInfo(&kernelResource, info);
1678
1679
1680 VP_SURFACE_DUMP(debuginterface,
1681 &kernelResource,
1682 counter,
1683 0,
1684 VPHAL_DUMP_TYPE_VEBOX_DRIVERHEAP);
1685
1686 VP_SURFACE_DUMP(debuginterface,
1687 &kernelResource,
1688 counter,
1689 0,
1690 VPHAL_DUMP_TYPE_VEBOX_KERNELHEAP);
1691
1692 counter++;
1693 finish:
1694 #endif
1695 return eStatus;
1696 }
1697
Init()1698 MOS_STATUS VpVeboxCmdPacket::Init()
1699 {
1700 VP_FUNC_CALL();
1701
1702 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1703 VP_RENDER_CHK_NULL_RETURN(m_hwInterface);
1704 VP_RENDER_CHK_NULL_RETURN(m_hwInterface->m_skuTable);
1705
1706 VP_RENDER_CHK_STATUS_RETURN(InitSfcRender());
1707
1708 if (nullptr == m_currentSurface)
1709 {
1710 m_currentSurface = m_allocator->AllocateVpSurface();
1711 VP_CHK_SPACE_NULL_RETURN(m_currentSurface);
1712 }
1713 else
1714 {
1715 m_currentSurface->Clean();
1716 }
1717
1718 if (nullptr == m_previousSurface)
1719 {
1720 m_previousSurface = m_allocator->AllocateVpSurface();
1721 VP_CHK_SPACE_NULL_RETURN(m_previousSurface);
1722 }
1723 else
1724 {
1725 m_previousSurface->Clean();
1726 }
1727
1728 if (nullptr == m_renderTarget)
1729 {
1730 m_renderTarget = m_allocator->AllocateVpSurface();
1731 VP_CHK_SPACE_NULL_RETURN(m_renderTarget);
1732 }
1733 else
1734 {
1735 m_renderTarget->Clean();
1736 }
1737
1738 MOS_ZeroMemory(&m_veboxPacketSurface, sizeof(VEBOX_PACKET_SURFACE_PARAMS));
1739 m_surfSetting.Clean();
1740
1741 return eStatus;
1742 }
1743
Prepare()1744 MOS_STATUS VpVeboxCmdPacket::Prepare()
1745 {
1746 VP_FUNC_CALL();
1747
1748 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1749
1750 return eStatus;
1751 }
1752
PrepareState()1753 MOS_STATUS VpVeboxCmdPacket::PrepareState()
1754 {
1755 VP_FUNC_CALL();
1756
1757 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1758
1759 if (m_packetResourcesdPrepared)
1760 {
1761 VP_RENDER_NORMALMESSAGE("Resource Prepared, skip this time");
1762 return MOS_STATUS_SUCCESS;
1763 }
1764
1765 VP_RENDER_CHK_STATUS_RETURN(SetupIndirectStates());
1766
1767 VP_RENDER_CHK_STATUS_RETURN(UpdateVeboxStates());
1768
1769 m_packetResourcesdPrepared = true;
1770
1771 return eStatus;
1772 }
1773
PacketInit(VP_SURFACE * inputSurface,VP_SURFACE * outputSurface,VP_SURFACE * previousSurface,VP_SURFACE_SETTING & surfSetting,VP_EXECUTE_CAPS packetCaps)1774 MOS_STATUS VpVeboxCmdPacket::PacketInit(
1775 VP_SURFACE *inputSurface,
1776 VP_SURFACE *outputSurface,
1777 VP_SURFACE *previousSurface,
1778 VP_SURFACE_SETTING &surfSetting,
1779 VP_EXECUTE_CAPS packetCaps)
1780 {
1781 VP_FUNC_CALL();
1782
1783 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
1784 m_packetResourcesdPrepared = false;
1785
1786 VP_RENDER_CHK_NULL_RETURN(pRenderData);
1787 VP_RENDER_CHK_NULL_RETURN(inputSurface);
1788 VP_RENDER_CHK_NULL_RETURN(outputSurface);
1789 VP_RENDER_CHK_STATUS_RETURN(pRenderData->Init());
1790
1791 m_PacketCaps = packetCaps;
1792
1793 VP_RENDER_CHK_STATUS_RETURN(Init());
1794 VP_RENDER_CHK_NULL_RETURN(m_allocator);
1795 VP_RENDER_CHK_NULL_RETURN(m_currentSurface);
1796 VP_RENDER_CHK_NULL_RETURN(m_renderTarget);
1797 VP_RENDER_CHK_NULL_RETURN(m_previousSurface);
1798
1799 VP_RENDER_CHK_STATUS_RETURN(InitSurfMemCacheControl(packetCaps));
1800
1801 m_IsSfcUsed = packetCaps.bSFC;
1802
1803 //update VEBOX resource GMM resource usage type
1804 m_allocator->UpdateResourceUsageType(&inputSurface->osSurface->OsResource, MOS_HW_RESOURCE_USAGE_VP_INPUT_PICTURE_FF);
1805 m_allocator->UpdateResourceUsageType(&outputSurface->osSurface->OsResource, MOS_HW_RESOURCE_USAGE_VP_OUTPUT_PICTURE_FF);
1806
1807 // Set current src = current primary input
1808 VP_PUBLIC_CHK_STATUS_RETURN(m_allocator->CopyVpSurface(*m_renderTarget ,*outputSurface));
1809
1810 // Init packet surface params.
1811 m_surfSetting = surfSetting;
1812 m_veboxPacketSurface.pCurrInput = GetSurface(SurfaceTypeVeboxInput);
1813 m_veboxPacketSurface.pStatisticsOutput = GetSurface(SurfaceTypeStatistics);
1814 m_veboxPacketSurface.pCurrOutput = GetSurface(SurfaceTypeVeboxCurrentOutput);
1815 m_veboxPacketSurface.pPrevInput = GetSurface(SurfaceTypeVeboxPreviousInput);
1816 m_veboxPacketSurface.pSTMMInput = GetSurface(SurfaceTypeSTMMIn);
1817 m_veboxPacketSurface.pSTMMOutput = GetSurface(SurfaceTypeSTMMOut);
1818 m_veboxPacketSurface.pDenoisedCurrOutput = GetSurface(SurfaceTypeDNOutput);
1819 m_veboxPacketSurface.pPrevOutput = GetSurface(SurfaceTypeVeboxPreviousOutput);
1820 m_veboxPacketSurface.pAlphaOrVignette = GetSurface(SurfaceTypeAlphaOrVignette);
1821 m_veboxPacketSurface.pLaceOrAceOrRgbHistogram = GetSurface(SurfaceTypeLaceAceRGBHistogram);
1822 m_veboxPacketSurface.pSurfSkinScoreOutput = GetSurface(SurfaceTypeSkinScore);
1823 m_dwVeboxPerBlockStatisticsHeight = surfSetting.dwVeboxPerBlockStatisticsHeight;
1824 m_dwVeboxPerBlockStatisticsWidth = surfSetting.dwVeboxPerBlockStatisticsWidth;
1825
1826 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pCurrInput);
1827 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pStatisticsOutput);
1828 VP_RENDER_CHK_NULL_RETURN(m_veboxPacketSurface.pLaceOrAceOrRgbHistogram);
1829
1830 m_DNDIFirstFrame = (!m_PacketCaps.bRefValid && (m_PacketCaps.bDN || m_PacketCaps.bDI));
1831 m_DIOutputFrames = MEDIA_VEBOX_DI_OUTPUT_CURRENT;
1832
1833 auto curInput = m_veboxPacketSurface.pCurrInput;
1834 auto curOutput = m_veboxPacketSurface.pCurrOutput;
1835 if (!m_IsSfcUsed &&
1836 ((uint32_t)curInput->rcSrc.bottom < curInput->osSurface->dwHeight ||
1837 (uint32_t)curInput->rcSrc.right < curInput->osSurface->dwWidth))
1838 {
1839 curInput->bVEBOXCroppingUsed = true;
1840 VP_RENDER_NORMALMESSAGE("bVEBOXCroppingUsed = true, input: rcSrc.bottom: %d, rcSrc.right: %d; dwHeight: %d, dwHeight: %d;",
1841 (uint32_t)curInput->rcSrc.bottom,
1842 (uint32_t)curInput->rcSrc.right,
1843 curInput->osSurface->dwHeight,
1844 curInput->osSurface->dwWidth);
1845
1846 if (curOutput)
1847 {
1848 curOutput->bVEBOXCroppingUsed = true;
1849 VP_RENDER_NORMALMESSAGE(" output: rcSrc.bottom: %d, rcSrc.right: %d; dwHeight: %d, dwHeight: %d;",
1850 (uint32_t)curOutput->rcSrc.bottom,
1851 (uint32_t)curOutput->rcSrc.right,
1852 curOutput->osSurface->dwHeight,
1853 curOutput->osSurface->dwWidth);
1854 }
1855 }
1856 else
1857 {
1858 curInput->bVEBOXCroppingUsed = false;
1859 if (curOutput)
1860 {
1861 curOutput->bVEBOXCroppingUsed = false;
1862 }
1863 }
1864
1865
1866 // Get Vebox Secure mode form policy
1867 m_useKernelResource = packetCaps.bSecureVebox;
1868
1869 return MOS_STATUS_SUCCESS;
1870 }
1871
Submit(MOS_COMMAND_BUFFER * commandBuffer,uint8_t packetPhase)1872 MOS_STATUS VpVeboxCmdPacket::Submit(MOS_COMMAND_BUFFER* commandBuffer, uint8_t packetPhase)
1873 {
1874 VP_FUNC_CALL();
1875
1876 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1877 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
1878
1879 if (m_currentSurface && m_currentSurface->osSurface)
1880 {
1881 // Ensure the input is ready to be read
1882 // Currently, mos RegisterResourcere cannot sync the 3d resource.
1883 // Temporaly, call sync resource to do the sync explicitly.
1884 // Sync need be done after switching context.
1885 #if MOS_MEDIASOLO_SUPPORTED
1886 if (!m_hwInterface->m_osInterface->bSoloInUse)
1887 #endif
1888 {
1889 m_allocator->SyncOnResource(
1890 &m_currentSurface->osSurface->OsResource,
1891 false);
1892 }
1893 }
1894
1895 // Send vebox command
1896 VP_RENDER_CHK_STATUS_RETURN(SendVeboxCmd(commandBuffer));
1897
1898 #if (_DEBUG || _RELEASE_INTERNAL)
1899 // Debug interface with state heap check
1900 VP_RENDER_CHK_STATUS_RETURN(DumpVeboxStateHeap())
1901 #endif
1902
1903 return eStatus;
1904 }
1905
CopySurfaceValue(VP_SURFACE * pTargetSurface,VP_SURFACE * pSourceSurface)1906 void VpVeboxCmdPacket::CopySurfaceValue(
1907 VP_SURFACE *pTargetSurface,
1908 VP_SURFACE *pSourceSurface)
1909 {
1910 VP_FUNC_CALL();
1911
1912 if (pTargetSurface == nullptr)
1913 {
1914 VP_RENDER_ASSERTMESSAGE("Input pTargetSurface is null");
1915 return;
1916 }
1917 *pTargetSurface = *pSourceSurface;
1918 }
1919
VpVeboxCmdPacket(MediaTask * task,PVP_MHWINTERFACE hwInterface,PVpAllocator & allocator,VPMediaMemComp * mmc)1920 VpVeboxCmdPacket::VpVeboxCmdPacket(
1921 MediaTask * task,
1922 PVP_MHWINTERFACE hwInterface,
1923 PVpAllocator &allocator,
1924 VPMediaMemComp *mmc):
1925 CmdPacket(task),
1926 VpCmdPacket(task, hwInterface, allocator, mmc, VP_PIPELINE_PACKET_VEBOX)
1927 {
1928
1929 }
1930
~VpVeboxCmdPacket()1931 VpVeboxCmdPacket:: ~VpVeboxCmdPacket()
1932 {
1933 VP_FUNC_CALL();
1934
1935 MOS_Delete(m_sfcRender);
1936 MOS_Delete(m_lastExecRenderData);
1937 MOS_Delete(m_surfMemCacheCtl);
1938
1939 m_allocator->DestroyVpSurface(m_currentSurface);
1940 m_allocator->DestroyVpSurface(m_previousSurface);
1941 m_allocator->DestroyVpSurface(m_renderTarget);
1942 }
1943
1944 //!
1945 //! \brief Calculate offsets of statistics surface address based on the
1946 //! functions which were enabled in the previous call,
1947 //! and store the width and height of the per-block statistics into DNDI_STATE
1948 //! \details
1949 //! Layout of Statistics surface when Temporal DI enabled
1950 //! --------------------------------------------------------------\n
1951 //! | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1952 //! |-------------------------------------------------------------\n
1953 //! | 16 bytes for x=0, Y=4 | ...\n
1954 //! |------------------------------\n
1955 //! | ...\n
1956 //! |------------------------------\n
1957 //! | 16 bytes for x=0, Y=height-4| ...\n
1958 //! |-----------------------------------------------Pitch----------------------------------------------------------\n
1959 //! | 256 DW of ACE histogram Slice 0 (Previous)| 17 DW Reserved | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1960 //! |--------------------------------------------------------------------------------------------------------------\n
1961 //! | 256 DW of ACE histogram Slice 0 (Current) | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1962 //! |--------------------------------------------------------------------------------------------------------------\n
1963 //! | 256 DW of ACE histogram Slice 1 (Previous)| 17 DW Reserved | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1964 //! |--------------------------------------------------------------------------------------------------------------\n
1965 //! | 256 DW of ACE histogram Slice 1 (Current) | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1966 //! ---------------------------------------------------------------------------------------------------------------\n
1967 //!
1968 //! Layout of Statistics surface when DN or Spatial DI enabled (and Temporal DI disabled)
1969 //! --------------------------------------------------------------\n
1970 //! | 16 bytes for x=0, Y=0 | 16 bytes for x=16, Y=0 | ...\n
1971 //! |-------------------------------------------------------------\n
1972 //! | 16 bytes for x=0, Y=4 | ...\n
1973 //! |------------------------------\n
1974 //! | ...\n
1975 //! |------------------------------\n
1976 //! | 16 bytes for x=0, Y=height-4| ...\n
1977 //! |-----------------------------------------------Pitch----------------------------------------------------------\n
1978 //! | 256 DW of ACE histogram Slice 0 (Input) | 11 DW FMD0 | 6 DW GNE0 | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1979 //! |--------------------------------------------------------------------------------------------------------------\n
1980 //! | 256 DW of ACE histogram Slice 1 (Input) | 11 DW FMD1 | 6 DW GNE1 | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1981 //! ---------------------------------------------------------------------------------------------------------------\n
1982 //!
1983 //! Layout of Statistics surface when both DN and DI are disabled
1984 //! ------------------------------------------------Pitch----------------------------------------------------------\n
1985 //! | 256 DW of ACE histogram Slice 0 (Input) | 17 DW Reserved | 2 DW STD0 | 2 DW GCC0 | 11 DW Reserved |\n
1986 //! |--------------------------------------------------------------------------------------------------------------\n
1987 //! | 256 DW of ACE histogram Slice 1 (Input) | 17 DW Reserved | 2 DW STD1 | 2 DW GCC1 | 11 DW Reserved |\n
1988 //! ---------------------------------------------------------------------------------------------------------------\n
1989 //! \param [out] pStatSlice0Offset
1990 //! Statistics surface Slice 0 base pointer
1991 //! \param [out] pStatSlice1Offset
1992 //! Statistics surface Slice 1 base pointer
1993 //! \return MOS_STATUS
1994 //! Return MOS_STATUS_SUCCESS if successful, otherwise failed
1995 //!
GetStatisticsSurfaceOffsets(int32_t * pStatSlice0Offset,int32_t * pStatSlice1Offset)1996 MOS_STATUS VpVeboxCmdPacket::GetStatisticsSurfaceOffsets(
1997 int32_t* pStatSlice0Offset,
1998 int32_t* pStatSlice1Offset)
1999 {
2000 VP_FUNC_CALL();
2001
2002 uint32_t uiPitch;
2003 int32_t iOffset;
2004 MOS_STATUS eStatus;
2005
2006 eStatus = MOS_STATUS_UNKNOWN;
2007 uiPitch = 0;
2008
2009 // Query platform dependent size of per frame information
2010 VP_RENDER_CHK_STATUS(QueryStatLayout(
2011 VEBOX_STAT_QUERY_PER_FRAME_SIZE, &uiPitch));
2012
2013 // Get the base address of Frame based statistics for each slice
2014 if (m_PacketCaps.bDI) // VEBOX, VEBOX+IECP
2015 {
2016 // Frame based statistics begins after Encoder statistics
2017 iOffset = m_dwVeboxPerBlockStatisticsWidth *
2018 m_dwVeboxPerBlockStatisticsHeight;
2019
2020 *pStatSlice0Offset = iOffset + uiPitch; // Slice 0 current frame
2021 *pStatSlice1Offset = iOffset + uiPitch * 3; // Slice 1 current frame
2022 }
2023 else if (m_PacketCaps.bDN) // DN, DN_IECP, SpatialDI
2024 {
2025 // Frame based statistics begins after Encoder statistics
2026 iOffset = m_dwVeboxPerBlockStatisticsWidth *
2027 m_dwVeboxPerBlockStatisticsHeight;
2028
2029 *pStatSlice0Offset = iOffset; // Slice 0 input frame
2030 *pStatSlice1Offset = iOffset + uiPitch; // Slice 1 input frame
2031 }
2032 else // IECP only
2033 {
2034 *pStatSlice0Offset = 0; // Slice 0 input frame
2035 *pStatSlice1Offset = uiPitch; // Slice 1 input frame
2036 }
2037
2038 finish:
2039 return eStatus;
2040 }
2041
AddVeboxDndiState()2042 MOS_STATUS VpVeboxCmdPacket::AddVeboxDndiState()
2043 {
2044 VP_FUNC_CALL();
2045
2046 PMHW_VEBOX_INTERFACE pVeboxInterface = m_hwInterface->m_veboxInterface;
2047 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
2048
2049 VP_RENDER_CHK_NULL_RETURN(pVeboxInterface);
2050 VP_RENDER_CHK_NULL_RETURN(pRenderData);
2051
2052 if (pRenderData->DN.bDnEnabled || pRenderData->DI.bDeinterlace || pRenderData->DI.bQueryVariance)
2053 {
2054 return pVeboxInterface->AddVeboxDndiState(&pRenderData->GetDNDIParams());
2055 }
2056 return MOS_STATUS_SUCCESS;
2057 }
2058
AddVeboxIECPState()2059 MOS_STATUS VpVeboxCmdPacket::AddVeboxIECPState()
2060 {
2061 VP_FUNC_CALL();
2062
2063 PMHW_VEBOX_INTERFACE pVeboxInterface = m_hwInterface->m_veboxInterface;
2064 VpVeboxRenderData* pRenderData = GetLastExecRenderData();
2065
2066 VP_RENDER_CHK_NULL_RETURN(pVeboxInterface);
2067 VP_RENDER_CHK_NULL_RETURN(pRenderData);
2068
2069 if (pRenderData->IECP.IsIecpEnabled())
2070 {
2071 return pVeboxInterface->AddVeboxIecpState(&pRenderData->GetIECPParams());
2072 }
2073 return MOS_STATUS_SUCCESS;
2074 }
2075
SetupIndirectStates()2076 MOS_STATUS VpVeboxCmdPacket::SetupIndirectStates()
2077 {
2078 VP_FUNC_CALL();
2079
2080 PMHW_VEBOX_INTERFACE pVeboxInterface = nullptr;
2081 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
2082
2083 VP_RENDER_CHK_NULL_RETURN(pRenderData);
2084 VP_RENDER_CHK_NULL_RETURN(m_hwInterface);
2085
2086 pVeboxInterface = m_hwInterface->m_veboxInterface;
2087 VP_RENDER_CHK_NULL_RETURN(pVeboxInterface);
2088
2089 // Set FMD Params
2090 VP_RENDER_CHK_STATUS_RETURN(ConfigFMDParams(pRenderData->GetDNDIParams().bProgressiveDN, pRenderData->DN.bAutoDetect, pRenderData->DI.bFmdEnabled));
2091
2092 //----------------------------------
2093 // Allocate and reset VEBOX state
2094 //----------------------------------
2095 VP_RENDER_CHK_STATUS_RETURN(pVeboxInterface->AssignVeboxState());
2096
2097 // Set IECP State
2098 VP_RENDER_CHK_STATUS_RETURN(AddVeboxIECPState());
2099
2100 // Set DNDI State
2101 VP_RENDER_CHK_STATUS_RETURN(AddVeboxDndiState());
2102
2103 // Set GAMUT State
2104 VP_RENDER_CHK_STATUS_RETURN(AddVeboxGamutState());
2105
2106 // Set HDR State
2107 VP_RENDER_CHK_STATUS_RETURN(AddVeboxHdrState());
2108
2109 return MOS_STATUS_SUCCESS;
2110 }
2111
VeboxGetBeCSCMatrix(VPHAL_CSPACE inputColorSpace,VPHAL_CSPACE outputColorSpace,MOS_FORMAT inputFormat)2112 void VpVeboxCmdPacket::VeboxGetBeCSCMatrix(
2113 VPHAL_CSPACE inputColorSpace,
2114 VPHAL_CSPACE outputColorSpace,
2115 MOS_FORMAT inputFormat)
2116 {
2117 VP_FUNC_CALL();
2118
2119 // Get the matrix to use for conversion
2120 VpHal_GetCscMatrix(
2121 inputColorSpace,
2122 outputColorSpace,
2123 m_fCscCoeff,
2124 m_fCscInOffset,
2125 m_fCscOutOffset);
2126
2127 // Vebox CSC converts RGB input to YUV for SFC
2128 // Vebox only supports A8B8G8R8 input, swap the 1st and 3rd
2129 // columns of the transfer matrix for A8R8G8B8 and X8R8G8B8
2130 // This only happens when SFC output is used
2131 if (inputFormat == Format_A8R8G8B8 ||
2132 inputFormat == Format_X8R8G8B8)
2133 {
2134 float fTemp[3] = {};
2135 fTemp[0] = m_fCscCoeff[0];
2136 fTemp[1] = m_fCscCoeff[3];
2137 fTemp[2] = m_fCscCoeff[6];
2138
2139 m_fCscCoeff[0] = m_fCscCoeff[2];
2140 m_fCscCoeff[3] = m_fCscCoeff[5];
2141 m_fCscCoeff[6] = m_fCscCoeff[8];
2142
2143 m_fCscCoeff[2] = fTemp[0];
2144 m_fCscCoeff[5] = fTemp[1];
2145 m_fCscCoeff[8] = fTemp[2];
2146 }
2147 }
2148
IsCmdParamsValid(const MHW_VEBOX_STATE_CMD_PARAMS & VeboxStateCmdParams,const MHW_VEBOX_DI_IECP_CMD_PARAMS & VeboxDiIecpCmdParams,const VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS & VeboxSurfaceStateCmdParams)2149 MOS_STATUS VpVeboxCmdPacket::IsCmdParamsValid(
2150 const MHW_VEBOX_STATE_CMD_PARAMS &VeboxStateCmdParams,
2151 const MHW_VEBOX_DI_IECP_CMD_PARAMS &VeboxDiIecpCmdParams,
2152 const VPHAL_VEBOX_SURFACE_STATE_CMD_PARAMS &VeboxSurfaceStateCmdParams)
2153 {
2154 VP_FUNC_CALL();
2155
2156 const MHW_VEBOX_MODE &veboxMode = VeboxStateCmdParams.VeboxMode;
2157
2158 if (veboxMode.DIEnable)
2159 {
2160 if (nullptr == VeboxDiIecpCmdParams.pOsResPrevOutput &&
2161 (MEDIA_VEBOX_DI_OUTPUT_PREVIOUS == veboxMode.DIOutputFrames || MEDIA_VEBOX_DI_OUTPUT_BOTH == veboxMode.DIOutputFrames))
2162 {
2163 MT_ERR1(MT_VP_HAL_RENDER_VE, MT_SURF_ALLOC_HANDLE, 0);
2164 return MOS_STATUS_INVALID_PARAMETER;
2165 }
2166 if (nullptr == VeboxDiIecpCmdParams.pOsResCurrOutput &&
2167 (MEDIA_VEBOX_DI_OUTPUT_CURRENT == veboxMode.DIOutputFrames || MEDIA_VEBOX_DI_OUTPUT_BOTH == veboxMode.DIOutputFrames))
2168 {
2169 MT_ERR1(MT_VP_HAL_RENDER_VE, MT_SURF_ALLOC_HANDLE, 0);
2170 return MOS_STATUS_INVALID_PARAMETER;
2171 }
2172 }
2173
2174 if (m_PacketCaps.bDN && !m_PacketCaps.bDI && !m_PacketCaps.bQueryVariance && !m_PacketCaps.bIECP)
2175 {
2176 if ((VeboxSurfaceStateCmdParams.pSurfInput->osSurface->TileModeGMM == VeboxSurfaceStateCmdParams.pSurfDNOutput->osSurface->TileModeGMM) &&
2177 (VeboxSurfaceStateCmdParams.pSurfInput->osSurface->dwPitch != VeboxSurfaceStateCmdParams.pSurfDNOutput->osSurface->dwPitch))
2178 {
2179 MT_ERR3(MT_VP_MHW_VE_SURFSTATE_INPUT, MT_SURF_TILE_MODE, VeboxSurfaceStateCmdParams.pSurfInput->osSurface->TileModeGMM,
2180 MT_SURF_PITCH, VeboxSurfaceStateCmdParams.pSurfInput->osSurface->dwPitch, MT_SURF_PITCH, VeboxSurfaceStateCmdParams.pSurfDNOutput->osSurface->dwPitch);
2181 return MOS_STATUS_INVALID_PARAMETER;
2182 }
2183 }
2184 return MOS_STATUS_SUCCESS;
2185 }
2186
VeboxSetPerfTag()2187 MOS_STATUS VpVeboxCmdPacket::VeboxSetPerfTag()
2188 {
2189 VP_FUNC_CALL();
2190
2191 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2192 PVPHAL_PERFTAG pPerfTag = nullptr;
2193 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
2194
2195 VP_PUBLIC_CHK_NULL_RETURN(pRenderData);
2196 VP_PUBLIC_CHK_NULL_RETURN(m_currentSurface);
2197 VP_PUBLIC_CHK_NULL_RETURN(m_currentSurface->osSurface);
2198
2199 MOS_FORMAT srcFmt = m_currentSurface->osSurface->Format;
2200
2201 pPerfTag = &pRenderData->PerfTag;
2202
2203 switch (srcFmt)
2204 {
2205 case Format_NV12:
2206 return VeboxSetPerfTagNv12();
2207
2208 CASE_PA_FORMAT:
2209 return VeboxSetPerfTagPaFormat();
2210
2211 case Format_P010:
2212 // P010 Input Support for VEBOX, SFC
2213 *pPerfTag = VPHAL_VEBOX_P010;
2214 break;
2215
2216 case Format_P016:
2217 // P016 Input Support for VEBOX, SFC
2218 *pPerfTag = VPHAL_VEBOX_P016;
2219 break;
2220
2221 case Format_P210:
2222 // P210 Input Support for VEBOX, SFC
2223 *pPerfTag = VPHAL_VEBOX_P210;
2224 break;
2225
2226 case Format_P216:
2227 // P216 Input Support for VEBOX, SFC
2228 *pPerfTag = VPHAL_VEBOX_P216;
2229 break;
2230
2231 case Format_Y210:
2232 // Y210 Input Support for VEBOX, SFC
2233 *pPerfTag = VPHAL_VEBOX_Y210;
2234 break;
2235
2236 case Format_Y216:
2237 // Y216 Input Support for VEBOX, SFC
2238 *pPerfTag = VPHAL_VEBOX_Y216;
2239 break;
2240
2241 case Format_Y410:
2242 // Y410 Input Support for VEBOX, SFC
2243 *pPerfTag = VPHAL_VEBOX_Y410;
2244 break;
2245
2246 case Format_Y416:
2247 // Y416 Input Support for VEBOX, SFC
2248 *pPerfTag = VPHAL_VEBOX_Y416;
2249 break;
2250
2251 CASE_RGB32_FORMAT:
2252 case Format_AYUV:
2253 case Format_A16B16G16R16:
2254 case Format_A16R16G16B16:
2255 case Format_A16B16G16R16F:
2256 case Format_A16R16G16B16F:
2257 *pPerfTag = VPHAL_NONE;
2258 break;
2259
2260 default:
2261 VPHAL_RENDER_ASSERTMESSAGE("Format Not found.");
2262 *pPerfTag = VPHAL_NONE;
2263 eStatus = MOS_STATUS_INVALID_PARAMETER;
2264 } // switch (srcFmt)
2265
2266 return eStatus;
2267 }
2268
VeboxSetPerfTagNv12()2269 MOS_STATUS VpVeboxCmdPacket::VeboxSetPerfTagNv12()
2270 {
2271 VP_FUNC_CALL();
2272
2273 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2274 PVPHAL_PERFTAG pPerfTag = nullptr;
2275 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
2276
2277 VP_PUBLIC_CHK_NULL_RETURN(pRenderData);
2278 VP_PUBLIC_CHK_NULL_RETURN(m_renderTarget);
2279 VP_PUBLIC_CHK_NULL_RETURN(m_renderTarget->osSurface);
2280
2281 MOS_FORMAT dstFormat = m_renderTarget->osSurface->Format;
2282
2283 pPerfTag = &pRenderData->PerfTag;
2284
2285 if (pRenderData->IsDiEnabled())
2286 {
2287 if (pRenderData->DN.bDnEnabled ||
2288 pRenderData->DN.bChromaDnEnabled)
2289 {
2290 if (IsIECPEnabled())
2291 {
2292 *pPerfTag = VPHAL_NV12_DNDI_422CP;
2293 }
2294 else
2295 {
2296 *pPerfTag = VPHAL_NV12_DNDI_PA;
2297 }
2298 }
2299 else
2300 {
2301 if (IsIECPEnabled())
2302 {
2303 *pPerfTag = VPHAL_PL_DI_422CP;
2304 }
2305 else
2306 {
2307 *pPerfTag = VPHAL_PL_DI_PA;
2308 }
2309 }
2310 }
2311 else
2312 {
2313 if (pRenderData->DN.bDnEnabled ||
2314 pRenderData->DN.bChromaDnEnabled)
2315 {
2316 if (IsOutputPipeVebox())
2317 {
2318 switch (dstFormat)
2319 {
2320 case Format_NV12:
2321 *pPerfTag = VPHAL_NV12_DN_420CP;
2322 break;
2323 CASE_PA_FORMAT:
2324 *pPerfTag = VPHAL_NV12_DN_422CP;
2325 break;
2326 case Format_RGB32:
2327 *pPerfTag = VPHAL_NV12_DN_RGB32CP;
2328 case Format_A8R8G8B8:
2329 case Format_A8B8G8R8:
2330 *pPerfTag = VPHAL_NV12_DN_RGB32CP;
2331 break;
2332 case Format_P010:
2333 case Format_P016:
2334 case Format_Y410:
2335 case Format_Y416:
2336 case Format_Y210:
2337 case Format_Y216:
2338 case Format_AYUV:
2339 case Format_Y8:
2340 case Format_Y16S:
2341 case Format_Y16U:
2342 *pPerfTag = VPHAL_NONE;
2343 break;
2344 default:
2345 VP_PUBLIC_ASSERTMESSAGE("Output Format Not found.");
2346 return MOS_STATUS_INVALID_PARAMETER;
2347 }
2348 }
2349 else if (IsIECPEnabled())
2350 {
2351 *pPerfTag = VPHAL_NV12_DN_420CP;
2352 }
2353 else
2354 {
2355 *pPerfTag = VPHAL_NV12_DN_NV12;
2356 }
2357 }
2358 else
2359 {
2360 if (IsOutputPipeVebox())
2361 {
2362 switch (dstFormat)
2363 {
2364 case Format_NV12:
2365 *pPerfTag = VPHAL_NV12_420CP;
2366 break;
2367 CASE_PA_FORMAT:
2368 *pPerfTag = VPHAL_NV12_422CP;
2369 break;
2370 case Format_RGB32:
2371 *pPerfTag = VPHAL_NV12_RGB32CP;
2372 case Format_A8R8G8B8:
2373 case Format_A8B8G8R8:
2374 case Format_R10G10B10A2:
2375 case Format_B10G10R10A2:
2376 *pPerfTag = VPHAL_NV12_RGB32CP;
2377 break;
2378 case Format_P010:
2379 case Format_P016:
2380 case Format_Y410:
2381 case Format_Y416:
2382 case Format_Y210:
2383 case Format_Y216:
2384 case Format_AYUV:
2385 case Format_Y8:
2386 case Format_Y16S:
2387 case Format_Y16U:
2388 *pPerfTag = VPHAL_NONE;
2389 break;
2390 default:
2391 VPHAL_RENDER_ASSERTMESSAGE("Output Format Not found.");
2392 return MOS_STATUS_INVALID_PARAMETER;
2393 }
2394 }
2395 else
2396 {
2397 *pPerfTag = VPHAL_NV12_420CP;
2398 }
2399 }
2400 }
2401 return MOS_STATUS_SUCCESS;
2402 }
2403
VeboxSetPerfTagPaFormat()2404 MOS_STATUS VpVeboxCmdPacket::VeboxSetPerfTagPaFormat()
2405 {
2406 VP_FUNC_CALL();
2407
2408 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2409 PVPHAL_PERFTAG pPerfTag = nullptr;
2410 VpVeboxRenderData *pRenderData = GetLastExecRenderData();
2411
2412 VP_PUBLIC_CHK_NULL_RETURN(pRenderData);
2413 VP_PUBLIC_CHK_NULL_RETURN(m_renderTarget);
2414 VP_PUBLIC_CHK_NULL_RETURN(m_renderTarget->osSurface);
2415
2416 MOS_FORMAT dstFormat = m_renderTarget->osSurface->Format;
2417
2418 pPerfTag = &pRenderData->PerfTag;
2419
2420 if (pRenderData->IsDiEnabled())
2421 {
2422 if (pRenderData->DN.bDnEnabled ||
2423 pRenderData->DN.bChromaDnEnabled)
2424 {
2425 if (IsIECPEnabled())
2426 {
2427 *pPerfTag = VPHAL_PA_DNDI_422CP;
2428 }
2429 else
2430 {
2431 *pPerfTag = VPHAL_PA_DNDI_PA;
2432 }
2433 }
2434 else
2435 {
2436 if (IsIECPEnabled())
2437 {
2438 *pPerfTag = VPHAL_PA_DI_422CP;
2439 }
2440 else
2441 {
2442 *pPerfTag = VPHAL_PA_DI_PA;
2443 }
2444 }
2445 }
2446 else
2447 {
2448 if (pRenderData->DN.bDnEnabled ||
2449 pRenderData->DN.bChromaDnEnabled)
2450 {
2451 if (IsOutputPipeVebox())
2452 {
2453 switch (dstFormat)
2454 {
2455 case Format_NV12:
2456 *pPerfTag = VPHAL_PA_DN_420CP;
2457 break;
2458 CASE_PA_FORMAT:
2459 *pPerfTag = VPHAL_PA_DN_422CP;
2460 break;
2461 case Format_RGB32:
2462 *pPerfTag = VPHAL_PA_DN_RGB32CP;
2463 break;
2464 case Format_A8R8G8B8:
2465 case Format_A8B8G8R8:
2466 case Format_R10G10B10A2:
2467 case Format_B10G10R10A2:
2468 *pPerfTag = VPHAL_PA_RGB32CP;
2469 break;
2470 case Format_P010:
2471 case Format_P016:
2472 case Format_Y410:
2473 case Format_Y416:
2474 case Format_Y210:
2475 case Format_Y216:
2476 case Format_AYUV:
2477 case Format_Y8:
2478 case Format_Y16S:
2479 case Format_Y16U:
2480 *pPerfTag = VPHAL_NONE;
2481 break;
2482 default:
2483 VPHAL_RENDER_ASSERTMESSAGE("Output Format Not found.");
2484 return MOS_STATUS_INVALID_PARAMETER;
2485 }
2486 }
2487 else if (IsIECPEnabled())
2488 {
2489 *pPerfTag = VPHAL_PA_DN_422CP;
2490 }
2491 else
2492 {
2493 *pPerfTag = VPHAL_PA_DN_PA;
2494 }
2495 }
2496 else
2497 {
2498 if (IsOutputPipeVebox())
2499 {
2500 switch (dstFormat)
2501 {
2502 case Format_NV12:
2503 *pPerfTag = VPHAL_PA_420CP;
2504 break;
2505 CASE_PA_FORMAT:
2506 *pPerfTag = VPHAL_PA_422CP;
2507 break;
2508 case Format_RGB32:
2509 *pPerfTag = VPHAL_PA_RGB32CP;
2510 break;
2511 case Format_A8R8G8B8:
2512 case Format_A8B8G8R8:
2513 case Format_R10G10B10A2:
2514 case Format_B10G10R10A2:
2515 *pPerfTag = VPHAL_PA_RGB32CP;
2516 break;
2517 case Format_P010:
2518 case Format_P016:
2519 case Format_Y410:
2520 case Format_Y416:
2521 case Format_Y210:
2522 case Format_Y216:
2523 case Format_AYUV:
2524 case Format_Y8:
2525 case Format_Y16S:
2526 case Format_Y16U:
2527 *pPerfTag = VPHAL_NONE;
2528 break;
2529 default:
2530 VPHAL_RENDER_ASSERTMESSAGE("Output Format Not found.");
2531 return MOS_STATUS_INVALID_PARAMETER;
2532 }
2533 }
2534 else
2535 {
2536 *pPerfTag = VPHAL_PA_422CP;
2537 }
2538 }
2539 }
2540
2541 return MOS_STATUS_SUCCESS;
2542 }
2543
UpdateVeboxStates()2544 MOS_STATUS VpVeboxCmdPacket::UpdateVeboxStates()
2545 {
2546 VP_FUNC_CALL();
2547
2548 return MOS_STATUS_SUCCESS;
2549 }
2550
InitSurfMemCacheControl(VP_EXECUTE_CAPS packetCaps)2551 MOS_STATUS VpVeboxCmdPacket::InitSurfMemCacheControl(VP_EXECUTE_CAPS packetCaps)
2552 {
2553 VP_FUNC_CALL();
2554
2555 MOS_HW_RESOURCE_DEF Usage = MOS_HW_RESOURCE_DEF_MAX;
2556 MEMORY_OBJECT_CONTROL_STATE MemObjCtrl = {};
2557 PMOS_INTERFACE pOsInterface = nullptr;
2558 PVP_VEBOX_CACHE_CNTL pSettings = nullptr;
2559
2560 if (nullptr == m_surfMemCacheCtl)
2561 {
2562 m_surfMemCacheCtl = MOS_New(VP_VEBOX_CACHE_CNTL);
2563 }
2564
2565 VP_PUBLIC_CHK_NULL_RETURN(m_surfMemCacheCtl);
2566 VP_PUBLIC_CHK_NULL_RETURN(m_hwInterface);
2567 VP_PUBLIC_CHK_NULL_RETURN(m_hwInterface->m_osInterface);
2568
2569 MOS_ZeroMemory(m_surfMemCacheCtl, sizeof(VP_VEBOX_CACHE_CNTL));
2570
2571 pOsInterface = m_hwInterface->m_osInterface;
2572 pSettings = m_surfMemCacheCtl;
2573
2574 pSettings->bDnDi = true;
2575
2576 if (pSettings->bDnDi)
2577 {
2578 pSettings->DnDi.bL3CachingEnabled = true;
2579
2580 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.CurrentInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2581 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.PreviousInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2582 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.STMMInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2583 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.STMMOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2584 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.DnOutSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2585
2586 if (packetCaps.bVebox && !packetCaps.bSFC && !packetCaps.bRender)
2587 {
2588 // Disable cache for output surface in vebox only condition
2589 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.CurrentOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2590 }
2591 else
2592 {
2593 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.CurrentOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2594 }
2595
2596 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.StatisticsOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2597 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.AlphaOrVignetteSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2598 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.LaceOrAceOrRgbHistogramSurfCtrl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2599 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.SkinScoreSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2600 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.LaceLookUpTablesSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2601 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.Vebox3DLookUpTablesSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2602 }
2603 else
2604 {
2605 pSettings->DnDi.bL3CachingEnabled = false;
2606
2607 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.CurrentInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2608 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.PreviousInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2609 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.STMMInputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2610 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.STMMOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2611 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.DnOutSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2612 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.CurrentOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2613 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.StatisticsOutputSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2614 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.AlphaOrVignetteSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2615 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.LaceOrAceOrRgbHistogramSurfCtrl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2616 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.SkinScoreSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2617 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.LaceLookUpTablesSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2618 VPHAL_SET_SURF_MEMOBJCTL(pSettings->DnDi.Vebox3DLookUpTablesSurfMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2619 }
2620
2621 if (pSettings->bLace)
2622 {
2623 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.FrameHistogramSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2624 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.AggregatedHistogramSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2625 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.StdStatisticsSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2626 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.PwlfInSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2627 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.PwlfOutSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2628 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.WeitCoefSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_SurfaceState);
2629 }
2630 else
2631 {
2632 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.FrameHistogramSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2633 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.AggregatedHistogramSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2634 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.StdStatisticsSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2635 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.PwlfInSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2636 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.PwlfOutSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2637 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.WeitCoefSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2638 VPHAL_SET_SURF_MEMOBJCTL(pSettings->Lace.GlobalToneMappingCurveLUTSurfaceMemObjCtl, MOS_MP_RESOURCE_USAGE_DEFAULT);
2639 }
2640
2641 return MOS_STATUS_SUCCESS;
2642 }
2643
VpHalCspace2MhwCspace(VPHAL_CSPACE cspace)2644 MHW_CSPACE VpVeboxCmdPacket::VpHalCspace2MhwCspace(VPHAL_CSPACE cspace)
2645 {
2646 VP_FUNC_CALL();
2647
2648 switch (cspace)
2649 {
2650 case CSpace_Source:
2651 return MHW_CSpace_Source;
2652
2653 case CSpace_RGB:
2654 return MHW_CSpace_RGB;
2655
2656 case CSpace_YUV:
2657 return MHW_CSpace_YUV;
2658
2659 case CSpace_Gray:
2660 return MHW_CSpace_Gray;
2661
2662 case CSpace_Any:
2663 return MHW_CSpace_Any;
2664
2665 case CSpace_sRGB:
2666 return MHW_CSpace_sRGB;
2667
2668 case CSpace_stRGB:
2669 return MHW_CSpace_stRGB;
2670
2671 case CSpace_BT601:
2672 return MHW_CSpace_BT601;
2673
2674 case CSpace_BT601_FullRange:
2675 return MHW_CSpace_BT601_FullRange;
2676
2677 case CSpace_BT709:
2678 return MHW_CSpace_BT709;
2679
2680 case CSpace_BT709_FullRange:
2681 return MHW_CSpace_BT709_FullRange;
2682
2683 case CSpace_xvYCC601:
2684 return MHW_CSpace_xvYCC601;
2685
2686 case CSpace_xvYCC709:
2687 return MHW_CSpace_xvYCC709;
2688
2689 case CSpace_BT601Gray:
2690 return MHW_CSpace_BT601Gray;
2691
2692 case CSpace_BT601Gray_FullRange:
2693 return MHW_CSpace_BT601Gray_FullRange;
2694
2695 case CSpace_BT2020:
2696 return MHW_CSpace_BT2020;
2697
2698 case CSpace_BT2020_RGB:
2699 return MHW_CSpace_BT2020_RGB;
2700
2701 case CSpace_BT2020_FullRange:
2702 return MHW_CSpace_BT2020_FullRange;
2703
2704 case CSpace_BT2020_stRGB:
2705 return MHW_CSpace_BT2020_stRGB;
2706
2707 case CSpace_None:
2708 default:
2709 return MHW_CSpace_None;
2710 }
2711 }
2712
2713 }
2714
2715