1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * omap_hwmod implementation for OMAP2/3/4
4 *
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
7 *
8 * Paul Walmsley, Benoît Cousson, Kevin Hilman
9 *
10 * Created in collaboration with (alphabetical order): Thara Gopinath,
11 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
12 * Sawant, Santosh Shilimkar, Richard Woodruff
13 *
14 * Introduction
15 * ------------
16 * One way to view an OMAP SoC is as a collection of largely unrelated
17 * IP blocks connected by interconnects. The IP blocks include
18 * devices such as ARM processors, audio serial interfaces, UARTs,
19 * etc. Some of these devices, like the DSP, are created by TI;
20 * others, like the SGX, largely originate from external vendors. In
21 * TI's documentation, on-chip devices are referred to as "OMAP
22 * modules." Some of these IP blocks are identical across several
23 * OMAP versions. Others are revised frequently.
24 *
25 * These OMAP modules are tied together by various interconnects.
26 * Most of the address and data flow between modules is via OCP-based
27 * interconnects such as the L3 and L4 buses; but there are other
28 * interconnects that distribute the hardware clock tree, handle idle
29 * and reset signaling, supply power, and connect the modules to
30 * various pads or balls on the OMAP package.
31 *
32 * OMAP hwmod provides a consistent way to describe the on-chip
33 * hardware blocks and their integration into the rest of the chip.
34 * This description can be automatically generated from the TI
35 * hardware database. OMAP hwmod provides a standard, consistent API
36 * to reset, enable, idle, and disable these hardware blocks. And
37 * hwmod provides a way for other core code, such as the Linux device
38 * code or the OMAP power management and address space mapping code,
39 * to query the hardware database.
40 *
41 * Using hwmod
42 * -----------
43 * Drivers won't call hwmod functions directly. That is done by the
44 * omap_device code, and in rare occasions, by custom integration code
45 * in arch/arm/ *omap*. The omap_device code includes functions to
46 * build a struct platform_device using omap_hwmod data, and that is
47 * currently how hwmod data is communicated to drivers and to the
48 * Linux driver model. Most drivers will call omap_hwmod functions only
49 * indirectly, via pm_runtime*() functions.
50 *
51 * From a layering perspective, here is where the OMAP hwmod code
52 * fits into the kernel software stack:
53 *
54 * +-------------------------------+
55 * | Device driver code |
56 * | (e.g., drivers/) |
57 * +-------------------------------+
58 * | Linux driver model |
59 * | (platform_device / |
60 * | platform_driver data/code) |
61 * +-------------------------------+
62 * | OMAP core-driver integration |
63 * |(arch/arm/mach-omap2/devices.c)|
64 * +-------------------------------+
65 * | omap_device code |
66 * | (../plat-omap/omap_device.c) |
67 * +-------------------------------+
68 * ----> | omap_hwmod code/data | <-----
69 * | (../mach-omap2/omap_hwmod*) |
70 * +-------------------------------+
71 * | OMAP clock/PRCM/register fns |
72 * | ({read,write}l_relaxed, clk*) |
73 * +-------------------------------+
74 *
75 * Device drivers should not contain any OMAP-specific code or data in
76 * them. They should only contain code to operate the IP block that
77 * the driver is responsible for. This is because these IP blocks can
78 * also appear in other SoCs, either from TI (such as DaVinci) or from
79 * other manufacturers; and drivers should be reusable across other
80 * platforms.
81 *
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
83 * devices upon boot. The goal here is for the kernel to be
84 * completely self-reliant and independent from bootloaders. This is
85 * to ensure a repeatable configuration, both to ensure consistent
86 * runtime behavior, and to make it easier for others to reproduce
87 * bugs.
88 *
89 * OMAP module activity states
90 * ---------------------------
91 * The hwmod code considers modules to be in one of several activity
92 * states. IP blocks start out in an UNKNOWN state, then once they
93 * are registered via the hwmod code, proceed to the REGISTERED state.
94 * Once their clock names are resolved to clock pointers, the module
95 * enters the CLKS_INITED state; and finally, once the module has been
96 * reset and the integration registers programmed, the INITIALIZED state
97 * is entered. The hwmod code will then place the module into either
98 * the IDLE state to save power, or in the case of a critical system
99 * module, the ENABLED state.
100 *
101 * OMAP core integration code can then call omap_hwmod*() functions
102 * directly to move the module between the IDLE, ENABLED, and DISABLED
103 * states, as needed. This is done during both the PM idle loop, and
104 * in the OMAP core integration code's implementation of the PM runtime
105 * functions.
106 *
107 * References
108 * ----------
109 * This is a partial list.
110 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
111 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
112 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
113 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
114 * - Open Core Protocol Specification 2.2
115 *
116 * To do:
117 * - handle IO mapping
118 * - bus throughput & module latency measurement code
119 *
120 * XXX add tests at the beginning of each function to ensure the hwmod is
121 * in the appropriate state
122 * XXX error return values should be checked to ensure that they are
123 * appropriate
124 */
125 #undef DEBUG
126
127 #include <linux/kernel.h>
128 #include <linux/errno.h>
129 #include <linux/io.h>
130 #include <linux/clk.h>
131 #include <linux/clk-provider.h>
132 #include <linux/delay.h>
133 #include <linux/err.h>
134 #include <linux/list.h>
135 #include <linux/mutex.h>
136 #include <linux/spinlock.h>
137 #include <linux/slab.h>
138 #include <linux/cpu.h>
139 #include <linux/of.h>
140 #include <linux/of_address.h>
141 #include <linux/memblock.h>
142
143 #include <linux/platform_data/ti-sysc.h>
144
145 #include <dt-bindings/bus/ti-sysc.h>
146
147 #include <asm/system_misc.h>
148
149 #include "clock.h"
150 #include "omap_hwmod.h"
151
152 #include "soc.h"
153 #include "common.h"
154 #include "clockdomain.h"
155 #include "hdq1w.h"
156 #include "mmc.h"
157 #include "powerdomain.h"
158 #include "cm2xxx.h"
159 #include "cm3xxx.h"
160 #include "cm33xx.h"
161 #include "prm.h"
162 #include "prm3xxx.h"
163 #include "prm44xx.h"
164 #include "prm33xx.h"
165 #include "prminst44xx.h"
166 #include "pm.h"
167 #include "wd_timer.h"
168
169 /* Name of the OMAP hwmod for the MPU */
170 #define MPU_INITIATOR_NAME "mpu"
171
172 /*
173 * Number of struct omap_hwmod_link records per struct
174 * omap_hwmod_ocp_if record (master->slave and slave->master)
175 */
176 #define LINKS_PER_OCP_IF 2
177
178 /*
179 * Address offset (in bytes) between the reset control and the reset
180 * status registers: 4 bytes on OMAP4
181 */
182 #define OMAP4_RST_CTRL_ST_OFFSET 4
183
184 /*
185 * Maximum length for module clock handle names
186 */
187 #define MOD_CLK_MAX_NAME_LEN 32
188
189 /**
190 * struct clkctrl_provider - clkctrl provider mapping data
191 * @num_addrs: number of base address ranges for the provider
192 * @addr: base address(es) for the provider
193 * @size: size(s) of the provider address space(s)
194 * @node: device node associated with the provider
195 * @link: list link
196 */
197 struct clkctrl_provider {
198 int num_addrs;
199 u32 *addr;
200 u32 *size;
201 struct device_node *node;
202 struct list_head link;
203 };
204
205 static LIST_HEAD(clkctrl_providers);
206
207 /**
208 * struct omap_hwmod_reset - IP specific reset functions
209 * @match: string to match against the module name
210 * @len: number of characters to match
211 * @reset: IP specific reset function
212 *
213 * Used only in cases where struct omap_hwmod is dynamically allocated.
214 */
215 struct omap_hwmod_reset {
216 const char *match;
217 int len;
218 int (*reset)(struct omap_hwmod *oh);
219 };
220
221 /**
222 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
223 * @enable_module: function to enable a module (via MODULEMODE)
224 * @disable_module: function to disable a module (via MODULEMODE)
225 *
226 * XXX Eventually this functionality will be hidden inside the PRM/CM
227 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
228 * conditionals in this code.
229 */
230 struct omap_hwmod_soc_ops {
231 void (*enable_module)(struct omap_hwmod *oh);
232 int (*disable_module)(struct omap_hwmod *oh);
233 int (*wait_target_ready)(struct omap_hwmod *oh);
234 int (*assert_hardreset)(struct omap_hwmod *oh,
235 struct omap_hwmod_rst_info *ohri);
236 int (*deassert_hardreset)(struct omap_hwmod *oh,
237 struct omap_hwmod_rst_info *ohri);
238 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
239 struct omap_hwmod_rst_info *ohri);
240 int (*init_clkdm)(struct omap_hwmod *oh);
241 void (*update_context_lost)(struct omap_hwmod *oh);
242 int (*get_context_lost)(struct omap_hwmod *oh);
243 int (*disable_direct_prcm)(struct omap_hwmod *oh);
244 u32 (*xlate_clkctrl)(struct omap_hwmod *oh);
245 };
246
247 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
248 static struct omap_hwmod_soc_ops soc_ops;
249
250 /* omap_hwmod_list contains all registered struct omap_hwmods */
251 static LIST_HEAD(omap_hwmod_list);
252 static DEFINE_MUTEX(list_lock);
253
254 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
255 static struct omap_hwmod *mpu_oh;
256
257 /* inited: set to true once the hwmod code is initialized */
258 static bool inited;
259
260 /* Private functions */
261
262 /**
263 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
264 * @oh: struct omap_hwmod *
265 *
266 * Load the current value of the hwmod OCP_SYSCONFIG register into the
267 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
268 * OCP_SYSCONFIG register or 0 upon success.
269 */
_update_sysc_cache(struct omap_hwmod * oh)270 static int _update_sysc_cache(struct omap_hwmod *oh)
271 {
272 if (!oh->class->sysc) {
273 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
274 return -EINVAL;
275 }
276
277 /* XXX ensure module interface clock is up */
278
279 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
280
281 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
282 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
283
284 return 0;
285 }
286
287 /**
288 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
289 * @v: OCP_SYSCONFIG value to write
290 * @oh: struct omap_hwmod *
291 *
292 * Write @v into the module class' OCP_SYSCONFIG register, if it has
293 * one. No return value.
294 */
_write_sysconfig(u32 v,struct omap_hwmod * oh)295 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
296 {
297 if (!oh->class->sysc) {
298 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
299 return;
300 }
301
302 /* XXX ensure module interface clock is up */
303
304 /* Module might have lost context, always update cache and register */
305 oh->_sysc_cache = v;
306
307 /*
308 * Some IP blocks (such as RTC) require unlocking of IP before
309 * accessing its registers. If a function pointer is present
310 * to unlock, then call it before accessing sysconfig and
311 * call lock after writing sysconfig.
312 */
313 if (oh->class->unlock)
314 oh->class->unlock(oh);
315
316 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
317
318 if (oh->class->lock)
319 oh->class->lock(oh);
320 }
321
322 /**
323 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
324 * @oh: struct omap_hwmod *
325 * @standbymode: MIDLEMODE field bits
326 * @v: pointer to register contents to modify
327 *
328 * Update the master standby mode bits in @v to be @standbymode for
329 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
330 * upon error or 0 upon success.
331 */
_set_master_standbymode(struct omap_hwmod * oh,u8 standbymode,u32 * v)332 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
333 u32 *v)
334 {
335 u32 mstandby_mask;
336 u8 mstandby_shift;
337
338 if (!oh->class->sysc ||
339 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
340 return -EINVAL;
341
342 if (!oh->class->sysc->sysc_fields) {
343 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
344 return -EINVAL;
345 }
346
347 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
348 mstandby_mask = (0x3 << mstandby_shift);
349
350 *v &= ~mstandby_mask;
351 *v |= __ffs(standbymode) << mstandby_shift;
352
353 return 0;
354 }
355
356 /**
357 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
358 * @oh: struct omap_hwmod *
359 * @idlemode: SIDLEMODE field bits
360 * @v: pointer to register contents to modify
361 *
362 * Update the slave idle mode bits in @v to be @idlemode for the @oh
363 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
364 * or 0 upon success.
365 */
_set_slave_idlemode(struct omap_hwmod * oh,u8 idlemode,u32 * v)366 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
367 {
368 u32 sidle_mask;
369 u8 sidle_shift;
370
371 if (!oh->class->sysc ||
372 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
373 return -EINVAL;
374
375 if (!oh->class->sysc->sysc_fields) {
376 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
377 return -EINVAL;
378 }
379
380 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
381 sidle_mask = (0x3 << sidle_shift);
382
383 *v &= ~sidle_mask;
384 *v |= __ffs(idlemode) << sidle_shift;
385
386 return 0;
387 }
388
389 /**
390 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
391 * @oh: struct omap_hwmod *
392 * @clockact: CLOCKACTIVITY field bits
393 * @v: pointer to register contents to modify
394 *
395 * Update the clockactivity mode bits in @v to be @clockact for the
396 * @oh hwmod. Used for additional powersaving on some modules. Does
397 * not write to the hardware. Returns -EINVAL upon error or 0 upon
398 * success.
399 */
_set_clockactivity(struct omap_hwmod * oh,u8 clockact,u32 * v)400 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
401 {
402 u32 clkact_mask;
403 u8 clkact_shift;
404
405 if (!oh->class->sysc ||
406 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
407 return -EINVAL;
408
409 if (!oh->class->sysc->sysc_fields) {
410 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
411 return -EINVAL;
412 }
413
414 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
415 clkact_mask = (0x3 << clkact_shift);
416
417 *v &= ~clkact_mask;
418 *v |= clockact << clkact_shift;
419
420 return 0;
421 }
422
423 /**
424 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
425 * @oh: struct omap_hwmod *
426 * @v: pointer to register contents to modify
427 *
428 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
429 * error or 0 upon success.
430 */
_set_softreset(struct omap_hwmod * oh,u32 * v)431 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
432 {
433 u32 softrst_mask;
434
435 if (!oh->class->sysc ||
436 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
437 return -EINVAL;
438
439 if (!oh->class->sysc->sysc_fields) {
440 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
441 return -EINVAL;
442 }
443
444 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
445
446 *v |= softrst_mask;
447
448 return 0;
449 }
450
451 /**
452 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
453 * @oh: struct omap_hwmod *
454 * @v: pointer to register contents to modify
455 *
456 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
457 * error or 0 upon success.
458 */
_clear_softreset(struct omap_hwmod * oh,u32 * v)459 static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
460 {
461 u32 softrst_mask;
462
463 if (!oh->class->sysc ||
464 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
465 return -EINVAL;
466
467 if (!oh->class->sysc->sysc_fields) {
468 WARN(1,
469 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
470 oh->name);
471 return -EINVAL;
472 }
473
474 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
475
476 *v &= ~softrst_mask;
477
478 return 0;
479 }
480
481 /**
482 * _wait_softreset_complete - wait for an OCP softreset to complete
483 * @oh: struct omap_hwmod * to wait on
484 *
485 * Wait until the IP block represented by @oh reports that its OCP
486 * softreset is complete. This can be triggered by software (see
487 * _ocp_softreset()) or by hardware upon returning from off-mode (one
488 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
489 * microseconds. Returns the number of microseconds waited.
490 */
_wait_softreset_complete(struct omap_hwmod * oh)491 static int _wait_softreset_complete(struct omap_hwmod *oh)
492 {
493 struct omap_hwmod_class_sysconfig *sysc;
494 u32 softrst_mask;
495 int c = 0;
496
497 sysc = oh->class->sysc;
498
499 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS && sysc->syss_offs > 0)
500 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
501 & SYSS_RESETDONE_MASK),
502 MAX_MODULE_SOFTRESET_WAIT, c);
503 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
504 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
505 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
506 & softrst_mask),
507 MAX_MODULE_SOFTRESET_WAIT, c);
508 }
509
510 return c;
511 }
512
513 /**
514 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
515 * @oh: struct omap_hwmod *
516 *
517 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
518 * of some modules. When the DMA must perform read/write accesses, the
519 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
520 * for power management, software must set the DMADISABLE bit back to 1.
521 *
522 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
523 * error or 0 upon success.
524 */
_set_dmadisable(struct omap_hwmod * oh)525 static int _set_dmadisable(struct omap_hwmod *oh)
526 {
527 u32 v;
528 u32 dmadisable_mask;
529
530 if (!oh->class->sysc ||
531 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
532 return -EINVAL;
533
534 if (!oh->class->sysc->sysc_fields) {
535 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
536 return -EINVAL;
537 }
538
539 /* clocks must be on for this operation */
540 if (oh->_state != _HWMOD_STATE_ENABLED) {
541 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
542 return -EINVAL;
543 }
544
545 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
546
547 v = oh->_sysc_cache;
548 dmadisable_mask =
549 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
550 v |= dmadisable_mask;
551 _write_sysconfig(v, oh);
552
553 return 0;
554 }
555
556 /**
557 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
558 * @oh: struct omap_hwmod *
559 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
560 * @v: pointer to register contents to modify
561 *
562 * Update the module autoidle bit in @v to be @autoidle for the @oh
563 * hwmod. The autoidle bit controls whether the module can gate
564 * internal clocks automatically when it isn't doing anything; the
565 * exact function of this bit varies on a per-module basis. This
566 * function does not write to the hardware. Returns -EINVAL upon
567 * error or 0 upon success.
568 */
_set_module_autoidle(struct omap_hwmod * oh,u8 autoidle,u32 * v)569 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
570 u32 *v)
571 {
572 u32 autoidle_mask;
573 u8 autoidle_shift;
574
575 if (!oh->class->sysc ||
576 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
577 return -EINVAL;
578
579 if (!oh->class->sysc->sysc_fields) {
580 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
581 return -EINVAL;
582 }
583
584 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
585 autoidle_mask = (0x1 << autoidle_shift);
586
587 *v &= ~autoidle_mask;
588 *v |= autoidle << autoidle_shift;
589
590 return 0;
591 }
592
593 /**
594 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
595 * @oh: struct omap_hwmod *
596 *
597 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
598 * upon error or 0 upon success.
599 */
_enable_wakeup(struct omap_hwmod * oh,u32 * v)600 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
601 {
602 if (!oh->class->sysc ||
603 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
604 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
605 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
606 return -EINVAL;
607
608 if (!oh->class->sysc->sysc_fields) {
609 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
610 return -EINVAL;
611 }
612
613 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
614 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
615
616 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
617 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
618 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
619 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
620
621 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
622
623 return 0;
624 }
625
_get_clkdm(struct omap_hwmod * oh)626 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
627 {
628 struct clk_hw_omap *clk;
629
630 if (!oh)
631 return NULL;
632
633 if (oh->clkdm) {
634 return oh->clkdm;
635 } else if (oh->_clk) {
636 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
637 return NULL;
638 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
639 return clk->clkdm;
640 }
641 return NULL;
642 }
643
644 /**
645 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
646 * @oh: struct omap_hwmod *
647 *
648 * Prevent the hardware module @oh from entering idle while the
649 * hardare module initiator @init_oh is active. Useful when a module
650 * will be accessed by a particular initiator (e.g., if a module will
651 * be accessed by the IVA, there should be a sleepdep between the IVA
652 * initiator and the module). Only applies to modules in smart-idle
653 * mode. If the clockdomain is marked as not needing autodeps, return
654 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
655 * passes along clkdm_add_sleepdep() value upon success.
656 */
_add_initiator_dep(struct omap_hwmod * oh,struct omap_hwmod * init_oh)657 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
658 {
659 struct clockdomain *clkdm, *init_clkdm;
660
661 clkdm = _get_clkdm(oh);
662 init_clkdm = _get_clkdm(init_oh);
663
664 if (!clkdm || !init_clkdm)
665 return -EINVAL;
666
667 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
668 return 0;
669
670 return clkdm_add_sleepdep(clkdm, init_clkdm);
671 }
672
673 /**
674 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
675 * @oh: struct omap_hwmod *
676 *
677 * Allow the hardware module @oh to enter idle while the hardare
678 * module initiator @init_oh is active. Useful when a module will not
679 * be accessed by a particular initiator (e.g., if a module will not
680 * be accessed by the IVA, there should be no sleepdep between the IVA
681 * initiator and the module). Only applies to modules in smart-idle
682 * mode. If the clockdomain is marked as not needing autodeps, return
683 * 0 without doing anything. Returns -EINVAL upon error or passes
684 * along clkdm_del_sleepdep() value upon success.
685 */
_del_initiator_dep(struct omap_hwmod * oh,struct omap_hwmod * init_oh)686 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
687 {
688 struct clockdomain *clkdm, *init_clkdm;
689
690 clkdm = _get_clkdm(oh);
691 init_clkdm = _get_clkdm(init_oh);
692
693 if (!clkdm || !init_clkdm)
694 return -EINVAL;
695
696 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
697 return 0;
698
699 return clkdm_del_sleepdep(clkdm, init_clkdm);
700 }
701
702 static const struct of_device_id ti_clkctrl_match_table[] __initconst = {
703 { .compatible = "ti,clkctrl" },
704 { }
705 };
706
_setup_clkctrl_provider(struct device_node * np)707 static int __init _setup_clkctrl_provider(struct device_node *np)
708 {
709 const __be32 *addrp;
710 struct clkctrl_provider *provider;
711 u64 size;
712 int i;
713
714 provider = memblock_alloc(sizeof(*provider), SMP_CACHE_BYTES);
715 if (!provider)
716 return -ENOMEM;
717
718 provider->node = np;
719
720 provider->num_addrs =
721 of_property_count_elems_of_size(np, "reg", sizeof(u32)) / 2;
722
723 provider->addr =
724 memblock_alloc(sizeof(void *) * provider->num_addrs,
725 SMP_CACHE_BYTES);
726 if (!provider->addr)
727 return -ENOMEM;
728
729 provider->size =
730 memblock_alloc(sizeof(u32) * provider->num_addrs,
731 SMP_CACHE_BYTES);
732 if (!provider->size)
733 return -ENOMEM;
734
735 for (i = 0; i < provider->num_addrs; i++) {
736 addrp = of_get_address(np, i, &size, NULL);
737 provider->addr[i] = (u32)of_translate_address(np, addrp);
738 provider->size[i] = size;
739 pr_debug("%s: %pOF: %x...%x\n", __func__, np, provider->addr[i],
740 provider->addr[i] + provider->size[i]);
741 }
742
743 list_add(&provider->link, &clkctrl_providers);
744
745 return 0;
746 }
747
_init_clkctrl_providers(void)748 static int __init _init_clkctrl_providers(void)
749 {
750 struct device_node *np;
751 int ret = 0;
752
753 for_each_matching_node(np, ti_clkctrl_match_table) {
754 ret = _setup_clkctrl_provider(np);
755 if (ret)
756 break;
757 }
758
759 return ret;
760 }
761
_omap4_xlate_clkctrl(struct omap_hwmod * oh)762 static u32 _omap4_xlate_clkctrl(struct omap_hwmod *oh)
763 {
764 if (!oh->prcm.omap4.modulemode)
765 return 0;
766
767 return omap_cm_xlate_clkctrl(oh->clkdm->prcm_partition,
768 oh->clkdm->cm_inst,
769 oh->prcm.omap4.clkctrl_offs);
770 }
771
_lookup_clkctrl_clk(struct omap_hwmod * oh)772 static struct clk *_lookup_clkctrl_clk(struct omap_hwmod *oh)
773 {
774 struct clkctrl_provider *provider;
775 struct clk *clk;
776 u32 addr;
777
778 if (!soc_ops.xlate_clkctrl)
779 return NULL;
780
781 addr = soc_ops.xlate_clkctrl(oh);
782 if (!addr)
783 return NULL;
784
785 pr_debug("%s: %s: addr=%x\n", __func__, oh->name, addr);
786
787 list_for_each_entry(provider, &clkctrl_providers, link) {
788 int i;
789
790 for (i = 0; i < provider->num_addrs; i++) {
791 if (provider->addr[i] <= addr &&
792 provider->addr[i] + provider->size[i] > addr) {
793 struct of_phandle_args clkspec;
794
795 clkspec.np = provider->node;
796 clkspec.args_count = 2;
797 clkspec.args[0] = addr - provider->addr[0];
798 clkspec.args[1] = 0;
799
800 clk = of_clk_get_from_provider(&clkspec);
801
802 pr_debug("%s: %s got %p (offset=%x, provider=%pOF)\n",
803 __func__, oh->name, clk,
804 clkspec.args[0], provider->node);
805
806 return clk;
807 }
808 }
809 }
810
811 return NULL;
812 }
813
814 /**
815 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
816 * @oh: struct omap_hwmod *
817 *
818 * Called from _init_clocks(). Populates the @oh _clk (main
819 * functional clock pointer) if a clock matching the hwmod name is found,
820 * or a main_clk is present. Returns 0 on success or -EINVAL on error.
821 */
_init_main_clk(struct omap_hwmod * oh)822 static int _init_main_clk(struct omap_hwmod *oh)
823 {
824 int ret = 0;
825 struct clk *clk = NULL;
826
827 clk = _lookup_clkctrl_clk(oh);
828
829 if (!IS_ERR_OR_NULL(clk)) {
830 pr_debug("%s: mapped main_clk %s for %s\n", __func__,
831 __clk_get_name(clk), oh->name);
832 oh->main_clk = __clk_get_name(clk);
833 oh->_clk = clk;
834 soc_ops.disable_direct_prcm(oh);
835 } else {
836 if (!oh->main_clk)
837 return 0;
838
839 oh->_clk = clk_get(NULL, oh->main_clk);
840 }
841
842 if (IS_ERR(oh->_clk)) {
843 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
844 oh->name, oh->main_clk);
845 return -EINVAL;
846 }
847 /*
848 * HACK: This needs a re-visit once clk_prepare() is implemented
849 * to do something meaningful. Today its just a no-op.
850 * If clk_prepare() is used at some point to do things like
851 * voltage scaling etc, then this would have to be moved to
852 * some point where subsystems like i2c and pmic become
853 * available.
854 */
855 clk_prepare(oh->_clk);
856
857 if (!_get_clkdm(oh))
858 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
859 oh->name, oh->main_clk);
860
861 return ret;
862 }
863
864 /**
865 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
866 * @oh: struct omap_hwmod *
867 *
868 * Called from _init_clocks(). Populates the @oh OCP slave interface
869 * clock pointers. Returns 0 on success or -EINVAL on error.
870 */
_init_interface_clks(struct omap_hwmod * oh)871 static int _init_interface_clks(struct omap_hwmod *oh)
872 {
873 struct omap_hwmod_ocp_if *os;
874 struct clk *c;
875 int ret = 0;
876
877 list_for_each_entry(os, &oh->slave_ports, node) {
878 if (!os->clk)
879 continue;
880
881 c = clk_get(NULL, os->clk);
882 if (IS_ERR(c)) {
883 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
884 oh->name, os->clk);
885 ret = -EINVAL;
886 continue;
887 }
888 os->_clk = c;
889 /*
890 * HACK: This needs a re-visit once clk_prepare() is implemented
891 * to do something meaningful. Today its just a no-op.
892 * If clk_prepare() is used at some point to do things like
893 * voltage scaling etc, then this would have to be moved to
894 * some point where subsystems like i2c and pmic become
895 * available.
896 */
897 clk_prepare(os->_clk);
898 }
899
900 return ret;
901 }
902
903 /**
904 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
905 * @oh: struct omap_hwmod *
906 *
907 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
908 * clock pointers. Returns 0 on success or -EINVAL on error.
909 */
_init_opt_clks(struct omap_hwmod * oh)910 static int _init_opt_clks(struct omap_hwmod *oh)
911 {
912 struct omap_hwmod_opt_clk *oc;
913 struct clk *c;
914 int i;
915 int ret = 0;
916
917 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
918 c = clk_get(NULL, oc->clk);
919 if (IS_ERR(c)) {
920 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
921 oh->name, oc->clk);
922 ret = -EINVAL;
923 continue;
924 }
925 oc->_clk = c;
926 /*
927 * HACK: This needs a re-visit once clk_prepare() is implemented
928 * to do something meaningful. Today its just a no-op.
929 * If clk_prepare() is used at some point to do things like
930 * voltage scaling etc, then this would have to be moved to
931 * some point where subsystems like i2c and pmic become
932 * available.
933 */
934 clk_prepare(oc->_clk);
935 }
936
937 return ret;
938 }
939
_enable_optional_clocks(struct omap_hwmod * oh)940 static void _enable_optional_clocks(struct omap_hwmod *oh)
941 {
942 struct omap_hwmod_opt_clk *oc;
943 int i;
944
945 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
946
947 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
948 if (oc->_clk) {
949 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
950 __clk_get_name(oc->_clk));
951 clk_enable(oc->_clk);
952 }
953 }
954
_disable_optional_clocks(struct omap_hwmod * oh)955 static void _disable_optional_clocks(struct omap_hwmod *oh)
956 {
957 struct omap_hwmod_opt_clk *oc;
958 int i;
959
960 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
961
962 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
963 if (oc->_clk) {
964 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
965 __clk_get_name(oc->_clk));
966 clk_disable(oc->_clk);
967 }
968 }
969
970 /**
971 * _enable_clocks - enable hwmod main clock and interface clocks
972 * @oh: struct omap_hwmod *
973 *
974 * Enables all clocks necessary for register reads and writes to succeed
975 * on the hwmod @oh. Returns 0.
976 */
_enable_clocks(struct omap_hwmod * oh)977 static int _enable_clocks(struct omap_hwmod *oh)
978 {
979 struct omap_hwmod_ocp_if *os;
980
981 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
982
983 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
984 _enable_optional_clocks(oh);
985
986 if (oh->_clk)
987 clk_enable(oh->_clk);
988
989 list_for_each_entry(os, &oh->slave_ports, node) {
990 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
991 omap2_clk_deny_idle(os->_clk);
992 clk_enable(os->_clk);
993 }
994 }
995
996 /* The opt clocks are controlled by the device driver. */
997
998 return 0;
999 }
1000
1001 /**
1002 * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
1003 * @oh: struct omap_hwmod *
1004 */
_omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod * oh)1005 static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
1006 {
1007 if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
1008 return true;
1009
1010 return false;
1011 }
1012
1013 /**
1014 * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
1015 * @oh: struct omap_hwmod *
1016 */
_omap4_has_clkctrl_clock(struct omap_hwmod * oh)1017 static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
1018 {
1019 if (oh->prcm.omap4.clkctrl_offs)
1020 return true;
1021
1022 if (!oh->prcm.omap4.clkctrl_offs &&
1023 oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
1024 return true;
1025
1026 return false;
1027 }
1028
1029 /**
1030 * _disable_clocks - disable hwmod main clock and interface clocks
1031 * @oh: struct omap_hwmod *
1032 *
1033 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
1034 */
_disable_clocks(struct omap_hwmod * oh)1035 static int _disable_clocks(struct omap_hwmod *oh)
1036 {
1037 struct omap_hwmod_ocp_if *os;
1038
1039 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
1040
1041 if (oh->_clk)
1042 clk_disable(oh->_clk);
1043
1044 list_for_each_entry(os, &oh->slave_ports, node) {
1045 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) {
1046 clk_disable(os->_clk);
1047 omap2_clk_allow_idle(os->_clk);
1048 }
1049 }
1050
1051 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
1052 _disable_optional_clocks(oh);
1053
1054 /* The opt clocks are controlled by the device driver. */
1055
1056 return 0;
1057 }
1058
1059 /**
1060 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
1061 * @oh: struct omap_hwmod *
1062 *
1063 * Enables the PRCM module mode related to the hwmod @oh.
1064 * No return value.
1065 */
_omap4_enable_module(struct omap_hwmod * oh)1066 static void _omap4_enable_module(struct omap_hwmod *oh)
1067 {
1068 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1069 _omap4_clkctrl_managed_by_clkfwk(oh))
1070 return;
1071
1072 pr_debug("omap_hwmod: %s: %s: %d\n",
1073 oh->name, __func__, oh->prcm.omap4.modulemode);
1074
1075 omap_cm_module_enable(oh->prcm.omap4.modulemode,
1076 oh->clkdm->prcm_partition,
1077 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
1078 }
1079
1080 /**
1081 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
1082 * @oh: struct omap_hwmod *
1083 *
1084 * Wait for a module @oh to enter slave idle. Returns 0 if the module
1085 * does not have an IDLEST bit or if the module successfully enters
1086 * slave idle; otherwise, pass along the return value of the
1087 * appropriate *_cm*_wait_module_idle() function.
1088 */
_omap4_wait_target_disable(struct omap_hwmod * oh)1089 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
1090 {
1091 if (!oh)
1092 return -EINVAL;
1093
1094 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
1095 return 0;
1096
1097 if (oh->flags & HWMOD_NO_IDLEST)
1098 return 0;
1099
1100 if (_omap4_clkctrl_managed_by_clkfwk(oh))
1101 return 0;
1102
1103 if (!_omap4_has_clkctrl_clock(oh))
1104 return 0;
1105
1106 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
1107 oh->clkdm->cm_inst,
1108 oh->prcm.omap4.clkctrl_offs, 0);
1109 }
1110
1111 /**
1112 * _save_mpu_port_index - find and save the index to @oh's MPU port
1113 * @oh: struct omap_hwmod *
1114 *
1115 * Determines the array index of the OCP slave port that the MPU uses
1116 * to address the device, and saves it into the struct omap_hwmod.
1117 * Intended to be called during hwmod registration only. No return
1118 * value.
1119 */
_save_mpu_port_index(struct omap_hwmod * oh)1120 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1121 {
1122 struct omap_hwmod_ocp_if *os = NULL;
1123
1124 if (!oh)
1125 return;
1126
1127 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1128
1129 list_for_each_entry(os, &oh->slave_ports, node) {
1130 if (os->user & OCP_USER_MPU) {
1131 oh->_mpu_port = os;
1132 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1133 break;
1134 }
1135 }
1136
1137 return;
1138 }
1139
1140 /**
1141 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1142 * @oh: struct omap_hwmod *
1143 *
1144 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1145 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1146 * communicate with the IP block. This interface need not be directly
1147 * connected to the MPU (and almost certainly is not), but is directly
1148 * connected to the IP block represented by @oh. Returns a pointer
1149 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1150 * error or if there does not appear to be a path from the MPU to this
1151 * IP block.
1152 */
_find_mpu_rt_port(struct omap_hwmod * oh)1153 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1154 {
1155 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1156 return NULL;
1157
1158 return oh->_mpu_port;
1159 };
1160
1161 /**
1162 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1163 * @oh: struct omap_hwmod *
1164 *
1165 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1166 * by @oh is set to indicate to the PRCM that the IP block is active.
1167 * Usually this means placing the module into smart-idle mode and
1168 * smart-standby, but if there is a bug in the automatic idle handling
1169 * for the IP block, it may need to be placed into the force-idle or
1170 * no-idle variants of these modes. No return value.
1171 */
_enable_sysc(struct omap_hwmod * oh)1172 static void _enable_sysc(struct omap_hwmod *oh)
1173 {
1174 u8 idlemode, sf;
1175 u32 v;
1176 bool clkdm_act;
1177 struct clockdomain *clkdm;
1178
1179 if (!oh->class->sysc)
1180 return;
1181
1182 /*
1183 * Wait until reset has completed, this is needed as the IP
1184 * block is reset automatically by hardware in some cases
1185 * (off-mode for example), and the drivers require the
1186 * IP to be ready when they access it
1187 */
1188 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1189 _enable_optional_clocks(oh);
1190 _wait_softreset_complete(oh);
1191 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1192 _disable_optional_clocks(oh);
1193
1194 v = oh->_sysc_cache;
1195 sf = oh->class->sysc->sysc_flags;
1196
1197 clkdm = _get_clkdm(oh);
1198 if (sf & SYSC_HAS_SIDLEMODE) {
1199 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1200 oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
1201 idlemode = HWMOD_IDLEMODE_NO;
1202 } else {
1203 if (sf & SYSC_HAS_ENAWAKEUP)
1204 _enable_wakeup(oh, &v);
1205 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1206 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1207 else
1208 idlemode = HWMOD_IDLEMODE_SMART;
1209 }
1210
1211 /*
1212 * This is special handling for some IPs like
1213 * 32k sync timer. Force them to idle!
1214 */
1215 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1216 if (clkdm_act && !(oh->class->sysc->idlemodes &
1217 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1218 idlemode = HWMOD_IDLEMODE_FORCE;
1219
1220 _set_slave_idlemode(oh, idlemode, &v);
1221 }
1222
1223 if (sf & SYSC_HAS_MIDLEMODE) {
1224 if (oh->flags & HWMOD_FORCE_MSTANDBY) {
1225 idlemode = HWMOD_IDLEMODE_FORCE;
1226 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1227 idlemode = HWMOD_IDLEMODE_NO;
1228 } else {
1229 if (sf & SYSC_HAS_ENAWAKEUP)
1230 _enable_wakeup(oh, &v);
1231 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1232 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1233 else
1234 idlemode = HWMOD_IDLEMODE_SMART;
1235 }
1236 _set_master_standbymode(oh, idlemode, &v);
1237 }
1238
1239 /*
1240 * XXX The clock framework should handle this, by
1241 * calling into this code. But this must wait until the
1242 * clock structures are tagged with omap_hwmod entries
1243 */
1244 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1245 (sf & SYSC_HAS_CLOCKACTIVITY))
1246 _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
1247
1248 _write_sysconfig(v, oh);
1249
1250 /*
1251 * Set the autoidle bit only after setting the smartidle bit
1252 * Setting this will not have any impact on the other modules.
1253 */
1254 if (sf & SYSC_HAS_AUTOIDLE) {
1255 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1256 0 : 1;
1257 _set_module_autoidle(oh, idlemode, &v);
1258 _write_sysconfig(v, oh);
1259 }
1260 }
1261
1262 /**
1263 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1264 * @oh: struct omap_hwmod *
1265 *
1266 * If module is marked as SWSUP_SIDLE, force the module into slave
1267 * idle; otherwise, configure it for smart-idle. If module is marked
1268 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1269 * configure it for smart-standby. No return value.
1270 */
_idle_sysc(struct omap_hwmod * oh)1271 static void _idle_sysc(struct omap_hwmod *oh)
1272 {
1273 u8 idlemode, sf;
1274 u32 v;
1275
1276 if (!oh->class->sysc)
1277 return;
1278
1279 v = oh->_sysc_cache;
1280 sf = oh->class->sysc->sysc_flags;
1281
1282 if (sf & SYSC_HAS_SIDLEMODE) {
1283 if (oh->flags & HWMOD_SWSUP_SIDLE) {
1284 idlemode = HWMOD_IDLEMODE_FORCE;
1285 } else {
1286 if (sf & SYSC_HAS_ENAWAKEUP)
1287 _enable_wakeup(oh, &v);
1288 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
1289 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1290 else
1291 idlemode = HWMOD_IDLEMODE_SMART;
1292 }
1293 _set_slave_idlemode(oh, idlemode, &v);
1294 }
1295
1296 if (sf & SYSC_HAS_MIDLEMODE) {
1297 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
1298 (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1299 idlemode = HWMOD_IDLEMODE_FORCE;
1300 } else {
1301 if (sf & SYSC_HAS_ENAWAKEUP)
1302 _enable_wakeup(oh, &v);
1303 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1304 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1305 else
1306 idlemode = HWMOD_IDLEMODE_SMART;
1307 }
1308 _set_master_standbymode(oh, idlemode, &v);
1309 }
1310
1311 /* If the cached value is the same as the new value, skip the write */
1312 if (oh->_sysc_cache != v)
1313 _write_sysconfig(v, oh);
1314 }
1315
1316 /**
1317 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1318 * @oh: struct omap_hwmod *
1319 *
1320 * Force the module into slave idle and master suspend. No return
1321 * value.
1322 */
_shutdown_sysc(struct omap_hwmod * oh)1323 static void _shutdown_sysc(struct omap_hwmod *oh)
1324 {
1325 u32 v;
1326 u8 sf;
1327
1328 if (!oh->class->sysc)
1329 return;
1330
1331 v = oh->_sysc_cache;
1332 sf = oh->class->sysc->sysc_flags;
1333
1334 if (sf & SYSC_HAS_SIDLEMODE)
1335 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1336
1337 if (sf & SYSC_HAS_MIDLEMODE)
1338 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1339
1340 if (sf & SYSC_HAS_AUTOIDLE)
1341 _set_module_autoidle(oh, 1, &v);
1342
1343 _write_sysconfig(v, oh);
1344 }
1345
1346 /**
1347 * _lookup - find an omap_hwmod by name
1348 * @name: find an omap_hwmod by name
1349 *
1350 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1351 */
_lookup(const char * name)1352 static struct omap_hwmod *_lookup(const char *name)
1353 {
1354 struct omap_hwmod *oh, *temp_oh;
1355
1356 oh = NULL;
1357
1358 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1359 if (!strcmp(name, temp_oh->name)) {
1360 oh = temp_oh;
1361 break;
1362 }
1363 }
1364
1365 return oh;
1366 }
1367
1368 /**
1369 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1370 * @oh: struct omap_hwmod *
1371 *
1372 * Convert a clockdomain name stored in a struct omap_hwmod into a
1373 * clockdomain pointer, and save it into the struct omap_hwmod.
1374 * Return -EINVAL if the clkdm_name lookup failed.
1375 */
_init_clkdm(struct omap_hwmod * oh)1376 static int _init_clkdm(struct omap_hwmod *oh)
1377 {
1378 if (!oh->clkdm_name) {
1379 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1380 return 0;
1381 }
1382
1383 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1384 if (!oh->clkdm) {
1385 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
1386 oh->name, oh->clkdm_name);
1387 return 0;
1388 }
1389
1390 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1391 oh->name, oh->clkdm_name);
1392
1393 return 0;
1394 }
1395
1396 /**
1397 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1398 * well the clockdomain.
1399 * @oh: struct omap_hwmod *
1400 * @np: device_node mapped to this hwmod
1401 *
1402 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1403 * Resolves all clock names embedded in the hwmod. Returns 0 on
1404 * success, or a negative error code on failure.
1405 */
_init_clocks(struct omap_hwmod * oh,struct device_node * np)1406 static int _init_clocks(struct omap_hwmod *oh, struct device_node *np)
1407 {
1408 int ret = 0;
1409
1410 if (oh->_state != _HWMOD_STATE_REGISTERED)
1411 return 0;
1412
1413 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1414
1415 if (soc_ops.init_clkdm)
1416 ret |= soc_ops.init_clkdm(oh);
1417
1418 ret |= _init_main_clk(oh);
1419 ret |= _init_interface_clks(oh);
1420 ret |= _init_opt_clks(oh);
1421
1422 if (!ret)
1423 oh->_state = _HWMOD_STATE_CLKS_INITED;
1424 else
1425 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1426
1427 return ret;
1428 }
1429
1430 /**
1431 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1432 * @oh: struct omap_hwmod *
1433 * @name: name of the reset line in the context of this hwmod
1434 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1435 *
1436 * Return the bit position of the reset line that match the
1437 * input name. Return -ENOENT if not found.
1438 */
_lookup_hardreset(struct omap_hwmod * oh,const char * name,struct omap_hwmod_rst_info * ohri)1439 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1440 struct omap_hwmod_rst_info *ohri)
1441 {
1442 int i;
1443
1444 for (i = 0; i < oh->rst_lines_cnt; i++) {
1445 const char *rst_line = oh->rst_lines[i].name;
1446 if (!strcmp(rst_line, name)) {
1447 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1448 ohri->st_shift = oh->rst_lines[i].st_shift;
1449 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1450 oh->name, __func__, rst_line, ohri->rst_shift,
1451 ohri->st_shift);
1452
1453 return 0;
1454 }
1455 }
1456
1457 return -ENOENT;
1458 }
1459
1460 /**
1461 * _assert_hardreset - assert the HW reset line of submodules
1462 * contained in the hwmod module.
1463 * @oh: struct omap_hwmod *
1464 * @name: name of the reset line to lookup and assert
1465 *
1466 * Some IP like dsp, ipu or iva contain processor that require an HW
1467 * reset line to be assert / deassert in order to enable fully the IP.
1468 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1469 * asserting the hardreset line on the currently-booted SoC, or passes
1470 * along the return value from _lookup_hardreset() or the SoC's
1471 * assert_hardreset code.
1472 */
_assert_hardreset(struct omap_hwmod * oh,const char * name)1473 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1474 {
1475 struct omap_hwmod_rst_info ohri;
1476 int ret = -EINVAL;
1477
1478 if (!oh)
1479 return -EINVAL;
1480
1481 if (!soc_ops.assert_hardreset)
1482 return -ENOSYS;
1483
1484 ret = _lookup_hardreset(oh, name, &ohri);
1485 if (ret < 0)
1486 return ret;
1487
1488 ret = soc_ops.assert_hardreset(oh, &ohri);
1489
1490 return ret;
1491 }
1492
1493 /**
1494 * _deassert_hardreset - deassert the HW reset line of submodules contained
1495 * in the hwmod module.
1496 * @oh: struct omap_hwmod *
1497 * @name: name of the reset line to look up and deassert
1498 *
1499 * Some IP like dsp, ipu or iva contain processor that require an HW
1500 * reset line to be assert / deassert in order to enable fully the IP.
1501 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1502 * deasserting the hardreset line on the currently-booted SoC, or passes
1503 * along the return value from _lookup_hardreset() or the SoC's
1504 * deassert_hardreset code.
1505 */
_deassert_hardreset(struct omap_hwmod * oh,const char * name)1506 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1507 {
1508 struct omap_hwmod_rst_info ohri;
1509 int ret = -EINVAL;
1510
1511 if (!oh)
1512 return -EINVAL;
1513
1514 if (!soc_ops.deassert_hardreset)
1515 return -ENOSYS;
1516
1517 ret = _lookup_hardreset(oh, name, &ohri);
1518 if (ret < 0)
1519 return ret;
1520
1521 if (oh->clkdm) {
1522 /*
1523 * A clockdomain must be in SW_SUP otherwise reset
1524 * might not be completed. The clockdomain can be set
1525 * in HW_AUTO only when the module become ready.
1526 */
1527 clkdm_deny_idle(oh->clkdm);
1528 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1529 if (ret) {
1530 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1531 oh->name, oh->clkdm->name, ret);
1532 return ret;
1533 }
1534 }
1535
1536 _enable_clocks(oh);
1537 if (soc_ops.enable_module)
1538 soc_ops.enable_module(oh);
1539
1540 ret = soc_ops.deassert_hardreset(oh, &ohri);
1541
1542 if (soc_ops.disable_module)
1543 soc_ops.disable_module(oh);
1544 _disable_clocks(oh);
1545
1546 if (ret == -EBUSY)
1547 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1548
1549 if (oh->clkdm) {
1550 /*
1551 * Set the clockdomain to HW_AUTO, assuming that the
1552 * previous state was HW_AUTO.
1553 */
1554 clkdm_allow_idle(oh->clkdm);
1555
1556 clkdm_hwmod_disable(oh->clkdm, oh);
1557 }
1558
1559 return ret;
1560 }
1561
1562 /**
1563 * _read_hardreset - read the HW reset line state of submodules
1564 * contained in the hwmod module
1565 * @oh: struct omap_hwmod *
1566 * @name: name of the reset line to look up and read
1567 *
1568 * Return the state of the reset line. Returns -EINVAL if @oh is
1569 * null, -ENOSYS if we have no way of reading the hardreset line
1570 * status on the currently-booted SoC, or passes along the return
1571 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1572 * code.
1573 */
_read_hardreset(struct omap_hwmod * oh,const char * name)1574 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1575 {
1576 struct omap_hwmod_rst_info ohri;
1577 int ret = -EINVAL;
1578
1579 if (!oh)
1580 return -EINVAL;
1581
1582 if (!soc_ops.is_hardreset_asserted)
1583 return -ENOSYS;
1584
1585 ret = _lookup_hardreset(oh, name, &ohri);
1586 if (ret < 0)
1587 return ret;
1588
1589 return soc_ops.is_hardreset_asserted(oh, &ohri);
1590 }
1591
1592 /**
1593 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1594 * @oh: struct omap_hwmod *
1595 *
1596 * If all hardreset lines associated with @oh are asserted, then return true.
1597 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1598 * associated with @oh are asserted, then return false.
1599 * This function is used to avoid executing some parts of the IP block
1600 * enable/disable sequence if its hardreset line is set.
1601 */
_are_all_hardreset_lines_asserted(struct omap_hwmod * oh)1602 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1603 {
1604 int i, rst_cnt = 0;
1605
1606 if (oh->rst_lines_cnt == 0)
1607 return false;
1608
1609 for (i = 0; i < oh->rst_lines_cnt; i++)
1610 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1611 rst_cnt++;
1612
1613 if (oh->rst_lines_cnt == rst_cnt)
1614 return true;
1615
1616 return false;
1617 }
1618
1619 /**
1620 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1621 * hard-reset
1622 * @oh: struct omap_hwmod *
1623 *
1624 * If any hardreset lines associated with @oh are asserted, then
1625 * return true. Otherwise, if no hardreset lines associated with @oh
1626 * are asserted, or if @oh has no hardreset lines, then return false.
1627 * This function is used to avoid executing some parts of the IP block
1628 * enable/disable sequence if any hardreset line is set.
1629 */
_are_any_hardreset_lines_asserted(struct omap_hwmod * oh)1630 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1631 {
1632 int rst_cnt = 0;
1633 int i;
1634
1635 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1636 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1637 rst_cnt++;
1638
1639 return (rst_cnt) ? true : false;
1640 }
1641
1642 /**
1643 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1644 * @oh: struct omap_hwmod *
1645 *
1646 * Disable the PRCM module mode related to the hwmod @oh.
1647 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1648 */
_omap4_disable_module(struct omap_hwmod * oh)1649 static int _omap4_disable_module(struct omap_hwmod *oh)
1650 {
1651 int v;
1652
1653 if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
1654 _omap4_clkctrl_managed_by_clkfwk(oh))
1655 return -EINVAL;
1656
1657 /*
1658 * Since integration code might still be doing something, only
1659 * disable if all lines are under hardreset.
1660 */
1661 if (_are_any_hardreset_lines_asserted(oh))
1662 return 0;
1663
1664 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1665
1666 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
1667 oh->prcm.omap4.clkctrl_offs);
1668
1669 v = _omap4_wait_target_disable(oh);
1670 if (v)
1671 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1672 oh->name);
1673
1674 return 0;
1675 }
1676
1677 /**
1678 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1679 * @oh: struct omap_hwmod *
1680 *
1681 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1682 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1683 * reset this way, -EINVAL if the hwmod is in the wrong state,
1684 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1685 *
1686 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1687 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1688 * use the SYSCONFIG softreset bit to provide the status.
1689 *
1690 * Note that some IP like McBSP do have reset control but don't have
1691 * reset status.
1692 */
_ocp_softreset(struct omap_hwmod * oh)1693 static int _ocp_softreset(struct omap_hwmod *oh)
1694 {
1695 u32 v;
1696 int c = 0;
1697 int ret = 0;
1698
1699 if (!oh->class->sysc ||
1700 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1701 return -ENOENT;
1702
1703 /* clocks must be on for this operation */
1704 if (oh->_state != _HWMOD_STATE_ENABLED) {
1705 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1706 oh->name);
1707 return -EINVAL;
1708 }
1709
1710 /* For some modules, all optionnal clocks need to be enabled as well */
1711 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1712 _enable_optional_clocks(oh);
1713
1714 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1715
1716 v = oh->_sysc_cache;
1717 ret = _set_softreset(oh, &v);
1718 if (ret)
1719 goto dis_opt_clks;
1720
1721 _write_sysconfig(v, oh);
1722
1723 if (oh->class->sysc->srst_udelay)
1724 udelay(oh->class->sysc->srst_udelay);
1725
1726 c = _wait_softreset_complete(oh);
1727 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1728 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1729 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1730 ret = -ETIMEDOUT;
1731 goto dis_opt_clks;
1732 } else {
1733 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1734 }
1735
1736 ret = _clear_softreset(oh, &v);
1737 if (ret)
1738 goto dis_opt_clks;
1739
1740 _write_sysconfig(v, oh);
1741
1742 /*
1743 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1744 * _wait_target_ready() or _reset()
1745 */
1746
1747 dis_opt_clks:
1748 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1749 _disable_optional_clocks(oh);
1750
1751 return ret;
1752 }
1753
1754 /**
1755 * _reset - reset an omap_hwmod
1756 * @oh: struct omap_hwmod *
1757 *
1758 * Resets an omap_hwmod @oh. If the module has a custom reset
1759 * function pointer defined, then call it to reset the IP block, and
1760 * pass along its return value to the caller. Otherwise, if the IP
1761 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1762 * associated with it, call a function to reset the IP block via that
1763 * method, and pass along the return value to the caller. Finally, if
1764 * the IP block has some hardreset lines associated with it, assert
1765 * all of those, but do _not_ deassert them. (This is because driver
1766 * authors have expressed an apparent requirement to control the
1767 * deassertion of the hardreset lines themselves.)
1768 *
1769 * The default software reset mechanism for most OMAP IP blocks is
1770 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1771 * hwmods cannot be reset via this method. Some are not targets and
1772 * therefore have no OCP header registers to access. Others (like the
1773 * IVA) have idiosyncratic reset sequences. So for these relatively
1774 * rare cases, custom reset code can be supplied in the struct
1775 * omap_hwmod_class .reset function pointer.
1776 *
1777 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1778 * does not prevent idling of the system. This is necessary for cases
1779 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1780 * kernel without disabling dma.
1781 *
1782 * Passes along the return value from either _ocp_softreset() or the
1783 * custom reset function - these must return -EINVAL if the hwmod
1784 * cannot be reset this way or if the hwmod is in the wrong state,
1785 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1786 */
_reset(struct omap_hwmod * oh)1787 static int _reset(struct omap_hwmod *oh)
1788 {
1789 int i, r;
1790
1791 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1792
1793 if (oh->class->reset) {
1794 r = oh->class->reset(oh);
1795 } else {
1796 if (oh->rst_lines_cnt > 0) {
1797 for (i = 0; i < oh->rst_lines_cnt; i++)
1798 _assert_hardreset(oh, oh->rst_lines[i].name);
1799 return 0;
1800 } else {
1801 r = _ocp_softreset(oh);
1802 if (r == -ENOENT)
1803 r = 0;
1804 }
1805 }
1806
1807 _set_dmadisable(oh);
1808
1809 /*
1810 * OCP_SYSCONFIG bits need to be reprogrammed after a
1811 * softreset. The _enable() function should be split to avoid
1812 * the rewrite of the OCP_SYSCONFIG register.
1813 */
1814 if (oh->class->sysc) {
1815 _update_sysc_cache(oh);
1816 _enable_sysc(oh);
1817 }
1818
1819 return r;
1820 }
1821
1822 /**
1823 * _omap4_update_context_lost - increment hwmod context loss counter if
1824 * hwmod context was lost, and clear hardware context loss reg
1825 * @oh: hwmod to check for context loss
1826 *
1827 * If the PRCM indicates that the hwmod @oh lost context, increment
1828 * our in-memory context loss counter, and clear the RM_*_CONTEXT
1829 * bits. No return value.
1830 */
_omap4_update_context_lost(struct omap_hwmod * oh)1831 static void _omap4_update_context_lost(struct omap_hwmod *oh)
1832 {
1833 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
1834 return;
1835
1836 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1837 oh->clkdm->pwrdm.ptr->prcm_offs,
1838 oh->prcm.omap4.context_offs))
1839 return;
1840
1841 oh->prcm.omap4.context_lost_counter++;
1842 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
1843 oh->clkdm->pwrdm.ptr->prcm_offs,
1844 oh->prcm.omap4.context_offs);
1845 }
1846
1847 /**
1848 * _omap4_get_context_lost - get context loss counter for a hwmod
1849 * @oh: hwmod to get context loss counter for
1850 *
1851 * Returns the in-memory context loss counter for a hwmod.
1852 */
_omap4_get_context_lost(struct omap_hwmod * oh)1853 static int _omap4_get_context_lost(struct omap_hwmod *oh)
1854 {
1855 return oh->prcm.omap4.context_lost_counter;
1856 }
1857
1858 /**
1859 * _enable - enable an omap_hwmod
1860 * @oh: struct omap_hwmod *
1861 *
1862 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1863 * register target. Returns -EINVAL if the hwmod is in the wrong
1864 * state or passes along the return value of _wait_target_ready().
1865 */
_enable(struct omap_hwmod * oh)1866 static int _enable(struct omap_hwmod *oh)
1867 {
1868 int r;
1869
1870 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1871
1872 /*
1873 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1874 * state at init.
1875 */
1876 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1877 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1878 return 0;
1879 }
1880
1881 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1882 oh->_state != _HWMOD_STATE_IDLE &&
1883 oh->_state != _HWMOD_STATE_DISABLED) {
1884 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1885 oh->name);
1886 return -EINVAL;
1887 }
1888
1889 /*
1890 * If an IP block contains HW reset lines and all of them are
1891 * asserted, we let integration code associated with that
1892 * block handle the enable. We've received very little
1893 * information on what those driver authors need, and until
1894 * detailed information is provided and the driver code is
1895 * posted to the public lists, this is probably the best we
1896 * can do.
1897 */
1898 if (_are_all_hardreset_lines_asserted(oh))
1899 return 0;
1900
1901 _add_initiator_dep(oh, mpu_oh);
1902
1903 if (oh->clkdm) {
1904 /*
1905 * A clockdomain must be in SW_SUP before enabling
1906 * completely the module. The clockdomain can be set
1907 * in HW_AUTO only when the module become ready.
1908 */
1909 clkdm_deny_idle(oh->clkdm);
1910 r = clkdm_hwmod_enable(oh->clkdm, oh);
1911 if (r) {
1912 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1913 oh->name, oh->clkdm->name, r);
1914 return r;
1915 }
1916 }
1917
1918 _enable_clocks(oh);
1919 if (soc_ops.enable_module)
1920 soc_ops.enable_module(oh);
1921 if (oh->flags & HWMOD_BLOCK_WFI)
1922 cpu_idle_poll_ctrl(true);
1923
1924 if (soc_ops.update_context_lost)
1925 soc_ops.update_context_lost(oh);
1926
1927 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
1928 -EINVAL;
1929 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1930 clkdm_allow_idle(oh->clkdm);
1931
1932 if (!r) {
1933 oh->_state = _HWMOD_STATE_ENABLED;
1934
1935 /* Access the sysconfig only if the target is ready */
1936 if (oh->class->sysc) {
1937 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1938 _update_sysc_cache(oh);
1939 _enable_sysc(oh);
1940 }
1941 } else {
1942 if (soc_ops.disable_module)
1943 soc_ops.disable_module(oh);
1944 _disable_clocks(oh);
1945 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
1946 oh->name, r);
1947
1948 if (oh->clkdm)
1949 clkdm_hwmod_disable(oh->clkdm, oh);
1950 }
1951
1952 return r;
1953 }
1954
1955 /**
1956 * _idle - idle an omap_hwmod
1957 * @oh: struct omap_hwmod *
1958 *
1959 * Idles an omap_hwmod @oh. This should be called once the hwmod has
1960 * no further work. Returns -EINVAL if the hwmod is in the wrong
1961 * state or returns 0.
1962 */
_idle(struct omap_hwmod * oh)1963 static int _idle(struct omap_hwmod *oh)
1964 {
1965 if (oh->flags & HWMOD_NO_IDLE) {
1966 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
1967 return 0;
1968 }
1969
1970 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1971
1972 if (_are_all_hardreset_lines_asserted(oh))
1973 return 0;
1974
1975 if (oh->_state != _HWMOD_STATE_ENABLED) {
1976 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1977 oh->name);
1978 return -EINVAL;
1979 }
1980
1981 if (oh->class->sysc)
1982 _idle_sysc(oh);
1983 _del_initiator_dep(oh, mpu_oh);
1984
1985 /*
1986 * If HWMOD_CLKDM_NOAUTO is set then we don't
1987 * deny idle the clkdm again since idle was already denied
1988 * in _enable()
1989 */
1990 if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
1991 clkdm_deny_idle(oh->clkdm);
1992
1993 if (oh->flags & HWMOD_BLOCK_WFI)
1994 cpu_idle_poll_ctrl(false);
1995 if (soc_ops.disable_module)
1996 soc_ops.disable_module(oh);
1997
1998 /*
1999 * The module must be in idle mode before disabling any parents
2000 * clocks. Otherwise, the parent clock might be disabled before
2001 * the module transition is done, and thus will prevent the
2002 * transition to complete properly.
2003 */
2004 _disable_clocks(oh);
2005 if (oh->clkdm) {
2006 clkdm_allow_idle(oh->clkdm);
2007 clkdm_hwmod_disable(oh->clkdm, oh);
2008 }
2009
2010 oh->_state = _HWMOD_STATE_IDLE;
2011
2012 return 0;
2013 }
2014
2015 /**
2016 * _shutdown - shutdown an omap_hwmod
2017 * @oh: struct omap_hwmod *
2018 *
2019 * Shut down an omap_hwmod @oh. This should be called when the driver
2020 * used for the hwmod is removed or unloaded or if the driver is not
2021 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2022 * state or returns 0.
2023 */
_shutdown(struct omap_hwmod * oh)2024 static int _shutdown(struct omap_hwmod *oh)
2025 {
2026 int ret, i;
2027 u8 prev_state;
2028
2029 if (_are_all_hardreset_lines_asserted(oh))
2030 return 0;
2031
2032 if (oh->_state != _HWMOD_STATE_IDLE &&
2033 oh->_state != _HWMOD_STATE_ENABLED) {
2034 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2035 oh->name);
2036 return -EINVAL;
2037 }
2038
2039 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2040
2041 if (oh->class->pre_shutdown) {
2042 prev_state = oh->_state;
2043 if (oh->_state == _HWMOD_STATE_IDLE)
2044 _enable(oh);
2045 ret = oh->class->pre_shutdown(oh);
2046 if (ret) {
2047 if (prev_state == _HWMOD_STATE_IDLE)
2048 _idle(oh);
2049 return ret;
2050 }
2051 }
2052
2053 if (oh->class->sysc) {
2054 if (oh->_state == _HWMOD_STATE_IDLE)
2055 _enable(oh);
2056 _shutdown_sysc(oh);
2057 }
2058
2059 /* clocks and deps are already disabled in idle */
2060 if (oh->_state == _HWMOD_STATE_ENABLED) {
2061 _del_initiator_dep(oh, mpu_oh);
2062 /* XXX what about the other system initiators here? dma, dsp */
2063 if (oh->flags & HWMOD_BLOCK_WFI)
2064 cpu_idle_poll_ctrl(false);
2065 if (soc_ops.disable_module)
2066 soc_ops.disable_module(oh);
2067 _disable_clocks(oh);
2068 if (oh->clkdm)
2069 clkdm_hwmod_disable(oh->clkdm, oh);
2070 }
2071 /* XXX Should this code also force-disable the optional clocks? */
2072
2073 for (i = 0; i < oh->rst_lines_cnt; i++)
2074 _assert_hardreset(oh, oh->rst_lines[i].name);
2075
2076 oh->_state = _HWMOD_STATE_DISABLED;
2077
2078 return 0;
2079 }
2080
of_dev_find_hwmod(struct device_node * np,struct omap_hwmod * oh)2081 static int of_dev_find_hwmod(struct device_node *np,
2082 struct omap_hwmod *oh)
2083 {
2084 int count, i, res;
2085 const char *p;
2086
2087 count = of_property_count_strings(np, "ti,hwmods");
2088 if (count < 1)
2089 return -ENODEV;
2090
2091 for (i = 0; i < count; i++) {
2092 res = of_property_read_string_index(np, "ti,hwmods",
2093 i, &p);
2094 if (res)
2095 continue;
2096 if (!strcmp(p, oh->name)) {
2097 pr_debug("omap_hwmod: dt %pOFn[%i] uses hwmod %s\n",
2098 np, i, oh->name);
2099 return i;
2100 }
2101 }
2102
2103 return -ENODEV;
2104 }
2105
2106 /**
2107 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
2108 * @np: struct device_node *
2109 * @oh: struct omap_hwmod *
2110 * @index: index of the entry found
2111 * @found: struct device_node * found or NULL
2112 *
2113 * Parse the dt blob and find out needed hwmod. Recursive function is
2114 * implemented to take care hierarchical dt blob parsing.
2115 * Return: Returns 0 on success, -ENODEV when not found.
2116 */
of_dev_hwmod_lookup(struct device_node * np,struct omap_hwmod * oh,int * index,struct device_node ** found)2117 static int of_dev_hwmod_lookup(struct device_node *np,
2118 struct omap_hwmod *oh,
2119 int *index,
2120 struct device_node **found)
2121 {
2122 struct device_node *np0 = NULL;
2123 int res;
2124
2125 res = of_dev_find_hwmod(np, oh);
2126 if (res >= 0) {
2127 *found = np;
2128 *index = res;
2129 return 0;
2130 }
2131
2132 for_each_child_of_node(np, np0) {
2133 struct device_node *fc;
2134 int i;
2135
2136 res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
2137 if (res == 0) {
2138 *found = fc;
2139 *index = i;
2140 of_node_put(np0);
2141 return 0;
2142 }
2143 }
2144
2145 *found = NULL;
2146 *index = 0;
2147
2148 return -ENODEV;
2149 }
2150
2151 /**
2152 * omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
2153 *
2154 * @oh: struct omap_hwmod *
2155 * @np: struct device_node *
2156 *
2157 * Fix up module register offsets for modules with mpu_rt_idx.
2158 * Only needed for cpsw with interconnect target module defined
2159 * in device tree while still using legacy hwmod platform data
2160 * for rev, sysc and syss registers.
2161 *
2162 * Can be removed when all cpsw hwmod platform data has been
2163 * dropped.
2164 */
omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod * oh,struct device_node * np,struct resource * res)2165 static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
2166 struct device_node *np,
2167 struct resource *res)
2168 {
2169 struct device_node *child = NULL;
2170 int error;
2171
2172 child = of_get_next_child(np, child);
2173 if (!child)
2174 return;
2175
2176 error = of_address_to_resource(child, oh->mpu_rt_idx, res);
2177 if (error)
2178 pr_err("%s: error mapping mpu_rt_idx: %i\n",
2179 __func__, error);
2180 }
2181
2182 /**
2183 * omap_hwmod_parse_module_range - map module IO range from device tree
2184 * @oh: struct omap_hwmod *
2185 * @np: struct device_node *
2186 *
2187 * Parse the device tree range an interconnect target module provides
2188 * for it's child device IP blocks. This way we can support the old
2189 * "ti,hwmods" property with just dts data without a need for platform
2190 * data for IO resources. And we don't need all the child IP device
2191 * nodes available in the dts.
2192 */
omap_hwmod_parse_module_range(struct omap_hwmod * oh,struct device_node * np,struct resource * res)2193 int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
2194 struct device_node *np,
2195 struct resource *res)
2196 {
2197 struct property *prop;
2198 const __be32 *ranges;
2199 const char *name;
2200 u32 nr_addr, nr_size;
2201 u64 base, size;
2202 int len, error;
2203
2204 if (!res)
2205 return -EINVAL;
2206
2207 ranges = of_get_property(np, "ranges", &len);
2208 if (!ranges)
2209 return -ENOENT;
2210
2211 len /= sizeof(*ranges);
2212
2213 if (len < 3)
2214 return -EINVAL;
2215
2216 of_property_for_each_string(np, "compatible", prop, name)
2217 if (!strncmp("ti,sysc-", name, 8))
2218 break;
2219
2220 if (!name)
2221 return -ENOENT;
2222
2223 error = of_property_read_u32(np, "#address-cells", &nr_addr);
2224 if (error)
2225 return -ENOENT;
2226
2227 error = of_property_read_u32(np, "#size-cells", &nr_size);
2228 if (error)
2229 return -ENOENT;
2230
2231 if (nr_addr != 1 || nr_size != 1) {
2232 pr_err("%s: invalid range for %s->%pOFn\n", __func__,
2233 oh->name, np);
2234 return -EINVAL;
2235 }
2236
2237 ranges++;
2238 base = of_translate_address(np, ranges++);
2239 size = be32_to_cpup(ranges);
2240
2241 pr_debug("omap_hwmod: %s %pOFn at 0x%llx size 0x%llx\n",
2242 oh->name, np, base, size);
2243
2244 if (oh && oh->mpu_rt_idx) {
2245 omap_hwmod_fix_mpu_rt_idx(oh, np, res);
2246
2247 return 0;
2248 }
2249
2250 res->start = base;
2251 res->end = base + size - 1;
2252 res->flags = IORESOURCE_MEM;
2253
2254 return 0;
2255 }
2256
2257 /**
2258 * _init_mpu_rt_base - populate the virtual address for a hwmod
2259 * @oh: struct omap_hwmod * to locate the virtual address
2260 * @data: (unused, caller should pass NULL)
2261 * @index: index of the reg entry iospace in device tree
2262 * @np: struct device_node * of the IP block's device node in the DT data
2263 *
2264 * Cache the virtual address used by the MPU to access this IP block's
2265 * registers. This address is needed early so the OCP registers that
2266 * are part of the device's address space can be ioremapped properly.
2267 *
2268 * If SYSC access is not needed, the registers will not be remapped
2269 * and non-availability of MPU access is not treated as an error.
2270 *
2271 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
2272 * -ENXIO on absent or invalid register target address space.
2273 */
_init_mpu_rt_base(struct omap_hwmod * oh,void * data,int index,struct device_node * np)2274 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
2275 int index, struct device_node *np)
2276 {
2277 void __iomem *va_start = NULL;
2278 struct resource res;
2279 int error;
2280
2281 if (!oh)
2282 return -EINVAL;
2283
2284 _save_mpu_port_index(oh);
2285
2286 /* if we don't need sysc access we don't need to ioremap */
2287 if (!oh->class->sysc)
2288 return 0;
2289
2290 /* we can't continue without MPU PORT if we need sysc access */
2291 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2292 return -ENXIO;
2293
2294 if (!np) {
2295 pr_err("omap_hwmod: %s: no dt node\n", oh->name);
2296 return -ENXIO;
2297 }
2298
2299 /* Do we have a dts range for the interconnect target module? */
2300 error = omap_hwmod_parse_module_range(oh, np, &res);
2301 if (!error)
2302 va_start = ioremap(res.start, resource_size(&res));
2303
2304 /* No ranges, rely on device reg entry */
2305 if (!va_start)
2306 va_start = of_iomap(np, index + oh->mpu_rt_idx);
2307 if (!va_start) {
2308 pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
2309 oh->name, index, np);
2310 return -ENXIO;
2311 }
2312
2313 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2314 oh->name, va_start);
2315
2316 oh->_mpu_rt_va = va_start;
2317 return 0;
2318 }
2319
parse_module_flags(struct omap_hwmod * oh,struct device_node * np)2320 static void __init parse_module_flags(struct omap_hwmod *oh,
2321 struct device_node *np)
2322 {
2323 if (of_find_property(np, "ti,no-reset-on-init", NULL))
2324 oh->flags |= HWMOD_INIT_NO_RESET;
2325 if (of_find_property(np, "ti,no-idle-on-init", NULL))
2326 oh->flags |= HWMOD_INIT_NO_IDLE;
2327 if (of_find_property(np, "ti,no-idle", NULL))
2328 oh->flags |= HWMOD_NO_IDLE;
2329 }
2330
2331 /**
2332 * _init - initialize internal data for the hwmod @oh
2333 * @oh: struct omap_hwmod *
2334 * @n: (unused)
2335 *
2336 * Look up the clocks and the address space used by the MPU to access
2337 * registers belonging to the hwmod @oh. @oh must already be
2338 * registered at this point. This is the first of two phases for
2339 * hwmod initialization. Code called here does not touch any hardware
2340 * registers, it simply prepares internal data structures. Returns 0
2341 * upon success or if the hwmod isn't registered or if the hwmod's
2342 * address space is not defined, or -EINVAL upon failure.
2343 */
_init(struct omap_hwmod * oh,void * data)2344 static int __init _init(struct omap_hwmod *oh, void *data)
2345 {
2346 int r, index;
2347 struct device_node *np = NULL;
2348 struct device_node *bus;
2349
2350 if (oh->_state != _HWMOD_STATE_REGISTERED)
2351 return 0;
2352
2353 bus = of_find_node_by_name(NULL, "ocp");
2354 if (!bus)
2355 return -ENODEV;
2356
2357 r = of_dev_hwmod_lookup(bus, oh, &index, &np);
2358 if (r)
2359 pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
2360 else if (np && index)
2361 pr_warn("omap_hwmod: %s using broken dt data from %pOFn\n",
2362 oh->name, np);
2363
2364 r = _init_mpu_rt_base(oh, NULL, index, np);
2365 if (r < 0) {
2366 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
2367 oh->name);
2368 return 0;
2369 }
2370
2371 r = _init_clocks(oh, np);
2372 if (r < 0) {
2373 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2374 return -EINVAL;
2375 }
2376
2377 if (np) {
2378 struct device_node *child;
2379
2380 parse_module_flags(oh, np);
2381 child = of_get_next_child(np, NULL);
2382 if (child)
2383 parse_module_flags(oh, child);
2384 }
2385
2386 oh->_state = _HWMOD_STATE_INITIALIZED;
2387
2388 return 0;
2389 }
2390
2391 /**
2392 * _setup_iclk_autoidle - configure an IP block's interface clocks
2393 * @oh: struct omap_hwmod *
2394 *
2395 * Set up the module's interface clocks. XXX This function is still mostly
2396 * a stub; implementing this properly requires iclk autoidle usecounting in
2397 * the clock code. No return value.
2398 */
_setup_iclk_autoidle(struct omap_hwmod * oh)2399 static void _setup_iclk_autoidle(struct omap_hwmod *oh)
2400 {
2401 struct omap_hwmod_ocp_if *os;
2402
2403 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2404 return;
2405
2406 list_for_each_entry(os, &oh->slave_ports, node) {
2407 if (!os->_clk)
2408 continue;
2409
2410 if (os->flags & OCPIF_SWSUP_IDLE) {
2411 /*
2412 * we might have multiple users of one iclk with
2413 * different requirements, disable autoidle when
2414 * the module is enabled, e.g. dss iclk
2415 */
2416 } else {
2417 /* we are enabling autoidle afterwards anyways */
2418 clk_enable(os->_clk);
2419 }
2420 }
2421
2422 return;
2423 }
2424
2425 /**
2426 * _setup_reset - reset an IP block during the setup process
2427 * @oh: struct omap_hwmod *
2428 *
2429 * Reset the IP block corresponding to the hwmod @oh during the setup
2430 * process. The IP block is first enabled so it can be successfully
2431 * reset. Returns 0 upon success or a negative error code upon
2432 * failure.
2433 */
_setup_reset(struct omap_hwmod * oh)2434 static int _setup_reset(struct omap_hwmod *oh)
2435 {
2436 int r = 0;
2437
2438 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2439 return -EINVAL;
2440
2441 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2442 return -EPERM;
2443
2444 if (oh->rst_lines_cnt == 0) {
2445 r = _enable(oh);
2446 if (r) {
2447 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2448 oh->name, oh->_state);
2449 return -EINVAL;
2450 }
2451 }
2452
2453 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2454 r = _reset(oh);
2455
2456 return r;
2457 }
2458
2459 /**
2460 * _setup_postsetup - transition to the appropriate state after _setup
2461 * @oh: struct omap_hwmod *
2462 *
2463 * Place an IP block represented by @oh into a "post-setup" state --
2464 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2465 * this function is called at the end of _setup().) The postsetup
2466 * state for an IP block can be changed by calling
2467 * omap_hwmod_enter_postsetup_state() early in the boot process,
2468 * before one of the omap_hwmod_setup*() functions are called for the
2469 * IP block.
2470 *
2471 * The IP block stays in this state until a PM runtime-based driver is
2472 * loaded for that IP block. A post-setup state of IDLE is
2473 * appropriate for almost all IP blocks with runtime PM-enabled
2474 * drivers, since those drivers are able to enable the IP block. A
2475 * post-setup state of ENABLED is appropriate for kernels with PM
2476 * runtime disabled. The DISABLED state is appropriate for unusual IP
2477 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2478 * included, since the WDTIMER starts running on reset and will reset
2479 * the MPU if left active.
2480 *
2481 * This post-setup mechanism is deprecated. Once all of the OMAP
2482 * drivers have been converted to use PM runtime, and all of the IP
2483 * block data and interconnect data is available to the hwmod code, it
2484 * should be possible to replace this mechanism with a "lazy reset"
2485 * arrangement. In a "lazy reset" setup, each IP block is enabled
2486 * when the driver first probes, then all remaining IP blocks without
2487 * drivers are either shut down or enabled after the drivers have
2488 * loaded. However, this cannot take place until the above
2489 * preconditions have been met, since otherwise the late reset code
2490 * has no way of knowing which IP blocks are in use by drivers, and
2491 * which ones are unused.
2492 *
2493 * No return value.
2494 */
_setup_postsetup(struct omap_hwmod * oh)2495 static void _setup_postsetup(struct omap_hwmod *oh)
2496 {
2497 u8 postsetup_state;
2498
2499 if (oh->rst_lines_cnt > 0)
2500 return;
2501
2502 postsetup_state = oh->_postsetup_state;
2503 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2504 postsetup_state = _HWMOD_STATE_ENABLED;
2505
2506 /*
2507 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2508 * it should be set by the core code as a runtime flag during startup
2509 */
2510 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
2511 (postsetup_state == _HWMOD_STATE_IDLE)) {
2512 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2513 postsetup_state = _HWMOD_STATE_ENABLED;
2514 }
2515
2516 if (postsetup_state == _HWMOD_STATE_IDLE)
2517 _idle(oh);
2518 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2519 _shutdown(oh);
2520 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2521 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2522 oh->name, postsetup_state);
2523
2524 return;
2525 }
2526
2527 /**
2528 * _setup - prepare IP block hardware for use
2529 * @oh: struct omap_hwmod *
2530 * @n: (unused, pass NULL)
2531 *
2532 * Configure the IP block represented by @oh. This may include
2533 * enabling the IP block, resetting it, and placing it into a
2534 * post-setup state, depending on the type of IP block and applicable
2535 * flags. IP blocks are reset to prevent any previous configuration
2536 * by the bootloader or previous operating system from interfering
2537 * with power management or other parts of the system. The reset can
2538 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2539 * two phases for hwmod initialization. Code called here generally
2540 * affects the IP block hardware, or system integration hardware
2541 * associated with the IP block. Returns 0.
2542 */
_setup(struct omap_hwmod * oh,void * data)2543 static int _setup(struct omap_hwmod *oh, void *data)
2544 {
2545 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2546 return 0;
2547
2548 if (oh->parent_hwmod) {
2549 int r;
2550
2551 r = _enable(oh->parent_hwmod);
2552 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
2553 oh->name, oh->parent_hwmod->name);
2554 }
2555
2556 _setup_iclk_autoidle(oh);
2557
2558 if (!_setup_reset(oh))
2559 _setup_postsetup(oh);
2560
2561 if (oh->parent_hwmod) {
2562 u8 postsetup_state;
2563
2564 postsetup_state = oh->parent_hwmod->_postsetup_state;
2565
2566 if (postsetup_state == _HWMOD_STATE_IDLE)
2567 _idle(oh->parent_hwmod);
2568 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2569 _shutdown(oh->parent_hwmod);
2570 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2571 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2572 oh->parent_hwmod->name, postsetup_state);
2573 }
2574
2575 return 0;
2576 }
2577
2578 /**
2579 * _register - register a struct omap_hwmod
2580 * @oh: struct omap_hwmod *
2581 *
2582 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2583 * already has been registered by the same name; -EINVAL if the
2584 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2585 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2586 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2587 * success.
2588 *
2589 * XXX The data should be copied into bootmem, so the original data
2590 * should be marked __initdata and freed after init. This would allow
2591 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2592 * that the copy process would be relatively complex due to the large number
2593 * of substructures.
2594 */
_register(struct omap_hwmod * oh)2595 static int _register(struct omap_hwmod *oh)
2596 {
2597 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2598 (oh->_state != _HWMOD_STATE_UNKNOWN))
2599 return -EINVAL;
2600
2601 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2602
2603 if (_lookup(oh->name))
2604 return -EEXIST;
2605
2606 list_add_tail(&oh->node, &omap_hwmod_list);
2607
2608 INIT_LIST_HEAD(&oh->slave_ports);
2609 spin_lock_init(&oh->_lock);
2610 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2611
2612 oh->_state = _HWMOD_STATE_REGISTERED;
2613
2614 /*
2615 * XXX Rather than doing a strcmp(), this should test a flag
2616 * set in the hwmod data, inserted by the autogenerator code.
2617 */
2618 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2619 mpu_oh = oh;
2620
2621 return 0;
2622 }
2623
2624 /**
2625 * _add_link - add an interconnect between two IP blocks
2626 * @oi: pointer to a struct omap_hwmod_ocp_if record
2627 *
2628 * Add struct omap_hwmod_link records connecting the slave IP block
2629 * specified in @oi->slave to @oi. This code is assumed to run before
2630 * preemption or SMP has been enabled, thus avoiding the need for
2631 * locking in this code. Changes to this assumption will require
2632 * additional locking. Returns 0.
2633 */
_add_link(struct omap_hwmod_ocp_if * oi)2634 static int _add_link(struct omap_hwmod_ocp_if *oi)
2635 {
2636 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2637 oi->slave->name);
2638
2639 list_add(&oi->node, &oi->slave->slave_ports);
2640 oi->slave->slaves_cnt++;
2641
2642 return 0;
2643 }
2644
2645 /**
2646 * _register_link - register a struct omap_hwmod_ocp_if
2647 * @oi: struct omap_hwmod_ocp_if *
2648 *
2649 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2650 * has already been registered; -EINVAL if @oi is NULL or if the
2651 * record pointed to by @oi is missing required fields; or 0 upon
2652 * success.
2653 *
2654 * XXX The data should be copied into bootmem, so the original data
2655 * should be marked __initdata and freed after init. This would allow
2656 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2657 */
_register_link(struct omap_hwmod_ocp_if * oi)2658 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2659 {
2660 if (!oi || !oi->master || !oi->slave || !oi->user)
2661 return -EINVAL;
2662
2663 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2664 return -EEXIST;
2665
2666 pr_debug("omap_hwmod: registering link from %s to %s\n",
2667 oi->master->name, oi->slave->name);
2668
2669 /*
2670 * Register the connected hwmods, if they haven't been
2671 * registered already
2672 */
2673 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2674 _register(oi->master);
2675
2676 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2677 _register(oi->slave);
2678
2679 _add_link(oi);
2680
2681 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2682
2683 return 0;
2684 }
2685
2686 /* Static functions intended only for use in soc_ops field function pointers */
2687
2688 /**
2689 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
2690 * @oh: struct omap_hwmod *
2691 *
2692 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2693 * does not have an IDLEST bit or if the module successfully leaves
2694 * slave idle; otherwise, pass along the return value of the
2695 * appropriate *_cm*_wait_module_ready() function.
2696 */
_omap2xxx_3xxx_wait_target_ready(struct omap_hwmod * oh)2697 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
2698 {
2699 if (!oh)
2700 return -EINVAL;
2701
2702 if (oh->flags & HWMOD_NO_IDLEST)
2703 return 0;
2704
2705 if (!_find_mpu_rt_port(oh))
2706 return 0;
2707
2708 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2709
2710 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
2711 oh->prcm.omap2.idlest_reg_id,
2712 oh->prcm.omap2.idlest_idle_bit);
2713 }
2714
2715 /**
2716 * _omap4_wait_target_ready - wait for a module to leave slave idle
2717 * @oh: struct omap_hwmod *
2718 *
2719 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2720 * does not have an IDLEST bit or if the module successfully leaves
2721 * slave idle; otherwise, pass along the return value of the
2722 * appropriate *_cm*_wait_module_ready() function.
2723 */
_omap4_wait_target_ready(struct omap_hwmod * oh)2724 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2725 {
2726 if (!oh)
2727 return -EINVAL;
2728
2729 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2730 return 0;
2731
2732 if (!_find_mpu_rt_port(oh))
2733 return 0;
2734
2735 if (_omap4_clkctrl_managed_by_clkfwk(oh))
2736 return 0;
2737
2738 if (!_omap4_has_clkctrl_clock(oh))
2739 return 0;
2740
2741 /* XXX check module SIDLEMODE, hardreset status */
2742
2743 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
2744 oh->clkdm->cm_inst,
2745 oh->prcm.omap4.clkctrl_offs, 0);
2746 }
2747
2748 /**
2749 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2750 * @oh: struct omap_hwmod * to assert hardreset
2751 * @ohri: hardreset line data
2752 *
2753 * Call omap2_prm_assert_hardreset() with parameters extracted from
2754 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2755 * use as an soc_ops function pointer. Passes along the return value
2756 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2757 * for removal when the PRM code is moved into drivers/.
2758 */
_omap2_assert_hardreset(struct omap_hwmod * oh,struct omap_hwmod_rst_info * ohri)2759 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2760 struct omap_hwmod_rst_info *ohri)
2761 {
2762 return omap_prm_assert_hardreset(ohri->rst_shift, 0,
2763 oh->prcm.omap2.module_offs, 0);
2764 }
2765
2766 /**
2767 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2768 * @oh: struct omap_hwmod * to deassert hardreset
2769 * @ohri: hardreset line data
2770 *
2771 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2772 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2773 * use as an soc_ops function pointer. Passes along the return value
2774 * from omap2_prm_deassert_hardreset(). XXX This function is
2775 * scheduled for removal when the PRM code is moved into drivers/.
2776 */
_omap2_deassert_hardreset(struct omap_hwmod * oh,struct omap_hwmod_rst_info * ohri)2777 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2778 struct omap_hwmod_rst_info *ohri)
2779 {
2780 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
2781 oh->prcm.omap2.module_offs, 0, 0);
2782 }
2783
2784 /**
2785 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2786 * @oh: struct omap_hwmod * to test hardreset
2787 * @ohri: hardreset line data
2788 *
2789 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2790 * from the hwmod @oh and the hardreset line data @ohri. Only
2791 * intended for use as an soc_ops function pointer. Passes along the
2792 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2793 * function is scheduled for removal when the PRM code is moved into
2794 * drivers/.
2795 */
_omap2_is_hardreset_asserted(struct omap_hwmod * oh,struct omap_hwmod_rst_info * ohri)2796 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2797 struct omap_hwmod_rst_info *ohri)
2798 {
2799 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
2800 oh->prcm.omap2.module_offs, 0);
2801 }
2802
2803 /**
2804 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2805 * @oh: struct omap_hwmod * to assert hardreset
2806 * @ohri: hardreset line data
2807 *
2808 * Call omap4_prminst_assert_hardreset() with parameters extracted
2809 * from the hwmod @oh and the hardreset line data @ohri. Only
2810 * intended for use as an soc_ops function pointer. Passes along the
2811 * return value from omap4_prminst_assert_hardreset(). XXX This
2812 * function is scheduled for removal when the PRM code is moved into
2813 * drivers/.
2814 */
_omap4_assert_hardreset(struct omap_hwmod * oh,struct omap_hwmod_rst_info * ohri)2815 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2816 struct omap_hwmod_rst_info *ohri)
2817 {
2818 if (!oh->clkdm)
2819 return -EINVAL;
2820
2821 return omap_prm_assert_hardreset(ohri->rst_shift,
2822 oh->clkdm->pwrdm.ptr->prcm_partition,
2823 oh->clkdm->pwrdm.ptr->prcm_offs,
2824 oh->prcm.omap4.rstctrl_offs);
2825 }
2826
2827 /**
2828 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2829 * @oh: struct omap_hwmod * to deassert hardreset
2830 * @ohri: hardreset line data
2831 *
2832 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2833 * from the hwmod @oh and the hardreset line data @ohri. Only
2834 * intended for use as an soc_ops function pointer. Passes along the
2835 * return value from omap4_prminst_deassert_hardreset(). XXX This
2836 * function is scheduled for removal when the PRM code is moved into
2837 * drivers/.
2838 */
_omap4_deassert_hardreset(struct omap_hwmod * oh,struct omap_hwmod_rst_info * ohri)2839 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2840 struct omap_hwmod_rst_info *ohri)
2841 {
2842 if (!oh->clkdm)
2843 return -EINVAL;
2844
2845 if (ohri->st_shift)
2846 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2847 oh->name, ohri->name);
2848 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
2849 oh->clkdm->pwrdm.ptr->prcm_partition,
2850 oh->clkdm->pwrdm.ptr->prcm_offs,
2851 oh->prcm.omap4.rstctrl_offs,
2852 oh->prcm.omap4.rstctrl_offs +
2853 OMAP4_RST_CTRL_ST_OFFSET);
2854 }
2855
2856 /**
2857 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2858 * @oh: struct omap_hwmod * to test hardreset
2859 * @ohri: hardreset line data
2860 *
2861 * Call omap4_prminst_is_hardreset_asserted() with parameters
2862 * extracted from the hwmod @oh and the hardreset line data @ohri.
2863 * Only intended for use as an soc_ops function pointer. Passes along
2864 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2865 * This function is scheduled for removal when the PRM code is moved
2866 * into drivers/.
2867 */
_omap4_is_hardreset_asserted(struct omap_hwmod * oh,struct omap_hwmod_rst_info * ohri)2868 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2869 struct omap_hwmod_rst_info *ohri)
2870 {
2871 if (!oh->clkdm)
2872 return -EINVAL;
2873
2874 return omap_prm_is_hardreset_asserted(ohri->rst_shift,
2875 oh->clkdm->pwrdm.ptr->
2876 prcm_partition,
2877 oh->clkdm->pwrdm.ptr->prcm_offs,
2878 oh->prcm.omap4.rstctrl_offs);
2879 }
2880
2881 /**
2882 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
2883 * @oh: struct omap_hwmod * to disable control for
2884 *
2885 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
2886 * will be using its main_clk to enable/disable the module. Returns
2887 * 0 if successful.
2888 */
_omap4_disable_direct_prcm(struct omap_hwmod * oh)2889 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
2890 {
2891 if (!oh)
2892 return -EINVAL;
2893
2894 oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
2895
2896 return 0;
2897 }
2898
2899 /**
2900 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2901 * @oh: struct omap_hwmod * to deassert hardreset
2902 * @ohri: hardreset line data
2903 *
2904 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2905 * from the hwmod @oh and the hardreset line data @ohri. Only
2906 * intended for use as an soc_ops function pointer. Passes along the
2907 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2908 * function is scheduled for removal when the PRM code is moved into
2909 * drivers/.
2910 */
_am33xx_deassert_hardreset(struct omap_hwmod * oh,struct omap_hwmod_rst_info * ohri)2911 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2912 struct omap_hwmod_rst_info *ohri)
2913 {
2914 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
2915 oh->clkdm->pwrdm.ptr->prcm_partition,
2916 oh->clkdm->pwrdm.ptr->prcm_offs,
2917 oh->prcm.omap4.rstctrl_offs,
2918 oh->prcm.omap4.rstst_offs);
2919 }
2920
2921 /* Public functions */
2922
omap_hwmod_read(struct omap_hwmod * oh,u16 reg_offs)2923 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2924 {
2925 if (oh->flags & HWMOD_16BIT_REG)
2926 return readw_relaxed(oh->_mpu_rt_va + reg_offs);
2927 else
2928 return readl_relaxed(oh->_mpu_rt_va + reg_offs);
2929 }
2930
omap_hwmod_write(u32 v,struct omap_hwmod * oh,u16 reg_offs)2931 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2932 {
2933 if (oh->flags & HWMOD_16BIT_REG)
2934 writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
2935 else
2936 writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
2937 }
2938
2939 /**
2940 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2941 * @oh: struct omap_hwmod *
2942 *
2943 * This is a public function exposed to drivers. Some drivers may need to do
2944 * some settings before and after resetting the device. Those drivers after
2945 * doing the necessary settings could use this function to start a reset by
2946 * setting the SYSCONFIG.SOFTRESET bit.
2947 */
omap_hwmod_softreset(struct omap_hwmod * oh)2948 int omap_hwmod_softreset(struct omap_hwmod *oh)
2949 {
2950 u32 v;
2951 int ret;
2952
2953 if (!oh || !(oh->_sysc_cache))
2954 return -EINVAL;
2955
2956 v = oh->_sysc_cache;
2957 ret = _set_softreset(oh, &v);
2958 if (ret)
2959 goto error;
2960 _write_sysconfig(v, oh);
2961
2962 ret = _clear_softreset(oh, &v);
2963 if (ret)
2964 goto error;
2965 _write_sysconfig(v, oh);
2966
2967 error:
2968 return ret;
2969 }
2970
2971 /**
2972 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2973 * @name: name of the omap_hwmod to look up
2974 *
2975 * Given a @name of an omap_hwmod, return a pointer to the registered
2976 * struct omap_hwmod *, or NULL upon error.
2977 */
omap_hwmod_lookup(const char * name)2978 struct omap_hwmod *omap_hwmod_lookup(const char *name)
2979 {
2980 struct omap_hwmod *oh;
2981
2982 if (!name)
2983 return NULL;
2984
2985 oh = _lookup(name);
2986
2987 return oh;
2988 }
2989
2990 /**
2991 * omap_hwmod_for_each - call function for each registered omap_hwmod
2992 * @fn: pointer to a callback function
2993 * @data: void * data to pass to callback function
2994 *
2995 * Call @fn for each registered omap_hwmod, passing @data to each
2996 * function. @fn must return 0 for success or any other value for
2997 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2998 * will stop and the non-zero return value will be passed to the
2999 * caller of omap_hwmod_for_each(). @fn is called with
3000 * omap_hwmod_for_each() held.
3001 */
omap_hwmod_for_each(int (* fn)(struct omap_hwmod * oh,void * data),void * data)3002 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3003 void *data)
3004 {
3005 struct omap_hwmod *temp_oh;
3006 int ret = 0;
3007
3008 if (!fn)
3009 return -EINVAL;
3010
3011 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3012 ret = (*fn)(temp_oh, data);
3013 if (ret)
3014 break;
3015 }
3016
3017 return ret;
3018 }
3019
3020 /**
3021 * omap_hwmod_register_links - register an array of hwmod links
3022 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3023 *
3024 * Intended to be called early in boot before the clock framework is
3025 * initialized. If @ois is not null, will register all omap_hwmods
3026 * listed in @ois that are valid for this chip. Returns -EINVAL if
3027 * omap_hwmod_init() hasn't been called before calling this function,
3028 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3029 * success.
3030 */
omap_hwmod_register_links(struct omap_hwmod_ocp_if ** ois)3031 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3032 {
3033 int r, i;
3034
3035 if (!inited)
3036 return -EINVAL;
3037
3038 if (!ois)
3039 return 0;
3040
3041 if (ois[0] == NULL) /* Empty list */
3042 return 0;
3043
3044 i = 0;
3045 do {
3046 r = _register_link(ois[i]);
3047 WARN(r && r != -EEXIST,
3048 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3049 ois[i]->master->name, ois[i]->slave->name, r);
3050 } while (ois[++i]);
3051
3052 return 0;
3053 }
3054
3055 /**
3056 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3057 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3058 *
3059 * If the hwmod data corresponding to the MPU subsystem IP block
3060 * hasn't been initialized and set up yet, do so now. This must be
3061 * done first since sleep dependencies may be added from other hwmods
3062 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3063 * return value.
3064 */
_ensure_mpu_hwmod_is_setup(struct omap_hwmod * oh)3065 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3066 {
3067 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3068 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3069 __func__, MPU_INITIATOR_NAME);
3070 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3071 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3072 }
3073
3074 /**
3075 * omap_hwmod_setup_one - set up a single hwmod
3076 * @oh_name: const char * name of the already-registered hwmod to set up
3077 *
3078 * Initialize and set up a single hwmod. Intended to be used for a
3079 * small number of early devices, such as the timer IP blocks used for
3080 * the scheduler clock. Must be called after omap2_clk_init().
3081 * Resolves the struct clk names to struct clk pointers for each
3082 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3083 * -EINVAL upon error or 0 upon success.
3084 */
omap_hwmod_setup_one(const char * oh_name)3085 int __init omap_hwmod_setup_one(const char *oh_name)
3086 {
3087 struct omap_hwmod *oh;
3088
3089 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3090
3091 oh = _lookup(oh_name);
3092 if (!oh) {
3093 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3094 return -EINVAL;
3095 }
3096
3097 _ensure_mpu_hwmod_is_setup(oh);
3098
3099 _init(oh, NULL);
3100 _setup(oh, NULL);
3101
3102 return 0;
3103 }
3104
omap_hwmod_check_one(struct device * dev,const char * name,s8 v1,u8 v2)3105 static void omap_hwmod_check_one(struct device *dev,
3106 const char *name, s8 v1, u8 v2)
3107 {
3108 if (v1 < 0)
3109 return;
3110
3111 if (v1 != v2)
3112 dev_warn(dev, "%s %d != %d\n", name, v1, v2);
3113 }
3114
3115 /**
3116 * omap_hwmod_check_sysc - check sysc against platform sysc
3117 * @dev: struct device
3118 * @data: module data
3119 * @sysc_fields: new sysc configuration
3120 */
omap_hwmod_check_sysc(struct device * dev,const struct ti_sysc_module_data * data,struct sysc_regbits * sysc_fields)3121 static int omap_hwmod_check_sysc(struct device *dev,
3122 const struct ti_sysc_module_data *data,
3123 struct sysc_regbits *sysc_fields)
3124 {
3125 const struct sysc_regbits *regbits = data->cap->regbits;
3126
3127 omap_hwmod_check_one(dev, "dmadisable_shift",
3128 regbits->dmadisable_shift,
3129 sysc_fields->dmadisable_shift);
3130 omap_hwmod_check_one(dev, "midle_shift",
3131 regbits->midle_shift,
3132 sysc_fields->midle_shift);
3133 omap_hwmod_check_one(dev, "sidle_shift",
3134 regbits->sidle_shift,
3135 sysc_fields->sidle_shift);
3136 omap_hwmod_check_one(dev, "clkact_shift",
3137 regbits->clkact_shift,
3138 sysc_fields->clkact_shift);
3139 omap_hwmod_check_one(dev, "enwkup_shift",
3140 regbits->enwkup_shift,
3141 sysc_fields->enwkup_shift);
3142 omap_hwmod_check_one(dev, "srst_shift",
3143 regbits->srst_shift,
3144 sysc_fields->srst_shift);
3145 omap_hwmod_check_one(dev, "autoidle_shift",
3146 regbits->autoidle_shift,
3147 sysc_fields->autoidle_shift);
3148
3149 return 0;
3150 }
3151
3152 /**
3153 * omap_hwmod_init_regbits - init sysconfig specific register bits
3154 * @dev: struct device
3155 * @oh: module
3156 * @data: module data
3157 * @sysc_fields: new sysc configuration
3158 */
omap_hwmod_init_regbits(struct device * dev,struct omap_hwmod * oh,const struct ti_sysc_module_data * data,struct sysc_regbits ** sysc_fields)3159 static int omap_hwmod_init_regbits(struct device *dev, struct omap_hwmod *oh,
3160 const struct ti_sysc_module_data *data,
3161 struct sysc_regbits **sysc_fields)
3162 {
3163 switch (data->cap->type) {
3164 case TI_SYSC_OMAP2:
3165 case TI_SYSC_OMAP2_TIMER:
3166 *sysc_fields = &omap_hwmod_sysc_type1;
3167 break;
3168 case TI_SYSC_OMAP3_SHAM:
3169 *sysc_fields = &omap3_sham_sysc_fields;
3170 break;
3171 case TI_SYSC_OMAP3_AES:
3172 *sysc_fields = &omap3xxx_aes_sysc_fields;
3173 break;
3174 case TI_SYSC_OMAP4:
3175 case TI_SYSC_OMAP4_TIMER:
3176 *sysc_fields = &omap_hwmod_sysc_type2;
3177 break;
3178 case TI_SYSC_OMAP4_SIMPLE:
3179 *sysc_fields = &omap_hwmod_sysc_type3;
3180 break;
3181 case TI_SYSC_OMAP34XX_SR:
3182 *sysc_fields = &omap34xx_sr_sysc_fields;
3183 break;
3184 case TI_SYSC_OMAP36XX_SR:
3185 *sysc_fields = &omap36xx_sr_sysc_fields;
3186 break;
3187 case TI_SYSC_OMAP4_SR:
3188 *sysc_fields = &omap36xx_sr_sysc_fields;
3189 break;
3190 case TI_SYSC_OMAP4_MCASP:
3191 *sysc_fields = &omap_hwmod_sysc_type_mcasp;
3192 break;
3193 case TI_SYSC_OMAP4_USB_HOST_FS:
3194 *sysc_fields = &omap_hwmod_sysc_type_usb_host_fs;
3195 break;
3196 default:
3197 *sysc_fields = NULL;
3198 if (!oh->class->sysc->sysc_fields)
3199 return 0;
3200
3201 dev_err(dev, "sysc_fields not found\n");
3202
3203 return -EINVAL;
3204 }
3205
3206 return omap_hwmod_check_sysc(dev, data, *sysc_fields);
3207 }
3208
3209 /**
3210 * omap_hwmod_init_reg_offs - initialize sysconfig register offsets
3211 * @dev: struct device
3212 * @data: module data
3213 * @rev_offs: revision register offset
3214 * @sysc_offs: sysc register offset
3215 * @syss_offs: syss register offset
3216 */
omap_hwmod_init_reg_offs(struct device * dev,const struct ti_sysc_module_data * data,s32 * rev_offs,s32 * sysc_offs,s32 * syss_offs)3217 static int omap_hwmod_init_reg_offs(struct device *dev,
3218 const struct ti_sysc_module_data *data,
3219 s32 *rev_offs, s32 *sysc_offs,
3220 s32 *syss_offs)
3221 {
3222 *rev_offs = -ENODEV;
3223 *sysc_offs = 0;
3224 *syss_offs = 0;
3225
3226 if (data->offsets[SYSC_REVISION] >= 0)
3227 *rev_offs = data->offsets[SYSC_REVISION];
3228
3229 if (data->offsets[SYSC_SYSCONFIG] >= 0)
3230 *sysc_offs = data->offsets[SYSC_SYSCONFIG];
3231
3232 if (data->offsets[SYSC_SYSSTATUS] >= 0)
3233 *syss_offs = data->offsets[SYSC_SYSSTATUS];
3234
3235 return 0;
3236 }
3237
3238 /**
3239 * omap_hwmod_init_sysc_flags - initialize sysconfig features
3240 * @dev: struct device
3241 * @data: module data
3242 * @sysc_flags: module configuration
3243 */
omap_hwmod_init_sysc_flags(struct device * dev,const struct ti_sysc_module_data * data,u32 * sysc_flags)3244 static int omap_hwmod_init_sysc_flags(struct device *dev,
3245 const struct ti_sysc_module_data *data,
3246 u32 *sysc_flags)
3247 {
3248 *sysc_flags = 0;
3249
3250 switch (data->cap->type) {
3251 case TI_SYSC_OMAP2:
3252 case TI_SYSC_OMAP2_TIMER:
3253 /* See SYSC_OMAP2_* in include/dt-bindings/bus/ti-sysc.h */
3254 if (data->cfg->sysc_val & SYSC_OMAP2_CLOCKACTIVITY)
3255 *sysc_flags |= SYSC_HAS_CLOCKACTIVITY;
3256 if (data->cfg->sysc_val & SYSC_OMAP2_EMUFREE)
3257 *sysc_flags |= SYSC_HAS_EMUFREE;
3258 if (data->cfg->sysc_val & SYSC_OMAP2_ENAWAKEUP)
3259 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3260 if (data->cfg->sysc_val & SYSC_OMAP2_SOFTRESET)
3261 *sysc_flags |= SYSC_HAS_SOFTRESET;
3262 if (data->cfg->sysc_val & SYSC_OMAP2_AUTOIDLE)
3263 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3264 break;
3265 case TI_SYSC_OMAP4:
3266 case TI_SYSC_OMAP4_TIMER:
3267 /* See SYSC_OMAP4_* in include/dt-bindings/bus/ti-sysc.h */
3268 if (data->cfg->sysc_val & SYSC_OMAP4_DMADISABLE)
3269 *sysc_flags |= SYSC_HAS_DMADISABLE;
3270 if (data->cfg->sysc_val & SYSC_OMAP4_FREEEMU)
3271 *sysc_flags |= SYSC_HAS_EMUFREE;
3272 if (data->cfg->sysc_val & SYSC_OMAP4_SOFTRESET)
3273 *sysc_flags |= SYSC_HAS_SOFTRESET;
3274 break;
3275 case TI_SYSC_OMAP34XX_SR:
3276 case TI_SYSC_OMAP36XX_SR:
3277 /* See SYSC_OMAP3_SR_* in include/dt-bindings/bus/ti-sysc.h */
3278 if (data->cfg->sysc_val & SYSC_OMAP3_SR_ENAWAKEUP)
3279 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3280 break;
3281 default:
3282 if (data->cap->regbits->emufree_shift >= 0)
3283 *sysc_flags |= SYSC_HAS_EMUFREE;
3284 if (data->cap->regbits->enwkup_shift >= 0)
3285 *sysc_flags |= SYSC_HAS_ENAWAKEUP;
3286 if (data->cap->regbits->srst_shift >= 0)
3287 *sysc_flags |= SYSC_HAS_SOFTRESET;
3288 if (data->cap->regbits->autoidle_shift >= 0)
3289 *sysc_flags |= SYSC_HAS_AUTOIDLE;
3290 break;
3291 }
3292
3293 if (data->cap->regbits->midle_shift >= 0 &&
3294 data->cfg->midlemodes)
3295 *sysc_flags |= SYSC_HAS_MIDLEMODE;
3296
3297 if (data->cap->regbits->sidle_shift >= 0 &&
3298 data->cfg->sidlemodes)
3299 *sysc_flags |= SYSC_HAS_SIDLEMODE;
3300
3301 if (data->cfg->quirks & SYSC_QUIRK_UNCACHED)
3302 *sysc_flags |= SYSC_NO_CACHE;
3303 if (data->cfg->quirks & SYSC_QUIRK_RESET_STATUS)
3304 *sysc_flags |= SYSC_HAS_RESET_STATUS;
3305
3306 if (data->cfg->syss_mask & 1)
3307 *sysc_flags |= SYSS_HAS_RESET_STATUS;
3308
3309 return 0;
3310 }
3311
3312 /**
3313 * omap_hwmod_init_idlemodes - initialize module idle modes
3314 * @dev: struct device
3315 * @data: module data
3316 * @idlemodes: module supported idle modes
3317 */
omap_hwmod_init_idlemodes(struct device * dev,const struct ti_sysc_module_data * data,u32 * idlemodes)3318 static int omap_hwmod_init_idlemodes(struct device *dev,
3319 const struct ti_sysc_module_data *data,
3320 u32 *idlemodes)
3321 {
3322 *idlemodes = 0;
3323
3324 if (data->cfg->midlemodes & BIT(SYSC_IDLE_FORCE))
3325 *idlemodes |= MSTANDBY_FORCE;
3326 if (data->cfg->midlemodes & BIT(SYSC_IDLE_NO))
3327 *idlemodes |= MSTANDBY_NO;
3328 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART))
3329 *idlemodes |= MSTANDBY_SMART;
3330 if (data->cfg->midlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3331 *idlemodes |= MSTANDBY_SMART_WKUP;
3332
3333 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_FORCE))
3334 *idlemodes |= SIDLE_FORCE;
3335 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_NO))
3336 *idlemodes |= SIDLE_NO;
3337 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART))
3338 *idlemodes |= SIDLE_SMART;
3339 if (data->cfg->sidlemodes & BIT(SYSC_IDLE_SMART_WKUP))
3340 *idlemodes |= SIDLE_SMART_WKUP;
3341
3342 return 0;
3343 }
3344
3345 /**
3346 * omap_hwmod_check_module - check new module against platform data
3347 * @dev: struct device
3348 * @oh: module
3349 * @data: new module data
3350 * @sysc_fields: sysc register bits
3351 * @rev_offs: revision register offset
3352 * @sysc_offs: sysconfig register offset
3353 * @syss_offs: sysstatus register offset
3354 * @sysc_flags: sysc specific flags
3355 * @idlemodes: sysc supported idlemodes
3356 */
omap_hwmod_check_module(struct device * dev,struct omap_hwmod * oh,const struct ti_sysc_module_data * data,struct sysc_regbits * sysc_fields,s32 rev_offs,s32 sysc_offs,s32 syss_offs,u32 sysc_flags,u32 idlemodes)3357 static int omap_hwmod_check_module(struct device *dev,
3358 struct omap_hwmod *oh,
3359 const struct ti_sysc_module_data *data,
3360 struct sysc_regbits *sysc_fields,
3361 s32 rev_offs, s32 sysc_offs,
3362 s32 syss_offs, u32 sysc_flags,
3363 u32 idlemodes)
3364 {
3365 if (!oh->class->sysc)
3366 return -ENODEV;
3367
3368 if (oh->class->sysc->sysc_fields &&
3369 sysc_fields != oh->class->sysc->sysc_fields)
3370 dev_warn(dev, "sysc_fields mismatch\n");
3371
3372 if (rev_offs != oh->class->sysc->rev_offs)
3373 dev_warn(dev, "rev_offs %08x != %08x\n", rev_offs,
3374 oh->class->sysc->rev_offs);
3375 if (sysc_offs != oh->class->sysc->sysc_offs)
3376 dev_warn(dev, "sysc_offs %08x != %08x\n", sysc_offs,
3377 oh->class->sysc->sysc_offs);
3378 if (syss_offs != oh->class->sysc->syss_offs)
3379 dev_warn(dev, "syss_offs %08x != %08x\n", syss_offs,
3380 oh->class->sysc->syss_offs);
3381
3382 if (sysc_flags != oh->class->sysc->sysc_flags)
3383 dev_warn(dev, "sysc_flags %08x != %08x\n", sysc_flags,
3384 oh->class->sysc->sysc_flags);
3385
3386 if (idlemodes != oh->class->sysc->idlemodes)
3387 dev_warn(dev, "idlemodes %08x != %08x\n", idlemodes,
3388 oh->class->sysc->idlemodes);
3389
3390 if (data->cfg->srst_udelay != oh->class->sysc->srst_udelay)
3391 dev_warn(dev, "srst_udelay %i != %i\n",
3392 data->cfg->srst_udelay,
3393 oh->class->sysc->srst_udelay);
3394
3395 return 0;
3396 }
3397
3398 /**
3399 * omap_hwmod_allocate_module - allocate new module
3400 * @dev: struct device
3401 * @oh: module
3402 * @sysc_fields: sysc register bits
3403 * @clockdomain: clockdomain
3404 * @rev_offs: revision register offset
3405 * @sysc_offs: sysconfig register offset
3406 * @syss_offs: sysstatus register offset
3407 * @sysc_flags: sysc specific flags
3408 * @idlemodes: sysc supported idlemodes
3409 *
3410 * Note that the allocations here cannot use devm as ti-sysc can rebind.
3411 */
omap_hwmod_allocate_module(struct device * dev,struct omap_hwmod * oh,const struct ti_sysc_module_data * data,struct sysc_regbits * sysc_fields,struct clockdomain * clkdm,s32 rev_offs,s32 sysc_offs,s32 syss_offs,u32 sysc_flags,u32 idlemodes)3412 static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh,
3413 const struct ti_sysc_module_data *data,
3414 struct sysc_regbits *sysc_fields,
3415 struct clockdomain *clkdm,
3416 s32 rev_offs, s32 sysc_offs,
3417 s32 syss_offs, u32 sysc_flags,
3418 u32 idlemodes)
3419 {
3420 struct omap_hwmod_class_sysconfig *sysc;
3421 struct omap_hwmod_class *class = NULL;
3422 struct omap_hwmod_ocp_if *oi = NULL;
3423 void __iomem *regs = NULL;
3424 unsigned long flags;
3425
3426 sysc = kzalloc(sizeof(*sysc), GFP_KERNEL);
3427 if (!sysc)
3428 return -ENOMEM;
3429
3430 sysc->sysc_fields = sysc_fields;
3431 sysc->rev_offs = rev_offs;
3432 sysc->sysc_offs = sysc_offs;
3433 sysc->syss_offs = syss_offs;
3434 sysc->sysc_flags = sysc_flags;
3435 sysc->idlemodes = idlemodes;
3436 sysc->srst_udelay = data->cfg->srst_udelay;
3437
3438 if (!oh->_mpu_rt_va) {
3439 regs = ioremap(data->module_pa,
3440 data->module_size);
3441 if (!regs)
3442 goto out_free_sysc;
3443 }
3444
3445 /*
3446 * We may need a new oh->class as the other devices in the same class
3447 * may not yet have ioremapped their registers.
3448 */
3449 if (oh->class->name && strcmp(oh->class->name, data->name)) {
3450 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3451 if (!class)
3452 goto out_unmap;
3453 }
3454
3455 if (list_empty(&oh->slave_ports)) {
3456 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
3457 if (!oi)
3458 goto out_free_class;
3459
3460 /*
3461 * Note that we assume interconnect interface clocks will be
3462 * managed by the interconnect driver for OCPIF_SWSUP_IDLE case
3463 * on omap24xx and omap3.
3464 */
3465 oi->slave = oh;
3466 oi->user = OCP_USER_MPU | OCP_USER_SDMA;
3467 }
3468
3469 spin_lock_irqsave(&oh->_lock, flags);
3470 if (regs)
3471 oh->_mpu_rt_va = regs;
3472 if (class)
3473 oh->class = class;
3474 oh->class->sysc = sysc;
3475 if (oi)
3476 _add_link(oi);
3477 if (clkdm)
3478 oh->clkdm = clkdm;
3479 oh->_state = _HWMOD_STATE_INITIALIZED;
3480 oh->_postsetup_state = _HWMOD_STATE_DEFAULT;
3481 _setup(oh, NULL);
3482 spin_unlock_irqrestore(&oh->_lock, flags);
3483
3484 return 0;
3485
3486 out_free_class:
3487 kfree(class);
3488 out_unmap:
3489 iounmap(regs);
3490 out_free_sysc:
3491 kfree(sysc);
3492 return -ENOMEM;
3493 }
3494
3495 static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
3496 { .match = "msdi", .len = 4, .reset = omap_msdi_reset, },
3497 };
3498
3499 static const struct omap_hwmod_reset omap_reset_quirks[] = {
3500 { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
3501 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3502 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3503 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
3504 };
3505
3506 static void
omap_hwmod_init_reset_quirk(struct device * dev,struct omap_hwmod * oh,const struct ti_sysc_module_data * data,const struct omap_hwmod_reset * quirks,int quirks_sz)3507 omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh,
3508 const struct ti_sysc_module_data *data,
3509 const struct omap_hwmod_reset *quirks,
3510 int quirks_sz)
3511 {
3512 const struct omap_hwmod_reset *quirk;
3513 int i;
3514
3515 for (i = 0; i < quirks_sz; i++) {
3516 quirk = &quirks[i];
3517 if (!strncmp(data->name, quirk->match, quirk->len)) {
3518 oh->class->reset = quirk->reset;
3519
3520 return;
3521 }
3522 }
3523 }
3524
3525 static void
omap_hwmod_init_reset_quirks(struct device * dev,struct omap_hwmod * oh,const struct ti_sysc_module_data * data)3526 omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh,
3527 const struct ti_sysc_module_data *data)
3528 {
3529 if (soc_is_omap24xx())
3530 omap_hwmod_init_reset_quirk(dev, oh, data,
3531 omap24xx_reset_quirks,
3532 ARRAY_SIZE(omap24xx_reset_quirks));
3533
3534 omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks,
3535 ARRAY_SIZE(omap_reset_quirks));
3536 }
3537
3538 /**
3539 * omap_hwmod_init_module - initialize new module
3540 * @dev: struct device
3541 * @data: module data
3542 * @cookie: cookie for the caller to use for later calls
3543 */
omap_hwmod_init_module(struct device * dev,const struct ti_sysc_module_data * data,struct ti_sysc_cookie * cookie)3544 int omap_hwmod_init_module(struct device *dev,
3545 const struct ti_sysc_module_data *data,
3546 struct ti_sysc_cookie *cookie)
3547 {
3548 struct omap_hwmod *oh;
3549 struct sysc_regbits *sysc_fields;
3550 s32 rev_offs, sysc_offs, syss_offs;
3551 u32 sysc_flags, idlemodes;
3552 int error;
3553
3554 if (!dev || !data || !data->name || !cookie)
3555 return -EINVAL;
3556
3557 oh = _lookup(data->name);
3558 if (!oh) {
3559 oh = kzalloc(sizeof(*oh), GFP_KERNEL);
3560 if (!oh)
3561 return -ENOMEM;
3562
3563 oh->name = data->name;
3564 oh->_state = _HWMOD_STATE_UNKNOWN;
3565 lockdep_register_key(&oh->hwmod_key);
3566
3567 /* Unused, can be handled by PRM driver handling resets */
3568 oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT;
3569
3570 oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL);
3571 if (!oh->class) {
3572 kfree(oh);
3573 return -ENOMEM;
3574 }
3575
3576 omap_hwmod_init_reset_quirks(dev, oh, data);
3577
3578 oh->class->name = data->name;
3579 mutex_lock(&list_lock);
3580 error = _register(oh);
3581 mutex_unlock(&list_lock);
3582 }
3583
3584 cookie->data = oh;
3585
3586 error = omap_hwmod_init_regbits(dev, oh, data, &sysc_fields);
3587 if (error)
3588 return error;
3589
3590 error = omap_hwmod_init_reg_offs(dev, data, &rev_offs,
3591 &sysc_offs, &syss_offs);
3592 if (error)
3593 return error;
3594
3595 error = omap_hwmod_init_sysc_flags(dev, data, &sysc_flags);
3596 if (error)
3597 return error;
3598
3599 error = omap_hwmod_init_idlemodes(dev, data, &idlemodes);
3600 if (error)
3601 return error;
3602
3603 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE)
3604 oh->flags |= HWMOD_NO_IDLE;
3605 if (data->cfg->quirks & SYSC_QUIRK_NO_IDLE_ON_INIT)
3606 oh->flags |= HWMOD_INIT_NO_IDLE;
3607 if (data->cfg->quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
3608 oh->flags |= HWMOD_INIT_NO_RESET;
3609 if (data->cfg->quirks & SYSC_QUIRK_USE_CLOCKACT)
3610 oh->flags |= HWMOD_SET_DEFAULT_CLOCKACT;
3611 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE)
3612 oh->flags |= HWMOD_SWSUP_SIDLE;
3613 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT)
3614 oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
3615 if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
3616 oh->flags |= HWMOD_SWSUP_MSTANDBY;
3617
3618 error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
3619 rev_offs, sysc_offs, syss_offs,
3620 sysc_flags, idlemodes);
3621 if (!error)
3622 return error;
3623
3624 return omap_hwmod_allocate_module(dev, oh, data, sysc_fields,
3625 cookie->clkdm, rev_offs,
3626 sysc_offs, syss_offs,
3627 sysc_flags, idlemodes);
3628 }
3629
3630 /**
3631 * omap_hwmod_setup_earlycon_flags - set up flags for early console
3632 *
3633 * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
3634 * early concole so that hwmod core doesn't reset and keep it in idle
3635 * that specific uart.
3636 */
3637 #ifdef CONFIG_SERIAL_EARLYCON
omap_hwmod_setup_earlycon_flags(void)3638 static void __init omap_hwmod_setup_earlycon_flags(void)
3639 {
3640 struct device_node *np;
3641 struct omap_hwmod *oh;
3642 const char *uart;
3643
3644 np = of_find_node_by_path("/chosen");
3645 if (np) {
3646 uart = of_get_property(np, "stdout-path", NULL);
3647 if (uart) {
3648 np = of_find_node_by_path(uart);
3649 if (np) {
3650 uart = of_get_property(np, "ti,hwmods", NULL);
3651 oh = omap_hwmod_lookup(uart);
3652 if (!oh) {
3653 uart = of_get_property(np->parent,
3654 "ti,hwmods",
3655 NULL);
3656 oh = omap_hwmod_lookup(uart);
3657 }
3658 if (oh)
3659 oh->flags |= DEBUG_OMAPUART_FLAGS;
3660 }
3661 }
3662 }
3663 }
3664 #endif
3665
3666 /**
3667 * omap_hwmod_setup_all - set up all registered IP blocks
3668 *
3669 * Initialize and set up all IP blocks registered with the hwmod code.
3670 * Must be called after omap2_clk_init(). Resolves the struct clk
3671 * names to struct clk pointers for each registered omap_hwmod. Also
3672 * calls _setup() on each hwmod. Returns 0 upon success.
3673 */
omap_hwmod_setup_all(void)3674 static int __init omap_hwmod_setup_all(void)
3675 {
3676 if (!inited)
3677 return 0;
3678
3679 _ensure_mpu_hwmod_is_setup(NULL);
3680
3681 omap_hwmod_for_each(_init, NULL);
3682 #ifdef CONFIG_SERIAL_EARLYCON
3683 omap_hwmod_setup_earlycon_flags();
3684 #endif
3685 omap_hwmod_for_each(_setup, NULL);
3686
3687 return 0;
3688 }
3689 omap_postcore_initcall(omap_hwmod_setup_all);
3690
3691 /**
3692 * omap_hwmod_enable - enable an omap_hwmod
3693 * @oh: struct omap_hwmod *
3694 *
3695 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3696 * Returns -EINVAL on error or passes along the return value from _enable().
3697 */
omap_hwmod_enable(struct omap_hwmod * oh)3698 int omap_hwmod_enable(struct omap_hwmod *oh)
3699 {
3700 int r;
3701 unsigned long flags;
3702
3703 if (!oh)
3704 return -EINVAL;
3705
3706 spin_lock_irqsave(&oh->_lock, flags);
3707 r = _enable(oh);
3708 spin_unlock_irqrestore(&oh->_lock, flags);
3709
3710 return r;
3711 }
3712
3713 /**
3714 * omap_hwmod_idle - idle an omap_hwmod
3715 * @oh: struct omap_hwmod *
3716 *
3717 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3718 * Returns -EINVAL on error or passes along the return value from _idle().
3719 */
omap_hwmod_idle(struct omap_hwmod * oh)3720 int omap_hwmod_idle(struct omap_hwmod *oh)
3721 {
3722 int r;
3723 unsigned long flags;
3724
3725 if (!oh)
3726 return -EINVAL;
3727
3728 spin_lock_irqsave(&oh->_lock, flags);
3729 r = _idle(oh);
3730 spin_unlock_irqrestore(&oh->_lock, flags);
3731
3732 return r;
3733 }
3734
3735 /**
3736 * omap_hwmod_shutdown - shutdown an omap_hwmod
3737 * @oh: struct omap_hwmod *
3738 *
3739 * Shutdown an omap_hwmod @oh. Intended to be called by
3740 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3741 * the return value from _shutdown().
3742 */
omap_hwmod_shutdown(struct omap_hwmod * oh)3743 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3744 {
3745 int r;
3746 unsigned long flags;
3747
3748 if (!oh)
3749 return -EINVAL;
3750
3751 spin_lock_irqsave(&oh->_lock, flags);
3752 r = _shutdown(oh);
3753 spin_unlock_irqrestore(&oh->_lock, flags);
3754
3755 return r;
3756 }
3757
3758 /*
3759 * IP block data retrieval functions
3760 */
3761
3762 /**
3763 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3764 * @oh: struct omap_hwmod *
3765 *
3766 * Return the powerdomain pointer associated with the OMAP module
3767 * @oh's main clock. If @oh does not have a main clk, return the
3768 * powerdomain associated with the interface clock associated with the
3769 * module's MPU port. (XXX Perhaps this should use the SDMA port
3770 * instead?) Returns NULL on error, or a struct powerdomain * on
3771 * success.
3772 */
omap_hwmod_get_pwrdm(struct omap_hwmod * oh)3773 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3774 {
3775 struct clk *c;
3776 struct omap_hwmod_ocp_if *oi;
3777 struct clockdomain *clkdm;
3778 struct clk_hw_omap *clk;
3779
3780 if (!oh)
3781 return NULL;
3782
3783 if (oh->clkdm)
3784 return oh->clkdm->pwrdm.ptr;
3785
3786 if (oh->_clk) {
3787 c = oh->_clk;
3788 } else {
3789 oi = _find_mpu_rt_port(oh);
3790 if (!oi)
3791 return NULL;
3792 c = oi->_clk;
3793 }
3794
3795 clk = to_clk_hw_omap(__clk_get_hw(c));
3796 clkdm = clk->clkdm;
3797 if (!clkdm)
3798 return NULL;
3799
3800 return clkdm->pwrdm.ptr;
3801 }
3802
3803 /**
3804 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3805 * @oh: struct omap_hwmod *
3806 *
3807 * Returns the virtual address corresponding to the beginning of the
3808 * module's register target, in the address range that is intended to
3809 * be used by the MPU. Returns the virtual address upon success or NULL
3810 * upon error.
3811 */
omap_hwmod_get_mpu_rt_va(struct omap_hwmod * oh)3812 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3813 {
3814 if (!oh)
3815 return NULL;
3816
3817 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3818 return NULL;
3819
3820 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3821 return NULL;
3822
3823 return oh->_mpu_rt_va;
3824 }
3825
3826 /*
3827 * XXX what about functions for drivers to save/restore ocp_sysconfig
3828 * for context save/restore operations?
3829 */
3830
3831 /**
3832 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3833 * contained in the hwmod module.
3834 * @oh: struct omap_hwmod *
3835 * @name: name of the reset line to lookup and assert
3836 *
3837 * Some IP like dsp, ipu or iva contain processor that require
3838 * an HW reset line to be assert / deassert in order to enable fully
3839 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3840 * yet supported on this OMAP; otherwise, passes along the return value
3841 * from _assert_hardreset().
3842 */
omap_hwmod_assert_hardreset(struct omap_hwmod * oh,const char * name)3843 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3844 {
3845 int ret;
3846 unsigned long flags;
3847
3848 if (!oh)
3849 return -EINVAL;
3850
3851 spin_lock_irqsave(&oh->_lock, flags);
3852 ret = _assert_hardreset(oh, name);
3853 spin_unlock_irqrestore(&oh->_lock, flags);
3854
3855 return ret;
3856 }
3857
3858 /**
3859 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3860 * contained in the hwmod module.
3861 * @oh: struct omap_hwmod *
3862 * @name: name of the reset line to look up and deassert
3863 *
3864 * Some IP like dsp, ipu or iva contain processor that require
3865 * an HW reset line to be assert / deassert in order to enable fully
3866 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3867 * yet supported on this OMAP; otherwise, passes along the return value
3868 * from _deassert_hardreset().
3869 */
omap_hwmod_deassert_hardreset(struct omap_hwmod * oh,const char * name)3870 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3871 {
3872 int ret;
3873 unsigned long flags;
3874
3875 if (!oh)
3876 return -EINVAL;
3877
3878 spin_lock_irqsave(&oh->_lock, flags);
3879 ret = _deassert_hardreset(oh, name);
3880 spin_unlock_irqrestore(&oh->_lock, flags);
3881
3882 return ret;
3883 }
3884
3885 /**
3886 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3887 * @classname: struct omap_hwmod_class name to search for
3888 * @fn: callback function pointer to call for each hwmod in class @classname
3889 * @user: arbitrary context data to pass to the callback function
3890 *
3891 * For each omap_hwmod of class @classname, call @fn.
3892 * If the callback function returns something other than
3893 * zero, the iterator is terminated, and the callback function's return
3894 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3895 * if @classname or @fn are NULL, or passes back the error code from @fn.
3896 */
omap_hwmod_for_each_by_class(const char * classname,int (* fn)(struct omap_hwmod * oh,void * user),void * user)3897 int omap_hwmod_for_each_by_class(const char *classname,
3898 int (*fn)(struct omap_hwmod *oh,
3899 void *user),
3900 void *user)
3901 {
3902 struct omap_hwmod *temp_oh;
3903 int ret = 0;
3904
3905 if (!classname || !fn)
3906 return -EINVAL;
3907
3908 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3909 __func__, classname);
3910
3911 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3912 if (!strcmp(temp_oh->class->name, classname)) {
3913 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3914 __func__, temp_oh->name);
3915 ret = (*fn)(temp_oh, user);
3916 if (ret)
3917 break;
3918 }
3919 }
3920
3921 if (ret)
3922 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3923 __func__, ret);
3924
3925 return ret;
3926 }
3927
3928 /**
3929 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3930 * @oh: struct omap_hwmod *
3931 * @state: state that _setup() should leave the hwmod in
3932 *
3933 * Sets the hwmod state that @oh will enter at the end of _setup()
3934 * (called by omap_hwmod_setup_*()). See also the documentation
3935 * for _setup_postsetup(), above. Returns 0 upon success or
3936 * -EINVAL if there is a problem with the arguments or if the hwmod is
3937 * in the wrong state.
3938 */
omap_hwmod_set_postsetup_state(struct omap_hwmod * oh,u8 state)3939 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3940 {
3941 int ret;
3942 unsigned long flags;
3943
3944 if (!oh)
3945 return -EINVAL;
3946
3947 if (state != _HWMOD_STATE_DISABLED &&
3948 state != _HWMOD_STATE_ENABLED &&
3949 state != _HWMOD_STATE_IDLE)
3950 return -EINVAL;
3951
3952 spin_lock_irqsave(&oh->_lock, flags);
3953
3954 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3955 ret = -EINVAL;
3956 goto ohsps_unlock;
3957 }
3958
3959 oh->_postsetup_state = state;
3960 ret = 0;
3961
3962 ohsps_unlock:
3963 spin_unlock_irqrestore(&oh->_lock, flags);
3964
3965 return ret;
3966 }
3967
3968 /**
3969 * omap_hwmod_get_context_loss_count - get lost context count
3970 * @oh: struct omap_hwmod *
3971 *
3972 * Returns the context loss count of associated @oh
3973 * upon success, or zero if no context loss data is available.
3974 *
3975 * On OMAP4, this queries the per-hwmod context loss register,
3976 * assuming one exists. If not, or on OMAP2/3, this queries the
3977 * enclosing powerdomain context loss count.
3978 */
omap_hwmod_get_context_loss_count(struct omap_hwmod * oh)3979 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3980 {
3981 struct powerdomain *pwrdm;
3982 int ret = 0;
3983
3984 if (soc_ops.get_context_lost)
3985 return soc_ops.get_context_lost(oh);
3986
3987 pwrdm = omap_hwmod_get_pwrdm(oh);
3988 if (pwrdm)
3989 ret = pwrdm_get_context_loss_count(pwrdm);
3990
3991 return ret;
3992 }
3993
3994 /**
3995 * omap_hwmod_init - initialize the hwmod code
3996 *
3997 * Sets up some function pointers needed by the hwmod code to operate on the
3998 * currently-booted SoC. Intended to be called once during kernel init
3999 * before any hwmods are registered. No return value.
4000 */
omap_hwmod_init(void)4001 void __init omap_hwmod_init(void)
4002 {
4003 if (cpu_is_omap24xx()) {
4004 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4005 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4006 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4007 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4008 } else if (cpu_is_omap34xx()) {
4009 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
4010 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4011 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4012 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4013 soc_ops.init_clkdm = _init_clkdm;
4014 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
4015 soc_ops.enable_module = _omap4_enable_module;
4016 soc_ops.disable_module = _omap4_disable_module;
4017 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4018 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4019 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4020 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4021 soc_ops.init_clkdm = _init_clkdm;
4022 soc_ops.update_context_lost = _omap4_update_context_lost;
4023 soc_ops.get_context_lost = _omap4_get_context_lost;
4024 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4025 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4026 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
4027 soc_is_am43xx()) {
4028 soc_ops.enable_module = _omap4_enable_module;
4029 soc_ops.disable_module = _omap4_disable_module;
4030 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4031 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4032 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4033 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4034 soc_ops.init_clkdm = _init_clkdm;
4035 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
4036 soc_ops.xlate_clkctrl = _omap4_xlate_clkctrl;
4037 } else {
4038 WARN(1, "omap_hwmod: unknown SoC type\n");
4039 }
4040
4041 _init_clkctrl_providers();
4042
4043 inited = true;
4044 }
4045
4046 /**
4047 * omap_hwmod_get_main_clk - get pointer to main clock name
4048 * @oh: struct omap_hwmod *
4049 *
4050 * Returns the main clock name assocated with @oh upon success,
4051 * or NULL if @oh is NULL.
4052 */
omap_hwmod_get_main_clk(struct omap_hwmod * oh)4053 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4054 {
4055 if (!oh)
4056 return NULL;
4057
4058 return oh->main_clk;
4059 }
4060