1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 A FORE Systems 200E-series driver for ATM on Linux.
4 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
5
6 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
7
8 This driver simultaneously supports PCA-200E and SBA-200E adapters
9 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
10
11 */
12
13
14 #include <linux/kernel.h>
15 #include <linux/slab.h>
16 #include <linux/init.h>
17 #include <linux/capability.h>
18 #include <linux/interrupt.h>
19 #include <linux/bitops.h>
20 #include <linux/pci.h>
21 #include <linux/module.h>
22 #include <linux/atmdev.h>
23 #include <linux/sonet.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/delay.h>
26 #include <linux/firmware.h>
27 #include <linux/pgtable.h>
28 #include <asm/io.h>
29 #include <asm/string.h>
30 #include <asm/page.h>
31 #include <asm/irq.h>
32 #include <asm/dma.h>
33 #include <asm/byteorder.h>
34 #include <linux/uaccess.h>
35 #include <linux/atomic.h>
36
37 #ifdef CONFIG_SBUS
38 #include <linux/of.h>
39 #include <linux/of_device.h>
40 #include <asm/idprom.h>
41 #include <asm/openprom.h>
42 #include <asm/oplib.h>
43 #endif
44
45 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
46 #define FORE200E_USE_TASKLET
47 #endif
48
49 #if 0 /* enable the debugging code of the buffer supply queues */
50 #define FORE200E_BSQ_DEBUG
51 #endif
52
53 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
54 #define FORE200E_52BYTE_AAL0_SDU
55 #endif
56
57 #include "fore200e.h"
58 #include "suni.h"
59
60 #define FORE200E_VERSION "0.3e"
61
62 #define FORE200E "fore200e: "
63
64 #if 0 /* override .config */
65 #define CONFIG_ATM_FORE200E_DEBUG 1
66 #endif
67 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
68 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
69 printk(FORE200E format, ##args); } while (0)
70 #else
71 #define DPRINTK(level, format, args...) do {} while (0)
72 #endif
73
74
75 #define FORE200E_ALIGN(addr, alignment) \
76 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
77
78 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
79
80 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
81
82 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo))
83
84 #if 1
85 #define ASSERT(expr) if (!(expr)) { \
86 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
87 __func__, __LINE__, #expr); \
88 panic(FORE200E "%s", __func__); \
89 }
90 #else
91 #define ASSERT(expr) do {} while (0)
92 #endif
93
94
95 static const struct atmdev_ops fore200e_ops;
96
97 static LIST_HEAD(fore200e_boards);
98
99
100 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
101 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
102
103 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
104 { BUFFER_S1_NBR, BUFFER_L1_NBR },
105 { BUFFER_S2_NBR, BUFFER_L2_NBR }
106 };
107
108 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
109 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
110 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
111 };
112
113
114 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
115 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
116 #endif
117
118
119 #if 0 /* currently unused */
120 static int
121 fore200e_fore2atm_aal(enum fore200e_aal aal)
122 {
123 switch(aal) {
124 case FORE200E_AAL0: return ATM_AAL0;
125 case FORE200E_AAL34: return ATM_AAL34;
126 case FORE200E_AAL5: return ATM_AAL5;
127 }
128
129 return -EINVAL;
130 }
131 #endif
132
133
134 static enum fore200e_aal
fore200e_atm2fore_aal(int aal)135 fore200e_atm2fore_aal(int aal)
136 {
137 switch(aal) {
138 case ATM_AAL0: return FORE200E_AAL0;
139 case ATM_AAL34: return FORE200E_AAL34;
140 case ATM_AAL1:
141 case ATM_AAL2:
142 case ATM_AAL5: return FORE200E_AAL5;
143 }
144
145 return -EINVAL;
146 }
147
148
149 static char*
fore200e_irq_itoa(int irq)150 fore200e_irq_itoa(int irq)
151 {
152 static char str[8];
153 sprintf(str, "%d", irq);
154 return str;
155 }
156
157
158 /* allocate and align a chunk of memory intended to hold the data behing exchanged
159 between the driver and the adapter (using streaming DVMA) */
160
161 static int
fore200e_chunk_alloc(struct fore200e * fore200e,struct chunk * chunk,int size,int alignment,int direction)162 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
163 {
164 unsigned long offset = 0;
165
166 if (alignment <= sizeof(int))
167 alignment = 0;
168
169 chunk->alloc_size = size + alignment;
170 chunk->direction = direction;
171
172 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL);
173 if (chunk->alloc_addr == NULL)
174 return -ENOMEM;
175
176 if (alignment > 0)
177 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
178
179 chunk->align_addr = chunk->alloc_addr + offset;
180
181 chunk->dma_addr = dma_map_single(fore200e->dev, chunk->align_addr,
182 size, direction);
183 if (dma_mapping_error(fore200e->dev, chunk->dma_addr)) {
184 kfree(chunk->alloc_addr);
185 return -ENOMEM;
186 }
187 return 0;
188 }
189
190
191 /* free a chunk of memory */
192
193 static void
fore200e_chunk_free(struct fore200e * fore200e,struct chunk * chunk)194 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
195 {
196 dma_unmap_single(fore200e->dev, chunk->dma_addr, chunk->dma_size,
197 chunk->direction);
198 kfree(chunk->alloc_addr);
199 }
200
201 /*
202 * Allocate a DMA consistent chunk of memory intended to act as a communication
203 * mechanism (to hold descriptors, status, queues, etc.) shared by the driver
204 * and the adapter.
205 */
206 static int
fore200e_dma_chunk_alloc(struct fore200e * fore200e,struct chunk * chunk,int size,int nbr,int alignment)207 fore200e_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
208 int size, int nbr, int alignment)
209 {
210 /* returned chunks are page-aligned */
211 chunk->alloc_size = size * nbr;
212 chunk->alloc_addr = dma_alloc_coherent(fore200e->dev, chunk->alloc_size,
213 &chunk->dma_addr, GFP_KERNEL);
214 if (!chunk->alloc_addr)
215 return -ENOMEM;
216 chunk->align_addr = chunk->alloc_addr;
217 return 0;
218 }
219
220 /*
221 * Free a DMA consistent chunk of memory.
222 */
223 static void
fore200e_dma_chunk_free(struct fore200e * fore200e,struct chunk * chunk)224 fore200e_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
225 {
226 dma_free_coherent(fore200e->dev, chunk->alloc_size, chunk->alloc_addr,
227 chunk->dma_addr);
228 }
229
230 static void
fore200e_spin(int msecs)231 fore200e_spin(int msecs)
232 {
233 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
234 while (time_before(jiffies, timeout));
235 }
236
237
238 static int
fore200e_poll(struct fore200e * fore200e,volatile u32 * addr,u32 val,int msecs)239 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
240 {
241 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
242 int ok;
243
244 mb();
245 do {
246 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
247 break;
248
249 } while (time_before(jiffies, timeout));
250
251 #if 1
252 if (!ok) {
253 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
254 *addr, val);
255 }
256 #endif
257
258 return ok;
259 }
260
261
262 static int
fore200e_io_poll(struct fore200e * fore200e,volatile u32 __iomem * addr,u32 val,int msecs)263 fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
264 {
265 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
266 int ok;
267
268 do {
269 if ((ok = (fore200e->bus->read(addr) == val)))
270 break;
271
272 } while (time_before(jiffies, timeout));
273
274 #if 1
275 if (!ok) {
276 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
277 fore200e->bus->read(addr), val);
278 }
279 #endif
280
281 return ok;
282 }
283
284
285 static void
fore200e_free_rx_buf(struct fore200e * fore200e)286 fore200e_free_rx_buf(struct fore200e* fore200e)
287 {
288 int scheme, magn, nbr;
289 struct buffer* buffer;
290
291 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
292 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
293
294 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
295
296 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
297
298 struct chunk* data = &buffer[ nbr ].data;
299
300 if (data->alloc_addr != NULL)
301 fore200e_chunk_free(fore200e, data);
302 }
303 }
304 }
305 }
306 }
307
308
309 static void
fore200e_uninit_bs_queue(struct fore200e * fore200e)310 fore200e_uninit_bs_queue(struct fore200e* fore200e)
311 {
312 int scheme, magn;
313
314 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
315 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
316
317 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
318 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
319
320 if (status->alloc_addr)
321 fore200e_dma_chunk_free(fore200e, status);
322
323 if (rbd_block->alloc_addr)
324 fore200e_dma_chunk_free(fore200e, rbd_block);
325 }
326 }
327 }
328
329
330 static int
fore200e_reset(struct fore200e * fore200e,int diag)331 fore200e_reset(struct fore200e* fore200e, int diag)
332 {
333 int ok;
334
335 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
336
337 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
338
339 fore200e->bus->reset(fore200e);
340
341 if (diag) {
342 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
343 if (ok == 0) {
344
345 printk(FORE200E "device %s self-test failed\n", fore200e->name);
346 return -ENODEV;
347 }
348
349 printk(FORE200E "device %s self-test passed\n", fore200e->name);
350
351 fore200e->state = FORE200E_STATE_RESET;
352 }
353
354 return 0;
355 }
356
357
358 static void
fore200e_shutdown(struct fore200e * fore200e)359 fore200e_shutdown(struct fore200e* fore200e)
360 {
361 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
362 fore200e->name, fore200e->phys_base,
363 fore200e_irq_itoa(fore200e->irq));
364
365 if (fore200e->state > FORE200E_STATE_RESET) {
366 /* first, reset the board to prevent further interrupts or data transfers */
367 fore200e_reset(fore200e, 0);
368 }
369
370 /* then, release all allocated resources */
371 switch(fore200e->state) {
372
373 case FORE200E_STATE_COMPLETE:
374 kfree(fore200e->stats);
375
376 fallthrough;
377 case FORE200E_STATE_IRQ:
378 free_irq(fore200e->irq, fore200e->atm_dev);
379
380 fallthrough;
381 case FORE200E_STATE_ALLOC_BUF:
382 fore200e_free_rx_buf(fore200e);
383
384 fallthrough;
385 case FORE200E_STATE_INIT_BSQ:
386 fore200e_uninit_bs_queue(fore200e);
387
388 fallthrough;
389 case FORE200E_STATE_INIT_RXQ:
390 fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.status);
391 fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
392
393 fallthrough;
394 case FORE200E_STATE_INIT_TXQ:
395 fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.status);
396 fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
397
398 fallthrough;
399 case FORE200E_STATE_INIT_CMDQ:
400 fore200e_dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
401
402 fallthrough;
403 case FORE200E_STATE_INITIALIZE:
404 /* nothing to do for that state */
405
406 case FORE200E_STATE_START_FW:
407 /* nothing to do for that state */
408
409 case FORE200E_STATE_RESET:
410 /* nothing to do for that state */
411
412 case FORE200E_STATE_MAP:
413 fore200e->bus->unmap(fore200e);
414
415 fallthrough;
416 case FORE200E_STATE_CONFIGURE:
417 /* nothing to do for that state */
418
419 case FORE200E_STATE_REGISTER:
420 /* XXX shouldn't we *start* by deregistering the device? */
421 atm_dev_deregister(fore200e->atm_dev);
422
423 case FORE200E_STATE_BLANK:
424 /* nothing to do for that state */
425 break;
426 }
427 }
428
429
430 #ifdef CONFIG_PCI
431
fore200e_pca_read(volatile u32 __iomem * addr)432 static u32 fore200e_pca_read(volatile u32 __iomem *addr)
433 {
434 /* on big-endian hosts, the board is configured to convert
435 the endianess of slave RAM accesses */
436 return le32_to_cpu(readl(addr));
437 }
438
439
fore200e_pca_write(u32 val,volatile u32 __iomem * addr)440 static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
441 {
442 /* on big-endian hosts, the board is configured to convert
443 the endianess of slave RAM accesses */
444 writel(cpu_to_le32(val), addr);
445 }
446
447 static int
fore200e_pca_irq_check(struct fore200e * fore200e)448 fore200e_pca_irq_check(struct fore200e* fore200e)
449 {
450 /* this is a 1 bit register */
451 int irq_posted = readl(fore200e->regs.pca.psr);
452
453 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
454 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
455 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
456 }
457 #endif
458
459 return irq_posted;
460 }
461
462
463 static void
fore200e_pca_irq_ack(struct fore200e * fore200e)464 fore200e_pca_irq_ack(struct fore200e* fore200e)
465 {
466 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
467 }
468
469
470 static void
fore200e_pca_reset(struct fore200e * fore200e)471 fore200e_pca_reset(struct fore200e* fore200e)
472 {
473 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
474 fore200e_spin(10);
475 writel(0, fore200e->regs.pca.hcr);
476 }
477
478
fore200e_pca_map(struct fore200e * fore200e)479 static int fore200e_pca_map(struct fore200e* fore200e)
480 {
481 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
482
483 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
484
485 if (fore200e->virt_base == NULL) {
486 printk(FORE200E "can't map device %s\n", fore200e->name);
487 return -EFAULT;
488 }
489
490 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
491
492 /* gain access to the PCA specific registers */
493 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
494 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
495 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
496
497 fore200e->state = FORE200E_STATE_MAP;
498 return 0;
499 }
500
501
502 static void
fore200e_pca_unmap(struct fore200e * fore200e)503 fore200e_pca_unmap(struct fore200e* fore200e)
504 {
505 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
506
507 if (fore200e->virt_base != NULL)
508 iounmap(fore200e->virt_base);
509 }
510
511
fore200e_pca_configure(struct fore200e * fore200e)512 static int fore200e_pca_configure(struct fore200e *fore200e)
513 {
514 struct pci_dev *pci_dev = to_pci_dev(fore200e->dev);
515 u8 master_ctrl, latency;
516
517 DPRINTK(2, "device %s being configured\n", fore200e->name);
518
519 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
520 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
521 return -EIO;
522 }
523
524 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
525
526 master_ctrl = master_ctrl
527 #if defined(__BIG_ENDIAN)
528 /* request the PCA board to convert the endianess of slave RAM accesses */
529 | PCA200E_CTRL_CONVERT_ENDIAN
530 #endif
531 #if 0
532 | PCA200E_CTRL_DIS_CACHE_RD
533 | PCA200E_CTRL_DIS_WRT_INVAL
534 | PCA200E_CTRL_ENA_CONT_REQ_MODE
535 | PCA200E_CTRL_2_CACHE_WRT_INVAL
536 #endif
537 | PCA200E_CTRL_LARGE_PCI_BURSTS;
538
539 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
540
541 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
542 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
543 this may impact the performances of other PCI devices on the same bus, though */
544 latency = 192;
545 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
546
547 fore200e->state = FORE200E_STATE_CONFIGURE;
548 return 0;
549 }
550
551
552 static int __init
fore200e_pca_prom_read(struct fore200e * fore200e,struct prom_data * prom)553 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
554 {
555 struct host_cmdq* cmdq = &fore200e->host_cmdq;
556 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
557 struct prom_opcode opcode;
558 int ok;
559 u32 prom_dma;
560
561 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
562
563 opcode.opcode = OPCODE_GET_PROM;
564 opcode.pad = 0;
565
566 prom_dma = dma_map_single(fore200e->dev, prom, sizeof(struct prom_data),
567 DMA_FROM_DEVICE);
568 if (dma_mapping_error(fore200e->dev, prom_dma))
569 return -ENOMEM;
570
571 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
572
573 *entry->status = STATUS_PENDING;
574
575 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
576
577 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
578
579 *entry->status = STATUS_FREE;
580
581 dma_unmap_single(fore200e->dev, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
582
583 if (ok == 0) {
584 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
585 return -EIO;
586 }
587
588 #if defined(__BIG_ENDIAN)
589
590 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
591
592 /* MAC address is stored as little-endian */
593 swap_here(&prom->mac_addr[0]);
594 swap_here(&prom->mac_addr[4]);
595 #endif
596
597 return 0;
598 }
599
600
601 static int
fore200e_pca_proc_read(struct fore200e * fore200e,char * page)602 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
603 {
604 struct pci_dev *pci_dev = to_pci_dev(fore200e->dev);
605
606 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
607 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
608 }
609
610 static const struct fore200e_bus fore200e_pci_ops = {
611 .model_name = "PCA-200E",
612 .proc_name = "pca200e",
613 .descr_alignment = 32,
614 .buffer_alignment = 4,
615 .status_alignment = 32,
616 .read = fore200e_pca_read,
617 .write = fore200e_pca_write,
618 .configure = fore200e_pca_configure,
619 .map = fore200e_pca_map,
620 .reset = fore200e_pca_reset,
621 .prom_read = fore200e_pca_prom_read,
622 .unmap = fore200e_pca_unmap,
623 .irq_check = fore200e_pca_irq_check,
624 .irq_ack = fore200e_pca_irq_ack,
625 .proc_read = fore200e_pca_proc_read,
626 };
627 #endif /* CONFIG_PCI */
628
629 #ifdef CONFIG_SBUS
630
fore200e_sba_read(volatile u32 __iomem * addr)631 static u32 fore200e_sba_read(volatile u32 __iomem *addr)
632 {
633 return sbus_readl(addr);
634 }
635
fore200e_sba_write(u32 val,volatile u32 __iomem * addr)636 static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
637 {
638 sbus_writel(val, addr);
639 }
640
fore200e_sba_irq_enable(struct fore200e * fore200e)641 static void fore200e_sba_irq_enable(struct fore200e *fore200e)
642 {
643 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
644 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
645 }
646
fore200e_sba_irq_check(struct fore200e * fore200e)647 static int fore200e_sba_irq_check(struct fore200e *fore200e)
648 {
649 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
650 }
651
fore200e_sba_irq_ack(struct fore200e * fore200e)652 static void fore200e_sba_irq_ack(struct fore200e *fore200e)
653 {
654 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
655 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
656 }
657
fore200e_sba_reset(struct fore200e * fore200e)658 static void fore200e_sba_reset(struct fore200e *fore200e)
659 {
660 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
661 fore200e_spin(10);
662 fore200e->bus->write(0, fore200e->regs.sba.hcr);
663 }
664
fore200e_sba_map(struct fore200e * fore200e)665 static int __init fore200e_sba_map(struct fore200e *fore200e)
666 {
667 struct platform_device *op = to_platform_device(fore200e->dev);
668 unsigned int bursts;
669
670 /* gain access to the SBA specific registers */
671 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
672 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
673 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
674 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
675
676 if (!fore200e->virt_base) {
677 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
678 return -EFAULT;
679 }
680
681 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
682
683 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
684
685 /* get the supported DVMA burst sizes */
686 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
687
688 if (sbus_can_dma_64bit())
689 sbus_set_sbus64(&op->dev, bursts);
690
691 fore200e->state = FORE200E_STATE_MAP;
692 return 0;
693 }
694
fore200e_sba_unmap(struct fore200e * fore200e)695 static void fore200e_sba_unmap(struct fore200e *fore200e)
696 {
697 struct platform_device *op = to_platform_device(fore200e->dev);
698
699 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
700 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
701 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
702 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
703 }
704
fore200e_sba_configure(struct fore200e * fore200e)705 static int __init fore200e_sba_configure(struct fore200e *fore200e)
706 {
707 fore200e->state = FORE200E_STATE_CONFIGURE;
708 return 0;
709 }
710
fore200e_sba_prom_read(struct fore200e * fore200e,struct prom_data * prom)711 static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
712 {
713 struct platform_device *op = to_platform_device(fore200e->dev);
714 const u8 *prop;
715 int len;
716
717 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
718 if (!prop)
719 return -ENODEV;
720 memcpy(&prom->mac_addr[4], prop, 4);
721
722 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
723 if (!prop)
724 return -ENODEV;
725 memcpy(&prom->mac_addr[2], prop, 4);
726
727 prom->serial_number = of_getintprop_default(op->dev.of_node,
728 "serialnumber", 0);
729 prom->hw_revision = of_getintprop_default(op->dev.of_node,
730 "promversion", 0);
731
732 return 0;
733 }
734
fore200e_sba_proc_read(struct fore200e * fore200e,char * page)735 static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
736 {
737 struct platform_device *op = to_platform_device(fore200e->dev);
738 const struct linux_prom_registers *regs;
739
740 regs = of_get_property(op->dev.of_node, "reg", NULL);
741
742 return sprintf(page, " SBUS slot/device:\t\t%d/'%pOFn'\n",
743 (regs ? regs->which_io : 0), op->dev.of_node);
744 }
745
746 static const struct fore200e_bus fore200e_sbus_ops = {
747 .model_name = "SBA-200E",
748 .proc_name = "sba200e",
749 .descr_alignment = 32,
750 .buffer_alignment = 64,
751 .status_alignment = 32,
752 .read = fore200e_sba_read,
753 .write = fore200e_sba_write,
754 .configure = fore200e_sba_configure,
755 .map = fore200e_sba_map,
756 .reset = fore200e_sba_reset,
757 .prom_read = fore200e_sba_prom_read,
758 .unmap = fore200e_sba_unmap,
759 .irq_enable = fore200e_sba_irq_enable,
760 .irq_check = fore200e_sba_irq_check,
761 .irq_ack = fore200e_sba_irq_ack,
762 .proc_read = fore200e_sba_proc_read,
763 };
764 #endif /* CONFIG_SBUS */
765
766 static void
fore200e_tx_irq(struct fore200e * fore200e)767 fore200e_tx_irq(struct fore200e* fore200e)
768 {
769 struct host_txq* txq = &fore200e->host_txq;
770 struct host_txq_entry* entry;
771 struct atm_vcc* vcc;
772 struct fore200e_vc_map* vc_map;
773
774 if (fore200e->host_txq.txing == 0)
775 return;
776
777 for (;;) {
778
779 entry = &txq->host_entry[ txq->tail ];
780
781 if ((*entry->status & STATUS_COMPLETE) == 0) {
782 break;
783 }
784
785 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
786 entry, txq->tail, entry->vc_map, entry->skb);
787
788 /* free copy of misaligned data */
789 kfree(entry->data);
790
791 /* remove DMA mapping */
792 dma_unmap_single(fore200e->dev, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
793 DMA_TO_DEVICE);
794
795 vc_map = entry->vc_map;
796
797 /* vcc closed since the time the entry was submitted for tx? */
798 if ((vc_map->vcc == NULL) ||
799 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
800
801 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
802 fore200e->atm_dev->number);
803
804 dev_kfree_skb_any(entry->skb);
805 }
806 else {
807 ASSERT(vc_map->vcc);
808
809 /* vcc closed then immediately re-opened? */
810 if (vc_map->incarn != entry->incarn) {
811
812 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
813 if the same vcc is immediately re-opened, those pending PDUs must
814 not be popped after the completion of their emission, as they refer
815 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
816 would be decremented by the size of the (unrelated) skb, possibly
817 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
818 we thus bind the tx entry to the current incarnation of the vcc
819 when the entry is submitted for tx. When the tx later completes,
820 if the incarnation number of the tx entry does not match the one
821 of the vcc, then this implies that the vcc has been closed then re-opened.
822 we thus just drop the skb here. */
823
824 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
825 fore200e->atm_dev->number);
826
827 dev_kfree_skb_any(entry->skb);
828 }
829 else {
830 vcc = vc_map->vcc;
831 ASSERT(vcc);
832
833 /* notify tx completion */
834 if (vcc->pop) {
835 vcc->pop(vcc, entry->skb);
836 }
837 else {
838 dev_kfree_skb_any(entry->skb);
839 }
840
841 /* check error condition */
842 if (*entry->status & STATUS_ERROR)
843 atomic_inc(&vcc->stats->tx_err);
844 else
845 atomic_inc(&vcc->stats->tx);
846 }
847 }
848
849 *entry->status = STATUS_FREE;
850
851 fore200e->host_txq.txing--;
852
853 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
854 }
855 }
856
857
858 #ifdef FORE200E_BSQ_DEBUG
bsq_audit(int where,struct host_bsq * bsq,int scheme,int magn)859 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
860 {
861 struct buffer* buffer;
862 int count = 0;
863
864 buffer = bsq->freebuf;
865 while (buffer) {
866
867 if (buffer->supplied) {
868 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
869 where, scheme, magn, buffer->index);
870 }
871
872 if (buffer->magn != magn) {
873 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
874 where, scheme, magn, buffer->index, buffer->magn);
875 }
876
877 if (buffer->scheme != scheme) {
878 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
879 where, scheme, magn, buffer->index, buffer->scheme);
880 }
881
882 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
883 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
884 where, scheme, magn, buffer->index);
885 }
886
887 count++;
888 buffer = buffer->next;
889 }
890
891 if (count != bsq->freebuf_count) {
892 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
893 where, scheme, magn, count, bsq->freebuf_count);
894 }
895 return 0;
896 }
897 #endif
898
899
900 static void
fore200e_supply(struct fore200e * fore200e)901 fore200e_supply(struct fore200e* fore200e)
902 {
903 int scheme, magn, i;
904
905 struct host_bsq* bsq;
906 struct host_bsq_entry* entry;
907 struct buffer* buffer;
908
909 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
910 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
911
912 bsq = &fore200e->host_bsq[ scheme ][ magn ];
913
914 #ifdef FORE200E_BSQ_DEBUG
915 bsq_audit(1, bsq, scheme, magn);
916 #endif
917 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
918
919 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
920 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
921
922 entry = &bsq->host_entry[ bsq->head ];
923
924 for (i = 0; i < RBD_BLK_SIZE; i++) {
925
926 /* take the first buffer in the free buffer list */
927 buffer = bsq->freebuf;
928 if (!buffer) {
929 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
930 scheme, magn, bsq->freebuf_count);
931 return;
932 }
933 bsq->freebuf = buffer->next;
934
935 #ifdef FORE200E_BSQ_DEBUG
936 if (buffer->supplied)
937 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
938 scheme, magn, buffer->index);
939 buffer->supplied = 1;
940 #endif
941 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
942 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
943 }
944
945 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
946
947 /* decrease accordingly the number of free rx buffers */
948 bsq->freebuf_count -= RBD_BLK_SIZE;
949
950 *entry->status = STATUS_PENDING;
951 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
952 }
953 }
954 }
955 }
956
957
958 static int
fore200e_push_rpd(struct fore200e * fore200e,struct atm_vcc * vcc,struct rpd * rpd)959 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
960 {
961 struct sk_buff* skb;
962 struct buffer* buffer;
963 struct fore200e_vcc* fore200e_vcc;
964 int i, pdu_len = 0;
965 #ifdef FORE200E_52BYTE_AAL0_SDU
966 u32 cell_header = 0;
967 #endif
968
969 ASSERT(vcc);
970
971 fore200e_vcc = FORE200E_VCC(vcc);
972 ASSERT(fore200e_vcc);
973
974 #ifdef FORE200E_52BYTE_AAL0_SDU
975 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
976
977 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
978 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
979 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
980 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
981 rpd->atm_header.clp;
982 pdu_len = 4;
983 }
984 #endif
985
986 /* compute total PDU length */
987 for (i = 0; i < rpd->nseg; i++)
988 pdu_len += rpd->rsd[ i ].length;
989
990 skb = alloc_skb(pdu_len, GFP_ATOMIC);
991 if (skb == NULL) {
992 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
993
994 atomic_inc(&vcc->stats->rx_drop);
995 return -ENOMEM;
996 }
997
998 __net_timestamp(skb);
999
1000 #ifdef FORE200E_52BYTE_AAL0_SDU
1001 if (cell_header) {
1002 *((u32*)skb_put(skb, 4)) = cell_header;
1003 }
1004 #endif
1005
1006 /* reassemble segments */
1007 for (i = 0; i < rpd->nseg; i++) {
1008
1009 /* rebuild rx buffer address from rsd handle */
1010 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1011
1012 /* Make device DMA transfer visible to CPU. */
1013 dma_sync_single_for_cpu(fore200e->dev, buffer->data.dma_addr,
1014 rpd->rsd[i].length, DMA_FROM_DEVICE);
1015
1016 skb_put_data(skb, buffer->data.align_addr, rpd->rsd[i].length);
1017
1018 /* Now let the device get at it again. */
1019 dma_sync_single_for_device(fore200e->dev, buffer->data.dma_addr,
1020 rpd->rsd[i].length, DMA_FROM_DEVICE);
1021 }
1022
1023 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1024
1025 if (pdu_len < fore200e_vcc->rx_min_pdu)
1026 fore200e_vcc->rx_min_pdu = pdu_len;
1027 if (pdu_len > fore200e_vcc->rx_max_pdu)
1028 fore200e_vcc->rx_max_pdu = pdu_len;
1029 fore200e_vcc->rx_pdu++;
1030
1031 /* push PDU */
1032 if (atm_charge(vcc, skb->truesize) == 0) {
1033
1034 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1035 vcc->itf, vcc->vpi, vcc->vci);
1036
1037 dev_kfree_skb_any(skb);
1038
1039 atomic_inc(&vcc->stats->rx_drop);
1040 return -ENOMEM;
1041 }
1042
1043 vcc->push(vcc, skb);
1044 atomic_inc(&vcc->stats->rx);
1045
1046 return 0;
1047 }
1048
1049
1050 static void
fore200e_collect_rpd(struct fore200e * fore200e,struct rpd * rpd)1051 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1052 {
1053 struct host_bsq* bsq;
1054 struct buffer* buffer;
1055 int i;
1056
1057 for (i = 0; i < rpd->nseg; i++) {
1058
1059 /* rebuild rx buffer address from rsd handle */
1060 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1061
1062 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1063
1064 #ifdef FORE200E_BSQ_DEBUG
1065 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1066
1067 if (buffer->supplied == 0)
1068 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1069 buffer->scheme, buffer->magn, buffer->index);
1070 buffer->supplied = 0;
1071 #endif
1072
1073 /* re-insert the buffer into the free buffer list */
1074 buffer->next = bsq->freebuf;
1075 bsq->freebuf = buffer;
1076
1077 /* then increment the number of free rx buffers */
1078 bsq->freebuf_count++;
1079 }
1080 }
1081
1082
1083 static void
fore200e_rx_irq(struct fore200e * fore200e)1084 fore200e_rx_irq(struct fore200e* fore200e)
1085 {
1086 struct host_rxq* rxq = &fore200e->host_rxq;
1087 struct host_rxq_entry* entry;
1088 struct atm_vcc* vcc;
1089 struct fore200e_vc_map* vc_map;
1090
1091 for (;;) {
1092
1093 entry = &rxq->host_entry[ rxq->head ];
1094
1095 /* no more received PDUs */
1096 if ((*entry->status & STATUS_COMPLETE) == 0)
1097 break;
1098
1099 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1100
1101 if ((vc_map->vcc == NULL) ||
1102 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1103
1104 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1105 fore200e->atm_dev->number,
1106 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1107 }
1108 else {
1109 vcc = vc_map->vcc;
1110 ASSERT(vcc);
1111
1112 if ((*entry->status & STATUS_ERROR) == 0) {
1113
1114 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1115 }
1116 else {
1117 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1118 fore200e->atm_dev->number,
1119 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1120 atomic_inc(&vcc->stats->rx_err);
1121 }
1122 }
1123
1124 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1125
1126 fore200e_collect_rpd(fore200e, entry->rpd);
1127
1128 /* rewrite the rpd address to ack the received PDU */
1129 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1130 *entry->status = STATUS_FREE;
1131
1132 fore200e_supply(fore200e);
1133 }
1134 }
1135
1136
1137 #ifndef FORE200E_USE_TASKLET
1138 static void
fore200e_irq(struct fore200e * fore200e)1139 fore200e_irq(struct fore200e* fore200e)
1140 {
1141 unsigned long flags;
1142
1143 spin_lock_irqsave(&fore200e->q_lock, flags);
1144 fore200e_rx_irq(fore200e);
1145 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1146
1147 spin_lock_irqsave(&fore200e->q_lock, flags);
1148 fore200e_tx_irq(fore200e);
1149 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1150 }
1151 #endif
1152
1153
1154 static irqreturn_t
fore200e_interrupt(int irq,void * dev)1155 fore200e_interrupt(int irq, void* dev)
1156 {
1157 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1158
1159 if (fore200e->bus->irq_check(fore200e) == 0) {
1160
1161 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1162 return IRQ_NONE;
1163 }
1164 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1165
1166 #ifdef FORE200E_USE_TASKLET
1167 tasklet_schedule(&fore200e->tx_tasklet);
1168 tasklet_schedule(&fore200e->rx_tasklet);
1169 #else
1170 fore200e_irq(fore200e);
1171 #endif
1172
1173 fore200e->bus->irq_ack(fore200e);
1174 return IRQ_HANDLED;
1175 }
1176
1177
1178 #ifdef FORE200E_USE_TASKLET
1179 static void
fore200e_tx_tasklet(unsigned long data)1180 fore200e_tx_tasklet(unsigned long data)
1181 {
1182 struct fore200e* fore200e = (struct fore200e*) data;
1183 unsigned long flags;
1184
1185 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1186
1187 spin_lock_irqsave(&fore200e->q_lock, flags);
1188 fore200e_tx_irq(fore200e);
1189 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1190 }
1191
1192
1193 static void
fore200e_rx_tasklet(unsigned long data)1194 fore200e_rx_tasklet(unsigned long data)
1195 {
1196 struct fore200e* fore200e = (struct fore200e*) data;
1197 unsigned long flags;
1198
1199 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1200
1201 spin_lock_irqsave(&fore200e->q_lock, flags);
1202 fore200e_rx_irq((struct fore200e*) data);
1203 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1204 }
1205 #endif
1206
1207
1208 static int
fore200e_select_scheme(struct atm_vcc * vcc)1209 fore200e_select_scheme(struct atm_vcc* vcc)
1210 {
1211 /* fairly balance the VCs over (identical) buffer schemes */
1212 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1213
1214 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1215 vcc->itf, vcc->vpi, vcc->vci, scheme);
1216
1217 return scheme;
1218 }
1219
1220
1221 static int
fore200e_activate_vcin(struct fore200e * fore200e,int activate,struct atm_vcc * vcc,int mtu)1222 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1223 {
1224 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1225 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1226 struct activate_opcode activ_opcode;
1227 struct deactivate_opcode deactiv_opcode;
1228 struct vpvc vpvc;
1229 int ok;
1230 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1231
1232 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1233
1234 if (activate) {
1235 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1236
1237 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1238 activ_opcode.aal = aal;
1239 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1240 activ_opcode.pad = 0;
1241 }
1242 else {
1243 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1244 deactiv_opcode.pad = 0;
1245 }
1246
1247 vpvc.vci = vcc->vci;
1248 vpvc.vpi = vcc->vpi;
1249
1250 *entry->status = STATUS_PENDING;
1251
1252 if (activate) {
1253
1254 #ifdef FORE200E_52BYTE_AAL0_SDU
1255 mtu = 48;
1256 #endif
1257 /* the MTU is not used by the cp, except in the case of AAL0 */
1258 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1259 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1260 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1261 }
1262 else {
1263 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1264 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1265 }
1266
1267 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1268
1269 *entry->status = STATUS_FREE;
1270
1271 if (ok == 0) {
1272 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1273 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1274 return -EIO;
1275 }
1276
1277 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1278 activate ? "open" : "clos");
1279
1280 return 0;
1281 }
1282
1283
1284 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1285
1286 static void
fore200e_rate_ctrl(struct atm_qos * qos,struct tpd_rate * rate)1287 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1288 {
1289 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1290
1291 /* compute the data cells to idle cells ratio from the tx PCR */
1292 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1293 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1294 }
1295 else {
1296 /* disable rate control */
1297 rate->data_cells = rate->idle_cells = 0;
1298 }
1299 }
1300
1301
1302 static int
fore200e_open(struct atm_vcc * vcc)1303 fore200e_open(struct atm_vcc *vcc)
1304 {
1305 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1306 struct fore200e_vcc* fore200e_vcc;
1307 struct fore200e_vc_map* vc_map;
1308 unsigned long flags;
1309 int vci = vcc->vci;
1310 short vpi = vcc->vpi;
1311
1312 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1313 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1314
1315 spin_lock_irqsave(&fore200e->q_lock, flags);
1316
1317 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1318 if (vc_map->vcc) {
1319
1320 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1321
1322 printk(FORE200E "VC %d.%d.%d already in use\n",
1323 fore200e->atm_dev->number, vpi, vci);
1324
1325 return -EINVAL;
1326 }
1327
1328 vc_map->vcc = vcc;
1329
1330 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1331
1332 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1333 if (fore200e_vcc == NULL) {
1334 vc_map->vcc = NULL;
1335 return -ENOMEM;
1336 }
1337
1338 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1339 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1340 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1341 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1342 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1343 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1344 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1345
1346 /* pseudo-CBR bandwidth requested? */
1347 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1348
1349 mutex_lock(&fore200e->rate_mtx);
1350 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1351 mutex_unlock(&fore200e->rate_mtx);
1352
1353 kfree(fore200e_vcc);
1354 vc_map->vcc = NULL;
1355 return -EAGAIN;
1356 }
1357
1358 /* reserve bandwidth */
1359 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1360 mutex_unlock(&fore200e->rate_mtx);
1361 }
1362
1363 vcc->itf = vcc->dev->number;
1364
1365 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1366 set_bit(ATM_VF_ADDR, &vcc->flags);
1367
1368 vcc->dev_data = fore200e_vcc;
1369
1370 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1371
1372 vc_map->vcc = NULL;
1373
1374 clear_bit(ATM_VF_ADDR, &vcc->flags);
1375 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1376
1377 vcc->dev_data = NULL;
1378
1379 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1380
1381 kfree(fore200e_vcc);
1382 return -EINVAL;
1383 }
1384
1385 /* compute rate control parameters */
1386 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1387
1388 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1389 set_bit(ATM_VF_HASQOS, &vcc->flags);
1390
1391 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1392 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1393 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1394 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1395 }
1396
1397 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1398 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1399 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1400
1401 /* new incarnation of the vcc */
1402 vc_map->incarn = ++fore200e->incarn_count;
1403
1404 /* VC unusable before this flag is set */
1405 set_bit(ATM_VF_READY, &vcc->flags);
1406
1407 return 0;
1408 }
1409
1410
1411 static void
fore200e_close(struct atm_vcc * vcc)1412 fore200e_close(struct atm_vcc* vcc)
1413 {
1414 struct fore200e_vcc* fore200e_vcc;
1415 struct fore200e* fore200e;
1416 struct fore200e_vc_map* vc_map;
1417 unsigned long flags;
1418
1419 ASSERT(vcc);
1420 fore200e = FORE200E_DEV(vcc->dev);
1421
1422 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1423 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1424
1425 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1426
1427 clear_bit(ATM_VF_READY, &vcc->flags);
1428
1429 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1430
1431 spin_lock_irqsave(&fore200e->q_lock, flags);
1432
1433 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1434
1435 /* the vc is no longer considered as "in use" by fore200e_open() */
1436 vc_map->vcc = NULL;
1437
1438 vcc->itf = vcc->vci = vcc->vpi = 0;
1439
1440 fore200e_vcc = FORE200E_VCC(vcc);
1441 vcc->dev_data = NULL;
1442
1443 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1444
1445 /* release reserved bandwidth, if any */
1446 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1447
1448 mutex_lock(&fore200e->rate_mtx);
1449 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1450 mutex_unlock(&fore200e->rate_mtx);
1451
1452 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1453 }
1454
1455 clear_bit(ATM_VF_ADDR, &vcc->flags);
1456 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1457
1458 ASSERT(fore200e_vcc);
1459 kfree(fore200e_vcc);
1460 }
1461
1462
1463 static int
fore200e_send(struct atm_vcc * vcc,struct sk_buff * skb)1464 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1465 {
1466 struct fore200e* fore200e;
1467 struct fore200e_vcc* fore200e_vcc;
1468 struct fore200e_vc_map* vc_map;
1469 struct host_txq* txq;
1470 struct host_txq_entry* entry;
1471 struct tpd* tpd;
1472 struct tpd_haddr tpd_haddr;
1473 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1474 int tx_copy = 0;
1475 int tx_len = skb->len;
1476 u32* cell_header = NULL;
1477 unsigned char* skb_data;
1478 int skb_len;
1479 unsigned char* data;
1480 unsigned long flags;
1481
1482 if (!vcc)
1483 return -EINVAL;
1484
1485 fore200e = FORE200E_DEV(vcc->dev);
1486 fore200e_vcc = FORE200E_VCC(vcc);
1487
1488 if (!fore200e)
1489 return -EINVAL;
1490
1491 txq = &fore200e->host_txq;
1492 if (!fore200e_vcc)
1493 return -EINVAL;
1494
1495 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1496 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1497 dev_kfree_skb_any(skb);
1498 return -EINVAL;
1499 }
1500
1501 #ifdef FORE200E_52BYTE_AAL0_SDU
1502 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1503 cell_header = (u32*) skb->data;
1504 skb_data = skb->data + 4; /* skip 4-byte cell header */
1505 skb_len = tx_len = skb->len - 4;
1506
1507 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1508 }
1509 else
1510 #endif
1511 {
1512 skb_data = skb->data;
1513 skb_len = skb->len;
1514 }
1515
1516 if (((unsigned long)skb_data) & 0x3) {
1517
1518 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1519 tx_copy = 1;
1520 tx_len = skb_len;
1521 }
1522
1523 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1524
1525 /* this simply NUKES the PCA board */
1526 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1527 tx_copy = 1;
1528 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1529 }
1530
1531 if (tx_copy) {
1532 data = kmalloc(tx_len, GFP_ATOMIC);
1533 if (data == NULL) {
1534 if (vcc->pop) {
1535 vcc->pop(vcc, skb);
1536 }
1537 else {
1538 dev_kfree_skb_any(skb);
1539 }
1540 return -ENOMEM;
1541 }
1542
1543 memcpy(data, skb_data, skb_len);
1544 if (skb_len < tx_len)
1545 memset(data + skb_len, 0x00, tx_len - skb_len);
1546 }
1547 else {
1548 data = skb_data;
1549 }
1550
1551 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1552 ASSERT(vc_map->vcc == vcc);
1553
1554 retry_here:
1555
1556 spin_lock_irqsave(&fore200e->q_lock, flags);
1557
1558 entry = &txq->host_entry[ txq->head ];
1559
1560 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1561
1562 /* try to free completed tx queue entries */
1563 fore200e_tx_irq(fore200e);
1564
1565 if (*entry->status != STATUS_FREE) {
1566
1567 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1568
1569 /* retry once again? */
1570 if (--retry > 0) {
1571 udelay(50);
1572 goto retry_here;
1573 }
1574
1575 atomic_inc(&vcc->stats->tx_err);
1576
1577 fore200e->tx_sat++;
1578 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1579 fore200e->name, fore200e->cp_queues->heartbeat);
1580 if (vcc->pop) {
1581 vcc->pop(vcc, skb);
1582 }
1583 else {
1584 dev_kfree_skb_any(skb);
1585 }
1586
1587 if (tx_copy)
1588 kfree(data);
1589
1590 return -ENOBUFS;
1591 }
1592 }
1593
1594 entry->incarn = vc_map->incarn;
1595 entry->vc_map = vc_map;
1596 entry->skb = skb;
1597 entry->data = tx_copy ? data : NULL;
1598
1599 tpd = entry->tpd;
1600 tpd->tsd[ 0 ].buffer = dma_map_single(fore200e->dev, data, tx_len,
1601 DMA_TO_DEVICE);
1602 if (dma_mapping_error(fore200e->dev, tpd->tsd[0].buffer)) {
1603 if (tx_copy)
1604 kfree(data);
1605 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1606 return -ENOMEM;
1607 }
1608 tpd->tsd[ 0 ].length = tx_len;
1609
1610 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1611 txq->txing++;
1612
1613 /* The dma_map call above implies a dma_sync so the device can use it,
1614 * thus no explicit dma_sync call is necessary here.
1615 */
1616
1617 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1618 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1619 tpd->tsd[0].length, skb_len);
1620
1621 if (skb_len < fore200e_vcc->tx_min_pdu)
1622 fore200e_vcc->tx_min_pdu = skb_len;
1623 if (skb_len > fore200e_vcc->tx_max_pdu)
1624 fore200e_vcc->tx_max_pdu = skb_len;
1625 fore200e_vcc->tx_pdu++;
1626
1627 /* set tx rate control information */
1628 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1629 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1630
1631 if (cell_header) {
1632 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1633 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1634 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1635 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1636 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1637 }
1638 else {
1639 /* set the ATM header, common to all cells conveying the PDU */
1640 tpd->atm_header.clp = 0;
1641 tpd->atm_header.plt = 0;
1642 tpd->atm_header.vci = vcc->vci;
1643 tpd->atm_header.vpi = vcc->vpi;
1644 tpd->atm_header.gfc = 0;
1645 }
1646
1647 tpd->spec.length = tx_len;
1648 tpd->spec.nseg = 1;
1649 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1650 tpd->spec.intr = 1;
1651
1652 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1653 tpd_haddr.pad = 0;
1654 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1655
1656 *entry->status = STATUS_PENDING;
1657 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1658
1659 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1660
1661 return 0;
1662 }
1663
1664
1665 static int
fore200e_getstats(struct fore200e * fore200e)1666 fore200e_getstats(struct fore200e* fore200e)
1667 {
1668 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1669 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1670 struct stats_opcode opcode;
1671 int ok;
1672 u32 stats_dma_addr;
1673
1674 if (fore200e->stats == NULL) {
1675 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL);
1676 if (fore200e->stats == NULL)
1677 return -ENOMEM;
1678 }
1679
1680 stats_dma_addr = dma_map_single(fore200e->dev, fore200e->stats,
1681 sizeof(struct stats), DMA_FROM_DEVICE);
1682 if (dma_mapping_error(fore200e->dev, stats_dma_addr))
1683 return -ENOMEM;
1684
1685 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1686
1687 opcode.opcode = OPCODE_GET_STATS;
1688 opcode.pad = 0;
1689
1690 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1691
1692 *entry->status = STATUS_PENDING;
1693
1694 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1695
1696 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1697
1698 *entry->status = STATUS_FREE;
1699
1700 dma_unmap_single(fore200e->dev, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1701
1702 if (ok == 0) {
1703 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1704 return -EIO;
1705 }
1706
1707 return 0;
1708 }
1709
1710 #if 0 /* currently unused */
1711 static int
1712 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1713 {
1714 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1715 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1716 struct oc3_opcode opcode;
1717 int ok;
1718 u32 oc3_regs_dma_addr;
1719
1720 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1721
1722 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1723
1724 opcode.opcode = OPCODE_GET_OC3;
1725 opcode.reg = 0;
1726 opcode.value = 0;
1727 opcode.mask = 0;
1728
1729 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1730
1731 *entry->status = STATUS_PENDING;
1732
1733 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1734
1735 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1736
1737 *entry->status = STATUS_FREE;
1738
1739 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1740
1741 if (ok == 0) {
1742 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1743 return -EIO;
1744 }
1745
1746 return 0;
1747 }
1748 #endif
1749
1750
1751 static int
fore200e_set_oc3(struct fore200e * fore200e,u32 reg,u32 value,u32 mask)1752 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1753 {
1754 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1755 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1756 struct oc3_opcode opcode;
1757 int ok;
1758
1759 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1760
1761 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1762
1763 opcode.opcode = OPCODE_SET_OC3;
1764 opcode.reg = reg;
1765 opcode.value = value;
1766 opcode.mask = mask;
1767
1768 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1769
1770 *entry->status = STATUS_PENDING;
1771
1772 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1773
1774 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1775
1776 *entry->status = STATUS_FREE;
1777
1778 if (ok == 0) {
1779 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1780 return -EIO;
1781 }
1782
1783 return 0;
1784 }
1785
1786
1787 static int
fore200e_setloop(struct fore200e * fore200e,int loop_mode)1788 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1789 {
1790 u32 mct_value, mct_mask;
1791 int error;
1792
1793 if (!capable(CAP_NET_ADMIN))
1794 return -EPERM;
1795
1796 switch (loop_mode) {
1797
1798 case ATM_LM_NONE:
1799 mct_value = 0;
1800 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1801 break;
1802
1803 case ATM_LM_LOC_PHY:
1804 mct_value = mct_mask = SUNI_MCT_DLE;
1805 break;
1806
1807 case ATM_LM_RMT_PHY:
1808 mct_value = mct_mask = SUNI_MCT_LLE;
1809 break;
1810
1811 default:
1812 return -EINVAL;
1813 }
1814
1815 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1816 if (error == 0)
1817 fore200e->loop_mode = loop_mode;
1818
1819 return error;
1820 }
1821
1822
1823 static int
fore200e_fetch_stats(struct fore200e * fore200e,struct sonet_stats __user * arg)1824 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1825 {
1826 struct sonet_stats tmp;
1827
1828 if (fore200e_getstats(fore200e) < 0)
1829 return -EIO;
1830
1831 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1832 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1833 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1834 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1835 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1836 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1837 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1838 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1839 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1840 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1841 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1842 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1843 be32_to_cpu(fore200e->stats->aal5.cells_received);
1844
1845 if (arg)
1846 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1847
1848 return 0;
1849 }
1850
1851
1852 static int
fore200e_ioctl(struct atm_dev * dev,unsigned int cmd,void __user * arg)1853 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1854 {
1855 struct fore200e* fore200e = FORE200E_DEV(dev);
1856
1857 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1858
1859 switch (cmd) {
1860
1861 case SONET_GETSTAT:
1862 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1863
1864 case SONET_GETDIAG:
1865 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1866
1867 case ATM_SETLOOP:
1868 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1869
1870 case ATM_GETLOOP:
1871 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1872
1873 case ATM_QUERYLOOP:
1874 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1875 }
1876
1877 return -ENOSYS; /* not implemented */
1878 }
1879
1880
1881 static int
fore200e_change_qos(struct atm_vcc * vcc,struct atm_qos * qos,int flags)1882 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1883 {
1884 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1885 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1886
1887 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1888 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1889 return -EINVAL;
1890 }
1891
1892 DPRINTK(2, "change_qos %d.%d.%d, "
1893 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1894 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1895 "available_cell_rate = %u",
1896 vcc->itf, vcc->vpi, vcc->vci,
1897 fore200e_traffic_class[ qos->txtp.traffic_class ],
1898 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1899 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1900 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
1901 flags, fore200e->available_cell_rate);
1902
1903 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
1904
1905 mutex_lock(&fore200e->rate_mtx);
1906 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
1907 mutex_unlock(&fore200e->rate_mtx);
1908 return -EAGAIN;
1909 }
1910
1911 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1912 fore200e->available_cell_rate -= qos->txtp.max_pcr;
1913
1914 mutex_unlock(&fore200e->rate_mtx);
1915
1916 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
1917
1918 /* update rate control parameters */
1919 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
1920
1921 set_bit(ATM_VF_HASQOS, &vcc->flags);
1922
1923 return 0;
1924 }
1925
1926 return -EINVAL;
1927 }
1928
1929
fore200e_irq_request(struct fore200e * fore200e)1930 static int fore200e_irq_request(struct fore200e *fore200e)
1931 {
1932 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
1933
1934 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
1935 fore200e_irq_itoa(fore200e->irq), fore200e->name);
1936 return -EBUSY;
1937 }
1938
1939 printk(FORE200E "IRQ %s reserved for device %s\n",
1940 fore200e_irq_itoa(fore200e->irq), fore200e->name);
1941
1942 #ifdef FORE200E_USE_TASKLET
1943 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
1944 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
1945 #endif
1946
1947 fore200e->state = FORE200E_STATE_IRQ;
1948 return 0;
1949 }
1950
1951
fore200e_get_esi(struct fore200e * fore200e)1952 static int fore200e_get_esi(struct fore200e *fore200e)
1953 {
1954 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL);
1955 int ok, i;
1956
1957 if (!prom)
1958 return -ENOMEM;
1959
1960 ok = fore200e->bus->prom_read(fore200e, prom);
1961 if (ok < 0) {
1962 kfree(prom);
1963 return -EBUSY;
1964 }
1965
1966 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
1967 fore200e->name,
1968 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
1969 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
1970
1971 for (i = 0; i < ESI_LEN; i++) {
1972 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
1973 }
1974
1975 kfree(prom);
1976
1977 return 0;
1978 }
1979
1980
fore200e_alloc_rx_buf(struct fore200e * fore200e)1981 static int fore200e_alloc_rx_buf(struct fore200e *fore200e)
1982 {
1983 int scheme, magn, nbr, size, i;
1984
1985 struct host_bsq* bsq;
1986 struct buffer* buffer;
1987
1988 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1989 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1990
1991 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1992
1993 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
1994 size = fore200e_rx_buf_size[ scheme ][ magn ];
1995
1996 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
1997
1998 /* allocate the array of receive buffers */
1999 buffer = bsq->buffer = kcalloc(nbr, sizeof(struct buffer),
2000 GFP_KERNEL);
2001
2002 if (buffer == NULL)
2003 return -ENOMEM;
2004
2005 bsq->freebuf = NULL;
2006
2007 for (i = 0; i < nbr; i++) {
2008
2009 buffer[ i ].scheme = scheme;
2010 buffer[ i ].magn = magn;
2011 #ifdef FORE200E_BSQ_DEBUG
2012 buffer[ i ].index = i;
2013 buffer[ i ].supplied = 0;
2014 #endif
2015
2016 /* allocate the receive buffer body */
2017 if (fore200e_chunk_alloc(fore200e,
2018 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2019 DMA_FROM_DEVICE) < 0) {
2020
2021 while (i > 0)
2022 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2023 kfree(buffer);
2024
2025 return -ENOMEM;
2026 }
2027
2028 /* insert the buffer into the free buffer list */
2029 buffer[ i ].next = bsq->freebuf;
2030 bsq->freebuf = &buffer[ i ];
2031 }
2032 /* all the buffers are free, initially */
2033 bsq->freebuf_count = nbr;
2034
2035 #ifdef FORE200E_BSQ_DEBUG
2036 bsq_audit(3, bsq, scheme, magn);
2037 #endif
2038 }
2039 }
2040
2041 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2042 return 0;
2043 }
2044
2045
fore200e_init_bs_queue(struct fore200e * fore200e)2046 static int fore200e_init_bs_queue(struct fore200e *fore200e)
2047 {
2048 int scheme, magn, i;
2049
2050 struct host_bsq* bsq;
2051 struct cp_bsq_entry __iomem * cp_entry;
2052
2053 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2054 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2055
2056 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2057
2058 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2059
2060 /* allocate and align the array of status words */
2061 if (fore200e_dma_chunk_alloc(fore200e,
2062 &bsq->status,
2063 sizeof(enum status),
2064 QUEUE_SIZE_BS,
2065 fore200e->bus->status_alignment) < 0) {
2066 return -ENOMEM;
2067 }
2068
2069 /* allocate and align the array of receive buffer descriptors */
2070 if (fore200e_dma_chunk_alloc(fore200e,
2071 &bsq->rbd_block,
2072 sizeof(struct rbd_block),
2073 QUEUE_SIZE_BS,
2074 fore200e->bus->descr_alignment) < 0) {
2075
2076 fore200e_dma_chunk_free(fore200e, &bsq->status);
2077 return -ENOMEM;
2078 }
2079
2080 /* get the base address of the cp resident buffer supply queue entries */
2081 cp_entry = fore200e->virt_base +
2082 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2083
2084 /* fill the host resident and cp resident buffer supply queue entries */
2085 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2086
2087 bsq->host_entry[ i ].status =
2088 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2089 bsq->host_entry[ i ].rbd_block =
2090 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2091 bsq->host_entry[ i ].rbd_block_dma =
2092 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2093 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2094
2095 *bsq->host_entry[ i ].status = STATUS_FREE;
2096
2097 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2098 &cp_entry[ i ].status_haddr);
2099 }
2100 }
2101 }
2102
2103 fore200e->state = FORE200E_STATE_INIT_BSQ;
2104 return 0;
2105 }
2106
2107
fore200e_init_rx_queue(struct fore200e * fore200e)2108 static int fore200e_init_rx_queue(struct fore200e *fore200e)
2109 {
2110 struct host_rxq* rxq = &fore200e->host_rxq;
2111 struct cp_rxq_entry __iomem * cp_entry;
2112 int i;
2113
2114 DPRINTK(2, "receive queue is being initialized\n");
2115
2116 /* allocate and align the array of status words */
2117 if (fore200e_dma_chunk_alloc(fore200e,
2118 &rxq->status,
2119 sizeof(enum status),
2120 QUEUE_SIZE_RX,
2121 fore200e->bus->status_alignment) < 0) {
2122 return -ENOMEM;
2123 }
2124
2125 /* allocate and align the array of receive PDU descriptors */
2126 if (fore200e_dma_chunk_alloc(fore200e,
2127 &rxq->rpd,
2128 sizeof(struct rpd),
2129 QUEUE_SIZE_RX,
2130 fore200e->bus->descr_alignment) < 0) {
2131
2132 fore200e_dma_chunk_free(fore200e, &rxq->status);
2133 return -ENOMEM;
2134 }
2135
2136 /* get the base address of the cp resident rx queue entries */
2137 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2138
2139 /* fill the host resident and cp resident rx entries */
2140 for (i=0; i < QUEUE_SIZE_RX; i++) {
2141
2142 rxq->host_entry[ i ].status =
2143 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2144 rxq->host_entry[ i ].rpd =
2145 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2146 rxq->host_entry[ i ].rpd_dma =
2147 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2148 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2149
2150 *rxq->host_entry[ i ].status = STATUS_FREE;
2151
2152 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2153 &cp_entry[ i ].status_haddr);
2154
2155 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2156 &cp_entry[ i ].rpd_haddr);
2157 }
2158
2159 /* set the head entry of the queue */
2160 rxq->head = 0;
2161
2162 fore200e->state = FORE200E_STATE_INIT_RXQ;
2163 return 0;
2164 }
2165
2166
fore200e_init_tx_queue(struct fore200e * fore200e)2167 static int fore200e_init_tx_queue(struct fore200e *fore200e)
2168 {
2169 struct host_txq* txq = &fore200e->host_txq;
2170 struct cp_txq_entry __iomem * cp_entry;
2171 int i;
2172
2173 DPRINTK(2, "transmit queue is being initialized\n");
2174
2175 /* allocate and align the array of status words */
2176 if (fore200e_dma_chunk_alloc(fore200e,
2177 &txq->status,
2178 sizeof(enum status),
2179 QUEUE_SIZE_TX,
2180 fore200e->bus->status_alignment) < 0) {
2181 return -ENOMEM;
2182 }
2183
2184 /* allocate and align the array of transmit PDU descriptors */
2185 if (fore200e_dma_chunk_alloc(fore200e,
2186 &txq->tpd,
2187 sizeof(struct tpd),
2188 QUEUE_SIZE_TX,
2189 fore200e->bus->descr_alignment) < 0) {
2190
2191 fore200e_dma_chunk_free(fore200e, &txq->status);
2192 return -ENOMEM;
2193 }
2194
2195 /* get the base address of the cp resident tx queue entries */
2196 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2197
2198 /* fill the host resident and cp resident tx entries */
2199 for (i=0; i < QUEUE_SIZE_TX; i++) {
2200
2201 txq->host_entry[ i ].status =
2202 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2203 txq->host_entry[ i ].tpd =
2204 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2205 txq->host_entry[ i ].tpd_dma =
2206 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2207 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2208
2209 *txq->host_entry[ i ].status = STATUS_FREE;
2210
2211 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2212 &cp_entry[ i ].status_haddr);
2213
2214 /* although there is a one-to-one mapping of tx queue entries and tpds,
2215 we do not write here the DMA (physical) base address of each tpd into
2216 the related cp resident entry, because the cp relies on this write
2217 operation to detect that a new pdu has been submitted for tx */
2218 }
2219
2220 /* set the head and tail entries of the queue */
2221 txq->head = 0;
2222 txq->tail = 0;
2223
2224 fore200e->state = FORE200E_STATE_INIT_TXQ;
2225 return 0;
2226 }
2227
2228
fore200e_init_cmd_queue(struct fore200e * fore200e)2229 static int fore200e_init_cmd_queue(struct fore200e *fore200e)
2230 {
2231 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2232 struct cp_cmdq_entry __iomem * cp_entry;
2233 int i;
2234
2235 DPRINTK(2, "command queue is being initialized\n");
2236
2237 /* allocate and align the array of status words */
2238 if (fore200e_dma_chunk_alloc(fore200e,
2239 &cmdq->status,
2240 sizeof(enum status),
2241 QUEUE_SIZE_CMD,
2242 fore200e->bus->status_alignment) < 0) {
2243 return -ENOMEM;
2244 }
2245
2246 /* get the base address of the cp resident cmd queue entries */
2247 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2248
2249 /* fill the host resident and cp resident cmd entries */
2250 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2251
2252 cmdq->host_entry[ i ].status =
2253 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2254 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2255
2256 *cmdq->host_entry[ i ].status = STATUS_FREE;
2257
2258 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2259 &cp_entry[ i ].status_haddr);
2260 }
2261
2262 /* set the head entry of the queue */
2263 cmdq->head = 0;
2264
2265 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2266 return 0;
2267 }
2268
2269
fore200e_param_bs_queue(struct fore200e * fore200e,enum buffer_scheme scheme,enum buffer_magn magn,int queue_length,int pool_size,int supply_blksize)2270 static void fore200e_param_bs_queue(struct fore200e *fore200e,
2271 enum buffer_scheme scheme,
2272 enum buffer_magn magn, int queue_length,
2273 int pool_size, int supply_blksize)
2274 {
2275 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2276
2277 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2278 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2279 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2280 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2281 }
2282
2283
fore200e_initialize(struct fore200e * fore200e)2284 static int fore200e_initialize(struct fore200e *fore200e)
2285 {
2286 struct cp_queues __iomem * cpq;
2287 int ok, scheme, magn;
2288
2289 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2290
2291 mutex_init(&fore200e->rate_mtx);
2292 spin_lock_init(&fore200e->q_lock);
2293
2294 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2295
2296 /* enable cp to host interrupts */
2297 fore200e->bus->write(1, &cpq->imask);
2298
2299 if (fore200e->bus->irq_enable)
2300 fore200e->bus->irq_enable(fore200e);
2301
2302 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2303
2304 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2305 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2306 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2307
2308 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2309 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2310
2311 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2312 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2313 fore200e_param_bs_queue(fore200e, scheme, magn,
2314 QUEUE_SIZE_BS,
2315 fore200e_rx_buf_nbr[ scheme ][ magn ],
2316 RBD_BLK_SIZE);
2317
2318 /* issue the initialize command */
2319 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2320 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2321
2322 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2323 if (ok == 0) {
2324 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2325 return -ENODEV;
2326 }
2327
2328 printk(FORE200E "device %s initialized\n", fore200e->name);
2329
2330 fore200e->state = FORE200E_STATE_INITIALIZE;
2331 return 0;
2332 }
2333
2334
fore200e_monitor_putc(struct fore200e * fore200e,char c)2335 static void fore200e_monitor_putc(struct fore200e *fore200e, char c)
2336 {
2337 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2338
2339 #if 0
2340 printk("%c", c);
2341 #endif
2342 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2343 }
2344
2345
fore200e_monitor_getc(struct fore200e * fore200e)2346 static int fore200e_monitor_getc(struct fore200e *fore200e)
2347 {
2348 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2349 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2350 int c;
2351
2352 while (time_before(jiffies, timeout)) {
2353
2354 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2355
2356 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2357
2358 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2359 #if 0
2360 printk("%c", c & 0xFF);
2361 #endif
2362 return c & 0xFF;
2363 }
2364 }
2365
2366 return -1;
2367 }
2368
2369
fore200e_monitor_puts(struct fore200e * fore200e,char * str)2370 static void fore200e_monitor_puts(struct fore200e *fore200e, char *str)
2371 {
2372 while (*str) {
2373
2374 /* the i960 monitor doesn't accept any new character if it has something to say */
2375 while (fore200e_monitor_getc(fore200e) >= 0);
2376
2377 fore200e_monitor_putc(fore200e, *str++);
2378 }
2379
2380 while (fore200e_monitor_getc(fore200e) >= 0);
2381 }
2382
2383 #ifdef __LITTLE_ENDIAN
2384 #define FW_EXT ".bin"
2385 #else
2386 #define FW_EXT "_ecd.bin2"
2387 #endif
2388
fore200e_load_and_start_fw(struct fore200e * fore200e)2389 static int fore200e_load_and_start_fw(struct fore200e *fore200e)
2390 {
2391 const struct firmware *firmware;
2392 const struct fw_header *fw_header;
2393 const __le32 *fw_data;
2394 u32 fw_size;
2395 u32 __iomem *load_addr;
2396 char buf[48];
2397 int err;
2398
2399 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2400 if ((err = request_firmware(&firmware, buf, fore200e->dev)) < 0) {
2401 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2402 return err;
2403 }
2404
2405 fw_data = (const __le32 *)firmware->data;
2406 fw_size = firmware->size / sizeof(u32);
2407 fw_header = (const struct fw_header *)firmware->data;
2408 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2409
2410 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2411 fore200e->name, load_addr, fw_size);
2412
2413 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2414 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2415 goto release;
2416 }
2417
2418 for (; fw_size--; fw_data++, load_addr++)
2419 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2420
2421 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2422
2423 #if defined(__sparc_v9__)
2424 /* reported to be required by SBA cards on some sparc64 hosts */
2425 fore200e_spin(100);
2426 #endif
2427
2428 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2429 fore200e_monitor_puts(fore200e, buf);
2430
2431 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2432 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2433 goto release;
2434 }
2435
2436 printk(FORE200E "device %s firmware started\n", fore200e->name);
2437
2438 fore200e->state = FORE200E_STATE_START_FW;
2439 err = 0;
2440
2441 release:
2442 release_firmware(firmware);
2443 return err;
2444 }
2445
2446
fore200e_register(struct fore200e * fore200e,struct device * parent)2447 static int fore200e_register(struct fore200e *fore200e, struct device *parent)
2448 {
2449 struct atm_dev* atm_dev;
2450
2451 DPRINTK(2, "device %s being registered\n", fore200e->name);
2452
2453 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops,
2454 -1, NULL);
2455 if (atm_dev == NULL) {
2456 printk(FORE200E "unable to register device %s\n", fore200e->name);
2457 return -ENODEV;
2458 }
2459
2460 atm_dev->dev_data = fore200e;
2461 fore200e->atm_dev = atm_dev;
2462
2463 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2464 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2465
2466 fore200e->available_cell_rate = ATM_OC3_PCR;
2467
2468 fore200e->state = FORE200E_STATE_REGISTER;
2469 return 0;
2470 }
2471
2472
fore200e_init(struct fore200e * fore200e,struct device * parent)2473 static int fore200e_init(struct fore200e *fore200e, struct device *parent)
2474 {
2475 if (fore200e_register(fore200e, parent) < 0)
2476 return -ENODEV;
2477
2478 if (fore200e->bus->configure(fore200e) < 0)
2479 return -ENODEV;
2480
2481 if (fore200e->bus->map(fore200e) < 0)
2482 return -ENODEV;
2483
2484 if (fore200e_reset(fore200e, 1) < 0)
2485 return -ENODEV;
2486
2487 if (fore200e_load_and_start_fw(fore200e) < 0)
2488 return -ENODEV;
2489
2490 if (fore200e_initialize(fore200e) < 0)
2491 return -ENODEV;
2492
2493 if (fore200e_init_cmd_queue(fore200e) < 0)
2494 return -ENOMEM;
2495
2496 if (fore200e_init_tx_queue(fore200e) < 0)
2497 return -ENOMEM;
2498
2499 if (fore200e_init_rx_queue(fore200e) < 0)
2500 return -ENOMEM;
2501
2502 if (fore200e_init_bs_queue(fore200e) < 0)
2503 return -ENOMEM;
2504
2505 if (fore200e_alloc_rx_buf(fore200e) < 0)
2506 return -ENOMEM;
2507
2508 if (fore200e_get_esi(fore200e) < 0)
2509 return -EIO;
2510
2511 if (fore200e_irq_request(fore200e) < 0)
2512 return -EBUSY;
2513
2514 fore200e_supply(fore200e);
2515
2516 /* all done, board initialization is now complete */
2517 fore200e->state = FORE200E_STATE_COMPLETE;
2518 return 0;
2519 }
2520
2521 #ifdef CONFIG_SBUS
2522 static const struct of_device_id fore200e_sba_match[];
fore200e_sba_probe(struct platform_device * op)2523 static int fore200e_sba_probe(struct platform_device *op)
2524 {
2525 const struct of_device_id *match;
2526 struct fore200e *fore200e;
2527 static int index = 0;
2528 int err;
2529
2530 match = of_match_device(fore200e_sba_match, &op->dev);
2531 if (!match)
2532 return -EINVAL;
2533
2534 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2535 if (!fore200e)
2536 return -ENOMEM;
2537
2538 fore200e->bus = &fore200e_sbus_ops;
2539 fore200e->dev = &op->dev;
2540 fore200e->irq = op->archdata.irqs[0];
2541 fore200e->phys_base = op->resource[0].start;
2542
2543 sprintf(fore200e->name, "SBA-200E-%d", index);
2544
2545 err = fore200e_init(fore200e, &op->dev);
2546 if (err < 0) {
2547 fore200e_shutdown(fore200e);
2548 kfree(fore200e);
2549 return err;
2550 }
2551
2552 index++;
2553 dev_set_drvdata(&op->dev, fore200e);
2554
2555 return 0;
2556 }
2557
fore200e_sba_remove(struct platform_device * op)2558 static int fore200e_sba_remove(struct platform_device *op)
2559 {
2560 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2561
2562 fore200e_shutdown(fore200e);
2563 kfree(fore200e);
2564
2565 return 0;
2566 }
2567
2568 static const struct of_device_id fore200e_sba_match[] = {
2569 {
2570 .name = SBA200E_PROM_NAME,
2571 },
2572 {},
2573 };
2574 MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2575
2576 static struct platform_driver fore200e_sba_driver = {
2577 .driver = {
2578 .name = "fore_200e",
2579 .of_match_table = fore200e_sba_match,
2580 },
2581 .probe = fore200e_sba_probe,
2582 .remove = fore200e_sba_remove,
2583 };
2584 #endif
2585
2586 #ifdef CONFIG_PCI
fore200e_pca_detect(struct pci_dev * pci_dev,const struct pci_device_id * pci_ent)2587 static int fore200e_pca_detect(struct pci_dev *pci_dev,
2588 const struct pci_device_id *pci_ent)
2589 {
2590 struct fore200e* fore200e;
2591 int err = 0;
2592 static int index = 0;
2593
2594 if (pci_enable_device(pci_dev)) {
2595 err = -EINVAL;
2596 goto out;
2597 }
2598
2599 if (dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32))) {
2600 err = -EINVAL;
2601 goto out;
2602 }
2603
2604 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2605 if (fore200e == NULL) {
2606 err = -ENOMEM;
2607 goto out_disable;
2608 }
2609
2610 fore200e->bus = &fore200e_pci_ops;
2611 fore200e->dev = &pci_dev->dev;
2612 fore200e->irq = pci_dev->irq;
2613 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2614
2615 sprintf(fore200e->name, "PCA-200E-%d", index - 1);
2616
2617 pci_set_master(pci_dev);
2618
2619 printk(FORE200E "device PCA-200E found at 0x%lx, IRQ %s\n",
2620 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2621
2622 sprintf(fore200e->name, "PCA-200E-%d", index);
2623
2624 err = fore200e_init(fore200e, &pci_dev->dev);
2625 if (err < 0) {
2626 fore200e_shutdown(fore200e);
2627 goto out_free;
2628 }
2629
2630 ++index;
2631 pci_set_drvdata(pci_dev, fore200e);
2632
2633 out:
2634 return err;
2635
2636 out_free:
2637 kfree(fore200e);
2638 out_disable:
2639 pci_disable_device(pci_dev);
2640 goto out;
2641 }
2642
2643
fore200e_pca_remove_one(struct pci_dev * pci_dev)2644 static void fore200e_pca_remove_one(struct pci_dev *pci_dev)
2645 {
2646 struct fore200e *fore200e;
2647
2648 fore200e = pci_get_drvdata(pci_dev);
2649
2650 fore200e_shutdown(fore200e);
2651 kfree(fore200e);
2652 pci_disable_device(pci_dev);
2653 }
2654
2655
2656 static const struct pci_device_id fore200e_pca_tbl[] = {
2657 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID },
2658 { 0, }
2659 };
2660
2661 MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2662
2663 static struct pci_driver fore200e_pca_driver = {
2664 .name = "fore_200e",
2665 .probe = fore200e_pca_detect,
2666 .remove = fore200e_pca_remove_one,
2667 .id_table = fore200e_pca_tbl,
2668 };
2669 #endif
2670
fore200e_module_init(void)2671 static int __init fore200e_module_init(void)
2672 {
2673 int err = 0;
2674
2675 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2676
2677 #ifdef CONFIG_SBUS
2678 err = platform_driver_register(&fore200e_sba_driver);
2679 if (err)
2680 return err;
2681 #endif
2682
2683 #ifdef CONFIG_PCI
2684 err = pci_register_driver(&fore200e_pca_driver);
2685 #endif
2686
2687 #ifdef CONFIG_SBUS
2688 if (err)
2689 platform_driver_unregister(&fore200e_sba_driver);
2690 #endif
2691
2692 return err;
2693 }
2694
fore200e_module_cleanup(void)2695 static void __exit fore200e_module_cleanup(void)
2696 {
2697 #ifdef CONFIG_PCI
2698 pci_unregister_driver(&fore200e_pca_driver);
2699 #endif
2700 #ifdef CONFIG_SBUS
2701 platform_driver_unregister(&fore200e_sba_driver);
2702 #endif
2703 }
2704
2705 static int
fore200e_proc_read(struct atm_dev * dev,loff_t * pos,char * page)2706 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2707 {
2708 struct fore200e* fore200e = FORE200E_DEV(dev);
2709 struct fore200e_vcc* fore200e_vcc;
2710 struct atm_vcc* vcc;
2711 int i, len, left = *pos;
2712 unsigned long flags;
2713
2714 if (!left--) {
2715
2716 if (fore200e_getstats(fore200e) < 0)
2717 return -EIO;
2718
2719 len = sprintf(page,"\n"
2720 " device:\n"
2721 " internal name:\t\t%s\n", fore200e->name);
2722
2723 /* print bus-specific information */
2724 if (fore200e->bus->proc_read)
2725 len += fore200e->bus->proc_read(fore200e, page + len);
2726
2727 len += sprintf(page + len,
2728 " interrupt line:\t\t%s\n"
2729 " physical base address:\t0x%p\n"
2730 " virtual base address:\t0x%p\n"
2731 " factory address (ESI):\t%pM\n"
2732 " board serial number:\t\t%d\n\n",
2733 fore200e_irq_itoa(fore200e->irq),
2734 (void*)fore200e->phys_base,
2735 fore200e->virt_base,
2736 fore200e->esi,
2737 fore200e->esi[4] * 256 + fore200e->esi[5]);
2738
2739 return len;
2740 }
2741
2742 if (!left--)
2743 return sprintf(page,
2744 " free small bufs, scheme 1:\t%d\n"
2745 " free large bufs, scheme 1:\t%d\n"
2746 " free small bufs, scheme 2:\t%d\n"
2747 " free large bufs, scheme 2:\t%d\n",
2748 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2749 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2750 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2751 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2752
2753 if (!left--) {
2754 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2755
2756 len = sprintf(page,"\n\n"
2757 " cell processor:\n"
2758 " heartbeat state:\t\t");
2759
2760 if (hb >> 16 != 0xDEAD)
2761 len += sprintf(page + len, "0x%08x\n", hb);
2762 else
2763 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2764
2765 return len;
2766 }
2767
2768 if (!left--) {
2769 static const char* media_name[] = {
2770 "unshielded twisted pair",
2771 "multimode optical fiber ST",
2772 "multimode optical fiber SC",
2773 "single-mode optical fiber ST",
2774 "single-mode optical fiber SC",
2775 "unknown"
2776 };
2777
2778 static const char* oc3_mode[] = {
2779 "normal operation",
2780 "diagnostic loopback",
2781 "line loopback",
2782 "unknown"
2783 };
2784
2785 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2786 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2787 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2788 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2789 u32 oc3_index;
2790
2791 if (media_index > 4)
2792 media_index = 5;
2793
2794 switch (fore200e->loop_mode) {
2795 case ATM_LM_NONE: oc3_index = 0;
2796 break;
2797 case ATM_LM_LOC_PHY: oc3_index = 1;
2798 break;
2799 case ATM_LM_RMT_PHY: oc3_index = 2;
2800 break;
2801 default: oc3_index = 3;
2802 }
2803
2804 return sprintf(page,
2805 " firmware release:\t\t%d.%d.%d\n"
2806 " monitor release:\t\t%d.%d\n"
2807 " media type:\t\t\t%s\n"
2808 " OC-3 revision:\t\t0x%x\n"
2809 " OC-3 mode:\t\t\t%s",
2810 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2811 mon960_release >> 16, mon960_release << 16 >> 16,
2812 media_name[ media_index ],
2813 oc3_revision,
2814 oc3_mode[ oc3_index ]);
2815 }
2816
2817 if (!left--) {
2818 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2819
2820 return sprintf(page,
2821 "\n\n"
2822 " monitor:\n"
2823 " version number:\t\t%d\n"
2824 " boot status word:\t\t0x%08x\n",
2825 fore200e->bus->read(&cp_monitor->mon_version),
2826 fore200e->bus->read(&cp_monitor->bstat));
2827 }
2828
2829 if (!left--)
2830 return sprintf(page,
2831 "\n"
2832 " device statistics:\n"
2833 " 4b5b:\n"
2834 " crc_header_errors:\t\t%10u\n"
2835 " framing_errors:\t\t%10u\n",
2836 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2837 be32_to_cpu(fore200e->stats->phy.framing_errors));
2838
2839 if (!left--)
2840 return sprintf(page, "\n"
2841 " OC-3:\n"
2842 " section_bip8_errors:\t%10u\n"
2843 " path_bip8_errors:\t\t%10u\n"
2844 " line_bip24_errors:\t\t%10u\n"
2845 " line_febe_errors:\t\t%10u\n"
2846 " path_febe_errors:\t\t%10u\n"
2847 " corr_hcs_errors:\t\t%10u\n"
2848 " ucorr_hcs_errors:\t\t%10u\n",
2849 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2850 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2851 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2852 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2853 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2854 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2855 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2856
2857 if (!left--)
2858 return sprintf(page,"\n"
2859 " ATM:\t\t\t\t cells\n"
2860 " TX:\t\t\t%10u\n"
2861 " RX:\t\t\t%10u\n"
2862 " vpi out of range:\t\t%10u\n"
2863 " vpi no conn:\t\t%10u\n"
2864 " vci out of range:\t\t%10u\n"
2865 " vci no conn:\t\t%10u\n",
2866 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2867 be32_to_cpu(fore200e->stats->atm.cells_received),
2868 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2869 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2870 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2871 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2872
2873 if (!left--)
2874 return sprintf(page,"\n"
2875 " AAL0:\t\t\t cells\n"
2876 " TX:\t\t\t%10u\n"
2877 " RX:\t\t\t%10u\n"
2878 " dropped:\t\t\t%10u\n",
2879 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
2880 be32_to_cpu(fore200e->stats->aal0.cells_received),
2881 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
2882
2883 if (!left--)
2884 return sprintf(page,"\n"
2885 " AAL3/4:\n"
2886 " SAR sublayer:\t\t cells\n"
2887 " TX:\t\t\t%10u\n"
2888 " RX:\t\t\t%10u\n"
2889 " dropped:\t\t\t%10u\n"
2890 " CRC errors:\t\t%10u\n"
2891 " protocol errors:\t\t%10u\n\n"
2892 " CS sublayer:\t\t PDUs\n"
2893 " TX:\t\t\t%10u\n"
2894 " RX:\t\t\t%10u\n"
2895 " dropped:\t\t\t%10u\n"
2896 " protocol errors:\t\t%10u\n",
2897 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
2898 be32_to_cpu(fore200e->stats->aal34.cells_received),
2899 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
2900 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
2901 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
2902 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
2903 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
2904 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
2905 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
2906
2907 if (!left--)
2908 return sprintf(page,"\n"
2909 " AAL5:\n"
2910 " SAR sublayer:\t\t cells\n"
2911 " TX:\t\t\t%10u\n"
2912 " RX:\t\t\t%10u\n"
2913 " dropped:\t\t\t%10u\n"
2914 " congestions:\t\t%10u\n\n"
2915 " CS sublayer:\t\t PDUs\n"
2916 " TX:\t\t\t%10u\n"
2917 " RX:\t\t\t%10u\n"
2918 " dropped:\t\t\t%10u\n"
2919 " CRC errors:\t\t%10u\n"
2920 " protocol errors:\t\t%10u\n",
2921 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
2922 be32_to_cpu(fore200e->stats->aal5.cells_received),
2923 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
2924 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
2925 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
2926 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
2927 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
2928 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
2929 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
2930
2931 if (!left--)
2932 return sprintf(page,"\n"
2933 " AUX:\t\t allocation failures\n"
2934 " small b1:\t\t\t%10u\n"
2935 " large b1:\t\t\t%10u\n"
2936 " small b2:\t\t\t%10u\n"
2937 " large b2:\t\t\t%10u\n"
2938 " RX PDUs:\t\t\t%10u\n"
2939 " TX PDUs:\t\t\t%10lu\n",
2940 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
2941 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
2942 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
2943 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
2944 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
2945 fore200e->tx_sat);
2946
2947 if (!left--)
2948 return sprintf(page,"\n"
2949 " receive carrier:\t\t\t%s\n",
2950 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
2951
2952 if (!left--) {
2953 return sprintf(page,"\n"
2954 " VCCs:\n address VPI VCI AAL "
2955 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
2956 }
2957
2958 for (i = 0; i < NBR_CONNECT; i++) {
2959
2960 vcc = fore200e->vc_map[i].vcc;
2961
2962 if (vcc == NULL)
2963 continue;
2964
2965 spin_lock_irqsave(&fore200e->q_lock, flags);
2966
2967 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
2968
2969 fore200e_vcc = FORE200E_VCC(vcc);
2970 ASSERT(fore200e_vcc);
2971
2972 len = sprintf(page,
2973 " %pK %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
2974 vcc,
2975 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
2976 fore200e_vcc->tx_pdu,
2977 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
2978 fore200e_vcc->tx_max_pdu,
2979 fore200e_vcc->rx_pdu,
2980 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
2981 fore200e_vcc->rx_max_pdu);
2982
2983 spin_unlock_irqrestore(&fore200e->q_lock, flags);
2984 return len;
2985 }
2986
2987 spin_unlock_irqrestore(&fore200e->q_lock, flags);
2988 }
2989
2990 return 0;
2991 }
2992
2993 module_init(fore200e_module_init);
2994 module_exit(fore200e_module_cleanup);
2995
2996
2997 static const struct atmdev_ops fore200e_ops = {
2998 .open = fore200e_open,
2999 .close = fore200e_close,
3000 .ioctl = fore200e_ioctl,
3001 .send = fore200e_send,
3002 .change_qos = fore200e_change_qos,
3003 .proc_read = fore200e_proc_read,
3004 .owner = THIS_MODULE
3005 };
3006
3007 MODULE_LICENSE("GPL");
3008 #ifdef CONFIG_PCI
3009 #ifdef __LITTLE_ENDIAN__
3010 MODULE_FIRMWARE("pca200e.bin");
3011 #else
3012 MODULE_FIRMWARE("pca200e_ecd.bin2");
3013 #endif
3014 #endif /* CONFIG_PCI */
3015 #ifdef CONFIG_SBUS
3016 MODULE_FIRMWARE("sba200e_ecd.bin2");
3017 #endif
3018