1 /*
2 * Copyright © 2008 Intel Corporation
3 * 2014 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 *
24 */
25
26 #include <drm/drm_atomic.h>
27 #include <drm/drm_atomic_helper.h>
28 #include <drm/drm_edid.h>
29 #include <drm/drm_probe_helper.h>
30
31 #include "i915_drv.h"
32 #include "intel_atomic.h"
33 #include "intel_audio.h"
34 #include "intel_connector.h"
35 #include "intel_ddi.h"
36 #include "intel_display_types.h"
37 #include "intel_hotplug.h"
38 #include "intel_dp.h"
39 #include "intel_dp_mst.h"
40 #include "intel_dpio_phy.h"
41 #include "intel_hdcp.h"
42 #include "skl_scaler.h"
43
intel_dp_mst_compute_link_config(struct intel_encoder * encoder,struct intel_crtc_state * crtc_state,struct drm_connector_state * conn_state,struct link_config_limits * limits)44 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
45 struct intel_crtc_state *crtc_state,
46 struct drm_connector_state *conn_state,
47 struct link_config_limits *limits)
48 {
49 struct drm_atomic_state *state = crtc_state->uapi.state;
50 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
51 struct intel_dp *intel_dp = &intel_mst->primary->dp;
52 struct intel_connector *connector =
53 to_intel_connector(conn_state->connector);
54 struct drm_i915_private *i915 = to_i915(connector->base.dev);
55 const struct drm_display_mode *adjusted_mode =
56 &crtc_state->hw.adjusted_mode;
57 bool constant_n = drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_CONSTANT_N);
58 int bpp, slots = -EINVAL;
59
60 crtc_state->lane_count = limits->max_lane_count;
61 crtc_state->port_clock = limits->max_clock;
62
63 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
64 crtc_state->pipe_bpp = bpp;
65
66 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
67 crtc_state->pipe_bpp,
68 false);
69
70 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
71 connector->port,
72 crtc_state->pbn,
73 drm_dp_get_vc_payload_bw(crtc_state->port_clock,
74 crtc_state->lane_count));
75 if (slots == -EDEADLK)
76 return slots;
77 if (slots >= 0)
78 break;
79 }
80
81 if (slots < 0) {
82 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
83 slots);
84 return slots;
85 }
86
87 intel_link_compute_m_n(crtc_state->pipe_bpp,
88 crtc_state->lane_count,
89 adjusted_mode->crtc_clock,
90 crtc_state->port_clock,
91 &crtc_state->dp_m_n,
92 constant_n, crtc_state->fec_enable);
93 crtc_state->dp_m_n.tu = slots;
94
95 return 0;
96 }
97
intel_dp_mst_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state)98 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
99 struct intel_crtc_state *pipe_config,
100 struct drm_connector_state *conn_state)
101 {
102 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
103 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
104 struct intel_dp *intel_dp = &intel_mst->primary->dp;
105 struct intel_connector *connector =
106 to_intel_connector(conn_state->connector);
107 struct intel_digital_connector_state *intel_conn_state =
108 to_intel_digital_connector_state(conn_state);
109 const struct drm_display_mode *adjusted_mode =
110 &pipe_config->hw.adjusted_mode;
111 struct link_config_limits limits;
112 int ret;
113
114 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
115 return -EINVAL;
116
117 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
118 pipe_config->has_pch_encoder = false;
119
120 if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
121 pipe_config->has_audio = connector->port->has_audio;
122 else
123 pipe_config->has_audio =
124 intel_conn_state->force_audio == HDMI_AUDIO_ON;
125
126 /*
127 * for MST we always configure max link bw - the spec doesn't
128 * seem to suggest we should do otherwise.
129 */
130 limits.min_clock =
131 limits.max_clock = intel_dp_max_link_rate(intel_dp);
132
133 limits.min_lane_count =
134 limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
135
136 limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
137 /*
138 * FIXME: If all the streams can't fit into the link with
139 * their current pipe_bpp we should reduce pipe_bpp across
140 * the board until things start to fit. Until then we
141 * limit to <= 8bpc since that's what was hardcoded for all
142 * MST streams previously. This hack should be removed once
143 * we have the proper retry logic in place.
144 */
145 limits.max_bpp = min(pipe_config->pipe_bpp, 24);
146
147 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
148
149 ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
150 conn_state, &limits);
151 if (ret)
152 return ret;
153
154 pipe_config->limited_color_range =
155 intel_dp_limited_color_range(pipe_config, conn_state);
156
157 if (IS_GEN9_LP(dev_priv))
158 pipe_config->lane_lat_optim_mask =
159 bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
160
161 intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
162
163 return 0;
164 }
165
166 /*
167 * Iterate over all connectors and return a mask of
168 * all CPU transcoders streaming over the same DP link.
169 */
170 static unsigned int
intel_dp_mst_transcoder_mask(struct intel_atomic_state * state,struct intel_dp * mst_port)171 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
172 struct intel_dp *mst_port)
173 {
174 struct drm_i915_private *dev_priv = to_i915(state->base.dev);
175 const struct intel_digital_connector_state *conn_state;
176 struct intel_connector *connector;
177 u8 transcoders = 0;
178 int i;
179
180 if (DISPLAY_VER(dev_priv) < 12)
181 return 0;
182
183 for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
184 const struct intel_crtc_state *crtc_state;
185 struct intel_crtc *crtc;
186
187 if (connector->mst_port != mst_port || !conn_state->base.crtc)
188 continue;
189
190 crtc = to_intel_crtc(conn_state->base.crtc);
191 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
192
193 if (!crtc_state->hw.active)
194 continue;
195
196 transcoders |= BIT(crtc_state->cpu_transcoder);
197 }
198
199 return transcoders;
200 }
201
intel_dp_mst_compute_config_late(struct intel_encoder * encoder,struct intel_crtc_state * crtc_state,struct drm_connector_state * conn_state)202 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
203 struct intel_crtc_state *crtc_state,
204 struct drm_connector_state *conn_state)
205 {
206 struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
207 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
208 struct intel_dp *intel_dp = &intel_mst->primary->dp;
209
210 /* lowest numbered transcoder will be designated master */
211 crtc_state->mst_master_transcoder =
212 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
213
214 return 0;
215 }
216
217 /*
218 * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
219 * that shares the same MST stream as mode changed,
220 * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
221 * a fastset when possible.
222 */
223 static int
intel_dp_mst_atomic_master_trans_check(struct intel_connector * connector,struct intel_atomic_state * state)224 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
225 struct intel_atomic_state *state)
226 {
227 struct drm_i915_private *dev_priv = to_i915(state->base.dev);
228 struct drm_connector_list_iter connector_list_iter;
229 struct intel_connector *connector_iter;
230
231 if (DISPLAY_VER(dev_priv) < 12)
232 return 0;
233
234 if (!intel_connector_needs_modeset(state, &connector->base))
235 return 0;
236
237 drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
238 for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
239 struct intel_digital_connector_state *conn_iter_state;
240 struct intel_crtc_state *crtc_state;
241 struct intel_crtc *crtc;
242 int ret;
243
244 if (connector_iter->mst_port != connector->mst_port ||
245 connector_iter == connector)
246 continue;
247
248 conn_iter_state = intel_atomic_get_digital_connector_state(state,
249 connector_iter);
250 if (IS_ERR(conn_iter_state)) {
251 drm_connector_list_iter_end(&connector_list_iter);
252 return PTR_ERR(conn_iter_state);
253 }
254
255 if (!conn_iter_state->base.crtc)
256 continue;
257
258 crtc = to_intel_crtc(conn_iter_state->base.crtc);
259 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
260 if (IS_ERR(crtc_state)) {
261 drm_connector_list_iter_end(&connector_list_iter);
262 return PTR_ERR(crtc_state);
263 }
264
265 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
266 if (ret) {
267 drm_connector_list_iter_end(&connector_list_iter);
268 return ret;
269 }
270 crtc_state->uapi.mode_changed = true;
271 }
272 drm_connector_list_iter_end(&connector_list_iter);
273
274 return 0;
275 }
276
277 static int
intel_dp_mst_atomic_check(struct drm_connector * connector,struct drm_atomic_state * _state)278 intel_dp_mst_atomic_check(struct drm_connector *connector,
279 struct drm_atomic_state *_state)
280 {
281 struct intel_atomic_state *state = to_intel_atomic_state(_state);
282 struct drm_connector_state *new_conn_state =
283 drm_atomic_get_new_connector_state(&state->base, connector);
284 struct drm_connector_state *old_conn_state =
285 drm_atomic_get_old_connector_state(&state->base, connector);
286 struct intel_connector *intel_connector =
287 to_intel_connector(connector);
288 struct drm_crtc *new_crtc = new_conn_state->crtc;
289 struct drm_dp_mst_topology_mgr *mgr;
290 int ret;
291
292 ret = intel_digital_connector_atomic_check(connector, &state->base);
293 if (ret)
294 return ret;
295
296 ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
297 if (ret)
298 return ret;
299
300 if (!old_conn_state->crtc)
301 return 0;
302
303 /* We only want to free VCPI if this state disables the CRTC on this
304 * connector
305 */
306 if (new_crtc) {
307 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc);
308 struct intel_crtc_state *crtc_state =
309 intel_atomic_get_new_crtc_state(state, intel_crtc);
310
311 if (!crtc_state ||
312 !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
313 crtc_state->uapi.enable)
314 return 0;
315 }
316
317 mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr;
318 ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr,
319 intel_connector->port);
320
321 return ret;
322 }
323
clear_act_sent(struct intel_encoder * encoder,const struct intel_crtc_state * crtc_state)324 static void clear_act_sent(struct intel_encoder *encoder,
325 const struct intel_crtc_state *crtc_state)
326 {
327 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
328
329 intel_de_write(i915, dp_tp_status_reg(encoder, crtc_state),
330 DP_TP_STATUS_ACT_SENT);
331 }
332
wait_for_act_sent(struct intel_encoder * encoder,const struct intel_crtc_state * crtc_state)333 static void wait_for_act_sent(struct intel_encoder *encoder,
334 const struct intel_crtc_state *crtc_state)
335 {
336 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
337 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
338 struct intel_dp *intel_dp = &intel_mst->primary->dp;
339
340 if (intel_de_wait_for_set(i915, dp_tp_status_reg(encoder, crtc_state),
341 DP_TP_STATUS_ACT_SENT, 1))
342 drm_err(&i915->drm, "Timed out waiting for ACT sent\n");
343
344 drm_dp_check_act_status(&intel_dp->mst_mgr);
345 }
346
intel_mst_disable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * old_crtc_state,const struct drm_connector_state * old_conn_state)347 static void intel_mst_disable_dp(struct intel_atomic_state *state,
348 struct intel_encoder *encoder,
349 const struct intel_crtc_state *old_crtc_state,
350 const struct drm_connector_state *old_conn_state)
351 {
352 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
353 struct intel_digital_port *dig_port = intel_mst->primary;
354 struct intel_dp *intel_dp = &dig_port->dp;
355 struct intel_connector *connector =
356 to_intel_connector(old_conn_state->connector);
357 struct drm_i915_private *i915 = to_i915(connector->base.dev);
358 int ret;
359
360 drm_dbg_kms(&i915->drm, "active links %d\n",
361 intel_dp->active_mst_links);
362
363 intel_hdcp_disable(intel_mst->connector);
364
365 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
366
367 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
368 if (ret) {
369 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
370 }
371 if (old_crtc_state->has_audio)
372 intel_audio_codec_disable(encoder,
373 old_crtc_state, old_conn_state);
374 }
375
intel_mst_post_disable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * old_crtc_state,const struct drm_connector_state * old_conn_state)376 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
377 struct intel_encoder *encoder,
378 const struct intel_crtc_state *old_crtc_state,
379 const struct drm_connector_state *old_conn_state)
380 {
381 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
382 struct intel_digital_port *dig_port = intel_mst->primary;
383 struct intel_dp *intel_dp = &dig_port->dp;
384 struct intel_connector *connector =
385 to_intel_connector(old_conn_state->connector);
386 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
387 bool last_mst_stream;
388 u32 val;
389
390 intel_dp->active_mst_links--;
391 last_mst_stream = intel_dp->active_mst_links == 0;
392 drm_WARN_ON(&dev_priv->drm,
393 DISPLAY_VER(dev_priv) >= 12 && last_mst_stream &&
394 !intel_dp_mst_is_master_trans(old_crtc_state));
395
396 intel_crtc_vblank_off(old_crtc_state);
397
398 intel_disable_pipe(old_crtc_state);
399
400 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
401
402 clear_act_sent(encoder, old_crtc_state);
403
404 val = intel_de_read(dev_priv,
405 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
406 val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
407 intel_de_write(dev_priv,
408 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
409 val);
410
411 wait_for_act_sent(encoder, old_crtc_state);
412
413 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
414
415 intel_ddi_disable_transcoder_func(old_crtc_state);
416
417 if (DISPLAY_VER(dev_priv) >= 9)
418 skl_scaler_disable(old_crtc_state);
419 else
420 ilk_pfit_disable(old_crtc_state);
421
422 /*
423 * Power down mst path before disabling the port, otherwise we end
424 * up getting interrupts from the sink upon detecting link loss.
425 */
426 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
427 false);
428
429 /*
430 * BSpec 4287: disable DIP after the transcoder is disabled and before
431 * the transcoder clock select is set to none.
432 */
433 if (last_mst_stream)
434 intel_dp_set_infoframes(&dig_port->base, false,
435 old_crtc_state, NULL);
436 /*
437 * From TGL spec: "If multi-stream slave transcoder: Configure
438 * Transcoder Clock Select to direct no clock to the transcoder"
439 *
440 * From older GENs spec: "Configure Transcoder Clock Select to direct
441 * no clock to the transcoder"
442 */
443 if (DISPLAY_VER(dev_priv) < 12 || !last_mst_stream)
444 intel_ddi_disable_pipe_clock(old_crtc_state);
445
446
447 intel_mst->connector = NULL;
448 if (last_mst_stream)
449 dig_port->base.post_disable(state, &dig_port->base,
450 old_crtc_state, NULL);
451
452 drm_dbg_kms(&dev_priv->drm, "active links %d\n",
453 intel_dp->active_mst_links);
454 }
455
intel_mst_pre_pll_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)456 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
457 struct intel_encoder *encoder,
458 const struct intel_crtc_state *pipe_config,
459 const struct drm_connector_state *conn_state)
460 {
461 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
462 struct intel_digital_port *dig_port = intel_mst->primary;
463 struct intel_dp *intel_dp = &dig_port->dp;
464
465 if (intel_dp->active_mst_links == 0)
466 dig_port->base.pre_pll_enable(state, &dig_port->base,
467 pipe_config, NULL);
468 }
469
intel_mst_pre_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)470 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
471 struct intel_encoder *encoder,
472 const struct intel_crtc_state *pipe_config,
473 const struct drm_connector_state *conn_state)
474 {
475 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
476 struct intel_digital_port *dig_port = intel_mst->primary;
477 struct intel_dp *intel_dp = &dig_port->dp;
478 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
479 struct intel_connector *connector =
480 to_intel_connector(conn_state->connector);
481 int ret;
482 bool first_mst_stream;
483
484 /* MST encoders are bound to a crtc, not to a connector,
485 * force the mapping here for get_hw_state.
486 */
487 connector->encoder = encoder;
488 intel_mst->connector = connector;
489 first_mst_stream = intel_dp->active_mst_links == 0;
490 drm_WARN_ON(&dev_priv->drm,
491 DISPLAY_VER(dev_priv) >= 12 && first_mst_stream &&
492 !intel_dp_mst_is_master_trans(pipe_config));
493
494 drm_dbg_kms(&dev_priv->drm, "active links %d\n",
495 intel_dp->active_mst_links);
496
497 if (first_mst_stream)
498 intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
499
500 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
501
502 if (first_mst_stream)
503 dig_port->base.pre_enable(state, &dig_port->base,
504 pipe_config, NULL);
505
506 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
507 connector->port,
508 pipe_config->pbn,
509 pipe_config->dp_m_n.tu);
510 if (!ret)
511 drm_err(&dev_priv->drm, "failed to allocate vcpi\n");
512
513 intel_dp->active_mst_links++;
514
515 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
516
517 /*
518 * Before Gen 12 this is not done as part of
519 * dig_port->base.pre_enable() and should be done here. For
520 * Gen 12+ the step in which this should be done is different for the
521 * first MST stream, so it's done on the DDI for the first stream and
522 * here for the following ones.
523 */
524 if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream)
525 intel_ddi_enable_pipe_clock(encoder, pipe_config);
526
527 intel_ddi_set_dp_msa(pipe_config, conn_state);
528
529 intel_dp_set_m_n(pipe_config, M1_N1);
530 }
531
intel_mst_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)532 static void intel_mst_enable_dp(struct intel_atomic_state *state,
533 struct intel_encoder *encoder,
534 const struct intel_crtc_state *pipe_config,
535 const struct drm_connector_state *conn_state)
536 {
537 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
538 struct intel_digital_port *dig_port = intel_mst->primary;
539 struct intel_dp *intel_dp = &dig_port->dp;
540 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
541 u32 val;
542
543 drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
544
545 clear_act_sent(encoder, pipe_config);
546
547 intel_ddi_enable_transcoder_func(encoder, pipe_config);
548
549 val = intel_de_read(dev_priv,
550 TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
551 val |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
552 intel_de_write(dev_priv,
553 TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder),
554 val);
555
556 drm_dbg_kms(&dev_priv->drm, "active links %d\n",
557 intel_dp->active_mst_links);
558
559 wait_for_act_sent(encoder, pipe_config);
560
561 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
562
563 intel_enable_pipe(pipe_config);
564
565 intel_crtc_vblank_on(pipe_config);
566
567 if (pipe_config->has_audio)
568 intel_audio_codec_enable(encoder, pipe_config, conn_state);
569
570 /* Enable hdcp if it's desired */
571 if (conn_state->content_protection ==
572 DRM_MODE_CONTENT_PROTECTION_DESIRED)
573 intel_hdcp_enable(to_intel_connector(conn_state->connector),
574 pipe_config,
575 (u8)conn_state->hdcp_content_type);
576 }
577
intel_dp_mst_enc_get_hw_state(struct intel_encoder * encoder,enum pipe * pipe)578 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
579 enum pipe *pipe)
580 {
581 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
582 *pipe = intel_mst->pipe;
583 if (intel_mst->connector)
584 return true;
585 return false;
586 }
587
intel_dp_mst_enc_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)588 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
589 struct intel_crtc_state *pipe_config)
590 {
591 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
592 struct intel_digital_port *dig_port = intel_mst->primary;
593
594 dig_port->base.get_config(&dig_port->base, pipe_config);
595 }
596
intel_dp_mst_initial_fastset_check(struct intel_encoder * encoder,struct intel_crtc_state * crtc_state)597 static bool intel_dp_mst_initial_fastset_check(struct intel_encoder *encoder,
598 struct intel_crtc_state *crtc_state)
599 {
600 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
601 struct intel_digital_port *dig_port = intel_mst->primary;
602
603 return intel_dp_initial_fastset_check(&dig_port->base, crtc_state);
604 }
605
intel_dp_mst_get_ddc_modes(struct drm_connector * connector)606 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
607 {
608 struct intel_connector *intel_connector = to_intel_connector(connector);
609 struct intel_dp *intel_dp = intel_connector->mst_port;
610 struct edid *edid;
611 int ret;
612
613 if (drm_connector_is_unregistered(connector))
614 return intel_connector_update_modes(connector, NULL);
615
616 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
617 ret = intel_connector_update_modes(connector, edid);
618 kfree(edid);
619
620 return ret;
621 }
622
623 static int
intel_dp_mst_connector_late_register(struct drm_connector * connector)624 intel_dp_mst_connector_late_register(struct drm_connector *connector)
625 {
626 struct intel_connector *intel_connector = to_intel_connector(connector);
627 int ret;
628
629 ret = drm_dp_mst_connector_late_register(connector,
630 intel_connector->port);
631 if (ret < 0)
632 return ret;
633
634 ret = intel_connector_register(connector);
635 if (ret < 0)
636 drm_dp_mst_connector_early_unregister(connector,
637 intel_connector->port);
638
639 return ret;
640 }
641
642 static void
intel_dp_mst_connector_early_unregister(struct drm_connector * connector)643 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
644 {
645 struct intel_connector *intel_connector = to_intel_connector(connector);
646
647 intel_connector_unregister(connector);
648 drm_dp_mst_connector_early_unregister(connector,
649 intel_connector->port);
650 }
651
652 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
653 .fill_modes = drm_helper_probe_single_connector_modes,
654 .atomic_get_property = intel_digital_connector_atomic_get_property,
655 .atomic_set_property = intel_digital_connector_atomic_set_property,
656 .late_register = intel_dp_mst_connector_late_register,
657 .early_unregister = intel_dp_mst_connector_early_unregister,
658 .destroy = intel_connector_destroy,
659 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
660 .atomic_duplicate_state = intel_digital_connector_duplicate_state,
661 };
662
intel_dp_mst_get_modes(struct drm_connector * connector)663 static int intel_dp_mst_get_modes(struct drm_connector *connector)
664 {
665 return intel_dp_mst_get_ddc_modes(connector);
666 }
667
668 static int
intel_dp_mst_mode_valid_ctx(struct drm_connector * connector,struct drm_display_mode * mode,struct drm_modeset_acquire_ctx * ctx,enum drm_mode_status * status)669 intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
670 struct drm_display_mode *mode,
671 struct drm_modeset_acquire_ctx *ctx,
672 enum drm_mode_status *status)
673 {
674 struct drm_i915_private *dev_priv = to_i915(connector->dev);
675 struct intel_connector *intel_connector = to_intel_connector(connector);
676 struct intel_dp *intel_dp = intel_connector->mst_port;
677 struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
678 struct drm_dp_mst_port *port = intel_connector->port;
679 const int min_bpp = 18;
680 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
681 int max_rate, mode_rate, max_lanes, max_link_clock;
682 int ret;
683
684 if (drm_connector_is_unregistered(connector)) {
685 *status = MODE_ERROR;
686 return 0;
687 }
688
689 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
690 *status = MODE_NO_DBLESCAN;
691 return 0;
692 }
693
694 max_link_clock = intel_dp_max_link_rate(intel_dp);
695 max_lanes = intel_dp_max_lane_count(intel_dp);
696
697 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
698 mode_rate = intel_dp_link_required(mode->clock, min_bpp);
699
700 ret = drm_modeset_lock(&mgr->base.lock, ctx);
701 if (ret)
702 return ret;
703
704 if (mode_rate > max_rate || mode->clock > max_dotclk ||
705 drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) {
706 *status = MODE_CLOCK_HIGH;
707 return 0;
708 }
709
710 if (mode->clock < 10000) {
711 *status = MODE_CLOCK_LOW;
712 return 0;
713 }
714
715 if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
716 *status = MODE_H_ILLEGAL;
717 return 0;
718 }
719
720 *status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
721 return 0;
722 }
723
intel_mst_atomic_best_encoder(struct drm_connector * connector,struct drm_atomic_state * state)724 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
725 struct drm_atomic_state *state)
726 {
727 struct drm_connector_state *connector_state = drm_atomic_get_new_connector_state(state,
728 connector);
729 struct intel_connector *intel_connector = to_intel_connector(connector);
730 struct intel_dp *intel_dp = intel_connector->mst_port;
731 struct intel_crtc *crtc = to_intel_crtc(connector_state->crtc);
732
733 return &intel_dp->mst_encoders[crtc->pipe]->base.base;
734 }
735
736 static int
intel_dp_mst_detect(struct drm_connector * connector,struct drm_modeset_acquire_ctx * ctx,bool force)737 intel_dp_mst_detect(struct drm_connector *connector,
738 struct drm_modeset_acquire_ctx *ctx, bool force)
739 {
740 struct drm_i915_private *i915 = to_i915(connector->dev);
741 struct intel_connector *intel_connector = to_intel_connector(connector);
742 struct intel_dp *intel_dp = intel_connector->mst_port;
743
744 if (!INTEL_DISPLAY_ENABLED(i915))
745 return connector_status_disconnected;
746
747 if (drm_connector_is_unregistered(connector))
748 return connector_status_disconnected;
749
750 return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
751 intel_connector->port);
752 }
753
754 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
755 .get_modes = intel_dp_mst_get_modes,
756 .mode_valid_ctx = intel_dp_mst_mode_valid_ctx,
757 .atomic_best_encoder = intel_mst_atomic_best_encoder,
758 .atomic_check = intel_dp_mst_atomic_check,
759 .detect_ctx = intel_dp_mst_detect,
760 };
761
intel_dp_mst_encoder_destroy(struct drm_encoder * encoder)762 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
763 {
764 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
765
766 drm_encoder_cleanup(encoder);
767 kfree(intel_mst);
768 }
769
770 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
771 .destroy = intel_dp_mst_encoder_destroy,
772 };
773
intel_dp_mst_get_hw_state(struct intel_connector * connector)774 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
775 {
776 if (intel_attached_encoder(connector) && connector->base.state->crtc) {
777 enum pipe pipe;
778 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
779 return false;
780 return true;
781 }
782 return false;
783 }
784
intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr * mgr,struct drm_dp_mst_port * port,const char * pathprop)785 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
786 {
787 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
788 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
789 struct drm_device *dev = dig_port->base.base.dev;
790 struct drm_i915_private *dev_priv = to_i915(dev);
791 struct intel_connector *intel_connector;
792 struct drm_connector *connector;
793 enum pipe pipe;
794 int ret;
795
796 intel_connector = intel_connector_alloc();
797 if (!intel_connector)
798 return NULL;
799
800 intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
801 intel_connector->mst_port = intel_dp;
802 intel_connector->port = port;
803 drm_dp_mst_get_port_malloc(port);
804
805 connector = &intel_connector->base;
806 ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
807 DRM_MODE_CONNECTOR_DisplayPort);
808 if (ret) {
809 intel_connector_free(intel_connector);
810 return NULL;
811 }
812
813 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
814
815 for_each_pipe(dev_priv, pipe) {
816 struct drm_encoder *enc =
817 &intel_dp->mst_encoders[pipe]->base.base;
818
819 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
820 if (ret)
821 goto err;
822 }
823
824 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
825 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
826
827 ret = drm_connector_set_path_property(connector, pathprop);
828 if (ret)
829 goto err;
830
831 intel_attach_force_audio_property(connector);
832 intel_attach_broadcast_rgb_property(connector);
833
834 if (DISPLAY_VER(dev_priv) <= 12) {
835 ret = intel_dp_init_hdcp(dig_port, intel_connector);
836 if (ret)
837 drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP MST init failed, skipping.\n",
838 connector->name, connector->base.id);
839 }
840
841 /*
842 * Reuse the prop from the SST connector because we're
843 * not allowed to create new props after device registration.
844 */
845 connector->max_bpc_property =
846 intel_dp->attached_connector->base.max_bpc_property;
847 if (connector->max_bpc_property)
848 drm_connector_attach_max_bpc_property(connector, 6, 12);
849
850 return connector;
851
852 err:
853 drm_connector_cleanup(connector);
854 return NULL;
855 }
856
857 static void
intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr * mgr)858 intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr *mgr)
859 {
860 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
861
862 intel_hpd_trigger_irq(dp_to_dig_port(intel_dp));
863 }
864
865 static const struct drm_dp_mst_topology_cbs mst_cbs = {
866 .add_connector = intel_dp_add_mst_connector,
867 .poll_hpd_irq = intel_dp_mst_poll_hpd_irq,
868 };
869
870 static struct intel_dp_mst_encoder *
intel_dp_create_fake_mst_encoder(struct intel_digital_port * dig_port,enum pipe pipe)871 intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe pipe)
872 {
873 struct intel_dp_mst_encoder *intel_mst;
874 struct intel_encoder *intel_encoder;
875 struct drm_device *dev = dig_port->base.base.dev;
876
877 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
878
879 if (!intel_mst)
880 return NULL;
881
882 intel_mst->pipe = pipe;
883 intel_encoder = &intel_mst->base;
884 intel_mst->primary = dig_port;
885
886 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
887 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
888
889 intel_encoder->type = INTEL_OUTPUT_DP_MST;
890 intel_encoder->power_domain = dig_port->base.power_domain;
891 intel_encoder->port = dig_port->base.port;
892 intel_encoder->cloneable = 0;
893 /*
894 * This is wrong, but broken userspace uses the intersection
895 * of possible_crtcs of all the encoders of a given connector
896 * to figure out which crtcs can drive said connector. What
897 * should be used instead is the union of possible_crtcs.
898 * To keep such userspace functioning we must misconfigure
899 * this to make sure the intersection is not empty :(
900 */
901 intel_encoder->pipe_mask = ~0;
902
903 intel_encoder->compute_config = intel_dp_mst_compute_config;
904 intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
905 intel_encoder->disable = intel_mst_disable_dp;
906 intel_encoder->post_disable = intel_mst_post_disable_dp;
907 intel_encoder->update_pipe = intel_ddi_update_pipe;
908 intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
909 intel_encoder->pre_enable = intel_mst_pre_enable_dp;
910 intel_encoder->enable = intel_mst_enable_dp;
911 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
912 intel_encoder->get_config = intel_dp_mst_enc_get_config;
913 intel_encoder->initial_fastset_check = intel_dp_mst_initial_fastset_check;
914
915 return intel_mst;
916
917 }
918
919 static bool
intel_dp_create_fake_mst_encoders(struct intel_digital_port * dig_port)920 intel_dp_create_fake_mst_encoders(struct intel_digital_port *dig_port)
921 {
922 struct intel_dp *intel_dp = &dig_port->dp;
923 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
924 enum pipe pipe;
925
926 for_each_pipe(dev_priv, pipe)
927 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(dig_port, pipe);
928 return true;
929 }
930
931 int
intel_dp_mst_encoder_active_links(struct intel_digital_port * dig_port)932 intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port)
933 {
934 return dig_port->dp.active_mst_links;
935 }
936
937 int
intel_dp_mst_encoder_init(struct intel_digital_port * dig_port,int conn_base_id)938 intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_base_id)
939 {
940 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
941 struct intel_dp *intel_dp = &dig_port->dp;
942 enum port port = dig_port->base.port;
943 int ret;
944
945 if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
946 return 0;
947
948 if (DISPLAY_VER(i915) < 12 && port == PORT_A)
949 return 0;
950
951 if (DISPLAY_VER(i915) < 11 && port == PORT_E)
952 return 0;
953
954 intel_dp->mst_mgr.cbs = &mst_cbs;
955
956 /* create encoders */
957 intel_dp_create_fake_mst_encoders(dig_port);
958 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
959 &intel_dp->aux, 16, 3, conn_base_id);
960 if (ret)
961 return ret;
962
963 intel_dp->can_mst = true;
964
965 return 0;
966 }
967
968 void
intel_dp_mst_encoder_cleanup(struct intel_digital_port * dig_port)969 intel_dp_mst_encoder_cleanup(struct intel_digital_port *dig_port)
970 {
971 struct intel_dp *intel_dp = &dig_port->dp;
972
973 if (!intel_dp->can_mst)
974 return;
975
976 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
977 /* encoders will get killed by normal cleanup */
978 }
979
intel_dp_mst_is_master_trans(const struct intel_crtc_state * crtc_state)980 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
981 {
982 return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
983 }
984
intel_dp_mst_is_slave_trans(const struct intel_crtc_state * crtc_state)985 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
986 {
987 return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
988 crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;
989 }
990