1 /*
2 * Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef __MLX5_ESWITCH_H__
34 #define __MLX5_ESWITCH_H__
35
36 #include <linux/if_ether.h>
37 #include <linux/if_link.h>
38 #include <linux/atomic.h>
39 #include <linux/xarray.h>
40 #include <net/devlink.h>
41 #include <linux/mlx5/device.h>
42 #include <linux/mlx5/eswitch.h>
43 #include <linux/mlx5/vport.h>
44 #include <linux/mlx5/fs.h>
45 #include "lib/mpfs.h"
46 #include "lib/fs_chains.h"
47 #include "sf/sf.h"
48 #include "en/tc_ct.h"
49 #include "esw/sample.h"
50
51 enum mlx5_mapped_obj_type {
52 MLX5_MAPPED_OBJ_CHAIN,
53 MLX5_MAPPED_OBJ_SAMPLE,
54 };
55
56 struct mlx5_mapped_obj {
57 enum mlx5_mapped_obj_type type;
58 union {
59 u32 chain;
60 struct {
61 u32 group_id;
62 u32 rate;
63 u32 trunc_size;
64 } sample;
65 };
66 };
67
68 #ifdef CONFIG_MLX5_ESWITCH
69
70 #define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15
71
72 #define MLX5_MAX_UC_PER_VPORT(dev) \
73 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
74
75 #define MLX5_MAX_MC_PER_VPORT(dev) \
76 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
77
78 #define MLX5_MIN_BW_SHARE 1
79
80 #define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \
81 min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit)
82
83 #define mlx5_esw_has_fwd_fdb(dev) \
84 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table)
85
86 #define esw_chains(esw) \
87 ((esw)->fdb_table.offloads.esw_chains_priv)
88
89 struct vport_ingress {
90 struct mlx5_flow_table *acl;
91 struct mlx5_flow_handle *allow_rule;
92 struct {
93 struct mlx5_flow_group *allow_spoofchk_only_grp;
94 struct mlx5_flow_group *allow_untagged_spoofchk_grp;
95 struct mlx5_flow_group *allow_untagged_only_grp;
96 struct mlx5_flow_group *drop_grp;
97 struct mlx5_flow_handle *drop_rule;
98 struct mlx5_fc *drop_counter;
99 } legacy;
100 struct {
101 /* Optional group to add an FTE to do internal priority
102 * tagging on ingress packets.
103 */
104 struct mlx5_flow_group *metadata_prio_tag_grp;
105 /* Group to add default match-all FTE entry to tag ingress
106 * packet with metadata.
107 */
108 struct mlx5_flow_group *metadata_allmatch_grp;
109 struct mlx5_modify_hdr *modify_metadata;
110 struct mlx5_flow_handle *modify_metadata_rule;
111 } offloads;
112 };
113
114 struct vport_egress {
115 struct mlx5_flow_table *acl;
116 struct mlx5_flow_handle *allowed_vlan;
117 struct mlx5_flow_group *vlan_grp;
118 union {
119 struct {
120 struct mlx5_flow_group *drop_grp;
121 struct mlx5_flow_handle *drop_rule;
122 struct mlx5_fc *drop_counter;
123 } legacy;
124 struct {
125 struct mlx5_flow_group *fwd_grp;
126 struct mlx5_flow_handle *fwd_rule;
127 } offloads;
128 };
129 };
130
131 struct mlx5_vport_drop_stats {
132 u64 rx_dropped;
133 u64 tx_dropped;
134 };
135
136 struct mlx5_vport_info {
137 u8 mac[ETH_ALEN];
138 u16 vlan;
139 u64 node_guid;
140 int link_state;
141 u8 qos;
142 u8 spoofchk: 1;
143 u8 trusted: 1;
144 };
145
146 /* Vport context events */
147 enum mlx5_eswitch_vport_event {
148 MLX5_VPORT_UC_ADDR_CHANGE = BIT(0),
149 MLX5_VPORT_MC_ADDR_CHANGE = BIT(1),
150 MLX5_VPORT_PROMISC_CHANGE = BIT(3),
151 };
152
153 struct mlx5_vport {
154 struct mlx5_core_dev *dev;
155 struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
156 struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
157 struct mlx5_flow_handle *promisc_rule;
158 struct mlx5_flow_handle *allmulti_rule;
159 struct work_struct vport_change_handler;
160
161 struct vport_ingress ingress;
162 struct vport_egress egress;
163 u32 default_metadata;
164 u32 metadata;
165
166 struct mlx5_vport_info info;
167
168 struct {
169 bool enabled;
170 u32 esw_tsar_ix;
171 u32 bw_share;
172 u32 min_rate;
173 u32 max_rate;
174 } qos;
175
176 u16 vport;
177 bool enabled;
178 enum mlx5_eswitch_vport_event enabled_events;
179 int index;
180 struct devlink_port *dl_port;
181 };
182
183 struct mlx5_esw_indir_table;
184
185 struct mlx5_eswitch_fdb {
186 union {
187 struct legacy_fdb {
188 struct mlx5_flow_table *fdb;
189 struct mlx5_flow_group *addr_grp;
190 struct mlx5_flow_group *allmulti_grp;
191 struct mlx5_flow_group *promisc_grp;
192 struct mlx5_flow_table *vepa_fdb;
193 struct mlx5_flow_handle *vepa_uplink_rule;
194 struct mlx5_flow_handle *vepa_star_rule;
195 } legacy;
196
197 struct offloads_fdb {
198 struct mlx5_flow_namespace *ns;
199 struct mlx5_flow_table *slow_fdb;
200 struct mlx5_flow_group *send_to_vport_grp;
201 struct mlx5_flow_group *send_to_vport_meta_grp;
202 struct mlx5_flow_group *peer_miss_grp;
203 struct mlx5_flow_handle **peer_miss_rules;
204 struct mlx5_flow_group *miss_grp;
205 struct mlx5_flow_handle **send_to_vport_meta_rules;
206 struct mlx5_flow_handle *miss_rule_uni;
207 struct mlx5_flow_handle *miss_rule_multi;
208 int vlan_push_pop_refcount;
209
210 struct mlx5_fs_chains *esw_chains_priv;
211 struct {
212 DECLARE_HASHTABLE(table, 8);
213 /* Protects vports.table */
214 struct mutex lock;
215 } vports;
216
217 struct mlx5_esw_indir_table *indir;
218
219 } offloads;
220 };
221 u32 flags;
222 };
223
224 struct mlx5_esw_offload {
225 struct mlx5_flow_table *ft_offloads_restore;
226 struct mlx5_flow_group *restore_group;
227 struct mlx5_modify_hdr *restore_copy_hdr_id;
228 struct mapping_ctx *reg_c0_obj_pool;
229
230 struct mlx5_flow_table *ft_offloads;
231 struct mlx5_flow_group *vport_rx_group;
232 struct xarray vport_reps;
233 struct list_head peer_flows;
234 struct mutex peer_mutex;
235 struct mutex encap_tbl_lock; /* protects encap_tbl */
236 DECLARE_HASHTABLE(encap_tbl, 8);
237 struct mutex decap_tbl_lock; /* protects decap_tbl */
238 DECLARE_HASHTABLE(decap_tbl, 8);
239 struct mod_hdr_tbl mod_hdr;
240 DECLARE_HASHTABLE(termtbl_tbl, 8);
241 struct mutex termtbl_mutex; /* protects termtbl hash */
242 struct xarray vhca_map;
243 const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES];
244 u8 inline_mode;
245 atomic64_t num_flows;
246 enum devlink_eswitch_encap_mode encap;
247 struct ida vport_metadata_ida;
248 unsigned int host_number; /* ECPF supports one external host */
249 };
250
251 /* E-Switch MC FDB table hash node */
252 struct esw_mc_addr { /* SRIOV only */
253 struct l2addr_node node;
254 struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
255 u32 refcnt;
256 };
257
258 struct mlx5_host_work {
259 struct work_struct work;
260 struct mlx5_eswitch *esw;
261 };
262
263 struct mlx5_esw_functions {
264 struct mlx5_nb nb;
265 u16 num_vfs;
266 };
267
268 enum {
269 MLX5_ESWITCH_VPORT_MATCH_METADATA = BIT(0),
270 MLX5_ESWITCH_REG_C1_LOOPBACK_ENABLED = BIT(1),
271 };
272
273 struct mlx5_eswitch {
274 struct mlx5_core_dev *dev;
275 struct mlx5_nb nb;
276 struct mlx5_eswitch_fdb fdb_table;
277 /* legacy data structures */
278 struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
279 struct esw_mc_addr mc_promisc;
280 /* end of legacy */
281 struct workqueue_struct *work_queue;
282 struct xarray vports;
283 u32 flags;
284 int total_vports;
285 int enabled_vports;
286 /* Synchronize between vport change events
287 * and async SRIOV admin state changes
288 */
289 struct mutex state_lock;
290
291 /* Protects eswitch mode change that occurs via one or more
292 * user commands, i.e. sriov state change, devlink commands.
293 */
294 struct rw_semaphore mode_lock;
295 atomic64_t user_count;
296
297 struct {
298 bool enabled;
299 u32 root_tsar_id;
300 } qos;
301
302 struct mlx5_esw_offload offloads;
303 int mode;
304 u16 manager_vport;
305 u16 first_host_vport;
306 struct mlx5_esw_functions esw_funcs;
307 struct {
308 u32 large_group_num;
309 } params;
310 struct blocking_notifier_head n_head;
311 };
312
313 void esw_offloads_disable(struct mlx5_eswitch *esw);
314 int esw_offloads_enable(struct mlx5_eswitch *esw);
315 void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw);
316 int esw_offloads_init_reps(struct mlx5_eswitch *esw);
317
318 bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw);
319 int mlx5_esw_offloads_vport_metadata_set(struct mlx5_eswitch *esw, bool enable);
320 u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw);
321 void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata);
322
323 int mlx5_esw_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num,
324 u32 rate_mbps);
325
326 /* E-Switch API */
327 int mlx5_eswitch_init(struct mlx5_core_dev *dev);
328 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
329
330 #define MLX5_ESWITCH_IGNORE_NUM_VFS (-1)
331 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int mode, int num_vfs);
332 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs);
333 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw, bool clear_vf);
334 void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf);
335 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
336 u16 vport, const u8 *mac);
337 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
338 u16 vport, int link_state);
339 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
340 u16 vport, u16 vlan, u8 qos);
341 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
342 u16 vport, bool spoofchk);
343 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
344 u16 vport_num, bool setting);
345 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
346 u32 max_rate, u32 min_rate);
347 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);
348 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);
349 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
350 u16 vport, struct ifla_vf_info *ivi);
351 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
352 u16 vport,
353 struct ifla_vf_stats *vf_stats);
354 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);
355
356 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
357 bool other_vport, void *in);
358
359 struct mlx5_flow_spec;
360 struct mlx5_esw_flow_attr;
361 struct mlx5_termtbl_handle;
362
363 bool
364 mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
365 struct mlx5_flow_attr *attr,
366 struct mlx5_flow_act *flow_act,
367 struct mlx5_flow_spec *spec);
368
369 struct mlx5_flow_handle *
370 mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw,
371 struct mlx5_flow_table *ft,
372 struct mlx5_flow_spec *spec,
373 struct mlx5_esw_flow_attr *attr,
374 struct mlx5_flow_act *flow_act,
375 struct mlx5_flow_destination *dest,
376 int num_dest);
377
378 void
379 mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw,
380 struct mlx5_termtbl_handle *tt);
381
382 void
383 mlx5_eswitch_clear_rule_source_port(struct mlx5_eswitch *esw, struct mlx5_flow_spec *spec);
384
385 struct mlx5_flow_handle *
386 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
387 struct mlx5_flow_spec *spec,
388 struct mlx5_flow_attr *attr);
389 struct mlx5_flow_handle *
390 mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw,
391 struct mlx5_flow_spec *spec,
392 struct mlx5_flow_attr *attr);
393 void
394 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
395 struct mlx5_flow_handle *rule,
396 struct mlx5_flow_attr *attr);
397 void
398 mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw,
399 struct mlx5_flow_handle *rule,
400 struct mlx5_flow_attr *attr);
401
402 struct mlx5_flow_handle *
403 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
404 struct mlx5_flow_destination *dest);
405
406 enum {
407 SET_VLAN_STRIP = BIT(0),
408 SET_VLAN_INSERT = BIT(1)
409 };
410
411 enum mlx5_flow_match_level {
412 MLX5_MATCH_NONE = MLX5_INLINE_MODE_NONE,
413 MLX5_MATCH_L2 = MLX5_INLINE_MODE_L2,
414 MLX5_MATCH_L3 = MLX5_INLINE_MODE_IP,
415 MLX5_MATCH_L4 = MLX5_INLINE_MODE_TCP_UDP,
416 };
417
418 /* current maximum for flow based vport multicasting */
419 #define MLX5_MAX_FLOW_FWD_VPORTS 2
420
421 enum {
422 MLX5_ESW_DEST_ENCAP = BIT(0),
423 MLX5_ESW_DEST_ENCAP_VALID = BIT(1),
424 MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE = BIT(2),
425 };
426
427 enum {
428 MLX5_ESW_ATTR_FLAG_VLAN_HANDLED = BIT(0),
429 MLX5_ESW_ATTR_FLAG_SLOW_PATH = BIT(1),
430 MLX5_ESW_ATTR_FLAG_NO_IN_PORT = BIT(2),
431 MLX5_ESW_ATTR_FLAG_SRC_REWRITE = BIT(3),
432 MLX5_ESW_ATTR_FLAG_SAMPLE = BIT(4),
433 };
434
435 struct mlx5_esw_flow_attr {
436 struct mlx5_eswitch_rep *in_rep;
437 struct mlx5_core_dev *in_mdev;
438 struct mlx5_core_dev *counter_dev;
439
440 int split_count;
441 int out_count;
442
443 __be16 vlan_proto[MLX5_FS_VLAN_DEPTH];
444 u16 vlan_vid[MLX5_FS_VLAN_DEPTH];
445 u8 vlan_prio[MLX5_FS_VLAN_DEPTH];
446 u8 total_vlan;
447 struct {
448 u32 flags;
449 struct mlx5_eswitch_rep *rep;
450 struct mlx5_pkt_reformat *pkt_reformat;
451 struct mlx5_core_dev *mdev;
452 struct mlx5_termtbl_handle *termtbl;
453 int src_port_rewrite_act_id;
454 } dests[MLX5_MAX_FLOW_FWD_VPORTS];
455 struct mlx5_rx_tun_attr *rx_tun_attr;
456 struct mlx5_pkt_reformat *decap_pkt_reformat;
457 struct mlx5_sample_attr *sample;
458 };
459
460 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
461 struct netlink_ext_ack *extack);
462 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
463 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
464 struct netlink_ext_ack *extack);
465 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
466 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink,
467 enum devlink_eswitch_encap_mode encap,
468 struct netlink_ext_ack *extack);
469 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink,
470 enum devlink_eswitch_encap_mode *encap);
471 int mlx5_devlink_port_function_hw_addr_get(struct devlink *devlink,
472 struct devlink_port *port,
473 u8 *hw_addr, int *hw_addr_len,
474 struct netlink_ext_ack *extack);
475 int mlx5_devlink_port_function_hw_addr_set(struct devlink *devlink,
476 struct devlink_port *port,
477 const u8 *hw_addr, int hw_addr_len,
478 struct netlink_ext_ack *extack);
479
480 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);
481
482 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
483 struct mlx5_flow_attr *attr);
484 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
485 struct mlx5_flow_attr *attr);
486 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
487 u16 vport, u16 vlan, u8 qos, u8 set_flags);
488
mlx5_esw_qos_enabled(struct mlx5_eswitch * esw)489 static inline bool mlx5_esw_qos_enabled(struct mlx5_eswitch *esw)
490 {
491 return esw->qos.enabled;
492 }
493
mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev * dev,u8 vlan_depth)494 static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev,
495 u8 vlan_depth)
496 {
497 bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) &&
498 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan);
499
500 if (vlan_depth == 1)
501 return ret;
502
503 return ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) &&
504 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2);
505 }
506
507 bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0,
508 struct mlx5_core_dev *dev1);
509 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
510 struct mlx5_core_dev *dev1);
511
512 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev);
513
514 #define MLX5_DEBUG_ESWITCH_MASK BIT(3)
515
516 #define esw_info(__dev, format, ...) \
517 dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
518
519 #define esw_warn(__dev, format, ...) \
520 dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
521
522 #define esw_debug(dev, format, ...) \
523 mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
524
mlx5_esw_allowed(const struct mlx5_eswitch * esw)525 static inline bool mlx5_esw_allowed(const struct mlx5_eswitch *esw)
526 {
527 return esw && MLX5_ESWITCH_MANAGER(esw->dev);
528 }
529
530 /* The returned number is valid only when the dev is eswitch manager. */
mlx5_eswitch_manager_vport(struct mlx5_core_dev * dev)531 static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev)
532 {
533 return mlx5_core_is_ecpf_esw_manager(dev) ?
534 MLX5_VPORT_ECPF : MLX5_VPORT_PF;
535 }
536
537 static inline bool
mlx5_esw_is_manager_vport(const struct mlx5_eswitch * esw,u16 vport_num)538 mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num)
539 {
540 return esw->manager_vport == vport_num;
541 }
542
mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev * dev)543 static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev)
544 {
545 return mlx5_core_is_ecpf_esw_manager(dev) ?
546 MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF;
547 }
548
mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev * dev)549 static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev)
550 {
551 return mlx5_core_is_ecpf_esw_manager(dev);
552 }
553
554 static inline unsigned int
mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev * dev,u16 vport_num)555 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
556 u16 vport_num)
557 {
558 return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num;
559 }
560
561 static inline u16
mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)562 mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)
563 {
564 return dl_port_index & 0xffff;
565 }
566
567 /* TODO: This mlx5e_tc function shouldn't be called by eswitch */
568 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
569
570 /* Each mark identifies eswitch vport type.
571 * MLX5_ESW_VPT_HOST_FN is used to identify both PF and VF ports using
572 * a single mark.
573 * MLX5_ESW_VPT_VF identifies a SRIOV VF vport.
574 * MLX5_ESW_VPT_SF identifies SF vport.
575 */
576 #define MLX5_ESW_VPT_HOST_FN XA_MARK_0
577 #define MLX5_ESW_VPT_VF XA_MARK_1
578 #define MLX5_ESW_VPT_SF XA_MARK_2
579
580 /* The vport iterator is valid only after vport are initialized in mlx5_eswitch_init.
581 * Borrowed the idea from xa_for_each_marked() but with support for desired last element.
582 */
583
584 #define mlx5_esw_for_each_vport(esw, index, vport) \
585 xa_for_each(&((esw)->vports), index, vport)
586
587 #define mlx5_esw_for_each_entry_marked(xa, index, entry, last, filter) \
588 for (index = 0, entry = xa_find(xa, &index, last, filter); \
589 entry; entry = xa_find_after(xa, &index, last, filter))
590
591 #define mlx5_esw_for_each_vport_marked(esw, index, vport, last, filter) \
592 mlx5_esw_for_each_entry_marked(&((esw)->vports), index, vport, last, filter)
593
594 #define mlx5_esw_for_each_vf_vport(esw, index, vport, last) \
595 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_VF)
596
597 #define mlx5_esw_for_each_host_func_vport(esw, index, vport, last) \
598 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_HOST_FN)
599
600 struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink);
601 struct mlx5_vport *__must_check
602 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num);
603
604 bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num);
605 bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num);
606
607 int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type, void *data);
608
609 int
610 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
611 enum mlx5_eswitch_vport_event enabled_events);
612 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw);
613
614 int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, u16 vport_num,
615 enum mlx5_eswitch_vport_event enabled_events);
616 void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
617
618 int
619 esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw,
620 struct mlx5_vport *vport);
621 void
622 esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw,
623 struct mlx5_vport *vport);
624
625 struct esw_vport_tbl_namespace {
626 int max_fte;
627 int max_num_groups;
628 u32 flags;
629 };
630
631 struct mlx5_vport_tbl_attr {
632 u16 chain;
633 u16 prio;
634 u16 vport;
635 const struct esw_vport_tbl_namespace *vport_ns;
636 };
637
638 struct mlx5_flow_table *
639 mlx5_esw_vporttbl_get(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
640 void
641 mlx5_esw_vporttbl_put(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
642
643 struct mlx5_flow_handle *
644 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag);
645
646 int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num);
647 void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num);
648
649 int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num);
650 void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num);
651
652 int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
653 enum mlx5_eswitch_vport_event enabled_events);
654 void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num);
655
656 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
657 enum mlx5_eswitch_vport_event enabled_events);
658 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs);
659
660 int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, u16 vport_num);
661 void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
662 struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u16 vport_num);
663
664 int mlx5_esw_devlink_sf_port_register(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
665 u16 vport_num, u32 controller, u32 sfnum);
666 void mlx5_esw_devlink_sf_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
667
668 int mlx5_esw_offloads_sf_vport_enable(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
669 u16 vport_num, u32 controller, u32 sfnum);
670 void mlx5_esw_offloads_sf_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
671 int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id);
672
673 int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num);
674 void mlx5_esw_vport_vhca_id_clear(struct mlx5_eswitch *esw, u16 vport_num);
675 int mlx5_eswitch_vhca_id_to_vport(struct mlx5_eswitch *esw, u16 vhca_id, u16 *vport_num);
676
677 /**
678 * mlx5_esw_event_info - Indicates eswitch mode changed/changing.
679 *
680 * @new_mode: New mode of eswitch.
681 */
682 struct mlx5_esw_event_info {
683 u16 new_mode;
684 };
685
686 int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *n);
687 void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *n);
688
689 bool mlx5_esw_hold(struct mlx5_core_dev *dev);
690 void mlx5_esw_release(struct mlx5_core_dev *dev);
691 void mlx5_esw_get(struct mlx5_core_dev *dev);
692 void mlx5_esw_put(struct mlx5_core_dev *dev);
693 int mlx5_esw_try_lock(struct mlx5_eswitch *esw);
694 void mlx5_esw_unlock(struct mlx5_eswitch *esw);
695
696 void esw_vport_change_handle_locked(struct mlx5_vport *vport);
697
698 bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 controller);
699
700 #else /* CONFIG_MLX5_ESWITCH */
701 /* eswitch API stubs */
mlx5_eswitch_init(struct mlx5_core_dev * dev)702 static inline int mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
mlx5_eswitch_cleanup(struct mlx5_eswitch * esw)703 static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
mlx5_eswitch_enable(struct mlx5_eswitch * esw,int num_vfs)704 static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; }
mlx5_eswitch_disable(struct mlx5_eswitch * esw,bool clear_vf)705 static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf) {}
mlx5_esw_lag_prereq(struct mlx5_core_dev * dev0,struct mlx5_core_dev * dev1)706 static inline bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1) { return true; }
mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev * dev)707 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
708 static inline
mlx5_eswitch_set_vport_state(struct mlx5_eswitch * esw,u16 vport,int link_state)709 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
mlx5_esw_query_functions(struct mlx5_core_dev * dev)710 static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
711 {
712 return ERR_PTR(-EOPNOTSUPP);
713 }
714
715 static inline struct mlx5_flow_handle *
esw_add_restore_rule(struct mlx5_eswitch * esw,u32 tag)716 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag)
717 {
718 return ERR_PTR(-EOPNOTSUPP);
719 }
720
721 static inline unsigned int
mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev * dev,u16 vport_num)722 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
723 u16 vport_num)
724 {
725 return vport_num;
726 }
727 #endif /* CONFIG_MLX5_ESWITCH */
728
729 #endif /* __MLX5_ESWITCH_H__ */
730