1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Driver for BCM6358 GPIO unit (pinctrl + GPIO)
4 *
5 * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
6 * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
7 */
8
9 #include <linux/bits.h>
10 #include <linux/gpio/driver.h>
11 #include <linux/kernel.h>
12 #include <linux/of.h>
13 #include <linux/pinctrl/pinmux.h>
14 #include <linux/platform_device.h>
15 #include <linux/regmap.h>
16
17 #include "../pinctrl-utils.h"
18
19 #include "pinctrl-bcm63xx.h"
20
21 #define BCM6358_NUM_GPIOS 40
22
23 #define BCM6358_MODE_REG 0x18
24 #define BCM6358_MODE_MUX_NONE 0
25 #define BCM6358_MODE_MUX_EBI_CS BIT(5)
26 #define BCM6358_MODE_MUX_UART1 BIT(6)
27 #define BCM6358_MODE_MUX_SPI_CS BIT(7)
28 #define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8)
29 #define BCM6358_MODE_MUX_LEGACY_LED BIT(9)
30 #define BCM6358_MODE_MUX_SERIAL_LED BIT(10)
31 #define BCM6358_MODE_MUX_LED BIT(11)
32 #define BCM6358_MODE_MUX_UTOPIA BIT(12)
33 #define BCM6358_MODE_MUX_CLKRST BIT(13)
34 #define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14)
35 #define BCM6358_MODE_MUX_SYS_IRQ BIT(15)
36
37 struct bcm6358_pingroup {
38 const char *name;
39 const unsigned * const pins;
40 const unsigned num_pins;
41
42 const uint16_t mode_val;
43
44 /* non-GPIO function muxes require the gpio direction to be set */
45 const uint16_t direction;
46 };
47
48 struct bcm6358_function {
49 const char *name;
50 const char * const *groups;
51 const unsigned num_groups;
52 };
53
54 struct bcm6358_priv {
55 struct regmap_field *overlays;
56 };
57
58 #define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \
59 { \
60 .number = a, \
61 .name = b, \
62 .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \
63 BCM6358_MODE_MUX_##bit2 | \
64 BCM6358_MODE_MUX_##bit3), \
65 }
66
67 static const struct pinctrl_pin_desc bcm6358_pins[] = {
68 BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
69 BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
70 BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
71 BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
72 PINCTRL_PIN(4, "gpio4"),
73 BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
74 BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
75 BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
76 BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
77 BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
78 BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
79 BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
80 BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
81 BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
82 BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
83 BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
84 PINCTRL_PIN(16, "gpio16"),
85 PINCTRL_PIN(17, "gpio17"),
86 PINCTRL_PIN(18, "gpio18"),
87 PINCTRL_PIN(19, "gpio19"),
88 PINCTRL_PIN(20, "gpio20"),
89 PINCTRL_PIN(21, "gpio21"),
90 BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
91 BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
92 BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
93 BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
94 BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
95 BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
96 BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
97 BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
98 BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
99 BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
100 BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
101 BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
102 PINCTRL_PIN(34, "gpio34"),
103 PINCTRL_PIN(35, "gpio35"),
104 PINCTRL_PIN(36, "gpio36"),
105 PINCTRL_PIN(37, "gpio37"),
106 PINCTRL_PIN(38, "gpio38"),
107 PINCTRL_PIN(39, "gpio39"),
108 };
109
110 static unsigned ebi_cs_grp_pins[] = { 30, 31 };
111
112 static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
113
114 static unsigned spi_cs_grp_pins[] = { 32, 33 };
115
116 static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
117
118 static unsigned serial_led_grp_pins[] = { 6, 7 };
119
120 static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
121
122 static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
123
124 static unsigned utopia_grp_pins[] = {
125 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
126 };
127
128 static unsigned pwm_syn_clk_grp_pins[] = { 8 };
129
130 static unsigned sys_irq_grp_pins[] = { 5 };
131
132 #define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \
133 { \
134 .name = #n, \
135 .pins = n##_pins, \
136 .num_pins = ARRAY_SIZE(n##_pins), \
137 .mode_val = BCM6358_MODE_MUX_##bit, \
138 .direction = dir, \
139 }
140
141 static const struct bcm6358_pingroup bcm6358_groups[] = {
142 BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
143 BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
144 BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
145 BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
146 BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
147 BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
148 BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
149 BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
150 BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
151 BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
152 };
153
154 static const char * const ebi_cs_groups[] = {
155 "ebi_cs_grp"
156 };
157
158 static const char * const uart1_groups[] = {
159 "uart1_grp"
160 };
161
162 static const char * const spi_cs_2_3_groups[] = {
163 "spi_cs_2_3_grp"
164 };
165
166 static const char * const async_modem_groups[] = {
167 "async_modem_grp"
168 };
169
170 static const char * const legacy_led_groups[] = {
171 "legacy_led_grp",
172 };
173
174 static const char * const serial_led_groups[] = {
175 "serial_led_grp",
176 };
177
178 static const char * const led_groups[] = {
179 "led_grp",
180 };
181
182 static const char * const clkrst_groups[] = {
183 "clkrst_grp",
184 };
185
186 static const char * const pwm_syn_clk_groups[] = {
187 "pwm_syn_clk_grp",
188 };
189
190 static const char * const sys_irq_groups[] = {
191 "sys_irq_grp",
192 };
193
194 #define BCM6358_FUN(n) \
195 { \
196 .name = #n, \
197 .groups = n##_groups, \
198 .num_groups = ARRAY_SIZE(n##_groups), \
199 }
200
201 static const struct bcm6358_function bcm6358_funcs[] = {
202 BCM6358_FUN(ebi_cs),
203 BCM6358_FUN(uart1),
204 BCM6358_FUN(spi_cs_2_3),
205 BCM6358_FUN(async_modem),
206 BCM6358_FUN(legacy_led),
207 BCM6358_FUN(serial_led),
208 BCM6358_FUN(led),
209 BCM6358_FUN(clkrst),
210 BCM6358_FUN(pwm_syn_clk),
211 BCM6358_FUN(sys_irq),
212 };
213
bcm6358_pinctrl_get_group_count(struct pinctrl_dev * pctldev)214 static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
215 {
216 return ARRAY_SIZE(bcm6358_groups);
217 }
218
bcm6358_pinctrl_get_group_name(struct pinctrl_dev * pctldev,unsigned group)219 static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
220 unsigned group)
221 {
222 return bcm6358_groups[group].name;
223 }
224
bcm6358_pinctrl_get_group_pins(struct pinctrl_dev * pctldev,unsigned group,const unsigned ** pins,unsigned * num_pins)225 static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
226 unsigned group, const unsigned **pins,
227 unsigned *num_pins)
228 {
229 *pins = bcm6358_groups[group].pins;
230 *num_pins = bcm6358_groups[group].num_pins;
231
232 return 0;
233 }
234
bcm6358_pinctrl_get_func_count(struct pinctrl_dev * pctldev)235 static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
236 {
237 return ARRAY_SIZE(bcm6358_funcs);
238 }
239
bcm6358_pinctrl_get_func_name(struct pinctrl_dev * pctldev,unsigned selector)240 static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
241 unsigned selector)
242 {
243 return bcm6358_funcs[selector].name;
244 }
245
bcm6358_pinctrl_get_groups(struct pinctrl_dev * pctldev,unsigned selector,const char * const ** groups,unsigned * const num_groups)246 static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
247 unsigned selector,
248 const char * const **groups,
249 unsigned * const num_groups)
250 {
251 *groups = bcm6358_funcs[selector].groups;
252 *num_groups = bcm6358_funcs[selector].num_groups;
253
254 return 0;
255 }
256
bcm6358_pinctrl_set_mux(struct pinctrl_dev * pctldev,unsigned selector,unsigned group)257 static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
258 unsigned selector, unsigned group)
259 {
260 struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
261 struct bcm6358_priv *priv = pc->driver_data;
262 const struct bcm6358_pingroup *pg = &bcm6358_groups[group];
263 unsigned int val = pg->mode_val;
264 unsigned int mask = val;
265 unsigned pin;
266
267 for (pin = 0; pin < pg->num_pins; pin++)
268 mask |= (unsigned long)bcm6358_pins[pin].drv_data;
269
270 regmap_field_update_bits(priv->overlays, mask, val);
271
272 for (pin = 0; pin < pg->num_pins; pin++) {
273 struct pinctrl_gpio_range *range;
274 unsigned int hw_gpio = bcm6358_pins[pin].number;
275
276 range = pinctrl_find_gpio_range_from_pin(pctldev, hw_gpio);
277 if (range) {
278 struct gpio_chip *gc = range->gc;
279
280 if (pg->direction & BIT(pin))
281 gc->direction_output(gc, hw_gpio, 0);
282 else
283 gc->direction_input(gc, hw_gpio);
284 }
285 }
286
287 return 0;
288 }
289
bcm6358_gpio_request_enable(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned offset)290 static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
291 struct pinctrl_gpio_range *range,
292 unsigned offset)
293 {
294 struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
295 struct bcm6358_priv *priv = pc->driver_data;
296 unsigned int mask;
297
298 mask = (unsigned long) bcm6358_pins[offset].drv_data;
299 if (!mask)
300 return 0;
301
302 /* disable all functions using this pin */
303 return regmap_field_update_bits(priv->overlays, mask, 0);
304 }
305
306 static struct pinctrl_ops bcm6358_pctl_ops = {
307 .dt_free_map = pinctrl_utils_free_map,
308 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
309 .get_group_name = bcm6358_pinctrl_get_group_name,
310 .get_group_pins = bcm6358_pinctrl_get_group_pins,
311 .get_groups_count = bcm6358_pinctrl_get_group_count,
312 };
313
314 static struct pinmux_ops bcm6358_pmx_ops = {
315 .get_function_groups = bcm6358_pinctrl_get_groups,
316 .get_function_name = bcm6358_pinctrl_get_func_name,
317 .get_functions_count = bcm6358_pinctrl_get_func_count,
318 .gpio_request_enable = bcm6358_gpio_request_enable,
319 .set_mux = bcm6358_pinctrl_set_mux,
320 .strict = true,
321 };
322
323 static const struct bcm63xx_pinctrl_soc bcm6358_soc = {
324 .ngpios = BCM6358_NUM_GPIOS,
325 .npins = ARRAY_SIZE(bcm6358_pins),
326 .pctl_ops = &bcm6358_pctl_ops,
327 .pins = bcm6358_pins,
328 .pmx_ops = &bcm6358_pmx_ops,
329 };
330
bcm6358_pinctrl_probe(struct platform_device * pdev)331 static int bcm6358_pinctrl_probe(struct platform_device *pdev)
332 {
333 struct reg_field overlays = REG_FIELD(BCM6358_MODE_REG, 0, 15);
334 struct device *dev = &pdev->dev;
335 struct bcm63xx_pinctrl *pc;
336 struct bcm6358_priv *priv;
337 int err;
338
339 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
340 if (!priv)
341 return -ENOMEM;
342
343 err = bcm63xx_pinctrl_probe(pdev, &bcm6358_soc, (void *) priv);
344 if (err)
345 return err;
346
347 pc = platform_get_drvdata(pdev);
348
349 priv->overlays = devm_regmap_field_alloc(dev, pc->regs, overlays);
350 if (IS_ERR(priv->overlays))
351 return PTR_ERR(priv->overlays);
352
353 return 0;
354 }
355
356 static const struct of_device_id bcm6358_pinctrl_match[] = {
357 { .compatible = "brcm,bcm6358-pinctrl", },
358 { /* sentinel */ }
359 };
360
361 static struct platform_driver bcm6358_pinctrl_driver = {
362 .probe = bcm6358_pinctrl_probe,
363 .driver = {
364 .name = "bcm6358-pinctrl",
365 .of_match_table = bcm6358_pinctrl_match,
366 },
367 };
368
369 builtin_platform_driver(bcm6358_pinctrl_driver);
370