1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2019 IBM Corp. 3 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6#include <dt-bindings/clock/ast2600-clock.h> 7 8/ { 9 model = "Aspeed BMC"; 10 compatible = "aspeed,ast2600"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 14 15 aliases { 16 i2c0 = &i2c0; 17 i2c1 = &i2c1; 18 i2c2 = &i2c2; 19 i2c3 = &i2c3; 20 i2c4 = &i2c4; 21 i2c5 = &i2c5; 22 i2c6 = &i2c6; 23 i2c7 = &i2c7; 24 i2c8 = &i2c8; 25 i2c9 = &i2c9; 26 i2c10 = &i2c10; 27 i2c11 = &i2c11; 28 i2c12 = &i2c12; 29 i2c13 = &i2c13; 30 i2c14 = &i2c14; 31 i2c15 = &i2c15; 32 serial0 = &uart1; 33 serial1 = &uart2; 34 serial2 = &uart3; 35 serial3 = &uart4; 36 serial4 = &uart5; 37 serial5 = &vuart1; 38 serial6 = &vuart2; 39 }; 40 41 42 cpus { 43 #address-cells = <1>; 44 #size-cells = <0>; 45 enable-method = "aspeed,ast2600-smp"; 46 47 cpu@f00 { 48 compatible = "arm,cortex-a7"; 49 device_type = "cpu"; 50 reg = <0xf00>; 51 }; 52 53 cpu@f01 { 54 compatible = "arm,cortex-a7"; 55 device_type = "cpu"; 56 reg = <0xf01>; 57 }; 58 }; 59 60 timer { 61 compatible = "arm,armv7-timer"; 62 interrupt-parent = <&gic>; 63 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 64 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 65 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 66 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 67 clocks = <&syscon ASPEED_CLK_HPLL>; 68 arm,cpu-registers-not-fw-configured; 69 always-on; 70 }; 71 72 edac: sdram@1e6e0000 { 73 compatible = "aspeed,ast2600-sdram-edac", "syscon"; 74 reg = <0x1e6e0000 0x174>; 75 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 76 }; 77 78 ahb { 79 compatible = "simple-bus"; 80 #address-cells = <1>; 81 #size-cells = <1>; 82 device_type = "soc"; 83 ranges; 84 85 gic: interrupt-controller@40461000 { 86 compatible = "arm,cortex-a7-gic"; 87 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 88 #interrupt-cells = <3>; 89 interrupt-controller; 90 interrupt-parent = <&gic>; 91 reg = <0x40461000 0x1000>, 92 <0x40462000 0x1000>, 93 <0x40464000 0x2000>, 94 <0x40466000 0x2000>; 95 }; 96 97 fmc: spi@1e620000 { 98 reg = < 0x1e620000 0xc4 99 0x20000000 0x10000000 >; 100 #address-cells = <1>; 101 #size-cells = <0>; 102 compatible = "aspeed,ast2600-fmc"; 103 clocks = <&syscon ASPEED_CLK_AHB>; 104 status = "disabled"; 105 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 106 flash@0 { 107 reg = < 0 >; 108 compatible = "jedec,spi-nor"; 109 spi-max-frequency = <50000000>; 110 status = "disabled"; 111 }; 112 flash@1 { 113 reg = < 1 >; 114 compatible = "jedec,spi-nor"; 115 spi-max-frequency = <50000000>; 116 status = "disabled"; 117 }; 118 flash@2 { 119 reg = < 2 >; 120 compatible = "jedec,spi-nor"; 121 spi-max-frequency = <50000000>; 122 status = "disabled"; 123 }; 124 }; 125 126 spi1: spi@1e630000 { 127 reg = < 0x1e630000 0xc4 128 0x30000000 0x10000000 >; 129 #address-cells = <1>; 130 #size-cells = <0>; 131 compatible = "aspeed,ast2600-spi"; 132 clocks = <&syscon ASPEED_CLK_AHB>; 133 status = "disabled"; 134 flash@0 { 135 reg = < 0 >; 136 compatible = "jedec,spi-nor"; 137 spi-max-frequency = <50000000>; 138 status = "disabled"; 139 }; 140 flash@1 { 141 reg = < 1 >; 142 compatible = "jedec,spi-nor"; 143 spi-max-frequency = <50000000>; 144 status = "disabled"; 145 }; 146 }; 147 148 spi2: spi@1e631000 { 149 reg = < 0x1e631000 0xc4 150 0x50000000 0x10000000 >; 151 #address-cells = <1>; 152 #size-cells = <0>; 153 compatible = "aspeed,ast2600-spi"; 154 clocks = <&syscon ASPEED_CLK_AHB>; 155 status = "disabled"; 156 flash@0 { 157 reg = < 0 >; 158 compatible = "jedec,spi-nor"; 159 spi-max-frequency = <50000000>; 160 status = "disabled"; 161 }; 162 flash@1 { 163 reg = < 1 >; 164 compatible = "jedec,spi-nor"; 165 spi-max-frequency = <50000000>; 166 status = "disabled"; 167 }; 168 flash@2 { 169 reg = < 2 >; 170 compatible = "jedec,spi-nor"; 171 spi-max-frequency = <50000000>; 172 status = "disabled"; 173 }; 174 }; 175 176 mdio0: mdio@1e650000 { 177 compatible = "aspeed,ast2600-mdio"; 178 reg = <0x1e650000 0x8>; 179 #address-cells = <1>; 180 #size-cells = <0>; 181 status = "disabled"; 182 pinctrl-names = "default"; 183 pinctrl-0 = <&pinctrl_mdio1_default>; 184 }; 185 186 mdio1: mdio@1e650008 { 187 compatible = "aspeed,ast2600-mdio"; 188 reg = <0x1e650008 0x8>; 189 #address-cells = <1>; 190 #size-cells = <0>; 191 status = "disabled"; 192 pinctrl-names = "default"; 193 pinctrl-0 = <&pinctrl_mdio2_default>; 194 }; 195 196 mdio2: mdio@1e650010 { 197 compatible = "aspeed,ast2600-mdio"; 198 reg = <0x1e650010 0x8>; 199 #address-cells = <1>; 200 #size-cells = <0>; 201 status = "disabled"; 202 pinctrl-names = "default"; 203 pinctrl-0 = <&pinctrl_mdio3_default>; 204 }; 205 206 mdio3: mdio@1e650018 { 207 compatible = "aspeed,ast2600-mdio"; 208 reg = <0x1e650018 0x8>; 209 #address-cells = <1>; 210 #size-cells = <0>; 211 status = "disabled"; 212 pinctrl-names = "default"; 213 pinctrl-0 = <&pinctrl_mdio4_default>; 214 }; 215 216 mac0: ftgmac@1e660000 { 217 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 218 reg = <0x1e660000 0x180>; 219 #address-cells = <1>; 220 #size-cells = <0>; 221 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 222 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 223 status = "disabled"; 224 }; 225 226 mac1: ftgmac@1e680000 { 227 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 228 reg = <0x1e680000 0x180>; 229 #address-cells = <1>; 230 #size-cells = <0>; 231 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 232 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 233 status = "disabled"; 234 }; 235 236 mac2: ftgmac@1e670000 { 237 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 238 reg = <0x1e670000 0x180>; 239 #address-cells = <1>; 240 #size-cells = <0>; 241 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 242 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>; 243 status = "disabled"; 244 }; 245 246 mac3: ftgmac@1e690000 { 247 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 248 reg = <0x1e690000 0x180>; 249 #address-cells = <1>; 250 #size-cells = <0>; 251 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 252 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>; 253 status = "disabled"; 254 }; 255 256 ehci0: usb@1e6a1000 { 257 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 258 reg = <0x1e6a1000 0x100>; 259 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 260 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 261 pinctrl-names = "default"; 262 pinctrl-0 = <&pinctrl_usb2ah_default>; 263 status = "disabled"; 264 }; 265 266 ehci1: usb@1e6a3000 { 267 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 268 reg = <0x1e6a3000 0x100>; 269 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 270 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 271 pinctrl-names = "default"; 272 pinctrl-0 = <&pinctrl_usb2bh_default>; 273 status = "disabled"; 274 }; 275 276 uhci: usb@1e6b0000 { 277 compatible = "aspeed,ast2600-uhci", "generic-uhci"; 278 reg = <0x1e6b0000 0x100>; 279 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 280 #ports = <2>; 281 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 282 status = "disabled"; 283 /* 284 * No default pinmux, it will follow EHCI, use an 285 * explicit pinmux override if EHCI is not enabled. 286 */ 287 }; 288 289 vhub: usb-vhub@1e6a0000 { 290 compatible = "aspeed,ast2600-usb-vhub"; 291 reg = <0x1e6a0000 0x350>; 292 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 293 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 294 aspeed,vhub-downstream-ports = <7>; 295 aspeed,vhub-generic-endpoints = <21>; 296 pinctrl-names = "default"; 297 pinctrl-0 = <&pinctrl_usb2ad_default>; 298 status = "disabled"; 299 }; 300 301 apb { 302 compatible = "simple-bus"; 303 #address-cells = <1>; 304 #size-cells = <1>; 305 ranges; 306 307 syscon: syscon@1e6e2000 { 308 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; 309 reg = <0x1e6e2000 0x1000>; 310 ranges = <0 0x1e6e2000 0x1000>; 311 #address-cells = <1>; 312 #size-cells = <1>; 313 #clock-cells = <1>; 314 #reset-cells = <1>; 315 316 pinctrl: pinctrl { 317 compatible = "aspeed,ast2600-pinctrl"; 318 }; 319 320 silicon-id@14 { 321 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; 322 reg = <0x14 0x4 0x5b0 0x8>; 323 }; 324 325 smp-memram@180 { 326 compatible = "aspeed,ast2600-smpmem"; 327 reg = <0x180 0x40>; 328 }; 329 330 scu_ic0: interrupt-controller@560 { 331 #interrupt-cells = <1>; 332 compatible = "aspeed,ast2600-scu-ic0"; 333 reg = <0x560 0x4>; 334 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 335 interrupt-controller; 336 }; 337 338 scu_ic1: interrupt-controller@570 { 339 #interrupt-cells = <1>; 340 compatible = "aspeed,ast2600-scu-ic1"; 341 reg = <0x570 0x4>; 342 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 343 interrupt-controller; 344 }; 345 }; 346 347 rng: hwrng@1e6e2524 { 348 compatible = "timeriomem_rng"; 349 reg = <0x1e6e2524 0x4>; 350 period = <1>; 351 quality = <100>; 352 }; 353 354 xdma: xdma@1e6e7000 { 355 compatible = "aspeed,ast2600-xdma"; 356 reg = <0x1e6e7000 0x100>; 357 clocks = <&syscon ASPEED_CLK_GATE_BCLK>; 358 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>; 359 reset-names = "device", "root-complex"; 360 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 361 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>; 362 aspeed,pcie-device = "bmc"; 363 aspeed,scu = <&syscon>; 364 status = "disabled"; 365 }; 366 367 gpio0: gpio@1e780000 { 368 #gpio-cells = <2>; 369 gpio-controller; 370 compatible = "aspeed,ast2600-gpio"; 371 reg = <0x1e780000 0x400>; 372 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 373 gpio-ranges = <&pinctrl 0 0 208>; 374 ngpios = <208>; 375 clocks = <&syscon ASPEED_CLK_APB2>; 376 interrupt-controller; 377 #interrupt-cells = <2>; 378 }; 379 380 gpio1: gpio@1e780800 { 381 #gpio-cells = <2>; 382 gpio-controller; 383 compatible = "aspeed,ast2600-gpio"; 384 reg = <0x1e780800 0x800>; 385 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 386 gpio-ranges = <&pinctrl 0 208 36>; 387 ngpios = <36>; 388 clocks = <&syscon ASPEED_CLK_APB1>; 389 interrupt-controller; 390 #interrupt-cells = <2>; 391 }; 392 393 rtc: rtc@1e781000 { 394 compatible = "aspeed,ast2600-rtc"; 395 reg = <0x1e781000 0x18>; 396 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 397 status = "disabled"; 398 }; 399 400 timer: timer@1e782000 { 401 compatible = "aspeed,ast2600-timer"; 402 reg = <0x1e782000 0x90>; 403 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 404 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 405 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 406 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 407 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 408 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 409 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 410 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 411 clocks = <&syscon ASPEED_CLK_APB1>; 412 clock-names = "PCLK"; 413 status = "disabled"; 414 }; 415 416 uart1: serial@1e783000 { 417 compatible = "ns16550a"; 418 reg = <0x1e783000 0x20>; 419 reg-shift = <2>; 420 reg-io-width = <4>; 421 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 422 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 423 resets = <&lpc_reset 4>; 424 no-loopback-test; 425 pinctrl-names = "default"; 426 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; 427 status = "disabled"; 428 }; 429 430 uart5: serial@1e784000 { 431 compatible = "ns16550a"; 432 reg = <0x1e784000 0x1000>; 433 reg-shift = <2>; 434 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 435 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 436 no-loopback-test; 437 }; 438 439 wdt1: watchdog@1e785000 { 440 compatible = "aspeed,ast2600-wdt"; 441 reg = <0x1e785000 0x40>; 442 }; 443 444 wdt2: watchdog@1e785040 { 445 compatible = "aspeed,ast2600-wdt"; 446 reg = <0x1e785040 0x40>; 447 status = "disabled"; 448 }; 449 450 wdt3: watchdog@1e785080 { 451 compatible = "aspeed,ast2600-wdt"; 452 reg = <0x1e785080 0x40>; 453 status = "disabled"; 454 }; 455 456 wdt4: watchdog@1e7850c0 { 457 compatible = "aspeed,ast2600-wdt"; 458 reg = <0x1e7850C0 0x40>; 459 status = "disabled"; 460 }; 461 462 lpc: lpc@1e789000 { 463 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; 464 reg = <0x1e789000 0x1000>; 465 reg-io-width = <4>; 466 467 #address-cells = <1>; 468 #size-cells = <1>; 469 ranges = <0x0 0x1e789000 0x1000>; 470 471 kcs1: kcs@24 { 472 compatible = "aspeed,ast2500-kcs-bmc-v2"; 473 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; 474 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 475 kcs_chan = <1>; 476 status = "disabled"; 477 }; 478 479 kcs2: kcs@28 { 480 compatible = "aspeed,ast2500-kcs-bmc-v2"; 481 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; 482 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 483 status = "disabled"; 484 }; 485 486 kcs3: kcs@2c { 487 compatible = "aspeed,ast2500-kcs-bmc-v2"; 488 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; 489 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 490 status = "disabled"; 491 }; 492 493 kcs4: kcs@114 { 494 compatible = "aspeed,ast2500-kcs-bmc-v2"; 495 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; 496 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 497 status = "disabled"; 498 }; 499 500 lpc_ctrl: lpc-ctrl@80 { 501 compatible = "aspeed,ast2600-lpc-ctrl"; 502 reg = <0x80 0x80>; 503 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 504 status = "disabled"; 505 }; 506 507 lpc_snoop: lpc-snoop@80 { 508 compatible = "aspeed,ast2600-lpc-snoop"; 509 reg = <0x80 0x80>; 510 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 511 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 512 status = "disabled"; 513 }; 514 515 lhc: lhc@a0 { 516 compatible = "aspeed,ast2600-lhc"; 517 reg = <0xa0 0x24 0xc8 0x8>; 518 }; 519 520 lpc_reset: reset-controller@98 { 521 compatible = "aspeed,ast2600-lpc-reset"; 522 reg = <0x98 0x4>; 523 #reset-cells = <1>; 524 }; 525 526 ibt: ibt@140 { 527 compatible = "aspeed,ast2600-ibt-bmc"; 528 reg = <0x140 0x18>; 529 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 530 status = "disabled"; 531 }; 532 }; 533 534 sdc: sdc@1e740000 { 535 compatible = "aspeed,ast2600-sd-controller"; 536 reg = <0x1e740000 0x100>; 537 #address-cells = <1>; 538 #size-cells = <1>; 539 ranges = <0 0x1e740000 0x10000>; 540 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 541 status = "disabled"; 542 543 sdhci0: sdhci@1e740100 { 544 compatible = "aspeed,ast2600-sdhci", "sdhci"; 545 reg = <0x100 0x100>; 546 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 547 sdhci,auto-cmd12; 548 clocks = <&syscon ASPEED_CLK_SDIO>; 549 status = "disabled"; 550 }; 551 552 sdhci1: sdhci@1e740200 { 553 compatible = "aspeed,ast2600-sdhci", "sdhci"; 554 reg = <0x200 0x100>; 555 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 556 sdhci,auto-cmd12; 557 clocks = <&syscon ASPEED_CLK_SDIO>; 558 status = "disabled"; 559 }; 560 }; 561 562 emmc_controller: sdc@1e750000 { 563 compatible = "aspeed,ast2600-sd-controller"; 564 reg = <0x1e750000 0x100>; 565 #address-cells = <1>; 566 #size-cells = <1>; 567 ranges = <0 0x1e750000 0x10000>; 568 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>; 569 status = "disabled"; 570 571 emmc: sdhci@1e750100 { 572 compatible = "aspeed,ast2600-sdhci"; 573 reg = <0x100 0x100>; 574 sdhci,auto-cmd12; 575 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 576 clocks = <&syscon ASPEED_CLK_EMMC>; 577 pinctrl-names = "default"; 578 pinctrl-0 = <&pinctrl_emmc_default>; 579 }; 580 }; 581 582 vuart1: serial@1e787000 { 583 compatible = "aspeed,ast2500-vuart"; 584 reg = <0x1e787000 0x40>; 585 reg-shift = <2>; 586 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 587 clocks = <&syscon ASPEED_CLK_APB1>; 588 no-loopback-test; 589 status = "disabled"; 590 }; 591 592 vuart2: serial@1e788000 { 593 compatible = "aspeed,ast2500-vuart"; 594 reg = <0x1e788000 0x40>; 595 reg-shift = <2>; 596 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&syscon ASPEED_CLK_APB1>; 598 no-loopback-test; 599 status = "disabled"; 600 }; 601 602 uart2: serial@1e78d000 { 603 compatible = "ns16550a"; 604 reg = <0x1e78d000 0x20>; 605 reg-shift = <2>; 606 reg-io-width = <4>; 607 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 608 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 609 resets = <&lpc_reset 5>; 610 no-loopback-test; 611 pinctrl-names = "default"; 612 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 613 status = "disabled"; 614 }; 615 616 uart3: serial@1e78e000 { 617 compatible = "ns16550a"; 618 reg = <0x1e78e000 0x20>; 619 reg-shift = <2>; 620 reg-io-width = <4>; 621 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 622 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 623 resets = <&lpc_reset 6>; 624 no-loopback-test; 625 pinctrl-names = "default"; 626 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 627 status = "disabled"; 628 }; 629 630 uart4: serial@1e78f000 { 631 compatible = "ns16550a"; 632 reg = <0x1e78f000 0x20>; 633 reg-shift = <2>; 634 reg-io-width = <4>; 635 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 636 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 637 resets = <&lpc_reset 7>; 638 no-loopback-test; 639 pinctrl-names = "default"; 640 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>; 641 status = "disabled"; 642 }; 643 644 i2c: bus@1e78a000 { 645 compatible = "simple-bus"; 646 #address-cells = <1>; 647 #size-cells = <1>; 648 ranges = <0 0x1e78a000 0x1000>; 649 }; 650 651 fsim0: fsi@1e79b000 { 652 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 653 reg = <0x1e79b000 0x94>; 654 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 655 pinctrl-names = "default"; 656 pinctrl-0 = <&pinctrl_fsi1_default>; 657 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 658 status = "disabled"; 659 }; 660 661 fsim1: fsi@1e79b100 { 662 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 663 reg = <0x1e79b100 0x94>; 664 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 665 pinctrl-names = "default"; 666 pinctrl-0 = <&pinctrl_fsi2_default>; 667 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 668 status = "disabled"; 669 }; 670 }; 671 }; 672}; 673 674#include "aspeed-g6-pinctrl.dtsi" 675 676&i2c { 677 i2c0: i2c-bus@80 { 678 #address-cells = <1>; 679 #size-cells = <0>; 680 #interrupt-cells = <1>; 681 reg = <0x80 0x80>; 682 compatible = "aspeed,ast2600-i2c-bus"; 683 clocks = <&syscon ASPEED_CLK_APB2>; 684 resets = <&syscon ASPEED_RESET_I2C>; 685 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 686 bus-frequency = <100000>; 687 pinctrl-names = "default"; 688 pinctrl-0 = <&pinctrl_i2c1_default>; 689 status = "disabled"; 690 }; 691 692 i2c1: i2c-bus@100 { 693 #address-cells = <1>; 694 #size-cells = <0>; 695 #interrupt-cells = <1>; 696 reg = <0x100 0x80>; 697 compatible = "aspeed,ast2600-i2c-bus"; 698 clocks = <&syscon ASPEED_CLK_APB2>; 699 resets = <&syscon ASPEED_RESET_I2C>; 700 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 701 bus-frequency = <100000>; 702 pinctrl-names = "default"; 703 pinctrl-0 = <&pinctrl_i2c2_default>; 704 status = "disabled"; 705 }; 706 707 i2c2: i2c-bus@180 { 708 #address-cells = <1>; 709 #size-cells = <0>; 710 #interrupt-cells = <1>; 711 reg = <0x180 0x80>; 712 compatible = "aspeed,ast2600-i2c-bus"; 713 clocks = <&syscon ASPEED_CLK_APB2>; 714 resets = <&syscon ASPEED_RESET_I2C>; 715 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 716 bus-frequency = <100000>; 717 pinctrl-names = "default"; 718 pinctrl-0 = <&pinctrl_i2c3_default>; 719 status = "disabled"; 720 }; 721 722 i2c3: i2c-bus@200 { 723 #address-cells = <1>; 724 #size-cells = <0>; 725 #interrupt-cells = <1>; 726 reg = <0x200 0x80>; 727 compatible = "aspeed,ast2600-i2c-bus"; 728 clocks = <&syscon ASPEED_CLK_APB2>; 729 resets = <&syscon ASPEED_RESET_I2C>; 730 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 731 bus-frequency = <100000>; 732 pinctrl-names = "default"; 733 pinctrl-0 = <&pinctrl_i2c4_default>; 734 status = "disabled"; 735 }; 736 737 i2c4: i2c-bus@280 { 738 #address-cells = <1>; 739 #size-cells = <0>; 740 #interrupt-cells = <1>; 741 reg = <0x280 0x80>; 742 compatible = "aspeed,ast2600-i2c-bus"; 743 clocks = <&syscon ASPEED_CLK_APB2>; 744 resets = <&syscon ASPEED_RESET_I2C>; 745 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 746 bus-frequency = <100000>; 747 pinctrl-names = "default"; 748 pinctrl-0 = <&pinctrl_i2c5_default>; 749 status = "disabled"; 750 }; 751 752 i2c5: i2c-bus@300 { 753 #address-cells = <1>; 754 #size-cells = <0>; 755 #interrupt-cells = <1>; 756 reg = <0x300 0x80>; 757 compatible = "aspeed,ast2600-i2c-bus"; 758 clocks = <&syscon ASPEED_CLK_APB2>; 759 resets = <&syscon ASPEED_RESET_I2C>; 760 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 761 bus-frequency = <100000>; 762 pinctrl-names = "default"; 763 pinctrl-0 = <&pinctrl_i2c6_default>; 764 status = "disabled"; 765 }; 766 767 i2c6: i2c-bus@380 { 768 #address-cells = <1>; 769 #size-cells = <0>; 770 #interrupt-cells = <1>; 771 reg = <0x380 0x80>; 772 compatible = "aspeed,ast2600-i2c-bus"; 773 clocks = <&syscon ASPEED_CLK_APB2>; 774 resets = <&syscon ASPEED_RESET_I2C>; 775 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 776 bus-frequency = <100000>; 777 pinctrl-names = "default"; 778 pinctrl-0 = <&pinctrl_i2c7_default>; 779 status = "disabled"; 780 }; 781 782 i2c7: i2c-bus@400 { 783 #address-cells = <1>; 784 #size-cells = <0>; 785 #interrupt-cells = <1>; 786 reg = <0x400 0x80>; 787 compatible = "aspeed,ast2600-i2c-bus"; 788 clocks = <&syscon ASPEED_CLK_APB2>; 789 resets = <&syscon ASPEED_RESET_I2C>; 790 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 791 bus-frequency = <100000>; 792 pinctrl-names = "default"; 793 pinctrl-0 = <&pinctrl_i2c8_default>; 794 status = "disabled"; 795 }; 796 797 i2c8: i2c-bus@480 { 798 #address-cells = <1>; 799 #size-cells = <0>; 800 #interrupt-cells = <1>; 801 reg = <0x480 0x80>; 802 compatible = "aspeed,ast2600-i2c-bus"; 803 clocks = <&syscon ASPEED_CLK_APB2>; 804 resets = <&syscon ASPEED_RESET_I2C>; 805 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 806 bus-frequency = <100000>; 807 pinctrl-names = "default"; 808 pinctrl-0 = <&pinctrl_i2c9_default>; 809 status = "disabled"; 810 }; 811 812 i2c9: i2c-bus@500 { 813 #address-cells = <1>; 814 #size-cells = <0>; 815 #interrupt-cells = <1>; 816 reg = <0x500 0x80>; 817 compatible = "aspeed,ast2600-i2c-bus"; 818 clocks = <&syscon ASPEED_CLK_APB2>; 819 resets = <&syscon ASPEED_RESET_I2C>; 820 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 821 bus-frequency = <100000>; 822 pinctrl-names = "default"; 823 pinctrl-0 = <&pinctrl_i2c10_default>; 824 status = "disabled"; 825 }; 826 827 i2c10: i2c-bus@580 { 828 #address-cells = <1>; 829 #size-cells = <0>; 830 #interrupt-cells = <1>; 831 reg = <0x580 0x80>; 832 compatible = "aspeed,ast2600-i2c-bus"; 833 clocks = <&syscon ASPEED_CLK_APB2>; 834 resets = <&syscon ASPEED_RESET_I2C>; 835 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 836 bus-frequency = <100000>; 837 pinctrl-names = "default"; 838 pinctrl-0 = <&pinctrl_i2c11_default>; 839 status = "disabled"; 840 }; 841 842 i2c11: i2c-bus@600 { 843 #address-cells = <1>; 844 #size-cells = <0>; 845 #interrupt-cells = <1>; 846 reg = <0x600 0x80>; 847 compatible = "aspeed,ast2600-i2c-bus"; 848 clocks = <&syscon ASPEED_CLK_APB2>; 849 resets = <&syscon ASPEED_RESET_I2C>; 850 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 851 bus-frequency = <100000>; 852 pinctrl-names = "default"; 853 pinctrl-0 = <&pinctrl_i2c12_default>; 854 status = "disabled"; 855 }; 856 857 i2c12: i2c-bus@680 { 858 #address-cells = <1>; 859 #size-cells = <0>; 860 #interrupt-cells = <1>; 861 reg = <0x680 0x80>; 862 compatible = "aspeed,ast2600-i2c-bus"; 863 clocks = <&syscon ASPEED_CLK_APB2>; 864 resets = <&syscon ASPEED_RESET_I2C>; 865 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 866 bus-frequency = <100000>; 867 pinctrl-names = "default"; 868 pinctrl-0 = <&pinctrl_i2c13_default>; 869 status = "disabled"; 870 }; 871 872 i2c13: i2c-bus@700 { 873 #address-cells = <1>; 874 #size-cells = <0>; 875 #interrupt-cells = <1>; 876 reg = <0x700 0x80>; 877 compatible = "aspeed,ast2600-i2c-bus"; 878 clocks = <&syscon ASPEED_CLK_APB2>; 879 resets = <&syscon ASPEED_RESET_I2C>; 880 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 881 bus-frequency = <100000>; 882 pinctrl-names = "default"; 883 pinctrl-0 = <&pinctrl_i2c14_default>; 884 status = "disabled"; 885 }; 886 887 i2c14: i2c-bus@780 { 888 #address-cells = <1>; 889 #size-cells = <0>; 890 #interrupt-cells = <1>; 891 reg = <0x780 0x80>; 892 compatible = "aspeed,ast2600-i2c-bus"; 893 clocks = <&syscon ASPEED_CLK_APB2>; 894 resets = <&syscon ASPEED_RESET_I2C>; 895 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 896 bus-frequency = <100000>; 897 pinctrl-names = "default"; 898 pinctrl-0 = <&pinctrl_i2c15_default>; 899 status = "disabled"; 900 }; 901 902 i2c15: i2c-bus@800 { 903 #address-cells = <1>; 904 #size-cells = <0>; 905 #interrupt-cells = <1>; 906 reg = <0x800 0x80>; 907 compatible = "aspeed,ast2600-i2c-bus"; 908 clocks = <&syscon ASPEED_CLK_APB2>; 909 resets = <&syscon ASPEED_RESET_I2C>; 910 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 911 bus-frequency = <100000>; 912 pinctrl-names = "default"; 913 pinctrl-0 = <&pinctrl_i2c16_default>; 914 status = "disabled"; 915 }; 916}; 917