1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC 4 * applies to AT91SAM9G45, AT91SAM9M10, 5 * AT91SAM9G46, AT91SAM9M11 SoC 6 * 7 * Copyright (C) 2011 Atmel, 8 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> 9 */ 10 11#include <dt-bindings/dma/at91.h> 12#include <dt-bindings/pinctrl/at91.h> 13#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/clock/at91.h> 16 17/ { 18 #address-cells = <1>; 19 #size-cells = <1>; 20 model = "Atmel AT91SAM9G45 family SoC"; 21 compatible = "atmel,at91sam9g45"; 22 interrupt-parent = <&aic>; 23 24 aliases { 25 serial0 = &dbgu; 26 serial1 = &usart0; 27 serial2 = &usart1; 28 serial3 = &usart2; 29 serial4 = &usart3; 30 gpio0 = &pioA; 31 gpio1 = &pioB; 32 gpio2 = &pioC; 33 gpio3 = &pioD; 34 gpio4 = &pioE; 35 tcb0 = &tcb0; 36 tcb1 = &tcb1; 37 i2c0 = &i2c0; 38 i2c1 = &i2c1; 39 ssc0 = &ssc0; 40 ssc1 = &ssc1; 41 pwm0 = &pwm0; 42 }; 43 cpus { 44 #address-cells = <1>; 45 #size-cells = <0>; 46 47 cpu@0 { 48 compatible = "arm,arm926ej-s"; 49 device_type = "cpu"; 50 reg = <0>; 51 }; 52 }; 53 54 memory@70000000 { 55 device_type = "memory"; 56 reg = <0x70000000 0x10000000>; 57 }; 58 59 clocks { 60 slow_xtal: slow_xtal { 61 compatible = "fixed-clock"; 62 #clock-cells = <0>; 63 clock-frequency = <0>; 64 }; 65 66 main_xtal: main_xtal { 67 compatible = "fixed-clock"; 68 #clock-cells = <0>; 69 clock-frequency = <0>; 70 }; 71 72 adc_op_clk: adc_op_clk{ 73 compatible = "fixed-clock"; 74 #clock-cells = <0>; 75 clock-frequency = <300000>; 76 }; 77 }; 78 79 sram: sram@300000 { 80 compatible = "mmio-sram"; 81 reg = <0x00300000 0x10000>; 82 #address-cells = <1>; 83 #size-cells = <1>; 84 ranges = <0 0x00300000 0x10000>; 85 }; 86 87 ahb { 88 compatible = "simple-bus"; 89 #address-cells = <1>; 90 #size-cells = <1>; 91 ranges; 92 93 apb { 94 compatible = "simple-bus"; 95 #address-cells = <1>; 96 #size-cells = <1>; 97 ranges; 98 99 aic: interrupt-controller@fffff000 { 100 #interrupt-cells = <3>; 101 compatible = "atmel,at91rm9200-aic"; 102 interrupt-controller; 103 reg = <0xfffff000 0x200>; 104 atmel,external-irqs = <31>; 105 }; 106 107 ramc0: ramc@ffffe400 { 108 compatible = "atmel,at91sam9g45-ddramc"; 109 reg = <0xffffe400 0x200>; 110 clocks = <&pmc PMC_TYPE_SYSTEM 2>; 111 clock-names = "ddrck"; 112 }; 113 114 ramc1: ramc@ffffe600 { 115 compatible = "atmel,at91sam9g45-ddramc"; 116 reg = <0xffffe600 0x200>; 117 clocks = <&pmc PMC_TYPE_SYSTEM 2>; 118 clock-names = "ddrck"; 119 }; 120 121 smc: smc@ffffe800 { 122 compatible = "atmel,at91sam9260-smc", "syscon"; 123 reg = <0xffffe800 0x200>; 124 }; 125 126 matrix: matrix@ffffea00 { 127 compatible = "atmel,at91sam9g45-matrix", "syscon"; 128 reg = <0xffffea00 0x200>; 129 }; 130 131 pmc: pmc@fffffc00 { 132 compatible = "atmel,at91sam9g45-pmc", "syscon"; 133 reg = <0xfffffc00 0x100>; 134 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 135 #clock-cells = <2>; 136 clocks = <&clk32k>, <&main_xtal>; 137 clock-names = "slow_clk", "main_xtal"; 138 }; 139 140 rstc@fffffd00 { 141 compatible = "atmel,at91sam9g45-rstc"; 142 reg = <0xfffffd00 0x10>; 143 clocks = <&clk32k>; 144 }; 145 146 pit: timer@fffffd30 { 147 compatible = "atmel,at91sam9260-pit"; 148 reg = <0xfffffd30 0xf>; 149 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 150 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 151 }; 152 153 154 shdwc@fffffd10 { 155 compatible = "atmel,at91sam9rl-shdwc"; 156 reg = <0xfffffd10 0x10>; 157 clocks = <&clk32k>; 158 }; 159 160 tcb0: timer@fff7c000 { 161 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 162 #address-cells = <1>; 163 #size-cells = <0>; 164 reg = <0xfff7c000 0x100>; 165 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; 166 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 167 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 168 }; 169 170 tcb1: timer@fffd4000 { 171 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 172 #address-cells = <1>; 173 #size-cells = <0>; 174 reg = <0xfffd4000 0x100>; 175 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; 176 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; 177 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 178 }; 179 180 dma: dma-controller@ffffec00 { 181 compatible = "atmel,at91sam9g45-dma"; 182 reg = <0xffffec00 0x200>; 183 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 184 #dma-cells = <2>; 185 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 186 clock-names = "dma_clk"; 187 }; 188 189 pinctrl@fffff200 { 190 #address-cells = <1>; 191 #size-cells = <1>; 192 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 193 ranges = <0xfffff200 0xfffff200 0xa00>; 194 195 atmel,mux-mask = < 196 /* A B */ 197 0xffffffff 0xffc003ff /* pioA */ 198 0xffffffff 0x800f8f00 /* pioB */ 199 0xffffffff 0x00000e00 /* pioC */ 200 0xffffffff 0xff0c1381 /* pioD */ 201 0xffffffff 0x81ffff81 /* pioE */ 202 >; 203 204 /* shared pinctrl settings */ 205 ac97 { 206 pinctrl_ac97: ac97-0 { 207 atmel,pins = 208 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97RX */ 209 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97TX */ 210 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* AC97FS */ 211 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* AC97CK */ 212 }; 213 }; 214 215 adc0 { 216 pinctrl_adc0_adtrg: adc0_adtrg { 217 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 218 }; 219 pinctrl_adc0_ad0: adc0_ad0 { 220 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 221 }; 222 pinctrl_adc0_ad1: adc0_ad1 { 223 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 224 }; 225 pinctrl_adc0_ad2: adc0_ad2 { 226 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 227 }; 228 pinctrl_adc0_ad3: adc0_ad3 { 229 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 230 }; 231 pinctrl_adc0_ad4: adc0_ad4 { 232 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 233 }; 234 pinctrl_adc0_ad5: adc0_ad5 { 235 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 236 }; 237 pinctrl_adc0_ad6: adc0_ad6 { 238 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 239 }; 240 pinctrl_adc0_ad7: adc0_ad7 { 241 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 242 }; 243 }; 244 245 dbgu { 246 pinctrl_dbgu: dbgu-0 { 247 atmel,pins = 248 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 249 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; 250 }; 251 }; 252 253 i2c0 { 254 pinctrl_i2c0: i2c0-0 { 255 atmel,pins = 256 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */ 257 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */ 258 }; 259 }; 260 261 i2c1 { 262 pinctrl_i2c1: i2c1-0 { 263 atmel,pins = 264 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */ 265 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */ 266 }; 267 }; 268 269 isi { 270 pinctrl_isi_data_0_7: isi-0-data-0-7 { 271 atmel,pins = 272 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */ 273 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */ 274 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */ 275 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */ 276 AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */ 277 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */ 278 AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */ 279 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */ 280 AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */ 281 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */ 282 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */ 283 }; 284 285 pinctrl_isi_data_8_9: isi-0-data-8-9 { 286 atmel,pins = 287 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */ 288 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */ 289 }; 290 291 pinctrl_isi_data_10_11: isi-0-data-10-11 { 292 atmel,pins = 293 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */ 294 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */ 295 }; 296 }; 297 298 usart0 { 299 pinctrl_usart0: usart0-0 { 300 atmel,pins = 301 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 302 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 303 }; 304 305 pinctrl_usart0_rts: usart0_rts-0 { 306 atmel,pins = 307 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */ 308 }; 309 310 pinctrl_usart0_cts: usart0_cts-0 { 311 atmel,pins = 312 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */ 313 }; 314 }; 315 316 usart1 { 317 pinctrl_usart1: usart1-0 { 318 atmel,pins = 319 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 320 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 321 }; 322 323 pinctrl_usart1_rts: usart1_rts-0 { 324 atmel,pins = 325 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */ 326 }; 327 328 pinctrl_usart1_cts: usart1_cts-0 { 329 atmel,pins = 330 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */ 331 }; 332 }; 333 334 usart2 { 335 pinctrl_usart2: usart2-0 { 336 atmel,pins = 337 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 338 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 339 }; 340 341 pinctrl_usart2_rts: usart2_rts-0 { 342 atmel,pins = 343 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */ 344 }; 345 346 pinctrl_usart2_cts: usart2_cts-0 { 347 atmel,pins = 348 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */ 349 }; 350 }; 351 352 usart3 { 353 pinctrl_usart3: usart3-0 { 354 atmel,pins = 355 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 356 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 357 }; 358 359 pinctrl_usart3_rts: usart3_rts-0 { 360 atmel,pins = 361 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */ 362 }; 363 364 pinctrl_usart3_cts: usart3_cts-0 { 365 atmel,pins = 366 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */ 367 }; 368 }; 369 370 nand { 371 pinctrl_nand_rb: nand-rb-0 { 372 atmel,pins = 373 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 374 }; 375 376 pinctrl_nand_cs: nand-cs-0 { 377 atmel,pins = 378 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 379 }; 380 }; 381 382 macb { 383 pinctrl_macb_rmii: macb_rmii-0 { 384 atmel,pins = 385 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */ 386 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */ 387 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ 388 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ 389 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ 390 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ 391 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ 392 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ 393 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ 394 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */ 395 }; 396 397 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 398 atmel,pins = 399 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */ 400 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */ 401 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */ 402 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */ 403 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ 404 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ 405 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */ 406 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ 407 }; 408 }; 409 410 mmc0 { 411 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 412 atmel,pins = 413 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */ 414 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 415 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */ 416 }; 417 418 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 419 atmel,pins = 420 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ 421 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ 422 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ 423 }; 424 425 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { 426 atmel,pins = 427 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ 428 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ 429 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ 430 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */ 431 }; 432 }; 433 434 mmc1 { 435 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { 436 atmel,pins = 437 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */ 438 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */ 439 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */ 440 }; 441 442 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 443 atmel,pins = 444 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ 445 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */ 446 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */ 447 }; 448 449 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 { 450 atmel,pins = 451 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */ 452 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */ 453 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */ 454 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */ 455 }; 456 }; 457 458 ssc0 { 459 pinctrl_ssc0_tx: ssc0_tx-0 { 460 atmel,pins = 461 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */ 462 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */ 463 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */ 464 }; 465 466 pinctrl_ssc0_rx: ssc0_rx-0 { 467 atmel,pins = 468 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */ 469 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */ 470 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */ 471 }; 472 }; 473 474 ssc1 { 475 pinctrl_ssc1_tx: ssc1_tx-0 { 476 atmel,pins = 477 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */ 478 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */ 479 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */ 480 }; 481 482 pinctrl_ssc1_rx: ssc1_rx-0 { 483 atmel,pins = 484 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */ 485 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */ 486 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */ 487 }; 488 }; 489 490 spi0 { 491 pinctrl_spi0: spi0-0 { 492 atmel,pins = 493 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */ 494 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */ 495 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */ 496 }; 497 }; 498 499 spi1 { 500 pinctrl_spi1: spi1-0 { 501 atmel,pins = 502 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */ 503 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */ 504 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */ 505 }; 506 }; 507 508 tcb0 { 509 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 510 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 511 }; 512 513 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 514 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 515 }; 516 517 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 518 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; 519 }; 520 521 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 522 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 523 }; 524 525 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 526 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; 527 }; 528 529 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 530 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 531 }; 532 533 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 534 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 535 }; 536 537 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 538 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 539 }; 540 541 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 542 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; 543 }; 544 }; 545 546 tcb1 { 547 pinctrl_tcb1_tclk0: tcb1_tclk0-0 { 548 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; 549 }; 550 551 pinctrl_tcb1_tclk1: tcb1_tclk1-0 { 552 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 553 }; 554 555 pinctrl_tcb1_tclk2: tcb1_tclk2-0 { 556 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 557 }; 558 559 pinctrl_tcb1_tioa0: tcb1_tioa0-0 { 560 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; 561 }; 562 563 pinctrl_tcb1_tioa1: tcb1_tioa1-0 { 564 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 565 }; 566 567 pinctrl_tcb1_tioa2: tcb1_tioa2-0 { 568 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; 569 }; 570 571 pinctrl_tcb1_tiob0: tcb1_tiob0-0 { 572 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 573 }; 574 575 pinctrl_tcb1_tiob1: tcb1_tiob1-0 { 576 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 577 }; 578 579 pinctrl_tcb1_tiob2: tcb1_tiob2-0 { 580 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 581 }; 582 }; 583 584 fb { 585 pinctrl_fb: fb-0 { 586 atmel,pins = 587 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */ 588 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */ 589 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */ 590 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */ 591 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */ 592 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */ 593 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */ 594 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */ 595 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */ 596 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */ 597 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */ 598 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */ 599 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */ 600 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */ 601 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */ 602 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */ 603 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */ 604 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */ 605 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */ 606 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */ 607 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ 608 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */ 609 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ 610 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ 611 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ 612 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ 613 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ 614 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ 615 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ 616 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ 617 }; 618 }; 619 620 pioA: gpio@fffff200 { 621 compatible = "atmel,at91rm9200-gpio"; 622 reg = <0xfffff200 0x200>; 623 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 624 #gpio-cells = <2>; 625 gpio-controller; 626 interrupt-controller; 627 #interrupt-cells = <2>; 628 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 629 }; 630 631 pioB: gpio@fffff400 { 632 compatible = "atmel,at91rm9200-gpio"; 633 reg = <0xfffff400 0x200>; 634 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 635 #gpio-cells = <2>; 636 gpio-controller; 637 interrupt-controller; 638 #interrupt-cells = <2>; 639 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 640 }; 641 642 pioC: gpio@fffff600 { 643 compatible = "atmel,at91rm9200-gpio"; 644 reg = <0xfffff600 0x200>; 645 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 646 #gpio-cells = <2>; 647 gpio-controller; 648 interrupt-controller; 649 #interrupt-cells = <2>; 650 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 651 }; 652 653 pioD: gpio@fffff800 { 654 compatible = "atmel,at91rm9200-gpio"; 655 reg = <0xfffff800 0x200>; 656 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 657 #gpio-cells = <2>; 658 gpio-controller; 659 interrupt-controller; 660 #interrupt-cells = <2>; 661 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 662 }; 663 664 pioE: gpio@fffffa00 { 665 compatible = "atmel,at91rm9200-gpio"; 666 reg = <0xfffffa00 0x200>; 667 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 668 #gpio-cells = <2>; 669 gpio-controller; 670 interrupt-controller; 671 #interrupt-cells = <2>; 672 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 673 }; 674 }; 675 676 dbgu: serial@ffffee00 { 677 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 678 reg = <0xffffee00 0x200>; 679 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 680 pinctrl-names = "default"; 681 pinctrl-0 = <&pinctrl_dbgu>; 682 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 683 clock-names = "usart"; 684 status = "disabled"; 685 }; 686 687 usart0: serial@fff8c000 { 688 compatible = "atmel,at91sam9260-usart"; 689 reg = <0xfff8c000 0x200>; 690 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 691 atmel,use-dma-rx; 692 atmel,use-dma-tx; 693 pinctrl-names = "default"; 694 pinctrl-0 = <&pinctrl_usart0>; 695 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 696 clock-names = "usart"; 697 status = "disabled"; 698 }; 699 700 usart1: serial@fff90000 { 701 compatible = "atmel,at91sam9260-usart"; 702 reg = <0xfff90000 0x200>; 703 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 704 atmel,use-dma-rx; 705 atmel,use-dma-tx; 706 pinctrl-names = "default"; 707 pinctrl-0 = <&pinctrl_usart1>; 708 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 709 clock-names = "usart"; 710 status = "disabled"; 711 }; 712 713 usart2: serial@fff94000 { 714 compatible = "atmel,at91sam9260-usart"; 715 reg = <0xfff94000 0x200>; 716 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 717 atmel,use-dma-rx; 718 atmel,use-dma-tx; 719 pinctrl-names = "default"; 720 pinctrl-0 = <&pinctrl_usart2>; 721 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 722 clock-names = "usart"; 723 status = "disabled"; 724 }; 725 726 usart3: serial@fff98000 { 727 compatible = "atmel,at91sam9260-usart"; 728 reg = <0xfff98000 0x200>; 729 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>; 730 atmel,use-dma-rx; 731 atmel,use-dma-tx; 732 pinctrl-names = "default"; 733 pinctrl-0 = <&pinctrl_usart3>; 734 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 735 clock-names = "usart"; 736 status = "disabled"; 737 }; 738 739 macb0: ethernet@fffbc000 { 740 compatible = "cdns,at91sam9260-macb", "cdns,macb"; 741 reg = <0xfffbc000 0x100>; 742 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; 743 pinctrl-names = "default"; 744 pinctrl-0 = <&pinctrl_macb_rmii>; 745 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_PERIPHERAL 25>; 746 clock-names = "hclk", "pclk"; 747 status = "disabled"; 748 }; 749 750 trng@fffcc000 { 751 compatible = "atmel,at91sam9g45-trng"; 752 reg = <0xfffcc000 0x100>; 753 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>; 754 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 755 }; 756 757 i2c0: i2c@fff84000 { 758 compatible = "atmel,at91sam9g10-i2c"; 759 reg = <0xfff84000 0x100>; 760 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 761 pinctrl-names = "default"; 762 pinctrl-0 = <&pinctrl_i2c0>; 763 #address-cells = <1>; 764 #size-cells = <0>; 765 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 766 status = "disabled"; 767 }; 768 769 i2c1: i2c@fff88000 { 770 compatible = "atmel,at91sam9g10-i2c"; 771 reg = <0xfff88000 0x100>; 772 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 773 pinctrl-names = "default"; 774 pinctrl-0 = <&pinctrl_i2c1>; 775 #address-cells = <1>; 776 #size-cells = <0>; 777 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 778 status = "disabled"; 779 }; 780 781 ssc0: ssc@fff9c000 { 782 compatible = "atmel,at91sam9g45-ssc"; 783 reg = <0xfff9c000 0x4000>; 784 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 785 pinctrl-names = "default"; 786 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 787 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 788 clock-names = "pclk"; 789 status = "disabled"; 790 }; 791 792 ssc1: ssc@fffa0000 { 793 compatible = "atmel,at91sam9g45-ssc"; 794 reg = <0xfffa0000 0x4000>; 795 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 796 pinctrl-names = "default"; 797 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 798 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; 799 clock-names = "pclk"; 800 status = "disabled"; 801 }; 802 803 ac97: sound@fffac000 { 804 compatible = "atmel,at91sam9263-ac97c"; 805 reg = <0xfffac000 0x4000>; 806 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>; 807 pinctrl-names = "default"; 808 pinctrl-0 = <&pinctrl_ac97>; 809 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 810 clock-names = "ac97_clk"; 811 status = "disabled"; 812 }; 813 814 adc0: adc@fffb0000 { 815 compatible = "atmel,at91sam9g45-adc"; 816 reg = <0xfffb0000 0x100>; 817 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 818 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>; 819 clock-names = "adc_clk", "adc_op_clk"; 820 atmel,adc-channels-used = <0xff>; 821 atmel,adc-vref = <3300>; 822 atmel,adc-startup-time = <40>; 823 }; 824 825 isi@fffb4000 { 826 compatible = "atmel,at91sam9g45-isi"; 827 reg = <0xfffb4000 0x4000>; 828 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>; 829 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>; 830 clock-names = "isi_clk"; 831 status = "disabled"; 832 port { 833 #address-cells = <1>; 834 #size-cells = <0>; 835 }; 836 }; 837 838 pwm0: pwm@fffb8000 { 839 compatible = "atmel,at91sam9rl-pwm"; 840 reg = <0xfffb8000 0x300>; 841 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; 842 #pwm-cells = <3>; 843 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 844 status = "disabled"; 845 }; 846 847 mmc0: mmc@fff80000 { 848 compatible = "atmel,hsmci"; 849 reg = <0xfff80000 0x600>; 850 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 851 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; 852 dma-names = "rxtx"; 853 #address-cells = <1>; 854 #size-cells = <0>; 855 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 856 clock-names = "mci_clk"; 857 status = "disabled"; 858 }; 859 860 mmc1: mmc@fffd0000 { 861 compatible = "atmel,hsmci"; 862 reg = <0xfffd0000 0x600>; 863 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; 864 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>; 865 dma-names = "rxtx"; 866 #address-cells = <1>; 867 #size-cells = <0>; 868 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>; 869 clock-names = "mci_clk"; 870 status = "disabled"; 871 }; 872 873 watchdog@fffffd40 { 874 compatible = "atmel,at91sam9260-wdt"; 875 reg = <0xfffffd40 0x10>; 876 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 877 clocks = <&clk32k>; 878 atmel,watchdog-type = "hardware"; 879 atmel,reset-type = "all"; 880 atmel,dbg-halt; 881 status = "disabled"; 882 }; 883 884 spi0: spi@fffa4000 { 885 #address-cells = <1>; 886 #size-cells = <0>; 887 compatible = "atmel,at91rm9200-spi"; 888 reg = <0xfffa4000 0x200>; 889 interrupts = <14 4 3>; 890 pinctrl-names = "default"; 891 pinctrl-0 = <&pinctrl_spi0>; 892 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 893 clock-names = "spi_clk"; 894 status = "disabled"; 895 }; 896 897 spi1: spi@fffa8000 { 898 #address-cells = <1>; 899 #size-cells = <0>; 900 compatible = "atmel,at91rm9200-spi"; 901 reg = <0xfffa8000 0x200>; 902 interrupts = <15 4 3>; 903 pinctrl-names = "default"; 904 pinctrl-0 = <&pinctrl_spi1>; 905 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 906 clock-names = "spi_clk"; 907 status = "disabled"; 908 }; 909 910 usb2: gadget@fff78000 { 911 compatible = "atmel,at91sam9g45-udc"; 912 reg = <0x00600000 0x80000 913 0xfff78000 0x400>; 914 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; 915 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 916 clock-names = "pclk", "hclk"; 917 status = "disabled"; 918 }; 919 920 clk32k: sckc@fffffd50 { 921 compatible = "atmel,at91sam9x5-sckc"; 922 reg = <0xfffffd50 0x4>; 923 clocks = <&slow_xtal>; 924 #clock-cells = <0>; 925 }; 926 927 rtc@fffffd20 { 928 compatible = "atmel,at91sam9260-rtt"; 929 reg = <0xfffffd20 0x10>; 930 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 931 clocks = <&clk32k>; 932 status = "disabled"; 933 }; 934 935 rtc@fffffdb0 { 936 compatible = "atmel,at91rm9200-rtc"; 937 reg = <0xfffffdb0 0x30>; 938 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 939 clocks = <&clk32k>; 940 status = "disabled"; 941 }; 942 943 gpbr: syscon@fffffd60 { 944 compatible = "atmel,at91sam9260-gpbr", "syscon"; 945 reg = <0xfffffd60 0x10>; 946 status = "disabled"; 947 }; 948 }; 949 950 fb0: fb@500000 { 951 compatible = "atmel,at91sam9g45-lcdc"; 952 reg = <0x00500000 0x1000>; 953 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; 954 pinctrl-names = "default"; 955 pinctrl-0 = <&pinctrl_fb>; 956 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>; 957 clock-names = "hclk", "lcdc_clk"; 958 status = "disabled"; 959 }; 960 961 usb0: ohci@700000 { 962 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 963 reg = <0x00700000 0x100000>; 964 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 965 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>; 966 clock-names = "ohci_clk", "hclk", "uhpck"; 967 status = "disabled"; 968 }; 969 970 usb1: ehci@800000 { 971 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 972 reg = <0x00800000 0x100000>; 973 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 974 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>; 975 clock-names = "usb_clk", "ehci_clk"; 976 status = "disabled"; 977 }; 978 979 ebi: ebi@10000000 { 980 compatible = "atmel,at91sam9g45-ebi"; 981 #address-cells = <2>; 982 #size-cells = <1>; 983 atmel,smc = <&smc>; 984 atmel,matrix = <&matrix>; 985 reg = <0x10000000 0x80000000>; 986 ranges = <0x0 0x0 0x10000000 0x10000000 987 0x1 0x0 0x20000000 0x10000000 988 0x2 0x0 0x30000000 0x10000000 989 0x3 0x0 0x40000000 0x10000000 990 0x4 0x0 0x50000000 0x10000000 991 0x5 0x0 0x60000000 0x10000000>; 992 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 993 status = "disabled"; 994 995 nand_controller: nand-controller { 996 compatible = "atmel,at91sam9g45-nand-controller"; 997 #address-cells = <2>; 998 #size-cells = <1>; 999 ranges; 1000 status = "disabled"; 1001 }; 1002 }; 1003 }; 1004 1005 i2c-gpio-0 { 1006 compatible = "i2c-gpio"; 1007 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */ 1008 &pioA 21 GPIO_ACTIVE_HIGH /* scl */ 1009 >; 1010 i2c-gpio,sda-open-drain; 1011 i2c-gpio,scl-open-drain; 1012 i2c-gpio,delay-us = <5>; /* ~100 kHz */ 1013 #address-cells = <1>; 1014 #size-cells = <0>; 1015 status = "disabled"; 1016 }; 1017}; 1018