1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4 *
5 *  Copyright (C) 2014 Microchip
6 *  Alexandre Belloni <alexandre.belloni@free-electrons.com>
7 */
8
9#include <dt-bindings/pinctrl/at91.h>
10#include <dt-bindings/clock/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/pwm/pwm.h>
14
15/ {
16	#address-cells = <1>;
17	#size-cells = <1>;
18	model = "Atmel AT91SAM9RL family SoC";
19	compatible = "atmel,at91sam9rl", "atmel,at91sam9";
20	interrupt-parent = <&aic>;
21
22	aliases {
23		serial0 = &dbgu;
24		serial1 = &usart0;
25		serial2 = &usart1;
26		serial3 = &usart2;
27		serial4 = &usart3;
28		gpio0 = &pioA;
29		gpio1 = &pioB;
30		gpio2 = &pioC;
31		gpio3 = &pioD;
32		tcb0 = &tcb0;
33		i2c0 = &i2c0;
34		i2c1 = &i2c1;
35		ssc0 = &ssc0;
36		ssc1 = &ssc1;
37		pwm0 = &pwm0;
38	};
39
40	cpus {
41		#address-cells = <1>;
42		#size-cells = <0>;
43
44		cpu@0 {
45			compatible = "arm,arm926ej-s";
46			device_type = "cpu";
47			reg = <0>;
48		};
49	};
50
51	memory@20000000 {
52		device_type = "memory";
53		reg = <0x20000000 0x04000000>;
54	};
55
56	clocks {
57		slow_xtal: slow_xtal {
58			compatible = "fixed-clock";
59			#clock-cells = <0>;
60			clock-frequency = <0>;
61		};
62
63		main_xtal: main_xtal {
64			compatible = "fixed-clock";
65			#clock-cells = <0>;
66			clock-frequency = <0>;
67		};
68
69		adc_op_clk: adc_op_clk{
70			compatible = "fixed-clock";
71			#clock-cells = <0>;
72			clock-frequency = <1000000>;
73		};
74	};
75
76	sram: sram@300000 {
77		compatible = "mmio-sram";
78		reg = <0x00300000 0x10000>;
79		#address-cells = <1>;
80		#size-cells = <1>;
81		ranges = <0 0x00300000 0x10000>;
82	};
83
84	ahb {
85		compatible = "simple-bus";
86		#address-cells = <1>;
87		#size-cells = <1>;
88		ranges;
89
90		fb0: fb@500000 {
91			compatible = "atmel,at91sam9rl-lcdc";
92			reg = <0x00500000 0x1000>;
93			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
94			pinctrl-names = "default";
95			pinctrl-0 = <&pinctrl_fb>;
96			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
97			clock-names = "hclk", "lcdc_clk";
98			status = "disabled";
99		};
100
101		ebi: ebi@10000000 {
102			compatible = "atmel,at91sam9rl-ebi";
103			#address-cells = <2>;
104			#size-cells = <1>;
105			atmel,smc = <&smc>;
106			atmel,matrix = <&matrix>;
107			reg = <0x10000000 0x80000000>;
108			ranges = <0x0 0x0 0x10000000 0x10000000
109				  0x1 0x0 0x20000000 0x10000000
110				  0x2 0x0 0x30000000 0x10000000
111				  0x3 0x0 0x40000000 0x10000000
112				  0x4 0x0 0x50000000 0x10000000
113				  0x5 0x0 0x60000000 0x10000000>;
114			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
115			status = "disabled";
116
117			nand_controller: nand-controller {
118				compatible = "atmel,at91sam9g45-nand-controller";
119				#address-cells = <2>;
120				#size-cells = <1>;
121				ranges;
122				status = "disabled";
123			};
124		};
125
126		apb {
127			compatible = "simple-bus";
128			#address-cells = <1>;
129			#size-cells = <1>;
130			ranges;
131
132			tcb0: timer@fffa0000 {
133				compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
134				#address-cells = <1>;
135				#size-cells = <0>;
136				reg = <0xfffa0000 0x100>;
137				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
138					     <17 IRQ_TYPE_LEVEL_HIGH 0>,
139					     <18 IRQ_TYPE_LEVEL_HIGH 0>;
140				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
141				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
142			};
143
144			mmc0: mmc@fffa4000 {
145				compatible = "atmel,hsmci";
146				reg = <0xfffa4000 0x600>;
147				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
148				#address-cells = <1>;
149				#size-cells = <0>;
150				pinctrl-names = "default";
151				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
152				clock-names = "mci_clk";
153				status = "disabled";
154			};
155
156			i2c0: i2c@fffa8000 {
157				compatible = "atmel,at91sam9260-i2c";
158				reg = <0xfffa8000 0x100>;
159				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
160				#address-cells = <1>;
161				#size-cells = <0>;
162				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
163				status = "disabled";
164			};
165
166			i2c1: i2c@fffac000 {
167				compatible = "atmel,at91sam9260-i2c";
168				reg = <0xfffac000 0x100>;
169				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
170				#address-cells = <1>;
171				#size-cells = <0>;
172				status = "disabled";
173			};
174
175			usart0: serial@fffb0000 {
176				compatible = "atmel,at91sam9260-usart";
177				reg = <0xfffb0000 0x200>;
178				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
179				atmel,use-dma-rx;
180				atmel,use-dma-tx;
181				pinctrl-names = "default";
182				pinctrl-0 = <&pinctrl_usart0>;
183				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
184				clock-names = "usart";
185				status = "disabled";
186			};
187
188			usart1: serial@fffb4000 {
189				compatible = "atmel,at91sam9260-usart";
190				reg = <0xfffb4000 0x200>;
191				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
192				atmel,use-dma-rx;
193				atmel,use-dma-tx;
194				pinctrl-names = "default";
195				pinctrl-0 = <&pinctrl_usart1>;
196				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
197				clock-names = "usart";
198				status = "disabled";
199			};
200
201			usart2: serial@fffb8000 {
202				compatible = "atmel,at91sam9260-usart";
203				reg = <0xfffb8000 0x200>;
204				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
205				atmel,use-dma-rx;
206				atmel,use-dma-tx;
207				pinctrl-names = "default";
208				pinctrl-0 = <&pinctrl_usart2>;
209				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
210				clock-names = "usart";
211				status = "disabled";
212			};
213
214			usart3: serial@fffbc000 {
215				compatible = "atmel,at91sam9260-usart";
216				reg = <0xfffbc000 0x200>;
217				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
218				atmel,use-dma-rx;
219				atmel,use-dma-tx;
220				pinctrl-names = "default";
221				pinctrl-0 = <&pinctrl_usart3>;
222				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
223				clock-names = "usart";
224				status = "disabled";
225			};
226
227			ssc0: ssc@fffc0000 {
228				compatible = "atmel,at91sam9rl-ssc";
229				reg = <0xfffc0000 0x4000>;
230				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
231				pinctrl-names = "default";
232				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
233				status = "disabled";
234			};
235
236			ssc1: ssc@fffc4000 {
237				compatible = "atmel,at91sam9rl-ssc";
238				reg = <0xfffc4000 0x4000>;
239				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
240				pinctrl-names = "default";
241				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
242				status = "disabled";
243			};
244
245			pwm0: pwm@fffc8000 {
246				compatible = "atmel,at91sam9rl-pwm";
247				reg = <0xfffc8000 0x300>;
248				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
249				#pwm-cells = <3>;
250				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
251				clock-names = "pwm_clk";
252				status = "disabled";
253			};
254
255			spi0: spi@fffcc000 {
256				#address-cells = <1>;
257				#size-cells = <0>;
258				compatible = "atmel,at91rm9200-spi";
259				reg = <0xfffcc000 0x200>;
260				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
261				pinctrl-names = "default";
262				pinctrl-0 = <&pinctrl_spi0>;
263				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
264				clock-names = "spi_clk";
265				status = "disabled";
266			};
267
268			adc0: adc@fffd0000 {
269				compatible = "atmel,at91sam9rl-adc";
270				reg = <0xfffd0000 0x100>;
271				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
272				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
273				clock-names = "adc_clk", "adc_op_clk";
274				atmel,adc-use-external-triggers;
275				atmel,adc-channels-used = <0x3f>;
276				atmel,adc-vref = <3300>;
277				atmel,adc-startup-time = <40>;
278			};
279
280			usb0: gadget@fffd4000 {
281				compatible = "atmel,at91sam9rl-udc";
282				reg = <0x00600000 0x100000>,
283				      <0xfffd4000 0x4000>;
284				interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
285				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
286				clock-names = "pclk", "hclk";
287				status = "disabled";
288			};
289
290			dma0: dma-controller@ffffe600 {
291				compatible = "atmel,at91sam9rl-dma";
292				reg = <0xffffe600 0x200>;
293				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
294				#dma-cells = <2>;
295				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
296				clock-names = "dma_clk";
297			};
298
299			ramc0: ramc@ffffea00 {
300				compatible = "atmel,at91sam9260-sdramc";
301				reg = <0xffffea00 0x200>;
302			};
303
304			smc: smc@ffffec00 {
305				compatible = "atmel,at91sam9260-smc", "syscon";
306				reg = <0xffffec00 0x200>;
307			};
308
309			matrix: matrix@ffffee00 {
310				compatible = "atmel,at91sam9rl-matrix", "syscon";
311				reg = <0xffffee00 0x200>;
312			};
313
314			aic: interrupt-controller@fffff000 {
315				#interrupt-cells = <3>;
316				compatible = "atmel,at91rm9200-aic";
317				interrupt-controller;
318				reg = <0xfffff000 0x200>;
319				atmel,external-irqs = <31>;
320			};
321
322			dbgu: serial@fffff200 {
323				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
324				reg = <0xfffff200 0x200>;
325				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
326				pinctrl-names = "default";
327				pinctrl-0 = <&pinctrl_dbgu>;
328				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
329				clock-names = "usart";
330				status = "disabled";
331			};
332
333			pinctrl@fffff400 {
334				#address-cells = <1>;
335				#size-cells = <1>;
336				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
337				ranges = <0xfffff400 0xfffff400 0x800>;
338
339				atmel,mux-mask =
340					/*    A         B     */
341					<0xffffffff 0xe05c6738>,  /* pioA */
342					<0xffffffff 0x0000c780>,  /* pioB */
343					<0xffffffff 0xe3ffff0e>,  /* pioC */
344					<0x003fffff 0x0001ff3c>;  /* pioD */
345
346				/* shared pinctrl settings */
347				adc0 {
348					pinctrl_adc0_ts: adc0_ts-0 {
349						atmel,pins =
350							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
351							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
352							<AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
353							<AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
354					};
355
356					pinctrl_adc0_ad0: adc0_ad0-0 {
357						atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
358					};
359
360					pinctrl_adc0_ad1: adc0_ad1-0 {
361						atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
362					};
363
364					pinctrl_adc0_ad2: adc0_ad2-0 {
365						atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
366					};
367
368					pinctrl_adc0_ad3: adc0_ad3-0 {
369						atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
370					};
371
372					pinctrl_adc0_ad4: adc0_ad4-0 {
373						atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
374					};
375
376					pinctrl_adc0_ad5: adc0_ad5-0 {
377						atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
378					};
379
380					pinctrl_adc0_adtrg: adc0_adtrg-0 {
381						atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
382					};
383				};
384
385				dbgu {
386					pinctrl_dbgu: dbgu-0 {
387						atmel,pins =
388							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
389							<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
390					};
391				};
392
393				ebi {
394					pinctrl_ebi_addr_nand: ebi-addr-0 {
395						atmel,pins =
396							<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
397							<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
398					};
399				};
400
401				fb {
402					pinctrl_fb: fb-0 {
403						atmel,pins =
404							<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
405							<AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
406							<AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
407							<AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
408							<AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
409							<AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
410							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
411							<AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
412							<AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
413							<AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
414							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
415							<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
416							<AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
417							<AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
418							<AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
419							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
420							<AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
421							<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
422							<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
423							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
424							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
425					};
426				};
427
428				i2c_gpio0 {
429					pinctrl_i2c_gpio0: i2c_gpio0-0 {
430						atmel,pins =
431							<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
432							<AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
433					};
434				};
435
436				i2c_gpio1 {
437					pinctrl_i2c_gpio1: i2c_gpio1-0 {
438						atmel,pins =
439							<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
440							<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
441					};
442				};
443
444				mmc0 {
445					pinctrl_mmc0_clk: mmc0_clk-0 {
446						atmel,pins =
447							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
448					};
449
450					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
451						atmel,pins =
452							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
453							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
454					};
455
456					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
457						atmel,pins =
458							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
459							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
460							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
461					};
462				};
463
464				nand {
465					pinctrl_nand_rb: nand-rb-0 {
466						atmel,pins =
467							<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
468					};
469
470					pinctrl_nand_cs: nand-cs-0 {
471						atmel,pins =
472							<AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
473					};
474
475					pinctrl_nand_oe_we: nand-oe-we-0 {
476						atmel,pins =
477							<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
478							<AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
479					};
480				};
481
482				pwm0 {
483					pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
484						atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
485					};
486
487					pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
488						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
489					};
490
491					pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
492						atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
493					};
494
495					pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
496						atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
497					};
498
499					pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
500						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
501					};
502
503					pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
504						atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
505					};
506
507					pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
508						atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
509					};
510
511					pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
512						atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
513					};
514
515					pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
516						atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
517					};
518
519					pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
520						atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
521					};
522
523					pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
524						atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
525					};
526				};
527
528				spi0 {
529					pinctrl_spi0: spi0-0 {
530						atmel,pins =
531							<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
532							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
533							<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
534					};
535				};
536
537				ssc0 {
538					pinctrl_ssc0_tx: ssc0_tx-0 {
539						atmel,pins =
540							<AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
541							<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
542							<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
543					};
544
545					pinctrl_ssc0_rx: ssc0_rx-0 {
546						atmel,pins =
547							<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
548							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549							<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
550					};
551				};
552
553				ssc1 {
554					pinctrl_ssc1_tx: ssc1_tx-0 {
555						atmel,pins =
556							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
557							<AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
558							<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
559					};
560
561					pinctrl_ssc1_rx: ssc1_rx-0 {
562						atmel,pins =
563							<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
564							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
565							<AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
566					};
567				};
568
569				tcb0 {
570					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
571						atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
572					};
573
574					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
575						atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
576					};
577
578					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
579						atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
580					};
581
582					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
583						atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
584					};
585
586					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
587						atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
588					};
589
590					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
591						atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
592					};
593
594					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
595						atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
596					};
597
598					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
599						atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
600					};
601
602					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
603						atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
604					};
605				};
606
607				usart0 {
608					pinctrl_usart0: usart0-0 {
609						atmel,pins =
610							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
611							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
612					};
613
614					pinctrl_usart0_rts: usart0_rts-0 {
615						atmel,pins =
616							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
617					};
618
619					pinctrl_usart0_cts: usart0_cts-0 {
620						atmel,pins =
621							<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
622					};
623
624					pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
625						atmel,pins =
626							<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
627							<AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
628					};
629
630					pinctrl_usart0_dcd: usart0_dcd-0 {
631						atmel,pins =
632							<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
633					};
634
635					pinctrl_usart0_ri: usart0_ri-0 {
636						atmel,pins =
637							<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
638					};
639
640					pinctrl_usart0_sck: usart0_sck-0 {
641						atmel,pins =
642							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
643					};
644				};
645
646				usart1 {
647					pinctrl_usart1: usart1-0 {
648						atmel,pins =
649							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
650							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
651					};
652
653					pinctrl_usart1_rts: usart1_rts-0 {
654						atmel,pins =
655							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
656					};
657
658					pinctrl_usart1_cts: usart1_cts-0 {
659						atmel,pins =
660							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
661					};
662
663					pinctrl_usart1_sck: usart1_sck-0 {
664						atmel,pins =
665							<AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
666					};
667				};
668
669				usart2 {
670					pinctrl_usart2: usart2-0 {
671						atmel,pins =
672							<AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
673							<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
674					};
675
676					pinctrl_usart2_rts: usart2_rts-0 {
677						atmel,pins =
678							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
679					};
680
681					pinctrl_usart2_cts: usart2_cts-0 {
682						atmel,pins =
683							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
684					};
685
686					pinctrl_usart2_sck: usart2_sck-0 {
687						atmel,pins =
688							<AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
689					};
690				};
691
692				usart3 {
693					pinctrl_usart3: usart3-0 {
694						atmel,pins =
695							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
696							<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
697					};
698
699					pinctrl_usart3_rts: usart3_rts-0 {
700						atmel,pins =
701							<AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
702					};
703
704					pinctrl_usart3_cts: usart3_cts-0 {
705						atmel,pins =
706							<AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
707					};
708
709					pinctrl_usart3_sck: usart3_sck-0 {
710						atmel,pins =
711							<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
712					};
713				};
714
715				pioA: gpio@fffff400 {
716					compatible = "atmel,at91rm9200-gpio";
717					reg = <0xfffff400 0x200>;
718					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
719					#gpio-cells = <2>;
720					gpio-controller;
721					interrupt-controller;
722					#interrupt-cells = <2>;
723					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
724				};
725
726				pioB: gpio@fffff600 {
727					compatible = "atmel,at91rm9200-gpio";
728					reg = <0xfffff600 0x200>;
729					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
730					#gpio-cells = <2>;
731					gpio-controller;
732					interrupt-controller;
733					#interrupt-cells = <2>;
734					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
735				};
736
737				pioC: gpio@fffff800 {
738					compatible = "atmel,at91rm9200-gpio";
739					reg = <0xfffff800 0x200>;
740					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
741					#gpio-cells = <2>;
742					gpio-controller;
743					interrupt-controller;
744					#interrupt-cells = <2>;
745					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
746				};
747
748				pioD: gpio@fffffa00 {
749					compatible = "atmel,at91rm9200-gpio";
750					reg = <0xfffffa00 0x200>;
751					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
752					#gpio-cells = <2>;
753					gpio-controller;
754					interrupt-controller;
755					#interrupt-cells = <2>;
756					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
757				};
758			};
759
760			pmc: pmc@fffffc00 {
761				compatible = "atmel,at91sam9rl-pmc", "syscon";
762				reg = <0xfffffc00 0x100>;
763				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
764				#clock-cells = <2>;
765				clocks = <&clk32k>, <&main_xtal>;
766				clock-names = "slow_clk", "main_xtal";
767			};
768
769			rstc@fffffd00 {
770				compatible = "atmel,at91sam9260-rstc";
771				reg = <0xfffffd00 0x10>;
772				clocks = <&clk32k>;
773			};
774
775			shdwc@fffffd10 {
776				compatible = "atmel,at91sam9260-shdwc";
777				reg = <0xfffffd10 0x10>;
778				clocks = <&clk32k>;
779			};
780
781			pit: timer@fffffd30 {
782				compatible = "atmel,at91sam9260-pit";
783				reg = <0xfffffd30 0xf>;
784				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
785				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
786			};
787
788			watchdog@fffffd40 {
789				compatible = "atmel,at91sam9260-wdt";
790				reg = <0xfffffd40 0x10>;
791				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
792				clocks = <&clk32k>;
793				status = "disabled";
794			};
795
796			clk32k: sckc@fffffd50 {
797				compatible = "atmel,at91sam9x5-sckc";
798				reg = <0xfffffd50 0x4>;
799				clocks = <&slow_xtal>;
800				#clock-cells = <0>;
801			};
802
803			rtc@fffffd20 {
804				compatible = "atmel,at91sam9260-rtt";
805				reg = <0xfffffd20 0x10>;
806				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
807				clocks = <&clk32k>;
808				status = "disabled";
809			};
810
811			gpbr: syscon@fffffd60 {
812				compatible = "atmel,at91sam9260-gpbr", "syscon";
813				reg = <0xfffffd60 0x10>;
814				status = "disabled";
815			};
816
817			rtc@fffffe00 {
818				compatible = "atmel,at91rm9200-rtc";
819				reg = <0xfffffe00 0x40>;
820				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
821				clocks = <&clk32k>;
822				status = "disabled";
823			};
824
825		};
826	};
827
828	i2c-gpio-0 {
829		compatible = "i2c-gpio";
830		gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
831			<&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
832		i2c-gpio,sda-open-drain;
833		i2c-gpio,scl-open-drain;
834		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
835		#address-cells = <1>;
836		#size-cells = <0>;
837		pinctrl-names = "default";
838		pinctrl-0 = <&pinctrl_i2c_gpio0>;
839		status = "disabled";
840	};
841
842	i2c-gpio-1 {
843		compatible = "i2c-gpio";
844		gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
845			<&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
846		i2c-gpio,sda-open-drain;
847		i2c-gpio,scl-open-drain;
848		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
849		#address-cells = <1>;
850		#size-cells = <0>;
851		pinctrl-names = "default";
852		pinctrl-0 = <&pinctrl_i2c_gpio1>;
853		status = "disabled";
854	};
855};
856