1// SPDX-License-Identifier: GPL-2.0+ 2// 3// Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 4 5#include <dt-bindings/gpio/gpio.h> 6#include "imx25-pinfunc.h" 7 8/ { 9 #address-cells = <1>; 10 #size-cells = <1>; 11 /* 12 * The decompressor and also some bootloaders rely on a 13 * pre-existing /chosen node to be available to insert the 14 * command line and merge other ATAGS info. 15 */ 16 chosen {}; 17 18 aliases { 19 ethernet0 = &fec; 20 gpio0 = &gpio1; 21 gpio1 = &gpio2; 22 gpio2 = &gpio3; 23 gpio3 = &gpio4; 24 i2c0 = &i2c1; 25 i2c1 = &i2c2; 26 i2c2 = &i2c3; 27 mmc0 = &esdhc1; 28 mmc1 = &esdhc2; 29 pwm0 = &pwm1; 30 pwm1 = &pwm2; 31 pwm2 = &pwm3; 32 pwm3 = &pwm4; 33 serial0 = &uart1; 34 serial1 = &uart2; 35 serial2 = &uart3; 36 serial3 = &uart4; 37 serial4 = &uart5; 38 spi0 = &spi1; 39 spi1 = &spi2; 40 spi2 = &spi3; 41 usb0 = &usbotg; 42 usb1 = &usbhost1; 43 }; 44 45 cpus { 46 #address-cells = <1>; 47 #size-cells = <0>; 48 49 cpu@0 { 50 compatible = "arm,arm926ej-s"; 51 device_type = "cpu"; 52 reg = <0>; 53 }; 54 }; 55 56 asic: asic-interrupt-controller@68000000 { 57 compatible = "fsl,imx25-asic", "fsl,avic"; 58 interrupt-controller; 59 #interrupt-cells = <1>; 60 reg = <0x68000000 0x8000000>; 61 }; 62 63 clocks { 64 osc { 65 compatible = "fsl,imx-osc", "fixed-clock"; 66 #clock-cells = <0>; 67 clock-frequency = <24000000>; 68 }; 69 }; 70 71 soc { 72 #address-cells = <1>; 73 #size-cells = <1>; 74 compatible = "simple-bus"; 75 interrupt-parent = <&asic>; 76 ranges; 77 78 bus@43f00000 { /* AIPS1 */ 79 compatible = "fsl,aips-bus", "simple-bus"; 80 #address-cells = <1>; 81 #size-cells = <1>; 82 reg = <0x43f00000 0x100000>; 83 ranges; 84 85 aips1: bridge@43f00000 { 86 compatible = "fsl,imx25-aips"; 87 reg = <0x43f00000 0x4000>; 88 }; 89 90 i2c1: i2c@43f80000 { 91 #address-cells = <1>; 92 #size-cells = <0>; 93 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 94 reg = <0x43f80000 0x4000>; 95 clocks = <&clks 48>; 96 clock-names = ""; 97 interrupts = <3>; 98 status = "disabled"; 99 }; 100 101 i2c3: i2c@43f84000 { 102 #address-cells = <1>; 103 #size-cells = <0>; 104 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 105 reg = <0x43f84000 0x4000>; 106 clocks = <&clks 48>; 107 clock-names = ""; 108 interrupts = <10>; 109 status = "disabled"; 110 }; 111 112 can1: can@43f88000 { 113 compatible = "fsl,imx25-flexcan"; 114 reg = <0x43f88000 0x4000>; 115 interrupts = <43>; 116 clocks = <&clks 75>, <&clks 75>; 117 clock-names = "ipg", "per"; 118 status = "disabled"; 119 }; 120 121 can2: can@43f8c000 { 122 compatible = "fsl,imx25-flexcan"; 123 reg = <0x43f8c000 0x4000>; 124 interrupts = <44>; 125 clocks = <&clks 76>, <&clks 76>; 126 clock-names = "ipg", "per"; 127 status = "disabled"; 128 }; 129 130 uart1: serial@43f90000 { 131 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 132 reg = <0x43f90000 0x4000>; 133 interrupts = <45>; 134 clocks = <&clks 120>, <&clks 57>; 135 clock-names = "ipg", "per"; 136 status = "disabled"; 137 }; 138 139 uart2: serial@43f94000 { 140 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 141 reg = <0x43f94000 0x4000>; 142 interrupts = <32>; 143 clocks = <&clks 121>, <&clks 57>; 144 clock-names = "ipg", "per"; 145 status = "disabled"; 146 }; 147 148 i2c2: i2c@43f98000 { 149 #address-cells = <1>; 150 #size-cells = <0>; 151 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 152 reg = <0x43f98000 0x4000>; 153 clocks = <&clks 48>; 154 clock-names = ""; 155 interrupts = <4>; 156 status = "disabled"; 157 }; 158 159 owire@43f9c000 { 160 #address-cells = <1>; 161 #size-cells = <0>; 162 reg = <0x43f9c000 0x4000>; 163 clocks = <&clks 51>; 164 clock-names = ""; 165 interrupts = <2>; 166 status = "disabled"; 167 }; 168 169 spi1: spi@43fa4000 { 170 #address-cells = <1>; 171 #size-cells = <0>; 172 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 173 reg = <0x43fa4000 0x4000>; 174 clocks = <&clks 78>, <&clks 78>; 175 clock-names = "ipg", "per"; 176 interrupts = <14>; 177 status = "disabled"; 178 }; 179 180 kpp: kpp@43fa8000 { 181 #address-cells = <1>; 182 #size-cells = <0>; 183 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp"; 184 reg = <0x43fa8000 0x4000>; 185 clocks = <&clks 102>; 186 clock-names = ""; 187 interrupts = <24>; 188 status = "disabled"; 189 }; 190 191 iomuxc: iomuxc@43fac000 { 192 compatible = "fsl,imx25-iomuxc"; 193 reg = <0x43fac000 0x4000>; 194 }; 195 196 audmux: audmux@43fb0000 { 197 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux"; 198 reg = <0x43fb0000 0x4000>; 199 status = "disabled"; 200 }; 201 }; 202 203 spba@50000000 { 204 compatible = "fsl,spba-bus", "simple-bus"; 205 #address-cells = <1>; 206 #size-cells = <1>; 207 reg = <0x50000000 0x40000>; 208 ranges; 209 210 spi3: spi@50004000 { 211 #address-cells = <1>; 212 #size-cells = <0>; 213 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 214 reg = <0x50004000 0x4000>; 215 interrupts = <0>; 216 clocks = <&clks 80>, <&clks 80>; 217 clock-names = "ipg", "per"; 218 status = "disabled"; 219 }; 220 221 uart4: serial@50008000 { 222 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 223 reg = <0x50008000 0x4000>; 224 interrupts = <5>; 225 clocks = <&clks 123>, <&clks 57>; 226 clock-names = "ipg", "per"; 227 status = "disabled"; 228 }; 229 230 uart3: serial@5000c000 { 231 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 232 reg = <0x5000c000 0x4000>; 233 interrupts = <18>; 234 clocks = <&clks 122>, <&clks 57>; 235 clock-names = "ipg", "per"; 236 status = "disabled"; 237 }; 238 239 spi2: spi@50010000 { 240 #address-cells = <1>; 241 #size-cells = <0>; 242 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 243 reg = <0x50010000 0x4000>; 244 clocks = <&clks 79>, <&clks 79>; 245 clock-names = "ipg", "per"; 246 interrupts = <13>; 247 status = "disabled"; 248 }; 249 250 ssi2: ssi@50014000 { 251 #sound-dai-cells = <0>; 252 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 253 reg = <0x50014000 0x4000>; 254 interrupts = <11>; 255 clocks = <&clks 118>; 256 clock-names = "ipg"; 257 dmas = <&sdma 24 1 0>, 258 <&sdma 25 1 0>; 259 dma-names = "rx", "tx"; 260 fsl,fifo-depth = <15>; 261 status = "disabled"; 262 }; 263 264 esai@50018000 { 265 reg = <0x50018000 0x4000>; 266 interrupts = <7>; 267 }; 268 269 uart5: serial@5002c000 { 270 compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 271 reg = <0x5002c000 0x4000>; 272 interrupts = <40>; 273 clocks = <&clks 124>, <&clks 57>; 274 clock-names = "ipg", "per"; 275 status = "disabled"; 276 }; 277 278 tscadc: tscadc@50030000 { 279 compatible = "fsl,imx25-tsadc"; 280 reg = <0x50030000 0xc>; 281 interrupts = <46>; 282 clocks = <&clks 119>; 283 clock-names = "ipg"; 284 interrupt-controller; 285 #interrupt-cells = <1>; 286 #address-cells = <1>; 287 #size-cells = <1>; 288 status = "disabled"; 289 ranges; 290 291 adc: adc@50030800 { 292 compatible = "fsl,imx25-gcq"; 293 reg = <0x50030800 0x60>; 294 interrupt-parent = <&tscadc>; 295 interrupts = <1>; 296 #address-cells = <1>; 297 #size-cells = <0>; 298 status = "disabled"; 299 }; 300 301 tsc: tcq@50030400 { 302 compatible = "fsl,imx25-tcq"; 303 reg = <0x50030400 0x60>; 304 interrupt-parent = <&tscadc>; 305 interrupts = <0>; 306 fsl,wires = <4>; 307 status = "disabled"; 308 }; 309 }; 310 311 ssi1: ssi@50034000 { 312 #sound-dai-cells = <0>; 313 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 314 reg = <0x50034000 0x4000>; 315 interrupts = <12>; 316 clocks = <&clks 117>; 317 clock-names = "ipg"; 318 dmas = <&sdma 28 1 0>, 319 <&sdma 29 1 0>; 320 dma-names = "rx", "tx"; 321 fsl,fifo-depth = <15>; 322 status = "disabled"; 323 }; 324 325 fec: ethernet@50038000 { 326 compatible = "fsl,imx25-fec"; 327 reg = <0x50038000 0x4000>; 328 interrupts = <57>; 329 clocks = <&clks 88>, <&clks 65>; 330 clock-names = "ipg", "ahb"; 331 status = "disabled"; 332 }; 333 }; 334 335 bus@53f00000 { /* AIPS2 */ 336 compatible = "fsl,aips-bus", "simple-bus"; 337 #address-cells = <1>; 338 #size-cells = <1>; 339 reg = <0x53f00000 0x100000>; 340 ranges; 341 342 aips2: bridge@53f00000 { 343 compatible = "fsl,imx25-aips"; 344 reg = <0x53f00000 0x4000>; 345 }; 346 347 clks: ccm@53f80000 { 348 compatible = "fsl,imx25-ccm"; 349 reg = <0x53f80000 0x4000>; 350 interrupts = <31>; 351 #clock-cells = <1>; 352 }; 353 354 gpt4: timer@53f84000 { 355 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 356 reg = <0x53f84000 0x4000>; 357 clocks = <&clks 95>, <&clks 47>; 358 clock-names = "ipg", "per"; 359 interrupts = <1>; 360 }; 361 362 gpt3: timer@53f88000 { 363 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 364 reg = <0x53f88000 0x4000>; 365 clocks = <&clks 94>, <&clks 47>; 366 clock-names = "ipg", "per"; 367 interrupts = <29>; 368 }; 369 370 gpt2: timer@53f8c000 { 371 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 372 reg = <0x53f8c000 0x4000>; 373 clocks = <&clks 93>, <&clks 47>; 374 clock-names = "ipg", "per"; 375 interrupts = <53>; 376 }; 377 378 gpt1: timer@53f90000 { 379 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 380 reg = <0x53f90000 0x4000>; 381 clocks = <&clks 92>, <&clks 47>; 382 clock-names = "ipg", "per"; 383 interrupts = <54>; 384 }; 385 386 epit1: timer@53f94000 { 387 compatible = "fsl,imx25-epit"; 388 reg = <0x53f94000 0x4000>; 389 clocks = <&clks 83>, <&clks 43>; 390 clock-names = "ipg", "per"; 391 interrupts = <28>; 392 }; 393 394 epit2: timer@53f98000 { 395 compatible = "fsl,imx25-epit"; 396 reg = <0x53f98000 0x4000>; 397 clocks = <&clks 84>, <&clks 43>; 398 clock-names = "ipg", "per"; 399 interrupts = <27>; 400 }; 401 402 gpio4: gpio@53f9c000 { 403 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 404 reg = <0x53f9c000 0x4000>; 405 interrupts = <23>; 406 gpio-controller; 407 #gpio-cells = <2>; 408 interrupt-controller; 409 #interrupt-cells = <2>; 410 }; 411 412 pwm2: pwm@53fa0000 { 413 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 414 #pwm-cells = <3>; 415 reg = <0x53fa0000 0x4000>; 416 clocks = <&clks 106>, <&clks 52>; 417 clock-names = "ipg", "per"; 418 interrupts = <36>; 419 }; 420 421 gpio3: gpio@53fa4000 { 422 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 423 reg = <0x53fa4000 0x4000>; 424 interrupts = <16>; 425 gpio-controller; 426 #gpio-cells = <2>; 427 interrupt-controller; 428 #interrupt-cells = <2>; 429 }; 430 431 pwm3: pwm@53fa8000 { 432 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 433 #pwm-cells = <3>; 434 reg = <0x53fa8000 0x4000>; 435 clocks = <&clks 107>, <&clks 52>; 436 clock-names = "ipg", "per"; 437 interrupts = <41>; 438 }; 439 440 scc: crypto@53fac000 { 441 compatible = "fsl,imx25-scc"; 442 reg = <0x53fac000 0x4000>; 443 clocks = <&clks 111>; 444 clock-names = "ipg"; 445 interrupts = <49>, <50>; 446 interrupt-names = "scm", "smn"; 447 }; 448 449 rngb: rngb@53fb0000 { 450 compatible = "fsl,imx25-rngb"; 451 reg = <0x53fb0000 0x4000>; 452 clocks = <&clks 109>; 453 interrupts = <22>; 454 }; 455 456 esdhc1: mmc@53fb4000 { 457 compatible = "fsl,imx25-esdhc"; 458 reg = <0x53fb4000 0x4000>; 459 interrupts = <9>; 460 clocks = <&clks 86>, <&clks 63>, <&clks 45>; 461 clock-names = "ipg", "ahb", "per"; 462 status = "disabled"; 463 }; 464 465 esdhc2: mmc@53fb8000 { 466 compatible = "fsl,imx25-esdhc"; 467 reg = <0x53fb8000 0x4000>; 468 interrupts = <8>; 469 clocks = <&clks 87>, <&clks 64>, <&clks 46>; 470 clock-names = "ipg", "ahb", "per"; 471 status = "disabled"; 472 }; 473 474 lcdc: lcdc@53fbc000 { 475 compatible = "fsl,imx25-fb", "fsl,imx21-fb"; 476 reg = <0x53fbc000 0x4000>; 477 interrupts = <39>; 478 clocks = <&clks 103>, <&clks 66>, <&clks 49>; 479 clock-names = "ipg", "ahb", "per"; 480 status = "disabled"; 481 }; 482 483 slcdc@53fc0000 { 484 reg = <0x53fc0000 0x4000>; 485 interrupts = <38>; 486 status = "disabled"; 487 }; 488 489 pwm4: pwm@53fc8000 { 490 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 491 #pwm-cells = <3>; 492 reg = <0x53fc8000 0x4000>; 493 clocks = <&clks 108>, <&clks 52>; 494 clock-names = "ipg", "per"; 495 interrupts = <42>; 496 }; 497 498 gpio1: gpio@53fcc000 { 499 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 500 reg = <0x53fcc000 0x4000>; 501 interrupts = <52>; 502 gpio-controller; 503 #gpio-cells = <2>; 504 interrupt-controller; 505 #interrupt-cells = <2>; 506 }; 507 508 gpio2: gpio@53fd0000 { 509 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 510 reg = <0x53fd0000 0x4000>; 511 interrupts = <51>; 512 gpio-controller; 513 #gpio-cells = <2>; 514 interrupt-controller; 515 #interrupt-cells = <2>; 516 }; 517 518 sdma: sdma@53fd4000 { 519 compatible = "fsl,imx25-sdma"; 520 reg = <0x53fd4000 0x4000>; 521 clocks = <&clks 112>, <&clks 68>; 522 clock-names = "ipg", "ahb"; 523 #dma-cells = <3>; 524 interrupts = <34>; 525 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin"; 526 }; 527 528 watchdog@53fdc000 { 529 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; 530 reg = <0x53fdc000 0x4000>; 531 clocks = <&clks 126>; 532 clock-names = ""; 533 interrupts = <55>; 534 }; 535 536 pwm1: pwm@53fe0000 { 537 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 538 #pwm-cells = <3>; 539 reg = <0x53fe0000 0x4000>; 540 clocks = <&clks 105>, <&clks 52>; 541 clock-names = "ipg", "per"; 542 interrupts = <26>; 543 }; 544 545 iim: efuse@53ff0000 { 546 compatible = "fsl,imx25-iim", "fsl,imx27-iim"; 547 reg = <0x53ff0000 0x4000>; 548 interrupts = <19>; 549 clocks = <&clks 99>; 550 }; 551 552 usbotg: usb@53ff4000 { 553 compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 554 reg = <0x53ff4000 0x0200>; 555 interrupts = <37>; 556 clocks = <&clks 9>, <&clks 70>, <&clks 8>; 557 clock-names = "ipg", "ahb", "per"; 558 fsl,usbmisc = <&usbmisc 0>; 559 fsl,usbphy = <&usbphy0>; 560 phy_type = "utmi"; 561 dr_mode = "otg"; 562 status = "disabled"; 563 }; 564 565 usbhost1: usb@53ff4400 { 566 compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 567 reg = <0x53ff4400 0x0200>; 568 interrupts = <35>; 569 clocks = <&clks 9>, <&clks 70>, <&clks 8>; 570 clock-names = "ipg", "ahb", "per"; 571 fsl,usbmisc = <&usbmisc 1>; 572 fsl,usbphy = <&usbphy1>; 573 maximum-speed = "full-speed"; 574 phy_type = "serial"; 575 dr_mode = "host"; 576 status = "disabled"; 577 }; 578 579 usbmisc: usbmisc@53ff4600 { 580 #index-cells = <1>; 581 compatible = "fsl,imx25-usbmisc"; 582 reg = <0x53ff4600 0x00f>; 583 }; 584 585 dryice@53ffc000 { 586 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc"; 587 reg = <0x53ffc000 0x4000>; 588 clocks = <&clks 81>; 589 clock-names = "ipg"; 590 interrupts = <25 56>; 591 }; 592 }; 593 594 iram: sram@78000000 { 595 compatible = "mmio-sram"; 596 reg = <0x78000000 0x20000>; 597 }; 598 599 emi@80000000 { 600 compatible = "fsl,emi-bus", "simple-bus"; 601 #address-cells = <1>; 602 #size-cells = <1>; 603 reg = <0x80000000 0x3b002000>; 604 ranges; 605 606 nfc: nand@bb000000 { 607 #address-cells = <1>; 608 #size-cells = <1>; 609 610 compatible = "fsl,imx25-nand"; 611 reg = <0xbb000000 0x2000>; 612 clocks = <&clks 50>; 613 clock-names = ""; 614 interrupts = <33>; 615 status = "disabled"; 616 }; 617 }; 618 }; 619 620 usbphy { 621 compatible = "simple-bus"; 622 #address-cells = <1>; 623 #size-cells = <0>; 624 625 usbphy0: usb-phy@0 { 626 reg = <0>; 627 compatible = "usb-nop-xceiv"; 628 #phy-cells = <0>; 629 }; 630 631 usbphy1: usb-phy@1 { 632 reg = <1>; 633 compatible = "usb-nop-xceiv"; 634 #phy-cells = <0>; 635 }; 636 }; 637}; 638