1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> 4 */ 5 6#include "imx27-eukrea-cpuimx27.dtsi" 7 8/ { 9 model = "Eukrea MBIMXSD27"; 10 compatible = "eukrea,mbimxsd27-baseboard", "eukrea,cpuimx27", "fsl,imx27"; 11 12 display0: CMO-QVGA { 13 model = "CMO-QVGA"; 14 bits-per-pixel = <16>; 15 fsl,pcr = <0xfad08b80>; 16 17 display-timings { 18 native-mode = <&timing0>; 19 timing0: 320x240 { 20 clock-frequency = <6500000>; 21 hactive = <320>; 22 vactive = <240>; 23 hback-porch = <20>; 24 hsync-len = <30>; 25 hfront-porch = <38>; 26 vback-porch = <4>; 27 vsync-len = <3>; 28 vfront-porch = <15>; 29 }; 30 }; 31 }; 32 33 backlight { 34 compatible = "gpio-backlight"; 35 pinctrl-names = "default"; 36 pinctrl-0 = <&pinctrl_backlight>; 37 gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; 38 }; 39 40 leds { 41 compatible = "gpio-leds"; 42 pinctrl-names = "default"; 43 pinctrl-0 = <&pinctrl_gpioleds>; 44 45 led1 { 46 label = "system::live"; 47 gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; 48 linux,default-trigger = "heartbeat"; 49 }; 50 51 led2 { 52 label = "system::user"; 53 gpios = <&gpio6 19 GPIO_ACTIVE_LOW>; 54 }; 55 }; 56 57 regulators { 58 #address-cells = <1>; 59 #size-cells = <0>; 60 compatible = "simple-bus"; 61 62 reg_lcd: regulator@0 { 63 pinctrl-names = "default"; 64 pinctrl-0 = <&pinctrl_lcdreg>; 65 compatible = "regulator-fixed"; 66 reg = <0>; 67 regulator-name = "LCD"; 68 regulator-min-microvolt = <5000000>; 69 regulator-max-microvolt = <5000000>; 70 gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>; 71 enable-active-high; 72 }; 73 }; 74}; 75 76&cspi1 { 77 pinctrl-0 = <&pinctrl_cspi1>; 78 cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; 79 status = "okay"; 80 81 ads7846@0 { 82 compatible = "ti,ads7846"; 83 pinctrl-names = "default"; 84 pinctrl-0 = <&pinctrl_touch>; 85 reg = <0>; 86 interrupts = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>; 87 spi-cpol; 88 spi-max-frequency = <1500000>; 89 ti,keep-vref-on; 90 }; 91}; 92 93&fb { 94 pinctrl-names = "default"; 95 pinctrl-0 = <&pinctrl_imxfb>; 96 display = <&display0>; 97 lcd-supply = <®_lcd>; 98 fsl,dmacr = <0x00040060>; 99 fsl,lscr1 = <0x00120300>; 100 fsl,lpccr = <0x00a903ff>; 101 status = "okay"; 102}; 103 104&i2c1 { 105 codec: codec@1a { 106 compatible = "ti,tlv320aic23"; 107 reg = <0x1a>; 108 }; 109}; 110 111&kpp { 112 linux,keymap = < 113 MATRIX_KEY(0, 0, KEY_UP) 114 MATRIX_KEY(0, 1, KEY_DOWN) 115 MATRIX_KEY(1, 0, KEY_RIGHT) 116 MATRIX_KEY(1, 1, KEY_LEFT) 117 >; 118 status = "okay"; 119}; 120 121&sdhci1 { 122 pinctrl-names = "default"; 123 pinctrl-0 = <&pinctrl_sdhc1>; 124 bus-width = <4>; 125 status = "okay"; 126}; 127 128&ssi1 { 129 pinctrl-names = "default"; 130 pinctrl-0 = <&pinctrl_ssi1>; 131 codec-handle = <&codec>; 132 status = "okay"; 133}; 134 135&uart1 { 136 uart-has-rtscts; 137 pinctrl-names = "default"; 138 pinctrl-0 = <&pinctrl_uart1>; 139 status = "okay"; 140}; 141 142&uart2 { 143 uart-has-rtscts; 144 pinctrl-names = "default"; 145 pinctrl-0 = <&pinctrl_uart2>; 146 status = "okay"; 147}; 148 149&uart3 { 150 uart-has-rtscts; 151 pinctrl-names = "default"; 152 pinctrl-0 = <&pinctrl_uart3>; 153 status = "okay"; 154}; 155 156&iomuxc { 157 imx27-eukrea-cpuimx27-baseboard { 158 pinctrl_cspi1: cspi1grp { 159 fsl,pins = < 160 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0 161 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0 162 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0 163 MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* CS0 */ 164 >; 165 }; 166 167 pinctrl_backlight: backlightgrp { 168 fsl,pins = < 169 MX27_PAD_PWMO__GPIO5_5 0x0 170 >; 171 }; 172 173 pinctrl_gpioleds: gpioledsgrp { 174 fsl,pins = < 175 MX27_PAD_PC_PWRON__GPIO6_16 0x0 176 MX27_PAD_PC_CD2_B__GPIO6_19 0x0 177 >; 178 }; 179 180 pinctrl_imxfb: imxfbgrp { 181 fsl,pins = < 182 MX27_PAD_LD0__LD0 0x0 183 MX27_PAD_LD1__LD1 0x0 184 MX27_PAD_LD2__LD2 0x0 185 MX27_PAD_LD3__LD3 0x0 186 MX27_PAD_LD4__LD4 0x0 187 MX27_PAD_LD5__LD5 0x0 188 MX27_PAD_LD6__LD6 0x0 189 MX27_PAD_LD7__LD7 0x0 190 MX27_PAD_LD8__LD8 0x0 191 MX27_PAD_LD9__LD9 0x0 192 MX27_PAD_LD10__LD10 0x0 193 MX27_PAD_LD11__LD11 0x0 194 MX27_PAD_LD12__LD12 0x0 195 MX27_PAD_LD13__LD13 0x0 196 MX27_PAD_LD14__LD14 0x0 197 MX27_PAD_LD15__LD15 0x0 198 MX27_PAD_LD16__LD16 0x0 199 MX27_PAD_LD17__LD17 0x0 200 MX27_PAD_CONTRAST__CONTRAST 0x0 201 MX27_PAD_OE_ACD__OE_ACD 0x0 202 MX27_PAD_HSYNC__HSYNC 0x0 203 MX27_PAD_VSYNC__VSYNC 0x0 204 >; 205 }; 206 207 pinctrl_lcdreg: lcdreggrp { 208 fsl,pins = < 209 MX27_PAD_CLS__GPIO1_25 0x0 210 >; 211 }; 212 213 pinctrl_sdhc1: sdhc1grp { 214 fsl,pins = < 215 MX27_PAD_SD1_CLK__SD1_CLK 0x0 216 MX27_PAD_SD1_CMD__SD1_CMD 0x0 217 MX27_PAD_SD1_D0__SD1_D0 0x0 218 MX27_PAD_SD1_D1__SD1_D1 0x0 219 MX27_PAD_SD1_D2__SD1_D2 0x0 220 MX27_PAD_SD1_D3__SD1_D3 0x0 221 >; 222 }; 223 224 pinctrl_ssi1: ssi1grp { 225 fsl,pins = < 226 MX27_PAD_SSI4_CLK__SSI4_CLK 0x0 227 MX27_PAD_SSI4_FS__SSI4_FS 0x0 228 MX27_PAD_SSI4_RXDAT__SSI4_RXDAT 0x1 229 MX27_PAD_SSI4_TXDAT__SSI4_TXDAT 0x1 230 >; 231 }; 232 233 pinctrl_touch: touchgrp { 234 fsl,pins = < 235 MX27_PAD_CSPI1_RDY__GPIO4_25 0x0 /* IRQ */ 236 >; 237 }; 238 239 pinctrl_uart1: uart1grp { 240 fsl,pins = < 241 MX27_PAD_UART1_TXD__UART1_TXD 0x0 242 MX27_PAD_UART1_RXD__UART1_RXD 0x0 243 MX27_PAD_UART1_CTS__UART1_CTS 0x0 244 MX27_PAD_UART1_RTS__UART1_RTS 0x0 245 >; 246 }; 247 248 pinctrl_uart2: uart2grp { 249 fsl,pins = < 250 MX27_PAD_UART2_TXD__UART2_TXD 0x0 251 MX27_PAD_UART2_RXD__UART2_RXD 0x0 252 MX27_PAD_UART2_CTS__UART2_CTS 0x0 253 MX27_PAD_UART2_RTS__UART2_RTS 0x0 254 >; 255 }; 256 257 pinctrl_uart3: uart3grp { 258 fsl,pins = < 259 MX27_PAD_UART3_TXD__UART3_TXD 0x0 260 MX27_PAD_UART3_RXD__UART3_RXD 0x0 261 MX27_PAD_UART3_CTS__UART3_CTS 0x0 262 MX27_PAD_UART3_RTS__UART3_RTS 0x0 263 >; 264 }; 265 }; 266}; 267