1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2019 Marek Vasut <marex@denx.de>
4 */
5
6/dts-v1/;
7#include "imx53-m53.dtsi"
8
9/ {
10	model = "MENLO M53 EMBEDDED DEVICE";
11	compatible = "menlo,m53menlo", "fsl,imx53";
12
13	gpio-keys {
14		compatible = "gpio-keys";
15		pinctrl-0 = <&pinctrl_power_button>;
16		pinctrl-names = "default";
17
18		power-button {
19			label = "Power button";
20			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
21			linux,code = <KEY_POWER>;
22		};
23	};
24
25	gpio-poweroff {
26		compatible = "gpio-poweroff";
27		pinctrl-0 = <&pinctrl_power_out>;
28		pinctrl-names = "default";
29		gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
30	};
31
32	leds {
33		compatible = "gpio-leds";
34		pinctrl-names = "default";
35		pinctrl-0 = <&pinctrl_led>;
36
37		user1 {
38			label = "TestLed601";
39			gpios = <&gpio6 1 GPIO_ACTIVE_HIGH>;
40			linux,default-trigger = "mmc0";
41		};
42
43		user2 {
44			label = "TestLed602";
45			gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;
46			linux,default-trigger = "heartbeat";
47		};
48
49		eth {
50			label = "EthLedYe";
51			gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
52			linux,default-trigger = "netdev";
53		};
54	};
55
56	panel {
57		compatible = "edt,etm0700g0dh6";
58		pinctrl-0 = <&pinctrl_display_gpio>;
59		enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
60
61		port {
62			panel_in: endpoint {
63				remote-endpoint = <&lvds0_out>;
64			};
65		};
66	};
67
68	beeper {
69		compatible = "gpio-beeper";
70		pinctrl-0 = <&pinctrl_beeper>;
71		gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;
72	};
73
74	reg_usbh1_vbus: regulator-usbh1-vbus {
75		compatible = "regulator-fixed";
76		regulator-name = "vbus";
77		regulator-min-microvolt = <5000000>;
78		regulator-max-microvolt = <5000000>;
79		gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
80		enable-active-high;
81	};
82};
83
84&can1 {
85	pinctrl-names = "default";
86	pinctrl-0 = <&pinctrl_can1>;
87	status = "okay";
88};
89
90&can2 {
91	pinctrl-names = "default";
92	pinctrl-0 = <&pinctrl_can2>;
93	status = "okay";
94};
95
96&clks {
97	assigned-clocks = <&clks IMX5_CLK_CKO1_SEL>,
98			  <&clks IMX5_CLK_CKO1_PODF>,
99			  <&clks IMX5_CLK_CKO1>;
100	assigned-clock-parents = <&clks IMX5_CLK_AHB>;
101	assigned-clock-rates = <133333334>, <33333334>, <33333334>;
102};
103
104&ecspi2 {
105	pinctrl-names = "default";
106	pinctrl-0 = <&pinctrl_ecspi2>;
107	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, <&gpio2 27 GPIO_ACTIVE_LOW>;
108	status = "okay";
109
110	spidev@0 {
111		compatible = "menlo,m53cpld";
112		spi-max-frequency = <25000000>;
113		reg = <0>;
114	};
115
116	spidev@1 {
117		compatible = "menlo,m53cpld";
118		spi-max-frequency = <25000000>;
119		reg = <1>;
120	};
121};
122
123&esdhc1 {
124	pinctrl-names = "default";
125	pinctrl-0 = <&pinctrl_esdhc1>;
126	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
127	wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
128	status = "okay";
129};
130
131&fec {
132	pinctrl-names = "default";
133	pinctrl-0 = <&pinctrl_fec>;
134	phy-mode = "rmii";
135	phy-reset-gpios = <&gpio7 7 GPIO_ACTIVE_LOW>;
136	status = "okay";
137};
138
139&gpio1 {
140	gpio-line-names =
141		"", "", "", "",
142		"", "", "", "",
143		"", "", "", "",
144		"", "", "", "",
145		"", "", "", "",
146		"", "", "", "",
147		"", "", "", "",
148		"", "", "", "";
149};
150
151&gpio2 {
152	gpio-line-names =
153		"", "", "", "",
154		"", "", "", "",
155		"TestPin_SV2_3", "", "", "",
156		"", "", "", "",
157		"", "", "", "",
158		"", "", "", "",
159		"", "", "", "",
160		"", "", "", "";
161};
162
163&gpio3 {
164	gpio-line-names =
165		"", "", "", "",
166		"", "", "", "",
167		"", "", "", "",
168		"", "", "", "",
169		"", "", "", "",
170		"", "", "", "",
171		"CPLD_JTAG_TDI", "CPLD_JTAG_TMS", "", "",
172		"", "CPLD_JTAG_TDO", "", "";
173};
174
175&gpio5 {
176	gpio-line-names =
177		"", "", "", "",
178		"", "", "", "",
179		"", "", "", "",
180		"", "", "", "",
181		"", "", "CPLD_JTAG_TCK", "KBD_intK",
182		"CPLD_int", "CPLD_JTAG_internal", "CPLD_D[0]", "CPLD_D[1]",
183		"CPLD_D[2]", "CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]",
184		"CPLD_D[6]", "CPLD_D[7]", "DISP_reset", "KBD_intI";
185};
186
187&gpio6 {
188	gpio-line-names =
189		"", "", "", "",
190		"CPLD_reset", "", "", "",
191		"", "", "", "",
192		"", "", "", "",
193		"", "", "", "",
194		"", "", "", "",
195		"", "", "", "",
196		"", "", "", "";
197};
198
199&gpio7 {
200	gpio-line-names =
201		"", "", "", "",
202		"", "", "", "",
203		"", "", "", "",
204		"", "USB-OTG_OverCurrent", "", "",
205		"", "", "", "",
206		"", "", "", "",
207		"", "", "", "",
208		"", "", "", "";
209};
210
211&i2c1 {
212	pinctrl-names = "default";
213	pinctrl-0 = <&pinctrl_i2c1>;
214	status = "okay";
215
216	touchscreen@38 {
217		compatible = "edt,edt-ft5x06";
218		reg = <0x38>;
219		pinctrl-names = "default";
220		pinctrl-0 = <&pinctrl_edt_ft5x06>;
221		interrupt-parent = <&gpio6>;
222		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
223		reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
224		wake-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
225	};
226
227	eeprom@50 {
228		compatible = "atmel,24c64";
229		reg = <0x50>;
230		pagesize = <32>;
231	};
232
233	dac@60 {
234		compatible = "microchip,mcp4725";
235		reg = <0x60>;
236	};
237};
238
239&i2c2 {
240	touchscreen@41 {
241		status = "disabled";
242	};
243};
244
245&i2c3 {
246	pinctrl-names = "default";
247	pinctrl-0 = <&pinctrl_i2c3>;
248	status = "okay";
249};
250
251&iomuxc {
252	pinctrl-names = "default";
253	pinctrl-0 = <&pinctrl_hog>;
254
255	imx53-m53evk {
256		hoggrp {
257			fsl,pins = <
258				MX53_PAD_GPIO_19__CCM_CLKO		0x1e4
259				MX53_PAD_CSI0_DATA_EN__GPIO5_20		0x1e4
260				MX53_PAD_CSI0_DAT4__GPIO5_22		0x1e4
261				MX53_PAD_CSI0_DAT5__GPIO5_23		0x1c4
262				MX53_PAD_CSI0_DAT6__GPIO5_24		0x1e4
263				MX53_PAD_CSI0_DAT7__GPIO5_25		0x1e4
264				MX53_PAD_CSI0_DAT8__GPIO5_26		0x1e4
265				MX53_PAD_CSI0_DAT9__GPIO5_27		0x1c4
266				MX53_PAD_CSI0_DAT10__GPIO5_28		0x1e4
267				MX53_PAD_CSI0_DAT11__GPIO5_29		0x1e4
268				MX53_PAD_PATA_DATA11__GPIO2_11		0x1e4
269				MX53_PAD_EIM_D24__GPIO3_24		0x1e4
270				MX53_PAD_EIM_D25__GPIO3_25		0x1e4
271				MX53_PAD_EIM_D29__GPIO3_29		0x1e4
272				MX53_PAD_CSI0_PIXCLK__GPIO5_18		0x1e4
273				MX53_PAD_CSI0_VSYNC__GPIO5_21		0x1e4
274				MX53_PAD_CSI0_DAT18__GPIO6_4		0x1c4
275				MX53_PAD_PATA_DATA8__GPIO2_8		0x1e4
276			>;
277		};
278
279		pinctrl_led: ledgrp {
280			fsl,pins = <
281				MX53_PAD_CSI0_DAT15__GPIO6_1		0x1c4
282				MX53_PAD_CSI0_DAT16__GPIO6_2		0x1c4
283			>;
284		};
285
286		pinctrl_beeper: beepergrp {
287			fsl,pins = <
288				MX53_PAD_CSI0_DAT17__GPIO6_3		0x1c4
289			>;
290		};
291
292		pinctrl_can1: can1grp {
293			fsl,pins = <
294				MX53_PAD_GPIO_7__CAN1_TXCAN		0x1c4
295				MX53_PAD_GPIO_8__CAN1_RXCAN		0x1c4
296			>;
297		};
298
299		pinctrl_can2: can2grp {
300			fsl,pins = <
301				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x1e4
302				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x1c4
303			>;
304		};
305
306		pinctrl_display_gpio: display-gpiogrp {
307			fsl,pins = <
308				MX53_PAD_CSI0_DAT12__GPIO5_30		0x1c4 /* Reset */
309				MX53_PAD_CSI0_MCLK__GPIO5_19		0x1e4 /* Int-K */
310				MX53_PAD_CSI0_DAT13__GPIO5_31		0x1c4 /* Int-I */
311
312				MX53_PAD_CSI0_DAT14__GPIO6_0		0x1c4 /* Power down */
313			>;
314		};
315
316		pinctrl_edt_ft5x06: edt-ft5x06grp {
317			fsl,pins = <
318				MX53_PAD_PATA_DATA9__GPIO2_9		0x1e4 /* Reset */
319				MX53_PAD_CSI0_DAT19__GPIO6_5		0x1c4 /* Interrupt */
320				MX53_PAD_PATA_DATA10__GPIO2_10		0x1e4 /* Wake */
321			>;
322		};
323
324		pinctrl_ecspi2: ecspi2grp {
325			fsl,pins = <
326				MX53_PAD_EIM_CS0__ECSPI2_SCLK		0xe4
327				MX53_PAD_EIM_OE__ECSPI2_MISO		0xe4
328				MX53_PAD_EIM_CS1__ECSPI2_MOSI		0xe4
329				MX53_PAD_EIM_RW__GPIO2_26		0xe4
330				MX53_PAD_EIM_LBA__GPIO2_27		0xe4
331			>;
332		};
333
334		pinctrl_esdhc1: esdhc1grp {
335			fsl,pins = <
336				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1e4
337				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1e4
338				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1e4
339				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1e4
340				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1e4
341				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1e4
342				MX53_PAD_GPIO_1__GPIO1_1		0x1c4
343				MX53_PAD_GPIO_9__GPIO1_9		0x1e4
344			>;
345		};
346
347		pinctrl_fec: fecgrp {
348			fsl,pins = <
349				MX53_PAD_FEC_MDC__FEC_MDC		0x1e4
350				MX53_PAD_FEC_MDIO__FEC_MDIO		0x1e4
351				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x1e4
352				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x1e4
353				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x1e4
354				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x1e4
355				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x1e4
356				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x1c4
357				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x1e4
358				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x1e4
359				MX53_PAD_PATA_DA_1__GPIO7_7		0x1e4
360				MX53_PAD_EIM_EB3__GPIO2_31		0x1e4
361			>;
362		};
363
364		pinctrl_i2c1: i2c1grp {
365			fsl,pins = <
366				MX53_PAD_EIM_D21__I2C1_SCL		0x400001e4
367				MX53_PAD_EIM_D28__I2C1_SDA		0x400001e4
368			>;
369		};
370
371		pinctrl_i2c3: i2c3grp {
372			fsl,pins = <
373				MX53_PAD_GPIO_6__I2C3_SDA		0x400001e4
374				MX53_PAD_GPIO_5__I2C3_SCL		0x400001e4
375			>;
376		};
377
378		pinctrl_lvds0: lvds0grp {
379			/* LVDS pins only have pin mux configuration */
380			fsl,pins = <
381				MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK	0x80000000
382				MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0	0x80000000
383				MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1	0x80000000
384				MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2	0x80000000
385				MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3	0x80000000
386			>;
387		};
388
389		pinctrl_power_button: powerbutgrp {
390			fsl,pins = <
391				MX53_PAD_SD2_DATA2__GPIO1_13		0x1e4
392			>;
393		};
394
395		pinctrl_power_out: poweroutgrp {
396			fsl,pins = <
397				MX53_PAD_SD2_DATA0__GPIO1_15		0x1e4
398			>;
399		};
400
401		pinctrl_uart1: uart1grp {
402			fsl,pins = <
403				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4
404				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
405				MX53_PAD_PATA_IORDY__UART1_RTS		0x1e4
406				MX53_PAD_PATA_RESET_B__UART1_CTS	0x1e4
407			>;
408		};
409
410		pinctrl_uart2: uart2grp {
411			fsl,pins = <
412				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4
413				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4
414				MX53_PAD_PATA_DIOR__UART2_RTS		0x1e4
415				MX53_PAD_PATA_INTRQ__UART2_CTS		0x1e4
416			>;
417		};
418
419		pinctrl_uart3: uart3grp {
420			fsl,pins = <
421				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4
422				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4
423				MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4
424			>;
425		};
426
427		pinctrl_usb: usbgrp {
428			fsl,pins = <
429				MX53_PAD_GPIO_2__GPIO1_2		0x1c4
430				MX53_PAD_GPIO_3__USBOH3_USBH1_OC	0x1c4
431				MX53_PAD_GPIO_4__GPIO1_4		0x1c4
432				MX53_PAD_GPIO_18__GPIO7_13		0x1c4
433			>;
434		};
435	};
436};
437
438&ldb {
439	pinctrl-names = "default";
440	pinctrl-0 = <&pinctrl_lvds0>;
441	status = "okay";
442
443	lvds0: lvds-channel@0 {
444		reg = <0>;
445		fsl,data-mapping = "spwg";
446		fsl,data-width = <18>;
447		status = "okay";
448
449		port@2 {
450			reg = <2>;
451
452			lvds0_out: endpoint {
453				remote-endpoint = <&panel_in>;
454			};
455		};
456	};
457};
458
459&uart1 {
460	pinctrl-names = "default";
461	pinctrl-0 = <&pinctrl_uart1>;
462	uart-has-rtscts;
463	status = "okay";
464};
465
466&uart2 {
467	pinctrl-names = "default";
468	pinctrl-0 = <&pinctrl_uart2>;
469	uart-has-rtscts;
470	status = "okay";
471};
472
473&uart3 {
474	pinctrl-names = "default";
475	pinctrl-0 = <&pinctrl_uart3>;
476	linux,rs485-enabled-at-boot-time;
477	status = "okay";
478};
479
480&usbh1 {
481	pinctrl-names = "default";
482	pinctrl-0 = <&pinctrl_usb>;
483	vbus-supply = <&reg_usbh1_vbus>;
484	phy_type = "utmi";
485	dr_mode = "host";
486	status = "okay";
487};
488
489&usbotg {
490	dr_mode = "peripheral";
491	status = "okay";
492};
493