1// SPDX-License-Identifier: (GPL-2.0+) 2/* 3 * Copyright (C) 2015 DH electronics GmbH 4 * Copyright (C) 2018 Marek Vasut <marex@denx.de> 5 */ 6 7#include "imx6q.dtsi" 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/clock/imx6qdl-clock.h> 11#include <dt-bindings/input/input.h> 12 13/ { 14 aliases { 15 mmc0 = &usdhc2; 16 mmc1 = &usdhc3; 17 mmc2 = &usdhc4; 18 mmc3 = &usdhc1; 19 }; 20 21 memory@10000000 { 22 device_type = "memory"; 23 reg = <0x10000000 0x40000000>; 24 }; 25 26 reg_usb_otg_vbus: regulator-usb-otg-vbus { 27 compatible = "regulator-fixed"; 28 regulator-name = "usb_otg_vbus"; 29 regulator-min-microvolt = <5000000>; 30 regulator-max-microvolt = <5000000>; 31 }; 32 33 reg_usb_h1_vbus: regulator-usb-h1-vbus { 34 compatible = "regulator-fixed"; 35 regulator-name = "usb_h1_vbus"; 36 regulator-min-microvolt = <5000000>; 37 regulator-max-microvolt = <5000000>; 38 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; 39 enable-active-high; 40 }; 41 42 reg_3p3v: regulator-3P3V { 43 compatible = "regulator-fixed"; 44 regulator-name = "3P3V"; 45 regulator-min-microvolt = <3300000>; 46 regulator-max-microvolt = <3300000>; 47 regulator-always-on; 48 }; 49}; 50 51&can1 { 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_flexcan1>; 54}; 55 56&can2 { 57 pinctrl-names = "default"; 58 pinctrl-0 = <&pinctrl_flexcan2>; 59}; 60 61&ecspi1 { 62 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio4 11 GPIO_ACTIVE_LOW>; 63 pinctrl-names = "default"; 64 pinctrl-0 = <&pinctrl_ecspi1>; 65 status = "okay"; 66 67 flash@0 { /* S25FL116K */ 68 #address-cells = <1>; 69 #size-cells = <1>; 70 compatible = "jedec,spi-nor"; 71 spi-max-frequency = <50000000>; 72 reg = <0>; 73 m25p,fast-read; 74 }; 75}; 76 77&ecspi2 { 78 cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; 79 pinctrl-names = "default"; 80 pinctrl-0 = <&pinctrl_ecspi2>; 81 status = "okay"; 82}; 83 84&fec { 85 pinctrl-names = "default"; 86 pinctrl-0 = <&pinctrl_enet_100M>; 87 phy-mode = "rmii"; 88 phy-handle = <ðphy0>; 89 status = "okay"; 90 91 mdio { 92 #address-cells = <1>; 93 #size-cells = <0>; 94 95 ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */ 96 reg = <0>; 97 max-speed = <100>; 98 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 99 reset-delay-us = <1000>; 100 reset-post-delay-us = <1000>; 101 }; 102 }; 103}; 104 105&i2c1 { 106 clock-frequency = <100000>; 107 pinctrl-names = "default"; 108 pinctrl-0 = <&pinctrl_i2c1>; 109 status = "okay"; 110}; 111 112&i2c2 { 113 clock-frequency = <100000>; 114 pinctrl-names = "default"; 115 pinctrl-0 = <&pinctrl_i2c2>; 116 status = "okay"; 117}; 118 119&i2c3 { 120 clock-frequency = <100000>; 121 pinctrl-names = "default"; 122 pinctrl-0 = <&pinctrl_i2c3>; 123 status = "okay"; 124 125 ltc3676: pmic@3c { 126 compatible = "lltc,ltc3676"; 127 pinctrl-names = "default"; 128 pinctrl-0 = <&pinctrl_pmic_hw300>; 129 reg = <0x3c>; 130 interrupt-parent = <&gpio5>; 131 interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 132 133 regulators { 134 sw1_reg: sw1 { 135 regulator-min-microvolt = <787500>; 136 regulator-max-microvolt = <1527272>; 137 lltc,fb-voltage-divider = <100000 110000>; 138 regulator-suspend-mem-microvolt = <1040000>; 139 regulator-ramp-delay = <7000>; 140 regulator-boot-on; 141 regulator-always-on; 142 }; 143 144 sw2_reg: sw2 { 145 regulator-min-microvolt = <1885714>; 146 regulator-max-microvolt = <3657142>; 147 lltc,fb-voltage-divider = <100000 28000>; 148 regulator-ramp-delay = <7000>; 149 regulator-boot-on; 150 regulator-always-on; 151 }; 152 153 sw3_reg: sw3 { 154 regulator-min-microvolt = <787500>; 155 regulator-max-microvolt = <1527272>; 156 lltc,fb-voltage-divider = <100000 110000>; 157 regulator-suspend-mem-microvolt = <980000>; 158 regulator-ramp-delay = <7000>; 159 regulator-boot-on; 160 regulator-always-on; 161 }; 162 163 sw4_reg: sw4 { 164 regulator-min-microvolt = <855571>; 165 regulator-max-microvolt = <1659291>; 166 lltc,fb-voltage-divider = <100000 93100>; 167 regulator-ramp-delay = <7000>; 168 regulator-boot-on; 169 regulator-always-on; 170 }; 171 172 ldo1_reg: ldo1 { 173 regulator-min-microvolt = <3240306>; 174 regulator-max-microvolt = <3240306>; 175 lltc,fb-voltage-divider = <102000 29400>; 176 regulator-boot-on; 177 regulator-always-on; 178 }; 179 180 ldo2_reg: ldo2 { 181 regulator-min-microvolt = <2484708>; 182 regulator-max-microvolt = <2484708>; 183 lltc,fb-voltage-divider = <100000 41200>; 184 regulator-boot-on; 185 regulator-always-on; 186 }; 187 }; 188 }; 189 190 touchscreen@49 { /* TSC2004 */ 191 compatible = "ti,tsc2004"; 192 reg = <0x49>; 193 vio-supply = <®_3p3v>; 194 pinctrl-names = "default"; 195 pinctrl-0 = <&pinctrl_tsc2004_hw300>; 196 interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>; 197 status = "disabled"; 198 }; 199 200 eeprom@50 { 201 compatible = "atmel,24c02"; 202 reg = <0x50>; 203 pagesize = <16>; 204 }; 205 206 rtc@56 { 207 compatible = "microcrystal,rv3029"; 208 pinctrl-names = "default"; 209 pinctrl-0 = <&pinctrl_rtc_hw300>; 210 reg = <0x56>; 211 interrupt-parent = <&gpio7>; 212 interrupts = <12 2>; 213 }; 214}; 215 216&iomuxc { 217 pinctrl-names = "default"; 218 pinctrl-0 = <&pinctrl_hog_base>; 219 220 pinctrl_hog_base: hog-base-grp { 221 fsl,pins = < 222 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x120b0 223 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x120b0 224 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x120b0 225 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x120b0 226 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x120b0 227 >; 228 }; 229 230 pinctrl_ecspi1: ecspi1-grp { 231 fsl,pins = < 232 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 233 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 234 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 235 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 236 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 237 >; 238 }; 239 240 pinctrl_ecspi2: ecspi2-grp { 241 fsl,pins = < 242 MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1 243 MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1 244 MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1 245 MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x1b0b0 246 >; 247 }; 248 249 pinctrl_enet_100M: enet-100M-grp { 250 fsl,pins = < 251 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 252 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 253 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 254 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 255 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 256 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 257 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 258 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 259 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 260 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 261 MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x000b0 262 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b1 263 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x120b0 264 >; 265 }; 266 267 pinctrl_flexcan1: flexcan1-grp { 268 fsl,pins = < 269 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 270 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 271 >; 272 }; 273 274 pinctrl_flexcan2: flexcan2-grp { 275 fsl,pins = < 276 MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0 277 MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0 278 >; 279 }; 280 281 pinctrl_i2c1: i2c1-grp { 282 fsl,pins = < 283 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 284 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 285 >; 286 }; 287 288 pinctrl_i2c2: i2c2-grp { 289 fsl,pins = < 290 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 291 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 292 >; 293 }; 294 295 pinctrl_i2c3: i2c3-grp { 296 fsl,pins = < 297 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 298 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 299 >; 300 }; 301 302 pinctrl_pmic_hw300: pmic-hw300-grp { 303 fsl,pins = < 304 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1B0B0 305 >; 306 }; 307 308 pinctrl_rtc_hw300: rtc-hw300-grp { 309 fsl,pins = < 310 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x120B0 311 >; 312 }; 313 314 pinctrl_tsc2004_hw300: tsc2004-hw300-grp { 315 fsl,pins = < 316 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x120B0 317 >; 318 }; 319 320 pinctrl_uart1: uart1-grp { 321 fsl,pins = < 322 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 323 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 324 MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1 325 MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x4001b0b1 326 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x4001b0b1 327 MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x4001b0b1 328 MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x4001b0b1 329 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x4001b0b1 330 >; 331 }; 332 333 pinctrl_uart4: uart4-grp { 334 fsl,pins = < 335 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 336 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 337 >; 338 }; 339 340 pinctrl_uart5: uart5-grp { 341 fsl,pins = < 342 MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1 343 MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1 344 MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B 0x1b0b1 345 MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x4001b0b1 346 >; 347 }; 348 349 pinctrl_usbh1: usbh1-grp { 350 fsl,pins = < 351 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x120B0 352 >; 353 }; 354 355 pinctrl_usbotg: usbotg-grp { 356 fsl,pins = < 357 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 358 >; 359 }; 360 361 pinctrl_usdhc2: usdhc2-grp { 362 fsl,pins = < 363 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 364 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 365 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 366 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 367 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 368 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 369 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x120B0 370 >; 371 }; 372 373 pinctrl_usdhc3: usdhc3-grp { 374 fsl,pins = < 375 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 376 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 377 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 378 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 379 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 380 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 381 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x120B0 382 >; 383 }; 384 385 pinctrl_usdhc4: usdhc4-grp { 386 fsl,pins = < 387 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 388 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 389 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 390 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 391 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 392 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 393 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 394 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 395 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 396 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 397 >; 398 }; 399}; 400 401®_arm { 402 vin-supply = <&sw3_reg>; 403}; 404 405®_soc { 406 vin-supply = <&sw1_reg>; 407}; 408 409&uart1 { 410 pinctrl-names = "default"; 411 pinctrl-0 = <&pinctrl_uart1>; 412 uart-has-rtscts; 413 dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; 414 dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 415 dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 416 rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>; 417 status = "okay"; 418}; 419 420&uart4 { 421 pinctrl-names = "default"; 422 pinctrl-0 = <&pinctrl_uart4>; 423 status = "okay"; 424}; 425 426&uart5 { 427 pinctrl-names = "default"; 428 pinctrl-0 = <&pinctrl_uart5>; 429 uart-has-rtscts; 430 status = "okay"; 431}; 432 433&usbh1 { 434 pinctrl-names = "default"; 435 pinctrl-0 = <&pinctrl_usbh1>; 436 vbus-supply = <®_usb_h1_vbus>; 437 dr_mode = "host"; 438 status = "okay"; 439}; 440 441&usbotg { 442 vbus-supply = <®_usb_otg_vbus>; 443 pinctrl-names = "default"; 444 pinctrl-0 = <&pinctrl_usbotg>; 445 disable-over-current; 446 dr_mode = "otg"; 447 status = "okay"; 448}; 449 450&usdhc2 { 451 pinctrl-names = "default"; 452 pinctrl-0 = <&pinctrl_usdhc2>; 453 cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; 454 keep-power-in-suspend; 455 status = "okay"; 456}; 457 458&usdhc3 { 459 pinctrl-names = "default"; 460 pinctrl-0 = <&pinctrl_usdhc3>; 461 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>; 462 fsl,wp-controller; 463 keep-power-in-suspend; 464 status = "disabled"; 465}; 466 467&usdhc4 { 468 pinctrl-names = "default"; 469 pinctrl-0 = <&pinctrl_usdhc4>; 470 non-removable; 471 bus-width = <8>; 472 no-1-8-v; 473 keep-power-in-suspend; 474 status = "okay"; 475}; 476