1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2017-2018 MediaTek Inc.
4 * Author: Sean Wang <sean.wang@mediatek.com>
5 *
6 */
7
8/dts-v1/;
9#include <dt-bindings/input/input.h>
10#include "mt7623n.dtsi"
11#include "mt6323.dtsi"
12
13/ {
14	model = "MediaTek MT7623N with eMMC reference board";
15	compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
16
17	aliases {
18		serial0 = &uart0;
19		serial1 = &uart1;
20		serial2 = &uart2;
21	};
22
23	chosen {
24		stdout-path = "serial2:115200n8";
25	};
26
27	connector {
28		compatible = "hdmi-connector";
29		label = "hdmi";
30		type = "d";
31		ddc-i2c-bus = <&hdmiddc0>;
32
33		port {
34			hdmi_connector_in: endpoint {
35				remote-endpoint = <&hdmi0_out>;
36			};
37		};
38	};
39
40	cpus {
41		cpu@0 {
42			proc-supply = <&mt6323_vproc_reg>;
43		};
44
45		cpu@1 {
46			proc-supply = <&mt6323_vproc_reg>;
47		};
48
49		cpu@2 {
50			proc-supply = <&mt6323_vproc_reg>;
51		};
52
53		cpu@3 {
54			proc-supply = <&mt6323_vproc_reg>;
55		};
56	};
57
58	gpio-keys {
59		compatible = "gpio-keys";
60		pinctrl-names = "default";
61		pinctrl-0 = <&key_pins_a>;
62
63		factory {
64			label = "factory";
65			linux,code = <BTN_0>;
66			gpios = <&pio 256 GPIO_ACTIVE_LOW>;
67		};
68
69		wps {
70			label = "wps";
71			linux,code = <KEY_WPS_BUTTON>;
72			gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
73		};
74	};
75
76	memory@80000000 {
77		device_type = "memory";
78		reg = <0 0x80000000 0 0x40000000>;
79	};
80
81	reg_1p8v: regulator-1p8v {
82		compatible = "regulator-fixed";
83		regulator-name = "fixed-1.8V";
84		regulator-min-microvolt = <1800000>;
85		regulator-max-microvolt = <1800000>;
86		regulator-boot-on;
87		regulator-always-on;
88	};
89
90	reg_3p3v: regulator-3p3v {
91		compatible = "regulator-fixed";
92		regulator-name = "fixed-3.3V";
93		regulator-min-microvolt = <3300000>;
94		regulator-max-microvolt = <3300000>;
95		regulator-boot-on;
96		regulator-always-on;
97	};
98
99	reg_5v: regulator-5v {
100		compatible = "regulator-fixed";
101		regulator-name = "fixed-5V";
102		regulator-min-microvolt = <5000000>;
103		regulator-max-microvolt = <5000000>;
104		regulator-boot-on;
105		regulator-always-on;
106	};
107
108	sound {
109		compatible = "mediatek,mt2701-wm8960-machine";
110		mediatek,platform = <&afe>;
111		audio-routing =
112			"Headphone", "HP_L",
113			"Headphone", "HP_R",
114			"LINPUT1", "AMIC",
115			"RINPUT1", "AMIC";
116		mediatek,audio-codec = <&wm8960>;
117		pinctrl-names = "default";
118		pinctrl-0 = <&i2s0_pins_a>;
119	};
120};
121
122&bls {
123	status = "okay";
124};
125
126&btif {
127	status = "okay";
128};
129
130&cec {
131	status = "okay";
132};
133
134&cir {
135	pinctrl-names = "default";
136	pinctrl-0 = <&cir_pins_a>;
137	status = "okay";
138};
139
140&crypto {
141	status = "okay";
142};
143
144&dpi0 {
145	status = "okay";
146
147	ports {
148		#address-cells = <1>;
149		#size-cells = <0>;
150		port@0 {
151			reg = <0>;
152			dpi0_out: endpoint {
153				remote-endpoint = <&hdmi0_in>;
154			};
155		};
156	};
157};
158
159&eth {
160	status = "okay";
161
162	gmac0: mac@0 {
163		compatible = "mediatek,eth-mac";
164		reg = <0>;
165		phy-mode = "trgmii";
166
167		fixed-link {
168			speed = <1000>;
169			full-duplex;
170			pause;
171		};
172	};
173
174	mac@1 {
175		compatible = "mediatek,eth-mac";
176		reg = <1>;
177		phy-mode = "rgmii";
178		phy-handle = <&phy5>;
179	};
180
181	mdio-bus {
182		#address-cells = <1>;
183		#size-cells = <0>;
184
185		phy5: ethernet-phy@5 {
186			reg = <5>;
187			phy-mode = "rgmii-rxid";
188		};
189
190		switch@0 {
191			compatible = "mediatek,mt7530";
192			reg = <0>;
193			reset-gpios = <&pio 33 0>;
194			core-supply = <&mt6323_vpa_reg>;
195			io-supply = <&mt6323_vemc3v3_reg>;
196
197			ports {
198				#address-cells = <1>;
199				#size-cells = <0>;
200
201				port@0 {
202					reg = <0>;
203					label = "lan0";
204				};
205
206				port@1 {
207					reg = <1>;
208					label = "lan1";
209				};
210
211				port@2 {
212					reg = <2>;
213					label = "lan2";
214				};
215
216				port@3 {
217					reg = <3>;
218					label = "lan3";
219				};
220
221				port@4 {
222					reg = <4>;
223					label = "wan";
224				};
225
226				port@6 {
227					reg = <6>;
228					label = "cpu";
229					ethernet = <&gmac0>;
230					phy-mode = "trgmii";
231
232					fixed-link {
233						speed = <1000>;
234						full-duplex;
235					};
236				};
237			};
238		};
239	};
240};
241
242&hdmi0 {
243	pinctrl-names = "default";
244	pinctrl-0 = <&hdmi_pins_a>;
245	status = "okay";
246
247	ports {
248		#address-cells = <1>;
249		#size-cells = <0>;
250		port@0 {
251			reg = <0>;
252			hdmi0_in: endpoint {
253				remote-endpoint = <&dpi0_out>;
254			};
255		};
256
257		port@1 {
258			reg = <1>;
259			hdmi0_out: endpoint {
260				remote-endpoint = <&hdmi_connector_in>;
261			};
262		};
263	};
264};
265
266&hdmiddc0 {
267	pinctrl-names = "default";
268	pinctrl-0 = <&hdmi_ddc_pins_a>;
269	status = "okay";
270};
271
272&hdmi_phy {
273	mediatek,ibias = <0xa>;
274	mediatek,ibias_up = <0x1c>;
275	status = "okay";
276};
277
278&i2c0 {
279	pinctrl-names = "default";
280	pinctrl-0 = <&i2c0_pins_a>;
281	status = "okay";
282};
283
284&i2c1 {
285	pinctrl-names = "default";
286	pinctrl-0 = <&i2c1_pins_b>;
287	status = "okay";
288
289	wm8960: wm8960@1a {
290		compatible = "wlf,wm8960";
291		reg = <0x1a>;
292	};
293};
294
295&i2c2 {
296	pinctrl-names = "default";
297	pinctrl-0 = <&i2c2_pins_a>;
298	status = "okay";
299};
300
301&mmc0 {
302	pinctrl-names = "default", "state_uhs";
303	pinctrl-0 = <&mmc0_pins_default>;
304	pinctrl-1 = <&mmc0_pins_uhs>;
305	status = "okay";
306	bus-width = <8>;
307	max-frequency = <50000000>;
308	cap-mmc-highspeed;
309	vmmc-supply = <&reg_3p3v>;
310	vqmmc-supply = <&reg_1p8v>;
311	non-removable;
312};
313
314&mmc1 {
315	pinctrl-names = "default", "state_uhs";
316	pinctrl-0 = <&mmc1_pins_default>;
317	pinctrl-1 = <&mmc1_pins_uhs>;
318	status = "okay";
319	bus-width = <4>;
320	max-frequency = <50000000>;
321	cap-sd-highspeed;
322	cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
323	vmmc-supply = <&reg_3p3v>;
324	vqmmc-supply = <&reg_3p3v>;
325};
326
327&pcie {
328	pinctrl-names = "default";
329	pinctrl-0 = <&pcie_default>;
330	status = "okay";
331
332	pcie@0,0 {
333		status = "okay";
334	};
335
336	pcie@1,0 {
337		status = "okay";
338	};
339};
340
341&pcie0_phy {
342	status = "okay";
343};
344
345&pcie1_phy {
346	status = "okay";
347};
348
349&pwm {
350	pinctrl-names = "default";
351	pinctrl-0 = <&pwm_pins_a>;
352	status = "okay";
353};
354
355&spi0 {
356	pinctrl-names = "default";
357	pinctrl-0 = <&spi0_pins_a>;
358	status = "okay";
359};
360
361&spi1 {
362	pinctrl-names = "default";
363	pinctrl-0 = <&spi1_pins_a>;
364	status = "okay";
365};
366
367&spi2 {
368	pinctrl-names = "default";
369	pinctrl-0 = <&spi2_pins_a>;
370	status = "okay";
371};
372
373&uart0 {
374	pinctrl-names = "default";
375	pinctrl-0 = <&uart0_pins_a>;
376	status = "okay";
377};
378
379&uart1 {
380	pinctrl-names = "default";
381	pinctrl-0 = <&uart1_pins_a>;
382	status = "okay";
383};
384
385&uart2 {
386	pinctrl-names = "default";
387	pinctrl-0 = <&uart2_pins_a>;
388	status = "okay";
389};
390
391&usb1 {
392	vusb33-supply = <&reg_3p3v>;
393	vbus-supply = <&reg_5v>;
394	status = "okay";
395};
396
397&u3phy1 {
398	status = "okay";
399};
400