1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC 4 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC 5 * 6 * Copyright (C) 2013 Atmel, 7 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> 8 */ 9 10#include <dt-bindings/dma/at91.h> 11#include <dt-bindings/pinctrl/at91.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/clock/at91.h> 15 16/ { 17 #address-cells = <1>; 18 #size-cells = <1>; 19 model = "Atmel SAMA5D3 family SoC"; 20 compatible = "atmel,sama5d3", "atmel,sama5"; 21 interrupt-parent = <&aic>; 22 23 aliases { 24 serial0 = &dbgu; 25 serial1 = &usart0; 26 serial2 = &usart1; 27 serial3 = &usart2; 28 serial4 = &usart3; 29 serial5 = &uart0; 30 gpio0 = &pioA; 31 gpio1 = &pioB; 32 gpio2 = &pioC; 33 gpio3 = &pioD; 34 gpio4 = &pioE; 35 tcb0 = &tcb0; 36 i2c0 = &i2c0; 37 i2c1 = &i2c1; 38 i2c2 = &i2c2; 39 ssc0 = &ssc0; 40 ssc1 = &ssc1; 41 pwm0 = &pwm0; 42 }; 43 cpus { 44 #address-cells = <1>; 45 #size-cells = <0>; 46 cpu@0 { 47 device_type = "cpu"; 48 compatible = "arm,cortex-a5"; 49 reg = <0x0>; 50 }; 51 }; 52 53 pmu { 54 compatible = "arm,cortex-a5-pmu"; 55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>; 56 }; 57 58 memory@20000000 { 59 device_type = "memory"; 60 reg = <0x20000000 0x8000000>; 61 }; 62 63 clocks { 64 slow_xtal: slow_xtal { 65 compatible = "fixed-clock"; 66 #clock-cells = <0>; 67 clock-frequency = <0>; 68 }; 69 70 main_xtal: main_xtal { 71 compatible = "fixed-clock"; 72 #clock-cells = <0>; 73 clock-frequency = <0>; 74 }; 75 76 adc_op_clk: adc_op_clk{ 77 compatible = "fixed-clock"; 78 #clock-cells = <0>; 79 clock-frequency = <1000000>; 80 }; 81 }; 82 83 sram: sram@300000 { 84 compatible = "mmio-sram"; 85 reg = <0x00300000 0x20000>; 86 #address-cells = <1>; 87 #size-cells = <1>; 88 ranges = <0 0x00300000 0x20000>; 89 }; 90 91 ahb { 92 compatible = "simple-bus"; 93 #address-cells = <1>; 94 #size-cells = <1>; 95 ranges; 96 97 apb { 98 compatible = "simple-bus"; 99 #address-cells = <1>; 100 #size-cells = <1>; 101 ranges; 102 103 mmc0: mmc@f0000000 { 104 compatible = "atmel,hsmci"; 105 reg = <0xf0000000 0x600>; 106 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 107 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>; 108 dma-names = "rxtx"; 109 pinctrl-names = "default"; 110 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; 111 status = "disabled"; 112 #address-cells = <1>; 113 #size-cells = <0>; 114 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 115 clock-names = "mci_clk"; 116 }; 117 118 spi0: spi@f0004000 { 119 #address-cells = <1>; 120 #size-cells = <0>; 121 compatible = "atmel,at91rm9200-spi"; 122 reg = <0xf0004000 0x100>; 123 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; 124 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>, 125 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>; 126 dma-names = "tx", "rx"; 127 pinctrl-names = "default"; 128 pinctrl-0 = <&pinctrl_spi0>; 129 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; 130 clock-names = "spi_clk"; 131 status = "disabled"; 132 }; 133 134 ssc0: ssc@f0008000 { 135 compatible = "atmel,at91sam9g45-ssc"; 136 reg = <0xf0008000 0x4000>; 137 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; 138 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>, 139 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>; 140 dma-names = "tx", "rx"; 141 pinctrl-names = "default"; 142 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 143 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; 144 clock-names = "pclk"; 145 status = "disabled"; 146 }; 147 148 tcb0: timer@f0010000 { 149 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; 150 #address-cells = <1>; 151 #size-cells = <0>; 152 reg = <0xf0010000 0x100>; 153 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; 154 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>; 155 clock-names = "t0_clk", "slow_clk"; 156 }; 157 158 i2c0: i2c@f0014000 { 159 compatible = "atmel,at91sam9x5-i2c"; 160 reg = <0xf0014000 0x4000>; 161 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>; 162 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>, 163 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>; 164 dma-names = "tx", "rx"; 165 pinctrl-names = "default", "gpio"; 166 pinctrl-0 = <&pinctrl_i2c0>; 167 pinctrl-1 = <&pinctrl_i2c0_gpio>; 168 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; 169 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 170 #address-cells = <1>; 171 #size-cells = <0>; 172 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 173 status = "disabled"; 174 }; 175 176 i2c1: i2c@f0018000 { 177 compatible = "atmel,at91sam9x5-i2c"; 178 reg = <0xf0018000 0x4000>; 179 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>; 180 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>, 181 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>; 182 dma-names = "tx", "rx"; 183 pinctrl-names = "default", "gpio"; 184 pinctrl-0 = <&pinctrl_i2c1>; 185 pinctrl-1 = <&pinctrl_i2c1_gpio>; 186 sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>; 187 scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 188 #address-cells = <1>; 189 #size-cells = <0>; 190 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 191 status = "disabled"; 192 }; 193 194 usart0: serial@f001c000 { 195 compatible = "atmel,at91sam9260-usart"; 196 reg = <0xf001c000 0x100>; 197 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 198 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, 199 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 200 dma-names = "tx", "rx"; 201 pinctrl-names = "default"; 202 pinctrl-0 = <&pinctrl_usart0>; 203 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 204 clock-names = "usart"; 205 status = "disabled"; 206 }; 207 208 usart1: serial@f0020000 { 209 compatible = "atmel,at91sam9260-usart"; 210 reg = <0xf0020000 0x100>; 211 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; 212 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>, 213 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 214 dma-names = "tx", "rx"; 215 pinctrl-names = "default"; 216 pinctrl-0 = <&pinctrl_usart1>; 217 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 218 clock-names = "usart"; 219 status = "disabled"; 220 }; 221 222 uart0: serial@f0024000 { 223 compatible = "atmel,at91sam9260-usart"; 224 reg = <0xf0024000 0x100>; 225 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pinctrl_uart0>; 228 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 229 clock-names = "usart"; 230 status = "disabled"; 231 }; 232 233 pwm0: pwm@f002c000 { 234 compatible = "atmel,sama5d3-pwm"; 235 reg = <0xf002c000 0x300>; 236 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>; 237 #pwm-cells = <3>; 238 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; 239 status = "disabled"; 240 }; 241 242 isi: isi@f0034000 { 243 compatible = "atmel,at91sam9g45-isi"; 244 reg = <0xf0034000 0x4000>; 245 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; 246 pinctrl-names = "default"; 247 pinctrl-0 = <&pinctrl_isi_data_0_7>; 248 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; 249 clock-names = "isi_clk"; 250 status = "disabled"; 251 port { 252 #address-cells = <1>; 253 #size-cells = <0>; 254 }; 255 }; 256 257 sfr: sfr@f0038000 { 258 compatible = "atmel,sama5d3-sfr", "syscon"; 259 reg = <0xf0038000 0x60>; 260 }; 261 262 mmc1: mmc@f8000000 { 263 compatible = "atmel,hsmci"; 264 reg = <0xf8000000 0x600>; 265 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>; 266 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>; 267 dma-names = "rxtx"; 268 pinctrl-names = "default"; 269 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; 270 status = "disabled"; 271 #address-cells = <1>; 272 #size-cells = <0>; 273 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; 274 clock-names = "mci_clk"; 275 }; 276 277 spi1: spi@f8008000 { 278 #address-cells = <1>; 279 #size-cells = <0>; 280 compatible = "atmel,at91rm9200-spi"; 281 reg = <0xf8008000 0x100>; 282 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; 283 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>, 284 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>; 285 dma-names = "tx", "rx"; 286 pinctrl-names = "default"; 287 pinctrl-0 = <&pinctrl_spi1>; 288 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; 289 clock-names = "spi_clk"; 290 status = "disabled"; 291 }; 292 293 ssc1: ssc@f800c000 { 294 compatible = "atmel,at91sam9g45-ssc"; 295 reg = <0xf800c000 0x4000>; 296 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; 297 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>, 298 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>; 299 dma-names = "tx", "rx"; 300 pinctrl-names = "default"; 301 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 302 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; 303 clock-names = "pclk"; 304 status = "disabled"; 305 }; 306 307 adc0: adc@f8018000 { 308 compatible = "atmel,sama5d3-adc"; 309 reg = <0xf8018000 0x100>; 310 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; 311 pinctrl-names = "default"; 312 pinctrl-0 = < 313 &pinctrl_adc0_adtrg 314 &pinctrl_adc0_ad0 315 &pinctrl_adc0_ad1 316 &pinctrl_adc0_ad2 317 &pinctrl_adc0_ad3 318 &pinctrl_adc0_ad4 319 &pinctrl_adc0_ad5 320 &pinctrl_adc0_ad6 321 &pinctrl_adc0_ad7 322 &pinctrl_adc0_ad8 323 &pinctrl_adc0_ad9 324 &pinctrl_adc0_ad10 325 &pinctrl_adc0_ad11 326 >; 327 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, 328 <&adc_op_clk>; 329 clock-names = "adc_clk", "adc_op_clk"; 330 atmel,adc-channels-used = <0xfff>; 331 atmel,adc-startup-time = <40>; 332 atmel,adc-use-external-triggers; 333 atmel,adc-vref = <3000>; 334 atmel,adc-sample-hold-time = <11>; 335 status = "disabled"; 336 }; 337 338 i2c2: i2c@f801c000 { 339 compatible = "atmel,at91sam9x5-i2c"; 340 reg = <0xf801c000 0x4000>; 341 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>; 342 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, 343 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; 344 dma-names = "tx", "rx"; 345 pinctrl-names = "default", "gpio"; 346 pinctrl-0 = <&pinctrl_i2c2>; 347 pinctrl-1 = <&pinctrl_i2c2_gpio>; 348 sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>; 349 scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 350 #address-cells = <1>; 351 #size-cells = <0>; 352 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 353 status = "disabled"; 354 }; 355 356 usart2: serial@f8020000 { 357 compatible = "atmel,at91sam9260-usart"; 358 reg = <0xf8020000 0x100>; 359 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 360 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>, 361 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 362 dma-names = "tx", "rx"; 363 pinctrl-names = "default"; 364 pinctrl-0 = <&pinctrl_usart2>; 365 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 366 clock-names = "usart"; 367 status = "disabled"; 368 }; 369 370 usart3: serial@f8024000 { 371 compatible = "atmel,at91sam9260-usart"; 372 reg = <0xf8024000 0x100>; 373 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 374 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>, 375 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 376 dma-names = "tx", "rx"; 377 pinctrl-names = "default"; 378 pinctrl-0 = <&pinctrl_usart3>; 379 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 380 clock-names = "usart"; 381 status = "disabled"; 382 }; 383 384 sha@f8034000 { 385 compatible = "atmel,at91sam9g46-sha"; 386 reg = <0xf8034000 0x100>; 387 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; 388 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>; 389 dma-names = "tx"; 390 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; 391 clock-names = "sha_clk"; 392 }; 393 394 aes@f8038000 { 395 compatible = "atmel,at91sam9g46-aes"; 396 reg = <0xf8038000 0x100>; 397 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>; 398 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>, 399 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>; 400 dma-names = "tx", "rx"; 401 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; 402 clock-names = "aes_clk"; 403 }; 404 405 tdes@f803c000 { 406 compatible = "atmel,at91sam9g46-tdes"; 407 reg = <0xf803c000 0x100>; 408 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>; 409 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>, 410 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>; 411 dma-names = "tx", "rx"; 412 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; 413 clock-names = "tdes_clk"; 414 }; 415 416 trng@f8040000 { 417 compatible = "atmel,at91sam9g45-trng"; 418 reg = <0xf8040000 0x100>; 419 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>; 420 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; 421 }; 422 423 hsmc: hsmc@ffffc000 { 424 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; 425 reg = <0xffffc000 0x1000>; 426 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; 427 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; 428 #address-cells = <1>; 429 #size-cells = <1>; 430 ranges; 431 432 pmecc: ecc-engine@ffffc070 { 433 compatible = "atmel,at91sam9g45-pmecc"; 434 reg = <0xffffc070 0x490>, 435 <0xffffc500 0x100>; 436 }; 437 }; 438 439 dma0: dma-controller@ffffe600 { 440 compatible = "atmel,at91sam9g45-dma"; 441 reg = <0xffffe600 0x200>; 442 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; 443 #dma-cells = <2>; 444 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; 445 clock-names = "dma_clk"; 446 }; 447 448 dma1: dma-controller@ffffe800 { 449 compatible = "atmel,at91sam9g45-dma"; 450 reg = <0xffffe800 0x200>; 451 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; 452 #dma-cells = <2>; 453 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; 454 clock-names = "dma_clk"; 455 }; 456 457 ramc0: ramc@ffffea00 { 458 compatible = "atmel,sama5d3-ddramc"; 459 reg = <0xffffea00 0x200>; 460 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>; 461 clock-names = "ddrck", "mpddr"; 462 }; 463 464 dbgu: serial@ffffee00 { 465 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 466 reg = <0xffffee00 0x200>; 467 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; 468 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>, 469 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 470 dma-names = "tx", "rx"; 471 pinctrl-names = "default"; 472 pinctrl-0 = <&pinctrl_dbgu>; 473 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 474 clock-names = "usart"; 475 status = "disabled"; 476 }; 477 478 aic: interrupt-controller@fffff000 { 479 #interrupt-cells = <3>; 480 compatible = "atmel,sama5d3-aic"; 481 interrupt-controller; 482 reg = <0xfffff000 0x200>; 483 atmel,external-irqs = <47>; 484 }; 485 486 pinctrl: pinctrl@fffff200 { 487 #address-cells = <1>; 488 #size-cells = <1>; 489 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus"; 490 ranges = <0xfffff200 0xfffff200 0xa00>; 491 atmel,mux-mask = < 492 /* A B C */ 493 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */ 494 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */ 495 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */ 496 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */ 497 0xffffffff 0xbf9f8000 0x18000000 /* pioE */ 498 >; 499 500 /* shared pinctrl settings */ 501 adc0 { 502 pinctrl_adc0_adtrg: adc0_adtrg { 503 atmel,pins = 504 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */ 505 }; 506 pinctrl_adc0_ad0: adc0_ad0 { 507 atmel,pins = 508 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */ 509 }; 510 pinctrl_adc0_ad1: adc0_ad1 { 511 atmel,pins = 512 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */ 513 }; 514 pinctrl_adc0_ad2: adc0_ad2 { 515 atmel,pins = 516 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */ 517 }; 518 pinctrl_adc0_ad3: adc0_ad3 { 519 atmel,pins = 520 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */ 521 }; 522 pinctrl_adc0_ad4: adc0_ad4 { 523 atmel,pins = 524 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */ 525 }; 526 pinctrl_adc0_ad5: adc0_ad5 { 527 atmel,pins = 528 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */ 529 }; 530 pinctrl_adc0_ad6: adc0_ad6 { 531 atmel,pins = 532 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */ 533 }; 534 pinctrl_adc0_ad7: adc0_ad7 { 535 atmel,pins = 536 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */ 537 }; 538 pinctrl_adc0_ad8: adc0_ad8 { 539 atmel,pins = 540 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */ 541 }; 542 pinctrl_adc0_ad9: adc0_ad9 { 543 atmel,pins = 544 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */ 545 }; 546 pinctrl_adc0_ad10: adc0_ad10 { 547 atmel,pins = 548 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */ 549 }; 550 pinctrl_adc0_ad11: adc0_ad11 { 551 atmel,pins = 552 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */ 553 }; 554 }; 555 556 dbgu { 557 pinctrl_dbgu: dbgu-0 { 558 atmel,pins = 559 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 560 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 561 }; 562 }; 563 564 ebi { 565 pinctrl_ebi_addr: ebi-addr-0 { 566 atmel,pins = 567 <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE 568 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE 569 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE 570 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE 571 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE 572 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE 573 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE 574 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE 575 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE 576 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE 577 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE 578 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE 579 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE 580 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE 581 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE 582 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE 583 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE 584 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE 585 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE 586 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE 587 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 588 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE 589 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 590 }; 591 592 pinctrl_ebi_nand_addr: ebi-addr-1 { 593 atmel,pins = 594 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE 595 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 596 }; 597 598 pinctrl_ebi_cs0: ebi-cs0-0 { 599 atmel,pins = 600 <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; 601 }; 602 603 pinctrl_ebi_cs1: ebi-cs1-0 { 604 atmel,pins = 605 <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; 606 }; 607 608 pinctrl_ebi_cs2: ebi-cs2-0 { 609 atmel,pins = 610 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 611 }; 612 613 pinctrl_ebi_nwait: ebi-nwait-0 { 614 atmel,pins = 615 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 616 }; 617 618 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 { 619 atmel,pins = 620 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 621 }; 622 }; 623 624 i2c0 { 625 pinctrl_i2c0: i2c0-0 { 626 atmel,pins = 627 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ 628 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ 629 }; 630 631 pinctrl_i2c0_gpio: i2c0-gpio { 632 atmel,pins = 633 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 634 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 635 }; 636 }; 637 638 i2c1 { 639 pinctrl_i2c1: i2c1-0 { 640 atmel,pins = 641 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ 642 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ 643 }; 644 645 pinctrl_i2c1_gpio: i2c1-gpio { 646 atmel,pins = 647 <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 648 AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 649 }; 650 }; 651 652 i2c2 { 653 pinctrl_i2c2: i2c2-0 { 654 atmel,pins = 655 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */ 656 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */ 657 }; 658 659 pinctrl_i2c2_gpio: i2c2-gpio { 660 atmel,pins = 661 <AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE 662 AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 663 }; 664 }; 665 666 isi { 667 pinctrl_isi_data_0_7: isi-0-data-0-7 { 668 atmel,pins = 669 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ 670 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ 671 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ 672 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ 673 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ 674 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ 675 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ 676 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ 677 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ 678 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ 679 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ 680 }; 681 682 pinctrl_isi_data_8_9: isi-0-data-8-9 { 683 atmel,pins = 684 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ 685 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ 686 }; 687 688 pinctrl_isi_data_10_11: isi-0-data-10-11 { 689 atmel,pins = 690 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */ 691 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */ 692 }; 693 }; 694 695 mmc0 { 696 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { 697 atmel,pins = 698 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */ 699 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */ 700 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */ 701 }; 702 pinctrl_mmc0_dat1_3: mmc0_dat1_3 { 703 atmel,pins = 704 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */ 705 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */ 706 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */ 707 }; 708 pinctrl_mmc0_dat4_7: mmc0_dat4_7 { 709 atmel,pins = 710 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ 711 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ 712 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conflicts with TCLK0, PWMH3 */ 713 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ 714 }; 715 }; 716 717 mmc1 { 718 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { 719 atmel,pins = 720 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */ 721 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ 722 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ 723 }; 724 pinctrl_mmc1_dat1_3: mmc1_dat1_3 { 725 atmel,pins = 726 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ 727 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ 728 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ 729 }; 730 }; 731 732 nand0 { 733 pinctrl_nand0_ale_cle: nand0_ale_cle-0 { 734 atmel,pins = 735 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */ 736 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */ 737 }; 738 }; 739 740 pwm0 { 741 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 { 742 atmel,pins = 743 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */ 744 }; 745 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 { 746 atmel,pins = 747 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */ 748 }; 749 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 { 750 atmel,pins = 751 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */ 752 }; 753 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 { 754 atmel,pins = 755 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */ 756 }; 757 758 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 { 759 atmel,pins = 760 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */ 761 }; 762 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 { 763 atmel,pins = 764 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */ 765 }; 766 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 { 767 atmel,pins = 768 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */ 769 }; 770 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 { 771 atmel,pins = 772 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */ 773 }; 774 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 { 775 atmel,pins = 776 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */ 777 }; 778 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 { 779 atmel,pins = 780 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */ 781 }; 782 783 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 { 784 atmel,pins = 785 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */ 786 }; 787 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 { 788 atmel,pins = 789 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */ 790 }; 791 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 { 792 atmel,pins = 793 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */ 794 }; 795 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 { 796 atmel,pins = 797 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */ 798 }; 799 800 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 { 801 atmel,pins = 802 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */ 803 }; 804 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 { 805 atmel,pins = 806 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */ 807 }; 808 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 { 809 atmel,pins = 810 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */ 811 }; 812 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 { 813 atmel,pins = 814 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */ 815 }; 816 }; 817 818 spi0 { 819 pinctrl_spi0: spi0-0 { 820 atmel,pins = 821 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */ 822 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */ 823 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */ 824 }; 825 }; 826 827 spi1 { 828 pinctrl_spi1: spi1-0 { 829 atmel,pins = 830 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */ 831 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */ 832 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */ 833 }; 834 }; 835 836 ssc0 { 837 pinctrl_ssc0_tx: ssc0_tx { 838 atmel,pins = 839 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */ 840 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */ 841 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */ 842 }; 843 844 pinctrl_ssc0_rx: ssc0_rx { 845 atmel,pins = 846 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */ 847 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */ 848 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */ 849 }; 850 }; 851 852 ssc1 { 853 pinctrl_ssc1_tx: ssc1_tx { 854 atmel,pins = 855 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */ 856 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */ 857 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */ 858 }; 859 860 pinctrl_ssc1_rx: ssc1_rx { 861 atmel,pins = 862 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */ 863 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */ 864 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */ 865 }; 866 }; 867 868 uart0 { 869 pinctrl_uart0: uart0-0 { 870 atmel,pins = 871 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */ 872 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */ 873 }; 874 }; 875 876 uart1 { 877 pinctrl_uart1: uart1-0 { 878 atmel,pins = 879 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */ 880 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */ 881 }; 882 }; 883 884 usart0 { 885 pinctrl_usart0: usart0-0 { 886 atmel,pins = 887 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 888 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 889 }; 890 891 pinctrl_usart0_rts_cts: usart0_rts_cts-0 { 892 atmel,pins = 893 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ 894 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ 895 }; 896 }; 897 898 usart1 { 899 pinctrl_usart1: usart1-0 { 900 atmel,pins = 901 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 902 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 903 }; 904 905 pinctrl_usart1_rts_cts: usart1_rts_cts-0 { 906 atmel,pins = 907 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */ 908 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */ 909 }; 910 }; 911 912 usart2 { 913 pinctrl_usart2: usart2-0 { 914 atmel,pins = 915 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */ 916 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */ 917 }; 918 919 pinctrl_usart2_rts_cts: usart2_rts_cts-0 { 920 atmel,pins = 921 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */ 922 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */ 923 }; 924 }; 925 926 usart3 { 927 pinctrl_usart3: usart3-0 { 928 atmel,pins = 929 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */ 930 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */ 931 }; 932 933 pinctrl_usart3_rts_cts: usart3_rts_cts-0 { 934 atmel,pins = 935 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */ 936 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */ 937 }; 938 }; 939 940 941 pioA: gpio@fffff200 { 942 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 943 reg = <0xfffff200 0x100>; 944 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>; 945 #gpio-cells = <2>; 946 gpio-controller; 947 interrupt-controller; 948 #interrupt-cells = <2>; 949 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 950 }; 951 952 pioB: gpio@fffff400 { 953 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 954 reg = <0xfffff400 0x100>; 955 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>; 956 #gpio-cells = <2>; 957 gpio-controller; 958 interrupt-controller; 959 #interrupt-cells = <2>; 960 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 961 }; 962 963 pioC: gpio@fffff600 { 964 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 965 reg = <0xfffff600 0x100>; 966 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>; 967 #gpio-cells = <2>; 968 gpio-controller; 969 interrupt-controller; 970 #interrupt-cells = <2>; 971 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 972 }; 973 974 pioD: gpio@fffff800 { 975 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 976 reg = <0xfffff800 0x100>; 977 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>; 978 #gpio-cells = <2>; 979 gpio-controller; 980 interrupt-controller; 981 #interrupt-cells = <2>; 982 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 983 }; 984 985 pioE: gpio@fffffa00 { 986 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 987 reg = <0xfffffa00 0x100>; 988 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>; 989 #gpio-cells = <2>; 990 gpio-controller; 991 interrupt-controller; 992 #interrupt-cells = <2>; 993 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 994 }; 995 }; 996 997 pmc: pmc@fffffc00 { 998 compatible = "atmel,sama5d3-pmc", "syscon"; 999 reg = <0xfffffc00 0x120>; 1000 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1001 #clock-cells = <2>; 1002 clocks = <&clk32k>, <&main_xtal>; 1003 clock-names = "slow_clk", "main_xtal"; 1004 }; 1005 1006 reset_controller: rstc@fffffe00 { 1007 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc"; 1008 reg = <0xfffffe00 0x10>; 1009 clocks = <&clk32k>; 1010 }; 1011 1012 shutdown_controller: shutdown-controller@fffffe10 { 1013 compatible = "atmel,at91sam9x5-shdwc"; 1014 reg = <0xfffffe10 0x10>; 1015 clocks = <&clk32k>; 1016 }; 1017 1018 pit: timer@fffffe30 { 1019 compatible = "atmel,at91sam9260-pit"; 1020 reg = <0xfffffe30 0xf>; 1021 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; 1022 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 1023 }; 1024 1025 watchdog: watchdog@fffffe40 { 1026 compatible = "atmel,at91sam9260-wdt"; 1027 reg = <0xfffffe40 0x10>; 1028 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>; 1029 clocks = <&clk32k>; 1030 atmel,watchdog-type = "hardware"; 1031 atmel,reset-type = "all"; 1032 atmel,dbg-halt; 1033 status = "disabled"; 1034 }; 1035 1036 clk32k: sckc@fffffe50 { 1037 compatible = "atmel,sama5d3-sckc"; 1038 reg = <0xfffffe50 0x4>; 1039 clocks = <&slow_xtal>; 1040 #clock-cells = <0>; 1041 }; 1042 1043 rtc@fffffeb0 { 1044 compatible = "atmel,at91rm9200-rtc"; 1045 reg = <0xfffffeb0 0x30>; 1046 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1047 clocks = <&clk32k>; 1048 }; 1049 }; 1050 1051 nfc_sram: sram@200000 { 1052 compatible = "mmio-sram"; 1053 no-memory-wc; 1054 reg = <0x200000 0x2400>; 1055 #address-cells = <1>; 1056 #size-cells = <1>; 1057 ranges = <0 0x200000 0x2400>; 1058 }; 1059 1060 usb0: gadget@500000 { 1061 compatible = "atmel,sama5d3-udc"; 1062 reg = <0x00500000 0x100000 1063 0xf8030000 0x4000>; 1064 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; 1065 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>; 1066 clock-names = "pclk", "hclk"; 1067 status = "disabled"; 1068 }; 1069 1070 usb1: ohci@600000 { 1071 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1072 reg = <0x00600000 0x100000>; 1073 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1074 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_SYSTEM 6>; 1075 clock-names = "ohci_clk", "hclk", "uhpck"; 1076 status = "disabled"; 1077 }; 1078 1079 usb2: ehci@700000 { 1080 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1081 reg = <0x00700000 0x100000>; 1082 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1083 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>; 1084 clock-names = "usb_clk", "ehci_clk"; 1085 status = "disabled"; 1086 }; 1087 1088 ebi: ebi@10000000 { 1089 compatible = "atmel,sama5d3-ebi"; 1090 #address-cells = <2>; 1091 #size-cells = <1>; 1092 atmel,smc = <&hsmc>; 1093 reg = <0x10000000 0x10000000 1094 0x40000000 0x30000000>; 1095 ranges = <0x0 0x0 0x10000000 0x10000000 1096 0x1 0x0 0x40000000 0x10000000 1097 0x2 0x0 0x50000000 0x10000000 1098 0x3 0x0 0x60000000 0x10000000>; 1099 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 1100 status = "disabled"; 1101 1102 nand_controller: nand-controller { 1103 compatible = "atmel,sama5d3-nand-controller"; 1104 atmel,nfc-sram = <&nfc_sram>; 1105 atmel,nfc-io = <&nfc_io>; 1106 ecc-engine = <&pmecc>; 1107 #address-cells = <2>; 1108 #size-cells = <1>; 1109 ranges; 1110 status = "disabled"; 1111 }; 1112 }; 1113 1114 nfc_io: nfc-io@70000000 { 1115 compatible = "atmel,sama5d3-nfc-io", "syscon"; 1116 reg = <0x70000000 0x8000000>; 1117 }; 1118 }; 1119}; 1120