1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2013 Linaro Ltd.
4 */
5
6#include "ste-nomadik-pinctrl.dtsi"
7
8&pinctrl {
9	/* Settings for all UART default and sleep states */
10	uart0 {
11		u0_a_1_default: u0_a_1_default {
12			default_mux {
13				function = "u0";
14				groups = "u0_a_1";
15			};
16			default_cfg1 {
17				pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
18				ste,config = <&in_pu>;
19			};
20			default_cfg2 {
21				pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
22				ste,config = <&out_hi>;
23			};
24		};
25
26		u0_a_1_sleep: u0_a_1_sleep {
27			sleep_cfg1 {
28				pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
29				ste,config = <&slpm_in_wkup_pdis>;
30			};
31			sleep_cfg2 {
32				pins = "GPIO1_AJ3"; /* RTS */
33				ste,config = <&slpm_out_hi_wkup_pdis>;
34			};
35			sleep_cfg3 {
36				pins = "GPIO3_AH3"; /* TXD */
37				ste,config = <&slpm_out_wkup_pdis>;
38			};
39		};
40	};
41
42	uart1 {
43		u1rxtx_a_1_default: u1rxtx_a_1_default {
44			default_mux {
45				function = "u1";
46				groups = "u1rxtx_a_1";
47			};
48			default_cfg1 {
49				pins = "GPIO4_AH6"; /* RXD */
50				ste,config = <&in_pu>;
51			};
52			default_cfg2 {
53				pins = "GPIO5_AG6"; /* TXD */
54				ste,config = <&out_hi>;
55			};
56		};
57
58		u1rxtx_a_1_sleep: u1rxtx_a_1_sleep {
59			sleep_cfg1 {
60				pins = "GPIO4_AH6"; /* RXD */
61				ste,config = <&slpm_in_wkup_pdis>;
62			};
63			sleep_cfg2 {
64				pins = "GPIO5_AG6"; /* TXD */
65				ste,config = <&slpm_out_wkup_pdis>;
66			};
67		};
68
69		u1ctsrts_a_1_default: u1ctsrts_a_1_default {
70			default_mux {
71				function = "u1";
72				groups = "u1ctsrts_a_1";
73			};
74			default_cfg1 {
75				pins = "GPIO6_AF6"; /* CTS */
76				ste,config = <&in_pu>;
77			};
78			default_cfg2 {
79				pins = "GPIO7_AG5"; /* RTS */
80				ste,config = <&out_hi>;
81			};
82		};
83
84		u1ctsrts_a_1_sleep: u1ctsrts_a_1_sleep {
85			sleep_cfg1 {
86				pins = "GPIO6_AF6"; /* CTS */
87				ste,config = <&slpm_in_wkup_pdis>;
88			};
89			sleep_cfg2 {
90				pins = "GPIO7_AG5"; /* RTS */
91				ste,config = <&slpm_out_hi_wkup_pdis>;
92			};
93		};
94	};
95
96	uart2 {
97		u2rxtx_c_1_default: u2rxtx_c_1_default {
98			default_mux {
99				function = "u2";
100				groups = "u2rxtx_c_1";
101			};
102			default_cfg1 {
103				pins = "GPIO29_W2"; /* RXD */
104				ste,config = <&in_pu>;
105			};
106			default_cfg2 {
107				pins = "GPIO30_W3"; /* TXD */
108				ste,config = <&out_hi>;
109			};
110		};
111
112		u2rxtx_c_1_sleep: u2rxtx_c_1_sleep {
113			sleep_cfg1 {
114				pins = "GPIO29_W2"; /* RXD */
115				ste,config = <&in_wkup_pdis>;
116			};
117			sleep_cfg2 {
118				pins = "GPIO30_W3"; /* TXD */
119				ste,config = <&out_wkup_pdis>;
120			};
121		};
122	};
123
124	/* Settings for all I2C default and sleep states */
125	i2c0 {
126		i2c0_a_1_default: i2c0_a_1_default {
127			default_mux {
128				function = "i2c0";
129				groups = "i2c0_a_1";
130			};
131			default_cfg1 {
132				pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
133				ste,config = <&in_nopull>;
134			};
135		};
136
137		i2c0_a_1_sleep: i2c0_a_1_sleep {
138			sleep_cfg1 {
139				pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
140				ste,config = <&slpm_in_wkup_pdis>;
141			};
142		};
143	};
144
145	i2c1 {
146		i2c1_b_2_default: i2c1_b_2_default {
147			default_mux {
148				function = "i2c1";
149				groups = "i2c1_b_2";
150			};
151			default_cfg1 {
152				pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
153				ste,config = <&in_nopull>;
154			};
155		};
156
157		i2c1_b_2_sleep: i2c1_b_2_sleep {
158			sleep_cfg1 {
159				pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
160				ste,config = <&slpm_in_wkup_pdis>;
161			};
162		};
163	};
164
165	i2c2 {
166		i2c2_b_2_default: i2c2_b_2_default {
167			default_mux {
168				function = "i2c2";
169				groups = "i2c2_b_2";
170			};
171			default_cfg1 {
172				pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
173				ste,config = <&in_nopull>;
174			};
175		};
176
177		i2c2_b_2_sleep: i2c2_b_2_sleep {
178			sleep_cfg1 {
179				pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
180				ste,config = <&slpm_in_wkup_pdis>;
181			};
182		};
183	};
184
185	i2c3 {
186		i2c3_c_2_default: i2c3_c_2_default {
187			default_mux {
188				function = "i2c3";
189				groups = "i2c3_c_2";
190			};
191			default_cfg1 {
192				pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
193				ste,config = <&in_nopull>;
194			};
195		};
196
197		i2c3_c_2_sleep: i2c3_c_2_sleep {
198			sleep_cfg1 {
199				pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
200				ste,config = <&slpm_in_wkup_pdis>;
201			};
202		};
203	};
204
205	/*
206	 * Activating I2C4 will conflict with UART1 about the same pins so do not
207	 * enable I2C4 and UART1 at the same time.
208	 */
209	i2c4 {
210		i2c4_b_1_default: i2c4_b_1_default {
211			default_mux {
212				function = "i2c4";
213				groups = "i2c4_b_1";
214			};
215			default_cfg1 {
216				pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
217				ste,config = <&in_nopull>;
218			};
219		};
220
221		i2c4_b_1_sleep: i2c4_b_1_sleep {
222			sleep_cfg1 {
223				pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
224				ste,config = <&slpm_in_wkup_pdis>;
225			};
226		};
227	};
228
229	/* Settings for all MMC/SD/SDIO default and sleep states */
230	sdi0 {
231		/* This is the external SD card slot, 4 bits wide */
232		mc0_a_1_default: mc0_a_1_default {
233			default_mux {
234				function = "mc0";
235				groups = "mc0_a_1";
236			};
237			default_cfg1 {
238				pins =
239				"GPIO18_AC2", /* CMDDIR */
240				"GPIO19_AC1", /* DAT0DIR */
241				"GPIO20_AB4"; /* DAT2DIR */
242				ste,config = <&out_hi>;
243			};
244			default_cfg2 {
245				pins = "GPIO22_AA3"; /* FBCLK */
246				ste,config = <&in_nopull>;
247			};
248			default_cfg3 {
249				pins = "GPIO23_AA4"; /* CLK */
250				ste,config = <&out_lo>;
251			};
252			default_cfg4 {
253				pins =
254				"GPIO24_AB2", /* CMD */
255				"GPIO25_Y4", /* DAT0 */
256				"GPIO26_Y2", /* DAT1 */
257				"GPIO27_AA2", /* DAT2 */
258				"GPIO28_AA1"; /* DAT3 */
259				ste,config = <&in_pu>;
260			};
261		};
262
263		mc0_a_1_sleep: mc0_a_1_sleep {
264			sleep_cfg1 {
265				pins =
266				"GPIO18_AC2", /* CMDDIR */
267				"GPIO19_AC1", /* DAT0DIR */
268				"GPIO20_AB4"; /* DAT2DIR */
269				ste,config = <&slpm_out_hi_wkup_pdis>;
270			};
271			sleep_cfg2 {
272				pins =
273				"GPIO22_AA3", /* FBCLK */
274				"GPIO24_AB2", /* CMD */
275				"GPIO25_Y4", /* DAT0 */
276				"GPIO26_Y2", /* DAT1 */
277				"GPIO27_AA2", /* DAT2 */
278				"GPIO28_AA1"; /* DAT3 */
279				ste,config = <&slpm_in_wkup_pdis>;
280			};
281			sleep_cfg3 {
282				pins = "GPIO23_AA4"; /* CLK */
283				ste,config = <&slpm_out_lo_wkup_pdis>;
284			};
285		};
286
287		mc0_a_2_default: mc0_a_2_default {
288			default_mux {
289				function = "mc0";
290				groups = "mc0_a_2";
291			};
292			default_cfg1 {
293				pins = "GPIO22_AA3"; /* FBCLK */
294				ste,config = <&in_nopull>;
295			};
296			default_cfg2 {
297				pins = "GPIO23_AA4"; /* CLK */
298				ste,config = <&out_lo>;
299			};
300			default_cfg3 {
301				pins =
302				"GPIO24_AB2", /* CMD */
303				"GPIO25_Y4", /* DAT0 */
304				"GPIO26_Y2", /* DAT1 */
305				"GPIO27_AA2", /* DAT2 */
306				"GPIO28_AA1"; /* DAT3 */
307				ste,config = <&in_pu>;
308			};
309		};
310
311		mc0_a_2_sleep: mc0_a_2_sleep {
312			sleep_cfg1 {
313				pins =
314				"GPIO22_AA3", /* FBCLK */
315				"GPIO24_AB2", /* CMD */
316				"GPIO25_Y4", /* DAT0 */
317				"GPIO26_Y2", /* DAT1 */
318				"GPIO27_AA2", /* DAT2 */
319				"GPIO28_AA1"; /* DAT3 */
320				ste,config = <&slpm_in_wkup_pdis>;
321			};
322			sleep_cfg2 {
323				pins = "GPIO23_AA4"; /* CLK */
324				ste,config = <&slpm_out_lo_wkup_pdis>;
325			};
326		};
327	};
328
329	sdi1 {
330		/* This is the WLAN SDIO 4 bits wide */
331		mc1_a_1_default: mc1_a_1_default {
332			default_mux {
333				function = "mc1";
334				groups = "mc1_a_1";
335			};
336			default_cfg1 {
337				pins = "GPIO208_AH16"; /* CLK */
338				ste,config = <&out_lo>;
339			};
340			default_cfg2 {
341				pins = "GPIO209_AG15"; /* FBCLK */
342				ste,config = <&in_nopull>;
343			};
344			default_cfg3 {
345				pins =
346				"GPIO210_AJ15", /* CMD */
347				"GPIO211_AG14", /* DAT0 */
348				"GPIO212_AF13", /* DAT1 */
349				"GPIO213_AG13", /* DAT2 */
350				"GPIO214_AH15"; /* DAT3 */
351				ste,config = <&in_pu>;
352			};
353		};
354
355		mc1_a_1_sleep: mc1_a_1_sleep {
356			sleep_cfg1 {
357				pins = "GPIO208_AH16"; /* CLK */
358				ste,config = <&slpm_out_lo_wkup_pdis>;
359			};
360			sleep_cfg2 {
361				pins =
362				"GPIO209_AG15", /* FBCLK */
363				"GPIO210_AJ15", /* CMD */
364				"GPIO211_AG14", /* DAT0 */
365				"GPIO212_AF13", /* DAT1 */
366				"GPIO213_AG13", /* DAT2 */
367				"GPIO214_AH15"; /* DAT3 */
368				ste,config = <&slpm_in_wkup_pdis>;
369			};
370		};
371
372		mc1_a_2_default: mc1_a_2_default {
373			default_mux {
374				function = "mc1";
375				groups = "mc1_a_2";
376			};
377			default_cfg1 {
378				pins = "GPIO208_AH16"; /* CLK */
379				ste,config = <&out_lo>;
380			};
381			default_cfg2 {
382				pins =
383				"GPIO210_AJ15", /* CMD */
384				"GPIO211_AG14", /* DAT0 */
385				"GPIO212_AF13", /* DAT1 */
386				"GPIO213_AG13", /* DAT2 */
387				"GPIO214_AH15"; /* DAT3 */
388				ste,config = <&in_pu>;
389			};
390		};
391
392		mc1_a_2_sleep: mc1_a_2_sleep {
393			sleep_cfg1 {
394				pins = "GPIO208_AH16"; /* CLK */
395				ste,config = <&slpm_out_lo_wkup_pdis>;
396			};
397			sleep_cfg2 {
398				pins =
399				"GPIO210_AJ15", /* CMD */
400				"GPIO211_AG14", /* DAT0 */
401				"GPIO212_AF13", /* DAT1 */
402				"GPIO213_AG13", /* DAT2 */
403				"GPIO214_AH15"; /* DAT3 */
404				ste,config = <&slpm_in_wkup_pdis>;
405			};
406		};
407	};
408
409	sdi2 {
410		/* This is the eMMC 8 bits wide, usually PoP eMMC */
411		mc2_a_1_default: mc2_a_1_default {
412			default_mux {
413				function = "mc2";
414				groups = "mc2_a_1";
415			};
416			default_cfg1 {
417				pins = "GPIO128_A5"; /* CLK */
418				ste,config = <&out_lo>;
419			};
420			default_cfg2 {
421				pins = "GPIO130_C8"; /* FBCLK */
422				ste,config = <&in_nopull>;
423			};
424			default_cfg3 {
425				pins =
426				"GPIO129_B4", /* CMD */
427				"GPIO131_A12", /* DAT0 */
428				"GPIO132_C10", /* DAT1 */
429				"GPIO133_B10", /* DAT2 */
430				"GPIO134_B9", /* DAT3 */
431				"GPIO135_A9", /* DAT4 */
432				"GPIO136_C7", /* DAT5 */
433				"GPIO137_A7", /* DAT6 */
434				"GPIO138_C5"; /* DAT7 */
435				ste,config = <&in_pu>;
436			};
437		};
438
439		mc2_a_1_sleep: mc2_a_1_sleep {
440			sleep_cfg1 {
441				pins = "GPIO128_A5"; /* CLK */
442				ste,config = <&out_lo_wkup_pdis>;
443			};
444			sleep_cfg2 {
445				pins =
446				"GPIO130_C8", /* FBCLK */
447				"GPIO129_B4"; /* CMD */
448				ste,config = <&in_wkup_pdis_en>;
449			};
450			sleep_cfg3 {
451				pins =
452				"GPIO131_A12", /* DAT0 */
453				"GPIO132_C10", /* DAT1 */
454				"GPIO133_B10", /* DAT2 */
455				"GPIO134_B9", /* DAT3 */
456				"GPIO135_A9", /* DAT4 */
457				"GPIO136_C7", /* DAT5 */
458				"GPIO137_A7", /* DAT6 */
459				"GPIO138_C5"; /* DAT7 */
460				ste,config = <&in_wkup_pdis>;
461			};
462		};
463	};
464
465	sdi4 {
466		/* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
467		mc4_a_1_default: mc4_a_1_default {
468			default_mux {
469				function = "mc4";
470				groups = "mc4_a_1";
471			};
472			default_cfg1 {
473				pins = "GPIO203_AE23"; /* CLK */
474				ste,config = <&out_lo>;
475			};
476			default_cfg2 {
477				pins = "GPIO202_AF25"; /* FBCLK */
478				ste,config = <&in_nopull>;
479			};
480			default_cfg3 {
481				pins =
482				"GPIO201_AF24", /* CMD */
483				"GPIO200_AH26", /* DAT0 */
484				"GPIO199_AH23", /* DAT1 */
485				"GPIO198_AG25", /* DAT2 */
486				"GPIO197_AH24", /* DAT3 */
487				"GPIO207_AJ23", /* DAT4 */
488				"GPIO206_AG24", /* DAT5 */
489				"GPIO205_AG23", /* DAT6 */
490				"GPIO204_AF23"; /* DAT7 */
491				ste,config = <&in_pu>;
492			};
493		};
494
495		mc4_a_1_sleep: mc4_a_1_sleep {
496			sleep_cfg1 {
497				pins = "GPIO203_AE23"; /* CLK */
498				ste,config = <&out_lo_wkup_pdis>;
499			};
500			sleep_cfg2 {
501				pins =
502				"GPIO202_AF25", /* FBCLK */
503				"GPIO201_AF24", /* CMD */
504				"GPIO200_AH26", /* DAT0 */
505				"GPIO199_AH23", /* DAT1 */
506				"GPIO198_AG25", /* DAT2 */
507				"GPIO197_AH24", /* DAT3 */
508				"GPIO207_AJ23", /* DAT4 */
509				"GPIO206_AG24", /* DAT5 */
510				"GPIO205_AG23", /* DAT6 */
511				"GPIO204_AF23"; /* DAT7 */
512				ste,config = <&slpm_in_wkup_pdis>;
513			};
514		};
515	};
516
517	/*
518	 * Multi-rate serial ports (MSPs) - MSP3 output is internal and
519	 * cannot be muxed onto any pins.
520	 */
521	msp0 {
522		msp0txrxtfstck_a_1_default: msp0txrxtfstck_a_1_default {
523			default_msp0_mux {
524				function = "msp0";
525				groups = "msp0txrx_a_1", "msp0tfstck_a_1";
526			};
527			default_msp0_cfg {
528				pins =
529				"GPIO12_AC4", /* TXD */
530				"GPIO15_AC3", /* RXD */
531				"GPIO13_AF3", /* TFS */
532				"GPIO14_AE3"; /* TCK */
533				ste,config = <&in_nopull>;
534			};
535		};
536	};
537
538	msp1 {
539		msp1txrx_a_1_default: msp1txrx_a_1_default {
540			default_mux {
541				function = "msp1";
542				groups = "msp1txrx_a_1", "msp1_a_1";
543			};
544			default_cfg1 {
545				pins = "GPIO33_AF2";
546				ste,config = <&out_lo>;
547			};
548			default_cfg2 {
549				pins =
550				"GPIO34_AE1",
551				"GPIO35_AE2",
552				"GPIO36_AG2";
553				ste,config = <&in_nopull>;
554			};
555		};
556	};
557
558	msp2 {
559		msp2_a_1_default: msp2_a_1_default {
560			/* MSP2 usually used for HDMI audio */
561			default_mux {
562				function = "msp2";
563				groups = "msp2_a_1";
564			};
565			default_cfg1 {
566				pins =
567				"GPIO193_AH27", /* TXD */
568				"GPIO194_AF27", /* TCK */
569				"GPIO195_AG28"; /* TFS */
570				ste,config = <&in_pd>;
571			};
572			default_cfg2 {
573				pins = "GPIO196_AG26"; /* RXD */
574				ste,config = <&out_lo>;
575			};
576		};
577	};
578
579	musb {
580		usb_a_1_default: usb_a_1_default {
581			default_mux {
582				function = "usb";
583				groups = "usb_a_1";
584			};
585			default_cfg1 {
586				pins =
587				"GPIO256_AF28", /* NXT */
588				"GPIO258_AD29", /* XCLK */
589				"GPIO259_AC29", /* DIR */
590				"GPIO260_AD28", /* DAT7 */
591				"GPIO261_AD26", /* DAT6 */
592				"GPIO262_AE26", /* DAT5 */
593				"GPIO263_AG29", /* DAT4 */
594				"GPIO264_AE27", /* DAT3 */
595				"GPIO265_AD27", /* DAT2 */
596				"GPIO266_AC28", /* DAT1 */
597				"GPIO267_AC27"; /* DAT0 */
598				ste,config = <&in_nopull>;
599			};
600			default_cfg2 {
601				pins = "GPIO257_AE29"; /* STP */
602				ste,config = <&out_hi>;
603			};
604		};
605
606		usb_a_1_sleep: usb_a_1_sleep {
607			sleep_cfg1 {
608				pins =
609				"GPIO256_AF28", /* NXT */
610				"GPIO258_AD29", /* XCLK */
611				"GPIO259_AC29"; /* DIR */
612				ste,config = <&slpm_wkup_pdis_en>;
613			};
614			sleep_cfg2 {
615				pins = "GPIO257_AE29"; /* STP */
616				ste,config = <&slpm_out_hi_wkup_pdis>;
617			};
618			sleep_cfg3 {
619				pins =
620				"GPIO260_AD28", /* DAT7 */
621				"GPIO261_AD26", /* DAT6 */
622				"GPIO262_AE26", /* DAT5 */
623				"GPIO263_AG29", /* DAT4 */
624				"GPIO264_AE27", /* DAT3 */
625				"GPIO265_AD27", /* DAT2 */
626				"GPIO266_AC28", /* DAT1 */
627				"GPIO267_AC27"; /* DAT0 */
628				ste,config = <&slpm_in_wkup_pdis_en>;
629			};
630		};
631	};
632};
633