1// SPDX-License-Identifier: GPL-2.0
2/*
3 * This dts file supports Dalmore A04.
4 * Other board revisions are not supported
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/input/input.h>
10#include "tegra114.dtsi"
11
12/ {
13	model = "NVIDIA Tegra114 Dalmore evaluation board";
14	compatible = "nvidia,dalmore", "nvidia,tegra114";
15
16	aliases {
17		rtc0 = "/i2c@7000d000/tps65913@58";
18		rtc1 = "/rtc@7000e000";
19		serial0 = &uartd;
20	};
21
22	chosen {
23		stdout-path = "serial0:115200n8";
24	};
25
26	memory@80000000 {
27		reg = <0x80000000 0x40000000>;
28	};
29
30	host1x@50000000 {
31		hdmi@54280000 {
32			status = "okay";
33
34			hdmi-supply = <&vdd_5v0_hdmi>;
35			vdd-supply = <&vdd_hdmi_reg>;
36			pll-supply = <&palmas_smps3_reg>;
37
38			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
39			nvidia,hpd-gpio =
40				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
41		};
42
43		dsi@54300000 {
44			status = "okay";
45
46			avdd-dsi-csi-supply = <&avdd_1v2_reg>;
47
48			panel@0 {
49				compatible = "panasonic,vvx10f004b00";
50				reg = <0>;
51
52				power-supply = <&avdd_lcd_reg>;
53				backlight = <&backlight>;
54			};
55		};
56	};
57
58	pinmux@70000868 {
59		pinctrl-names = "default";
60		pinctrl-0 = <&state_default>;
61
62		state_default: pinmux {
63			clk1_out_pw4 {
64				nvidia,pins = "clk1_out_pw4";
65				nvidia,function = "extperiph1";
66				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
67				nvidia,tristate = <TEGRA_PIN_DISABLE>;
68				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
69			};
70			dap1_din_pn1 {
71				nvidia,pins = "dap1_din_pn1";
72				nvidia,function = "i2s0";
73				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
74				nvidia,tristate = <TEGRA_PIN_ENABLE>;
75				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
76			};
77			dap1_dout_pn2 {
78				nvidia,pins = "dap1_dout_pn2",
79						"dap1_fs_pn0",
80						"dap1_sclk_pn3";
81				nvidia,function = "i2s0";
82				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
83				nvidia,tristate = <TEGRA_PIN_DISABLE>;
84				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
85			};
86			dap2_din_pa4 {
87				nvidia,pins = "dap2_din_pa4";
88				nvidia,function = "i2s1";
89				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
90				nvidia,tristate = <TEGRA_PIN_ENABLE>;
91				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
92			};
93			dap2_dout_pa5 {
94				nvidia,pins = "dap2_dout_pa5",
95						"dap2_fs_pa2",
96						"dap2_sclk_pa3";
97				nvidia,function = "i2s1";
98				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
99				nvidia,tristate = <TEGRA_PIN_DISABLE>;
100				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
101			};
102			dap4_din_pp5 {
103				nvidia,pins = "dap4_din_pp5",
104						"dap4_dout_pp6",
105						"dap4_fs_pp4",
106						"dap4_sclk_pp7";
107				nvidia,function = "i2s3";
108				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
109				nvidia,tristate = <TEGRA_PIN_DISABLE>;
110				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
111			};
112			dvfs_pwm_px0 {
113				nvidia,pins = "dvfs_pwm_px0",
114						"dvfs_clk_px2";
115				nvidia,function = "cldvfs";
116				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
117				nvidia,tristate = <TEGRA_PIN_DISABLE>;
118				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
119			};
120			ulpi_clk_py0 {
121				nvidia,pins = "ulpi_clk_py0",
122						"ulpi_data0_po1",
123						"ulpi_data1_po2",
124						"ulpi_data2_po3",
125						"ulpi_data3_po4",
126						"ulpi_data4_po5",
127						"ulpi_data5_po6",
128						"ulpi_data6_po7",
129						"ulpi_data7_po0";
130				nvidia,function = "ulpi";
131				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
132				nvidia,tristate = <TEGRA_PIN_DISABLE>;
133				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134			};
135			ulpi_dir_py1 {
136				nvidia,pins = "ulpi_dir_py1",
137						"ulpi_nxt_py2";
138				nvidia,function = "ulpi";
139				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
140				nvidia,tristate = <TEGRA_PIN_ENABLE>;
141				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
142			};
143			ulpi_stp_py3 {
144				nvidia,pins = "ulpi_stp_py3";
145				nvidia,function = "ulpi";
146				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
147				nvidia,tristate = <TEGRA_PIN_DISABLE>;
148				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
149			};
150			cam_i2c_scl_pbb1 {
151				nvidia,pins = "cam_i2c_scl_pbb1",
152						"cam_i2c_sda_pbb2";
153				nvidia,function = "i2c3";
154				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
155				nvidia,tristate = <TEGRA_PIN_DISABLE>;
156				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
157				nvidia,lock = <TEGRA_PIN_DISABLE>;
158				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
159			};
160			cam_mclk_pcc0 {
161				nvidia,pins = "cam_mclk_pcc0",
162						"pbb0";
163				nvidia,function = "vi_alt3";
164				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
165				nvidia,tristate = <TEGRA_PIN_DISABLE>;
166				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
167				nvidia,lock = <TEGRA_PIN_DISABLE>;
168			};
169			gen2_i2c_scl_pt5 {
170				nvidia,pins = "gen2_i2c_scl_pt5",
171						"gen2_i2c_sda_pt6";
172				nvidia,function = "i2c2";
173				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
174				nvidia,tristate = <TEGRA_PIN_DISABLE>;
175				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
176				nvidia,lock = <TEGRA_PIN_DISABLE>;
177				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
178			};
179			gmi_a16_pj7 {
180				nvidia,pins = "gmi_a16_pj7";
181				nvidia,function = "uartd";
182				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
183				nvidia,tristate = <TEGRA_PIN_DISABLE>;
184				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
185			};
186			gmi_a17_pb0 {
187				nvidia,pins = "gmi_a17_pb0",
188						"gmi_a18_pb1";
189				nvidia,function = "uartd";
190				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
191				nvidia,tristate = <TEGRA_PIN_ENABLE>;
192				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
193			};
194			gmi_a19_pk7 {
195				nvidia,pins = "gmi_a19_pk7";
196				nvidia,function = "uartd";
197				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
198				nvidia,tristate = <TEGRA_PIN_DISABLE>;
199				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
200			};
201			gmi_ad5_pg5 {
202				nvidia,pins = "gmi_ad5_pg5",
203						"gmi_cs6_n_pi3",
204						"gmi_wr_n_pi0";
205				nvidia,function = "spi4";
206				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
207				nvidia,tristate = <TEGRA_PIN_DISABLE>;
208				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
209			};
210			gmi_ad6_pg6 {
211				nvidia,pins = "gmi_ad6_pg6",
212						"gmi_ad7_pg7";
213				nvidia,function = "spi4";
214				nvidia,pull = <TEGRA_PIN_PULL_UP>;
215				nvidia,tristate = <TEGRA_PIN_DISABLE>;
216				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
217			};
218			gmi_ad12_ph4 {
219				nvidia,pins = "gmi_ad12_ph4";
220				nvidia,function = "rsvd4";
221				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
222				nvidia,tristate = <TEGRA_PIN_DISABLE>;
223				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
224			};
225			gmi_ad9_ph1 {
226				nvidia,pins = "gmi_ad9_ph1";
227				nvidia,function = "pwm1";
228				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229				nvidia,tristate = <TEGRA_PIN_DISABLE>;
230				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
231			};
232			gmi_cs1_n_pj2 {
233				nvidia,pins = "gmi_cs1_n_pj2",
234						"gmi_oe_n_pi1";
235				nvidia,function = "soc";
236				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
237				nvidia,tristate = <TEGRA_PIN_ENABLE>;
238				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
239			};
240			clk2_out_pw5 {
241				nvidia,pins = "clk2_out_pw5";
242				nvidia,function = "extperiph2";
243				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
244				nvidia,tristate = <TEGRA_PIN_DISABLE>;
245				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
246			};
247			sdmmc1_clk_pz0 {
248				nvidia,pins = "sdmmc1_clk_pz0";
249				nvidia,function = "sdmmc1";
250				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
251				nvidia,tristate = <TEGRA_PIN_DISABLE>;
252				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
253			};
254			sdmmc1_cmd_pz1 {
255				nvidia,pins = "sdmmc1_cmd_pz1",
256						"sdmmc1_dat0_py7",
257						"sdmmc1_dat1_py6",
258						"sdmmc1_dat2_py5",
259						"sdmmc1_dat3_py4";
260				nvidia,function = "sdmmc1";
261				nvidia,pull = <TEGRA_PIN_PULL_UP>;
262				nvidia,tristate = <TEGRA_PIN_DISABLE>;
263				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
264			};
265			sdmmc1_wp_n_pv3 {
266				nvidia,pins = "sdmmc1_wp_n_pv3";
267				nvidia,function = "spi4";
268				nvidia,pull = <TEGRA_PIN_PULL_UP>;
269				nvidia,tristate = <TEGRA_PIN_DISABLE>;
270				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
271			};
272			sdmmc3_clk_pa6 {
273				nvidia,pins = "sdmmc3_clk_pa6";
274				nvidia,function = "sdmmc3";
275				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
276				nvidia,tristate = <TEGRA_PIN_DISABLE>;
277				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
278			};
279			sdmmc3_cmd_pa7 {
280				nvidia,pins = "sdmmc3_cmd_pa7",
281						"sdmmc3_dat0_pb7",
282						"sdmmc3_dat1_pb6",
283						"sdmmc3_dat2_pb5",
284						"sdmmc3_dat3_pb4",
285						"kb_col4_pq4",
286						"sdmmc3_clk_lb_out_pee4",
287						"sdmmc3_clk_lb_in_pee5";
288				nvidia,function = "sdmmc3";
289				nvidia,pull = <TEGRA_PIN_PULL_UP>;
290				nvidia,tristate = <TEGRA_PIN_DISABLE>;
291				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
292			};
293			sdmmc4_clk_pcc4 {
294				nvidia,pins = "sdmmc4_clk_pcc4";
295				nvidia,function = "sdmmc4";
296				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
297				nvidia,tristate = <TEGRA_PIN_DISABLE>;
298				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
299			};
300			sdmmc4_cmd_pt7 {
301				nvidia,pins = "sdmmc4_cmd_pt7",
302						"sdmmc4_dat0_paa0",
303						"sdmmc4_dat1_paa1",
304						"sdmmc4_dat2_paa2",
305						"sdmmc4_dat3_paa3",
306						"sdmmc4_dat4_paa4",
307						"sdmmc4_dat5_paa5",
308						"sdmmc4_dat6_paa6",
309						"sdmmc4_dat7_paa7";
310				nvidia,function = "sdmmc4";
311				nvidia,pull = <TEGRA_PIN_PULL_UP>;
312				nvidia,tristate = <TEGRA_PIN_DISABLE>;
313				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
314			};
315			clk_32k_out_pa0 {
316				nvidia,pins = "clk_32k_out_pa0";
317				nvidia,function = "blink";
318				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
319				nvidia,tristate = <TEGRA_PIN_DISABLE>;
320				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
321			};
322			kb_col0_pq0 {
323				nvidia,pins = "kb_col0_pq0",
324						"kb_col1_pq1",
325						"kb_col2_pq2",
326						"kb_row0_pr0",
327						"kb_row1_pr1",
328						"kb_row2_pr2";
329				nvidia,function = "kbc";
330				nvidia,pull = <TEGRA_PIN_PULL_UP>;
331				nvidia,tristate = <TEGRA_PIN_DISABLE>;
332				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
333			};
334			dap3_din_pp1 {
335				nvidia,pins = "dap3_din_pp1",
336						"dap3_sclk_pp3";
337				nvidia,function = "displayb";
338				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
339				nvidia,tristate = <TEGRA_PIN_ENABLE>;
340				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
341			};
342			pv0 {
343				nvidia,pins = "pv0";
344				nvidia,function = "rsvd4";
345				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
346				nvidia,tristate = <TEGRA_PIN_ENABLE>;
347				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
348			};
349			kb_row7_pr7 {
350				nvidia,pins = "kb_row7_pr7";
351				nvidia,function = "rsvd2";
352				nvidia,pull = <TEGRA_PIN_PULL_UP>;
353				nvidia,tristate = <TEGRA_PIN_DISABLE>;
354				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
355			};
356			kb_row10_ps2 {
357				nvidia,pins = "kb_row10_ps2";
358				nvidia,function = "uarta";
359				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
360				nvidia,tristate = <TEGRA_PIN_ENABLE>;
361				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
362			};
363			kb_row9_ps1 {
364				nvidia,pins = "kb_row9_ps1";
365				nvidia,function = "uarta";
366				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
367				nvidia,tristate = <TEGRA_PIN_DISABLE>;
368				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
369			};
370			pwr_i2c_scl_pz6 {
371				nvidia,pins = "pwr_i2c_scl_pz6",
372						"pwr_i2c_sda_pz7";
373				nvidia,function = "i2cpwr";
374				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
375				nvidia,tristate = <TEGRA_PIN_DISABLE>;
376				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
377				nvidia,lock = <TEGRA_PIN_DISABLE>;
378				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
379			};
380			sys_clk_req_pz5 {
381				nvidia,pins = "sys_clk_req_pz5";
382				nvidia,function = "sysclk";
383				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
384				nvidia,tristate = <TEGRA_PIN_DISABLE>;
385				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
386			};
387			core_pwr_req {
388				nvidia,pins = "core_pwr_req";
389				nvidia,function = "pwron";
390				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
391				nvidia,tristate = <TEGRA_PIN_DISABLE>;
392				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
393			};
394			cpu_pwr_req {
395				nvidia,pins = "cpu_pwr_req";
396				nvidia,function = "cpu";
397				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
398				nvidia,tristate = <TEGRA_PIN_DISABLE>;
399				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
400			};
401			pwr_int_n {
402				nvidia,pins = "pwr_int_n";
403				nvidia,function = "pmi";
404				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
405				nvidia,tristate = <TEGRA_PIN_ENABLE>;
406				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
407			};
408			reset_out_n {
409				nvidia,pins = "reset_out_n";
410				nvidia,function = "reset_out_n";
411				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
412				nvidia,tristate = <TEGRA_PIN_DISABLE>;
413				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
414			};
415			clk3_out_pee0 {
416				nvidia,pins = "clk3_out_pee0";
417				nvidia,function = "extperiph3";
418				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
419				nvidia,tristate = <TEGRA_PIN_DISABLE>;
420				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
421			};
422			gen1_i2c_scl_pc4 {
423				nvidia,pins = "gen1_i2c_scl_pc4",
424						"gen1_i2c_sda_pc5";
425				nvidia,function = "i2c1";
426				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
427				nvidia,tristate = <TEGRA_PIN_DISABLE>;
428				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
429				nvidia,lock = <TEGRA_PIN_DISABLE>;
430				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
431			};
432			uart2_cts_n_pj5 {
433				nvidia,pins = "uart2_cts_n_pj5";
434				nvidia,function = "uartb";
435				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
436				nvidia,tristate = <TEGRA_PIN_ENABLE>;
437				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
438			};
439			uart2_rts_n_pj6 {
440				nvidia,pins = "uart2_rts_n_pj6";
441				nvidia,function = "uartb";
442				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
443				nvidia,tristate = <TEGRA_PIN_DISABLE>;
444				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
445			};
446			uart2_rxd_pc3 {
447				nvidia,pins = "uart2_rxd_pc3";
448				nvidia,function = "irda";
449				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
450				nvidia,tristate = <TEGRA_PIN_ENABLE>;
451				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
452			};
453			uart2_txd_pc2 {
454				nvidia,pins = "uart2_txd_pc2";
455				nvidia,function = "irda";
456				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
457				nvidia,tristate = <TEGRA_PIN_DISABLE>;
458				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
459			};
460			uart3_cts_n_pa1 {
461				nvidia,pins = "uart3_cts_n_pa1",
462						"uart3_rxd_pw7";
463				nvidia,function = "uartc";
464				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
465				nvidia,tristate = <TEGRA_PIN_ENABLE>;
466				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
467			};
468			uart3_rts_n_pc0 {
469				nvidia,pins = "uart3_rts_n_pc0",
470						"uart3_txd_pw6";
471				nvidia,function = "uartc";
472				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
473				nvidia,tristate = <TEGRA_PIN_DISABLE>;
474				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
475			};
476			owr {
477				nvidia,pins = "owr";
478				nvidia,function = "owr";
479				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
480				nvidia,tristate = <TEGRA_PIN_DISABLE>;
481				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
482			};
483			hdmi_cec_pee3 {
484				nvidia,pins = "hdmi_cec_pee3";
485				nvidia,function = "cec";
486				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
487				nvidia,tristate = <TEGRA_PIN_DISABLE>;
488				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
489				nvidia,lock = <TEGRA_PIN_DISABLE>;
490				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
491			};
492			ddc_scl_pv4 {
493				nvidia,pins = "ddc_scl_pv4",
494						"ddc_sda_pv5";
495				nvidia,function = "i2c4";
496				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
497				nvidia,tristate = <TEGRA_PIN_DISABLE>;
498				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
499				nvidia,lock = <TEGRA_PIN_DISABLE>;
500				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
501			};
502			spdif_in_pk6 {
503				nvidia,pins = "spdif_in_pk6";
504				nvidia,function = "usb";
505				nvidia,pull = <TEGRA_PIN_PULL_UP>;
506				nvidia,tristate = <TEGRA_PIN_DISABLE>;
507				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
508				nvidia,lock = <TEGRA_PIN_DISABLE>;
509			};
510			usb_vbus_en0_pn4 {
511				nvidia,pins = "usb_vbus_en0_pn4";
512				nvidia,function = "usb";
513				nvidia,pull = <TEGRA_PIN_PULL_UP>;
514				nvidia,tristate = <TEGRA_PIN_DISABLE>;
515				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
516				nvidia,lock = <TEGRA_PIN_DISABLE>;
517				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
518			};
519			gpio_x6_aud_px6 {
520				nvidia,pins = "gpio_x6_aud_px6";
521				nvidia,function = "spi6";
522				nvidia,pull = <TEGRA_PIN_PULL_UP>;
523				nvidia,tristate = <TEGRA_PIN_ENABLE>;
524				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
525			};
526			gpio_x4_aud_px4 {
527				nvidia,pins = "gpio_x4_aud_px4",
528						"gpio_x7_aud_px7";
529				nvidia,function = "rsvd1";
530				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
531				nvidia,tristate = <TEGRA_PIN_DISABLE>;
532				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
533			};
534			gpio_x5_aud_px5 {
535				nvidia,pins = "gpio_x5_aud_px5";
536				nvidia,function = "rsvd1";
537				nvidia,pull = <TEGRA_PIN_PULL_UP>;
538				nvidia,tristate = <TEGRA_PIN_DISABLE>;
539				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
540			};
541			gpio_w2_aud_pw2 {
542				nvidia,pins = "gpio_w2_aud_pw2";
543				nvidia,function = "rsvd2";
544				nvidia,pull = <TEGRA_PIN_PULL_UP>;
545				nvidia,tristate = <TEGRA_PIN_DISABLE>;
546				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
547			};
548			gpio_w3_aud_pw3 {
549				nvidia,pins = "gpio_w3_aud_pw3";
550				nvidia,function = "spi6";
551				nvidia,pull = <TEGRA_PIN_PULL_UP>;
552				nvidia,tristate = <TEGRA_PIN_DISABLE>;
553				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
554			};
555			gpio_x1_aud_px1 {
556				nvidia,pins = "gpio_x1_aud_px1";
557				nvidia,function = "rsvd4";
558				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
559				nvidia,tristate = <TEGRA_PIN_DISABLE>;
560				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
561			};
562			gpio_x3_aud_px3 {
563				nvidia,pins = "gpio_x3_aud_px3";
564				nvidia,function = "rsvd4";
565				nvidia,pull = <TEGRA_PIN_PULL_UP>;
566				nvidia,tristate = <TEGRA_PIN_DISABLE>;
567				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
568			};
569			dap3_fs_pp0 {
570				nvidia,pins = "dap3_fs_pp0";
571				nvidia,function = "i2s2";
572				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
573				nvidia,tristate = <TEGRA_PIN_DISABLE>;
574				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
575			};
576			dap3_dout_pp2 {
577				nvidia,pins = "dap3_dout_pp2";
578				nvidia,function = "i2s2";
579				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
580				nvidia,tristate = <TEGRA_PIN_DISABLE>;
581				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
582			};
583			pv1 {
584				nvidia,pins = "pv1";
585				nvidia,function = "rsvd1";
586				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
587				nvidia,tristate = <TEGRA_PIN_DISABLE>;
588				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
589			};
590			pbb3 {
591				nvidia,pins = "pbb3",
592						"pbb5",
593						"pbb6",
594						"pbb7";
595				nvidia,function = "rsvd4";
596				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
597				nvidia,tristate = <TEGRA_PIN_DISABLE>;
598				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
599			};
600			pcc1 {
601				nvidia,pins = "pcc1",
602						"pcc2";
603				nvidia,function = "rsvd4";
604				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
605				nvidia,tristate = <TEGRA_PIN_DISABLE>;
606				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
607			};
608			gmi_ad0_pg0 {
609				nvidia,pins = "gmi_ad0_pg0",
610						"gmi_ad1_pg1";
611				nvidia,function = "gmi";
612				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
613				nvidia,tristate = <TEGRA_PIN_DISABLE>;
614				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
615			};
616			gmi_ad10_ph2 {
617				nvidia,pins = "gmi_ad10_ph2",
618						"gmi_ad11_ph3",
619						"gmi_ad13_ph5",
620						"gmi_ad8_ph0",
621						"gmi_clk_pk1";
622				nvidia,function = "gmi";
623				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
624				nvidia,tristate = <TEGRA_PIN_DISABLE>;
625				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
626			};
627			gmi_ad2_pg2 {
628				nvidia,pins = "gmi_ad2_pg2",
629						"gmi_ad3_pg3";
630				nvidia,function = "gmi";
631				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
632				nvidia,tristate = <TEGRA_PIN_DISABLE>;
633				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
634			};
635			gmi_adv_n_pk0 {
636				nvidia,pins = "gmi_adv_n_pk0",
637						"gmi_cs0_n_pj0",
638						"gmi_cs2_n_pk3",
639						"gmi_cs4_n_pk2",
640						"gmi_cs7_n_pi6",
641						"gmi_dqs_p_pj3",
642						"gmi_iordy_pi5",
643						"gmi_wp_n_pc7";
644				nvidia,function = "gmi";
645				nvidia,pull = <TEGRA_PIN_PULL_UP>;
646				nvidia,tristate = <TEGRA_PIN_DISABLE>;
647				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
648			};
649			gmi_cs3_n_pk4 {
650				nvidia,pins = "gmi_cs3_n_pk4";
651				nvidia,function = "gmi";
652				nvidia,pull = <TEGRA_PIN_PULL_UP>;
653				nvidia,tristate = <TEGRA_PIN_DISABLE>;
654				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
655			};
656			clk2_req_pcc5 {
657				nvidia,pins = "clk2_req_pcc5";
658				nvidia,function = "rsvd4";
659				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
660				nvidia,tristate = <TEGRA_PIN_DISABLE>;
661				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
662			};
663			kb_col3_pq3 {
664				nvidia,pins = "kb_col3_pq3",
665						"kb_col6_pq6",
666						"kb_col7_pq7";
667				nvidia,function = "kbc";
668				nvidia,pull = <TEGRA_PIN_PULL_UP>;
669				nvidia,tristate = <TEGRA_PIN_DISABLE>;
670				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
671			};
672			kb_col5_pq5 {
673				nvidia,pins = "kb_col5_pq5";
674				nvidia,function = "kbc";
675				nvidia,pull = <TEGRA_PIN_PULL_UP>;
676				nvidia,tristate = <TEGRA_PIN_DISABLE>;
677				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
678			};
679			kb_row3_pr3 {
680				nvidia,pins = "kb_row3_pr3",
681						"kb_row4_pr4",
682						"kb_row6_pr6",
683						"kb_row8_ps0";
684				nvidia,function = "kbc";
685				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
686				nvidia,tristate = <TEGRA_PIN_DISABLE>;
687				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
688			};
689			clk3_req_pee1 {
690				nvidia,pins = "clk3_req_pee1";
691				nvidia,function = "rsvd4";
692				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
693				nvidia,tristate = <TEGRA_PIN_DISABLE>;
694				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
695			};
696			pu4 {
697				nvidia,pins = "pu4";
698				nvidia,function = "displayb";
699				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
700				nvidia,tristate = <TEGRA_PIN_DISABLE>;
701				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
702			};
703			pu5 {
704				nvidia,pins = "pu5",
705						"pu6";
706				nvidia,function = "displayb";
707				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
708				nvidia,tristate = <TEGRA_PIN_DISABLE>;
709				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
710			};
711			hdmi_int_pn7 {
712				nvidia,pins = "hdmi_int_pn7";
713				nvidia,function = "rsvd1";
714				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
715				nvidia,tristate = <TEGRA_PIN_DISABLE>;
716				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
717			};
718			clk1_req_pee2 {
719				nvidia,pins = "clk1_req_pee2",
720						"usb_vbus_en1_pn5";
721				nvidia,function = "rsvd4";
722				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
723				nvidia,tristate = <TEGRA_PIN_ENABLE>;
724				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
725			};
726
727			drive_sdio1 {
728				nvidia,pins = "drive_sdio1";
729				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
730				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
731				nvidia,pull-down-strength = <36>;
732				nvidia,pull-up-strength = <20>;
733				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
734				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
735			};
736			drive_sdio3 {
737				nvidia,pins = "drive_sdio3";
738				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
739				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
740				nvidia,pull-down-strength = <22>;
741				nvidia,pull-up-strength = <36>;
742				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
743				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
744			};
745			drive_gma {
746				nvidia,pins = "drive_gma";
747				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
748				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
749				nvidia,pull-down-strength = <2>;
750				nvidia,pull-up-strength = <1>;
751				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
752				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
753			};
754		};
755	};
756
757	serial@70006300 {
758		status = "okay";
759	};
760
761	pwm@7000a000 {
762		status = "okay";
763	};
764
765	i2c@7000c000 {
766		status = "okay";
767		clock-frequency = <100000>;
768
769		battery: smart-battery@b {
770			compatible = "ti,bq20z45", "sbs,sbs-battery";
771			reg = <0xb>;
772			sbs,i2c-retry-count = <2>;
773			sbs,poll-retry-count = <100>;
774			power-supplies = <&charger>;
775		};
776
777		rt5640: rt5640@1c {
778			compatible = "realtek,rt5640";
779			reg = <0x1c>;
780			interrupt-parent = <&gpio>;
781			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
782			realtek,ldo1-en-gpios =
783				<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
784		};
785
786		temperature-sensor@4c {
787			compatible = "onnn,nct1008";
788			reg = <0x4c>;
789			vcc-supply = <&palmas_ldo6_reg>;
790			interrupt-parent = <&gpio>;
791			interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>;
792		};
793	};
794
795	hdmi_ddc: i2c@7000c700 {
796		status = "okay";
797	};
798
799	i2c@7000d000 {
800		status = "okay";
801		clock-frequency = <400000>;
802
803		tps51632@43 {
804			compatible = "ti,tps51632";
805			reg = <0x43>;
806			regulator-name = "vdd-cpu";
807			regulator-min-microvolt = <500000>;
808			regulator-max-microvolt = <1520000>;
809			regulator-boot-on;
810			regulator-always-on;
811		};
812
813		tps65090@48 {
814			compatible = "ti,tps65090";
815			reg = <0x48>;
816			interrupt-parent = <&gpio>;
817			interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>;
818
819			vsys1-supply = <&vdd_ac_bat_reg>;
820			vsys2-supply = <&vdd_ac_bat_reg>;
821			vsys3-supply = <&vdd_ac_bat_reg>;
822			infet1-supply = <&vdd_ac_bat_reg>;
823			infet2-supply = <&vdd_ac_bat_reg>;
824			infet3-supply = <&tps65090_dcdc2_reg>;
825			infet4-supply = <&tps65090_dcdc2_reg>;
826			infet5-supply = <&tps65090_dcdc2_reg>;
827			infet6-supply = <&tps65090_dcdc2_reg>;
828			infet7-supply = <&tps65090_dcdc2_reg>;
829			vsys-l1-supply = <&vdd_ac_bat_reg>;
830			vsys-l2-supply = <&vdd_ac_bat_reg>;
831
832			charger: charger {
833				compatible = "ti,tps65090-charger";
834				ti,enable-low-current-chrg;
835			};
836
837			regulators {
838				tps65090_dcdc1_reg: dcdc1 {
839					regulator-name = "vdd-sys-5v0";
840					regulator-always-on;
841					regulator-boot-on;
842				};
843
844				tps65090_dcdc2_reg: dcdc2 {
845					regulator-name = "vdd-sys-3v3";
846					regulator-always-on;
847					regulator-boot-on;
848				};
849
850				tps65090_dcdc3_reg: dcdc3 {
851					regulator-name = "vdd-ao";
852					regulator-always-on;
853					regulator-boot-on;
854				};
855
856				vdd_bl_reg: fet1 {
857					regulator-name = "vdd-lcd-bl";
858				};
859
860				fet3 {
861					regulator-name = "vdd-modem-3v3";
862				};
863
864				avdd_lcd_reg: fet4 {
865					regulator-name = "avdd-lcd";
866				};
867
868				fet5 {
869					regulator-name = "vdd-lvds";
870				};
871
872				fet6 {
873					regulator-name = "vdd-sd-slot";
874					regulator-always-on;
875					regulator-boot-on;
876				};
877
878				fet7 {
879					regulator-name = "vdd-com-3v3";
880				};
881
882				ldo1 {
883					regulator-name = "vdd-sby-5v0";
884					regulator-always-on;
885					regulator-boot-on;
886				};
887
888				ldo2 {
889					regulator-name = "vdd-sby-3v3";
890					regulator-always-on;
891					regulator-boot-on;
892				};
893			};
894		};
895
896		palmas: tps65913@58 {
897			compatible = "ti,palmas";
898			reg = <0x58>;
899			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
900
901			#interrupt-cells = <2>;
902			interrupt-controller;
903
904			ti,system-power-controller;
905
906			palmas_gpio: gpio {
907				compatible = "ti,palmas-gpio";
908				gpio-controller;
909				#gpio-cells = <2>;
910			};
911
912			pmic {
913				compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
914				smps1-in-supply = <&tps65090_dcdc3_reg>;
915				smps3-in-supply = <&tps65090_dcdc3_reg>;
916				smps4-in-supply = <&tps65090_dcdc2_reg>;
917				smps7-in-supply = <&tps65090_dcdc2_reg>;
918				smps8-in-supply = <&tps65090_dcdc2_reg>;
919				smps9-in-supply = <&tps65090_dcdc2_reg>;
920				ldo1-in-supply = <&tps65090_dcdc2_reg>;
921				ldo2-in-supply = <&tps65090_dcdc2_reg>;
922				ldo3-in-supply = <&palmas_smps3_reg>;
923				ldo4-in-supply = <&tps65090_dcdc2_reg>;
924				ldo5-in-supply = <&vdd_ac_bat_reg>;
925				ldo6-in-supply = <&tps65090_dcdc2_reg>;
926				ldo7-in-supply = <&tps65090_dcdc2_reg>;
927				ldo8-in-supply = <&tps65090_dcdc3_reg>;
928				ldo9-in-supply = <&palmas_smps9_reg>;
929				ldoln-in-supply = <&tps65090_dcdc1_reg>;
930				ldousb-in-supply = <&tps65090_dcdc1_reg>;
931
932				regulators {
933					smps12 {
934						regulator-name = "vddio-ddr";
935						regulator-min-microvolt = <1350000>;
936						regulator-max-microvolt = <1350000>;
937						regulator-always-on;
938						regulator-boot-on;
939					};
940
941					palmas_smps3_reg: smps3 {
942						regulator-name = "vddio-1v8";
943						regulator-min-microvolt = <1800000>;
944						regulator-max-microvolt = <1800000>;
945						regulator-always-on;
946						regulator-boot-on;
947					};
948
949					smps45 {
950						regulator-name = "vdd-core";
951						regulator-min-microvolt = <900000>;
952						regulator-max-microvolt = <1400000>;
953						regulator-always-on;
954						regulator-boot-on;
955					};
956
957					smps457 {
958						regulator-name = "vdd-core";
959						regulator-min-microvolt = <900000>;
960						regulator-max-microvolt = <1400000>;
961						regulator-always-on;
962						regulator-boot-on;
963					};
964
965					smps8 {
966						regulator-name = "avdd-pll";
967						regulator-min-microvolt = <1050000>;
968						regulator-max-microvolt = <1050000>;
969						regulator-always-on;
970						regulator-boot-on;
971					};
972
973					palmas_smps9_reg: smps9 {
974						regulator-name = "sdhci-vdd-sd-slot";
975						regulator-min-microvolt = <2800000>;
976						regulator-max-microvolt = <2800000>;
977						regulator-always-on;
978					};
979
980					ldo1 {
981						regulator-name = "avdd-cam1";
982						regulator-min-microvolt = <2800000>;
983						regulator-max-microvolt = <2800000>;
984					};
985
986					ldo2 {
987						regulator-name = "avdd-cam2";
988						regulator-min-microvolt = <2800000>;
989						regulator-max-microvolt = <2800000>;
990					};
991
992					avdd_1v2_reg: ldo3 {
993						regulator-name = "avdd-dsi-csi";
994						regulator-min-microvolt = <1200000>;
995						regulator-max-microvolt = <1200000>;
996					};
997
998					ldo4 {
999						regulator-name = "vpp-fuse";
1000						regulator-min-microvolt = <1800000>;
1001						regulator-max-microvolt = <1800000>;
1002					};
1003
1004					palmas_ldo6_reg: ldo6 {
1005						regulator-name = "vdd-sensor-2v85";
1006						regulator-min-microvolt = <2850000>;
1007						regulator-max-microvolt = <2850000>;
1008					};
1009
1010					ldo7 {
1011						regulator-name = "vdd-af-cam1";
1012						regulator-min-microvolt = <2800000>;
1013						regulator-max-microvolt = <2800000>;
1014					};
1015
1016					ldo8 {
1017						regulator-name = "vdd-rtc";
1018						regulator-min-microvolt = <900000>;
1019						regulator-max-microvolt = <900000>;
1020						regulator-always-on;
1021						regulator-boot-on;
1022						ti,enable-ldo8-tracking;
1023					};
1024
1025					ldo9 {
1026						regulator-name = "vddio-sdmmc-2";
1027						regulator-min-microvolt = <1800000>;
1028						regulator-max-microvolt = <3300000>;
1029						regulator-always-on;
1030						regulator-boot-on;
1031					};
1032
1033					ldoln {
1034						regulator-name = "hvdd-usb";
1035						regulator-min-microvolt = <3300000>;
1036						regulator-max-microvolt = <3300000>;
1037					};
1038
1039					ldousb {
1040						regulator-name = "avdd-usb";
1041						regulator-min-microvolt = <3300000>;
1042						regulator-max-microvolt = <3300000>;
1043						regulator-always-on;
1044						regulator-boot-on;
1045					};
1046
1047					regen1 {
1048						regulator-name = "rail-3v3";
1049						regulator-max-microvolt = <3300000>;
1050						regulator-always-on;
1051						regulator-boot-on;
1052					};
1053
1054					regen2 {
1055						regulator-name = "rail-5v0";
1056						regulator-max-microvolt = <5000000>;
1057						regulator-always-on;
1058						regulator-boot-on;
1059					};
1060				};
1061			};
1062
1063			rtc {
1064				compatible = "ti,palmas-rtc";
1065				interrupt-parent = <&palmas>;
1066				interrupts = <8 0>;
1067			};
1068
1069			pinmux {
1070				compatible = "ti,tps65913-pinctrl";
1071				pinctrl-names = "default";
1072				pinctrl-0 = <&palmas_default>;
1073
1074				palmas_default: pinmux {
1075					pin_gpio6 {
1076						pins = "gpio6";
1077						function = "gpio";
1078					};
1079				};
1080			};
1081		};
1082	};
1083
1084	spi@7000da00 {
1085		status = "okay";
1086		spi-max-frequency = <25000000>;
1087		spi-flash@0 {
1088			compatible = "winbond,w25q32dw", "jedec,spi-nor";
1089			reg = <0>;
1090			spi-max-frequency = <20000000>;
1091		};
1092	};
1093
1094	pmc@7000e400 {
1095		nvidia,invert-interrupt;
1096		nvidia,suspend-mode = <1>;
1097		nvidia,cpu-pwr-good-time = <500>;
1098		nvidia,cpu-pwr-off-time = <300>;
1099		nvidia,core-pwr-good-time = <641 3845>;
1100		nvidia,core-pwr-off-time = <61036>;
1101		nvidia,core-power-req-active-high;
1102		nvidia,sys-clock-req-active-high;
1103	};
1104
1105	ahub@70080000 {
1106		i2s@70080400 {
1107			status = "okay";
1108		};
1109	};
1110
1111	mmc@78000400 {
1112		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1113		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1114		bus-width = <4>;
1115		status = "okay";
1116	};
1117
1118	mmc@78000600 {
1119		bus-width = <8>;
1120		status = "okay";
1121		non-removable;
1122	};
1123
1124	usb@7d000000 {
1125		compatible = "nvidia,tegra114-udc";
1126		status = "okay";
1127		dr_mode = "peripheral";
1128	};
1129
1130	usb-phy@7d000000 {
1131		status = "okay";
1132	};
1133
1134	usb@7d008000 {
1135		status = "okay";
1136	};
1137
1138	usb-phy@7d008000 {
1139		status = "okay";
1140		vbus-supply = <&usb3_vbus_reg>;
1141	};
1142
1143	backlight: backlight {
1144		compatible = "pwm-backlight";
1145
1146		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1147		power-supply = <&vdd_bl_reg>;
1148		pwms = <&pwm 1 1000000>;
1149
1150		brightness-levels = <0 4 8 16 32 64 128 255>;
1151		default-brightness-level = <6>;
1152	};
1153
1154	clk32k_in: clock@0 {
1155		compatible = "fixed-clock";
1156		clock-frequency = <32768>;
1157		#clock-cells = <0>;
1158	};
1159
1160	gpio-keys {
1161		compatible = "gpio-keys";
1162
1163		home {
1164			label = "Home";
1165			gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1166			linux,code = <KEY_HOME>;
1167		};
1168
1169		power {
1170			label = "Power";
1171			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1172			linux,code = <KEY_POWER>;
1173			wakeup-source;
1174		};
1175
1176		volume_down {
1177			label = "Volume Down";
1178			gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1179			linux,code = <KEY_VOLUMEDOWN>;
1180		};
1181
1182		volume_up {
1183			label = "Volume Up";
1184			gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1185			linux,code = <KEY_VOLUMEUP>;
1186		};
1187	};
1188
1189	vdd_ac_bat_reg: regulator@0 {
1190		compatible = "regulator-fixed";
1191		regulator-name = "vdd_ac_bat";
1192		regulator-min-microvolt = <5000000>;
1193		regulator-max-microvolt = <5000000>;
1194		regulator-always-on;
1195	};
1196
1197	dvdd_ts_reg: regulator@1 {
1198		compatible = "regulator-fixed";
1199		regulator-name = "dvdd_ts";
1200		regulator-min-microvolt = <1800000>;
1201		regulator-max-microvolt = <1800000>;
1202		enable-active-high;
1203		gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1204	};
1205
1206	usb1_vbus_reg: regulator@3 {
1207		compatible = "regulator-fixed";
1208		regulator-name = "usb1_vbus";
1209		regulator-min-microvolt = <5000000>;
1210		regulator-max-microvolt = <5000000>;
1211		enable-active-high;
1212		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1213		gpio-open-drain;
1214		vin-supply = <&tps65090_dcdc1_reg>;
1215	};
1216
1217	usb3_vbus_reg: regulator@4 {
1218		compatible = "regulator-fixed";
1219		regulator-name = "usb2_vbus";
1220		regulator-min-microvolt = <5000000>;
1221		regulator-max-microvolt = <5000000>;
1222		enable-active-high;
1223		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1224		gpio-open-drain;
1225		vin-supply = <&tps65090_dcdc1_reg>;
1226	};
1227
1228	vdd_hdmi_reg: regulator@5 {
1229		compatible = "regulator-fixed";
1230		regulator-name = "vdd_hdmi_5v0";
1231		regulator-min-microvolt = <5000000>;
1232		regulator-max-microvolt = <5000000>;
1233		vin-supply = <&tps65090_dcdc1_reg>;
1234	};
1235
1236	vdd_cam_1v8_reg: regulator@6 {
1237		compatible = "regulator-fixed";
1238		regulator-name = "vdd_cam_1v8_reg";
1239		regulator-min-microvolt = <1800000>;
1240		regulator-max-microvolt = <1800000>;
1241		enable-active-high;
1242		gpio = <&palmas_gpio 6 0>;
1243	};
1244
1245	vdd_5v0_hdmi: regulator@7 {
1246		compatible = "regulator-fixed";
1247		regulator-name = "VDD_5V0_HDMI_CON";
1248		regulator-min-microvolt = <5000000>;
1249		regulator-max-microvolt = <5000000>;
1250		gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1251		enable-active-high;
1252		vin-supply = <&tps65090_dcdc1_reg>;
1253	};
1254
1255	sound {
1256		compatible = "nvidia,tegra-audio-rt5640-dalmore",
1257			     "nvidia,tegra-audio-rt5640";
1258		nvidia,model = "NVIDIA Tegra Dalmore";
1259
1260		nvidia,audio-routing =
1261			"Headphones", "HPOR",
1262			"Headphones", "HPOL",
1263			"Speakers", "SPORP",
1264			"Speakers", "SPORN",
1265			"Speakers", "SPOLP",
1266			"Speakers", "SPOLN",
1267			"Mic Jack", "MICBIAS1",
1268			"IN2P", "Mic Jack";
1269
1270		nvidia,i2s-controller = <&tegra_i2s1>;
1271		nvidia,audio-codec = <&rt5640>;
1272
1273		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
1274
1275		clocks = <&tegra_car TEGRA114_CLK_PLL_A>,
1276			 <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1277			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1278		clock-names = "pll_a", "pll_a_out0", "mclk";
1279
1280		assigned-clocks = <&tegra_car TEGRA114_CLK_EXTERN1>,
1281				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1282
1283		assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1284					 <&tegra_car TEGRA114_CLK_EXTERN1>;
1285	};
1286};
1287