1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/gpio-keys.h>
5#include <dt-bindings/input/input.h>
6#include <dt-bindings/thermal/thermal.h>
7
8#include "tegra30.dtsi"
9#include "tegra30-cpu-opp.dtsi"
10#include "tegra30-cpu-opp-microvolt.dtsi"
11
12/ {
13	model = "Ouya Game Console";
14	compatible = "ouya,ouya", "nvidia,tegra30";
15
16	aliases {
17		mmc0 = &sdmmc4; /* eMMC */
18		mmc1 = &sdmmc3; /* WiFi */
19		rtc0 = &pmic;
20		rtc1 = "/rtc@7000e000";
21		serial0 = &uartd; /* Debug Port */
22		serial1 = &uartc; /* Bluetooth */
23	};
24
25	chosen {
26		stdout-path = "serial0:115200n8";
27	};
28
29	memory@80000000 {
30		reg = <0x80000000 0x40000000>;
31	};
32
33	reserved-memory {
34		#address-cells = <1>;
35		#size-cells = <1>;
36		ranges;
37
38		linux,cma@80000000 {
39			compatible = "shared-dma-pool";
40			alloc-ranges = <0x80000000 0x30000000>;
41			size = <0x10000000>; /* 256MiB */
42			linux,cma-default;
43			reusable;
44		};
45
46		ramoops@bfdf0000 {
47			compatible = "ramoops";
48			reg = <0xbfdf0000 0x10000>;	/* 64kB */
49			console-size = <0x8000>;	/* 32kB */
50			record-size = <0x400>;		/*  1kB */
51			ecc-size = <16>;
52		};
53
54		trustzone@bfe00000 {
55			reg = <0xbfe00000 0x200000>;
56			no-map;
57		};
58	};
59
60	host1x@50000000 {
61		hdmi@54280000 {
62			status = "okay";
63			vdd-supply = <&vdd_vid_reg>;
64			pll-supply = <&ldo7_reg>;
65			hdmi-supply = <&sys_3v3_reg>;
66			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
67			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
68		};
69	};
70
71	gpio: gpio@6000d000 {
72		gpio-ranges = <&pinmux 0 0 248>;
73		#reset-cells = <1>;
74	};
75
76	pinmux@70000868 {
77		pinctrl-names = "default";
78		pinctrl-0 = <&state_default>;
79		state_default: pinmux {
80			/* located at $state_default below */
81		};
82	};
83
84	uartc: serial@70006200 {
85		status = "okay";
86		compatible = "nvidia,tegra30-hsuart";
87
88		nvidia,adjust-baud-rates = <0 9600 100>,
89					   <9600 115200 200>,
90					   <1000000 4000000 136>;
91
92		/* Azurewave AW-NH660 BCM4330B1 */
93		bluetooth {
94			compatible = "brcm,bcm4330-bt";
95
96			max-speed = <4000000>;
97
98			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
99			clock-names = "txco";
100
101			vbat-supply  = <&sys_3v3_reg>;
102			vddio-supply = <&vdd_1v8>;
103
104			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
105			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
106			host-wakeup-gpios = <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_HIGH>;
107		};
108	};
109
110	uartd: serial@70006300 {
111		status = "okay";
112	};
113
114	hdmi_ddc: i2c@7000c700 {
115		status = "okay";
116		clock-frequency = <100000>;
117	};
118
119	i2c@7000d000 {
120		status = "okay";
121		clock-frequency = <400000>;
122
123		cpu_temp: nct1008@4c {
124			compatible = "onnn,nct1008";
125			reg = <0x4c>;
126			vcc-supply = <&sys_3v3_reg>;
127			#thermal-sensor-cells = <1>;
128/*
129 *			The interrupt is bugged, once triggered it never clears.
130 *			interrupt-parent = <&gpio>;
131 *			interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
132 */
133		};
134
135		pmic: pmic@2d {
136			compatible = "ti,tps65911";
137			reg = <0x2d>;
138
139			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
140			#interrupt-cells = <2>;
141			interrupt-controller;
142			wakeup-source;
143
144			ti,en-gpio-sleep = <0 1 1 1 1 1 0 0 1>;
145			ti,system-power-controller;
146			ti,sleep-keep-ck32k;
147			ti,sleep-enable;
148
149			#gpio-cells = <2>;
150			gpio-controller;
151
152			vcc1-supply = <&vdd_5v0_reg>;
153			vcc2-supply = <&vdd_5v0_reg>;
154			vcc3-supply = <&vdd_1v8>;
155			vcc4-supply = <&vdd_5v0_reg>;
156			vcc5-supply = <&vdd_5v0_reg>;
157			vcc6-supply = <&vdd2_reg>;
158			vcc7-supply = <&vdd_5v0_reg>;
159			vccio-supply = <&vdd_5v0_reg>;
160
161			regulators {
162				vdd1_reg: vdd1 {
163					regulator-name = "vddio_ddr_1v2";
164					regulator-min-microvolt = <1200000>;
165					regulator-max-microvolt = <1200000>;
166					regulator-always-on;
167				};
168
169				vdd2_reg: vdd2 {
170					regulator-name = "vdd_1v5_gen";
171					regulator-min-microvolt = <1500000>;
172					regulator-max-microvolt = <1500000>;
173					regulator-always-on;
174				};
175
176				vdd_cpu: vddctrl {
177					regulator-name = "vdd_cpu,vdd_sys";
178					regulator-min-microvolt = <800000>;
179					regulator-max-microvolt = <1270000>;
180					regulator-coupled-with = <&vdd_core>;
181					regulator-coupled-max-spread = <300000>;
182					regulator-max-step-microvolt = <100000>;
183					regulator-always-on;
184
185					nvidia,tegra-cpu-regulator;
186				};
187
188				vdd_1v8: vio {
189					regulator-name = "vdd_1v8_gen";
190					regulator-min-microvolt = <1800000>;
191					regulator-max-microvolt = <1800000>;
192					regulator-always-on;
193				};
194
195				ldo1_reg: ldo1 {
196					regulator-name = "vdd_pexa,vdd_pexb";
197					regulator-min-microvolt = <1050000>;
198					regulator-max-microvolt = <1050000>;
199					regulator-always-on;
200				};
201
202				ldo2_reg: ldo2 {
203					regulator-name = "vdd_sata,avdd_plle";
204					regulator-min-microvolt = <1050000>;
205					regulator-max-microvolt = <1050000>;
206					regulator-always-on;
207				};
208
209				/* LDO3 is not connected to anything */
210
211				ldo4_reg: ldo4 {
212					regulator-name = "vdd_rtc";
213					regulator-min-microvolt = <1200000>;
214					regulator-max-microvolt = <1200000>;
215					regulator-always-on;
216				};
217
218				ldo5_reg: ldo5 {
219					regulator-name = "vddio_sdmmc,avdd_vdac";
220					regulator-min-microvolt = <1800000>;
221					regulator-max-microvolt = <3300000>;
222					regulator-always-on;
223				};
224
225				ldo6_reg: ldo6 {
226					regulator-name = "avdd_dsi_csi,pwrdet_mipi";
227					regulator-min-microvolt = <1200000>;
228					regulator-max-microvolt = <1200000>;
229					regulator-always-on;
230				};
231
232				ldo7_reg: ldo7 {
233					regulator-name = "vdd_pllm,x,u,a_p_c_s";
234					regulator-min-microvolt = <1200000>;
235					regulator-max-microvolt = <1200000>;
236					regulator-always-on;
237				};
238
239				ldo8_reg: ldo8 {
240					regulator-name = "vdd_ddr_hs";
241					regulator-min-microvolt = <1000000>;
242					regulator-max-microvolt = <1000000>;
243					regulator-always-on;
244				};
245			};
246		};
247
248		vdd_core: tps62361@60 {
249			compatible = "ti,tps62361";
250			reg = <0x60>;
251
252			regulator-name = "vdd_core";
253			regulator-min-microvolt = <950000>;
254			regulator-max-microvolt = <1350000>;
255			regulator-coupled-with = <&vdd_cpu>;
256			regulator-coupled-max-spread = <300000>;
257			regulator-max-step-microvolt = <100000>;
258			regulator-boot-on;
259			regulator-always-on;
260			ti,vsel0-state-high;
261			ti,vsel1-state-high;
262			ti,enable-vout-discharge;
263
264			nvidia,tegra-core-regulator;
265		};
266	};
267
268	pmc@7000e400 {
269		status = "okay";
270		nvidia,invert-interrupt;
271		nvidia,suspend-mode = <1>;
272		nvidia,cpu-pwr-good-time = <2000>;
273		nvidia,cpu-pwr-off-time = <200>;
274		nvidia,core-pwr-good-time = <3845 3845>;
275		nvidia,core-pwr-off-time = <458>;
276		nvidia,core-power-req-active-high;
277		nvidia,sys-clock-req-active-high;
278	};
279
280	mc_timings: memory-controller@7000f000 {
281		/* timings located at &mc_timings below */
282	};
283
284	emc_timings: memory-controller@7000f400 {
285		/* timings located at &emc_timings below */
286	};
287
288	hda@70030000 {
289		status = "okay";
290	};
291
292	wifi_pwrseq: wifi_pwrseq {
293		compatible = "mmc-pwrseq-simple";
294
295		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
296		clock-names = "ext_clock";
297
298		reset-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_LOW>;
299		post-power-on-delay-ms = <300>;
300		power-off-delay-us = <300>;
301	};
302
303	sdmmc3: mmc@78000400 {
304		status = "okay";
305
306		#address-cells = <1>;
307		#size-cells = <0>;
308
309		assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
310		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>;
311		assigned-clock-rates = <50000000>;
312
313		max-frequency = <50000000>;
314		keep-power-in-suspend;
315
316		bus-width = <4>;
317		non-removable;
318
319		mmc-pwrseq = <&wifi_pwrseq>;
320		vmmc-supply = <&sdmmc_3v3_reg>;
321		vqmmc-supply = <&vdd_1v8>;
322
323		/* Azurewave AW-NH660 BCM4330 */
324		brcmf: wifi@1 {
325			reg = <1>;
326			compatible = "brcm,bcm4329-fmac";
327			interrupt-parent = <&gpio>;
328			interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>;
329			interrupt-names = "host-wake";
330		};
331	};
332
333	sdmmc4: mmc@78000600 {
334		status = "okay";
335
336		keep-power-in-suspend;
337		bus-width = <8>;
338		non-removable;
339		vmmc-supply = <&sys_3v3_reg>;
340		vqmmc-supply = <&vdd_1v8>;
341		nvidia,default-tap = <0x0F>;
342		max-frequency = <25500000>;
343	};
344
345	usb@7d000000 {
346		compatible = "nvidia,tegra30-udc";
347		status = "okay";
348	};
349
350	usb-phy@7d000000 {
351		status = "okay";
352		dr_mode = "peripheral";
353	};
354
355	usb@7d004000 {
356		status = "okay";
357		#address-cells = <1>;
358		#size-cells = <0>;
359
360		smsc@2 { /* SMSC 10/100T Ethernet Controller */
361			compatible = "usb424,9e00";
362			reg = <2>;
363			local-mac-address = [00 11 22 33 44 55];
364		};
365	};
366
367	usb-phy@7d004000 {
368		vbus-supply = <&vdd_smsc>;
369		status = "okay";
370	};
371
372	usb@7d008000 {
373		status = "okay";
374	};
375
376	usb-phy@7d008000 {
377		vbus-supply = <&usb3_vbus_reg>;
378		status = "okay";
379	};
380
381	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
382	clk32k_in: clock {
383		compatible = "fixed-clock";
384		#clock-cells = <0>;
385		clock-frequency = <32768>;
386		clock-output-names = "pmic-oscillator";
387	};
388
389	cpus {
390		cpu0: cpu@0 {
391			operating-points-v2 = <&cpu0_opp_table>;
392			cpu-supply = <&vdd_cpu>;
393			#cooling-cells = <2>;
394		};
395
396		cpu1: cpu@1 {
397			operating-points-v2 = <&cpu0_opp_table>;
398			cpu-supply = <&vdd_cpu>;
399			#cooling-cells = <2>;
400		};
401
402		cpu2: cpu@2 {
403			operating-points-v2 = <&cpu0_opp_table>;
404			cpu-supply = <&vdd_cpu>;
405			#cooling-cells = <2>;
406		};
407
408		cpu3: cpu@3 {
409			operating-points-v2 = <&cpu0_opp_table>;
410			cpu-supply = <&vdd_cpu>;
411			#cooling-cells = <2>;
412		};
413	};
414
415	firmware {
416		trusted-foundations {
417			compatible = "tlm,trusted-foundations";
418			tlm,version-major = <0x0>;
419			tlm,version-minor = <0x0>;
420		};
421	};
422
423	fan: gpio_fan {
424		compatible = "gpio-fan";
425		gpios = <&gpio TEGRA_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
426		gpio-fan,speed-map = <0    0
427				      4500 1>;
428		#cooling-cells = <2>;
429	};
430
431	thermal-zones {
432		cpu_thermal: cpu-thermal {
433			polling-delay = <5000>;
434			polling-delay-passive = <5000>;
435
436			thermal-sensors = <&cpu_temp 1>;
437
438			trips {
439				cpu_alert0: cpu-alert0 {
440					temperature = <50000>;
441					hysteresis = <10000>;
442					type = "active";
443				};
444				cpu_alert1: cpu-alert1 {
445					temperature = <70000>;
446					hysteresis = <5000>;
447					type = "passive";
448				};
449				cpu_crit: cpu-crit {
450					temperature = <90000>;
451					hysteresis = <2000>;
452					type = "critical";
453				};
454			};
455
456			cooling-maps {
457				map0 {
458					trip = <&cpu_alert0>;
459					cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
460				};
461				map1 {
462					trip = <&cpu_alert1>;
463					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
464							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
465							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
466							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
467				};
468			};
469		};
470	};
471
472	vdd_12v_in: vdd_12v_in {
473		compatible = "regulator-fixed";
474		regulator-name = "vdd_12v_in";
475		regulator-min-microvolt = <12000000>;
476		regulator-max-microvolt = <12000000>;
477		regulator-always-on;
478	};
479
480	sdmmc_3v3_reg: sdmmc_3v3_reg {
481		compatible = "regulator-fixed";
482		regulator-name = "sdmmc_3v3";
483		regulator-min-microvolt = <3300000>;
484		regulator-max-microvolt = <3300000>;
485		enable-active-high;
486		regulator-always-on;
487		gpio = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
488		vin-supply = <&sys_3v3_reg>;
489	};
490
491	vdd_fuse_3v3_reg: vdd_fuse_3v3_reg {
492		compatible = "regulator-fixed";
493		regulator-name = "vdd_fuse_3v3";
494		regulator-min-microvolt = <3300000>;
495		regulator-max-microvolt = <3300000>;
496		enable-active-high;
497		gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
498		vin-supply = <&sys_3v3_reg>;
499		regulator-always-on;
500	};
501
502	vdd_vid_reg: vdd_vid_reg {
503		compatible = "regulator-fixed";
504		regulator-name = "vddio_vid";
505		regulator-min-microvolt = <5000000>;
506		regulator-max-microvolt = <5000000>;
507		enable-active-high;
508		gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
509		vin-supply = <&vdd_5v0_reg>;
510		regulator-boot-on;
511	};
512
513	ddr_reg: ddr_reg {
514		compatible = "regulator-fixed";
515		regulator-name = "vdd_ddr";
516		regulator-min-microvolt = <1500000>;
517		regulator-max-microvolt = <1500000>;
518		regulator-always-on;
519		enable-active-high;
520		gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
521		regulator-boot-on;
522		vin-supply = <&vdd_12v_in>;
523	};
524
525	sys_3v3_reg: sys_3v3_reg {
526		compatible = "regulator-fixed";
527		regulator-name = "sys_3v3";
528		regulator-min-microvolt = <3300000>;
529		regulator-max-microvolt = <3300000>;
530		enable-active-high;
531		gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
532		regulator-always-on;
533		regulator-boot-on;
534		vin-supply = <&vdd_12v_in>;
535	};
536
537	vdd_5v0_reg: vdd_5v0_reg {
538		compatible = "regulator-fixed";
539		regulator-name = "vdd_5v0";
540		regulator-min-microvolt = <5000000>;
541		regulator-max-microvolt = <5000000>;
542		enable-active-high;
543		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
544		regulator-always-on;
545		regulator-boot-on;
546		vin-supply = <&vdd_12v_in>;
547	};
548
549	vdd_smsc: vdd_smsc {
550		compatible = "regulator-fixed";
551		regulator-name = "vdd_smsc";
552		enable-active-high;
553		gpio = <&gpio TEGRA_GPIO(DD, 5) GPIO_ACTIVE_HIGH>;
554	};
555
556	usb3_vbus_reg: usb3_vbus_reg {
557		compatible = "regulator-fixed";
558		regulator-name = "usb3_vbus";
559		regulator-min-microvolt = <5000000>;
560		regulator-max-microvolt = <5000000>;
561		enable-active-high;
562		gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
563		vin-supply = <&vdd_5v0_reg>;
564	};
565
566	gpio-keys {
567		compatible = "gpio-keys";
568
569		power {
570			gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
571			debounce-interval = <10>;
572			linux,code = <KEY_POWER>;
573			wakeup-event-action = <EV_ACT_ASSERTED>;
574			wakeup-source;
575		};
576	};
577
578
579	leds {
580		compatible = "gpio-leds";
581
582		led-power {
583			label = "power-led";
584			gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
585			default-state = "on";
586			linux,default-trigger = "heartbeat";
587			retain-state-suspended;
588		};
589	};
590};
591&mc_timings {
592	emc-timings-0 {
593		nvidia,ram-code = <0>; /* Samsung RAM */
594		timing-25500000 {
595			clock-frequency = <25500000>;
596			nvidia,emem-configuration = <
597				0x00030003 /* MC_EMEM_ARB_CFG */
598				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
599				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
600				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
601				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
602				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
603				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
604				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
605				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
606				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
607				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
608				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
609				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
610				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
611				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
612				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
613				0x75830303 /* MC_EMEM_ARB_MISC0 */
614				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
615			>;
616		};
617		timing-51000000 {
618			clock-frequency = <51000000>;
619			nvidia,emem-configuration = <
620				0x00010003 /* MC_EMEM_ARB_CFG */
621				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
622				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
623				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
624				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
625				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
626				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
627				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
628				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
629				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
630				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
631				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
632				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
633				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
634				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
635				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
636				0x74630303 /* MC_EMEM_ARB_MISC0 */
637				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
638			>;
639		};
640		timing-102000000 {
641			clock-frequency = <102000000>;
642			nvidia,emem-configuration = <
643				0x00000003 /* MC_EMEM_ARB_CFG */
644				0xc0000018 /* MC_EMEM_ARB_OUTSTANDING_REQ */
645				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
646				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
647				0x00000003 /* MC_EMEM_ARB_TIMING_RC */
648				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
649				0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
650				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
651				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
652				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
653				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
654				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
655				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
656				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
657				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
658				0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
659				0x73c30504 /* MC_EMEM_ARB_MISC0 */
660				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
661			>;
662		};
663		timing-204000000 {
664			clock-frequency = <204000000>;
665			nvidia,emem-configuration = <
666				0x00000006 /* MC_EMEM_ARB_CFG */
667				0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
668				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
669				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
670				0x00000005 /* MC_EMEM_ARB_TIMING_RC */
671				0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
672				0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
673				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
674				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
675				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
676				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
677				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
678				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
679				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
680				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
681				0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
682				0x73840a06 /* MC_EMEM_ARB_MISC0 */
683				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
684			>;
685		};
686		timing-400000000 {
687			clock-frequency = <400000000>;
688			nvidia,emem-configuration = <
689				0x0000000c /* MC_EMEM_ARB_CFG */
690				0xc0000048 /* MC_EMEM_ARB_OUTSTANDING_REQ */
691				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
692				0x00000002 /* MC_EMEM_ARB_TIMING_RP */
693				0x00000009 /* MC_EMEM_ARB_TIMING_RC */
694				0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
695				0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
696				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
697				0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
698				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
699				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
700				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
701				0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
702				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
703				0x06030202 /* MC_EMEM_ARB_DA_TURNS */
704				0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
705				0x7086120a /* MC_EMEM_ARB_MISC0 */
706				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
707			>;
708		};
709		timing-800000000 {
710			clock-frequency = <800000000>;
711			nvidia,emem-configuration = <
712				0x00000018 /* MC_EMEM_ARB_CFG */
713				0xc0000090 /* MC_EMEM_ARB_OUTSTANDING_REQ */
714				0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
715				0x00000005 /* MC_EMEM_ARB_TIMING_RP */
716				0x00000013 /* MC_EMEM_ARB_TIMING_RC */
717				0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
718				0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
719				0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
720				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
721				0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
722				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
723				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
724				0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
725				0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
726				0x08040202 /* MC_EMEM_ARB_DA_TURNS */
727				0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
728				0x712c2414 /* MC_EMEM_ARB_MISC0 */
729				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
730			>;
731		};
732	};
733	emc-timings-1 {
734		nvidia,ram-code = <1>; /* Hynix M RAM */
735		timing-25500000 {
736			clock-frequency = <25500000>;
737			nvidia,emem-configuration = <
738				0x00030003 /* MC_EMEM_ARB_CFG */
739				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
740				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
741				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
742				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
743				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
744				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
745				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
746				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
747				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
748				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
749				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
750				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
751				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
752				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
753				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
754				0x75830303 /* MC_EMEM_ARB_MISC0 */
755				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
756			>;
757		};
758		timing-51000000 {
759			clock-frequency = <51000000>;
760			nvidia,emem-configuration = <
761				0x00010003 /* MC_EMEM_ARB_CFG */
762				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
763				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
764				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
765				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
766				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
767				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
768				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
769				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
770				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
771				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
772				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
773				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
774				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
775				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
776				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
777				0x74630303 /* MC_EMEM_ARB_MISC0 */
778				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
779			>;
780		};
781		timing-102000000 {
782			clock-frequency = <102000000>;
783			nvidia,emem-configuration = <
784				0x00000003 /* MC_EMEM_ARB_CFG */
785				0xc0000018 /* MC_EMEM_ARB_OUTSTANDING_REQ */
786				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
787				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
788				0x00000003 /* MC_EMEM_ARB_TIMING_RC */
789				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
790				0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
791				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
792				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
793				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
794				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
795				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
796				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
797				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
798				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
799				0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
800				0x73c30504 /* MC_EMEM_ARB_MISC0 */
801				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
802			>;
803		};
804		timing-204000000 {
805			clock-frequency = <204000000>;
806			nvidia,emem-configuration = <
807				0x00000006 /* MC_EMEM_ARB_CFG */
808				0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
809				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
810				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
811				0x00000005 /* MC_EMEM_ARB_TIMING_RC */
812				0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
813				0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
814				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
815				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
816				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
817				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
818				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
819				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
820				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
821				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
822				0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
823				0x73840a06 /* MC_EMEM_ARB_MISC0 */
824				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
825			>;
826		};
827		timing-400000000 {
828			clock-frequency = <400000000>;
829			nvidia,emem-configuration = <
830				0x0000000c /* MC_EMEM_ARB_CFG */
831				0xc0000048 /* MC_EMEM_ARB_OUTSTANDING_REQ */
832				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
833				0x00000002 /* MC_EMEM_ARB_TIMING_RP */
834				0x00000009 /* MC_EMEM_ARB_TIMING_RC */
835				0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
836				0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
837				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
838				0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
839				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
840				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
841				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
842				0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
843				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
844				0x06030202 /* MC_EMEM_ARB_DA_TURNS */
845				0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
846				0x7086120a /* MC_EMEM_ARB_MISC0 */
847				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
848			>;
849		};
850		timing-800000000 {
851			clock-frequency = <800000000>;
852			nvidia,emem-configuration = <
853				0x00000018 /* MC_EMEM_ARB_CFG */
854				0xc0000090 /* MC_EMEM_ARB_OUTSTANDING_REQ */
855				0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
856				0x00000005 /* MC_EMEM_ARB_TIMING_RP */
857				0x00000013 /* MC_EMEM_ARB_TIMING_RC */
858				0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
859				0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
860				0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
861				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
862				0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
863				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
864				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
865				0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
866				0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
867				0x08040202 /* MC_EMEM_ARB_DA_TURNS */
868				0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
869				0x712c2414 /* MC_EMEM_ARB_MISC0 */
870				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
871			>;
872		};
873	};
874	emc-timings-2 {
875		nvidia,ram-code = <2>; /* Hynix A RAM */
876		timing-25500000 {
877			clock-frequency = <25500000>;
878			nvidia,emem-configuration = <
879				0x00030003 /* MC_EMEM_ARB_CFG */
880				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
881				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
882				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
883				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
884				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
885				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
886				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
887				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
888				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
889				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
890				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
891				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
892				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
893				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
894				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
895				0x75e30303 /* MC_EMEM_ARB_MISC0 */
896				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
897			>;
898		};
899		timing-51000000 {
900			clock-frequency = <51000000>;
901			nvidia,emem-configuration = <
902				0x00010003 /* MC_EMEM_ARB_CFG */
903				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
904				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
905				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
906				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
907				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
908				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
909				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
910				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
911				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
912				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
913				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
914				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
915				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
916				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
917				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
918				0x74e30303 /* MC_EMEM_ARB_MISC0 */
919				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
920			>;
921		};
922		timing-102000000 {
923			clock-frequency = <102000000>;
924			nvidia,emem-configuration = <
925				0x00000003 /* MC_EMEM_ARB_CFG */
926				0xc0000018 /* MC_EMEM_ARB_OUTSTANDING_REQ */
927				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
928				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
929				0x00000003 /* MC_EMEM_ARB_TIMING_RC */
930				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
931				0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
932				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
933				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
934				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
935				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
936				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
937				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
938				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
939				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
940				0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
941				0x74430504 /* MC_EMEM_ARB_MISC0 */
942				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
943			>;
944		};
945		timing-204000000 {
946			clock-frequency = <204000000>;
947			nvidia,emem-configuration = <
948				0x00000006 /* MC_EMEM_ARB_CFG */
949				0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
950				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
951				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
952				0x00000005 /* MC_EMEM_ARB_TIMING_RC */
953				0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
954				0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
955				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
956				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
957				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
958				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
959				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
960				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
961				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
962				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
963				0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
964				0x74040a06 /* MC_EMEM_ARB_MISC0 */
965				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
966			>;
967		};
968		timing-400000000 {
969			clock-frequency = <400000000>;
970			nvidia,emem-configuration = <
971				0x0000000c /* MC_EMEM_ARB_CFG */
972				0xc0000048 /* MC_EMEM_ARB_OUTSTANDING_REQ */
973				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
974				0x00000002 /* MC_EMEM_ARB_TIMING_RP */
975				0x00000009 /* MC_EMEM_ARB_TIMING_RC */
976				0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
977				0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
978				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
979				0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
980				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
981				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
982				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
983				0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
984				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
985				0x06030202 /* MC_EMEM_ARB_DA_TURNS */
986				0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
987				0x7086120a /* MC_EMEM_ARB_MISC0 */
988				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
989			>;
990		};
991		timing-800000000 {
992			clock-frequency = <800000000>;
993			nvidia,emem-configuration = <
994				0x00000018 /* MC_EMEM_ARB_CFG */
995				0xc0000090 /* MC_EMEM_ARB_OUTSTANDING_REQ */
996				0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
997				0x00000005 /* MC_EMEM_ARB_TIMING_RP */
998				0x00000013 /* MC_EMEM_ARB_TIMING_RC */
999				0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
1000				0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
1001				0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
1002				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
1003				0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
1004				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
1005				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
1006				0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
1007				0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
1008				0x08040202 /* MC_EMEM_ARB_DA_TURNS */
1009				0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
1010				0x712c2414 /* MC_EMEM_ARB_MISC0 */
1011				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
1012			>;
1013		};
1014	};
1015};
1016&emc_timings {
1017	emc-timings-0 {
1018		nvidia,ram-code = <0>;  /* Samsung RAM */
1019		timing-25500000 {
1020			clock-frequency = <25500000>;
1021			nvidia,emc-auto-cal-interval = <0x001fffff>;
1022			nvidia,emc-mode-1 = <0x80100003>;
1023			nvidia,emc-mode-2 = <0x80200008>;
1024			nvidia,emc-mode-reset = <0x80001221>;
1025			nvidia,emc-zcal-cnt-long = <0x00000040>;
1026			nvidia,emc-cfg-periodic-qrst;
1027			nvidia,emc-cfg-dyn-self-ref;
1028			nvidia,emc-configuration = <
1029				0x00000001 /* EMC_RC */
1030				0x00000006 /* EMC_RFC */
1031				0x00000000 /* EMC_RAS */
1032				0x00000000 /* EMC_RP */
1033				0x00000002 /* EMC_R2W */
1034				0x0000000a /* EMC_W2R */
1035				0x00000005 /* EMC_R2P */
1036				0x0000000b /* EMC_W2P */
1037				0x00000000 /* EMC_RD_RCD */
1038				0x00000000 /* EMC_WR_RCD */
1039				0x00000003 /* EMC_RRD */
1040				0x00000001 /* EMC_REXT */
1041				0x00000000 /* EMC_WEXT */
1042				0x00000005 /* EMC_WDV */
1043				0x00000005 /* EMC_QUSE */
1044				0x00000004 /* EMC_QRST */
1045				0x0000000a /* EMC_QSAFE */
1046				0x0000000b /* EMC_RDV */
1047				0x000000c0 /* EMC_REFRESH */
1048				0x00000000 /* EMC_BURST_REFRESH_NUM */
1049				0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
1050				0x00000002 /* EMC_PDEX2WR */
1051				0x00000002 /* EMC_PDEX2RD */
1052				0x00000001 /* EMC_PCHG2PDEN */
1053				0x00000000 /* EMC_ACT2PDEN */
1054				0x00000007 /* EMC_AR2PDEN */
1055				0x0000000f /* EMC_RW2PDEN */
1056				0x00000007 /* EMC_TXSR */
1057				0x00000007 /* EMC_TXSRDLL */
1058				0x00000004 /* EMC_TCKE */
1059				0x00000002 /* EMC_TFAW */
1060				0x00000000 /* EMC_TRPAB */
1061				0x00000004 /* EMC_TCLKSTABLE */
1062				0x00000005 /* EMC_TCLKSTOP */
1063				0x000000c7 /* EMC_TREFBW */
1064				0x00000006 /* EMC_QUSE_EXTRA */
1065				0x00000004 /* EMC_FBIO_CFG6 */
1066				0x00000000 /* EMC_ODT_WRITE */
1067				0x00000000 /* EMC_ODT_READ */
1068				0x00004288 /* EMC_FBIO_CFG5 */
1069				0x007800a4 /* EMC_CFG_DIG_DLL */
1070				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1071				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1072				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1073				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1074				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1075				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1076				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1077				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1078				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1079				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1080				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1081				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1082				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1083				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1084				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1085				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1086				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1087				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1088				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1089				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1090				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1091				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1092				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1093				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1094				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1095				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1096				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1097				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1098				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1099				0x000002a0 /* EMC_XM2CMDPADCTRL */
1100				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1101				0x00000000 /* EMC_XM2DQPADCTRL2 */
1102				0x77fff884 /* EMC_XM2CLKPADCTRL */
1103				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1104				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1105				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1106				0x08000168 /* EMC_XM2QUSEPADCTRL */
1107				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1108				0x00000802 /* EMC_CTT_TERM_CTRL */
1109				0x00000000 /* EMC_ZCAL_INTERVAL */
1110				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1111				0x000c000c /* EMC_MRS_WAIT_CNT */
1112				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1113				0x00000000 /* EMC_CTT */
1114				0x00000000 /* EMC_CTT_DURATION */
1115				0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
1116				0xe8000000 /* EMC_FBIO_SPARE */
1117				0xff00ff00 /* EMC_CFG_RSV */
1118			>;
1119		};
1120		timing-51000000 {
1121			clock-frequency = <51000000>;
1122			nvidia,emc-auto-cal-interval = <0x001fffff>;
1123			nvidia,emc-mode-1 = <0x80100003>;
1124			nvidia,emc-mode-2 = <0x80200008>;
1125			nvidia,emc-mode-reset = <0x80001221>;
1126			nvidia,emc-zcal-cnt-long = <0x00000040>;
1127			nvidia,emc-cfg-periodic-qrst;
1128			nvidia,emc-cfg-dyn-self-ref;
1129			nvidia,emc-configuration = <
1130				0x00000002 /* EMC_RC */
1131				0x0000000d /* EMC_RFC */
1132				0x00000001 /* EMC_RAS */
1133				0x00000000 /* EMC_RP */
1134				0x00000002 /* EMC_R2W */
1135				0x0000000a /* EMC_W2R */
1136				0x00000005 /* EMC_R2P */
1137				0x0000000b /* EMC_W2P */
1138				0x00000000 /* EMC_RD_RCD */
1139				0x00000000 /* EMC_WR_RCD */
1140				0x00000003 /* EMC_RRD */
1141				0x00000001 /* EMC_REXT */
1142				0x00000000 /* EMC_WEXT */
1143				0x00000005 /* EMC_WDV */
1144				0x00000005 /* EMC_QUSE */
1145				0x00000004 /* EMC_QRST */
1146				0x0000000a /* EMC_QSAFE */
1147				0x0000000b /* EMC_RDV */
1148				0x00000181 /* EMC_REFRESH */
1149				0x00000000 /* EMC_BURST_REFRESH_NUM */
1150				0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
1151				0x00000002 /* EMC_PDEX2WR */
1152				0x00000002 /* EMC_PDEX2RD */
1153				0x00000001 /* EMC_PCHG2PDEN */
1154				0x00000000 /* EMC_ACT2PDEN */
1155				0x00000007 /* EMC_AR2PDEN */
1156				0x0000000f /* EMC_RW2PDEN */
1157				0x0000000e /* EMC_TXSR */
1158				0x0000000e /* EMC_TXSRDLL */
1159				0x00000004 /* EMC_TCKE */
1160				0x00000003 /* EMC_TFAW */
1161				0x00000000 /* EMC_TRPAB */
1162				0x00000004 /* EMC_TCLKSTABLE */
1163				0x00000005 /* EMC_TCLKSTOP */
1164				0x0000018e /* EMC_TREFBW */
1165				0x00000006 /* EMC_QUSE_EXTRA */
1166				0x00000004 /* EMC_FBIO_CFG6 */
1167				0x00000000 /* EMC_ODT_WRITE */
1168				0x00000000 /* EMC_ODT_READ */
1169				0x00004288 /* EMC_FBIO_CFG5 */
1170				0x007800a4 /* EMC_CFG_DIG_DLL */
1171				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1172				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1173				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1174				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1175				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1176				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1177				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1178				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1179				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1180				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1181				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1182				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1183				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1184				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1185				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1186				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1187				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1188				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1189				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1190				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1191				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1192				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1193				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1194				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1195				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1196				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1197				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1198				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1199				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1200				0x000002a0 /* EMC_XM2CMDPADCTRL */
1201				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1202				0x00000000 /* EMC_XM2DQPADCTRL2 */
1203				0x77fff884 /* EMC_XM2CLKPADCTRL */
1204				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1205				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1206				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1207				0x08000168 /* EMC_XM2QUSEPADCTRL */
1208				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1209				0x00000802 /* EMC_CTT_TERM_CTRL */
1210				0x00000000 /* EMC_ZCAL_INTERVAL */
1211				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1212				0x000c000c /* EMC_MRS_WAIT_CNT */
1213				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1214				0x00000000 /* EMC_CTT */
1215				0x00000000 /* EMC_CTT_DURATION */
1216				0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
1217				0xe8000000 /* EMC_FBIO_SPARE */
1218				0xff00ff00 /* EMC_CFG_RSV */
1219			>;
1220		};
1221		timing-102000000 {
1222			clock-frequency = <102000000>;
1223			nvidia,emc-auto-cal-interval = <0x001fffff>;
1224			nvidia,emc-mode-1 = <0x80100003>;
1225			nvidia,emc-mode-2 = <0x80200008>;
1226			nvidia,emc-mode-reset = <0x80001221>;
1227			nvidia,emc-zcal-cnt-long = <0x00000040>;
1228			nvidia,emc-cfg-periodic-qrst;
1229			nvidia,emc-cfg-dyn-self-ref;
1230			nvidia,emc-configuration = <
1231				0x00000004 /* EMC_RC */
1232				0x0000001a /* EMC_RFC */
1233				0x00000003 /* EMC_RAS */
1234				0x00000001 /* EMC_RP */
1235				0x00000002 /* EMC_R2W */
1236				0x0000000a /* EMC_W2R */
1237				0x00000005 /* EMC_R2P */
1238				0x0000000b /* EMC_W2P */
1239				0x00000001 /* EMC_RD_RCD */
1240				0x00000001 /* EMC_WR_RCD */
1241				0x00000003 /* EMC_RRD */
1242				0x00000001 /* EMC_REXT */
1243				0x00000000 /* EMC_WEXT */
1244				0x00000005 /* EMC_WDV */
1245				0x00000005 /* EMC_QUSE */
1246				0x00000004 /* EMC_QRST */
1247				0x0000000a /* EMC_QSAFE */
1248				0x0000000b /* EMC_RDV */
1249				0x00000303 /* EMC_REFRESH */
1250				0x00000000 /* EMC_BURST_REFRESH_NUM */
1251				0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
1252				0x00000002 /* EMC_PDEX2WR */
1253				0x00000002 /* EMC_PDEX2RD */
1254				0x00000001 /* EMC_PCHG2PDEN */
1255				0x00000000 /* EMC_ACT2PDEN */
1256				0x00000007 /* EMC_AR2PDEN */
1257				0x0000000f /* EMC_RW2PDEN */
1258				0x0000001c /* EMC_TXSR */
1259				0x0000001c /* EMC_TXSRDLL */
1260				0x00000004 /* EMC_TCKE */
1261				0x00000005 /* EMC_TFAW */
1262				0x00000000 /* EMC_TRPAB */
1263				0x00000004 /* EMC_TCLKSTABLE */
1264				0x00000005 /* EMC_TCLKSTOP */
1265				0x0000031c /* EMC_TREFBW */
1266				0x00000006 /* EMC_QUSE_EXTRA */
1267				0x00000004 /* EMC_FBIO_CFG6 */
1268				0x00000000 /* EMC_ODT_WRITE */
1269				0x00000000 /* EMC_ODT_READ */
1270				0x00004288 /* EMC_FBIO_CFG5 */
1271				0x007800a4 /* EMC_CFG_DIG_DLL */
1272				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1273				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1274				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1275				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1276				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1277				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1278				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1279				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1280				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1281				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1282				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1283				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1284				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1285				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1286				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1287				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1288				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1289				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1290				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1291				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1292				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1293				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1294				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1295				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1296				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1297				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1298				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1299				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1300				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1301				0x000002a0 /* EMC_XM2CMDPADCTRL */
1302				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1303				0x00000000 /* EMC_XM2DQPADCTRL2 */
1304				0x77fff884 /* EMC_XM2CLKPADCTRL */
1305				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1306				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1307				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1308				0x08000168 /* EMC_XM2QUSEPADCTRL */
1309				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1310				0x00000802 /* EMC_CTT_TERM_CTRL */
1311				0x00000000 /* EMC_ZCAL_INTERVAL */
1312				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1313				0x000c000c /* EMC_MRS_WAIT_CNT */
1314				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1315				0x00000000 /* EMC_CTT */
1316				0x00000000 /* EMC_CTT_DURATION */
1317				0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
1318				0xe8000000 /* EMC_FBIO_SPARE */
1319				0xff00ff00 /* EMC_CFG_RSV */
1320			>;
1321		};
1322		timing-204000000 {
1323			clock-frequency = <204000000>;
1324			nvidia,emc-auto-cal-interval = <0x001fffff>;
1325			nvidia,emc-mode-1 = <0x80100003>;
1326			nvidia,emc-mode-2 = <0x80200008>;
1327			nvidia,emc-mode-reset = <0x80001221>;
1328			nvidia,emc-zcal-cnt-long = <0x00000040>;
1329			nvidia,emc-cfg-periodic-qrst;
1330			nvidia,emc-cfg-dyn-self-ref;
1331			nvidia,emc-configuration = <
1332				0x00000009 /* EMC_RC */
1333				0x00000035 /* EMC_RFC */
1334				0x00000007 /* EMC_RAS */
1335				0x00000002 /* EMC_RP */
1336				0x00000002 /* EMC_R2W */
1337				0x0000000a /* EMC_W2R */
1338				0x00000005 /* EMC_R2P */
1339				0x0000000b /* EMC_W2P */
1340				0x00000002 /* EMC_RD_RCD */
1341				0x00000002 /* EMC_WR_RCD */
1342				0x00000003 /* EMC_RRD */
1343				0x00000001 /* EMC_REXT */
1344				0x00000000 /* EMC_WEXT */
1345				0x00000005 /* EMC_WDV */
1346				0x00000005 /* EMC_QUSE */
1347				0x00000004 /* EMC_QRST */
1348				0x0000000a /* EMC_QSAFE */
1349				0x0000000b /* EMC_RDV */
1350				0x00000607 /* EMC_REFRESH */
1351				0x00000000 /* EMC_BURST_REFRESH_NUM */
1352				0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
1353				0x00000002 /* EMC_PDEX2WR */
1354				0x00000002 /* EMC_PDEX2RD */
1355				0x00000001 /* EMC_PCHG2PDEN */
1356				0x00000000 /* EMC_ACT2PDEN */
1357				0x00000007 /* EMC_AR2PDEN */
1358				0x0000000f /* EMC_RW2PDEN */
1359				0x00000038 /* EMC_TXSR */
1360				0x00000038 /* EMC_TXSRDLL */
1361				0x00000004 /* EMC_TCKE */
1362				0x00000009 /* EMC_TFAW */
1363				0x00000000 /* EMC_TRPAB */
1364				0x00000004 /* EMC_TCLKSTABLE */
1365				0x00000005 /* EMC_TCLKSTOP */
1366				0x00000638 /* EMC_TREFBW */
1367				0x00000006 /* EMC_QUSE_EXTRA */
1368				0x00000006 /* EMC_FBIO_CFG6 */
1369				0x00000000 /* EMC_ODT_WRITE */
1370				0x00000000 /* EMC_ODT_READ */
1371				0x00004288 /* EMC_FBIO_CFG5 */
1372				0x004400a4 /* EMC_CFG_DIG_DLL */
1373				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1374				0x00080000 /* EMC_DLL_XFORM_DQS0 */
1375				0x00080000 /* EMC_DLL_XFORM_DQS1 */
1376				0x00080000 /* EMC_DLL_XFORM_DQS2 */
1377				0x00080000 /* EMC_DLL_XFORM_DQS3 */
1378				0x00080000 /* EMC_DLL_XFORM_DQS4 */
1379				0x00080000 /* EMC_DLL_XFORM_DQS5 */
1380				0x00080000 /* EMC_DLL_XFORM_DQS6 */
1381				0x00080000 /* EMC_DLL_XFORM_DQS7 */
1382				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1383				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1384				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1385				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1386				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1387				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1388				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1389				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1390				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1391				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1392				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1393				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1394				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1395				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1396				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1397				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1398				0x00080000 /* EMC_DLL_XFORM_DQ0 */
1399				0x00080000 /* EMC_DLL_XFORM_DQ1 */
1400				0x00080000 /* EMC_DLL_XFORM_DQ2 */
1401				0x00080000 /* EMC_DLL_XFORM_DQ3 */
1402				0x000002a0 /* EMC_XM2CMDPADCTRL */
1403				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1404				0x00000000 /* EMC_XM2DQPADCTRL2 */
1405				0x77fff884 /* EMC_XM2CLKPADCTRL */
1406				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1407				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1408				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1409				0x08000168 /* EMC_XM2QUSEPADCTRL */
1410				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1411				0x00000802 /* EMC_CTT_TERM_CTRL */
1412				0x00020000 /* EMC_ZCAL_INTERVAL */
1413				0x00000100 /* EMC_ZCAL_WAIT_CNT */
1414				0x000c000c /* EMC_MRS_WAIT_CNT */
1415				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1416				0x00000000 /* EMC_CTT */
1417				0x00000000 /* EMC_CTT_DURATION */
1418				0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
1419				0xe8000000 /* EMC_FBIO_SPARE */
1420				0xff00ff00 /* EMC_CFG_RSV */
1421			>;
1422		};
1423		timing-400000000 {
1424			clock-frequency = <400000000>;
1425			nvidia,emc-auto-cal-interval = <0x001fffff>;
1426			nvidia,emc-mode-1 = <0x80100002>;
1427			nvidia,emc-mode-2 = <0x80200000>;
1428			nvidia,emc-mode-reset = <0x80000521>;
1429			nvidia,emc-zcal-cnt-long = <0x00000040>;
1430			nvidia,emc-configuration = <
1431				0x00000012 /* EMC_RC */
1432				0x00000066 /* EMC_RFC */
1433				0x0000000c /* EMC_RAS */
1434				0x00000004 /* EMC_RP */
1435				0x00000003 /* EMC_R2W */
1436				0x00000008 /* EMC_W2R */
1437				0x00000002 /* EMC_R2P */
1438				0x0000000a /* EMC_W2P */
1439				0x00000004 /* EMC_RD_RCD */
1440				0x00000004 /* EMC_WR_RCD */
1441				0x00000002 /* EMC_RRD */
1442				0x00000001 /* EMC_REXT */
1443				0x00000000 /* EMC_WEXT */
1444				0x00000004 /* EMC_WDV */
1445				0x00000006 /* EMC_QUSE */
1446				0x00000004 /* EMC_QRST */
1447				0x0000000a /* EMC_QSAFE */
1448				0x0000000c /* EMC_RDV */
1449				0x00000bf0 /* EMC_REFRESH */
1450				0x00000000 /* EMC_BURST_REFRESH_NUM */
1451				0x000002fc /* EMC_PRE_REFRESH_REQ_CNT */
1452				0x00000001 /* EMC_PDEX2WR */
1453				0x00000008 /* EMC_PDEX2RD */
1454				0x00000001 /* EMC_PCHG2PDEN */
1455				0x00000000 /* EMC_ACT2PDEN */
1456				0x00000008 /* EMC_AR2PDEN */
1457				0x0000000f /* EMC_RW2PDEN */
1458				0x0000006c /* EMC_TXSR */
1459				0x00000200 /* EMC_TXSRDLL */
1460				0x00000004 /* EMC_TCKE */
1461				0x00000010 /* EMC_TFAW */
1462				0x00000000 /* EMC_TRPAB */
1463				0x00000004 /* EMC_TCLKSTABLE */
1464				0x00000005 /* EMC_TCLKSTOP */
1465				0x00000c30 /* EMC_TREFBW */
1466				0x00000000 /* EMC_QUSE_EXTRA */
1467				0x00000004 /* EMC_FBIO_CFG6 */
1468				0x00000000 /* EMC_ODT_WRITE */
1469				0x00000000 /* EMC_ODT_READ */
1470				0x00007088 /* EMC_FBIO_CFG5 */
1471				0x001d0084 /* EMC_CFG_DIG_DLL */
1472				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1473				0x0003c000 /* EMC_DLL_XFORM_DQS0 */
1474				0x0003c000 /* EMC_DLL_XFORM_DQS1 */
1475				0x0003c000 /* EMC_DLL_XFORM_DQS2 */
1476				0x0003c000 /* EMC_DLL_XFORM_DQS3 */
1477				0x0003c000 /* EMC_DLL_XFORM_DQS4 */
1478				0x0003c000 /* EMC_DLL_XFORM_DQS5 */
1479				0x0003c000 /* EMC_DLL_XFORM_DQS6 */
1480				0x0003c000 /* EMC_DLL_XFORM_DQS7 */
1481				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1482				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1483				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1484				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1485				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1486				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1487				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1488				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1489				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1490				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1491				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1492				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1493				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1494				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1495				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1496				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1497				0x00048000 /* EMC_DLL_XFORM_DQ0 */
1498				0x00048000 /* EMC_DLL_XFORM_DQ1 */
1499				0x00048000 /* EMC_DLL_XFORM_DQ2 */
1500				0x00048000 /* EMC_DLL_XFORM_DQ3 */
1501				0x000002a0 /* EMC_XM2CMDPADCTRL */
1502				0x0800013d /* EMC_XM2DQSPADCTRL2 */
1503				0x00000000 /* EMC_XM2DQPADCTRL2 */
1504				0x77fff884 /* EMC_XM2CLKPADCTRL */
1505				0x01f1f508 /* EMC_XM2COMPPADCTRL */
1506				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1507				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1508				0x080001e8 /* EMC_XM2QUSEPADCTRL */
1509				0x08000021 /* EMC_XM2DQSPADCTRL3 */
1510				0x00000802 /* EMC_CTT_TERM_CTRL */
1511				0x00020000 /* EMC_ZCAL_INTERVAL */
1512				0x00000100 /* EMC_ZCAL_WAIT_CNT */
1513				0x0158000c /* EMC_MRS_WAIT_CNT */
1514				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1515				0x00000000 /* EMC_CTT */
1516				0x00000000 /* EMC_CTT_DURATION */
1517				0x800018c8 /* EMC_DYN_SELF_REF_CONTROL */
1518				0xe8000000 /* EMC_FBIO_SPARE */
1519				0xff00ff89 /* EMC_CFG_RSV */
1520			>;
1521		};
1522		timing-800000000 {
1523			clock-frequency = <800000000>;
1524			nvidia,emc-auto-cal-interval = <0x001fffff>;
1525			nvidia,emc-mode-1 = <0x80100002>;
1526			nvidia,emc-mode-2 = <0x80200018>;
1527			nvidia,emc-mode-reset = <0x80000d71>;
1528			nvidia,emc-zcal-cnt-long = <0x00000040>;
1529			nvidia,emc-cfg-periodic-qrst;
1530			nvidia,emc-configuration = <
1531				0x00000025 /* EMC_RC */
1532				0x000000ce /* EMC_RFC */
1533				0x0000001a /* EMC_RAS */
1534				0x00000009 /* EMC_RP */
1535				0x00000005 /* EMC_R2W */
1536				0x0000000d /* EMC_W2R */
1537				0x00000004 /* EMC_R2P */
1538				0x00000013 /* EMC_W2P */
1539				0x00000009 /* EMC_RD_RCD */
1540				0x00000009 /* EMC_WR_RCD */
1541				0x00000004 /* EMC_RRD */
1542				0x00000001 /* EMC_REXT */
1543				0x00000000 /* EMC_WEXT */
1544				0x00000007 /* EMC_WDV */
1545				0x0000000a /* EMC_QUSE */
1546				0x00000009 /* EMC_QRST */
1547				0x0000000b /* EMC_QSAFE */
1548				0x00000011 /* EMC_RDV */
1549				0x00001820 /* EMC_REFRESH */
1550				0x00000000 /* EMC_BURST_REFRESH_NUM */
1551				0x00000608 /* EMC_PRE_REFRESH_REQ_CNT */
1552				0x00000003 /* EMC_PDEX2WR */
1553				0x00000012 /* EMC_PDEX2RD */
1554				0x00000001 /* EMC_PCHG2PDEN */
1555				0x00000000 /* EMC_ACT2PDEN */
1556				0x0000000f /* EMC_AR2PDEN */
1557				0x00000018 /* EMC_RW2PDEN */
1558				0x000000d8 /* EMC_TXSR */
1559				0x00000200 /* EMC_TXSRDLL */
1560				0x00000005 /* EMC_TCKE */
1561				0x00000020 /* EMC_TFAW */
1562				0x00000000 /* EMC_TRPAB */
1563				0x00000007 /* EMC_TCLKSTABLE */
1564				0x00000008 /* EMC_TCLKSTOP */
1565				0x00001860 /* EMC_TREFBW */
1566				0x0000000b /* EMC_QUSE_EXTRA */
1567				0x00000006 /* EMC_FBIO_CFG6 */
1568				0x00000000 /* EMC_ODT_WRITE */
1569				0x00000000 /* EMC_ODT_READ */
1570				0x00005088 /* EMC_FBIO_CFG5 */
1571				0xf0070191 /* EMC_CFG_DIG_DLL */
1572				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1573				0x0000800a /* EMC_DLL_XFORM_DQS0 */
1574				0x0000000a /* EMC_DLL_XFORM_DQS1 */
1575				0x0000000a /* EMC_DLL_XFORM_DQS2 */
1576				0x0000000a /* EMC_DLL_XFORM_DQS3 */
1577				0x0000000a /* EMC_DLL_XFORM_DQS4 */
1578				0x0000000a /* EMC_DLL_XFORM_DQS5 */
1579				0x0000000a /* EMC_DLL_XFORM_DQS6 */
1580				0x0000000a /* EMC_DLL_XFORM_DQS7 */
1581				0x00018000 /* EMC_DLL_XFORM_QUSE0 */
1582				0x00018000 /* EMC_DLL_XFORM_QUSE1 */
1583				0x00018000 /* EMC_DLL_XFORM_QUSE2 */
1584				0x00018000 /* EMC_DLL_XFORM_QUSE3 */
1585				0x00018000 /* EMC_DLL_XFORM_QUSE4 */
1586				0x00018000 /* EMC_DLL_XFORM_QUSE5 */
1587				0x00018000 /* EMC_DLL_XFORM_QUSE6 */
1588				0x00018000 /* EMC_DLL_XFORM_QUSE7 */
1589				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1590				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1591				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1592				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1593				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1594				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1595				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1596				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1597				0x0000000a /* EMC_DLL_XFORM_DQ0 */
1598				0x0000000a /* EMC_DLL_XFORM_DQ1 */
1599				0x0000000a /* EMC_DLL_XFORM_DQ2 */
1600				0x0000000a /* EMC_DLL_XFORM_DQ3 */
1601				0x000002a0 /* EMC_XM2CMDPADCTRL */
1602				0x0600013d /* EMC_XM2DQSPADCTRL2 */
1603				0x22220000 /* EMC_XM2DQPADCTRL2 */
1604				0x77fff884 /* EMC_XM2CLKPADCTRL */
1605				0x01f1f501 /* EMC_XM2COMPPADCTRL */
1606				0x07077404 /* EMC_XM2VTTGENPADCTRL */
1607				0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
1608				0x080001e8 /* EMC_XM2QUSEPADCTRL */
1609				0x08000021 /* EMC_XM2DQSPADCTRL3 */
1610				0x00000802 /* EMC_CTT_TERM_CTRL */
1611				0x00020000 /* EMC_ZCAL_INTERVAL */
1612				0x00000100 /* EMC_ZCAL_WAIT_CNT */
1613				0x00f0000c /* EMC_MRS_WAIT_CNT */
1614				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1615				0x00000000 /* EMC_CTT */
1616				0x00000000 /* EMC_CTT_DURATION */
1617				0x8000308c /* EMC_DYN_SELF_REF_CONTROL */
1618				0xe8000000 /* EMC_FBIO_SPARE */
1619				0xff00ff49 /* EMC_CFG_RSV */
1620			>;
1621		};
1622	};
1623	emc-timings-1 {
1624		nvidia,ram-code = <1>;  /* Hynix M RAM */
1625		timing-25500000 {
1626			clock-frequency = <25500000>;
1627			nvidia,emc-auto-cal-interval = <0x001fffff>;
1628			nvidia,emc-mode-1 = <0x80100003>;
1629			nvidia,emc-mode-2 = <0x80200008>;
1630			nvidia,emc-mode-reset = <0x80001221>;
1631			nvidia,emc-zcal-cnt-long = <0x00000040>;
1632			nvidia,emc-cfg-periodic-qrst;
1633			nvidia,emc-cfg-dyn-self-ref;
1634			nvidia,emc-configuration = <
1635				0x00000001 /* EMC_RC */
1636				0x00000006 /* EMC_RFC */
1637				0x00000000 /* EMC_RAS */
1638				0x00000000 /* EMC_RP */
1639				0x00000002 /* EMC_R2W */
1640				0x0000000a /* EMC_W2R */
1641				0x00000005 /* EMC_R2P */
1642				0x0000000b /* EMC_W2P */
1643				0x00000000 /* EMC_RD_RCD */
1644				0x00000000 /* EMC_WR_RCD */
1645				0x00000003 /* EMC_RRD */
1646				0x00000001 /* EMC_REXT */
1647				0x00000000 /* EMC_WEXT */
1648				0x00000005 /* EMC_WDV */
1649				0x00000005 /* EMC_QUSE */
1650				0x00000004 /* EMC_QRST */
1651				0x0000000a /* EMC_QSAFE */
1652				0x0000000b /* EMC_RDV */
1653				0x000000c0 /* EMC_REFRESH */
1654				0x00000000 /* EMC_BURST_REFRESH_NUM */
1655				0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
1656				0x00000002 /* EMC_PDEX2WR */
1657				0x00000002 /* EMC_PDEX2RD */
1658				0x00000001 /* EMC_PCHG2PDEN */
1659				0x00000000 /* EMC_ACT2PDEN */
1660				0x00000007 /* EMC_AR2PDEN */
1661				0x0000000f /* EMC_RW2PDEN */
1662				0x00000007 /* EMC_TXSR */
1663				0x00000007 /* EMC_TXSRDLL */
1664				0x00000004 /* EMC_TCKE */
1665				0x00000002 /* EMC_TFAW */
1666				0x00000000 /* EMC_TRPAB */
1667				0x00000004 /* EMC_TCLKSTABLE */
1668				0x00000005 /* EMC_TCLKSTOP */
1669				0x000000c7 /* EMC_TREFBW */
1670				0x00000006 /* EMC_QUSE_EXTRA */
1671				0x00000004 /* EMC_FBIO_CFG6 */
1672				0x00000000 /* EMC_ODT_WRITE */
1673				0x00000000 /* EMC_ODT_READ */
1674				0x00004288 /* EMC_FBIO_CFG5 */
1675				0x007800a4 /* EMC_CFG_DIG_DLL */
1676				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1677				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1678				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1679				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1680				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1681				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1682				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1683				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1684				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1685				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1686				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1687				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1688				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1689				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1690				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1691				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1692				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1693				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1694				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1695				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1696				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1697				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1698				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1699				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1700				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1701				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1702				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1703				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1704				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1705				0x000002a0 /* EMC_XM2CMDPADCTRL */
1706				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1707				0x00000000 /* EMC_XM2DQPADCTRL2 */
1708				0x77fff884 /* EMC_XM2CLKPADCTRL */
1709				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1710				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1711				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1712				0x08000168 /* EMC_XM2QUSEPADCTRL */
1713				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1714				0x00000802 /* EMC_CTT_TERM_CTRL */
1715				0x00000000 /* EMC_ZCAL_INTERVAL */
1716				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1717				0x000c000c /* EMC_MRS_WAIT_CNT */
1718				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1719				0x00000000 /* EMC_CTT */
1720				0x00000000 /* EMC_CTT_DURATION */
1721				0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
1722				0xe8000000 /* EMC_FBIO_SPARE */
1723				0xff00ff00 /* EMC_CFG_RSV */
1724			>;
1725		};
1726		timing-51000000 {
1727			clock-frequency = <51000000>;
1728			nvidia,emc-auto-cal-interval = <0x001fffff>;
1729			nvidia,emc-mode-1 = <0x80100003>;
1730			nvidia,emc-mode-2 = <0x80200008>;
1731			nvidia,emc-mode-reset = <0x80001221>;
1732			nvidia,emc-zcal-cnt-long = <0x00000040>;
1733			nvidia,emc-cfg-periodic-qrst;
1734			nvidia,emc-cfg-dyn-self-ref;
1735			nvidia,emc-configuration = <
1736				0x00000002 /* EMC_RC */
1737				0x0000000d /* EMC_RFC */
1738				0x00000001 /* EMC_RAS */
1739				0x00000000 /* EMC_RP */
1740				0x00000002 /* EMC_R2W */
1741				0x0000000a /* EMC_W2R */
1742				0x00000005 /* EMC_R2P */
1743				0x0000000b /* EMC_W2P */
1744				0x00000000 /* EMC_RD_RCD */
1745				0x00000000 /* EMC_WR_RCD */
1746				0x00000003 /* EMC_RRD */
1747				0x00000001 /* EMC_REXT */
1748				0x00000000 /* EMC_WEXT */
1749				0x00000005 /* EMC_WDV */
1750				0x00000005 /* EMC_QUSE */
1751				0x00000004 /* EMC_QRST */
1752				0x0000000a /* EMC_QSAFE */
1753				0x0000000b /* EMC_RDV */
1754				0x00000181 /* EMC_REFRESH */
1755				0x00000000 /* EMC_BURST_REFRESH_NUM */
1756				0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
1757				0x00000002 /* EMC_PDEX2WR */
1758				0x00000002 /* EMC_PDEX2RD */
1759				0x00000001 /* EMC_PCHG2PDEN */
1760				0x00000000 /* EMC_ACT2PDEN */
1761				0x00000007 /* EMC_AR2PDEN */
1762				0x0000000f /* EMC_RW2PDEN */
1763				0x0000000e /* EMC_TXSR */
1764				0x0000000e /* EMC_TXSRDLL */
1765				0x00000004 /* EMC_TCKE */
1766				0x00000003 /* EMC_TFAW */
1767				0x00000000 /* EMC_TRPAB */
1768				0x00000004 /* EMC_TCLKSTABLE */
1769				0x00000005 /* EMC_TCLKSTOP */
1770				0x0000018e /* EMC_TREFBW */
1771				0x00000006 /* EMC_QUSE_EXTRA */
1772				0x00000004 /* EMC_FBIO_CFG6 */
1773				0x00000000 /* EMC_ODT_WRITE */
1774				0x00000000 /* EMC_ODT_READ */
1775				0x00004288 /* EMC_FBIO_CFG5 */
1776				0x007800a4 /* EMC_CFG_DIG_DLL */
1777				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1778				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1779				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1780				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1781				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1782				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1783				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1784				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1785				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1786				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1787				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1788				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1789				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1790				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1791				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1792				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1793				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1794				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1795				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1796				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1797				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1798				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1799				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1800				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1801				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1802				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1803				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1804				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1805				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1806				0x000002a0 /* EMC_XM2CMDPADCTRL */
1807				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1808				0x00000000 /* EMC_XM2DQPADCTRL2 */
1809				0x77fff884 /* EMC_XM2CLKPADCTRL */
1810				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1811				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1812				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1813				0x08000168 /* EMC_XM2QUSEPADCTRL */
1814				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1815				0x00000802 /* EMC_CTT_TERM_CTRL */
1816				0x00000000 /* EMC_ZCAL_INTERVAL */
1817				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1818				0x000c000c /* EMC_MRS_WAIT_CNT */
1819				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1820				0x00000000 /* EMC_CTT */
1821				0x00000000 /* EMC_CTT_DURATION */
1822				0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
1823				0xe8000000 /* EMC_FBIO_SPARE */
1824				0xff00ff00 /* EMC_CFG_RSV */
1825			>;
1826		};
1827		timing-102000000 {
1828			clock-frequency = <102000000>;
1829			nvidia,emc-auto-cal-interval = <0x001fffff>;
1830			nvidia,emc-mode-1 = <0x80100003>;
1831			nvidia,emc-mode-2 = <0x80200008>;
1832			nvidia,emc-mode-reset = <0x80001221>;
1833			nvidia,emc-zcal-cnt-long = <0x00000040>;
1834			nvidia,emc-cfg-periodic-qrst;
1835			nvidia,emc-cfg-dyn-self-ref;
1836			nvidia,emc-configuration = <
1837				0x00000004 /* EMC_RC */
1838				0x0000001a /* EMC_RFC */
1839				0x00000003 /* EMC_RAS */
1840				0x00000001 /* EMC_RP */
1841				0x00000002 /* EMC_R2W */
1842				0x0000000a /* EMC_W2R */
1843				0x00000005 /* EMC_R2P */
1844				0x0000000b /* EMC_W2P */
1845				0x00000001 /* EMC_RD_RCD */
1846				0x00000001 /* EMC_WR_RCD */
1847				0x00000003 /* EMC_RRD */
1848				0x00000001 /* EMC_REXT */
1849				0x00000000 /* EMC_WEXT */
1850				0x00000005 /* EMC_WDV */
1851				0x00000005 /* EMC_QUSE */
1852				0x00000004 /* EMC_QRST */
1853				0x0000000a /* EMC_QSAFE */
1854				0x0000000b /* EMC_RDV */
1855				0x00000303 /* EMC_REFRESH */
1856				0x00000000 /* EMC_BURST_REFRESH_NUM */
1857				0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
1858				0x00000002 /* EMC_PDEX2WR */
1859				0x00000002 /* EMC_PDEX2RD */
1860				0x00000001 /* EMC_PCHG2PDEN */
1861				0x00000000 /* EMC_ACT2PDEN */
1862				0x00000007 /* EMC_AR2PDEN */
1863				0x0000000f /* EMC_RW2PDEN */
1864				0x0000001c /* EMC_TXSR */
1865				0x0000001c /* EMC_TXSRDLL */
1866				0x00000004 /* EMC_TCKE */
1867				0x00000005 /* EMC_TFAW */
1868				0x00000000 /* EMC_TRPAB */
1869				0x00000004 /* EMC_TCLKSTABLE */
1870				0x00000005 /* EMC_TCLKSTOP */
1871				0x0000031c /* EMC_TREFBW */
1872				0x00000006 /* EMC_QUSE_EXTRA */
1873				0x00000004 /* EMC_FBIO_CFG6 */
1874				0x00000000 /* EMC_ODT_WRITE */
1875				0x00000000 /* EMC_ODT_READ */
1876				0x00004288 /* EMC_FBIO_CFG5 */
1877				0x007800a4 /* EMC_CFG_DIG_DLL */
1878				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1879				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1880				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1881				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1882				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1883				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1884				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1885				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1886				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1887				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1888				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1889				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1890				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1891				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1892				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1893				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1894				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1895				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1896				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1897				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1898				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1899				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1900				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1901				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1902				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1903				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1904				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1905				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1906				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1907				0x000002a0 /* EMC_XM2CMDPADCTRL */
1908				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1909				0x00000000 /* EMC_XM2DQPADCTRL2 */
1910				0x77fff884 /* EMC_XM2CLKPADCTRL */
1911				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1912				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1913				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1914				0x08000168 /* EMC_XM2QUSEPADCTRL */
1915				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1916				0x00000802 /* EMC_CTT_TERM_CTRL */
1917				0x00000000 /* EMC_ZCAL_INTERVAL */
1918				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1919				0x000c000c /* EMC_MRS_WAIT_CNT */
1920				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1921				0x00000000 /* EMC_CTT */
1922				0x00000000 /* EMC_CTT_DURATION */
1923				0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
1924				0xe8000000 /* EMC_FBIO_SPARE */
1925				0xff00ff00 /* EMC_CFG_RSV */
1926			>;
1927		};
1928		timing-204000000 {
1929			clock-frequency = <204000000>;
1930			nvidia,emc-auto-cal-interval = <0x001fffff>;
1931			nvidia,emc-mode-1 = <0x80100003>;
1932			nvidia,emc-mode-2 = <0x80200008>;
1933			nvidia,emc-mode-reset = <0x80001221>;
1934			nvidia,emc-zcal-cnt-long = <0x00000040>;
1935			nvidia,emc-cfg-periodic-qrst;
1936			nvidia,emc-cfg-dyn-self-ref;
1937			nvidia,emc-configuration = <
1938				0x00000009 /* EMC_RC */
1939				0x00000035 /* EMC_RFC */
1940				0x00000007 /* EMC_RAS */
1941				0x00000002 /* EMC_RP */
1942				0x00000002 /* EMC_R2W */
1943				0x0000000a /* EMC_W2R */
1944				0x00000005 /* EMC_R2P */
1945				0x0000000b /* EMC_W2P */
1946				0x00000002 /* EMC_RD_RCD */
1947				0x00000002 /* EMC_WR_RCD */
1948				0x00000003 /* EMC_RRD */
1949				0x00000001 /* EMC_REXT */
1950				0x00000000 /* EMC_WEXT */
1951				0x00000005 /* EMC_WDV */
1952				0x00000005 /* EMC_QUSE */
1953				0x00000004 /* EMC_QRST */
1954				0x0000000a /* EMC_QSAFE */
1955				0x0000000b /* EMC_RDV */
1956				0x00000607 /* EMC_REFRESH */
1957				0x00000000 /* EMC_BURST_REFRESH_NUM */
1958				0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
1959				0x00000002 /* EMC_PDEX2WR */
1960				0x00000002 /* EMC_PDEX2RD */
1961				0x00000001 /* EMC_PCHG2PDEN */
1962				0x00000000 /* EMC_ACT2PDEN */
1963				0x00000007 /* EMC_AR2PDEN */
1964				0x0000000f /* EMC_RW2PDEN */
1965				0x00000038 /* EMC_TXSR */
1966				0x00000038 /* EMC_TXSRDLL */
1967				0x00000004 /* EMC_TCKE */
1968				0x00000009 /* EMC_TFAW */
1969				0x00000000 /* EMC_TRPAB */
1970				0x00000004 /* EMC_TCLKSTABLE */
1971				0x00000005 /* EMC_TCLKSTOP */
1972				0x00000638 /* EMC_TREFBW */
1973				0x00000006 /* EMC_QUSE_EXTRA */
1974				0x00000006 /* EMC_FBIO_CFG6 */
1975				0x00000000 /* EMC_ODT_WRITE */
1976				0x00000000 /* EMC_ODT_READ */
1977				0x00004288 /* EMC_FBIO_CFG5 */
1978				0x004400a4 /* EMC_CFG_DIG_DLL */
1979				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1980				0x00080000 /* EMC_DLL_XFORM_DQS0 */
1981				0x00080000 /* EMC_DLL_XFORM_DQS1 */
1982				0x00080000 /* EMC_DLL_XFORM_DQS2 */
1983				0x00080000 /* EMC_DLL_XFORM_DQS3 */
1984				0x00080000 /* EMC_DLL_XFORM_DQS4 */
1985				0x00080000 /* EMC_DLL_XFORM_DQS5 */
1986				0x00080000 /* EMC_DLL_XFORM_DQS6 */
1987				0x00080000 /* EMC_DLL_XFORM_DQS7 */
1988				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1989				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1990				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1991				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1992				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1993				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1994				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1995				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1996				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1997				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1998				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1999				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2000				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2001				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2002				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2003				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2004				0x00080000 /* EMC_DLL_XFORM_DQ0 */
2005				0x00080000 /* EMC_DLL_XFORM_DQ1 */
2006				0x00080000 /* EMC_DLL_XFORM_DQ2 */
2007				0x00080000 /* EMC_DLL_XFORM_DQ3 */
2008				0x000002a0 /* EMC_XM2CMDPADCTRL */
2009				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2010				0x00000000 /* EMC_XM2DQPADCTRL2 */
2011				0x77fff884 /* EMC_XM2CLKPADCTRL */
2012				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2013				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2014				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2015				0x08000168 /* EMC_XM2QUSEPADCTRL */
2016				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2017				0x00000802 /* EMC_CTT_TERM_CTRL */
2018				0x00020000 /* EMC_ZCAL_INTERVAL */
2019				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2020				0x000c000c /* EMC_MRS_WAIT_CNT */
2021				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2022				0x00000000 /* EMC_CTT */
2023				0x00000000 /* EMC_CTT_DURATION */
2024				0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
2025				0xe8000000 /* EMC_FBIO_SPARE */
2026				0xff00ff00 /* EMC_CFG_RSV */
2027			>;
2028		};
2029		timing-400000000 {
2030			clock-frequency = <400000000>;
2031			nvidia,emc-auto-cal-interval = <0x001fffff>;
2032			nvidia,emc-mode-1 = <0x80100002>;
2033			nvidia,emc-mode-2 = <0x80200000>;
2034			nvidia,emc-mode-reset = <0x80000521>;
2035			nvidia,emc-zcal-cnt-long = <0x00000040>;
2036			nvidia,emc-configuration = <
2037				0x00000012 /* EMC_RC */
2038				0x00000066 /* EMC_RFC */
2039				0x0000000c /* EMC_RAS */
2040				0x00000004 /* EMC_RP */
2041				0x00000003 /* EMC_R2W */
2042				0x00000008 /* EMC_W2R */
2043				0x00000002 /* EMC_R2P */
2044				0x0000000a /* EMC_W2P */
2045				0x00000004 /* EMC_RD_RCD */
2046				0x00000004 /* EMC_WR_RCD */
2047				0x00000002 /* EMC_RRD */
2048				0x00000001 /* EMC_REXT */
2049				0x00000000 /* EMC_WEXT */
2050				0x00000004 /* EMC_WDV */
2051				0x00000006 /* EMC_QUSE */
2052				0x00000004 /* EMC_QRST */
2053				0x0000000a /* EMC_QSAFE */
2054				0x0000000c /* EMC_RDV */
2055				0x00000bf0 /* EMC_REFRESH */
2056				0x00000000 /* EMC_BURST_REFRESH_NUM */
2057				0x000002fc /* EMC_PRE_REFRESH_REQ_CNT */
2058				0x00000001 /* EMC_PDEX2WR */
2059				0x00000008 /* EMC_PDEX2RD */
2060				0x00000001 /* EMC_PCHG2PDEN */
2061				0x00000000 /* EMC_ACT2PDEN */
2062				0x00000008 /* EMC_AR2PDEN */
2063				0x0000000f /* EMC_RW2PDEN */
2064				0x0000006c /* EMC_TXSR */
2065				0x00000200 /* EMC_TXSRDLL */
2066				0x00000004 /* EMC_TCKE */
2067				0x00000010 /* EMC_TFAW */
2068				0x00000000 /* EMC_TRPAB */
2069				0x00000004 /* EMC_TCLKSTABLE */
2070				0x00000005 /* EMC_TCLKSTOP */
2071				0x00000c30 /* EMC_TREFBW */
2072				0x00000000 /* EMC_QUSE_EXTRA */
2073				0x00000004 /* EMC_FBIO_CFG6 */
2074				0x00000000 /* EMC_ODT_WRITE */
2075				0x00000000 /* EMC_ODT_READ */
2076				0x00007088 /* EMC_FBIO_CFG5 */
2077				0x001d0084 /* EMC_CFG_DIG_DLL */
2078				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2079				0x0003c000 /* EMC_DLL_XFORM_DQS0 */
2080				0x0003c000 /* EMC_DLL_XFORM_DQS1 */
2081				0x0003c000 /* EMC_DLL_XFORM_DQS2 */
2082				0x0003c000 /* EMC_DLL_XFORM_DQS3 */
2083				0x0003c000 /* EMC_DLL_XFORM_DQS4 */
2084				0x0003c000 /* EMC_DLL_XFORM_DQS5 */
2085				0x0003c000 /* EMC_DLL_XFORM_DQS6 */
2086				0x0003c000 /* EMC_DLL_XFORM_DQS7 */
2087				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2088				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2089				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2090				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2091				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2092				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2093				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2094				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2095				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2096				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2097				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2098				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2099				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2100				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2101				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2102				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2103				0x00048000 /* EMC_DLL_XFORM_DQ0 */
2104				0x00048000 /* EMC_DLL_XFORM_DQ1 */
2105				0x00048000 /* EMC_DLL_XFORM_DQ2 */
2106				0x00048000 /* EMC_DLL_XFORM_DQ3 */
2107				0x000002a0 /* EMC_XM2CMDPADCTRL */
2108				0x0800013d /* EMC_XM2DQSPADCTRL2 */
2109				0x00000000 /* EMC_XM2DQPADCTRL2 */
2110				0x77fff884 /* EMC_XM2CLKPADCTRL */
2111				0x01f1f508 /* EMC_XM2COMPPADCTRL */
2112				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2113				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2114				0x080001e8 /* EMC_XM2QUSEPADCTRL */
2115				0x08000021 /* EMC_XM2DQSPADCTRL3 */
2116				0x00000802 /* EMC_CTT_TERM_CTRL */
2117				0x00020000 /* EMC_ZCAL_INTERVAL */
2118				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2119				0x0158000c /* EMC_MRS_WAIT_CNT */
2120				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2121				0x00000000 /* EMC_CTT */
2122				0x00000000 /* EMC_CTT_DURATION */
2123				0x800018c8 /* EMC_DYN_SELF_REF_CONTROL */
2124				0xe8000000 /* EMC_FBIO_SPARE */
2125				0xff00ff89 /* EMC_CFG_RSV */
2126			>;
2127		};
2128		timing-800000000 {
2129			clock-frequency = <800000000>;
2130			nvidia,emc-auto-cal-interval = <0x001fffff>;
2131			nvidia,emc-mode-1 = <0x80100002>;
2132			nvidia,emc-mode-2 = <0x80200018>;
2133			nvidia,emc-mode-reset = <0x80000d71>;
2134			nvidia,emc-zcal-cnt-long = <0x00000040>;
2135			nvidia,emc-cfg-periodic-qrst;
2136			nvidia,emc-configuration = <
2137				0x00000025 /* EMC_RC */
2138				0x000000ce /* EMC_RFC */
2139				0x0000001a /* EMC_RAS */
2140				0x00000009 /* EMC_RP */
2141				0x00000005 /* EMC_R2W */
2142				0x0000000d /* EMC_W2R */
2143				0x00000004 /* EMC_R2P */
2144				0x00000013 /* EMC_W2P */
2145				0x00000009 /* EMC_RD_RCD */
2146				0x00000009 /* EMC_WR_RCD */
2147				0x00000004 /* EMC_RRD */
2148				0x00000001 /* EMC_REXT */
2149				0x00000000 /* EMC_WEXT */
2150				0x00000007 /* EMC_WDV */
2151				0x0000000a /* EMC_QUSE */
2152				0x00000009 /* EMC_QRST */
2153				0x0000000b /* EMC_QSAFE */
2154				0x00000011 /* EMC_RDV */
2155				0x00001820 /* EMC_REFRESH */
2156				0x00000000 /* EMC_BURST_REFRESH_NUM */
2157				0x00000608 /* EMC_PRE_REFRESH_REQ_CNT */
2158				0x00000003 /* EMC_PDEX2WR */
2159				0x00000012 /* EMC_PDEX2RD */
2160				0x00000001 /* EMC_PCHG2PDEN */
2161				0x00000000 /* EMC_ACT2PDEN */
2162				0x0000000f /* EMC_AR2PDEN */
2163				0x00000018 /* EMC_RW2PDEN */
2164				0x000000d8 /* EMC_TXSR */
2165				0x00000200 /* EMC_TXSRDLL */
2166				0x00000005 /* EMC_TCKE */
2167				0x00000020 /* EMC_TFAW */
2168				0x00000000 /* EMC_TRPAB */
2169				0x00000007 /* EMC_TCLKSTABLE */
2170				0x00000008 /* EMC_TCLKSTOP */
2171				0x00001860 /* EMC_TREFBW */
2172				0x0000000b /* EMC_QUSE_EXTRA */
2173				0x00000006 /* EMC_FBIO_CFG6 */
2174				0x00000000 /* EMC_ODT_WRITE */
2175				0x00000000 /* EMC_ODT_READ */
2176				0x00005088 /* EMC_FBIO_CFG5 */
2177				0xf0070191 /* EMC_CFG_DIG_DLL */
2178				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2179				0x0000800a /* EMC_DLL_XFORM_DQS0 */
2180				0x0000000a /* EMC_DLL_XFORM_DQS1 */
2181				0x0000000a /* EMC_DLL_XFORM_DQS2 */
2182				0x0000000a /* EMC_DLL_XFORM_DQS3 */
2183				0x0000000a /* EMC_DLL_XFORM_DQS4 */
2184				0x0000000a /* EMC_DLL_XFORM_DQS5 */
2185				0x0000000a /* EMC_DLL_XFORM_DQS6 */
2186				0x0000000a /* EMC_DLL_XFORM_DQS7 */
2187				0x00018000 /* EMC_DLL_XFORM_QUSE0 */
2188				0x00018000 /* EMC_DLL_XFORM_QUSE1 */
2189				0x00018000 /* EMC_DLL_XFORM_QUSE2 */
2190				0x00018000 /* EMC_DLL_XFORM_QUSE3 */
2191				0x00018000 /* EMC_DLL_XFORM_QUSE4 */
2192				0x00018000 /* EMC_DLL_XFORM_QUSE5 */
2193				0x00018000 /* EMC_DLL_XFORM_QUSE6 */
2194				0x00018000 /* EMC_DLL_XFORM_QUSE7 */
2195				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2196				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2197				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2198				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2199				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2200				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2201				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2202				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2203				0x0000000a /* EMC_DLL_XFORM_DQ0 */
2204				0x0000000a /* EMC_DLL_XFORM_DQ1 */
2205				0x0000000a /* EMC_DLL_XFORM_DQ2 */
2206				0x0000000a /* EMC_DLL_XFORM_DQ3 */
2207				0x000002a0 /* EMC_XM2CMDPADCTRL */
2208				0x0600013d /* EMC_XM2DQSPADCTRL2 */
2209				0x22220000 /* EMC_XM2DQPADCTRL2 */
2210				0x77fff884 /* EMC_XM2CLKPADCTRL */
2211				0x01f1f501 /* EMC_XM2COMPPADCTRL */
2212				0x07077404 /* EMC_XM2VTTGENPADCTRL */
2213				0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
2214				0x080001e8 /* EMC_XM2QUSEPADCTRL */
2215				0x08000021 /* EMC_XM2DQSPADCTRL3 */
2216				0x00000802 /* EMC_CTT_TERM_CTRL */
2217				0x00020000 /* EMC_ZCAL_INTERVAL */
2218				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2219				0x00f0000c /* EMC_MRS_WAIT_CNT */
2220				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2221				0x00000000 /* EMC_CTT */
2222				0x00000000 /* EMC_CTT_DURATION */
2223				0x8000308c /* EMC_DYN_SELF_REF_CONTROL */
2224				0xe8000000 /* EMC_FBIO_SPARE */
2225				0xff00ff49 /* EMC_CFG_RSV */
2226			>;
2227		};
2228	};
2229	emc-timings-2 {
2230		nvidia,ram-code = <2>;  /* Hynix A RAM */
2231		timing-25500000 {
2232			clock-frequency = <25500000>;
2233			nvidia,emc-auto-cal-interval = <0x001fffff>;
2234			nvidia,emc-mode-1 = <0x80100003>;
2235			nvidia,emc-mode-2 = <0x80200008>;
2236			nvidia,emc-mode-reset = <0x80001221>;
2237			nvidia,emc-zcal-cnt-long = <0x00000040>;
2238			nvidia,emc-cfg-periodic-qrst;
2239			nvidia,emc-cfg-dyn-self-ref;
2240			nvidia,emc-configuration = <
2241				0x00000001 /* EMC_RC */
2242				0x00000007 /* EMC_RFC */
2243				0x00000000 /* EMC_RAS */
2244				0x00000000 /* EMC_RP */
2245				0x00000002 /* EMC_R2W */
2246				0x0000000a /* EMC_W2R */
2247				0x00000005 /* EMC_R2P */
2248				0x0000000b /* EMC_W2P */
2249				0x00000000 /* EMC_RD_RCD */
2250				0x00000000 /* EMC_WR_RCD */
2251				0x00000003 /* EMC_RRD */
2252				0x00000001 /* EMC_REXT */
2253				0x00000000 /* EMC_WEXT */
2254				0x00000005 /* EMC_WDV */
2255				0x00000005 /* EMC_QUSE */
2256				0x00000004 /* EMC_QRST */
2257				0x0000000a /* EMC_QSAFE */
2258				0x0000000b /* EMC_RDV */
2259				0x000000c0 /* EMC_REFRESH */
2260				0x00000000 /* EMC_BURST_REFRESH_NUM */
2261				0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
2262				0x00000002 /* EMC_PDEX2WR */
2263				0x00000002 /* EMC_PDEX2RD */
2264				0x00000001 /* EMC_PCHG2PDEN */
2265				0x00000000 /* EMC_ACT2PDEN */
2266				0x00000007 /* EMC_AR2PDEN */
2267				0x0000000f /* EMC_RW2PDEN */
2268				0x00000008 /* EMC_TXSR */
2269				0x00000008 /* EMC_TXSRDLL */
2270				0x00000004 /* EMC_TCKE */
2271				0x00000002 /* EMC_TFAW */
2272				0x00000000 /* EMC_TRPAB */
2273				0x00000004 /* EMC_TCLKSTABLE */
2274				0x00000005 /* EMC_TCLKSTOP */
2275				0x000000c7 /* EMC_TREFBW */
2276				0x00000006 /* EMC_QUSE_EXTRA */
2277				0x00000004 /* EMC_FBIO_CFG6 */
2278				0x00000000 /* EMC_ODT_WRITE */
2279				0x00000000 /* EMC_ODT_READ */
2280				0x00004288 /* EMC_FBIO_CFG5 */
2281				0x007800a4 /* EMC_CFG_DIG_DLL */
2282				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2283				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
2284				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
2285				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
2286				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
2287				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
2288				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
2289				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
2290				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
2291				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2292				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2293				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2294				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2295				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2296				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2297				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2298				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2299				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2300				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2301				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2302				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2303				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2304				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2305				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2306				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2307				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
2308				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
2309				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
2310				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
2311				0x000002a0 /* EMC_XM2CMDPADCTRL */
2312				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2313				0x00000000 /* EMC_XM2DQPADCTRL2 */
2314				0x77fff884 /* EMC_XM2CLKPADCTRL */
2315				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2316				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2317				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2318				0x08000168 /* EMC_XM2QUSEPADCTRL */
2319				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2320				0x00000802 /* EMC_CTT_TERM_CTRL */
2321				0x00000000 /* EMC_ZCAL_INTERVAL */
2322				0x00000040 /* EMC_ZCAL_WAIT_CNT */
2323				0x000c000c /* EMC_MRS_WAIT_CNT */
2324				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2325				0x00000000 /* EMC_CTT */
2326				0x00000000 /* EMC_CTT_DURATION */
2327				0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
2328				0xe8000000 /* EMC_FBIO_SPARE */
2329				0xff00ff00 /* EMC_CFG_RSV */
2330			>;
2331		};
2332		timing-51000000 {
2333			clock-frequency = <51000000>;
2334			nvidia,emc-auto-cal-interval = <0x001fffff>;
2335			nvidia,emc-mode-1 = <0x80100003>;
2336			nvidia,emc-mode-2 = <0x80200008>;
2337			nvidia,emc-mode-reset = <0x80001221>;
2338			nvidia,emc-zcal-cnt-long = <0x00000040>;
2339			nvidia,emc-cfg-periodic-qrst;
2340			nvidia,emc-cfg-dyn-self-ref;
2341			nvidia,emc-configuration = <
2342				0x00000002 /* EMC_RC */
2343				0x0000000f /* EMC_RFC */
2344				0x00000001 /* EMC_RAS */
2345				0x00000000 /* EMC_RP */
2346				0x00000002 /* EMC_R2W */
2347				0x0000000a /* EMC_W2R */
2348				0x00000005 /* EMC_R2P */
2349				0x0000000b /* EMC_W2P */
2350				0x00000000 /* EMC_RD_RCD */
2351				0x00000000 /* EMC_WR_RCD */
2352				0x00000003 /* EMC_RRD */
2353				0x00000001 /* EMC_REXT */
2354				0x00000000 /* EMC_WEXT */
2355				0x00000005 /* EMC_WDV */
2356				0x00000005 /* EMC_QUSE */
2357				0x00000004 /* EMC_QRST */
2358				0x0000000a /* EMC_QSAFE */
2359				0x0000000b /* EMC_RDV */
2360				0x00000181 /* EMC_REFRESH */
2361				0x00000000 /* EMC_BURST_REFRESH_NUM */
2362				0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
2363				0x00000002 /* EMC_PDEX2WR */
2364				0x00000002 /* EMC_PDEX2RD */
2365				0x00000001 /* EMC_PCHG2PDEN */
2366				0x00000000 /* EMC_ACT2PDEN */
2367				0x00000007 /* EMC_AR2PDEN */
2368				0x0000000f /* EMC_RW2PDEN */
2369				0x00000010 /* EMC_TXSR */
2370				0x00000010 /* EMC_TXSRDLL */
2371				0x00000004 /* EMC_TCKE */
2372				0x00000003 /* EMC_TFAW */
2373				0x00000000 /* EMC_TRPAB */
2374				0x00000004 /* EMC_TCLKSTABLE */
2375				0x00000005 /* EMC_TCLKSTOP */
2376				0x0000018e /* EMC_TREFBW */
2377				0x00000006 /* EMC_QUSE_EXTRA */
2378				0x00000004 /* EMC_FBIO_CFG6 */
2379				0x00000000 /* EMC_ODT_WRITE */
2380				0x00000000 /* EMC_ODT_READ */
2381				0x00004288 /* EMC_FBIO_CFG5 */
2382				0x007800a4 /* EMC_CFG_DIG_DLL */
2383				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2384				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
2385				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
2386				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
2387				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
2388				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
2389				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
2390				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
2391				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
2392				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2393				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2394				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2395				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2396				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2397				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2398				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2399				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2400				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2401				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2402				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2403				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2404				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2405				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2406				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2407				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2408				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
2409				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
2410				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
2411				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
2412				0x000002a0 /* EMC_XM2CMDPADCTRL */
2413				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2414				0x00000000 /* EMC_XM2DQPADCTRL2 */
2415				0x77fff884 /* EMC_XM2CLKPADCTRL */
2416				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2417				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2418				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2419				0x08000168 /* EMC_XM2QUSEPADCTRL */
2420				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2421				0x00000802 /* EMC_CTT_TERM_CTRL */
2422				0x00000000 /* EMC_ZCAL_INTERVAL */
2423				0x00000040 /* EMC_ZCAL_WAIT_CNT */
2424				0x000c000c /* EMC_MRS_WAIT_CNT */
2425				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2426				0x00000000 /* EMC_CTT */
2427				0x00000000 /* EMC_CTT_DURATION */
2428				0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
2429				0xe8000000 /* EMC_FBIO_SPARE */
2430				0xff00ff00 /* EMC_CFG_RSV */
2431			>;
2432		};
2433		timing-102000000 {
2434			clock-frequency = <102000000>;
2435			nvidia,emc-auto-cal-interval = <0x001fffff>;
2436			nvidia,emc-mode-1 = <0x80100003>;
2437			nvidia,emc-mode-2 = <0x80200008>;
2438			nvidia,emc-mode-reset = <0x80001221>;
2439			nvidia,emc-zcal-cnt-long = <0x00000040>;
2440			nvidia,emc-cfg-periodic-qrst;
2441			nvidia,emc-cfg-dyn-self-ref;
2442			nvidia,emc-configuration = <
2443				0x00000004 /* EMC_RC */
2444				0x0000001e /* EMC_RFC */
2445				0x00000003 /* EMC_RAS */
2446				0x00000001 /* EMC_RP */
2447				0x00000002 /* EMC_R2W */
2448				0x0000000a /* EMC_W2R */
2449				0x00000005 /* EMC_R2P */
2450				0x0000000b /* EMC_W2P */
2451				0x00000001 /* EMC_RD_RCD */
2452				0x00000001 /* EMC_WR_RCD */
2453				0x00000003 /* EMC_RRD */
2454				0x00000001 /* EMC_REXT */
2455				0x00000000 /* EMC_WEXT */
2456				0x00000005 /* EMC_WDV */
2457				0x00000005 /* EMC_QUSE */
2458				0x00000004 /* EMC_QRST */
2459				0x0000000a /* EMC_QSAFE */
2460				0x0000000b /* EMC_RDV */
2461				0x00000303 /* EMC_REFRESH */
2462				0x00000000 /* EMC_BURST_REFRESH_NUM */
2463				0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
2464				0x00000002 /* EMC_PDEX2WR */
2465				0x00000002 /* EMC_PDEX2RD */
2466				0x00000001 /* EMC_PCHG2PDEN */
2467				0x00000000 /* EMC_ACT2PDEN */
2468				0x00000007 /* EMC_AR2PDEN */
2469				0x0000000f /* EMC_RW2PDEN */
2470				0x00000020 /* EMC_TXSR */
2471				0x00000020 /* EMC_TXSRDLL */
2472				0x00000004 /* EMC_TCKE */
2473				0x00000005 /* EMC_TFAW */
2474				0x00000000 /* EMC_TRPAB */
2475				0x00000004 /* EMC_TCLKSTABLE */
2476				0x00000005 /* EMC_TCLKSTOP */
2477				0x0000031c /* EMC_TREFBW */
2478				0x00000006 /* EMC_QUSE_EXTRA */
2479				0x00000004 /* EMC_FBIO_CFG6 */
2480				0x00000000 /* EMC_ODT_WRITE */
2481				0x00000000 /* EMC_ODT_READ */
2482				0x00004288 /* EMC_FBIO_CFG5 */
2483				0x007800a4 /* EMC_CFG_DIG_DLL */
2484				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2485				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
2486				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
2487				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
2488				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
2489				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
2490				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
2491				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
2492				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
2493				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2494				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2495				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2496				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2497				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2498				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2499				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2500				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2501				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2502				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2503				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2504				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2505				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2506				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2507				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2508				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2509				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
2510				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
2511				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
2512				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
2513				0x000002a0 /* EMC_XM2CMDPADCTRL */
2514				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2515				0x00000000 /* EMC_XM2DQPADCTRL2 */
2516				0x77fff884 /* EMC_XM2CLKPADCTRL */
2517				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2518				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2519				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2520				0x08000168 /* EMC_XM2QUSEPADCTRL */
2521				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2522				0x00000802 /* EMC_CTT_TERM_CTRL */
2523				0x00000000 /* EMC_ZCAL_INTERVAL */
2524				0x00000040 /* EMC_ZCAL_WAIT_CNT */
2525				0x000c000c /* EMC_MRS_WAIT_CNT */
2526				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2527				0x00000000 /* EMC_CTT */
2528				0x00000000 /* EMC_CTT_DURATION */
2529				0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
2530				0xe8000000 /* EMC_FBIO_SPARE */
2531				0xff00ff00 /* EMC_CFG_RSV */
2532			>;
2533		};
2534		timing-204000000 {
2535			clock-frequency = <204000000>;
2536			nvidia,emc-auto-cal-interval = <0x001fffff>;
2537			nvidia,emc-mode-1 = <0x80100003>;
2538			nvidia,emc-mode-2 = <0x80200008>;
2539			nvidia,emc-mode-reset = <0x80001221>;
2540			nvidia,emc-zcal-cnt-long = <0x00000040>;
2541			nvidia,emc-cfg-periodic-qrst;
2542			nvidia,emc-cfg-dyn-self-ref;
2543			nvidia,emc-configuration = <
2544				0x00000009 /* EMC_RC */
2545				0x0000003d /* EMC_RFC */
2546				0x00000007 /* EMC_RAS */
2547				0x00000002 /* EMC_RP */
2548				0x00000002 /* EMC_R2W */
2549				0x0000000a /* EMC_W2R */
2550				0x00000005 /* EMC_R2P */
2551				0x0000000b /* EMC_W2P */
2552				0x00000002 /* EMC_RD_RCD */
2553				0x00000002 /* EMC_WR_RCD */
2554				0x00000003 /* EMC_RRD */
2555				0x00000001 /* EMC_REXT */
2556				0x00000000 /* EMC_WEXT */
2557				0x00000005 /* EMC_WDV */
2558				0x00000005 /* EMC_QUSE */
2559				0x00000004 /* EMC_QRST */
2560				0x0000000a /* EMC_QSAFE */
2561				0x0000000b /* EMC_RDV */
2562				0x00000607 /* EMC_REFRESH */
2563				0x00000000 /* EMC_BURST_REFRESH_NUM */
2564				0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
2565				0x00000002 /* EMC_PDEX2WR */
2566				0x00000002 /* EMC_PDEX2RD */
2567				0x00000001 /* EMC_PCHG2PDEN */
2568				0x00000000 /* EMC_ACT2PDEN */
2569				0x00000007 /* EMC_AR2PDEN */
2570				0x0000000f /* EMC_RW2PDEN */
2571				0x00000040 /* EMC_TXSR */
2572				0x00000040 /* EMC_TXSRDLL */
2573				0x00000004 /* EMC_TCKE */
2574				0x00000009 /* EMC_TFAW */
2575				0x00000000 /* EMC_TRPAB */
2576				0x00000004 /* EMC_TCLKSTABLE */
2577				0x00000005 /* EMC_TCLKSTOP */
2578				0x00000638 /* EMC_TREFBW */
2579				0x00000006 /* EMC_QUSE_EXTRA */
2580				0x00000006 /* EMC_FBIO_CFG6 */
2581				0x00000000 /* EMC_ODT_WRITE */
2582				0x00000000 /* EMC_ODT_READ */
2583				0x00004288 /* EMC_FBIO_CFG5 */
2584				0x004400a4 /* EMC_CFG_DIG_DLL */
2585				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2586				0x00080000 /* EMC_DLL_XFORM_DQS0 */
2587				0x00080000 /* EMC_DLL_XFORM_DQS1 */
2588				0x00080000 /* EMC_DLL_XFORM_DQS2 */
2589				0x00080000 /* EMC_DLL_XFORM_DQS3 */
2590				0x00080000 /* EMC_DLL_XFORM_DQS4 */
2591				0x00080000 /* EMC_DLL_XFORM_DQS5 */
2592				0x00080000 /* EMC_DLL_XFORM_DQS6 */
2593				0x00080000 /* EMC_DLL_XFORM_DQS7 */
2594				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2595				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2596				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2597				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2598				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2599				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2600				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2601				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2602				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2603				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2604				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2605				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2606				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2607				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2608				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2609				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2610				0x00080000 /* EMC_DLL_XFORM_DQ0 */
2611				0x00080000 /* EMC_DLL_XFORM_DQ1 */
2612				0x00080000 /* EMC_DLL_XFORM_DQ2 */
2613				0x00080000 /* EMC_DLL_XFORM_DQ3 */
2614				0x000002a0 /* EMC_XM2CMDPADCTRL */
2615				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2616				0x00000000 /* EMC_XM2DQPADCTRL2 */
2617				0x77fff884 /* EMC_XM2CLKPADCTRL */
2618				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2619				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2620				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2621				0x08000168 /* EMC_XM2QUSEPADCTRL */
2622				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2623				0x00000802 /* EMC_CTT_TERM_CTRL */
2624				0x00020000 /* EMC_ZCAL_INTERVAL */
2625				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2626				0x000c000c /* EMC_MRS_WAIT_CNT */
2627				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2628				0x00000000 /* EMC_CTT */
2629				0x00000000 /* EMC_CTT_DURATION */
2630				0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
2631				0xe8000000 /* EMC_FBIO_SPARE */
2632				0xff00ff00 /* EMC_CFG_RSV */
2633			>;
2634		};
2635		timing-400000000 {
2636			clock-frequency = <400000000>;
2637			nvidia,emc-auto-cal-interval = <0x001fffff>;
2638			nvidia,emc-mode-1 = <0x80100002>;
2639			nvidia,emc-mode-2 = <0x80200000>;
2640			nvidia,emc-mode-reset = <0x80000521>;
2641			nvidia,emc-zcal-cnt-long = <0x00000040>;
2642			nvidia,emc-configuration = <
2643				0x00000012 /* EMC_RC */
2644				0x00000076 /* EMC_RFC */
2645				0x0000000c /* EMC_RAS */
2646				0x00000004 /* EMC_RP */
2647				0x00000003 /* EMC_R2W */
2648				0x00000008 /* EMC_W2R */
2649				0x00000002 /* EMC_R2P */
2650				0x0000000a /* EMC_W2P */
2651				0x00000004 /* EMC_RD_RCD */
2652				0x00000004 /* EMC_WR_RCD */
2653				0x00000002 /* EMC_RRD */
2654				0x00000001 /* EMC_REXT */
2655				0x00000000 /* EMC_WEXT */
2656				0x00000004 /* EMC_WDV */
2657				0x00000006 /* EMC_QUSE */
2658				0x00000004 /* EMC_QRST */
2659				0x0000000a /* EMC_QSAFE */
2660				0x0000000c /* EMC_RDV */
2661				0x00000bf0 /* EMC_REFRESH */
2662				0x00000000 /* EMC_BURST_REFRESH_NUM */
2663				0x000002fc /* EMC_PRE_REFRESH_REQ_CNT */
2664				0x00000001 /* EMC_PDEX2WR */
2665				0x00000008 /* EMC_PDEX2RD */
2666				0x00000001 /* EMC_PCHG2PDEN */
2667				0x00000000 /* EMC_ACT2PDEN */
2668				0x00000008 /* EMC_AR2PDEN */
2669				0x0000000f /* EMC_RW2PDEN */
2670				0x0000007c /* EMC_TXSR */
2671				0x00000200 /* EMC_TXSRDLL */
2672				0x00000004 /* EMC_TCKE */
2673				0x00000010 /* EMC_TFAW */
2674				0x00000000 /* EMC_TRPAB */
2675				0x00000004 /* EMC_TCLKSTABLE */
2676				0x00000005 /* EMC_TCLKSTOP */
2677				0x00000c30 /* EMC_TREFBW */
2678				0x00000000 /* EMC_QUSE_EXTRA */
2679				0x00000004 /* EMC_FBIO_CFG6 */
2680				0x00000000 /* EMC_ODT_WRITE */
2681				0x00000000 /* EMC_ODT_READ */
2682				0x00007088 /* EMC_FBIO_CFG5 */
2683				0x001d0084 /* EMC_CFG_DIG_DLL */
2684				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2685				0x00044000 /* EMC_DLL_XFORM_DQS0 */
2686				0x00044000 /* EMC_DLL_XFORM_DQS1 */
2687				0x00044000 /* EMC_DLL_XFORM_DQS2 */
2688				0x00044000 /* EMC_DLL_XFORM_DQS3 */
2689				0x00044000 /* EMC_DLL_XFORM_DQS4 */
2690				0x00044000 /* EMC_DLL_XFORM_DQS5 */
2691				0x00044000 /* EMC_DLL_XFORM_DQS6 */
2692				0x00044000 /* EMC_DLL_XFORM_DQS7 */
2693				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2694				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2695				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2696				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2697				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2698				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2699				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2700				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2701				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2702				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2703				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2704				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2705				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2706				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2707				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2708				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2709				0x00058000 /* EMC_DLL_XFORM_DQ0 */
2710				0x00058000 /* EMC_DLL_XFORM_DQ1 */
2711				0x00058000 /* EMC_DLL_XFORM_DQ2 */
2712				0x00058000 /* EMC_DLL_XFORM_DQ3 */
2713				0x000002a0 /* EMC_XM2CMDPADCTRL */
2714				0x0800013d /* EMC_XM2DQSPADCTRL2 */
2715				0x00000000 /* EMC_XM2DQPADCTRL2 */
2716				0x77fff884 /* EMC_XM2CLKPADCTRL */
2717				0x01f1f508 /* EMC_XM2COMPPADCTRL */
2718				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2719				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2720				0x080001e8 /* EMC_XM2QUSEPADCTRL */
2721				0x08000021 /* EMC_XM2DQSPADCTRL3 */
2722				0x00000802 /* EMC_CTT_TERM_CTRL */
2723				0x00020000 /* EMC_ZCAL_INTERVAL */
2724				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2725				0x0148000c /* EMC_MRS_WAIT_CNT */
2726				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2727				0x00000000 /* EMC_CTT */
2728				0x00000000 /* EMC_CTT_DURATION */
2729				0x800018c8 /* EMC_DYN_SELF_REF_CONTROL */
2730				0xe8000000 /* EMC_FBIO_SPARE */
2731				0xff00ff89 /* EMC_CFG_RSV */
2732			>;
2733		};
2734		timing-800000000 {
2735			clock-frequency = <800000000>;
2736			nvidia,emc-auto-cal-interval = <0x001fffff>;
2737			nvidia,emc-mode-1 = <0x80100002>;
2738			nvidia,emc-mode-2 = <0x80200018>;
2739			nvidia,emc-mode-reset = <0x80000d71>;
2740			nvidia,emc-zcal-cnt-long = <0x00000040>;
2741			nvidia,emc-cfg-periodic-qrst;
2742			nvidia,emc-configuration = <
2743				0x00000025 /* EMC_RC */
2744				0x000000ee /* EMC_RFC */
2745				0x0000001a /* EMC_RAS */
2746				0x00000009 /* EMC_RP */
2747				0x00000005 /* EMC_R2W */
2748				0x0000000d /* EMC_W2R */
2749				0x00000004 /* EMC_R2P */
2750				0x00000013 /* EMC_W2P */
2751				0x00000009 /* EMC_RD_RCD */
2752				0x00000009 /* EMC_WR_RCD */
2753				0x00000003 /* EMC_RRD */
2754				0x00000001 /* EMC_REXT */
2755				0x00000000 /* EMC_WEXT */
2756				0x00000007 /* EMC_WDV */
2757				0x0000000a /* EMC_QUSE */
2758				0x00000009 /* EMC_QRST */
2759				0x0000000b /* EMC_QSAFE */
2760				0x00000011 /* EMC_RDV */
2761				0x00001820 /* EMC_REFRESH */
2762				0x00000000 /* EMC_BURST_REFRESH_NUM */
2763				0x00000608 /* EMC_PRE_REFRESH_REQ_CNT */
2764				0x00000003 /* EMC_PDEX2WR */
2765				0x00000012 /* EMC_PDEX2RD */
2766				0x00000001 /* EMC_PCHG2PDEN */
2767				0x00000000 /* EMC_ACT2PDEN */
2768				0x0000000f /* EMC_AR2PDEN */
2769				0x00000018 /* EMC_RW2PDEN */
2770				0x000000f8 /* EMC_TXSR */
2771				0x00000200 /* EMC_TXSRDLL */
2772				0x00000005 /* EMC_TCKE */
2773				0x00000020 /* EMC_TFAW */
2774				0x00000000 /* EMC_TRPAB */
2775				0x00000007 /* EMC_TCLKSTABLE */
2776				0x00000008 /* EMC_TCLKSTOP */
2777				0x00001860 /* EMC_TREFBW */
2778				0x0000000b /* EMC_QUSE_EXTRA */
2779				0x00000006 /* EMC_FBIO_CFG6 */
2780				0x00000000 /* EMC_ODT_WRITE */
2781				0x00000000 /* EMC_ODT_READ */
2782				0x00005088 /* EMC_FBIO_CFG5 */
2783				0xf0070191 /* EMC_CFG_DIG_DLL */
2784				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2785				0x0000000c /* EMC_DLL_XFORM_DQS0 */
2786				0x007fc00a /* EMC_DLL_XFORM_DQS1 */
2787				0x00000008 /* EMC_DLL_XFORM_DQS2 */
2788				0x0000000a /* EMC_DLL_XFORM_DQS3 */
2789				0x0000000a /* EMC_DLL_XFORM_DQS4 */
2790				0x0000000a /* EMC_DLL_XFORM_DQS5 */
2791				0x0000000a /* EMC_DLL_XFORM_DQS6 */
2792				0x0000000a /* EMC_DLL_XFORM_DQS7 */
2793				0x00018000 /* EMC_DLL_XFORM_QUSE0 */
2794				0x00018000 /* EMC_DLL_XFORM_QUSE1 */
2795				0x00018000 /* EMC_DLL_XFORM_QUSE2 */
2796				0x00018000 /* EMC_DLL_XFORM_QUSE3 */
2797				0x00018000 /* EMC_DLL_XFORM_QUSE4 */
2798				0x00018000 /* EMC_DLL_XFORM_QUSE5 */
2799				0x00018000 /* EMC_DLL_XFORM_QUSE6 */
2800				0x00018000 /* EMC_DLL_XFORM_QUSE7 */
2801				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2802				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2803				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2804				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2805				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2806				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2807				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2808				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2809				0x0000000a /* EMC_DLL_XFORM_DQ0 */
2810				0x0000000c /* EMC_DLL_XFORM_DQ1 */
2811				0x0000000a /* EMC_DLL_XFORM_DQ2 */
2812				0x0000000a /* EMC_DLL_XFORM_DQ3 */
2813				0x000002a0 /* EMC_XM2CMDPADCTRL */
2814				0x0600013d /* EMC_XM2DQSPADCTRL2 */
2815				0x22220000 /* EMC_XM2DQPADCTRL2 */
2816				0x77fff884 /* EMC_XM2CLKPADCTRL */
2817				0x01f1f501 /* EMC_XM2COMPPADCTRL */
2818				0x07077404 /* EMC_XM2VTTGENPADCTRL */
2819				0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
2820				0x080001e8 /* EMC_XM2QUSEPADCTRL */
2821				0x0a000021 /* EMC_XM2DQSPADCTRL3 */
2822				0x00000802 /* EMC_CTT_TERM_CTRL */
2823				0x00020000 /* EMC_ZCAL_INTERVAL */
2824				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2825				0x00d0000c /* EMC_MRS_WAIT_CNT */
2826				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2827				0x00000000 /* EMC_CTT */
2828				0x00000000 /* EMC_CTT_DURATION */
2829				0x8000308c /* EMC_DYN_SELF_REF_CONTROL */
2830				0xe8000000 /* EMC_FBIO_SPARE */
2831				0xff00ff49 /* EMC_CFG_RSV */
2832			>;
2833		};
2834	};
2835};
2836&state_default {
2837	clk_32k_out_pa0 {
2838		nvidia,pins = "clk_32k_out_pa0";
2839		nvidia,function = "blink";
2840		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2841		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2842		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2843	};
2844	uart3_cts_n_pa1 {
2845		nvidia,pins = "uart3_cts_n_pa1";
2846		nvidia,function = "uartc";
2847		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2848		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2849		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2850	};
2851	dap2_fs_pa2 {
2852		nvidia,pins = "dap2_fs_pa2";
2853		nvidia,function = "i2s1";
2854		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2855		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2856		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2857	};
2858	dap2_sclk_pa3 {
2859		nvidia,pins = "dap2_sclk_pa3";
2860		nvidia,function = "i2s1";
2861		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2862		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2863		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2864	};
2865	dap2_din_pa4 {
2866		nvidia,pins = "dap2_din_pa4";
2867		nvidia,function = "i2s1";
2868		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2869		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2870		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2871	};
2872	dap2_dout_pa5 {
2873		nvidia,pins = "dap2_dout_pa5";
2874		nvidia,function = "i2s1";
2875		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2876		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2877		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2878	};
2879	sdmmc3_clk_pa6 {
2880		nvidia,pins = "sdmmc3_clk_pa6";
2881		nvidia,function = "sdmmc3";
2882		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2883		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2884		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2885	};
2886	sdmmc3_cmd_pa7 {
2887		nvidia,pins = "sdmmc3_cmd_pa7";
2888		nvidia,function = "sdmmc3";
2889		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2890		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2891		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2892	};
2893	gmi_a17_pb0 {
2894		nvidia,pins = "gmi_a17_pb0";
2895		nvidia,function = "spi4";
2896		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2897		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2898		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2899	};
2900	gmi_a18_pb1 {
2901		nvidia,pins = "gmi_a18_pb1";
2902		nvidia,function = "spi4";
2903		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2904		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2905		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2906	};
2907	lcd_pwr0_pb2 {
2908		nvidia,pins = "lcd_pwr0_pb2";
2909		nvidia,function = "displaya";
2910		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2911		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2912		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2913	};
2914	lcd_pclk_pb3 {
2915		nvidia,pins = "lcd_pclk_pb3";
2916		nvidia,function = "displaya";
2917		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2918		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2919		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2920	};
2921	sdmmc3_dat3_pb4 {
2922		nvidia,pins = "sdmmc3_dat3_pb4";
2923		nvidia,function = "sdmmc3";
2924		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2925		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2926		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2927	};
2928	sdmmc3_dat2_pb5 {
2929		nvidia,pins = "sdmmc3_dat2_pb5";
2930		nvidia,function = "sdmmc3";
2931		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2932		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2933		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2934	};
2935	sdmmc3_dat1_pb6 {
2936		nvidia,pins = "sdmmc3_dat1_pb6";
2937		nvidia,function = "sdmmc3";
2938		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2939		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2940		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2941	};
2942	sdmmc3_dat0_pb7 {
2943		nvidia,pins = "sdmmc3_dat0_pb7";
2944		nvidia,function = "sdmmc3";
2945		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2946		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2947		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2948	};
2949	uart3_rts_n_pc0 {
2950		nvidia,pins = "uart3_rts_n_pc0";
2951		nvidia,function = "uartc";
2952		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2953		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2954		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2955	};
2956	lcd_pwr1_pc1 {
2957		nvidia,pins = "lcd_pwr1_pc1";
2958		nvidia,function = "displaya";
2959		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2960		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2961		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2962	};
2963	uart2_txd_pc2 {
2964		nvidia,pins = "uart2_txd_pc2";
2965		nvidia,function = "uartb";
2966		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2967		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2968		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2969	};
2970	uart2_rxd_pc3 {
2971		nvidia,pins = "uart2_rxd_pc3";
2972		nvidia,function = "uartb";
2973		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2974		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2975		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2976	};
2977	gen1_i2c_scl_pc4 {
2978		nvidia,pins = "gen1_i2c_scl_pc4";
2979		nvidia,function = "i2c1";
2980		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2981		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2982		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2983		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
2984	};
2985	gen1_i2c_sda_pc5 {
2986		nvidia,pins = "gen1_i2c_sda_pc5";
2987		nvidia,function = "i2c1";
2988		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2989		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2990		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2991		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
2992	};
2993	lcd_pwr2_pc6 {
2994		nvidia,pins = "lcd_pwr2_pc6";
2995		nvidia,function = "displaya";
2996		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2997		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2998		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2999	};
3000	gmi_wp_n_pc7 {
3001		nvidia,pins = "gmi_wp_n_pc7";
3002		nvidia,function = "gmi";
3003		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3004		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3005		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3006	};
3007	sdmmc3_dat5_pd0 {
3008		nvidia,pins = "sdmmc3_dat5_pd0";
3009		nvidia,function = "sdmmc3";
3010		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3011		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3012		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3013	};
3014	sdmmc3_dat4_pd1 {
3015		nvidia,pins = "sdmmc3_dat4_pd1";
3016		nvidia,function = "sdmmc3";
3017		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3018		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3019		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3020	};
3021	lcd_dc1_pd2 {
3022		nvidia,pins = "lcd_dc1_pd2";
3023		nvidia,function = "displaya";
3024		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3025		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3026		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3027	};
3028	sdmmc3_dat6_pd3 {
3029		nvidia,pins = "sdmmc3_dat6_pd3";
3030		nvidia,function = "spi4";
3031		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3032		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3033		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3034	};
3035	sdmmc3_dat7_pd4 {
3036		nvidia,pins = "sdmmc3_dat7_pd4";
3037		nvidia,function = "spi4";
3038		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3039		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3040		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3041	};
3042	vi_d1_pd5 {
3043		nvidia,pins = "vi_d1_pd5";
3044		nvidia,function = "sdmmc2";
3045		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3046		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3047		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3048	};
3049	vi_vsync_pd6 {
3050		nvidia,pins = "vi_vsync_pd6";
3051		nvidia,function = "ddr";
3052		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3053		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3054		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3055	};
3056	vi_hsync_pd7 {
3057		nvidia,pins = "vi_hsync_pd7";
3058		nvidia,function = "ddr";
3059		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3060		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3061		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3062	};
3063	lcd_d0_pe0 {
3064		nvidia,pins = "lcd_d0_pe0";
3065		nvidia,function = "displaya";
3066		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3067		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3068		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3069	};
3070	lcd_d1_pe1 {
3071		nvidia,pins = "lcd_d1_pe1";
3072		nvidia,function = "displaya";
3073		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3074		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3075		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3076	};
3077	lcd_d2_pe2 {
3078		nvidia,pins = "lcd_d2_pe2";
3079		nvidia,function = "displaya";
3080		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3081		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3082		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3083	};
3084	lcd_d3_pe3 {
3085		nvidia,pins = "lcd_d3_pe3";
3086		nvidia,function = "displaya";
3087		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3088		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3089		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3090	};
3091	lcd_d4_pe4 {
3092		nvidia,pins = "lcd_d4_pe4";
3093		nvidia,function = "displaya";
3094		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3095		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3096		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3097	};
3098	lcd_d5_pe5 {
3099		nvidia,pins = "lcd_d5_pe5";
3100		nvidia,function = "displaya";
3101		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3102		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3103		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3104	};
3105	lcd_d6_pe6 {
3106		nvidia,pins = "lcd_d6_pe6";
3107		nvidia,function = "displaya";
3108		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3109		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3110		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3111	};
3112	lcd_d7_pe7 {
3113		nvidia,pins = "lcd_d7_pe7";
3114		nvidia,function = "displaya";
3115		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3116		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3117		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3118	};
3119	lcd_d8_pf0 {
3120		nvidia,pins = "lcd_d8_pf0";
3121		nvidia,function = "displaya";
3122		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3123		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3124		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3125	};
3126	lcd_d9_pf1 {
3127		nvidia,pins = "lcd_d9_pf1";
3128		nvidia,function = "displaya";
3129		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3130		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3131		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3132	};
3133	lcd_d10_pf2 {
3134		nvidia,pins = "lcd_d10_pf2";
3135		nvidia,function = "displaya";
3136		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3137		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3138		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3139	};
3140	lcd_d11_pf3 {
3141		nvidia,pins = "lcd_d11_pf3";
3142		nvidia,function = "displaya";
3143		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3144		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3145		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3146	};
3147	lcd_d12_pf4 {
3148		nvidia,pins = "lcd_d12_pf4";
3149		nvidia,function = "displaya";
3150		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3151		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3152		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3153	};
3154	lcd_d13_pf5 {
3155		nvidia,pins = "lcd_d13_pf5";
3156		nvidia,function = "displaya";
3157		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3158		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3159		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3160	};
3161	lcd_d14_pf6 {
3162		nvidia,pins = "lcd_d14_pf6";
3163		nvidia,function = "displaya";
3164		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3165		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3166		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3167	};
3168	lcd_d15_pf7 {
3169		nvidia,pins = "lcd_d15_pf7";
3170		nvidia,function = "displaya";
3171		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3172		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3173		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3174	};
3175	gmi_ad0_pg0 {
3176		nvidia,pins = "gmi_ad0_pg0";
3177		nvidia,function = "nand";
3178		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3179		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3180		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3181	};
3182	gmi_ad1_pg1 {
3183		nvidia,pins = "gmi_ad1_pg1";
3184		nvidia,function = "nand";
3185		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3186		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3187		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3188	};
3189	gmi_ad2_pg2 {
3190		nvidia,pins = "gmi_ad2_pg2";
3191		nvidia,function = "nand";
3192		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3193		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3194		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3195	};
3196	gmi_ad3_pg3 {
3197		nvidia,pins = "gmi_ad3_pg3";
3198		nvidia,function = "nand";
3199		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3200		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3201		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3202	};
3203	gmi_ad4_pg4 {
3204		nvidia,pins = "gmi_ad4_pg4";
3205		nvidia,function = "nand";
3206		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3207		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3208		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3209	};
3210	gmi_ad5_pg5 {
3211		nvidia,pins = "gmi_ad5_pg5";
3212		nvidia,function = "nand";
3213		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3214		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3215		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3216	};
3217	gmi_ad6_pg6 {
3218		nvidia,pins = "gmi_ad6_pg6";
3219		nvidia,function = "nand";
3220		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3221		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3222		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3223	};
3224	gmi_ad7_pg7 {
3225		nvidia,pins = "gmi_ad7_pg7";
3226		nvidia,function = "nand";
3227		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3228		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3229		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3230	};
3231	gmi_ad8_ph0 {
3232		nvidia,pins = "gmi_ad8_ph0";
3233		nvidia,function = "pwm0";
3234		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3235		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3236		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3237	};
3238	gmi_ad9_ph1 {
3239		nvidia,pins = "gmi_ad9_ph1";
3240		nvidia,function = "pwm1";
3241		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3242		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3243		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3244	};
3245	gmi_ad10_ph2 {
3246		nvidia,pins = "gmi_ad10_ph2";
3247		nvidia,function = "pwm2";
3248		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3249		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3250		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3251	};
3252	gmi_ad11_ph3 {
3253		nvidia,pins = "gmi_ad11_ph3";
3254		nvidia,function = "nand";
3255		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3256		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3257		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3258	};
3259	gmi_ad12_ph4 {
3260		nvidia,pins = "gmi_ad12_ph4";
3261		nvidia,function = "nand";
3262		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3263		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3264		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3265	};
3266	gmi_ad13_ph5 {
3267		nvidia,pins = "gmi_ad13_ph5";
3268		nvidia,function = "nand";
3269		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3270		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3271		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3272	};
3273	gmi_ad14_ph6 {
3274		nvidia,pins = "gmi_ad14_ph6";
3275		nvidia,function = "nand";
3276		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3277		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3278		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3279	};
3280	gmi_wr_n_pi0 {
3281		nvidia,pins = "gmi_wr_n_pi0";
3282		nvidia,function = "nand";
3283		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3284		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3285		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3286	};
3287	gmi_oe_n_pi1 {
3288		nvidia,pins = "gmi_oe_n_pi1";
3289		nvidia,function = "nand";
3290		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3291		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3292		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3293	};
3294	gmi_dqs_pi2 {
3295		nvidia,pins = "gmi_dqs_pi2";
3296		nvidia,function = "nand";
3297		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3298		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3299		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3300	};
3301	gmi_iordy_pi5 {
3302		nvidia,pins = "gmi_iordy_pi5";
3303		nvidia,function = "rsvd1";
3304		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3305		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3306		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3307	};
3308	gmi_cs7_n_pi6 {
3309		nvidia,pins = "gmi_cs7_n_pi6";
3310		nvidia,function = "nand";
3311		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3312		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3313		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3314	};
3315	gmi_wait_pi7 {
3316		nvidia,pins = "gmi_wait_pi7";
3317		nvidia,function = "nand";
3318		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3319		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3320		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3321	};
3322	lcd_de_pj1 {
3323		nvidia,pins = "lcd_de_pj1";
3324		nvidia,function = "displaya";
3325		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3326		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3327		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3328	};
3329	gmi_cs1_n_pj2 {
3330		nvidia,pins = "gmi_cs1_n_pj2";
3331		nvidia,function = "rsvd1";
3332		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3333		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3334		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3335	};
3336	lcd_hsync_pj3 {
3337		nvidia,pins = "lcd_hsync_pj3";
3338		nvidia,function = "displaya";
3339		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3340		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3341		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3342	};
3343	lcd_vsync_pj4 {
3344		nvidia,pins = "lcd_vsync_pj4";
3345		nvidia,function = "displaya";
3346		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3347		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3348		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3349	};
3350	uart2_cts_n_pj5 {
3351		nvidia,pins = "uart2_cts_n_pj5";
3352		nvidia,function = "uartb";
3353		nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
3354		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3355		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3356	};
3357	uart2_rts_n_pj6 {
3358		nvidia,pins = "uart2_rts_n_pj6";
3359		nvidia,function = "uartb";
3360		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3361		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3362		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3363	};
3364	gmi_a16_pj7 {
3365		nvidia,pins = "gmi_a16_pj7";
3366		nvidia,function = "spi4";
3367		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3368		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3369		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3370	};
3371	gmi_adv_n_pk0 {
3372		nvidia,pins = "gmi_adv_n_pk0";
3373		nvidia,function = "nand";
3374		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3375		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3376		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3377	};
3378	gmi_clk_pk1 {
3379		nvidia,pins = "gmi_clk_pk1";
3380		nvidia,function = "nand";
3381		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3382		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3383		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3384	};
3385	gmi_cs2_n_pk3 {
3386		nvidia,pins = "gmi_cs2_n_pk3";
3387		nvidia,function = "rsvd1";
3388		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3389		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3390		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3391	};
3392	gmi_cs3_n_pk4 {
3393		nvidia,pins = "gmi_cs3_n_pk4";
3394		nvidia,function = "nand";
3395		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3396		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3397		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3398	};
3399	spdif_out_pk5 {
3400		nvidia,pins = "spdif_out_pk5";
3401		nvidia,function = "spdif";
3402		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3403		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3404		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3405	};
3406	spdif_in_pk6 {
3407		nvidia,pins = "spdif_in_pk6";
3408		nvidia,function = "spdif";
3409		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3410		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3411		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3412	};
3413	gmi_a19_pk7 {
3414		nvidia,pins = "gmi_a19_pk7";
3415		nvidia,function = "spi4";
3416		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3417		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3418		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3419	};
3420	vi_d2_pl0 {
3421		nvidia,pins = "vi_d2_pl0";
3422		nvidia,function = "sdmmc2";
3423		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3424		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3425		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3426	};
3427	vi_d3_pl1 {
3428		nvidia,pins = "vi_d3_pl1";
3429		nvidia,function = "sdmmc2";
3430		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3431		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3432		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3433	};
3434	vi_d4_pl2 {
3435		nvidia,pins = "vi_d4_pl2";
3436		nvidia,function = "vi";
3437		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3438		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3439		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3440	};
3441	vi_d5_pl3 {
3442		nvidia,pins = "vi_d5_pl3";
3443		nvidia,function = "sdmmc2";
3444		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3445		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3446		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3447	};
3448	vi_d6_pl4 {
3449		nvidia,pins = "vi_d6_pl4";
3450		nvidia,function = "vi";
3451		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3452		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3453		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3454	};
3455	vi_d7_pl5 {
3456		nvidia,pins = "vi_d7_pl5";
3457		nvidia,function = "sdmmc2";
3458		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3459		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3460		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3461	};
3462	vi_d8_pl6 {
3463		nvidia,pins = "vi_d8_pl6";
3464		nvidia,function = "sdmmc2";
3465		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3466		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3467		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3468	};
3469	vi_d9_pl7 {
3470		nvidia,pins = "vi_d9_pl7";
3471		nvidia,function = "sdmmc2";
3472		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3473		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3474		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3475	};
3476	lcd_d16_pm0 {
3477		nvidia,pins = "lcd_d16_pm0";
3478		nvidia,function = "displaya";
3479		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3480		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3481		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3482	};
3483	lcd_d17_pm1 {
3484		nvidia,pins = "lcd_d17_pm1";
3485		nvidia,function = "displaya";
3486		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3487		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3488		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3489	};
3490	lcd_d18_pm2 {
3491		nvidia,pins = "lcd_d18_pm2";
3492		nvidia,function = "displaya";
3493		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3494		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3495		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3496	};
3497	lcd_d19_pm3 {
3498		nvidia,pins = "lcd_d19_pm3";
3499		nvidia,function = "displaya";
3500		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3501		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3502		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3503	};
3504	lcd_d20_pm4 {
3505		nvidia,pins = "lcd_d20_pm4";
3506		nvidia,function = "displaya";
3507		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3508		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3509		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3510	};
3511	lcd_d21_pm5 {
3512		nvidia,pins = "lcd_d21_pm5";
3513		nvidia,function = "displaya";
3514		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3515		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3516		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3517	};
3518	lcd_d22_pm6 {
3519		nvidia,pins = "lcd_d22_pm6";
3520		nvidia,function = "displaya";
3521		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3522		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3523		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3524	};
3525	lcd_d23_pm7 {
3526		nvidia,pins = "lcd_d23_pm7";
3527		nvidia,function = "displaya";
3528		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3529		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3530		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3531	};
3532	dap1_fs_pn0 {
3533		nvidia,pins = "dap1_fs_pn0";
3534		nvidia,function = "i2s0";
3535		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3536		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3537		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3538	};
3539	dap1_din_pn1 {
3540		nvidia,pins = "dap1_din_pn1";
3541		nvidia,function = "i2s0";
3542		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3543		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3544		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3545	};
3546	dap1_dout_pn2 {
3547		nvidia,pins = "dap1_dout_pn2";
3548		nvidia,function = "i2s0";
3549		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3550		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3551		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3552	};
3553	dap1_sclk_pn3 {
3554		nvidia,pins = "dap1_sclk_pn3";
3555		nvidia,function = "i2s0";
3556		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3557		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3558		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3559	};
3560	lcd_cs0_n_pn4 {
3561		nvidia,pins = "lcd_cs0_n_pn4";
3562		nvidia,function = "displaya";
3563		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3564		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3565		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3566	};
3567	lcd_sdout_pn5 {
3568		nvidia,pins = "lcd_sdout_pn5";
3569		nvidia,function = "displaya";
3570		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3571		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3572		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3573	};
3574	lcd_dc0_pn6 {
3575		nvidia,pins = "lcd_dc0_pn6";
3576		nvidia,function = "displaya";
3577		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3578		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3579		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3580	};
3581	hdmi_int_pn7 {
3582		nvidia,pins = "hdmi_int_pn7";
3583		nvidia,function = "hdmi";
3584		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3585		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3586		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3587	};
3588	ulpi_data7_po0 {
3589		nvidia,pins = "ulpi_data7_po0";
3590		nvidia,function = "uarta";
3591		nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
3592		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3593		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3594	};
3595	ulpi_data0_po1 {
3596		nvidia,pins = "ulpi_data0_po1";
3597		nvidia,function = "uarta";
3598		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3599		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3600		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3601	};
3602	ulpi_data1_po2 {
3603		nvidia,pins = "ulpi_data1_po2";
3604		nvidia,function = "uarta";
3605		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3606		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3607		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3608	};
3609	ulpi_data2_po3 {
3610		nvidia,pins = "ulpi_data2_po3";
3611		nvidia,function = "uarta";
3612		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3613		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3614		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3615	};
3616	ulpi_data3_po4 {
3617		nvidia,pins = "ulpi_data3_po4";
3618		nvidia,function = "uarta";
3619		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3620		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3621		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3622	};
3623	ulpi_data4_po5 {
3624		nvidia,pins = "ulpi_data4_po5";
3625		nvidia,function = "uarta";
3626		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3627		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3628		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3629	};
3630	ulpi_data5_po6 {
3631		nvidia,pins = "ulpi_data5_po6";
3632		nvidia,function = "uarta";
3633		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3634		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3635		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3636	};
3637	ulpi_data6_po7 {
3638		nvidia,pins = "ulpi_data6_po7";
3639		nvidia,function = "uarta";
3640		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3641		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3642		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3643	};
3644	dap3_fs_pp0 {
3645		nvidia,pins = "dap3_fs_pp0";
3646		nvidia,function = "i2s2";
3647		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3648		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3649		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3650	};
3651	dap3_din_pp1 {
3652		nvidia,pins = "dap3_din_pp1";
3653		nvidia,function = "i2s2";
3654		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3655		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3656		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3657	};
3658	dap3_dout_pp2 {
3659		nvidia,pins = "dap3_dout_pp2";
3660		nvidia,function = "i2s2";
3661		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3662		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3663		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3664	};
3665	dap3_sclk_pp3 {
3666		nvidia,pins = "dap3_sclk_pp3";
3667		nvidia,function = "i2s2";
3668		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3669		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3670		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3671	};
3672	dap4_fs_pp4 {
3673		nvidia,pins = "dap4_fs_pp4";
3674		nvidia,function = "i2s3";
3675		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3676		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3677		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3678	};
3679	dap4_din_pp5 {
3680		nvidia,pins = "dap4_din_pp5";
3681		nvidia,function = "i2s3";
3682		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3683		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3684		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3685	};
3686	dap4_dout_pp6 {
3687		nvidia,pins = "dap4_dout_pp6";
3688		nvidia,function = "i2s3";
3689		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3690		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3691		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3692	};
3693	dap4_sclk_pp7 {
3694		nvidia,pins = "dap4_sclk_pp7";
3695		nvidia,function = "i2s3";
3696		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3697		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3698		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3699	};
3700	kb_col0_pq0 {
3701		nvidia,pins = "kb_col0_pq0";
3702		nvidia,function = "kbc";
3703		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3704		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3705		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3706	};
3707	kb_col1_pq1 {
3708		nvidia,pins = "kb_col1_pq1";
3709		nvidia,function = "kbc";
3710		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3711		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3712		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3713	};
3714	kb_col2_pq2 {
3715		nvidia,pins = "kb_col2_pq2";
3716		nvidia,function = "kbc";
3717		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3718		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3719		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3720	};
3721	kb_col3_pq3 {
3722		nvidia,pins = "kb_col3_pq3";
3723		nvidia,function = "kbc";
3724		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3725		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3726		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3727	};
3728	kb_col4_pq4 {
3729		nvidia,pins = "kb_col4_pq4";
3730		nvidia,function = "kbc";
3731		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3732		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3733		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3734	};
3735	kb_col5_pq5 {
3736		nvidia,pins = "kb_col5_pq5";
3737		nvidia,function = "kbc";
3738		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3739		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3740		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3741	};
3742	kb_col6_pq6 {
3743		nvidia,pins = "kb_col6_pq6";
3744		nvidia,function = "kbc";
3745		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3746		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3747		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3748	};
3749	kb_col7_pq7 {
3750		nvidia,pins = "kb_col7_pq7";
3751		nvidia,function = "kbc";
3752		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3753		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3754		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3755	};
3756	kb_row0_pr0 {
3757		nvidia,pins = "kb_row0_pr0";
3758		nvidia,function = "kbc";
3759		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3760		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3761		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3762	};
3763	kb_row1_pr1 {
3764		nvidia,pins = "kb_row1_pr1";
3765		nvidia,function = "kbc";
3766		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3767		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3768		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3769	};
3770	kb_row2_pr2 {
3771		nvidia,pins = "kb_row2_pr2";
3772		nvidia,function = "kbc";
3773		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3774		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3775		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3776	};
3777	kb_row3_pr3 {
3778		nvidia,pins = "kb_row3_pr3";
3779		nvidia,function = "kbc";
3780		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3781		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3782		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3783	};
3784	kb_row4_pr4 {
3785		nvidia,pins = "kb_row4_pr4";
3786		nvidia,function = "kbc";
3787		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3788		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3789		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3790	};
3791	kb_row5_pr5 {
3792		nvidia,pins = "kb_row5_pr5";
3793		nvidia,function = "kbc";
3794		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3795		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3796		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3797	};
3798	kb_row6_pr6 {
3799		nvidia,pins = "kb_row6_pr6";
3800		nvidia,function = "kbc";
3801		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3802		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3803		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3804	};
3805	kb_row7_pr7 {
3806		nvidia,pins = "kb_row7_pr7";
3807		nvidia,function = "kbc";
3808		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3809		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3810		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3811	};
3812	kb_row8_ps0 {
3813		nvidia,pins = "kb_row8_ps0";
3814		nvidia,function = "kbc";
3815		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3816		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3817		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3818	};
3819	kb_row9_ps1 {
3820		nvidia,pins = "kb_row9_ps1";
3821		nvidia,function = "kbc";
3822		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3823		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3824		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3825	};
3826	kb_row10_ps2 {
3827		nvidia,pins = "kb_row10_ps2";
3828		nvidia,function = "kbc";
3829		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3830		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3831		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3832	};
3833	kb_row11_ps3 {
3834		nvidia,pins = "kb_row11_ps3";
3835		nvidia,function = "kbc";
3836		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3837		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3838		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3839	};
3840	kb_row12_ps4 {
3841		nvidia,pins = "kb_row12_ps4";
3842		nvidia,function = "kbc";
3843		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3844		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3845		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3846	};
3847	kb_row13_ps5 {
3848		nvidia,pins = "kb_row13_ps5";
3849		nvidia,function = "kbc";
3850		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3851		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3852		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3853	};
3854	kb_row14_ps6 {
3855		nvidia,pins = "kb_row14_ps6";
3856		nvidia,function = "kbc";
3857		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3858		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3859		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3860	};
3861	kb_row15_ps7 {
3862		nvidia,pins = "kb_row15_ps7";
3863		nvidia,function = "kbc";
3864		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3865		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3866		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3867	};
3868	vi_pclk_pt0 {
3869		nvidia,pins = "vi_pclk_pt0";
3870		nvidia,function = "rsvd1";
3871		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3872		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3873		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3874	};
3875	vi_mclk_pt1 {
3876		nvidia,pins = "vi_mclk_pt1";
3877		nvidia,function = "vi";
3878		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3879		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3880		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3881	};
3882	vi_d10_pt2 {
3883		nvidia,pins = "vi_d10_pt2";
3884		nvidia,function = "ddr";
3885		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3886		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3887		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3888	};
3889	vi_d11_pt3 {
3890		nvidia,pins = "vi_d11_pt3";
3891		nvidia,function = "ddr";
3892		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3893		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3894		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3895	};
3896	vi_d0_pt4 {
3897		nvidia,pins = "vi_d0_pt4";
3898		nvidia,function = "ddr";
3899		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3900		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3901		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3902	};
3903	gen2_i2c_scl_pt5 {
3904		nvidia,pins = "gen2_i2c_scl_pt5";
3905		nvidia,function = "i2c2";
3906		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3907		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3908		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3909		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
3910	};
3911	gen2_i2c_sda_pt6 {
3912		nvidia,pins = "gen2_i2c_sda_pt6";
3913		nvidia,function = "i2c2";
3914		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3915		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3916		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3917		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
3918	};
3919	sdmmc4_cmd_pt7 {
3920		nvidia,pins = "sdmmc4_cmd_pt7";
3921		nvidia,function = "sdmmc4";
3922		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3923		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3924		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3925		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
3926	};
3927	pu0 {
3928		nvidia,pins = "pu0";
3929		nvidia,function = "owr";
3930		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3931		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3932		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3933	};
3934	pu1 {
3935		nvidia,pins = "pu1";
3936		nvidia,function = "rsvd1";
3937		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3938		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3939		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3940	};
3941	pu2 {
3942		nvidia,pins = "pu2";
3943		nvidia,function = "rsvd1";
3944		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3945		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3946		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3947	};
3948	pu3 {
3949		nvidia,pins = "pu3";
3950		nvidia,function = "pwm0";
3951		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3952		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3953		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3954	};
3955	pu4 {
3956		nvidia,pins = "pu4";
3957		nvidia,function = "pwm1";
3958		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3959		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3960		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3961	};
3962	pu5 {
3963		nvidia,pins = "pu5";
3964		nvidia,function = "rsvd4";
3965		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3966		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3967		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3968	};
3969	pu6 {
3970		nvidia,pins = "pu6";
3971		nvidia,function = "pwm3";
3972		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3973		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3974		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3975	};
3976	jtag_rtck_pu7 {
3977		nvidia,pins = "jtag_rtck_pu7";
3978		nvidia,function = "rtck";
3979		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3980		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3981		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3982	};
3983	pv0 {
3984		nvidia,pins = "pv0";
3985		nvidia,function = "rsvd1";
3986		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3987		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3988		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3989	};
3990	pv1 {
3991		nvidia,pins = "pv1";
3992		nvidia,function = "rsvd1";
3993		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3994		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3995		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3996	};
3997	pv2 {
3998		nvidia,pins = "pv2";
3999		nvidia,function = "owr";
4000		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4001		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4002		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4003	};
4004	pv3 {
4005		nvidia,pins = "pv3";
4006		nvidia,function = "clk_12m_out";
4007		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4008		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4009		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4010	};
4011	ddc_scl_pv4 {
4012		nvidia,pins = "ddc_scl_pv4";
4013		nvidia,function = "i2c4";
4014		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4015		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4016		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4017	};
4018	ddc_sda_pv5 {
4019		nvidia,pins = "ddc_sda_pv5";
4020		nvidia,function = "i2c4";
4021		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4022		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4023		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4024	};
4025	crt_hsync_pv6 {
4026		nvidia,pins = "crt_hsync_pv6";
4027		nvidia,function = "crt";
4028		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4029		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4030		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4031	};
4032	crt_vsync_pv7 {
4033		nvidia,pins = "crt_vsync_pv7";
4034		nvidia,function = "crt";
4035		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4036		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4037		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4038	};
4039	lcd_cs1_n_pw0 {
4040		nvidia,pins = "lcd_cs1_n_pw0";
4041		nvidia,function = "displaya";
4042		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4043		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4044		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4045	};
4046	lcd_m1_pw1 {
4047		nvidia,pins = "lcd_m1_pw1";
4048		nvidia,function = "displaya";
4049		nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
4050		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4051		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4052	};
4053	spi2_cs1_n_pw2 {
4054		nvidia,pins = "spi2_cs1_n_pw2";
4055		nvidia,function = "spi2";
4056		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4057		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4058		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4059	};
4060	clk1_out_pw4 {
4061		nvidia,pins = "clk1_out_pw4";
4062		nvidia,function = "extperiph1";
4063		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4064		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4065		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4066	};
4067	clk2_out_pw5 {
4068		nvidia,pins = "clk2_out_pw5";
4069		nvidia,function = "extperiph2";
4070		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4071		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4072		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4073	};
4074	uart3_txd_pw6 {
4075		nvidia,pins = "uart3_txd_pw6";
4076		nvidia,function = "uartc";
4077		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4078		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4079		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4080	};
4081	uart3_rxd_pw7 {
4082		nvidia,pins = "uart3_rxd_pw7";
4083		nvidia,function = "uartc";
4084		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4085		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4086		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4087	};
4088	spi2_sck_px2 {
4089		nvidia,pins = "spi2_sck_px2";
4090		nvidia,function = "gmi";
4091		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4092		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4093		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4094	};
4095	spi1_mosi_px4 {
4096		nvidia,pins = "spi1_mosi_px4";
4097		nvidia,function = "spi1";
4098		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4099		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4100		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4101	};
4102	spi1_sck_px5 {
4103		nvidia,pins = "spi1_sck_px5";
4104		nvidia,function = "spi1";
4105		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4106		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4107		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4108	};
4109	spi1_cs0_n_px6 {
4110		nvidia,pins = "spi1_cs0_n_px6";
4111		nvidia,function = "spi1";
4112		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4113		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4114		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4115	};
4116	spi1_miso_px7 {
4117		nvidia,pins = "spi1_miso_px7";
4118		nvidia,function = "spi1";
4119		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4120		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4121		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4122	};
4123	ulpi_clk_py0 {
4124		nvidia,pins = "ulpi_clk_py0";
4125		nvidia,function = "uartd";
4126		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4127		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4128		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4129	};
4130	ulpi_dir_py1 {
4131		nvidia,pins = "ulpi_dir_py1";
4132		nvidia,function = "uartd";
4133		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4134		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4135		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4136	};
4137	ulpi_nxt_py2 {
4138		nvidia,pins = "ulpi_nxt_py2";
4139		nvidia,function = "uartd";
4140		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4141		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4142		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4143	};
4144	ulpi_stp_py3 {
4145		nvidia,pins = "ulpi_stp_py3";
4146		nvidia,function = "uartd";
4147		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4148		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4149		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4150	};
4151	sdmmc1_dat3_py4 {
4152		nvidia,pins = "sdmmc1_dat3_py4";
4153		nvidia,function = "sdmmc1";
4154		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4155		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4156		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4157	};
4158	sdmmc1_dat2_py5 {
4159		nvidia,pins = "sdmmc1_dat2_py5";
4160		nvidia,function = "sdmmc1";
4161		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4162		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4163		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4164	};
4165	sdmmc1_dat1_py6 {
4166		nvidia,pins = "sdmmc1_dat1_py6";
4167		nvidia,function = "sdmmc1";
4168		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4169		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4170		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4171	};
4172	sdmmc1_dat0_py7 {
4173		nvidia,pins = "sdmmc1_dat0_py7";
4174		nvidia,function = "sdmmc1";
4175		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4176		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4177		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4178	};
4179	sdmmc1_clk_pz0 {
4180		nvidia,pins = "sdmmc1_clk_pz0";
4181		nvidia,function = "sdmmc1";
4182		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4183		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4184		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4185	};
4186	sdmmc1_cmd_pz1 {
4187		nvidia,pins = "sdmmc1_cmd_pz1";
4188		nvidia,function = "sdmmc1";
4189		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4190		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4191		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4192	};
4193	lcd_sdin_pz2 {
4194		nvidia,pins = "lcd_sdin_pz2";
4195		nvidia,function = "displaya";
4196		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4197		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4198		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4199	};
4200	lcd_wr_n_pz3 {
4201		nvidia,pins = "lcd_wr_n_pz3";
4202		nvidia,function = "displaya";
4203		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4204		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4205		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4206	};
4207	lcd_sck_pz4 {
4208		nvidia,pins = "lcd_sck_pz4";
4209		nvidia,function = "displaya";
4210		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4211		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4212		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4213	};
4214	sys_clk_req_pz5 {
4215		nvidia,pins = "sys_clk_req_pz5";
4216		nvidia,function = "sysclk";
4217		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4218		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4219		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4220	};
4221	pwr_i2c_scl_pz6 {
4222		nvidia,pins = "pwr_i2c_scl_pz6";
4223		nvidia,function = "i2cpwr";
4224		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4225		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4226		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4227		nvidia,open-drain = <TEGRA_PIN_ENABLE>;
4228	};
4229	pwr_i2c_sda_pz7 {
4230		nvidia,pins = "pwr_i2c_sda_pz7";
4231		nvidia,function = "i2cpwr";
4232		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4233		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4234		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4235		nvidia,open-drain = <TEGRA_PIN_ENABLE>;
4236	};
4237	sdmmc4_dat0_paa0 {
4238		nvidia,pins = "sdmmc4_dat0_paa0";
4239		nvidia,function = "sdmmc4";
4240		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4241		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4242		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4243		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4244	};
4245	sdmmc4_dat1_paa1 {
4246		nvidia,pins = "sdmmc4_dat1_paa1";
4247		nvidia,function = "sdmmc4";
4248		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4249		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4250		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4251		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4252	};
4253	sdmmc4_dat2_paa2 {
4254		nvidia,pins = "sdmmc4_dat2_paa2";
4255		nvidia,function = "sdmmc4";
4256		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4257		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4258		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4259		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4260	};
4261	sdmmc4_dat3_paa3 {
4262		nvidia,pins = "sdmmc4_dat3_paa3";
4263		nvidia,function = "sdmmc4";
4264		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4265		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4266		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4267		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4268	};
4269	sdmmc4_dat4_paa4 {
4270		nvidia,pins = "sdmmc4_dat4_paa4";
4271		nvidia,function = "sdmmc4";
4272		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4273		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4274		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4275		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4276	};
4277	sdmmc4_dat5_paa5 {
4278		nvidia,pins = "sdmmc4_dat5_paa5";
4279		nvidia,function = "sdmmc4";
4280		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4281		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4282		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4283		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4284	};
4285	sdmmc4_dat6_paa6 {
4286		nvidia,pins = "sdmmc4_dat6_paa6";
4287		nvidia,function = "sdmmc4";
4288		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4289		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4290		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4291		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4292	};
4293	sdmmc4_dat7_paa7 {
4294		nvidia,pins = "sdmmc4_dat7_paa7";
4295		nvidia,function = "sdmmc4";
4296		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4297		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4298		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4299		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4300	};
4301	pbb0 {
4302		nvidia,pins = "pbb0";
4303		nvidia,function = "i2s4";
4304		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4305		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4306		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4307	};
4308	cam_i2c_scl_pbb1 {
4309		nvidia,pins = "cam_i2c_scl_pbb1";
4310		nvidia,function = "i2c3";
4311		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4312		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4313		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4314		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
4315	};
4316	cam_i2c_sda_pbb2 {
4317		nvidia,pins = "cam_i2c_sda_pbb2";
4318		nvidia,function = "i2c3";
4319		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4320		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4321		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4322		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
4323	};
4324	pbb3 {
4325		nvidia,pins = "pbb3";
4326		nvidia,function = "vgp3";
4327		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4328		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4329		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4330	};
4331	pbb4 {
4332		nvidia,pins = "pbb4";
4333		nvidia,function = "vgp4";
4334		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4335		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4336		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4337	};
4338	pbb5 {
4339		nvidia,pins = "pbb5";
4340		nvidia,function = "vgp5";
4341		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4342		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4343		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4344	};
4345	pbb6 {
4346		nvidia,pins = "pbb6";
4347		nvidia,function = "vgp6";
4348		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4349		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4350		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4351	};
4352	pbb7 {
4353		nvidia,pins = "pbb7";
4354		nvidia,function = "i2s4";
4355		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4356		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4357		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4358	};
4359	cam_mclk_pcc0 {
4360		nvidia,pins = "cam_mclk_pcc0";
4361		nvidia,function = "vi_alt3";
4362		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4363		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4364		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4365	};
4366	pcc1 {
4367		nvidia,pins = "pcc1";
4368		nvidia,function = "i2s4";
4369		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4370		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4371		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4372	};
4373	pcc2 {
4374		nvidia,pins = "pcc2";
4375		nvidia,function = "i2s4";
4376		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4377		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4378		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4379	};
4380	sdmmc4_rst_n_pcc3 {
4381		nvidia,pins = "sdmmc4_rst_n_pcc3";
4382		nvidia,function = "sdmmc4";
4383		nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
4384		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4385		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4386		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4387	};
4388	sdmmc4_clk_pcc4 {
4389		nvidia,pins = "sdmmc4_clk_pcc4";
4390		nvidia,function = "sdmmc4";
4391		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4392		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4393		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4394		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4395	};
4396	clk2_req_pcc5 {
4397		nvidia,pins = "clk2_req_pcc5";
4398		nvidia,function = "dap";
4399		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4400		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4401		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4402	};
4403	pex_l2_rst_n_pcc6 {
4404		nvidia,pins = "pex_l2_rst_n_pcc6";
4405		nvidia,function = "pcie";
4406		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4407		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4408		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4409	};
4410	pex_l2_clkreq_n_pcc7 {
4411		nvidia,pins = "pex_l2_clkreq_n_pcc7";
4412		nvidia,function = "pcie";
4413		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4414		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4415		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4416	};
4417	pex_l0_prsnt_n_pdd0 {
4418		nvidia,pins = "pex_l0_prsnt_n_pdd0";
4419		nvidia,function = "pcie";
4420		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4421		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4422		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4423	};
4424	pex_l0_rst_n_pdd1 {
4425		nvidia,pins = "pex_l0_rst_n_pdd1";
4426		nvidia,function = "pcie";
4427		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4428		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4429		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4430	};
4431	pex_l0_clkreq_n_pdd2 {
4432		nvidia,pins = "pex_l0_clkreq_n_pdd2";
4433		nvidia,function = "pcie";
4434		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4435		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4436		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4437	};
4438	pex_wake_n_pdd3 {
4439		nvidia,pins = "pex_wake_n_pdd3";
4440		nvidia,function = "pcie";
4441		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4442		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4443		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4444	};
4445	pex_l1_prsnt_n_pdd4 {
4446		nvidia,pins = "pex_l1_prsnt_n_pdd4";
4447		nvidia,function = "pcie";
4448		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4449		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4450		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4451	};
4452	pex_l1_rst_n_pdd5 {
4453		nvidia,pins = "pex_l1_rst_n_pdd5";
4454		nvidia,function = "pcie";
4455		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4456		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4457		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4458	};
4459	pex_l1_clkreq_n_pdd6 {
4460		nvidia,pins = "pex_l1_clkreq_n_pdd6";
4461		nvidia,function = "pcie";
4462		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4463		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4464		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4465	};
4466	pex_l2_prsnt_n_pdd7 {
4467		nvidia,pins = "pex_l2_prsnt_n_pdd7";
4468		nvidia,function = "pcie";
4469		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4470		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4471		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4472	};
4473	clk3_out_pee0 {
4474		nvidia,pins = "clk3_out_pee0";
4475		nvidia,function = "extperiph3";
4476		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4477		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4478		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4479	};
4480	clk3_req_pee1 {
4481		nvidia,pins = "clk3_req_pee1";
4482		nvidia,function = "dev3";
4483		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4484		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4485		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4486	};
4487	clk1_req_pee2 {
4488		nvidia,pins = "clk1_req_pee2";
4489		nvidia,function = "dap";
4490		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4491		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4492		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4493	};
4494	hdmi_cec_pee3 {
4495		nvidia,pins = "hdmi_cec_pee3";
4496		nvidia,function = "cec";
4497		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4498		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4499		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4500		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
4501	};
4502	owr {
4503		nvidia,pins = "owr";
4504		nvidia,function = "owr";
4505		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4506		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4507		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4508	};
4509	drive_groups {
4510		nvidia,pins = "drive_gma",
4511			      "drive_gmb",
4512			      "drive_gmc",
4513			      "drive_gmd";
4514		nvidia,pull-down-strength = <9>;
4515		nvidia,pull-up-strength = <9>;
4516		nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
4517		nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
4518	};
4519};
4520
4521&emc_icc_dvfs_opp_table {
4522	/delete-node/ opp@900000000,1350;
4523};
4524
4525&emc_bw_dfs_opp_table {
4526	/delete-node/ opp@900000000;
4527};
4528