1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * corsair-psu.c - Linux driver for Corsair power supplies with HID sensors interface
4  * Copyright (C) 2020 Wilken Gottwalt <wilken.gottwalt@posteo.net>
5  */
6 
7 #include <linux/completion.h>
8 #include <linux/debugfs.h>
9 #include <linux/errno.h>
10 #include <linux/hid.h>
11 #include <linux/hwmon.h>
12 #include <linux/hwmon-sysfs.h>
13 #include <linux/jiffies.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
19 
20 /*
21  * Corsair protocol for PSUs
22  *
23  * message size = 64 bytes (request and response, little endian)
24  * request:
25  *	[length][command][param0][param1][paramX]...
26  * reply:
27  *	[echo of length][echo of command][data0][data1][dataX]...
28  *
29  *	- commands are byte sized opcodes
30  *	- length is the sum of all bytes of the commands/params
31  *	- the micro-controller of most of these PSUs support concatenation in the request and reply,
32  *	  but it is better to not rely on this (it is also hard to parse)
33  *	- the driver uses raw events to be accessible from userspace (though this is not really
34  *	  supported, it is just there for convenience, may be removed in the future)
35  *	- a reply always start with the length and command in the same order the request used it
36  *	- length of the reply data is specific to the command used
37  *	- some of the commands work on a rail and can be switched to a specific rail (0 = 12v,
38  *	  1 = 5v, 2 = 3.3v)
39  *	- the format of the init command 0xFE is swapped length/command bytes
40  *	- parameter bytes amount and values are specific to the command (rail setting is the only
41  *	  for now that uses non-zero values)
42  *	- there are much more commands, especially for configuring the device, but they are not
43  *	  supported because a wrong command/length can lockup the micro-controller
44  *	- the driver supports debugfs for values not fitting into the hwmon class
45  *	- not every device class (HXi, RMi or AXi) supports all commands
46  *	- it is a pure sensors reading driver (will not support configuring)
47  */
48 
49 #define DRIVER_NAME		"corsair-psu"
50 
51 #define REPLY_SIZE		16 /* max length of a reply to a single command */
52 #define CMD_BUFFER_SIZE		64
53 #define CMD_TIMEOUT_MS		250
54 #define SECONDS_PER_HOUR	(60 * 60)
55 #define SECONDS_PER_DAY		(SECONDS_PER_HOUR * 24)
56 #define RAIL_COUNT		3 /* 3v3 + 5v + 12v */
57 #define TEMP_COUNT		2
58 
59 #define PSU_CMD_SELECT_RAIL	0x00 /* expects length 2 */
60 #define PSU_CMD_RAIL_VOLTS_HCRIT 0x40 /* the rest of the commands expect length 3 */
61 #define PSU_CMD_RAIL_VOLTS_LCRIT 0x44
62 #define PSU_CMD_RAIL_AMPS_HCRIT	0x46
63 #define PSU_CMD_TEMP_HCRIT	0x4F
64 #define PSU_CMD_IN_VOLTS	0x88
65 #define PSU_CMD_IN_AMPS		0x89
66 #define PSU_CMD_RAIL_VOLTS	0x8B
67 #define PSU_CMD_RAIL_AMPS	0x8C
68 #define PSU_CMD_TEMP0		0x8D
69 #define PSU_CMD_TEMP1		0x8E
70 #define PSU_CMD_FAN		0x90
71 #define PSU_CMD_RAIL_WATTS	0x96
72 #define PSU_CMD_VEND_STR	0x99
73 #define PSU_CMD_PROD_STR	0x9A
74 #define PSU_CMD_TOTAL_WATTS	0xEE
75 #define PSU_CMD_TOTAL_UPTIME	0xD1
76 #define PSU_CMD_UPTIME		0xD2
77 #define PSU_CMD_INIT		0xFE
78 
79 #define L_IN_VOLTS		"v_in"
80 #define L_OUT_VOLTS_12V		"v_out +12v"
81 #define L_OUT_VOLTS_5V		"v_out +5v"
82 #define L_OUT_VOLTS_3_3V	"v_out +3.3v"
83 #define L_IN_AMPS		"curr in"
84 #define L_AMPS_12V		"curr +12v"
85 #define L_AMPS_5V		"curr +5v"
86 #define L_AMPS_3_3V		"curr +3.3v"
87 #define L_FAN			"psu fan"
88 #define L_TEMP0			"vrm temp"
89 #define L_TEMP1			"case temp"
90 #define L_WATTS			"power total"
91 #define L_WATTS_12V		"power +12v"
92 #define L_WATTS_5V		"power +5v"
93 #define L_WATTS_3_3V		"power +3.3v"
94 
95 static const char *const label_watts[] = {
96 	L_WATTS,
97 	L_WATTS_12V,
98 	L_WATTS_5V,
99 	L_WATTS_3_3V
100 };
101 
102 static const char *const label_volts[] = {
103 	L_IN_VOLTS,
104 	L_OUT_VOLTS_12V,
105 	L_OUT_VOLTS_5V,
106 	L_OUT_VOLTS_3_3V
107 };
108 
109 static const char *const label_amps[] = {
110 	L_IN_AMPS,
111 	L_AMPS_12V,
112 	L_AMPS_5V,
113 	L_AMPS_3_3V
114 };
115 
116 struct corsairpsu_data {
117 	struct hid_device *hdev;
118 	struct device *hwmon_dev;
119 	struct dentry *debugfs;
120 	struct completion wait_completion;
121 	struct mutex lock; /* for locking access to cmd_buffer */
122 	u8 *cmd_buffer;
123 	char vendor[REPLY_SIZE];
124 	char product[REPLY_SIZE];
125 	long temp_crit[TEMP_COUNT];
126 	long in_crit[RAIL_COUNT];
127 	long in_lcrit[RAIL_COUNT];
128 	long curr_crit[RAIL_COUNT];
129 	u8 temp_crit_support;
130 	u8 in_crit_support;
131 	u8 in_lcrit_support;
132 	u8 curr_crit_support;
133 	bool in_curr_cmd_support; /* not all commands are supported on every PSU */
134 };
135 
136 /* some values are SMBus LINEAR11 data which need a conversion */
corsairpsu_linear11_to_int(const u16 val,const int scale)137 static int corsairpsu_linear11_to_int(const u16 val, const int scale)
138 {
139 	const int exp = ((s16)val) >> 11;
140 	const int mant = (((s16)(val & 0x7ff)) << 5) >> 5;
141 	const int result = mant * scale;
142 
143 	return (exp >= 0) ? (result << exp) : (result >> -exp);
144 }
145 
corsairpsu_usb_cmd(struct corsairpsu_data * priv,u8 p0,u8 p1,u8 p2,void * data)146 static int corsairpsu_usb_cmd(struct corsairpsu_data *priv, u8 p0, u8 p1, u8 p2, void *data)
147 {
148 	unsigned long time;
149 	int ret;
150 
151 	memset(priv->cmd_buffer, 0, CMD_BUFFER_SIZE);
152 	priv->cmd_buffer[0] = p0;
153 	priv->cmd_buffer[1] = p1;
154 	priv->cmd_buffer[2] = p2;
155 
156 	reinit_completion(&priv->wait_completion);
157 
158 	ret = hid_hw_output_report(priv->hdev, priv->cmd_buffer, CMD_BUFFER_SIZE);
159 	if (ret < 0)
160 		return ret;
161 
162 	time = wait_for_completion_timeout(&priv->wait_completion,
163 					   msecs_to_jiffies(CMD_TIMEOUT_MS));
164 	if (!time)
165 		return -ETIMEDOUT;
166 
167 	/*
168 	 * at the start of the reply is an echo of the send command/length in the same order it
169 	 * was send, not every command is supported on every device class, if a command is not
170 	 * supported, the length value in the reply is okay, but the command value is set to 0
171 	 */
172 	if (p0 != priv->cmd_buffer[0] || p1 != priv->cmd_buffer[1])
173 		return -EOPNOTSUPP;
174 
175 	if (data)
176 		memcpy(data, priv->cmd_buffer + 2, REPLY_SIZE);
177 
178 	return 0;
179 }
180 
corsairpsu_init(struct corsairpsu_data * priv)181 static int corsairpsu_init(struct corsairpsu_data *priv)
182 {
183 	/*
184 	 * PSU_CMD_INIT uses swapped length/command and expects 2 parameter bytes, this command
185 	 * actually generates a reply, but we don't need it
186 	 */
187 	return corsairpsu_usb_cmd(priv, PSU_CMD_INIT, 3, 0, NULL);
188 }
189 
corsairpsu_fwinfo(struct corsairpsu_data * priv)190 static int corsairpsu_fwinfo(struct corsairpsu_data *priv)
191 {
192 	int ret;
193 
194 	ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_VEND_STR, 0, priv->vendor);
195 	if (ret < 0)
196 		return ret;
197 
198 	ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_PROD_STR, 0, priv->product);
199 	if (ret < 0)
200 		return ret;
201 
202 	return 0;
203 }
204 
corsairpsu_request(struct corsairpsu_data * priv,u8 cmd,u8 rail,void * data)205 static int corsairpsu_request(struct corsairpsu_data *priv, u8 cmd, u8 rail, void *data)
206 {
207 	int ret;
208 
209 	mutex_lock(&priv->lock);
210 	switch (cmd) {
211 	case PSU_CMD_RAIL_VOLTS_HCRIT:
212 	case PSU_CMD_RAIL_VOLTS_LCRIT:
213 	case PSU_CMD_RAIL_AMPS_HCRIT:
214 	case PSU_CMD_RAIL_VOLTS:
215 	case PSU_CMD_RAIL_AMPS:
216 	case PSU_CMD_RAIL_WATTS:
217 		ret = corsairpsu_usb_cmd(priv, 2, PSU_CMD_SELECT_RAIL, rail, NULL);
218 		if (ret < 0)
219 			goto cmd_fail;
220 		break;
221 	default:
222 		break;
223 	}
224 
225 	ret = corsairpsu_usb_cmd(priv, 3, cmd, 0, data);
226 
227 cmd_fail:
228 	mutex_unlock(&priv->lock);
229 	return ret;
230 }
231 
corsairpsu_get_value(struct corsairpsu_data * priv,u8 cmd,u8 rail,long * val)232 static int corsairpsu_get_value(struct corsairpsu_data *priv, u8 cmd, u8 rail, long *val)
233 {
234 	u8 data[REPLY_SIZE];
235 	long tmp;
236 	int ret;
237 
238 	ret = corsairpsu_request(priv, cmd, rail, data);
239 	if (ret < 0)
240 		return ret;
241 
242 	/*
243 	 * the biggest value here comes from the uptime command and to exceed MAXINT total uptime
244 	 * needs to be about 68 years, the rest are u16 values and the biggest value coming out of
245 	 * the LINEAR11 conversion are the watts values which are about 1200 for the strongest psu
246 	 * supported (HX1200i)
247 	 */
248 	tmp = ((long)data[3] << 24) + (data[2] << 16) + (data[1] << 8) + data[0];
249 	switch (cmd) {
250 	case PSU_CMD_RAIL_VOLTS_HCRIT:
251 	case PSU_CMD_RAIL_VOLTS_LCRIT:
252 	case PSU_CMD_RAIL_AMPS_HCRIT:
253 	case PSU_CMD_TEMP_HCRIT:
254 	case PSU_CMD_IN_VOLTS:
255 	case PSU_CMD_IN_AMPS:
256 	case PSU_CMD_RAIL_VOLTS:
257 	case PSU_CMD_RAIL_AMPS:
258 	case PSU_CMD_TEMP0:
259 	case PSU_CMD_TEMP1:
260 		*val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000);
261 		break;
262 	case PSU_CMD_FAN:
263 		*val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
264 		break;
265 	case PSU_CMD_RAIL_WATTS:
266 	case PSU_CMD_TOTAL_WATTS:
267 		*val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000000);
268 		break;
269 	case PSU_CMD_TOTAL_UPTIME:
270 	case PSU_CMD_UPTIME:
271 		*val = tmp;
272 		break;
273 	default:
274 		ret = -EOPNOTSUPP;
275 		break;
276 	}
277 
278 	return ret;
279 }
280 
corsairpsu_get_criticals(struct corsairpsu_data * priv)281 static void corsairpsu_get_criticals(struct corsairpsu_data *priv)
282 {
283 	long tmp;
284 	int rail;
285 
286 	for (rail = 0; rail < TEMP_COUNT; ++rail) {
287 		if (!corsairpsu_get_value(priv, PSU_CMD_TEMP_HCRIT, rail, &tmp)) {
288 			priv->temp_crit_support |= BIT(rail);
289 			priv->temp_crit[rail] = tmp;
290 		}
291 	}
292 
293 	for (rail = 0; rail < RAIL_COUNT; ++rail) {
294 		if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_HCRIT, rail, &tmp)) {
295 			priv->in_crit_support |= BIT(rail);
296 			priv->in_crit[rail] = tmp;
297 		}
298 
299 		if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_LCRIT, rail, &tmp)) {
300 			priv->in_lcrit_support |= BIT(rail);
301 			priv->in_lcrit[rail] = tmp;
302 		}
303 
304 		if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS_HCRIT, rail, &tmp)) {
305 			priv->curr_crit_support |= BIT(rail);
306 			priv->curr_crit[rail] = tmp;
307 		}
308 	}
309 }
310 
corsairpsu_check_cmd_support(struct corsairpsu_data * priv)311 static void corsairpsu_check_cmd_support(struct corsairpsu_data *priv)
312 {
313 	long tmp;
314 
315 	priv->in_curr_cmd_support = !corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, &tmp);
316 }
317 
corsairpsu_hwmon_temp_is_visible(const struct corsairpsu_data * priv,u32 attr,int channel)318 static umode_t corsairpsu_hwmon_temp_is_visible(const struct corsairpsu_data *priv, u32 attr,
319 						int channel)
320 {
321 	umode_t res = 0444;
322 
323 	switch (attr) {
324 	case hwmon_temp_input:
325 	case hwmon_temp_label:
326 	case hwmon_temp_crit:
327 		if (channel > 0 && !(priv->temp_crit_support & BIT(channel - 1)))
328 			res = 0;
329 		break;
330 	default:
331 		break;
332 	}
333 
334 	return res;
335 }
336 
corsairpsu_hwmon_fan_is_visible(const struct corsairpsu_data * priv,u32 attr,int channel)337 static umode_t corsairpsu_hwmon_fan_is_visible(const struct corsairpsu_data *priv, u32 attr,
338 					       int channel)
339 {
340 	switch (attr) {
341 	case hwmon_fan_input:
342 	case hwmon_fan_label:
343 		return 0444;
344 	default:
345 		return 0;
346 	}
347 }
348 
corsairpsu_hwmon_power_is_visible(const struct corsairpsu_data * priv,u32 attr,int channel)349 static umode_t corsairpsu_hwmon_power_is_visible(const struct corsairpsu_data *priv, u32 attr,
350 						 int channel)
351 {
352 	switch (attr) {
353 	case hwmon_power_input:
354 	case hwmon_power_label:
355 		return 0444;
356 	default:
357 		return 0;
358 	}
359 }
360 
corsairpsu_hwmon_in_is_visible(const struct corsairpsu_data * priv,u32 attr,int channel)361 static umode_t corsairpsu_hwmon_in_is_visible(const struct corsairpsu_data *priv, u32 attr,
362 					      int channel)
363 {
364 	umode_t res = 0444;
365 
366 	switch (attr) {
367 	case hwmon_in_input:
368 	case hwmon_in_label:
369 	case hwmon_in_crit:
370 		if (channel > 0 && !(priv->in_crit_support & BIT(channel - 1)))
371 			res = 0;
372 		break;
373 	case hwmon_in_lcrit:
374 		if (channel > 0 && !(priv->in_lcrit_support & BIT(channel - 1)))
375 			res = 0;
376 		break;
377 	default:
378 		break;
379 	}
380 
381 	return res;
382 }
383 
corsairpsu_hwmon_curr_is_visible(const struct corsairpsu_data * priv,u32 attr,int channel)384 static umode_t corsairpsu_hwmon_curr_is_visible(const struct corsairpsu_data *priv, u32 attr,
385 						int channel)
386 {
387 	umode_t res = 0444;
388 
389 	switch (attr) {
390 	case hwmon_curr_input:
391 		if (channel == 0 && !priv->in_curr_cmd_support)
392 			res = 0;
393 		break;
394 	case hwmon_curr_label:
395 	case hwmon_curr_crit:
396 		if (channel > 0 && !(priv->curr_crit_support & BIT(channel - 1)))
397 			res = 0;
398 		break;
399 	default:
400 		break;
401 	}
402 
403 	return res;
404 }
405 
corsairpsu_hwmon_ops_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)406 static umode_t corsairpsu_hwmon_ops_is_visible(const void *data, enum hwmon_sensor_types type,
407 					       u32 attr, int channel)
408 {
409 	const struct corsairpsu_data *priv = data;
410 
411 	switch (type) {
412 	case hwmon_temp:
413 		return corsairpsu_hwmon_temp_is_visible(priv, attr, channel);
414 	case hwmon_fan:
415 		return corsairpsu_hwmon_fan_is_visible(priv, attr, channel);
416 	case hwmon_power:
417 		return corsairpsu_hwmon_power_is_visible(priv, attr, channel);
418 	case hwmon_in:
419 		return corsairpsu_hwmon_in_is_visible(priv, attr, channel);
420 	case hwmon_curr:
421 		return corsairpsu_hwmon_curr_is_visible(priv, attr, channel);
422 	default:
423 		return 0;
424 	}
425 }
426 
corsairpsu_hwmon_temp_read(struct corsairpsu_data * priv,u32 attr,int channel,long * val)427 static int corsairpsu_hwmon_temp_read(struct corsairpsu_data *priv, u32 attr, int channel,
428 				      long *val)
429 {
430 	int err = -EOPNOTSUPP;
431 
432 	switch (attr) {
433 	case hwmon_temp_input:
434 		return corsairpsu_get_value(priv, channel ? PSU_CMD_TEMP1 : PSU_CMD_TEMP0,
435 					    channel, val);
436 	case hwmon_temp_crit:
437 		*val = priv->temp_crit[channel];
438 		err = 0;
439 		break;
440 	default:
441 		break;
442 	}
443 
444 	return err;
445 }
446 
corsairpsu_hwmon_power_read(struct corsairpsu_data * priv,u32 attr,int channel,long * val)447 static int corsairpsu_hwmon_power_read(struct corsairpsu_data *priv, u32 attr, int channel,
448 				       long *val)
449 {
450 	if (attr == hwmon_power_input) {
451 		switch (channel) {
452 		case 0:
453 			return corsairpsu_get_value(priv, PSU_CMD_TOTAL_WATTS, 0, val);
454 		case 1 ... 3:
455 			return corsairpsu_get_value(priv, PSU_CMD_RAIL_WATTS, channel - 1, val);
456 		default:
457 			break;
458 		}
459 	}
460 
461 	return -EOPNOTSUPP;
462 }
463 
corsairpsu_hwmon_in_read(struct corsairpsu_data * priv,u32 attr,int channel,long * val)464 static int corsairpsu_hwmon_in_read(struct corsairpsu_data *priv, u32 attr, int channel, long *val)
465 {
466 	int err = -EOPNOTSUPP;
467 
468 	switch (attr) {
469 	case hwmon_in_input:
470 		switch (channel) {
471 		case 0:
472 			return corsairpsu_get_value(priv, PSU_CMD_IN_VOLTS, 0, val);
473 		case 1 ... 3:
474 			return corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS, channel - 1, val);
475 		default:
476 			break;
477 		}
478 		break;
479 	case hwmon_in_crit:
480 		*val = priv->in_crit[channel - 1];
481 		err = 0;
482 		break;
483 	case hwmon_in_lcrit:
484 		*val = priv->in_lcrit[channel - 1];
485 		err = 0;
486 		break;
487 	}
488 
489 	return err;
490 }
491 
corsairpsu_hwmon_curr_read(struct corsairpsu_data * priv,u32 attr,int channel,long * val)492 static int corsairpsu_hwmon_curr_read(struct corsairpsu_data *priv, u32 attr, int channel,
493 				      long *val)
494 {
495 	int err = -EOPNOTSUPP;
496 
497 	switch (attr) {
498 	case hwmon_curr_input:
499 		switch (channel) {
500 		case 0:
501 			return corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, val);
502 		case 1 ... 3:
503 			return corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS, channel - 1, val);
504 		default:
505 			break;
506 		}
507 		break;
508 	case hwmon_curr_crit:
509 		*val = priv->curr_crit[channel - 1];
510 		err = 0;
511 		break;
512 	default:
513 		break;
514 	}
515 
516 	return err;
517 }
518 
corsairpsu_hwmon_ops_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)519 static int corsairpsu_hwmon_ops_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
520 				     int channel, long *val)
521 {
522 	struct corsairpsu_data *priv = dev_get_drvdata(dev);
523 
524 	switch (type) {
525 	case hwmon_temp:
526 		return corsairpsu_hwmon_temp_read(priv, attr, channel, val);
527 	case hwmon_fan:
528 		if (attr == hwmon_fan_input)
529 			return corsairpsu_get_value(priv, PSU_CMD_FAN, 0, val);
530 		return -EOPNOTSUPP;
531 	case hwmon_power:
532 		return corsairpsu_hwmon_power_read(priv, attr, channel, val);
533 	case hwmon_in:
534 		return corsairpsu_hwmon_in_read(priv, attr, channel, val);
535 	case hwmon_curr:
536 		return corsairpsu_hwmon_curr_read(priv, attr, channel, val);
537 	default:
538 		return -EOPNOTSUPP;
539 	}
540 }
541 
corsairpsu_hwmon_ops_read_string(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,const char ** str)542 static int corsairpsu_hwmon_ops_read_string(struct device *dev, enum hwmon_sensor_types type,
543 					    u32 attr, int channel, const char **str)
544 {
545 	if (type == hwmon_temp && attr == hwmon_temp_label) {
546 		*str = channel ? L_TEMP1 : L_TEMP0;
547 		return 0;
548 	} else if (type == hwmon_fan && attr == hwmon_fan_label) {
549 		*str = L_FAN;
550 		return 0;
551 	} else if (type == hwmon_power && attr == hwmon_power_label && channel < 4) {
552 		*str = label_watts[channel];
553 		return 0;
554 	} else if (type == hwmon_in && attr == hwmon_in_label && channel < 4) {
555 		*str = label_volts[channel];
556 		return 0;
557 	} else if (type == hwmon_curr && attr == hwmon_curr_label && channel < 4) {
558 		*str = label_amps[channel];
559 		return 0;
560 	}
561 
562 	return -EOPNOTSUPP;
563 }
564 
565 static const struct hwmon_ops corsairpsu_hwmon_ops = {
566 	.is_visible	= corsairpsu_hwmon_ops_is_visible,
567 	.read		= corsairpsu_hwmon_ops_read,
568 	.read_string	= corsairpsu_hwmon_ops_read_string,
569 };
570 
571 static const struct hwmon_channel_info *corsairpsu_info[] = {
572 	HWMON_CHANNEL_INFO(chip,
573 			   HWMON_C_REGISTER_TZ),
574 	HWMON_CHANNEL_INFO(temp,
575 			   HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT,
576 			   HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT),
577 	HWMON_CHANNEL_INFO(fan,
578 			   HWMON_F_INPUT | HWMON_F_LABEL),
579 	HWMON_CHANNEL_INFO(power,
580 			   HWMON_P_INPUT | HWMON_P_LABEL,
581 			   HWMON_P_INPUT | HWMON_P_LABEL,
582 			   HWMON_P_INPUT | HWMON_P_LABEL,
583 			   HWMON_P_INPUT | HWMON_P_LABEL),
584 	HWMON_CHANNEL_INFO(in,
585 			   HWMON_I_INPUT | HWMON_I_LABEL,
586 			   HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
587 			   HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
588 			   HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT),
589 	HWMON_CHANNEL_INFO(curr,
590 			   HWMON_C_INPUT | HWMON_C_LABEL,
591 			   HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
592 			   HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
593 			   HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT),
594 	NULL
595 };
596 
597 static const struct hwmon_chip_info corsairpsu_chip_info = {
598 	.ops	= &corsairpsu_hwmon_ops,
599 	.info	= corsairpsu_info,
600 };
601 
602 #ifdef CONFIG_DEBUG_FS
603 
print_uptime(struct seq_file * seqf,u8 cmd)604 static void print_uptime(struct seq_file *seqf, u8 cmd)
605 {
606 	struct corsairpsu_data *priv = seqf->private;
607 	long val;
608 	int ret;
609 
610 	ret = corsairpsu_get_value(priv, cmd, 0, &val);
611 	if (ret < 0) {
612 		seq_puts(seqf, "N/A\n");
613 		return;
614 	}
615 
616 	if (val > SECONDS_PER_DAY) {
617 		seq_printf(seqf, "%ld day(s), %02ld:%02ld:%02ld\n", val / SECONDS_PER_DAY,
618 			   val % SECONDS_PER_DAY / SECONDS_PER_HOUR, val % SECONDS_PER_HOUR / 60,
619 			   val % 60);
620 		return;
621 	}
622 
623 	seq_printf(seqf, "%02ld:%02ld:%02ld\n", val % SECONDS_PER_DAY / SECONDS_PER_HOUR,
624 		   val % SECONDS_PER_HOUR / 60, val % 60);
625 }
626 
uptime_show(struct seq_file * seqf,void * unused)627 static int uptime_show(struct seq_file *seqf, void *unused)
628 {
629 	print_uptime(seqf, PSU_CMD_UPTIME);
630 
631 	return 0;
632 }
633 DEFINE_SHOW_ATTRIBUTE(uptime);
634 
uptime_total_show(struct seq_file * seqf,void * unused)635 static int uptime_total_show(struct seq_file *seqf, void *unused)
636 {
637 	print_uptime(seqf, PSU_CMD_TOTAL_UPTIME);
638 
639 	return 0;
640 }
641 DEFINE_SHOW_ATTRIBUTE(uptime_total);
642 
vendor_show(struct seq_file * seqf,void * unused)643 static int vendor_show(struct seq_file *seqf, void *unused)
644 {
645 	struct corsairpsu_data *priv = seqf->private;
646 
647 	seq_printf(seqf, "%s\n", priv->vendor);
648 
649 	return 0;
650 }
651 DEFINE_SHOW_ATTRIBUTE(vendor);
652 
product_show(struct seq_file * seqf,void * unused)653 static int product_show(struct seq_file *seqf, void *unused)
654 {
655 	struct corsairpsu_data *priv = seqf->private;
656 
657 	seq_printf(seqf, "%s\n", priv->product);
658 
659 	return 0;
660 }
661 DEFINE_SHOW_ATTRIBUTE(product);
662 
corsairpsu_debugfs_init(struct corsairpsu_data * priv)663 static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
664 {
665 	char name[32];
666 
667 	scnprintf(name, sizeof(name), "%s-%s", DRIVER_NAME, dev_name(&priv->hdev->dev));
668 
669 	priv->debugfs = debugfs_create_dir(name, NULL);
670 	debugfs_create_file("uptime", 0444, priv->debugfs, priv, &uptime_fops);
671 	debugfs_create_file("uptime_total", 0444, priv->debugfs, priv, &uptime_total_fops);
672 	debugfs_create_file("vendor", 0444, priv->debugfs, priv, &vendor_fops);
673 	debugfs_create_file("product", 0444, priv->debugfs, priv, &product_fops);
674 }
675 
676 #else
677 
corsairpsu_debugfs_init(struct corsairpsu_data * priv)678 static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
679 {
680 }
681 
682 #endif
683 
corsairpsu_probe(struct hid_device * hdev,const struct hid_device_id * id)684 static int corsairpsu_probe(struct hid_device *hdev, const struct hid_device_id *id)
685 {
686 	struct corsairpsu_data *priv;
687 	int ret;
688 
689 	priv = devm_kzalloc(&hdev->dev, sizeof(struct corsairpsu_data), GFP_KERNEL);
690 	if (!priv)
691 		return -ENOMEM;
692 
693 	priv->cmd_buffer = devm_kmalloc(&hdev->dev, CMD_BUFFER_SIZE, GFP_KERNEL);
694 	if (!priv->cmd_buffer)
695 		return -ENOMEM;
696 
697 	ret = hid_parse(hdev);
698 	if (ret)
699 		return ret;
700 
701 	ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
702 	if (ret)
703 		return ret;
704 
705 	ret = hid_hw_open(hdev);
706 	if (ret)
707 		goto fail_and_stop;
708 
709 	priv->hdev = hdev;
710 	hid_set_drvdata(hdev, priv);
711 	mutex_init(&priv->lock);
712 	init_completion(&priv->wait_completion);
713 
714 	hid_device_io_start(hdev);
715 
716 	ret = corsairpsu_init(priv);
717 	if (ret < 0) {
718 		dev_err(&hdev->dev, "unable to initialize device (%d)\n", ret);
719 		goto fail_and_stop;
720 	}
721 
722 	ret = corsairpsu_fwinfo(priv);
723 	if (ret < 0) {
724 		dev_err(&hdev->dev, "unable to query firmware (%d)\n", ret);
725 		goto fail_and_stop;
726 	}
727 
728 	corsairpsu_get_criticals(priv);
729 	corsairpsu_check_cmd_support(priv);
730 
731 	priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, "corsairpsu", priv,
732 							  &corsairpsu_chip_info, 0);
733 
734 	if (IS_ERR(priv->hwmon_dev)) {
735 		ret = PTR_ERR(priv->hwmon_dev);
736 		goto fail_and_close;
737 	}
738 
739 	corsairpsu_debugfs_init(priv);
740 
741 	return 0;
742 
743 fail_and_close:
744 	hid_hw_close(hdev);
745 fail_and_stop:
746 	hid_hw_stop(hdev);
747 	return ret;
748 }
749 
corsairpsu_remove(struct hid_device * hdev)750 static void corsairpsu_remove(struct hid_device *hdev)
751 {
752 	struct corsairpsu_data *priv = hid_get_drvdata(hdev);
753 
754 	debugfs_remove_recursive(priv->debugfs);
755 	hwmon_device_unregister(priv->hwmon_dev);
756 	hid_hw_close(hdev);
757 	hid_hw_stop(hdev);
758 }
759 
corsairpsu_raw_event(struct hid_device * hdev,struct hid_report * report,u8 * data,int size)760 static int corsairpsu_raw_event(struct hid_device *hdev, struct hid_report *report, u8 *data,
761 				int size)
762 {
763 	struct corsairpsu_data *priv = hid_get_drvdata(hdev);
764 
765 	if (completion_done(&priv->wait_completion))
766 		return 0;
767 
768 	memcpy(priv->cmd_buffer, data, min(CMD_BUFFER_SIZE, size));
769 	complete(&priv->wait_completion);
770 
771 	return 0;
772 }
773 
774 static const struct hid_device_id corsairpsu_idtable[] = {
775 	{ HID_USB_DEVICE(0x1b1c, 0x1c03) }, /* Corsair HX550i */
776 	{ HID_USB_DEVICE(0x1b1c, 0x1c04) }, /* Corsair HX650i */
777 	{ HID_USB_DEVICE(0x1b1c, 0x1c05) }, /* Corsair HX750i */
778 	{ HID_USB_DEVICE(0x1b1c, 0x1c06) }, /* Corsair HX850i */
779 	{ HID_USB_DEVICE(0x1b1c, 0x1c07) }, /* Corsair HX1000i */
780 	{ HID_USB_DEVICE(0x1b1c, 0x1c08) }, /* Corsair HX1200i */
781 	{ HID_USB_DEVICE(0x1b1c, 0x1c09) }, /* Corsair RM550i */
782 	{ HID_USB_DEVICE(0x1b1c, 0x1c0a) }, /* Corsair RM650i */
783 	{ HID_USB_DEVICE(0x1b1c, 0x1c0b) }, /* Corsair RM750i */
784 	{ HID_USB_DEVICE(0x1b1c, 0x1c0c) }, /* Corsair RM850i */
785 	{ HID_USB_DEVICE(0x1b1c, 0x1c0d) }, /* Corsair RM1000i */
786 	{ },
787 };
788 MODULE_DEVICE_TABLE(hid, corsairpsu_idtable);
789 
790 static struct hid_driver corsairpsu_driver = {
791 	.name		= DRIVER_NAME,
792 	.id_table	= corsairpsu_idtable,
793 	.probe		= corsairpsu_probe,
794 	.remove		= corsairpsu_remove,
795 	.raw_event	= corsairpsu_raw_event,
796 };
797 module_hid_driver(corsairpsu_driver);
798 
799 MODULE_LICENSE("GPL");
800 MODULE_AUTHOR("Wilken Gottwalt <wilken.gottwalt@posteo.net>");
801 MODULE_DESCRIPTION("Linux driver for Corsair power supplies with HID sensors interface");
802