1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver
4  *
5  * Copyright (C) 2005 ARM Ltd
6  * Copyright (C) 2010 ST-Ericsson SA
7  *
8  * pl08x information required by platform code
9  *
10  * Please credit ARM.com
11  * Documentation: ARM DDI 0196D
12  */
13 
14 #ifndef AMBA_PL08X_H
15 #define AMBA_PL08X_H
16 
17 /* We need sizes of structs from this header */
18 #include <linux/dmaengine.h>
19 #include <linux/interrupt.h>
20 
21 struct pl08x_driver_data;
22 struct pl08x_phy_chan;
23 struct pl08x_txd;
24 
25 /* Bitmasks for selecting AHB ports for DMA transfers */
26 enum {
27 	PL08X_AHB1 = (1 << 0),
28 	PL08X_AHB2 = (1 << 1)
29 };
30 
31 /**
32  * struct pl08x_channel_data - data structure to pass info between
33  * platform and PL08x driver regarding channel configuration
34  * @bus_id: name of this device channel, not just a device name since
35  * devices may have more than one channel e.g. "foo_tx"
36  * @min_signal: the minimum DMA signal number to be muxed in for this
37  * channel (for platforms supporting muxed signals). If you have
38  * static assignments, make sure this is set to the assigned signal
39  * number, PL08x have 16 possible signals in number 0 thru 15 so
40  * when these are not enough they often get muxed (in hardware)
41  * disabling simultaneous use of the same channel for two devices.
42  * @max_signal: the maximum DMA signal number to be muxed in for
43  * the channel. Set to the same as min_signal for
44  * devices with static assignments
45  * @muxval: a number usually used to poke into some mux regiser to
46  * mux in the signal to this channel
47  * @addr: source/target address in physical memory for this DMA channel,
48  * can be the address of a FIFO register for burst requests for example.
49  * This can be left undefined if the PrimeCell API is used for configuring
50  * this.
51  * @single: the device connected to this channel will request single DMA
52  * transfers, not bursts. (Bursts are default.)
53  * @periph_buses: the device connected to this channel is accessible via
54  * these buses (use PL08X_AHB1 | PL08X_AHB2).
55  */
56 struct pl08x_channel_data {
57 	const char *bus_id;
58 	int min_signal;
59 	int max_signal;
60 	u32 muxval;
61 	dma_addr_t addr;
62 	bool single;
63 	u8 periph_buses;
64 };
65 
66 enum pl08x_burst_size {
67 	PL08X_BURST_SZ_1,
68 	PL08X_BURST_SZ_4,
69 	PL08X_BURST_SZ_8,
70 	PL08X_BURST_SZ_16,
71 	PL08X_BURST_SZ_32,
72 	PL08X_BURST_SZ_64,
73 	PL08X_BURST_SZ_128,
74 	PL08X_BURST_SZ_256,
75 };
76 
77 enum pl08x_bus_width {
78 	PL08X_BUS_WIDTH_8_BITS,
79 	PL08X_BUS_WIDTH_16_BITS,
80 	PL08X_BUS_WIDTH_32_BITS,
81 };
82 
83 /**
84  * struct pl08x_platform_data - the platform configuration for the PL08x
85  * PrimeCells.
86  * @slave_channels: the channels defined for the different devices on the
87  * platform, all inclusive, including multiplexed channels. The available
88  * physical channels will be multiplexed around these signals as they are
89  * requested, just enumerate all possible channels.
90  * @num_slave_channels: number of elements in the slave channel array
91  * @memcpy_burst_size: the appropriate burst size for memcpy operations
92  * @memcpy_bus_width: memory bus width
93  * @memcpy_prot_buff: whether memcpy DMA is bufferable
94  * @memcpy_prot_cache: whether memcpy DMA is cacheable
95  * @get_xfer_signal: request a physical signal to be used for a DMA transfer
96  * immediately: if there is some multiplexing or similar blocking the use
97  * of the channel the transfer can be denied by returning less than zero,
98  * else it returns the allocated signal number
99  * @put_xfer_signal: indicate to the platform that this physical signal is not
100  * running any DMA transfer and multiplexing can be recycled
101  * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2
102  * @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2
103  * @slave_map: DMA slave matching table
104  * @slave_map_len: number of elements in @slave_map
105  */
106 struct pl08x_platform_data {
107 	struct pl08x_channel_data *slave_channels;
108 	unsigned int num_slave_channels;
109 	enum pl08x_burst_size memcpy_burst_size;
110 	enum pl08x_bus_width memcpy_bus_width;
111 	bool memcpy_prot_buff;
112 	bool memcpy_prot_cache;
113 	int (*get_xfer_signal)(const struct pl08x_channel_data *);
114 	void (*put_xfer_signal)(const struct pl08x_channel_data *, int);
115 	u8 lli_buses;
116 	u8 mem_buses;
117 	const struct dma_slave_map *slave_map;
118 	int slave_map_len;
119 };
120 
121 #ifdef CONFIG_AMBA_PL08X
122 bool pl08x_filter_id(struct dma_chan *chan, void *chan_id);
123 #else
pl08x_filter_id(struct dma_chan * chan,void * chan_id)124 static inline bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
125 {
126 	return false;
127 }
128 #endif
129 
130 #endif	/* AMBA_PL08X_H */
131