1 // SPDX-License-Identifier: GPL-2.0
2 #include <errno.h>
3 #include <string.h>
4 #include <regex.h>
5 #include <linux/zalloc.h>
6
7 #include "../../../util/perf_regs.h"
8 #include "../../../util/debug.h"
9 #include "../../../util/event.h"
10 #include "../../../util/header.h"
11 #include "../../../perf-sys.h"
12 #include "utils_header.h"
13
14 #include <linux/kernel.h>
15
16 #define PVR_POWER9 0x004E
17 #define PVR_POWER10 0x0080
18
19 const struct sample_reg sample_reg_masks[] = {
20 SMPL_REG(r0, PERF_REG_POWERPC_R0),
21 SMPL_REG(r1, PERF_REG_POWERPC_R1),
22 SMPL_REG(r2, PERF_REG_POWERPC_R2),
23 SMPL_REG(r3, PERF_REG_POWERPC_R3),
24 SMPL_REG(r4, PERF_REG_POWERPC_R4),
25 SMPL_REG(r5, PERF_REG_POWERPC_R5),
26 SMPL_REG(r6, PERF_REG_POWERPC_R6),
27 SMPL_REG(r7, PERF_REG_POWERPC_R7),
28 SMPL_REG(r8, PERF_REG_POWERPC_R8),
29 SMPL_REG(r9, PERF_REG_POWERPC_R9),
30 SMPL_REG(r10, PERF_REG_POWERPC_R10),
31 SMPL_REG(r11, PERF_REG_POWERPC_R11),
32 SMPL_REG(r12, PERF_REG_POWERPC_R12),
33 SMPL_REG(r13, PERF_REG_POWERPC_R13),
34 SMPL_REG(r14, PERF_REG_POWERPC_R14),
35 SMPL_REG(r15, PERF_REG_POWERPC_R15),
36 SMPL_REG(r16, PERF_REG_POWERPC_R16),
37 SMPL_REG(r17, PERF_REG_POWERPC_R17),
38 SMPL_REG(r18, PERF_REG_POWERPC_R18),
39 SMPL_REG(r19, PERF_REG_POWERPC_R19),
40 SMPL_REG(r20, PERF_REG_POWERPC_R20),
41 SMPL_REG(r21, PERF_REG_POWERPC_R21),
42 SMPL_REG(r22, PERF_REG_POWERPC_R22),
43 SMPL_REG(r23, PERF_REG_POWERPC_R23),
44 SMPL_REG(r24, PERF_REG_POWERPC_R24),
45 SMPL_REG(r25, PERF_REG_POWERPC_R25),
46 SMPL_REG(r26, PERF_REG_POWERPC_R26),
47 SMPL_REG(r27, PERF_REG_POWERPC_R27),
48 SMPL_REG(r28, PERF_REG_POWERPC_R28),
49 SMPL_REG(r29, PERF_REG_POWERPC_R29),
50 SMPL_REG(r30, PERF_REG_POWERPC_R30),
51 SMPL_REG(r31, PERF_REG_POWERPC_R31),
52 SMPL_REG(nip, PERF_REG_POWERPC_NIP),
53 SMPL_REG(msr, PERF_REG_POWERPC_MSR),
54 SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),
55 SMPL_REG(ctr, PERF_REG_POWERPC_CTR),
56 SMPL_REG(link, PERF_REG_POWERPC_LINK),
57 SMPL_REG(xer, PERF_REG_POWERPC_XER),
58 SMPL_REG(ccr, PERF_REG_POWERPC_CCR),
59 SMPL_REG(softe, PERF_REG_POWERPC_SOFTE),
60 SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
61 SMPL_REG(dar, PERF_REG_POWERPC_DAR),
62 SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
63 SMPL_REG(sier, PERF_REG_POWERPC_SIER),
64 SMPL_REG(mmcra, PERF_REG_POWERPC_MMCRA),
65 SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
66 SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
67 SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
68 SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
69 SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
70 SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
71 SMPL_REG(pmc1, PERF_REG_POWERPC_PMC1),
72 SMPL_REG(pmc2, PERF_REG_POWERPC_PMC2),
73 SMPL_REG(pmc3, PERF_REG_POWERPC_PMC3),
74 SMPL_REG(pmc4, PERF_REG_POWERPC_PMC4),
75 SMPL_REG(pmc5, PERF_REG_POWERPC_PMC5),
76 SMPL_REG(pmc6, PERF_REG_POWERPC_PMC6),
77 SMPL_REG_END
78 };
79
80 /* REG or %rREG */
81 #define SDT_OP_REGEX1 "^(%r)?([1-2]?[0-9]|3[0-1])$"
82
83 /* -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) */
84 #define SDT_OP_REGEX2 "^(\\-)?([0-9]+)\\((%r)?([1-2]?[0-9]|3[0-1])\\)$"
85
86 static regex_t sdt_op_regex1, sdt_op_regex2;
87
sdt_init_op_regex(void)88 static int sdt_init_op_regex(void)
89 {
90 static int initialized;
91 int ret = 0;
92
93 if (initialized)
94 return 0;
95
96 ret = regcomp(&sdt_op_regex1, SDT_OP_REGEX1, REG_EXTENDED);
97 if (ret)
98 goto error;
99
100 ret = regcomp(&sdt_op_regex2, SDT_OP_REGEX2, REG_EXTENDED);
101 if (ret)
102 goto free_regex1;
103
104 initialized = 1;
105 return 0;
106
107 free_regex1:
108 regfree(&sdt_op_regex1);
109 error:
110 pr_debug4("Regex compilation error.\n");
111 return ret;
112 }
113
114 /*
115 * Parse OP and convert it into uprobe format, which is, +/-NUM(%gprREG).
116 * Possible variants of OP are:
117 * Format Example
118 * -------------------------
119 * NUM(REG) 48(18)
120 * -NUM(REG) -48(18)
121 * NUM(%rREG) 48(%r18)
122 * -NUM(%rREG) -48(%r18)
123 * REG 18
124 * %rREG %r18
125 * iNUM i0
126 * i-NUM i-1
127 *
128 * SDT marker arguments on Powerpc uses %rREG form with -mregnames flag
129 * and REG form with -mno-regnames. Here REG is general purpose register,
130 * which is in 0 to 31 range.
131 */
arch_sdt_arg_parse_op(char * old_op,char ** new_op)132 int arch_sdt_arg_parse_op(char *old_op, char **new_op)
133 {
134 int ret, new_len;
135 regmatch_t rm[5];
136 char prefix;
137
138 /* Constant argument. Uprobe does not support it */
139 if (old_op[0] == 'i') {
140 pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
141 return SDT_ARG_SKIP;
142 }
143
144 ret = sdt_init_op_regex();
145 if (ret < 0)
146 return ret;
147
148 if (!regexec(&sdt_op_regex1, old_op, 3, rm, 0)) {
149 /* REG or %rREG --> %gprREG */
150
151 new_len = 5; /* % g p r NULL */
152 new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
153
154 *new_op = zalloc(new_len);
155 if (!*new_op)
156 return -ENOMEM;
157
158 scnprintf(*new_op, new_len, "%%gpr%.*s",
159 (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so);
160 } else if (!regexec(&sdt_op_regex2, old_op, 5, rm, 0)) {
161 /*
162 * -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) -->
163 * +/-NUM(%gprREG)
164 */
165 prefix = (rm[1].rm_so == -1) ? '+' : '-';
166
167 new_len = 8; /* +/- ( % g p r ) NULL */
168 new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
169 new_len += (int)(rm[4].rm_eo - rm[4].rm_so);
170
171 *new_op = zalloc(new_len);
172 if (!*new_op)
173 return -ENOMEM;
174
175 scnprintf(*new_op, new_len, "%c%.*s(%%gpr%.*s)", prefix,
176 (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,
177 (int)(rm[4].rm_eo - rm[4].rm_so), old_op + rm[4].rm_so);
178 } else {
179 pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
180 return SDT_ARG_SKIP;
181 }
182
183 return SDT_ARG_VALID;
184 }
185
arch__intr_reg_mask(void)186 uint64_t arch__intr_reg_mask(void)
187 {
188 struct perf_event_attr attr = {
189 .type = PERF_TYPE_HARDWARE,
190 .config = PERF_COUNT_HW_CPU_CYCLES,
191 .sample_type = PERF_SAMPLE_REGS_INTR,
192 .precise_ip = 1,
193 .disabled = 1,
194 .exclude_kernel = 1,
195 };
196 int fd;
197 u32 version;
198 u64 extended_mask = 0, mask = PERF_REGS_MASK;
199
200 /*
201 * Get the PVR value to set the extended
202 * mask specific to platform.
203 */
204 version = (((mfspr(SPRN_PVR)) >> 16) & 0xFFFF);
205 if (version == PVR_POWER9)
206 extended_mask = PERF_REG_PMU_MASK_300;
207 else if (version == PVR_POWER10)
208 extended_mask = PERF_REG_PMU_MASK_31;
209 else
210 return mask;
211
212 attr.sample_regs_intr = extended_mask;
213 attr.sample_period = 1;
214 event_attr_init(&attr);
215
216 /*
217 * check if the pmu supports perf extended regs, before
218 * returning the register mask to sample.
219 */
220 fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
221 if (fd != -1) {
222 close(fd);
223 mask |= extended_mask;
224 }
225 return mask;
226 }
227