1 /*
2  * SpanDSP - a series of DSP components for telephony
3  *
4  * t30.c - ITU T.30 FAX transfer processing
5  *
6  * Written by Steve Underwood <steveu@coppice.org>
7  *
8  * Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009 Steve Underwood
9  *
10  * All rights reserved.
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU Lesser General Public License version 2.1,
14  * as published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU Lesser General Public License for more details.
20  *
21  * You should have received a copy of the GNU Lesser General Public
22  * License along with this program; if not, write to the Free Software
23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24  */
25 
26 /*! \file */
27 
28 #if defined(HAVE_CONFIG_H)
29 #include "config.h"
30 #endif
31 
32 #include <stdlib.h>
33 #include <inttypes.h>
34 #include <stdio.h>
35 #include <string.h>
36 #include <fcntl.h>
37 #include <time.h>
38 #if defined(HAVE_TGMATH_H)
39 #include <tgmath.h>
40 #endif
41 #if defined(HAVE_MATH_H)
42 #include <math.h>
43 #endif
44 #if defined(HAVE_STDBOOL_H)
45 #include <stdbool.h>
46 #else
47 #include "spandsp/stdbool.h"
48 #endif
49 #include "floating_fudge.h"
50 #include <tiffio.h>
51 
52 #include "spandsp/telephony.h"
53 #include "spandsp/alloc.h"
54 #include "spandsp/logging.h"
55 #include "spandsp/bit_operations.h"
56 #include "spandsp/queue.h"
57 #include "spandsp/power_meter.h"
58 #include "spandsp/complex.h"
59 #include "spandsp/tone_generate.h"
60 #include "spandsp/async.h"
61 #include "spandsp/hdlc.h"
62 #include "spandsp/fsk.h"
63 #include "spandsp/v29rx.h"
64 #include "spandsp/v29tx.h"
65 #include "spandsp/v27ter_rx.h"
66 #include "spandsp/v27ter_tx.h"
67 #include "spandsp/timezone.h"
68 #include "spandsp/t4_rx.h"
69 #include "spandsp/t4_tx.h"
70 #include "spandsp/image_translate.h"
71 #include "spandsp/t81_t82_arith_coding.h"
72 #include "spandsp/t85.h"
73 #include "spandsp/t42.h"
74 #include "spandsp/t43.h"
75 #include "spandsp/t4_t6_decode.h"
76 #include "spandsp/t4_t6_encode.h"
77 #include "spandsp/t30_fcf.h"
78 #include "spandsp/t35.h"
79 #include "spandsp/t30.h"
80 #include "spandsp/t30_api.h"
81 #include "spandsp/t30_logging.h"
82 
83 #include "spandsp/private/logging.h"
84 #include "spandsp/private/timezone.h"
85 #include "spandsp/private/t81_t82_arith_coding.h"
86 #include "spandsp/private/t85.h"
87 #include "spandsp/private/t42.h"
88 #include "spandsp/private/t43.h"
89 #include "spandsp/private/t4_t6_decode.h"
90 #include "spandsp/private/t4_t6_encode.h"
91 #include "spandsp/private/image_translate.h"
92 #include "spandsp/private/t4_rx.h"
93 #include "spandsp/private/t4_tx.h"
94 #include "spandsp/private/t30.h"
95 #include "spandsp/private/t30_dis_dtc_dcs_bits.h"
96 
97 #include "t30_local.h"
98 
99 /*! The maximum permitted number of retries of a single command allowed. */
100 #define MAX_COMMAND_TRIES   6
101 
102 /*! The maximum permitted number of retries of a single response request allowed. This
103     is not specified in T.30. However, if you don't apply some limit a messed up FAX
104     terminal could keep you retrying all day. Its a backstop protection. */
105 #define MAX_RESPONSE_TRIES  6
106 
107 /* T.30 defines the following call phases:
108    Phase A: Call set-up.
109        Exchange of CNG, CED and the called terminal identification.
110    Phase B: Pre-message procedure for identifying and selecting the required facilities.
111        Capabilities negotiation, and training, up the the confirmation to receive.
112    Phase C: Message transmission (includes phasing and synchronization where appropriate).
113        Transfer of the message at high speed.
114    Phase D: Post-message procedure, including end-of-message and confirmation and multi-document procedures.
115        End of message and acknowledgement.
116    Phase E: Call release
117        Final call disconnect. */
118 enum
119 {
120     T30_PHASE_IDLE = 0,     /* Freshly initialised */
121     T30_PHASE_A_CED,        /* Doing the CED (answer) sequence */
122     T30_PHASE_A_CNG,        /* Doing the CNG (caller) sequence */
123     T30_PHASE_B_RX,         /* Receiving pre-message control messages */
124     T30_PHASE_B_TX,         /* Transmitting pre-message control messages */
125     T30_PHASE_C_NON_ECM_RX, /* Receiving a document message in non-ECM mode */
126     T30_PHASE_C_NON_ECM_TX, /* Transmitting a document message in non-ECM mode */
127     T30_PHASE_C_ECM_RX,     /* Receiving a document message in ECM (HDLC) mode */
128     T30_PHASE_C_ECM_TX,     /* Transmitting a document message in ECM (HDLC) mode */
129     T30_PHASE_D_RX,         /* Receiving post-message control messages */
130     T30_PHASE_D_TX,         /* Transmitting post-message control messages */
131     T30_PHASE_E,            /* In phase E */
132     T30_PHASE_CALL_FINISHED /* Call completely finished */
133 };
134 
135 static const char *phase_names[] =
136 {
137     "IDLE",
138     "A_CED",
139     "A_CNG",
140     "B_RX",
141     "B_TX",
142     "C_NON_ECM_RX",
143     "C_NON_ECM_TX",
144     "C_ECM_RX",
145     "C_ECM_TX",
146     "D_RX",
147     "D_TX",
148     "E",
149     "CALL_FINISHED"
150 };
151 
152 /* These state names are modelled after places in the T.30 flow charts. */
153 enum
154 {
155     T30_STATE_IDLE = 0,
156     T30_STATE_ANSWERING,
157     T30_STATE_B,
158     T30_STATE_C,
159     T30_STATE_D,
160     T30_STATE_D_TCF,
161     T30_STATE_D_POST_TCF,
162     T30_STATE_F_TCF,
163     T30_STATE_F_CFR,
164     T30_STATE_F_FTT,
165     T30_STATE_F_DOC_NON_ECM,
166     T30_STATE_F_POST_DOC_NON_ECM,
167     T30_STATE_F_DOC_ECM,
168     T30_STATE_F_POST_DOC_ECM,
169     T30_STATE_F_POST_RCP_MCF,
170     T30_STATE_F_POST_RCP_PPR,
171     T30_STATE_F_POST_RCP_RNR,
172     T30_STATE_R,
173     T30_STATE_T,
174     T30_STATE_I,
175     T30_STATE_II,
176     T30_STATE_II_Q,
177     T30_STATE_III_Q,
178     T30_STATE_IV,
179     T30_STATE_IV_PPS_NULL,
180     T30_STATE_IV_PPS_Q,
181     T30_STATE_IV_PPS_RNR,
182     T30_STATE_IV_CTC,
183     T30_STATE_IV_EOR,
184     T30_STATE_IV_EOR_RNR,
185     T30_STATE_CALL_FINISHED
186 };
187 
188 static const char *state_names[] =
189 {
190     "IDLE",
191     "ANSWERING",
192     "B",
193     "C",
194     "D",
195     "D_TCF",
196     "D_POST_TCF",
197     "F_TCF",
198     "F_CFR",
199     "F_FTT",
200     "F_DOC_NON_ECM",
201     "F_POST_DOC_NON_ECM",
202     "F_DOC_ECM",
203     "F_POST_DOC_ECM",
204     "F_POST_RCP_MCF",
205     "F_POST_RCP_PPR",
206     "F_POST_RCP_RNR",
207     "R",
208     "T",
209     "I",
210     "II",
211     "II_Q",
212     "III_Q",
213     "IV",
214     "IV_PPS_NULL",
215     "IV_PPS_Q",
216     "IV_PPS_RNR",
217     "IV_CTC",
218     "IV_EOR",
219     "IV_EOR_RNR",
220     "CALL_FINISHED"
221 };
222 
223 enum
224 {
225     T30_MIN_SCAN_20MS = 0,
226     T30_MIN_SCAN_5MS = 1,
227     T30_MIN_SCAN_10MS = 2,
228     T30_MIN_SCAN_40MS = 4,
229     T30_MIN_SCAN_0MS = 7,
230 };
231 
232 enum
233 {
234     T30_MODE_SEND_DOC = 1,
235     T30_MODE_RECEIVE_DOC
236 };
237 
238 /*! These are internal assessments of received image quality, used to determine whether we
239     continue, retrain, or abandon the call. This is only relevant to non-ECM operation. */
240 enum
241 {
242     T30_COPY_QUALITY_PERFECT = 0,
243     T30_COPY_QUALITY_GOOD,
244     T30_COPY_QUALITY_POOR,
245     T30_COPY_QUALITY_BAD
246 };
247 
248 enum
249 {
250     DISBIT1 = 0x01,
251     DISBIT2 = 0x02,
252     DISBIT3 = 0x04,
253     DISBIT4 = 0x08,
254     DISBIT5 = 0x10,
255     DISBIT6 = 0x20,
256     DISBIT7 = 0x40,
257     DISBIT8 = 0x80
258 };
259 
260 /*! There are high level indications of what is happening at any instant, to guide the cleanup
261     continue, retrain, or abandoning of the call. */
262 enum
263 {
264     OPERATION_IN_PROGRESS_NONE = 0,
265     OPERATION_IN_PROGRESS_T4_RX,
266     OPERATION_IN_PROGRESS_T4_TX,
267     OPERATION_IN_PROGRESS_POST_T4_RX,
268     OPERATION_IN_PROGRESS_POST_T4_TX
269 };
270 
271 /* All timers specified in milliseconds */
272 
273 /*! Time-out T0 defines the amount of time an automatic calling terminal waits for the called terminal
274     to answer the call.
275     T0 begins after the dialling of the number is completed and is reset:
276     a) when T0 times out; or
277     b) when timer T1 is started; or
278     c) if the terminal is capable of detecting any condition which indicates that the call will not be
279        successful, when such a condition is detected.
280     The recommended value of T0 is 60+-5s. However, when it is anticipated that a long call set-up
281     time may be encountered, an alternative value of up to 120s may be used.
282     NOTE - National regulations may require the use of other values for T0. */
283 #define DEFAULT_TIMER_T0                60000
284 
285 /*! Time-out T1 defines the amount of time two terminals will continue to attempt to identify each
286     other. T1 is 35+-5s, begins upon entering phase B, and is reset upon detecting a valid signal or
287     when T1 times out.
288     For operating methods 3 and 4 (see 3.1), the calling terminal starts time-out T1 upon reception of
289     the V.21 modulation scheme.
290     For operating method 4 bis a (see 3.1), the calling terminal starts time-out T1 upon starting
291     transmission using the V.21 modulation scheme.
292     Annex A says T1 is also the timeout to be used for the receipt of the first HDLC frame after the
293     start of high speed flags in ECM mode. This seems a strange reuse of the T1 name, so we distinguish
294     it here by calling it T1A. */
295 #define DEFAULT_TIMER_T1                35000
296 #define DEFAULT_TIMER_T1A               35000
297 
298 /*! Time-out T2 makes use of the tight control between commands and responses to detect the loss of
299     command/response synchronization. T2 is 6+-1s, and begins when initiating a command search
300     (e.g., the first entrance into the "command received" subroutine, reference flow diagram in section 5.2).
301     T2 is reset when an HDLC flag is received or when T2 times out. */
302 #define DEFAULT_TIMER_T2                7000
303 
304 /*! Once HDLC flags begin, T2 is reset, and a 3s timer begins. This timer is unnamed in T.30. Here we
305     term it T2_FLAGGED. No tolerance is specified for this timer. T2_FLAGGED specifies the maximum
306     time to wait for the end of a frame, after the initial flag has been seen. */
307 #define DEFAULT_TIMER_T2_FLAGGED        3000
308 
309 /*! If the HDLC carrier falls during reception, we need to apply a minimum time before continuing. If we
310     don't, there are circumstances where we could continue and reply before the incoming signals have
311     really finished. E.g. if a bad DCS is received in a DCS-TCF sequence, we need wait for the TCF
312     carrier to pass, before continuing. This timer is specified as 200ms, but no tolerance is specified.
313     It is unnamed in T.30. Here we term it T2_DROPPED */
314 #define DEFAULT_TIMER_T2_DROPPED        200
315 
316 /*! Timer T2C is a fake timer state for internal use */
317 
318 /*! Time-out T3 defines the amount of time a terminal will attempt to alert the local operator in
319     response to a procedural interrupt. Failing to achieve operator intervention, the terminal will
320     discontinue this attempt and shall issue other commands or responses. T3 is 10+-5s, begins on the
321     first detection of a procedural interrupt command/response signal (i.e., PIN/PIP or PRI-Q) and is
322     reset when T3 times out or when the operator initiates a line request. */
323 #define DEFAULT_TIMER_T3                15000
324 
325 /*! Time-out T4 defines the amount of time a terminal will wait for flags to begin, when waiting for a
326     response from a remote terminal. T2 is 3s +-15%, and begins when initiating a response search
327     (e.g., the first entrance into the "response received" subroutine, reference flow diagram in section 5.2).
328     T4 is reset when an HDLC flag is received or when T4 times out.
329     NOTE - For manual FAX units, the value of timer T4 may be either 3.0s +-15% or 4.5s +-15%.
330     If the value of 4.5s is used, then after detection of a valid response to the first DIS, it may
331     be reduced to 3.0s +-15%. T4 = 3.0s +-15% for automatic units. */
332 #define DEFAULT_TIMER_T4                3450
333 
334 /*! Once HDLC flags begin, T4 is reset, and a 3s timer begins. This timer is unnamed in T.30. Here we
335     term it T4_FLAGGED. No tolerance is specified for this timer. T4_FLAGGED specifies the maximum time
336     to wait for the end of a frame, after the initial flag has been seen. Note that a different timer
337     is used for the fast HDLC in ECM mode, to provide time for physical paper handling. */
338 #define DEFAULT_TIMER_T4_FLAGGED        3000
339 
340 /*! If the HDLC carrier falls during reception, we need to apply a minimum time before continuing. if we
341     don't, there are circumstances where we could continue and reply before the incoming signals have
342     really finished. E.g. if a bad DCS is received in a DCS-TCF sequence, we need to wait for the TCF
343     carrier to pass, before continuing. This timer is specified as 200ms, but no tolerance is specified.
344     It is unnamed in T.30. Here we term it T4_DROPPED */
345 #define DEFAULT_TIMER_T4_DROPPED        200
346 
347 /*! Timer T4C is a fake timer state for internal use */
348 
349 /*! Time-out T5 is defined for the optional T.4 error correction mode. Time-out T5 defines the amount
350     of time waiting for clearance of the busy condition of the receiving terminal. T5 is 60+-5s and
351     begins on the first detection of the RNR response. T5 is reset when T5 times out or the MCF or PIP
352     response is received or when the ERR or PIN response is received in the flow control process after
353     transmitting the EOR command. If the timer T5 has expired, the DCN command is transmitted for
354     call release. */
355 #define DEFAULT_TIMER_T5                65000
356 
357 /*! (Annex C - ISDN) Time-out T6 defines the amount of time two terminals will continue to attempt to
358     identify each other. T6 is 5+-0.5s. The timeout begins upon entering Phase B, and is reset upon
359     detecting a valid signal, or when T6 times out. */
360 #define DEFAULT_TIMER_T6                5000
361 
362 /*! (Annex C - ISDN) Time-out T7 is used to detect loss of command/response synchronization. T7 is 6+-1s.
363     The timeout begins when initiating a command search (e.g., the first entrance into the "command received"
364     subroutine - see flow diagram in C.5) and is reset upon detecting a valid signal or when T7 times out. */
365 #define DEFAULT_TIMER_T7                7000
366 
367 /*! (Annex C - ISDN) Time-out T8 defines the amount of time waiting for clearance of the busy condition
368     of the receiving terminal. T8 is 10+-1s. The timeout begins on the first detection of the combination
369     of no outstanding corrections and the RNR response. T8 is reset when T8 times out or MCF response is
370     received. If the timer T8 expires, a DCN command is transmitted for call release. */
371 #define DEFAULT_TIMER_T8                10000
372 
373 /*! Final time we allow for things to flush through the system, before we disconnect, in milliseconds.
374     200ms should be fine for a PSTN call. For a T.38 call something longer is desirable. This delay is
375     to allow sufficient time for the last message to be flushed all the way through to the far end. */
376 #define FINAL_FLUSH_TIME                1000
377 
378 /*! The number of PPRs received before CTC or EOR is sent in ECM mode. T.30 defines this as 4,
379     but it could be varied, and the Japanese spec, for example, does make this value a
380     variable. */
381 #define PPR_LIMIT_BEFORE_CTC_OR_EOR     4
382 
383 /* HDLC message header byte values */
384 #define ADDRESS_FIELD                   0xFF
385 #define CONTROL_FIELD_NON_FINAL_FRAME   0x03
386 #define CONTROL_FIELD_FINAL_FRAME       0x13
387 
388 enum
389 {
390     TIMER_IS_IDLE = 0,
391     TIMER_IS_T2,
392     TIMER_IS_T1A,
393     TIMER_IS_T2_FLAGGED,
394     TIMER_IS_T2_DROPPED,
395     TIMER_IS_T2C,
396     TIMER_IS_T4,
397     TIMER_IS_T4_FLAGGED,
398     TIMER_IS_T4_DROPPED,
399     TIMER_IS_T4C
400 };
401 
402 /* Start points in the fallback table for different capabilities */
403 /*! The starting point in the modem fallback sequence if V.17 is allowed */
404 #define T30_V17_FALLBACK_START          0
405 /*! The starting point in the modem fallback sequence if V.17 is not allowed */
406 #define T30_V29_FALLBACK_START          3
407 /*! The starting point in the modem fallback sequence if V.29 is not allowed */
408 #define T30_V27TER_FALLBACK_START       6
409 
410 static const struct
411 {
412     int bit_rate;
413     int modem_type;
414     int which;
415     uint8_t dcs_code;
416 } fallback_sequence[] =
417 {
418     {14400, T30_MODEM_V17,      T30_SUPPORT_V17,    (DISBIT6                    )},
419     {12000, T30_MODEM_V17,      T30_SUPPORT_V17,    (DISBIT6 | DISBIT4          )},
420     { 9600, T30_MODEM_V17,      T30_SUPPORT_V17,    (DISBIT6 |           DISBIT3)},
421     { 9600, T30_MODEM_V29,      T30_SUPPORT_V29,    (                    DISBIT3)},
422     { 7200, T30_MODEM_V17,      T30_SUPPORT_V17,    (DISBIT6 | DISBIT4 | DISBIT3)},
423     { 7200, T30_MODEM_V29,      T30_SUPPORT_V29,    (          DISBIT4 | DISBIT3)},
424     { 4800, T30_MODEM_V27TER,   T30_SUPPORT_V27TER, (          DISBIT4          )},
425     { 2400, T30_MODEM_V27TER,   T30_SUPPORT_V27TER, (0                          )},
426     {    0, 0,                  0,                  (0                          )}
427 };
428 
429 static void queue_phase(t30_state_t *s, int phase);
430 static void set_phase(t30_state_t *s, int phase);
431 static void set_state(t30_state_t *s, int state);
432 static void shut_down_hdlc_tx(t30_state_t *s);
433 static void send_frame(t30_state_t *s, const uint8_t *fr, int frlen);
434 static void send_simple_frame(t30_state_t *s, int type);
435 static void send_dcn(t30_state_t *s);
436 static void repeat_last_command(t30_state_t *s);
437 static void terminate_call(t30_state_t *s);
438 static void start_final_pause(t30_state_t *s);
439 static void decode_20digit_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len);
440 static void decode_url_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len);
441 static int decode_nsf_nss_nsc(t30_state_t *s, uint8_t *msg[], const uint8_t *pkt, int len);
442 static int send_cfr_sequence(t30_state_t *s, int start);
443 static int build_dcs(t30_state_t *s);
444 static void set_min_scan_time(t30_state_t *s);
445 static void timer_t2_start(t30_state_t *s);
446 static void timer_t2_flagged_start(t30_state_t *s);
447 static void timer_t2_dropped_start(t30_state_t *s);
448 static void timer_t4_start(t30_state_t *s);
449 static void timer_t4_flagged_start(t30_state_t *s);
450 static void timer_t4_dropped_start(t30_state_t *s);
451 static void timer_t2_t4_stop(t30_state_t *s);
452 
453 /*! Test a specified bit within a DIS, DTC or DCS frame */
454 #define test_ctrl_bit(s,bit) ((s)[3 + ((bit - 1)/8)] & (1 << ((bit - 1)%8)))
455 /*! Set a specified bit within a DIS, DTC or DCS frame */
456 #define set_ctrl_bit(s,bit) (s)[3 + ((bit - 1)/8)] |= (1 << ((bit - 1)%8))
457 /*! Set a specified block of bits within a DIS, DTC or DCS frame */
458 #define set_ctrl_bits(s,val,bit) (s)[3 + ((bit - 1)/8)] |= ((val) << ((bit - 1)%8))
459 /*! Clear a specified bit within a DIS, DTC or DCS frame */
460 #define clr_ctrl_bit(s,bit) (s)[3 + ((bit - 1)/8)] &= ~(1 << ((bit - 1)%8))
461 
find_fallback_entry(int dcs_code)462 static int find_fallback_entry(int dcs_code)
463 {
464     int i;
465 
466     /* The table is short, and not searched often, so a brain-dead linear scan seems OK */
467     for (i = 0;  fallback_sequence[i].bit_rate;  i++)
468     {
469         if (fallback_sequence[i].dcs_code == dcs_code)
470             break;
471         /*endif*/
472     }
473     /*endfor*/
474     if (fallback_sequence[i].bit_rate == 0)
475         return -1;
476     /*endif*/
477     return i;
478 }
479 /*- End of function --------------------------------------------------------*/
480 
step_fallback_entry(t30_state_t * s)481 static int step_fallback_entry(t30_state_t *s)
482 {
483     while (fallback_sequence[++s->current_fallback].bit_rate)
484     {
485         if ((fallback_sequence[s->current_fallback].which & s->current_permitted_modems))
486             break;
487         /*endif*/
488     }
489     /*endwhile*/
490     if (fallback_sequence[s->current_fallback].bit_rate == 0)
491     {
492         /* Reset the fallback sequence */
493         s->current_fallback = 0;
494         return -1;
495     }
496     /*endif*/
497     /* We need to update the minimum scan time, in case we are in non-ECM mode. */
498     set_min_scan_time(s);
499     /* Now we need to rebuild the DCS message we will send. */
500     build_dcs(s);
501     return s->current_fallback;
502 }
503 /*- End of function --------------------------------------------------------*/
504 
terminate_operation_in_progress(t30_state_t * s)505 static int terminate_operation_in_progress(t30_state_t *s)
506 {
507     /* Make sure any FAX in progress is tidied up. If the tidying up has
508        already happened, repeating it here is harmless. */
509     switch (s->operation_in_progress)
510     {
511     case OPERATION_IN_PROGRESS_T4_TX:
512         t4_tx_release(&s->t4.tx);
513         s->operation_in_progress = OPERATION_IN_PROGRESS_POST_T4_TX;
514         break;
515     case OPERATION_IN_PROGRESS_T4_RX:
516         t4_rx_release(&s->t4.rx);
517         s->operation_in_progress = OPERATION_IN_PROGRESS_POST_T4_RX;
518         break;
519     }
520     /*endswitch*/
521     return 0;
522 }
523 /*- End of function --------------------------------------------------------*/
524 
tx_start_page(t30_state_t * s)525 static int tx_start_page(t30_state_t *s)
526 {
527     if (t4_tx_start_page(&s->t4.tx))
528     {
529         terminate_operation_in_progress(s);
530         return -1;
531     }
532     /*endif*/
533     s->ecm_block = 0;
534     s->error_correcting_mode_retries = 0;
535     span_log(&s->logging, SPAN_LOG_FLOW, "Starting page %d of transfer\n", s->tx_page_number + 1);
536     return 0;
537 }
538 /*- End of function --------------------------------------------------------*/
539 
tx_end_page(t30_state_t * s)540 static int tx_end_page(t30_state_t *s)
541 {
542     s->retries = 0;
543     if (t4_tx_end_page(&s->t4.tx) == 0)
544     {
545         s->tx_page_number++;
546         s->ecm_block = 0;
547     }
548     /*endif*/
549     return 0;
550 }
551 /*- End of function --------------------------------------------------------*/
552 
rx_start_page(t30_state_t * s)553 static int rx_start_page(t30_state_t *s)
554 {
555     int i;
556 
557     t4_rx_set_image_width(&s->t4.rx, s->image_width);
558     t4_rx_set_sub_address(&s->t4.rx, s->rx_info.sub_address);
559     t4_rx_set_dcs(&s->t4.rx, s->rx_dcs_string);
560     t4_rx_set_far_ident(&s->t4.rx, s->rx_info.ident);
561     t4_rx_set_vendor(&s->t4.rx, s->vendor);
562     t4_rx_set_model(&s->t4.rx, s->model);
563 
564     t4_rx_set_rx_encoding(&s->t4.rx, s->line_compression);
565     t4_rx_set_x_resolution(&s->t4.rx, s->x_resolution);
566     t4_rx_set_y_resolution(&s->t4.rx, s->y_resolution);
567 
568     if (t4_rx_start_page(&s->t4.rx))
569         return -1;
570     /*endif*/
571     /* Clear the ECM buffer */
572     for (i = 0;  i < 256;  i++)
573         s->ecm_len[i] = -1;
574     /*endfor*/
575     s->ecm_block = 0;
576     s->ecm_frames = -1;
577     s->ecm_frames_this_tx_burst = 0;
578     s->error_correcting_mode_retries = 0;
579     return 0;
580 }
581 /*- End of function --------------------------------------------------------*/
582 
rx_end_page(t30_state_t * s)583 static int rx_end_page(t30_state_t *s)
584 {
585     if (t4_rx_end_page(&s->t4.rx) == 0)
586     {
587         s->rx_page_number++;
588         s->ecm_block = 0;
589     }
590     /*endif*/
591     return 0;
592 }
593 /*- End of function --------------------------------------------------------*/
594 
report_rx_ecm_page_result(t30_state_t * s)595 static void report_rx_ecm_page_result(t30_state_t *s)
596 {
597     t4_stats_t stats;
598 
599     /* This is only used for ECM pages, as copy_quality() does a similar job for non-ECM
600        pages as a byproduct of assessing copy quality. */
601     t4_rx_get_transfer_statistics(&s->t4.rx, &stats);
602     span_log(&s->logging, SPAN_LOG_FLOW, "Page no = %d\n", stats.pages_transferred);
603     span_log(&s->logging, SPAN_LOG_FLOW, "Image size = %d x %d pixels\n", stats.width, stats.length);
604     span_log(&s->logging, SPAN_LOG_FLOW, "Image resolution = %d/m x %d/m\n", stats.x_resolution, stats.y_resolution);
605     span_log(&s->logging, SPAN_LOG_FLOW, "Compression = %s (%d)\n", t4_compression_to_str(stats.compression), stats.compression);
606     span_log(&s->logging, SPAN_LOG_FLOW, "Compressed image size = %d bytes\n", stats.line_image_size);
607 }
608 /*- End of function --------------------------------------------------------*/
609 
copy_quality(t30_state_t * s)610 static int copy_quality(t30_state_t *s)
611 {
612     t4_stats_t stats;
613     int quality;
614 
615     t4_rx_get_transfer_statistics(&s->t4.rx, &stats);
616     /* There is no specification for judging copy quality. However, we need to classify
617        it at three levels, to control what we do next: OK; tolerable, but retrain;
618        intolerable. */
619     /* Based on the thresholds used in the TSB85 tests, we consider:
620             <5% bad rows is OK
621             <15% bad rows to be tolerable, but retrain
622             >15% bad rows to be intolerable
623      */
624     /* This is called before the page is confirmed, so we need to add one to get the page
625        number right */
626     span_log(&s->logging, SPAN_LOG_FLOW, "Page no = %d\n", stats.pages_transferred + 1);
627     span_log(&s->logging, SPAN_LOG_FLOW, "Image size = %d x %d pixels\n", stats.width, stats.length);
628     span_log(&s->logging, SPAN_LOG_FLOW, "Image resolution = %d/m x %d/m\n", stats.x_resolution, stats.y_resolution);
629     span_log(&s->logging, SPAN_LOG_FLOW, "Compression = %s (%d)\n", t4_compression_to_str(stats.compression), stats.compression);
630     span_log(&s->logging, SPAN_LOG_FLOW, "Compressed image size = %d bytes\n", stats.line_image_size);
631     span_log(&s->logging, SPAN_LOG_FLOW, "Bad rows = %d\n", stats.bad_rows);
632     span_log(&s->logging, SPAN_LOG_FLOW, "Longest bad row run = %d\n", stats.longest_bad_row_run);
633     /* Don't treat a page as perfect because it has zero bad rows out of zero total rows. A zero row
634        page has got to be some kind of total page failure. */
635     if (stats.bad_rows == 0  &&  stats.length != 0)
636     {
637         span_log(&s->logging, SPAN_LOG_FLOW, "Page quality is perfect\n");
638         quality = T30_COPY_QUALITY_PERFECT;
639     }
640     else if (stats.bad_rows*20 < stats.length)
641     {
642         span_log(&s->logging, SPAN_LOG_FLOW, "Page quality is good\n");
643         quality = T30_COPY_QUALITY_GOOD;
644     }
645     else if (stats.bad_rows*20 < stats.length*3)
646     {
647         span_log(&s->logging, SPAN_LOG_FLOW, "Page quality is poor\n");
648         quality = T30_COPY_QUALITY_POOR;
649     }
650     else
651     {
652         span_log(&s->logging, SPAN_LOG_FLOW, "Page quality is bad\n");
653         quality = T30_COPY_QUALITY_BAD;
654     }
655     /*endif*/
656     return quality;
657 }
658 /*- End of function --------------------------------------------------------*/
659 
report_tx_result(t30_state_t * s,int result)660 static void report_tx_result(t30_state_t *s, int result)
661 {
662     t4_stats_t stats;
663 
664     if (span_log_test(&s->logging, SPAN_LOG_FLOW))
665     {
666         t4_tx_get_transfer_statistics(&s->t4.tx, &stats);
667         span_log(&s->logging,
668                  SPAN_LOG_FLOW,
669                  "%s - delivered %d pages\n",
670                  (result)  ?  "Success"  :  "Failure",
671                  stats.pages_transferred);
672     }
673     /*endif*/
674 }
675 /*- End of function --------------------------------------------------------*/
676 
release_resources(t30_state_t * s)677 static void release_resources(t30_state_t *s)
678 {
679     if (s->tx_info.nsf)
680     {
681         span_free(s->tx_info.nsf);
682         s->tx_info.nsf = NULL;
683     }
684     /*endif*/
685     s->tx_info.nsf_len = 0;
686     if (s->tx_info.nsc)
687     {
688         span_free(s->tx_info.nsc);
689         s->tx_info.nsc = NULL;
690     }
691     /*endif*/
692     s->tx_info.nsc_len = 0;
693     if (s->tx_info.nss)
694     {
695         span_free(s->tx_info.nss);
696         s->tx_info.nss = NULL;
697     }
698     /*endif*/
699     s->tx_info.nss_len = 0;
700     if (s->tx_info.tsa)
701     {
702         span_free(s->tx_info.tsa);
703         s->tx_info.tsa = NULL;
704     }
705     /*endif*/
706     if (s->tx_info.ira)
707     {
708         span_free(s->tx_info.ira);
709         s->tx_info.ira = NULL;
710     }
711     /*endif*/
712     if (s->tx_info.cia)
713     {
714         span_free(s->tx_info.cia);
715         s->tx_info.cia = NULL;
716     }
717     /*endif*/
718     if (s->tx_info.isp)
719     {
720         span_free(s->tx_info.isp);
721         s->tx_info.isp = NULL;
722     }
723     /*endif*/
724     if (s->tx_info.csa)
725     {
726         span_free(s->tx_info.csa);
727         s->tx_info.csa = NULL;
728     }
729     /*endif*/
730 
731     if (s->rx_info.nsf)
732     {
733         span_free(s->rx_info.nsf);
734         s->rx_info.nsf = NULL;
735     }
736     /*endif*/
737     s->rx_info.nsf_len = 0;
738     if (s->rx_info.nsc)
739     {
740         span_free(s->rx_info.nsc);
741         s->rx_info.nsc = NULL;
742     }
743     /*endif*/
744     s->rx_info.nsc_len = 0;
745     if (s->rx_info.nss)
746     {
747         span_free(s->rx_info.nss);
748         s->rx_info.nss = NULL;
749     }
750     /*endif*/
751     s->rx_info.nss_len = 0;
752     if (s->rx_info.tsa)
753     {
754         span_free(s->rx_info.tsa);
755         s->rx_info.tsa = NULL;
756     }
757     /*endif*/
758     if (s->rx_info.ira)
759     {
760         span_free(s->rx_info.ira);
761         s->rx_info.ira = NULL;
762     }
763     /*endif*/
764     if (s->rx_info.cia)
765     {
766         span_free(s->rx_info.cia);
767         s->rx_info.cia = NULL;
768     }
769     /*endif*/
770     if (s->rx_info.isp)
771     {
772         span_free(s->rx_info.isp);
773         s->rx_info.isp = NULL;
774     }
775     /*endif*/
776     if (s->rx_info.csa)
777     {
778         span_free(s->rx_info.csa);
779         s->rx_info.csa = NULL;
780     }
781     /*endif*/
782 }
783 /*- End of function --------------------------------------------------------*/
784 
check_next_tx_step(t30_state_t * s)785 static uint8_t check_next_tx_step(t30_state_t *s)
786 {
787     int res;
788     int more;
789 
790     res = t4_tx_next_page_has_different_format(&s->t4.tx);
791     if (res == 0)
792     {
793         span_log(&s->logging, SPAN_LOG_FLOW, "More pages to come with the same format\n");
794         return (s->local_interrupt_pending)  ?  T30_PRI_MPS  :  T30_MPS;
795     }
796     /*endif*/
797     if (res > 0)
798     {
799         span_log(&s->logging, SPAN_LOG_FLOW, "More pages to come with a different format\n");
800         s->tx_start_page = t4_tx_get_current_page_in_file(&s->t4.tx) + 1;
801         return (s->local_interrupt_pending)  ?  T30_PRI_EOM  :  T30_EOM;
802     }
803     /*endif*/
804     /* Call a user handler, if one is set, to check if another document is to be sent.
805        If so, we send an EOM, rather than an EOP. Then we will renegotiate, and the new
806        document will begin. */
807     if (s->document_handler)
808         more = s->document_handler(s->document_user_data, 0);
809     else
810         more = false;
811     /*endif*/
812     if (more)
813     {
814         span_log(&s->logging, SPAN_LOG_FLOW, "Another document to send\n");
815         //if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_MULTIPLE_SELECTIVE_POLLING_CAPABLE))
816         //    return T30_EOS;
817         ///*endif*/
818         return (s->local_interrupt_pending)  ?  T30_PRI_EOM  :  T30_EOM;
819     }
820     /*endif*/
821     span_log(&s->logging, SPAN_LOG_FLOW, "No more pages to send\n");
822     return (s->local_interrupt_pending)  ?  T30_PRI_EOP  :  T30_EOP;
823 }
824 /*- End of function --------------------------------------------------------*/
825 
get_partial_ecm_page(t30_state_t * s)826 static int get_partial_ecm_page(t30_state_t *s)
827 {
828     int i;
829     int len;
830 
831     s->ppr_count = 0;
832     s->ecm_progress = 0;
833     /* Fill our partial page buffer with a partial page. Use the negotiated preferred frame size
834        as the basis for the size of the frames produced. */
835     /* We fill the buffer with complete HDLC frames, ready to send out. */
836     /* The frames are all marked as not being final frames. When sent, the are followed by a partial
837        page signal, which is marked as the final frame. */
838     for (i = 3;  i < 32 + 3;  i++)
839         s->ecm_frame_map[i] = 0xFF;
840     /*endfor*/
841     for (i = 0;  i < 256;  i++)
842     {
843         s->ecm_len[i] = -1;
844         s->ecm_data[i][0] = ADDRESS_FIELD;
845         s->ecm_data[i][1] = CONTROL_FIELD_NON_FINAL_FRAME;
846         s->ecm_data[i][2] = T4_FCD;
847         /* These frames contain a frame sequence number within the partial page (one octet) followed
848            by some image data. */
849         s->ecm_data[i][3] = (uint8_t) i;
850         if (s->document_get_handler)
851             len = s->document_get_handler(s->document_get_user_data, &s->ecm_data[i][4], s->octets_per_ecm_frame);
852         else
853             len = t4_tx_get(&s->t4.tx, &s->ecm_data[i][4], s->octets_per_ecm_frame);
854         /*endif*/
855         if (len < s->octets_per_ecm_frame)
856         {
857             /* The document is not big enough to fill the entire buffer */
858             /* We need to pad to a full frame, as most receivers expect that. */
859             if (len > 0)
860             {
861                 memset(&s->ecm_data[i][4 + len], 0, s->octets_per_ecm_frame - len);
862                 s->ecm_len[i++] = (int16_t) (s->octets_per_ecm_frame + 4);
863             }
864             /*endif*/
865             s->ecm_frames = i;
866             span_log(&s->logging, SPAN_LOG_FLOW, "Partial document buffer contains %d frames (%d per frame)\n", i, s->octets_per_ecm_frame);
867             s->ecm_at_page_end = true;
868             return i;
869         }
870         /*endif*/
871         s->ecm_len[i] = (int16_t) (4 + len);
872     }
873     /*endfor*/
874     /* We filled the entire buffer */
875     s->ecm_frames = 256;
876     span_log(&s->logging, SPAN_LOG_FLOW, "Partial page buffer full (%d per frame)\n", s->octets_per_ecm_frame);
877     s->ecm_at_page_end = (t4_tx_image_complete(&s->t4.tx) == SIG_STATUS_END_OF_DATA);
878     return 256;
879 }
880 /*- End of function --------------------------------------------------------*/
881 
send_next_ecm_frame(t30_state_t * s)882 static int send_next_ecm_frame(t30_state_t *s)
883 {
884     int i;
885     uint8_t frame[3];
886 
887     if (s->ecm_current_tx_frame < s->ecm_frames)
888     {
889         /* Search for the next frame, within the current partial page, which has
890            not been tagged as transferred OK. */
891         for (i = s->ecm_current_tx_frame;  i < s->ecm_frames;  i++)
892         {
893             if (s->ecm_len[i] >= 0)
894             {
895                 send_frame(s, s->ecm_data[i], s->ecm_len[i]);
896                 s->ecm_current_tx_frame = i + 1;
897                 s->ecm_frames_this_tx_burst++;
898                 return 0;
899             }
900             /*endif*/
901         }
902         /*endfor*/
903         s->ecm_current_tx_frame = s->ecm_frames;
904     }
905     /*endif*/
906     if (s->ecm_current_tx_frame < s->ecm_frames + 3)
907     {
908         /* We have sent all the FCD frames. Send three RCP frames, as per
909            T.4/A.1 and T.4/A.2. The repeats are to minimise the risk of a bit
910            error stopping the receiving end from recognising the RCP. */
911         s->ecm_current_tx_frame++;
912         /* The RCP frame is an odd man out, as its a simple 1 byte control
913            frame, but is specified to not have the final bit set. It doesn't
914            seem to have the DIS received bit set, either. */
915         frame[0] = ADDRESS_FIELD;
916         frame[1] = CONTROL_FIELD_NON_FINAL_FRAME;
917         frame[2] = T4_RCP;
918         send_frame(s, frame, 3);
919         /* In case we are just after a CTC/CTR exchange, which kicked us back
920            to long training */
921         s->short_train = true;
922         return 0;
923     }
924     /*endif*/
925     return -1;
926 }
927 /*- End of function --------------------------------------------------------*/
928 
send_rr(t30_state_t * s)929 static void send_rr(t30_state_t *s)
930 {
931     if (s->current_status != T30_ERR_TX_T5EXP)
932         send_simple_frame(s, T30_RR);
933     else
934         send_dcn(s);
935     /*endif*/
936 }
937 /*- End of function --------------------------------------------------------*/
938 
send_first_ecm_frame(t30_state_t * s)939 static int send_first_ecm_frame(t30_state_t *s)
940 {
941     s->ecm_current_tx_frame = 0;
942     s->ecm_frames_this_tx_burst = 0;
943     return send_next_ecm_frame(s);
944 }
945 /*- End of function --------------------------------------------------------*/
946 
print_frame(t30_state_t * s,const char * io,const uint8_t * msg,int len)947 static void print_frame(t30_state_t *s, const char *io, const uint8_t *msg, int len)
948 {
949     span_log(&s->logging,
950              SPAN_LOG_FLOW,
951              "%s %s with%s final frame tag\n",
952              io,
953              t30_frametype(msg[2]),
954              (msg[1] & 0x10)  ?  ""  :  "out");
955     span_log_buf(&s->logging, SPAN_LOG_FLOW, io, msg, len);
956 }
957 /*- End of function --------------------------------------------------------*/
958 
shut_down_hdlc_tx(t30_state_t * s)959 static void shut_down_hdlc_tx(t30_state_t *s)
960 {
961     if (s->send_hdlc_handler)
962         s->send_hdlc_handler(s->send_hdlc_user_data, NULL, 0);
963     /*endif*/
964 }
965 /*- End of function --------------------------------------------------------*/
966 
send_frame(t30_state_t * s,const uint8_t * msg,int len)967 static void send_frame(t30_state_t *s, const uint8_t *msg, int len)
968 {
969     print_frame(s, "Tx: ", msg, len);
970 
971     if (s->real_time_frame_handler)
972         s->real_time_frame_handler(s->real_time_frame_user_data, false, msg, len);
973     /*endif*/
974     if (s->send_hdlc_handler)
975         s->send_hdlc_handler(s->send_hdlc_user_data, msg, len);
976     /*endif*/
977 }
978 /*- End of function --------------------------------------------------------*/
979 
send_simple_frame(t30_state_t * s,int type)980 static void send_simple_frame(t30_state_t *s, int type)
981 {
982     uint8_t frame[3];
983 
984     /* The simple command/response frames are always final frames */
985     frame[0] = ADDRESS_FIELD;
986     frame[1] = CONTROL_FIELD_FINAL_FRAME;
987     frame[2] = (uint8_t) (type | s->dis_received);
988     send_frame(s, frame, 3);
989 }
990 /*- End of function --------------------------------------------------------*/
991 
send_20digit_msg_frame(t30_state_t * s,int cmd,char * msg)992 static void send_20digit_msg_frame(t30_state_t *s, int cmd, char *msg)
993 {
994     size_t len;
995     int p;
996     uint8_t frame[23];
997 
998     len = strlen(msg);
999     p = 0;
1000     frame[p++] = ADDRESS_FIELD;
1001     frame[p++] = CONTROL_FIELD_NON_FINAL_FRAME;
1002     frame[p++] = (uint8_t) (cmd | s->dis_received);
1003     while (len > 0)
1004         frame[p++] = msg[--len];
1005     /*endwhile*/
1006     while (p < 23)
1007         frame[p++] = ' ';
1008     /*endwhile*/
1009     send_frame(s, frame, 23);
1010 }
1011 /*- End of function --------------------------------------------------------*/
1012 
send_nsf_frame(t30_state_t * s)1013 static int send_nsf_frame(t30_state_t *s)
1014 {
1015     /* Only send if there is an NSF message to send. */
1016     if (s->tx_info.nsf  &&  s->tx_info.nsf_len)
1017     {
1018         span_log(&s->logging, SPAN_LOG_FLOW, "Sending user supplied NSF - %d octets\n", s->tx_info.nsf_len);
1019         s->tx_info.nsf[0] = ADDRESS_FIELD;
1020         s->tx_info.nsf[1] = CONTROL_FIELD_NON_FINAL_FRAME;
1021         s->tx_info.nsf[2] = T30_NSF;
1022         send_frame(s, s->tx_info.nsf, s->tx_info.nsf_len + 3);
1023         return true;
1024     }
1025     /*endif*/
1026     return false;
1027 }
1028 /*- End of function --------------------------------------------------------*/
1029 
send_nss_frame(t30_state_t * s)1030 static int send_nss_frame(t30_state_t *s)
1031 {
1032     /* Only send if there is an NSF message to send. */
1033     if (s->tx_info.nss  &&  s->tx_info.nss_len)
1034     {
1035         span_log(&s->logging, SPAN_LOG_FLOW, "Sending user supplied NSS - %d octets\n", s->tx_info.nss_len);
1036         s->tx_info.nss[0] = ADDRESS_FIELD;
1037         s->tx_info.nss[1] = CONTROL_FIELD_NON_FINAL_FRAME;
1038         s->tx_info.nss[2] = (uint8_t) (T30_NSS | s->dis_received);
1039         send_frame(s, s->tx_info.nss, s->tx_info.nss_len + 3);
1040         return true;
1041     }
1042     /*endif*/
1043     return false;
1044 }
1045 /*- End of function --------------------------------------------------------*/
1046 
send_nsc_frame(t30_state_t * s)1047 static int send_nsc_frame(t30_state_t *s)
1048 {
1049     /* Only send if there is an NSF message to send. */
1050     if (s->tx_info.nsc  &&  s->tx_info.nsc_len)
1051     {
1052         span_log(&s->logging, SPAN_LOG_FLOW, "Sending user supplied NSC - %d octets\n", s->tx_info.nsc_len);
1053         s->tx_info.nsc[0] = ADDRESS_FIELD;
1054         s->tx_info.nsc[1] = CONTROL_FIELD_NON_FINAL_FRAME;
1055         s->tx_info.nsc[2] = T30_NSC;
1056         send_frame(s, s->tx_info.nsc, s->tx_info.nsc_len + 3);
1057         return true;
1058     }
1059     /*endif*/
1060     return false;
1061 }
1062 /*- End of function --------------------------------------------------------*/
1063 
send_ident_frame(t30_state_t * s,uint8_t cmd)1064 static int send_ident_frame(t30_state_t *s, uint8_t cmd)
1065 {
1066     if (s->tx_info.ident[0])
1067     {
1068         span_log(&s->logging, SPAN_LOG_FLOW, "Sending ident '%s'\n", s->tx_info.ident);
1069         /* 'cmd' should be T30_TSI, T30_CIG or T30_CSI */
1070         send_20digit_msg_frame(s, cmd, s->tx_info.ident);
1071         return true;
1072     }
1073     /*endif*/
1074     return false;
1075 }
1076 /*- End of function --------------------------------------------------------*/
1077 
send_psa_frame(t30_state_t * s)1078 static int send_psa_frame(t30_state_t *s)
1079 {
1080     if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_POLLED_SUBADDRESSING_CAPABLE)  &&  s->tx_info.polled_sub_address[0])
1081     {
1082         span_log(&s->logging, SPAN_LOG_FLOW, "Sending polled sub-address '%s'\n", s->tx_info.polled_sub_address);
1083         send_20digit_msg_frame(s, T30_PSA, s->tx_info.polled_sub_address);
1084         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_POLLED_SUBADDRESSING_CAPABLE);
1085         return true;
1086     }
1087     /*endif*/
1088     clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_POLLED_SUBADDRESSING_CAPABLE);
1089     return false;
1090 }
1091 /*- End of function --------------------------------------------------------*/
1092 
send_sep_frame(t30_state_t * s)1093 static int send_sep_frame(t30_state_t *s)
1094 {
1095     if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_SELECTIVE_POLLING_CAPABLE)  &&  s->tx_info.selective_polling_address[0])
1096     {
1097         span_log(&s->logging, SPAN_LOG_FLOW, "Sending selective polling address '%s'\n", s->tx_info.selective_polling_address);
1098         send_20digit_msg_frame(s, T30_SEP, s->tx_info.selective_polling_address);
1099         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SELECTIVE_POLLING_CAPABLE);
1100         return true;
1101     }
1102     /*endif*/
1103     clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SELECTIVE_POLLING_CAPABLE);
1104     return false;
1105 }
1106 /*- End of function --------------------------------------------------------*/
1107 
send_sid_frame(t30_state_t * s)1108 static int send_sid_frame(t30_state_t *s)
1109 {
1110     /* Only send if there is an ID to send. */
1111     if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_PASSWORD)  &&  s->tx_info.sender_ident[0])
1112     {
1113         span_log(&s->logging, SPAN_LOG_FLOW, "Sending sender identification '%s'\n", s->tx_info.sender_ident);
1114         send_20digit_msg_frame(s, T30_SID, s->tx_info.sender_ident);
1115         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_SENDER_ID_TRANSMISSION);
1116         return true;
1117     }
1118     /*endif*/
1119     clr_ctrl_bit(s->dcs_frame, T30_DCS_BIT_SENDER_ID_TRANSMISSION);
1120     return false;
1121 }
1122 /*- End of function --------------------------------------------------------*/
1123 
send_pwd_frame(t30_state_t * s)1124 static int send_pwd_frame(t30_state_t *s)
1125 {
1126     /* Only send if there is a password to send. */
1127     if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_PASSWORD)  &&  s->tx_info.password[0])
1128     {
1129         span_log(&s->logging, SPAN_LOG_FLOW, "Sending password '%s'\n", s->tx_info.password);
1130         send_20digit_msg_frame(s, T30_PWD, s->tx_info.password);
1131         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_PASSWORD);
1132         return true;
1133     }
1134     /*endif*/
1135     clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_PASSWORD);
1136     return false;
1137 }
1138 /*- End of function --------------------------------------------------------*/
1139 
send_sub_frame(t30_state_t * s)1140 static int send_sub_frame(t30_state_t *s)
1141 {
1142     /* Only send if there is a sub-address to send. */
1143     if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_SUBADDRESSING_CAPABLE)  &&  s->tx_info.sub_address[0])
1144     {
1145         span_log(&s->logging, SPAN_LOG_FLOW, "Sending sub-address '%s'\n", s->tx_info.sub_address);
1146         send_20digit_msg_frame(s, T30_SUB, s->tx_info.sub_address);
1147         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_SUBADDRESS_TRANSMISSION);
1148         return true;
1149     }
1150     /*endif*/
1151     clr_ctrl_bit(s->dcs_frame, T30_DCS_BIT_SUBADDRESS_TRANSMISSION);
1152     return false;
1153 }
1154 /*- End of function --------------------------------------------------------*/
1155 
send_tsa_frame(t30_state_t * s)1156 static int send_tsa_frame(t30_state_t *s)
1157 {
1158     if ((test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T37)  ||  test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38))  &&  0)
1159     {
1160         span_log(&s->logging, SPAN_LOG_FLOW, "Sending transmitting subscriber internet address '%s'\n", "");
1161         return true;
1162     }
1163     /*endif*/
1164     return false;
1165 }
1166 /*- End of function --------------------------------------------------------*/
1167 
send_ira_frame(t30_state_t * s)1168 static int send_ira_frame(t30_state_t *s)
1169 {
1170     if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_INTERNET_ROUTING_ADDRESS)  &&  0)
1171     {
1172         span_log(&s->logging, SPAN_LOG_FLOW, "Sending internet routing address '%s'\n", "");
1173         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INTERNET_ROUTING_ADDRESS_TRANSMISSION);
1174         return true;
1175     }
1176     /*endif*/
1177     clr_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INTERNET_ROUTING_ADDRESS_TRANSMISSION);
1178     return false;
1179 }
1180 /*- End of function --------------------------------------------------------*/
1181 
send_cia_frame(t30_state_t * s)1182 static int send_cia_frame(t30_state_t *s)
1183 {
1184     if ((test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T37)  ||  test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38))  &&  0)
1185     {
1186         span_log(&s->logging, SPAN_LOG_FLOW, "Sending calling subscriber internet address '%s'\n", "");
1187         return true;
1188     }
1189     /*endif*/
1190     return false;
1191 }
1192 /*- End of function --------------------------------------------------------*/
1193 
send_isp_frame(t30_state_t * s)1194 static int send_isp_frame(t30_state_t *s)
1195 {
1196     if (test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_INTERNET_SELECTIVE_POLLING_ADDRESS)  &&  0)
1197     {
1198         span_log(&s->logging, SPAN_LOG_FLOW, "Sending internet selective polling address '%s'\n", "");
1199         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_INTERNET_SELECTIVE_POLLING_ADDRESS);
1200         return true;
1201     }
1202     /*endif*/
1203     clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_INTERNET_SELECTIVE_POLLING_ADDRESS);
1204     return false;
1205 }
1206 /*- End of function --------------------------------------------------------*/
1207 
send_csa_frame(t30_state_t * s)1208 static int send_csa_frame(t30_state_t *s)
1209 {
1210 #if 0
1211     if (("in T.37 mode"  ||  "in T.38 mode")  &&  0)
1212     {
1213         span_log(&s->logging, SPAN_LOG_FLOW, "Sending called subscriber internet address '%s'\n", "");
1214         return true;
1215     }
1216     /*endif*/
1217 #endif
1218     return false;
1219 }
1220 /*- End of function --------------------------------------------------------*/
1221 
send_pps_frame(t30_state_t * s)1222 static int send_pps_frame(t30_state_t *s)
1223 {
1224     uint8_t frame[7];
1225 
1226     frame[0] = ADDRESS_FIELD;
1227     frame[1] = CONTROL_FIELD_FINAL_FRAME;
1228     frame[2] = (uint8_t) (T30_PPS | s->dis_received);
1229     frame[3] = (s->ecm_at_page_end)  ?  ((uint8_t) (s->next_tx_step | s->dis_received))  :  T30_NULL;
1230     frame[4] = (uint8_t) (s->tx_page_number & 0xFF);
1231     frame[5] = (uint8_t) (s->ecm_block & 0xFF);
1232     frame[6] = (uint8_t) ((s->ecm_frames_this_tx_burst == 0)  ?  0  :  (s->ecm_frames_this_tx_burst - 1));
1233     span_log(&s->logging, SPAN_LOG_FLOW, "Sending PPS-%s\n", t30_frametype(frame[3]));
1234     send_frame(s, frame, 7);
1235     return frame[3] & 0xFE;
1236 }
1237 /*- End of function --------------------------------------------------------*/
1238 
t30_build_dis_or_dtc(t30_state_t * s)1239 int t30_build_dis_or_dtc(t30_state_t *s)
1240 {
1241     int i;
1242 
1243     /* Build a skeleton for the DIS and DTC messages. This will be edited for
1244        the dynamically changing capabilities (e.g. can receive) just before
1245        it is sent. It might also be edited if the application changes our
1246        capabilities (e.g. disabling fine mode). Right now we set up all the
1247        unchanging stuff about what we are capable of doing. */
1248     s->local_dis_dtc_frame[0] = ADDRESS_FIELD;
1249     s->local_dis_dtc_frame[1] = CONTROL_FIELD_FINAL_FRAME;
1250     s->local_dis_dtc_frame[2] = (uint8_t) (T30_DIS | s->dis_received);
1251     for (i = 3;  i < T30_MAX_DIS_DTC_DCS_LEN;  i++)
1252         s->local_dis_dtc_frame[i] = 0x00;
1253     /*endfor*/
1254 
1255     /* Always say 256 octets per ECM frame preferred, as 64 is never used in the
1256        real world. */
1257     if ((s->iaf & T30_IAF_MODE_T37))
1258         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T37);
1259     /*endif*/
1260     if ((s->iaf & T30_IAF_MODE_T38))
1261         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T38);
1262     /*endif*/
1263     /* No 3G mobile  */
1264     /* No V.8 */
1265     /* 256 octets preferred - don't bother making this optional, as everything uses 256 */
1266     /* Ready to transmit a fax (polling) will be determined separately, and this message edited. */
1267     /* Ready to receive a fax will be determined separately, and this message edited. */
1268     /* With no modems set we are actually selecting V.27ter fallback at 2400bps */
1269     if ((s->supported_modems & T30_SUPPORT_V27TER))
1270         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_MODEM_TYPE_2);
1271     /*endif*/
1272     if ((s->supported_modems & T30_SUPPORT_V29))
1273         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_MODEM_TYPE_1);
1274     /*endif*/
1275     /* V.17 is only valid when combined with V.29 and V.27ter, so if we enable V.17 we force the others too. */
1276     if ((s->supported_modems & T30_SUPPORT_V17))
1277         s->local_dis_dtc_frame[4] |= (DISBIT6 | DISBIT4 | DISBIT3);
1278     /*endif*/
1279 
1280     /* 215mm wide is always supported */
1281     if ((s->supported_image_sizes & T4_SUPPORT_WIDTH_303MM))
1282         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_215MM_255MM_303MM_WIDTH_CAPABLE);
1283     else if ((s->supported_image_sizes & T4_SUPPORT_WIDTH_255MM))
1284         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_215MM_255MM_WIDTH_CAPABLE);
1285     /*endif*/
1286 
1287     /* A4 is always supported. */
1288     if ((s->supported_image_sizes & T4_SUPPORT_LENGTH_UNLIMITED))
1289         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_UNLIMITED_LENGTH_CAPABLE);
1290     else if ((s->supported_image_sizes & T4_SUPPORT_LENGTH_B4))
1291         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_A4_B4_LENGTH_CAPABLE);
1292     /*endif*/
1293     if ((s->supported_image_sizes & T4_SUPPORT_LENGTH_US_LETTER))
1294         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_NORTH_AMERICAN_LETTER_CAPABLE);
1295     /*endif*/
1296     if ((s->supported_image_sizes & T4_SUPPORT_LENGTH_US_LEGAL))
1297         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_NORTH_AMERICAN_LEGAL_CAPABLE);
1298     /*endif*/
1299 
1300     /* No scan-line padding required, but some may be specified by the application. */
1301     set_ctrl_bits(s->local_dis_dtc_frame, s->local_min_scan_time_code, T30_DIS_BIT_MIN_SCAN_LINE_TIME_CAPABILITY_1);
1302 
1303     if ((s->supported_compressions & T4_COMPRESSION_T4_2D))
1304         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_2D_CAPABLE);
1305     /*endif*/
1306     if ((s->supported_compressions & T4_COMPRESSION_NONE))
1307         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_UNCOMPRESSED_CAPABLE);
1308     /*endif*/
1309     if (s->ecm_allowed)
1310     {
1311         /* ECM allowed */
1312         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_ECM_CAPABLE);
1313 
1314         /* Only offer the option of fancy compression schemes, if we are
1315            also offering the ECM option needed to support them. */
1316         if ((s->supported_compressions & T4_COMPRESSION_T6))
1317             set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T6_CAPABLE);
1318         /*endif*/
1319         if ((s->supported_compressions & T4_COMPRESSION_T85))
1320         {
1321             set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T85_CAPABLE);
1322             /* Bit 79 set with bit 78 clear is invalid, so only check for L0
1323                support here. */
1324             if ((s->supported_compressions & T4_COMPRESSION_T85_L0))
1325                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T85_L0_CAPABLE);
1326             /*endif*/
1327         }
1328         /*endif*/
1329 
1330         //if ((s->supported_compressions & T4_COMPRESSION_T88))
1331         //{
1332         //    set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T88_CAPABILITY_1);
1333         //    set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T88_CAPABILITY_2);
1334         //    set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T88_CAPABILITY_3);
1335         //}
1336         ///*endif*/
1337 
1338         if ((s->supported_compressions & (T4_COMPRESSION_COLOUR | T4_COMPRESSION_GRAYSCALE)))
1339         {
1340             if ((s->supported_compressions & T4_COMPRESSION_COLOUR))
1341                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_FULL_COLOUR_CAPABLE);
1342             /*endif*/
1343 
1344             if ((s->supported_compressions & T4_COMPRESSION_T42_T81))
1345                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T81_CAPABLE);
1346             /*endif*/
1347             if ((s->supported_compressions & T4_COMPRESSION_T43))
1348             {
1349                 /* Note 25 of table 2/T.30 */
1350                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T81_CAPABLE);
1351                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T43_CAPABLE);
1352                 /* No plane interleave */
1353             }
1354             /*endif*/
1355             if ((s->supported_compressions & T4_COMPRESSION_T45))
1356                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T45_CAPABLE);
1357             /*endif*/
1358             if ((s->supported_compressions & T4_COMPRESSION_SYCC_T81))
1359             {
1360                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T81_CAPABLE);
1361                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SYCC_T81_CAPABLE);
1362             }
1363             /*endif*/
1364 
1365             if ((s->supported_compressions & T4_COMPRESSION_12BIT))
1366                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_12BIT_CAPABLE);
1367             /*endif*/
1368 
1369             if ((s->supported_compressions & T4_COMPRESSION_NO_SUBSAMPLING))
1370                 set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_NO_SUBSAMPLING);
1371             /*endif*/
1372 
1373             /* No custom illuminant */
1374             /* No custom gamut range */
1375         }
1376         /*endif*/
1377     }
1378     /*endif*/
1379     if ((s->supported_t30_features & T30_SUPPORT_FIELD_NOT_VALID))
1380         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_FNV_CAPABLE);
1381     /*endif*/
1382     if ((s->supported_t30_features & T30_SUPPORT_MULTIPLE_SELECTIVE_POLLING))
1383         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_MULTIPLE_SELECTIVE_POLLING_CAPABLE);
1384     /*endif*/
1385     if ((s->supported_t30_features & T30_SUPPORT_POLLED_SUB_ADDRESSING))
1386         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_POLLED_SUBADDRESSING_CAPABLE);
1387     /*endif*/
1388     if ((s->supported_t30_features & T30_SUPPORT_SELECTIVE_POLLING))
1389         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SELECTIVE_POLLING_CAPABLE);
1390     /*endif*/
1391     if ((s->supported_t30_features & T30_SUPPORT_SUB_ADDRESSING))
1392         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_SUBADDRESSING_CAPABLE);
1393     /*endif*/
1394     if ((s->supported_t30_features & T30_SUPPORT_IDENTIFICATION))
1395         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_PASSWORD);
1396     /*endif*/
1397 
1398     /* No G.726 */
1399     /* No extended voice coding */
1400     /* Superfine minimum scan line time pattern follows fine */
1401 
1402     /* Ready to transmit a data file (polling) */
1403     if (s->tx_file[0])
1404         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_TRANSMIT_DATA_FILE);
1405     /*endif*/
1406 
1407     /* No simple phase C BFT negotiations */
1408     /* No extended BFT negotiations */
1409     /* No Binary file transfer (BFT) */
1410     /* No Document transfer mode (DTM) */
1411     /* No Electronic data interchange (EDI) */
1412     /* No Basic transfer mode (BTM) */
1413     /* No mixed mode (polling) */
1414     /* No character mode */
1415     /* No mixed mode (T.4/Annex E) */
1416     /* No mode 26 (T.505) */
1417     /* No digital network capability */
1418     /* No duplex operation */
1419 
1420     /* No HKM key management */
1421     /* No RSA key management */
1422     /* No override */
1423     /* No HFX40 cipher */
1424     /* No alternative cipher number 2 */
1425     /* No alternative cipher number 3 */
1426     /* No HFX40-I hashing */
1427     /* No alternative hashing system number 2 */
1428     /* No alternative hashing system number 3 */
1429 
1430     /* No T.44 (mixed raster content) */
1431     /* No page length maximum strip size for T.44 (mixed raster content) */
1432 
1433     if ((s->supported_t30_features & T30_SUPPORT_INTERNET_SELECTIVE_POLLING_ADDRESS))
1434         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_INTERNET_SELECTIVE_POLLING_ADDRESS);
1435     /*endif*/
1436     if ((s->supported_t30_features & T30_SUPPORT_INTERNET_ROUTING_ADDRESS))
1437         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_INTERNET_ROUTING_ADDRESS);
1438     /*endif*/
1439 
1440     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_1200_1200))
1441     {
1442         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_1200_1200_CAPABLE);
1443         if ((s->supported_colour_resolutions & T4_RESOLUTION_1200_1200))
1444             set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_1200_1200_CAPABLE);
1445         /*endif*/
1446     }
1447     /*endif*/
1448     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_600_1200))
1449         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_600_1200_CAPABLE);
1450     /*endif*/
1451     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_600_600))
1452     {
1453         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_600_600_CAPABLE);
1454         if ((s->supported_colour_resolutions & T4_RESOLUTION_600_600))
1455             set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_600_600_CAPABLE);
1456         /*endif*/
1457     }
1458     /*endif*/
1459     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_400_800))
1460         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_400_800_CAPABLE);
1461     /*endif*/
1462     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_R16_SUPERFINE))
1463         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_400_400_CAPABLE);
1464     /*endif*/
1465     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_400_400))
1466     {
1467         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_400_400_CAPABLE);
1468         if ((s->supported_colour_resolutions & T4_RESOLUTION_400_400))
1469             set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_300_300_400_400_CAPABLE);
1470         /*endif*/
1471     }
1472     /*endif*/
1473     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_300_600))
1474         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_300_600_CAPABLE);
1475     /*endif*/
1476     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_300_300))
1477     {
1478         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_300_300_CAPABLE);
1479         if ((s->supported_colour_resolutions & T4_RESOLUTION_300_300))
1480             set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_300_300_400_400_CAPABLE);
1481         /*endif*/
1482     }
1483     /*endif*/
1484     if ((s->supported_bilevel_resolutions & (T4_RESOLUTION_200_400 | T4_RESOLUTION_R8_SUPERFINE)))
1485         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_200_400_CAPABLE);
1486     /*endif*/
1487     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_R8_FINE))
1488         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_200_200_CAPABLE);
1489     /*endif*/
1490     if ((s->supported_bilevel_resolutions & T4_RESOLUTION_200_200))
1491     {
1492         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_200_200_CAPABLE);
1493         if ((s->supported_colour_resolutions & T4_RESOLUTION_200_200))
1494             set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_FULL_COLOUR_CAPABLE);
1495         /*endif*/
1496     }
1497     /*endif*/
1498     /* Standard FAX resolution bi-level image support goes without saying */
1499     if ((s->supported_colour_resolutions & T4_RESOLUTION_100_100))
1500         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_100_100_CAPABLE);
1501     /*endif*/
1502 
1503     if ((s->supported_bilevel_resolutions & (T4_RESOLUTION_R8_STANDARD | T4_RESOLUTION_R8_FINE | T4_RESOLUTION_R8_SUPERFINE | T4_RESOLUTION_R16_SUPERFINE)))
1504         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_METRIC_RESOLUTION_PREFERRED);
1505     /*endif*/
1506     if ((s->supported_bilevel_resolutions & (T4_RESOLUTION_200_100 | T4_RESOLUTION_200_200 | T4_RESOLUTION_200_400 | T4_RESOLUTION_300_300 | T4_RESOLUTION_300_600 | T4_RESOLUTION_400_400 | T4_RESOLUTION_400_800 | T4_RESOLUTION_600_600 | T4_RESOLUTION_600_1200 | T4_RESOLUTION_1200_1200)))
1507         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_INCH_RESOLUTION_PREFERRED);
1508     /*endif*/
1509 
1510     /* No double sided printing (alternate mode) */
1511     /* No double sided printing (continuous mode) */
1512 
1513     /* No black and white mixed raster content profile */
1514     /* No shared data memory */
1515     /* No T.44 colour space */
1516 
1517     if ((s->iaf & T30_IAF_MODE_FLOW_CONTROL))
1518         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T38_FLOW_CONTROL_CAPABLE);
1519     /*endif*/
1520     /* No k > 4 */
1521     if ((s->iaf & T30_IAF_MODE_CONTINUOUS_FLOW))
1522         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_T38_FAX_CAPABLE);
1523     /*endif*/
1524     /* No T.88/T.89 profile */
1525     s->local_dis_dtc_len = 19;
1526     return 0;
1527 }
1528 /*- End of function --------------------------------------------------------*/
1529 
set_dis_or_dtc(t30_state_t * s)1530 static int set_dis_or_dtc(t30_state_t *s)
1531 {
1532     /* Whether we use a DIS or a DTC is determined by whether we have received a DIS.
1533        We just need to edit the prebuilt message. */
1534     s->local_dis_dtc_frame[2] = (uint8_t) (T30_DIS | s->dis_received);
1535     /* If we have a file name to receive into, then we are receive capable */
1536     if (s->rx_file[0])
1537         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_RECEIVE_FAX_DOCUMENT);
1538     else
1539         clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_RECEIVE_FAX_DOCUMENT);
1540     /*endif*/
1541     /* If we have a file name to transmit, then we are ready to transmit (polling) */
1542     if (s->tx_file[0])
1543         set_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_TRANSMIT_FAX_DOCUMENT);
1544     else
1545         clr_ctrl_bit(s->local_dis_dtc_frame, T30_DIS_BIT_READY_TO_TRANSMIT_FAX_DOCUMENT);
1546     /*endif*/
1547     return 0;
1548 }
1549 /*- End of function --------------------------------------------------------*/
1550 
prune_dis_dtc(t30_state_t * s)1551 static int prune_dis_dtc(t30_state_t *s)
1552 {
1553     int i;
1554 
1555     /* Find the last octet that is really needed, set the extension bits, and trim the message length */
1556     for (i = T30_MAX_DIS_DTC_DCS_LEN - 1;  i >= 6;  i--)
1557     {
1558         /* Strip the top bit */
1559         s->local_dis_dtc_frame[i] &= (DISBIT1 | DISBIT2 | DISBIT3 | DISBIT4 | DISBIT5 | DISBIT6 | DISBIT7);
1560         /* Check if there is some real message content here */
1561         if (s->local_dis_dtc_frame[i])
1562             break;
1563         /*endif*/
1564     }
1565     /*endfor*/
1566     s->local_dis_dtc_len = i + 1;
1567     /* Fill in any required extension bits */
1568     s->local_dis_dtc_frame[i] &= ~DISBIT8;
1569     for (i--;  i > 4;  i--)
1570         s->local_dis_dtc_frame[i] |= DISBIT8;
1571     /*endfor*/
1572     t30_decode_dis_dtc_dcs(s, s->local_dis_dtc_frame, s->local_dis_dtc_len);
1573     return s->local_dis_dtc_len;
1574 }
1575 /*- End of function --------------------------------------------------------*/
1576 
build_dcs(t30_state_t * s)1577 static int build_dcs(t30_state_t *s)
1578 {
1579     int i;
1580     int use_bilevel;
1581     int image_type;
1582 
1583     /* Reacquire page information, in case the image was resized, flattened, etc. */
1584     s->current_page_resolution = t4_tx_get_tx_resolution(&s->t4.tx);
1585     s->x_resolution = t4_tx_get_tx_x_resolution(&s->t4.tx);
1586     s->y_resolution = t4_tx_get_tx_y_resolution(&s->t4.tx);
1587     s->image_width = t4_tx_get_tx_image_width(&s->t4.tx);
1588     image_type = t4_tx_get_tx_image_type(&s->t4.tx);
1589 
1590     /* Make a DCS frame based on local issues and the latest received DIS/DTC frame.
1591        Negotiate the result based on what both parties can do. */
1592     s->dcs_frame[0] = ADDRESS_FIELD;
1593     s->dcs_frame[1] = CONTROL_FIELD_FINAL_FRAME;
1594     s->dcs_frame[2] = (uint8_t) (T30_DCS | s->dis_received);
1595     for (i = 3;  i < T30_MAX_DIS_DTC_DCS_LEN;  i++)
1596         s->dcs_frame[i] = 0x00;
1597     /*endfor*/
1598 
1599     /* We have a file to send, so tell the far end to go into receive mode. */
1600     set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_RECEIVE_FAX_DOCUMENT);
1601 
1602 #if 0
1603     /* Check for T.37 simple mode. */
1604     if ((s->iaf & T30_IAF_MODE_T37)  &&  test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T37))
1605         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T37);
1606     /*endif*/
1607     /* Check for T.38 mode. */
1608     if ((s->iaf & T30_IAF_MODE_T38)  &&  test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38))
1609         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T38);
1610     /*endif*/
1611 #endif
1612 
1613     /* Set to required modem rate */
1614     s->dcs_frame[4] |= fallback_sequence[s->current_fallback].dcs_code;
1615 
1616     /* Select the compression to use. */
1617     use_bilevel = true;
1618     set_ctrl_bits(s->dcs_frame, s->min_scan_time_code, T30_DCS_BIT_MIN_SCAN_LINE_TIME_1);
1619     switch (s->line_compression)
1620     {
1621     case T4_COMPRESSION_T4_1D:
1622         /* There is nothing to set to select this encoding. */
1623         break;
1624     case T4_COMPRESSION_T4_2D:
1625         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_2D_MODE);
1626         break;
1627     case T4_COMPRESSION_T6:
1628         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T6_MODE);
1629         break;
1630     case T4_COMPRESSION_T85:
1631         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T85_MODE);
1632         break;
1633     case T4_COMPRESSION_T85_L0:
1634         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T85_L0_MODE);
1635         break;
1636 #if defined(SPANDSP_SUPPORT_T88)
1637     case T4_COMPRESSION_T88:
1638         break;
1639 #endif
1640     case T4_COMPRESSION_T42_T81:
1641         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T81_MODE);
1642         if (image_type == T4_IMAGE_TYPE_COLOUR_8BIT  ||  image_type == T4_IMAGE_TYPE_COLOUR_12BIT)
1643             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_FULL_COLOUR_MODE);
1644         /*endif*/
1645         if (image_type == T4_IMAGE_TYPE_GRAY_12BIT  ||  image_type == T4_IMAGE_TYPE_COLOUR_12BIT)
1646             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_12BIT_COMPONENT);
1647         /*endif*/
1648         //if (???????? & T4_COMPRESSION_NO_SUBSAMPLING))
1649         //    set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_NO_SUBSAMPLING);
1650         ///*endif*/
1651         //if (???????? & T4_COMPRESSION_?????))
1652         //    set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_PREFERRED_HUFFMAN_TABLES);
1653         ///*endif*/
1654         set_ctrl_bits(s->dcs_frame, T30_MIN_SCAN_0MS, T30_DCS_BIT_MIN_SCAN_LINE_TIME_1);
1655         use_bilevel = false;
1656         break;
1657     case T4_COMPRESSION_T43:
1658         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T43_MODE);
1659         if (image_type == T4_IMAGE_TYPE_COLOUR_8BIT  ||  image_type == T4_IMAGE_TYPE_COLOUR_12BIT)
1660             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_FULL_COLOUR_MODE);
1661         /*endif*/
1662         if (image_type == T4_IMAGE_TYPE_GRAY_12BIT  ||  image_type == T4_IMAGE_TYPE_COLOUR_12BIT)
1663             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_12BIT_COMPONENT);
1664         /*endif*/
1665         set_ctrl_bits(s->dcs_frame, T30_MIN_SCAN_0MS, T30_DCS_BIT_MIN_SCAN_LINE_TIME_1);
1666         use_bilevel = false;
1667         break;
1668 #if defined(SPANDSP_SUPPORT_T45)
1669     case T4_COMPRESSION_T45:
1670         use_bilevel = false;
1671         break;
1672 #endif
1673 #if defined(SPANDSP_SUPPORT_SYCC_T81)
1674     case T4_COMPRESSION_SYCC_T81:
1675         use_bilevel = false;
1676         break;
1677 #endif
1678     default:
1679         set_ctrl_bits(s->dcs_frame, T30_MIN_SCAN_0MS, T30_DCS_BIT_MIN_SCAN_LINE_TIME_1);
1680         break;
1681     }
1682     /*endswitch*/
1683 
1684     /* Set the image width */
1685     switch (s->line_width_code)
1686     {
1687     case T4_SUPPORT_WIDTH_215MM:
1688         span_log(&s->logging, SPAN_LOG_FLOW, "Image width is A4 at %ddpm x %ddpm\n", s->x_resolution, s->y_resolution);
1689         /* No width related bits need to be set. */
1690         break;
1691     case T4_SUPPORT_WIDTH_255MM:
1692         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_255MM_WIDTH);
1693         span_log(&s->logging, SPAN_LOG_FLOW, "Image width is B4 at %ddpm x %ddpm\n", s->x_resolution, s->y_resolution);
1694         break;
1695     case T4_SUPPORT_WIDTH_303MM:
1696         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_303MM_WIDTH);
1697         span_log(&s->logging, SPAN_LOG_FLOW, "Image width is A3 at %ddpm x %ddpm\n", s->x_resolution, s->y_resolution);
1698         break;
1699     }
1700     /*endswitch*/
1701 
1702     /* Set the image length */
1703     /* If the other end supports unlimited length, then use that. Otherwise, if the other end supports
1704        B4 use that, as its longer than the default A4 length. */
1705     if ((s->mutual_image_sizes & T4_SUPPORT_LENGTH_UNLIMITED))
1706         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_UNLIMITED_LENGTH);
1707     else if ((s->mutual_image_sizes & T4_SUPPORT_LENGTH_B4))
1708         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_B4_LENGTH);
1709     else if ((s->mutual_image_sizes & T4_SUPPORT_LENGTH_US_LETTER))
1710         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_NORTH_AMERICAN_LETTER);
1711     else if ((s->mutual_image_sizes & T4_SUPPORT_LENGTH_US_LEGAL))
1712         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_NORTH_AMERICAN_LEGAL);
1713     /*endif*/
1714 
1715     /* Set the Y resolution bits */
1716     switch (s->current_page_resolution)
1717     {
1718     case T4_RESOLUTION_1200_1200:
1719         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_1200_1200);
1720         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1721         if (!use_bilevel)
1722             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_COLOUR_GRAY_1200_1200);
1723         /*endif*/
1724         break;
1725     case T4_RESOLUTION_600_1200:
1726         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_600_1200);
1727         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1728         break;
1729     case T4_RESOLUTION_600_600:
1730         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_600_600);
1731         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1732         if (!use_bilevel)
1733             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_COLOUR_GRAY_600_600);
1734         /*endif*/
1735         break;
1736     case T4_RESOLUTION_400_800:
1737         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_400_800);
1738         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1739         break;
1740     case T4_RESOLUTION_400_400:
1741         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_400_400);
1742         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1743         if (!use_bilevel)
1744             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_COLOUR_GRAY_300_300_400_400);
1745         /*endif*/
1746         break;
1747     case T4_RESOLUTION_300_600:
1748         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_300_600);
1749         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1750         break;
1751     case T4_RESOLUTION_300_300:
1752         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_300_300);
1753         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1754         if (!use_bilevel)
1755             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_COLOUR_GRAY_300_300_400_400);
1756         /*endif*/
1757         break;
1758     case T4_RESOLUTION_200_400:
1759         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_200_400);
1760         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1761         break;
1762     case T4_RESOLUTION_200_200:
1763         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_200_200);
1764         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1765         if (!use_bilevel)
1766             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_FULL_COLOUR_MODE);
1767         /*endif*/
1768         break;
1769     case T4_RESOLUTION_200_100:
1770         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1771         break;
1772     case T4_RESOLUTION_100_100:
1773         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_INCH_RESOLUTION);
1774         if (!use_bilevel)
1775             set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_COLOUR_GRAY_100_100);
1776         /*endif*/
1777         break;
1778     case T4_RESOLUTION_R16_SUPERFINE:
1779         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_400_400);
1780         break;
1781     case T4_RESOLUTION_R8_SUPERFINE:
1782         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_200_400);
1783         break;
1784     case T4_RESOLUTION_R8_FINE:
1785         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_200_200);
1786         break;
1787     case T4_RESOLUTION_R8_STANDARD:
1788         /* Nothing special to set */
1789         break;
1790     }
1791     /*endswitch*/
1792 
1793     if (s->error_correcting_mode)
1794         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_ECM_MODE);
1795     /*endif*/
1796 
1797     if ((s->iaf & T30_IAF_MODE_FLOW_CONTROL)  &&  test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38_FLOW_CONTROL_CAPABLE))
1798         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T38_FLOW_CONTROL_CAPABLE);
1799     /*endif*/
1800 
1801     if ((s->iaf & T30_IAF_MODE_CONTINUOUS_FLOW)  &&  test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T38_FAX_CAPABLE))
1802     {
1803         /* Clear the modem type bits, in accordance with note 77 of Table 2/T.30 */
1804         clr_ctrl_bit(s->local_dis_dtc_frame, T30_DCS_BIT_MODEM_TYPE_1);
1805         clr_ctrl_bit(s->local_dis_dtc_frame, T30_DCS_BIT_MODEM_TYPE_2);
1806         clr_ctrl_bit(s->local_dis_dtc_frame, T30_DCS_BIT_MODEM_TYPE_3);
1807         clr_ctrl_bit(s->local_dis_dtc_frame, T30_DCS_BIT_MODEM_TYPE_4);
1808         set_ctrl_bit(s->dcs_frame, T30_DCS_BIT_T38_FAX_MODE);
1809     }
1810     /*endif*/
1811     s->dcs_len = 19;
1812     return 0;
1813 }
1814 /*- End of function --------------------------------------------------------*/
1815 
prune_dcs(t30_state_t * s)1816 static int prune_dcs(t30_state_t *s)
1817 {
1818     int i;
1819 
1820     /* Find the last octet that is really needed, set the extension bits, and trim the message length */
1821     for (i = T30_MAX_DIS_DTC_DCS_LEN - 1;  i >= 6;  i--)
1822     {
1823         /* Strip the top bit */
1824         s->dcs_frame[i] &= (DISBIT1 | DISBIT2 | DISBIT3 | DISBIT4 | DISBIT5 | DISBIT6 | DISBIT7);
1825         /* Check if there is some real message content here */
1826         if (s->dcs_frame[i])
1827             break;
1828         /*endif*/
1829     }
1830     /*endfor*/
1831     s->dcs_len = i + 1;
1832     /* Fill in any required extension bits */
1833     s->local_dis_dtc_frame[i] &= ~DISBIT8;
1834     for (i--  ;  i > 4;  i--)
1835         s->dcs_frame[i] |= DISBIT8;
1836     /*endfor*/
1837     t30_decode_dis_dtc_dcs(s, s->dcs_frame, s->dcs_len);
1838     return s->dcs_len;
1839 }
1840 /*- End of function --------------------------------------------------------*/
1841 
analyze_rx_dis_dtc(t30_state_t * s,const uint8_t * msg,int len)1842 static int analyze_rx_dis_dtc(t30_state_t *s, const uint8_t *msg, int len)
1843 {
1844     t30_decode_dis_dtc_dcs(s, msg, len);
1845     if (len < 6)
1846     {
1847         span_log(&s->logging, SPAN_LOG_FLOW, "Short DIS/DTC frame\n");
1848         return -1;
1849     }
1850     /*endif*/
1851 
1852     if (msg[2] == T30_DIS)
1853         s->dis_received = true;
1854     /*endif*/
1855 
1856     /* Make a local copy of the message, padded to the maximum possible length with zeros. This allows
1857        us to simply pick out the bits, without worrying about whether they were set from the remote side. */
1858     if (len > T30_MAX_DIS_DTC_DCS_LEN)
1859         len = T30_MAX_DIS_DTC_DCS_LEN;
1860     /*endif*/
1861     memcpy(s->far_dis_dtc_frame, msg, len);
1862     if (len < T30_MAX_DIS_DTC_DCS_LEN)
1863         memset(s->far_dis_dtc_frame + len, 0, T30_MAX_DIS_DTC_DCS_LEN - len);
1864     /*endif*/
1865 
1866     s->error_correcting_mode = (s->ecm_allowed  &&  test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_ECM_CAPABLE));
1867     /* Always use 256 octets per ECM frame, whatever the other end says it is capable of */
1868     s->octets_per_ecm_frame = 256;
1869 
1870     /* Now we know if we are going to use ECM, select the compressions which we can use. */
1871     s->mutual_compressions = s->supported_compressions;
1872     if (!s->error_correcting_mode)
1873     {
1874         /* Remove any compression schemes which need error correction to work. */
1875         s->mutual_compressions &= (0xFF800000 | T4_COMPRESSION_NONE | T4_COMPRESSION_T4_1D | T4_COMPRESSION_T4_2D);
1876         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_2D_CAPABLE))
1877             s->mutual_compressions &= ~T4_COMPRESSION_T4_2D;
1878         /*endif*/
1879     }
1880     else
1881     {
1882         /* Check the bi-level capabilities */
1883         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_2D_CAPABLE))
1884             s->mutual_compressions &= ~T4_COMPRESSION_T4_2D;
1885         /*endif*/
1886         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T6_CAPABLE))
1887             s->mutual_compressions &= ~T4_COMPRESSION_T6;
1888         /*endif*/
1889         /* T.85 L0 capable without T.85 capable is an invalid combination, so let
1890            just zap both capabilities if the far end is not T.85 capable. */
1891         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T85_CAPABLE))
1892             s->mutual_compressions &= ~(T4_COMPRESSION_T85 | T4_COMPRESSION_T85_L0);
1893         /*endif*/
1894         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T85_L0_CAPABLE))
1895             s->mutual_compressions &= ~T4_COMPRESSION_T85_L0;
1896         /*endif*/
1897 
1898         /* Check for full colour or only gray-scale from the multi-level codecs */
1899         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_FULL_COLOUR_CAPABLE))
1900             s->mutual_compressions &= ~T4_COMPRESSION_COLOUR;
1901         /*endif*/
1902 
1903         /* Check the colour capabilities */
1904         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T81_CAPABLE))
1905             s->mutual_compressions &= ~T4_COMPRESSION_T42_T81;
1906         /*endif*/
1907         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_SYCC_T81_CAPABLE))
1908             s->mutual_compressions &= ~T4_COMPRESSION_SYCC_T81;
1909         /*endif*/
1910         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T43_CAPABLE))
1911             s->mutual_compressions &= ~T4_COMPRESSION_T43;
1912         /*endif*/
1913         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_T45_CAPABLE))
1914             s->mutual_compressions &= ~T4_COMPRESSION_T45;
1915         /*endif*/
1916 
1917         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_12BIT_CAPABLE))
1918             s->mutual_compressions &= ~T4_COMPRESSION_12BIT;
1919         /*endif*/
1920         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_NO_SUBSAMPLING))
1921             s->mutual_compressions &= ~T4_COMPRESSION_NO_SUBSAMPLING;
1922         /*endif*/
1923 
1924         /* bit74 custom illuminant */
1925         /* bit75 custom gamut range */
1926     }
1927     /*endif*/
1928 
1929     s->mutual_bilevel_resolutions = s->supported_bilevel_resolutions;
1930     s->mutual_colour_resolutions = s->supported_colour_resolutions;
1931     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_1200_1200_CAPABLE))
1932     {
1933         s->mutual_bilevel_resolutions &= ~T4_RESOLUTION_1200_1200;
1934         s->mutual_colour_resolutions &= ~T4_RESOLUTION_1200_1200;
1935     }
1936     else
1937     {
1938         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_1200_1200_CAPABLE))
1939             s->mutual_colour_resolutions &= ~T4_RESOLUTION_1200_1200;
1940         /*endif*/
1941     }
1942     /*endif*/
1943     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_600_1200_CAPABLE))
1944         s->mutual_bilevel_resolutions &= ~T4_RESOLUTION_600_1200;
1945     /*endif*/
1946     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_600_600_CAPABLE))
1947     {
1948         s->mutual_bilevel_resolutions &= ~T4_RESOLUTION_600_600;
1949         s->mutual_colour_resolutions &= ~T4_RESOLUTION_600_600;
1950     }
1951     else
1952     {
1953         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_600_600_CAPABLE))
1954             s->mutual_colour_resolutions &= ~T4_RESOLUTION_600_600;
1955         /*endif*/
1956     }
1957     /*endif*/
1958     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_400_800_CAPABLE))
1959         s->mutual_bilevel_resolutions &= ~T4_RESOLUTION_400_800;
1960     /*endif*/
1961     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_400_400_CAPABLE))
1962     {
1963         s->mutual_bilevel_resolutions &= ~(T4_RESOLUTION_400_400 | T4_RESOLUTION_R16_SUPERFINE);
1964         s->mutual_colour_resolutions &= ~T4_RESOLUTION_400_400;
1965     }
1966     else
1967     {
1968         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_300_300_400_400_CAPABLE))
1969             s->mutual_colour_resolutions &= ~T4_RESOLUTION_400_400;
1970         /*endif*/
1971     }
1972     /*endif*/
1973     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_300_600_CAPABLE))
1974         s->mutual_bilevel_resolutions &= ~T4_RESOLUTION_300_600;
1975     /*endif*/
1976     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_300_300_CAPABLE))
1977     {
1978         s->mutual_bilevel_resolutions &= ~T4_RESOLUTION_300_300;
1979         s->mutual_colour_resolutions &= ~T4_RESOLUTION_300_300;
1980     }
1981     else
1982     {
1983         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_300_300_400_400_CAPABLE))
1984             s->mutual_colour_resolutions &= ~T4_RESOLUTION_300_300;
1985         /*endif*/
1986     }
1987     /*endif*/
1988     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_200_400_CAPABLE))
1989         s->mutual_bilevel_resolutions &= ~(T4_RESOLUTION_200_400 | T4_RESOLUTION_R8_SUPERFINE);
1990     /*endif*/
1991     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_200_200_CAPABLE))
1992     {
1993         s->mutual_bilevel_resolutions &= ~(T4_RESOLUTION_200_200 | T4_RESOLUTION_R8_FINE);
1994         s->mutual_colour_resolutions &= ~T4_RESOLUTION_200_200;
1995     }
1996     /*endif*/
1997     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_INCH_RESOLUTION_PREFERRED))
1998         s->mutual_bilevel_resolutions &= ~T4_RESOLUTION_200_100;
1999     /*endif*/
2000     /* Never suppress T4_RESOLUTION_R8_STANDARD */
2001     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_COLOUR_GRAY_100_100_CAPABLE))
2002         s->mutual_colour_resolutions &= ~T4_RESOLUTION_100_100;
2003     /*endif*/
2004 
2005     s->mutual_image_sizes = s->supported_image_sizes;
2006     /* 215mm wide is always supported */
2007     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_215MM_255MM_303MM_WIDTH_CAPABLE))
2008     {
2009         s->mutual_image_sizes &= ~T4_SUPPORT_WIDTH_303MM;
2010         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_215MM_255MM_WIDTH_CAPABLE))
2011             s->mutual_image_sizes &= ~T4_SUPPORT_WIDTH_255MM;
2012         /*endif*/
2013     }
2014     /*endif*/
2015     /* A4 is always supported. */
2016     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_UNLIMITED_LENGTH_CAPABLE))
2017     {
2018         s->mutual_image_sizes &= ~T4_SUPPORT_LENGTH_UNLIMITED;
2019         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_A4_B4_LENGTH_CAPABLE))
2020             s->mutual_image_sizes &= ~T4_SUPPORT_LENGTH_B4;
2021         /*endif*/
2022     }
2023     /*endif*/
2024     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_NORTH_AMERICAN_LETTER_CAPABLE))
2025         s->mutual_image_sizes &= ~T4_SUPPORT_LENGTH_US_LETTER;
2026     /*endif*/
2027     if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_NORTH_AMERICAN_LEGAL_CAPABLE))
2028         s->mutual_image_sizes &= ~T4_SUPPORT_LENGTH_US_LEGAL;
2029     /*endif*/
2030 
2031     switch (s->far_dis_dtc_frame[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3))
2032     {
2033     case (DISBIT6 | DISBIT4 | DISBIT3):
2034         if ((s->supported_modems & T30_SUPPORT_V17))
2035         {
2036             s->current_permitted_modems = T30_SUPPORT_V17 | T30_SUPPORT_V29 | T30_SUPPORT_V27TER;
2037             s->current_fallback = T30_V17_FALLBACK_START;
2038             break;
2039         }
2040         /*endif*/
2041         /* Fall through */
2042     case (DISBIT4 | DISBIT3):
2043         if ((s->supported_modems & T30_SUPPORT_V29))
2044         {
2045             s->current_permitted_modems = T30_SUPPORT_V29 | T30_SUPPORT_V27TER;
2046             s->current_fallback = T30_V29_FALLBACK_START;
2047             break;
2048         }
2049         /*endif*/
2050         /* Fall through */
2051     case DISBIT4:
2052         s->current_permitted_modems = T30_SUPPORT_V27TER;
2053         s->current_fallback = T30_V27TER_FALLBACK_START;
2054         break;
2055     case 0:
2056         s->current_permitted_modems = T30_SUPPORT_V27TER;
2057         s->current_fallback = T30_V27TER_FALLBACK_START + 1;
2058         break;
2059     case DISBIT3:
2060         if ((s->supported_modems & T30_SUPPORT_V29))
2061         {
2062             /* TODO: this doesn't allow for skipping the V.27ter modes */
2063             s->current_permitted_modems = T30_SUPPORT_V29;
2064             s->current_fallback = T30_V29_FALLBACK_START;
2065             break;
2066         }
2067         /*endif*/
2068         /* Fall through */
2069     default:
2070         span_log(&s->logging, SPAN_LOG_FLOW, "Remote does not support a compatible modem\n");
2071         /* We cannot talk to this machine! */
2072         t30_set_status(s, T30_ERR_INCOMPATIBLE);
2073         return -1;
2074     }
2075     /*endswitch*/
2076     return 0;
2077 }
2078 /*- End of function --------------------------------------------------------*/
2079 
analyze_rx_dcs(t30_state_t * s,const uint8_t * msg,int len)2080 static int analyze_rx_dcs(t30_state_t *s, const uint8_t *msg, int len)
2081 {
2082     /* The following treats a width field of 11 like 10, which does what note 6 of Table 2/T.30
2083        says we should do with the invalid value 11. */
2084     static const int widths[6][4] =
2085     {
2086         { T4_WIDTH_100_A4,  T4_WIDTH_100_B4,  T4_WIDTH_100_A3,  T4_WIDTH_100_A3}, /* 100/inch */
2087         { T4_WIDTH_200_A4,  T4_WIDTH_200_B4,  T4_WIDTH_200_A3,  T4_WIDTH_200_A3}, /* 200/inch / R8 resolution */
2088         { T4_WIDTH_300_A4,  T4_WIDTH_300_B4,  T4_WIDTH_300_A3,  T4_WIDTH_300_A3}, /* 300/inch resolution */
2089         { T4_WIDTH_400_A4,  T4_WIDTH_400_B4,  T4_WIDTH_400_A3,  T4_WIDTH_400_A3}, /* 400/inch / R16 resolution */
2090         { T4_WIDTH_600_A4,  T4_WIDTH_600_B4,  T4_WIDTH_600_A3,  T4_WIDTH_600_A3}, /* 600/inch resolution */
2091         {T4_WIDTH_1200_A4, T4_WIDTH_1200_B4, T4_WIDTH_1200_A3, T4_WIDTH_1200_A3}  /* 1200/inch resolution */
2092     };
2093     uint8_t dcs_frame[T30_MAX_DIS_DTC_DCS_LEN];
2094     int i;
2095     int x;
2096 
2097     t30_decode_dis_dtc_dcs(s, msg, len);
2098     if (len < 6)
2099     {
2100         span_log(&s->logging, SPAN_LOG_FLOW, "Short DCS frame\n");
2101         return -1;
2102     }
2103     /*endif*/
2104 
2105     /* Make an ASCII string format copy of the message, for logging in the
2106        received file. This string does not include the frame header octets. */
2107     sprintf(s->rx_dcs_string, "%02X", bit_reverse8(msg[3]));
2108     for (i = 4;  i < len;  i++)
2109         sprintf(s->rx_dcs_string + 3*i - 10, " %02X", bit_reverse8(msg[i]));
2110     /*endfor*/
2111 
2112     /* Make a local copy of the message, padded to the maximum possible length with zeros. This allows
2113        us to simply pick out the bits, without worrying about whether they were set from the remote side. */
2114     if (len > T30_MAX_DIS_DTC_DCS_LEN)
2115         len = T30_MAX_DIS_DTC_DCS_LEN;
2116     /*endif*/
2117     memcpy(dcs_frame, msg, len);
2118     if (len < T30_MAX_DIS_DTC_DCS_LEN)
2119         memset(dcs_frame + len, 0, T30_MAX_DIS_DTC_DCS_LEN - len);
2120     /*endif*/
2121 
2122     s->error_correcting_mode = (test_ctrl_bit(dcs_frame, T30_DCS_BIT_ECM_MODE) != 0);
2123     s->octets_per_ecm_frame = test_ctrl_bit(dcs_frame, T30_DCS_BIT_64_OCTET_ECM_FRAMES)  ?  256  :  64;
2124 
2125     s->x_resolution = -1;
2126     s->y_resolution = -1;
2127     s->current_page_resolution = 0;
2128     s->line_compression = -1;
2129     x = -1;
2130     if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T81_MODE)
2131         ||
2132         test_ctrl_bit(dcs_frame, T30_DCS_BIT_T43_MODE)
2133         ||
2134         test_ctrl_bit(dcs_frame, T30_DCS_BIT_T45_MODE)
2135         ||
2136         test_ctrl_bit(dcs_frame, T30_DCS_BIT_SYCC_T81_MODE))
2137     {
2138         /* Gray scale or colour image */
2139 
2140         /* Note 35 of Table 2/T.30 */
2141         if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_FULL_COLOUR_MODE))
2142         {
2143             if ((s->supported_colour_resolutions & T4_COMPRESSION_COLOUR))
2144             {
2145                 /* We are going to work in full colour mode */
2146             }
2147             /*endif*/
2148         }
2149         /*endif*/
2150 
2151         if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_12BIT_COMPONENT))
2152         {
2153             if ((s->supported_colour_resolutions & T4_COMPRESSION_12BIT))
2154             {
2155                 /* We are going to work in 12 bit mode */
2156             }
2157             /*endif*/
2158         }
2159         /*endif*/
2160 
2161         if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_NO_SUBSAMPLING))
2162         {
2163             //???? = T4_COMPRESSION_NO_SUBSAMPLING;
2164         }
2165         /*endif*/
2166 
2167         if (!test_ctrl_bit(dcs_frame, T30_DCS_BIT_PREFERRED_HUFFMAN_TABLES))
2168         {
2169             //???? = T4_COMPRESSION_T42_T81_HUFFMAN;
2170         }
2171         /*endif*/
2172 
2173         if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_COLOUR_GRAY_1200_1200))
2174         {
2175             if ((s->supported_colour_resolutions & T4_RESOLUTION_1200_1200))
2176             {
2177                 s->x_resolution = T4_X_RESOLUTION_1200;
2178                 s->y_resolution = T4_Y_RESOLUTION_1200;
2179                 s->current_page_resolution = T4_RESOLUTION_1200_1200;
2180                 x = 5;
2181             }
2182             /*endif*/
2183         }
2184         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_COLOUR_GRAY_600_600))
2185         {
2186             if ((s->supported_colour_resolutions & T4_RESOLUTION_600_600))
2187             {
2188                 s->x_resolution = T4_X_RESOLUTION_600;
2189                 s->y_resolution = T4_Y_RESOLUTION_600;
2190                 s->current_page_resolution = T4_RESOLUTION_600_600;
2191                 x = 4;
2192             }
2193             /*endif*/
2194         }
2195         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_400_400))
2196         {
2197             if ((s->supported_colour_resolutions & T4_RESOLUTION_400_400))
2198             {
2199                 s->x_resolution = T4_X_RESOLUTION_400;
2200                 s->y_resolution = T4_Y_RESOLUTION_400;
2201                 s->current_page_resolution = T4_RESOLUTION_400_400;
2202                 x = 3;
2203             }
2204             /*endif*/
2205         }
2206         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_300_300))
2207         {
2208             if ((s->supported_colour_resolutions & T4_RESOLUTION_300_300))
2209             {
2210                 s->x_resolution = T4_X_RESOLUTION_300;
2211                 s->y_resolution = T4_Y_RESOLUTION_300;
2212                 s->current_page_resolution = T4_RESOLUTION_300_300;
2213                 x = 2;
2214             }
2215             /*endif*/
2216         }
2217         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_200_200))
2218         {
2219             if ((s->supported_colour_resolutions & T4_RESOLUTION_200_200))
2220             {
2221                 s->x_resolution = T4_X_RESOLUTION_200;
2222                 s->y_resolution = T4_Y_RESOLUTION_200;
2223                 s->current_page_resolution = T4_RESOLUTION_200_200;
2224                 x = 1;
2225             }
2226             /*endif*/
2227         }
2228         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_COLOUR_GRAY_100_100))
2229         {
2230             if ((s->supported_colour_resolutions & T4_RESOLUTION_100_100))
2231             {
2232                 s->x_resolution = T4_X_RESOLUTION_100;
2233                 s->y_resolution = T4_Y_RESOLUTION_100;
2234                 s->current_page_resolution = T4_RESOLUTION_100_100;
2235                 x = 0;
2236             }
2237             /*endif*/
2238         }
2239         /*endif*/
2240 
2241         /* Check which compression the far end has decided to use. */
2242         if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T81_MODE))
2243         {
2244             if ((s->supported_compressions & T4_COMPRESSION_T42_T81))
2245                 s->line_compression = T4_COMPRESSION_T42_T81;
2246             /*endif*/
2247         }
2248         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T43_MODE))
2249         {
2250             if ((s->supported_compressions & T4_COMPRESSION_T43))
2251                 s->line_compression = T4_COMPRESSION_T43;
2252             /*endif*/
2253         }
2254         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T45_MODE))
2255         {
2256             if ((s->supported_compressions & T4_COMPRESSION_T45))
2257                 s->line_compression = T4_COMPRESSION_T45;
2258             /*endif*/
2259         }
2260         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_SYCC_T81_MODE))
2261         {
2262             if ((s->supported_compressions & T4_COMPRESSION_SYCC_T81))
2263                 s->line_compression = T4_COMPRESSION_SYCC_T81;
2264             /*endif*/
2265         }
2266         /*endif*/
2267     }
2268     else
2269     {
2270         /* Bi-level image */
2271         if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_1200_1200))
2272         {
2273             if ((s->supported_bilevel_resolutions & T4_RESOLUTION_1200_1200))
2274             {
2275                 s->x_resolution = T4_X_RESOLUTION_1200;
2276                 s->y_resolution = T4_Y_RESOLUTION_1200;
2277                 s->current_page_resolution = T4_RESOLUTION_1200_1200;
2278                 x = 5;
2279             }
2280             /*endif*/
2281         }
2282         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_600_1200))
2283         {
2284             if ((s->supported_bilevel_resolutions & T4_RESOLUTION_600_1200))
2285             {
2286                 s->x_resolution = T4_X_RESOLUTION_600;
2287                 s->y_resolution = T4_Y_RESOLUTION_1200;
2288                 s->current_page_resolution = T4_RESOLUTION_600_1200;
2289                 x = 4;
2290             }
2291             /*endif*/
2292         }
2293         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_600_600))
2294         {
2295             if ((s->supported_bilevel_resolutions & T4_RESOLUTION_600_600))
2296             {
2297                 s->x_resolution = T4_X_RESOLUTION_600;
2298                 s->y_resolution = T4_Y_RESOLUTION_600;
2299                 s->current_page_resolution = T4_RESOLUTION_600_600;
2300                 x = 4;
2301             }
2302             /*endif*/
2303         }
2304         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_400_800))
2305         {
2306             if ((s->supported_bilevel_resolutions & T4_RESOLUTION_400_800))
2307             {
2308                 s->x_resolution = T4_X_RESOLUTION_400;
2309                 s->y_resolution = T4_Y_RESOLUTION_800;
2310                 s->current_page_resolution = T4_RESOLUTION_400_800;
2311                 x = 3;
2312             }
2313             /*endif*/
2314         }
2315         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_400_400))
2316         {
2317             if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_INCH_RESOLUTION))
2318             {
2319                 if ((s->supported_bilevel_resolutions & T4_RESOLUTION_400_400))
2320                 {
2321                     s->x_resolution = T4_X_RESOLUTION_400;
2322                     s->y_resolution = T4_Y_RESOLUTION_400;
2323                     s->current_page_resolution = T4_RESOLUTION_400_400;
2324                     x = 3;
2325                 }
2326                 /*endif*/
2327             }
2328             else
2329             {
2330                 if ((s->supported_bilevel_resolutions & T4_RESOLUTION_R16_SUPERFINE))
2331                 {
2332                     s->x_resolution = T4_X_RESOLUTION_R16;
2333                     s->y_resolution = T4_Y_RESOLUTION_SUPERFINE;
2334                     s->current_page_resolution = T4_RESOLUTION_R16_SUPERFINE;
2335                     x = 3;
2336                 }
2337                 /*endif*/
2338             }
2339             /*endif*/
2340         }
2341         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_300_600))
2342         {
2343             if ((s->supported_bilevel_resolutions & T4_RESOLUTION_300_600))
2344             {
2345                 s->x_resolution = T4_X_RESOLUTION_300;
2346                 s->y_resolution = T4_Y_RESOLUTION_600;
2347                 s->current_page_resolution = T4_RESOLUTION_300_600;
2348                 x = 2;
2349             }
2350             /*endif*/
2351         }
2352         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_300_300))
2353         {
2354             if ((s->supported_bilevel_resolutions & T4_RESOLUTION_300_300))
2355             {
2356                 s->x_resolution = T4_X_RESOLUTION_300;
2357                 s->y_resolution = T4_Y_RESOLUTION_300;
2358                 s->current_page_resolution = T4_RESOLUTION_300_300;
2359                 x = 2;
2360             }
2361             /*endif*/
2362         }
2363         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_200_400))
2364         {
2365             if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_INCH_RESOLUTION))
2366             {
2367                 if ((s->supported_bilevel_resolutions & T4_RESOLUTION_200_400))
2368                 {
2369                     s->x_resolution = T4_X_RESOLUTION_200;
2370                     s->y_resolution = T4_Y_RESOLUTION_400;
2371                     s->current_page_resolution = T4_RESOLUTION_200_400;
2372                     x = 1;
2373                 }
2374                 /*endif*/
2375             }
2376             else
2377             {
2378                 if ((s->supported_bilevel_resolutions & T4_RESOLUTION_R8_SUPERFINE))
2379                 {
2380                     s->x_resolution = T4_X_RESOLUTION_R8;
2381                     s->y_resolution = T4_Y_RESOLUTION_SUPERFINE;
2382                     s->current_page_resolution = T4_RESOLUTION_R8_SUPERFINE;
2383                     x = 1;
2384                 }
2385                 /*endif*/
2386             }
2387             /*endif*/
2388         }
2389         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_200_200))
2390         {
2391             if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_INCH_RESOLUTION))
2392             {
2393                 if ((s->supported_bilevel_resolutions & T4_RESOLUTION_200_200))
2394                 {
2395                     s->x_resolution = T4_X_RESOLUTION_200;
2396                     s->y_resolution = T4_Y_RESOLUTION_200;
2397                     s->current_page_resolution = T4_RESOLUTION_200_200;
2398                     x = 1;
2399                 }
2400                 /*endif*/
2401             }
2402             else
2403             {
2404                 if ((s->supported_bilevel_resolutions & T4_RESOLUTION_R8_FINE))
2405                 {
2406                     s->x_resolution = T4_X_RESOLUTION_R8;
2407                     s->y_resolution = T4_Y_RESOLUTION_FINE;
2408                     s->current_page_resolution = T4_RESOLUTION_R8_FINE;
2409                     x = 1;
2410                 }
2411                 /*endif*/
2412             }
2413             /*endif*/
2414         }
2415         else
2416         {
2417             if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_INCH_RESOLUTION))
2418             {
2419                 s->x_resolution = T4_X_RESOLUTION_200;
2420                 s->y_resolution = T4_Y_RESOLUTION_100;
2421                 s->current_page_resolution = T4_RESOLUTION_200_100;
2422                 x = 1;
2423             }
2424             else
2425             {
2426                 s->x_resolution = T4_X_RESOLUTION_R8;
2427                 s->y_resolution = T4_Y_RESOLUTION_STANDARD;
2428                 s->current_page_resolution = T4_RESOLUTION_R8_STANDARD;
2429                 x = 1;
2430             }
2431             /*endif*/
2432         }
2433         /*endif*/
2434 
2435         /* Check which compression the far end has decided to use. */
2436         if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T88_MODE_1)
2437             ||
2438             test_ctrl_bit(dcs_frame, T30_DCS_BIT_T88_MODE_2)
2439             ||
2440             test_ctrl_bit(dcs_frame, T30_DCS_BIT_T88_MODE_3))
2441         {
2442             if ((s->supported_compressions & T4_COMPRESSION_T88))
2443                 s->line_compression = T4_COMPRESSION_T88;
2444             /*endif*/
2445         }
2446         /*endif*/
2447         if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T85_L0_MODE))
2448         {
2449             if ((s->supported_compressions & T4_COMPRESSION_T85_L0))
2450                 s->line_compression = T4_COMPRESSION_T85_L0;
2451             /*endif*/
2452         }
2453         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T85_MODE))
2454         {
2455             if ((s->supported_compressions & T4_COMPRESSION_T85))
2456                 s->line_compression = T4_COMPRESSION_T85;
2457             /*endif*/
2458         }
2459         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_T6_MODE))
2460         {
2461             if ((s->supported_compressions & T4_COMPRESSION_T6))
2462                 s->line_compression = T4_COMPRESSION_T6;
2463             /*endif*/
2464         }
2465         else if (test_ctrl_bit(dcs_frame, T30_DCS_BIT_2D_MODE))
2466         {
2467             if ((s->supported_compressions & T4_COMPRESSION_T4_2D))
2468                 s->line_compression = T4_COMPRESSION_T4_2D;
2469             /*endif*/
2470         }
2471         else
2472         {
2473             if ((s->supported_compressions & T4_COMPRESSION_T4_1D))
2474                 s->line_compression = T4_COMPRESSION_T4_1D;
2475             /*endif*/
2476         }
2477         /*endif*/
2478     }
2479     /*endif*/
2480 
2481     if (s->line_compression == -1)
2482     {
2483         t30_set_status(s, T30_ERR_INCOMPATIBLE);
2484         return -1;
2485     }
2486     /*endif*/
2487     span_log(&s->logging, SPAN_LOG_FLOW, "Far end selected compression %s (%d)\n", t4_compression_to_str(s->line_compression), s->line_compression);
2488 
2489     if (x < 0)
2490     {
2491         t30_set_status(s, T30_ERR_NORESSUPPORT);
2492         return -1;
2493     }
2494     /*endif*/
2495 
2496     s->image_width = widths[x][dcs_frame[5] & (DISBIT2 | DISBIT1)];
2497     /* We don't care that much about the image length control bits. Just accept what arrives */
2498 
2499     if (!test_ctrl_bit(dcs_frame, T30_DCS_BIT_RECEIVE_FAX_DOCUMENT))
2500         span_log(&s->logging, SPAN_LOG_PROTOCOL_WARNING, "Remote is not requesting receive in DCS\n");
2501     /*endif*/
2502 
2503     if ((s->current_fallback = find_fallback_entry(dcs_frame[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3))) < 0)
2504     {
2505         span_log(&s->logging, SPAN_LOG_FLOW, "Remote asked for a modem standard we do not support\n");
2506         return -1;
2507     }
2508     /*endif*/
2509     return 0;
2510 }
2511 /*- End of function --------------------------------------------------------*/
2512 
send_dcn(t30_state_t * s)2513 static void send_dcn(t30_state_t *s)
2514 {
2515     queue_phase(s, T30_PHASE_D_TX);
2516     set_state(s, T30_STATE_C);
2517     send_simple_frame(s, T30_DCN);
2518 }
2519 /*- End of function --------------------------------------------------------*/
2520 
return_to_phase_b(t30_state_t * s,int with_fallback)2521 static void return_to_phase_b(t30_state_t *s, int with_fallback)
2522 {
2523     /* This is what we do after things like T30_EOM is exchanged. */
2524     span_log(&s->logging, SPAN_LOG_PROTOCOL_WARNING, "Returning to phase B\n");
2525     /* Run the T1 timer, like we do on first detecting the far end. */
2526     s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T1);
2527     set_state(s, (s->calling_party)  ?  T30_STATE_T  :  T30_STATE_R);
2528 }
2529 /*- End of function --------------------------------------------------------*/
2530 
send_dis_or_dtc_sequence(t30_state_t * s,int start)2531 static int send_dis_or_dtc_sequence(t30_state_t *s, int start)
2532 {
2533     /* (NSF) (CSI) DIS */
2534     /* (NSC) (CIG) (PWD) (SEP) (PSA) (CIA) (ISP) DTC */
2535     if (start)
2536     {
2537         set_dis_or_dtc(s);
2538         set_state(s, T30_STATE_R);
2539         s->step = 0;
2540     }
2541     /*endif*/
2542     if (!s->dis_received)
2543     {
2544         /* DIS sequence */
2545         switch (s->step)
2546         {
2547         case 0:
2548             s->step++;
2549             if (send_nsf_frame(s))
2550                 break;
2551             /*endif*/
2552             /* Fall through */
2553         case 1:
2554             s->step++;
2555             if (send_ident_frame(s, T30_CSI))
2556                 break;
2557             /*endif*/
2558             /* Fall through */
2559         case 2:
2560             s->step++;
2561             prune_dis_dtc(s);
2562             send_frame(s, s->local_dis_dtc_frame, s->local_dis_dtc_len);
2563             break;
2564         case 3:
2565             s->step++;
2566             shut_down_hdlc_tx(s);
2567             break;
2568         default:
2569             return -1;
2570         }
2571         /*endswitch*/
2572     }
2573     else
2574     {
2575         /* DTC sequence */
2576         switch (s->step)
2577         {
2578         case 0:
2579             s->step++;
2580             if (send_nsc_frame(s))
2581                 break;
2582             /*endif*/
2583             /* Fall through */
2584         case 1:
2585             s->step++;
2586             if (send_ident_frame(s, T30_CIG))
2587                 break;
2588             /*endif*/
2589             /* Fall through */
2590         case 2:
2591             s->step++;
2592             if (send_pwd_frame(s))
2593                 break;
2594             /*endif*/
2595             /* Fall through */
2596         case 3:
2597             s->step++;
2598             if (send_sep_frame(s))
2599                 break;
2600             /*endif*/
2601             /* Fall through */
2602         case 4:
2603             s->step++;
2604             if (send_psa_frame(s))
2605                 break;
2606             /*endif*/
2607             /* Fall through */
2608         case 5:
2609             s->step++;
2610             if (send_cia_frame(s))
2611                 break;
2612             /*endif*/
2613             /* Fall through */
2614         case 6:
2615             s->step++;
2616             if (send_isp_frame(s))
2617                 break;
2618             /*endif*/
2619             /* Fall through */
2620         case 7:
2621             s->step++;
2622             prune_dis_dtc(s);
2623             send_frame(s, s->local_dis_dtc_frame, s->local_dis_dtc_len);
2624             break;
2625         case 8:
2626             s->step++;
2627             shut_down_hdlc_tx(s);
2628             break;
2629         default:
2630             return -1;
2631         }
2632         /*endswitch*/
2633     }
2634     /*endif*/
2635     return 0;
2636 }
2637 /*- End of function --------------------------------------------------------*/
2638 
send_dcs_sequence(t30_state_t * s,int start)2639 static int send_dcs_sequence(t30_state_t *s, int start)
2640 {
2641     /* (NSS) (TSI) (SUB) (SID) (TSA) (IRA) DCS */
2642     /* Schedule training after the messages */
2643     if (start)
2644     {
2645         set_state(s, T30_STATE_D);
2646         s->step = 0;
2647     }
2648     /*endif*/
2649     switch (s->step)
2650     {
2651     case 0:
2652         s->step++;
2653         if (send_nss_frame(s))
2654             break;
2655         /*endif*/
2656         /* Fall through */
2657     case 1:
2658         s->step++;
2659         if (send_ident_frame(s, T30_TSI))
2660             break;
2661         /*endif*/
2662         /* Fall through */
2663     case 2:
2664         s->step++;
2665         if (send_sub_frame(s))
2666             break;
2667         /*endif*/
2668         /* Fall through */
2669     case 3:
2670         s->step++;
2671         if (send_sid_frame(s))
2672             break;
2673         /*endif*/
2674         /* Fall through */
2675     case 4:
2676         s->step++;
2677         if (send_tsa_frame(s))
2678             break;
2679         /*endif*/
2680         /* Fall through */
2681     case 5:
2682         s->step++;
2683         if (send_ira_frame(s))
2684             break;
2685         /*endif*/
2686         /* Fall through */
2687     case 6:
2688         s->step++;
2689         prune_dcs(s);
2690         send_frame(s, s->dcs_frame, s->dcs_len);
2691         break;
2692     case 7:
2693         s->step++;
2694         shut_down_hdlc_tx(s);
2695         break;
2696     default:
2697         return -1;
2698     }
2699     /*endswitch*/
2700     return 0;
2701 }
2702 /*- End of function --------------------------------------------------------*/
2703 
send_cfr_sequence(t30_state_t * s,int start)2704 static int send_cfr_sequence(t30_state_t *s, int start)
2705 {
2706     /* (CSA) CFR */
2707     /* CFR is usually a simple frame, but can become a sequence with Internet
2708        FAXing. */
2709     if (start)
2710         s->step = 0;
2711     /*endif*/
2712     switch (s->step)
2713     {
2714     case 0:
2715         s->step++;
2716         if (send_csa_frame(s))
2717             break;
2718         /*endif*/
2719         /* Fall through */
2720     case 1:
2721         s->step++;
2722         send_simple_frame(s, T30_CFR);
2723         break;
2724     case 2:
2725         s->step++;
2726         shut_down_hdlc_tx(s);
2727         break;
2728     default:
2729         return -1;
2730     }
2731     /*endswitch*/
2732     return 0;
2733 }
2734 /*- End of function --------------------------------------------------------*/
2735 
terminate_call(t30_state_t * s)2736 static void terminate_call(t30_state_t *s)
2737 {
2738     /* Make sure any FAX in progress is tidied up. If the tidying up has
2739        already happened, repeating it here is harmless. */
2740     terminate_operation_in_progress(s);
2741     s->timer_t0_t1 = 0;
2742     s->timer_t2_t4 = 0;
2743     s->timer_t3 = 0;
2744     s->timer_t5 = 0;
2745     if (s->phase_e_handler)
2746         s->phase_e_handler(s->phase_e_user_data, s->current_status);
2747     /*endif*/
2748     set_state(s, T30_STATE_CALL_FINISHED);
2749     set_phase(s, T30_PHASE_CALL_FINISHED);
2750     release_resources(s);
2751     span_log(&s->logging, SPAN_LOG_FLOW, "Call completed\n");
2752 }
2753 /*- End of function --------------------------------------------------------*/
2754 
start_final_pause(t30_state_t * s)2755 static void start_final_pause(t30_state_t *s)
2756 {
2757     /* We need to allow some time for the last part of our FAX signalling to flush through
2758        to the far end before we declare the call finished. If we say it is finished too soon,
2759        the call disconnect message could cause buffers downstream to be flushed, rather than
2760        played out to completion. If that clips the final message, the far end might declare
2761        that the call prematrurely terminated. */
2762     span_log(&s->logging, SPAN_LOG_FLOW, "Starting final pause before disconnecting\n");
2763     /* Make sure any FAX in progress is tidied up. If the tidying up has
2764        already happened, repeating it here is harmless. */
2765     terminate_operation_in_progress(s);
2766     s->timer_t0_t1 = 0;
2767     s->timer_t2_t4 = 0;
2768     s->timer_t3 = 0;
2769     s->timer_t5 = 0;
2770     set_phase(s, T30_PHASE_E);
2771     set_state(s, T30_STATE_B);
2772 }
2773 /*- End of function --------------------------------------------------------*/
2774 
set_min_scan_time(t30_state_t * s)2775 static void set_min_scan_time(t30_state_t *s)
2776 {
2777     /* Translation between the codes for the minimum scan times the other end needs,
2778        and the codes for what we say will be used. We need 0 minimum. */
2779     static const uint8_t translate_min_scan_time[3][8] =
2780     {
2781         /* Normal */
2782         {T30_MIN_SCAN_20MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_20MS, T30_MIN_SCAN_40MS, T30_MIN_SCAN_40MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_0MS},
2783         /* Fine */
2784         {T30_MIN_SCAN_20MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_40MS, T30_MIN_SCAN_20MS, T30_MIN_SCAN_5MS,  T30_MIN_SCAN_0MS},
2785         /* Superfine, when half fine time is selected */
2786         {T30_MIN_SCAN_10MS, T30_MIN_SCAN_5MS, T30_MIN_SCAN_5MS,  T30_MIN_SCAN_5MS,  T30_MIN_SCAN_20MS, T30_MIN_SCAN_10MS, T30_MIN_SCAN_5MS,  T30_MIN_SCAN_0MS}
2787     };
2788     /* Translation between the codes for the minimum scan time we will use, and milliseconds. */
2789     static const int min_scan_times[8] =
2790     {
2791         20, 5, 10, 0, 40, 0, 0, 0
2792     };
2793     int min_bits_field;
2794     int min_row_bits;
2795 
2796     /* Set the minimum scan time bits */
2797     if (s->error_correcting_mode)
2798         min_bits_field = T30_MIN_SCAN_0MS;
2799     else
2800         min_bits_field = (s->far_dis_dtc_frame[5] >> 4) & 7;
2801     /*endif*/
2802     switch (s->y_resolution)
2803     {
2804     case T4_Y_RESOLUTION_SUPERFINE:
2805     case T4_Y_RESOLUTION_400:
2806         s->min_scan_time_code = translate_min_scan_time[(test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_MIN_SCAN_TIME_HALVES))  ?  2  :  1][min_bits_field];
2807         break;
2808     case T4_Y_RESOLUTION_FINE:
2809     case T4_Y_RESOLUTION_200:
2810         s->min_scan_time_code = translate_min_scan_time[1][min_bits_field];
2811         break;
2812     case T4_Y_RESOLUTION_STANDARD:
2813     case T4_Y_RESOLUTION_100:
2814         s->min_scan_time_code = translate_min_scan_time[0][min_bits_field];
2815         break;
2816     default:
2817         s->min_scan_time_code = T30_MIN_SCAN_0MS;
2818         break;
2819     }
2820     /*endswitch*/
2821     if ((s->iaf & T30_IAF_MODE_NO_FILL_BITS))
2822         min_row_bits = 0;
2823     else
2824         min_row_bits = (fallback_sequence[s->current_fallback].bit_rate*min_scan_times[s->min_scan_time_code])/1000;
2825     /*endif*/
2826     span_log(&s->logging, SPAN_LOG_FLOW, "Minimum bits per row will be %d\n", min_row_bits);
2827     t4_tx_set_min_bits_per_row(&s->t4.tx, min_row_bits);
2828 }
2829 /*- End of function --------------------------------------------------------*/
2830 
start_sending_document(t30_state_t * s)2831 static int start_sending_document(t30_state_t *s)
2832 {
2833     int res;
2834 
2835     if (s->tx_file[0] == '\0')
2836     {
2837         /* There is nothing to send */
2838         span_log(&s->logging, SPAN_LOG_FLOW, "No document to send\n");
2839         return -1;
2840     }
2841     /*endif*/
2842     span_log(&s->logging, SPAN_LOG_FLOW, "Start sending document\n");
2843     if (t4_tx_init(&s->t4.tx, s->tx_file, s->tx_start_page, s->tx_stop_page) == NULL)
2844     {
2845         span_log(&s->logging, SPAN_LOG_WARNING, "Cannot open source TIFF file '%s'\n", s->tx_file);
2846         t30_set_status(s, T30_ERR_FILEERROR);
2847         return -1;
2848     }
2849     /*endif*/
2850     s->operation_in_progress = OPERATION_IN_PROGRESS_T4_TX;
2851 
2852     t4_tx_set_local_ident(&s->t4.tx, s->tx_info.ident);
2853     t4_tx_set_header_info(&s->t4.tx, s->header_info);
2854     if (s->use_own_tz)
2855         t4_tx_set_header_tz(&s->t4.tx, &s->tz);
2856     /*endif*/
2857 
2858     t4_tx_get_pages_in_file(&s->t4.tx);
2859 
2860     if ((res = t4_tx_set_tx_image_format(&s->t4.tx,
2861                                          s->mutual_compressions,
2862                                          s->mutual_image_sizes,
2863                                          s->mutual_bilevel_resolutions,
2864                                          s->mutual_colour_resolutions)) < 0)
2865     {
2866         switch (res)
2867         {
2868         case T4_IMAGE_FORMAT_INCOMPATIBLE:
2869             span_log(&s->logging, SPAN_LOG_WARNING, "Cannot negotiate an image format\n");
2870             t30_set_status(s, T30_ERR_BADTIFFHDR);
2871             break;
2872         case T4_IMAGE_FORMAT_NOSIZESUPPORT:
2873             span_log(&s->logging, SPAN_LOG_WARNING, "Cannot negotiate an image size\n");
2874             t30_set_status(s, T30_ERR_NOSIZESUPPORT);
2875             break;
2876         case T4_IMAGE_FORMAT_NORESSUPPORT:
2877             span_log(&s->logging, SPAN_LOG_WARNING, "Cannot negotiate an image resolution\n");
2878             t30_set_status(s, T30_ERR_NORESSUPPORT);
2879             break;
2880         default:
2881             span_log(&s->logging, SPAN_LOG_WARNING, "Cannot negotiate an image mode\n");
2882             t30_set_status(s, T30_ERR_BADTIFF);
2883             break;
2884         }
2885         /*endswitch*/
2886         return -1;
2887     }
2888     /*endif*/
2889     s->line_image_type = t4_tx_get_tx_image_type(&s->t4.tx);
2890     s->line_compression = t4_tx_get_tx_compression(&s->t4.tx);
2891     s->image_width = t4_tx_get_tx_image_width(&s->t4.tx);
2892     s->line_width_code = t4_tx_get_tx_image_width_code(&s->t4.tx);
2893 
2894     s->x_resolution = t4_tx_get_tx_x_resolution(&s->t4.tx);
2895     s->y_resolution = t4_tx_get_tx_y_resolution(&s->t4.tx);
2896     s->current_page_resolution = t4_tx_get_tx_resolution(&s->t4.tx);
2897 
2898     span_log(&s->logging,
2899              SPAN_LOG_FLOW,
2900              "Choose image type %s (%d), compression %s (%d)\n",
2901              t4_image_type_to_str(s->line_image_type),
2902              s->line_image_type,
2903              t4_compression_to_str(s->line_compression),
2904              s->line_compression);
2905 
2906     /* The minimum scan time to be used can't be evaluated until we know the Y resolution. */
2907     set_min_scan_time(s);
2908 
2909     if (tx_start_page(s))
2910     {
2911         span_log(&s->logging, SPAN_LOG_WARNING, "Something seems to be wrong in the file\n");
2912         t30_set_status(s, T30_ERR_BADTIFFHDR);
2913         return -1;
2914     }
2915     /*endif*/
2916 
2917     if (s->error_correcting_mode)
2918     {
2919         if (get_partial_ecm_page(s) == 0)
2920             span_log(&s->logging, SPAN_LOG_WARNING, "No image data to send\n");
2921         /*endif*/
2922     }
2923     /*endif*/
2924     return 0;
2925 }
2926 /*- End of function --------------------------------------------------------*/
2927 
restart_sending_document(t30_state_t * s)2928 static int restart_sending_document(t30_state_t *s)
2929 {
2930     t4_tx_restart_page(&s->t4.tx);
2931     s->retries = 0;
2932     s->ecm_block = 0;
2933     send_dcs_sequence(s, true);
2934     return 0;
2935 }
2936 /*- End of function --------------------------------------------------------*/
2937 
start_receiving_document(t30_state_t * s)2938 static int start_receiving_document(t30_state_t *s)
2939 {
2940     if (s->rx_file[0] == '\0')
2941     {
2942         /* There is nothing to receive to */
2943         span_log(&s->logging, SPAN_LOG_FLOW, "No document to receive\n");
2944         return -1;
2945     }
2946     /*endif*/
2947     span_log(&s->logging, SPAN_LOG_FLOW, "Start receiving document\n");
2948     s->ecm_block = 0;
2949     send_dis_or_dtc_sequence(s, true);
2950     return 0;
2951 }
2952 /*- End of function --------------------------------------------------------*/
2953 
unexpected_non_final_frame(t30_state_t * s,const uint8_t * msg,int len)2954 static void unexpected_non_final_frame(t30_state_t *s, const uint8_t *msg, int len)
2955 {
2956     span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s frame in state %s\n", t30_frametype(msg[2]), state_names[s->state]);
2957     if (s->current_status == T30_ERR_OK)
2958         t30_set_status(s, T30_ERR_UNEXPECTED);
2959     /*endif*/
2960 }
2961 /*- End of function --------------------------------------------------------*/
2962 
unexpected_final_frame(t30_state_t * s,const uint8_t * msg,int len)2963 static void unexpected_final_frame(t30_state_t *s, const uint8_t *msg, int len)
2964 {
2965     span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s frame in state %s\n", t30_frametype(msg[2]), state_names[s->state]);
2966     if (s->current_status == T30_ERR_OK)
2967         t30_set_status(s, T30_ERR_UNEXPECTED);
2968     /*endif*/
2969     send_dcn(s);
2970 }
2971 /*- End of function --------------------------------------------------------*/
2972 
unexpected_frame_length(t30_state_t * s,const uint8_t * msg,int len)2973 static void unexpected_frame_length(t30_state_t *s, const uint8_t *msg, int len)
2974 {
2975     span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s frame length - %d\n", t30_frametype(msg[0]), len);
2976     if (s->current_status == T30_ERR_OK)
2977         t30_set_status(s, T30_ERR_UNEXPECTED);
2978     /*endif*/
2979     send_dcn(s);
2980 }
2981 /*- End of function --------------------------------------------------------*/
2982 
process_rx_dis_dtc(t30_state_t * s,const uint8_t * msg,int len)2983 static int process_rx_dis_dtc(t30_state_t *s, const uint8_t *msg, int len)
2984 {
2985     int new_status;
2986 
2987     queue_phase(s, T30_PHASE_B_TX);
2988     if (analyze_rx_dis_dtc(s, msg, len) < 0)
2989     {
2990         send_dcn(s);
2991         return -1;
2992     }
2993     /*endif*/
2994     if (s->phase_b_handler)
2995     {
2996         new_status = s->phase_b_handler(s->phase_b_user_data, msg[2]);
2997         if (new_status != T30_ERR_OK)
2998         {
2999             span_log(&s->logging, SPAN_LOG_FLOW, "Application rejected DIS/DTC - '%s'\n", t30_completion_code_to_str(new_status));
3000             t30_set_status(s, new_status);
3001             /* TODO: If FNV is allowed, process it here */
3002             send_dcn(s);
3003             return -1;
3004         }
3005         /*endif*/
3006     }
3007     /*endif*/
3008     /* Try to send something */
3009     if (s->tx_file[0])
3010     {
3011         span_log(&s->logging, SPAN_LOG_FLOW, "Trying to send file '%s'\n", s->tx_file);
3012         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_READY_TO_RECEIVE_FAX_DOCUMENT))
3013         {
3014             span_log(&s->logging, SPAN_LOG_FLOW, "%s far end cannot receive\n", t30_frametype(msg[2]));
3015             t30_set_status(s, T30_ERR_RX_INCAPABLE);
3016             send_dcn(s);
3017             return -1;
3018         }
3019         /*endif*/
3020         if (start_sending_document(s))
3021         {
3022             send_dcn(s);
3023             return -1;
3024         }
3025         /*endif*/
3026         if (build_dcs(s))
3027         {
3028             span_log(&s->logging, SPAN_LOG_FLOW, "The far end is incompatible\n", s->tx_file);
3029             send_dcn(s);
3030             return -1;
3031         }
3032         /*endif*/
3033         /* Start document transmission */
3034         span_log(&s->logging,
3035                  SPAN_LOG_FLOW,
3036                  "Put document with modem (%d) %s at %dbps\n",
3037                  fallback_sequence[s->current_fallback].modem_type,
3038                  t30_modem_to_str(fallback_sequence[s->current_fallback].modem_type),
3039                  fallback_sequence[s->current_fallback].bit_rate);
3040         s->retries = 0;
3041         send_dcs_sequence(s, true);
3042         return 0;
3043     }
3044     /*endif*/
3045     span_log(&s->logging, SPAN_LOG_FLOW, "%s - nothing to send\n", t30_frametype(msg[2]));
3046     /* ... then try to receive something */
3047     if (s->rx_file[0])
3048     {
3049         span_log(&s->logging, SPAN_LOG_FLOW, "Trying to receive file '%s'\n", s->rx_file);
3050         if (!test_ctrl_bit(s->far_dis_dtc_frame, T30_DIS_BIT_READY_TO_TRANSMIT_FAX_DOCUMENT))
3051         {
3052             span_log(&s->logging, SPAN_LOG_FLOW, "%s far end cannot transmit\n", t30_frametype(msg[2]));
3053             t30_set_status(s, T30_ERR_TX_INCAPABLE);
3054             send_dcn(s);
3055             return -1;
3056         }
3057         /*endif*/
3058         if (start_receiving_document(s))
3059         {
3060             send_dcn(s);
3061             return -1;
3062         }
3063         /*endif*/
3064         if (set_dis_or_dtc(s))
3065         {
3066             t30_set_status(s, T30_ERR_INCOMPATIBLE);
3067             send_dcn(s);
3068             return -1;
3069         }
3070         /*endif*/
3071         s->retries = 0;
3072         send_dis_or_dtc_sequence(s, true);
3073         return 0;
3074     }
3075     /*endif*/
3076     span_log(&s->logging, SPAN_LOG_FLOW, "%s - nothing to receive\n", t30_frametype(msg[2]));
3077     /* There is nothing to do, or nothing we are able to do. */
3078     send_dcn(s);
3079     return -1;
3080 }
3081 /*- End of function --------------------------------------------------------*/
3082 
process_rx_dcs(t30_state_t * s,const uint8_t * msg,int len)3083 static int process_rx_dcs(t30_state_t *s, const uint8_t *msg, int len)
3084 {
3085     int new_status;
3086 
3087     if (analyze_rx_dcs(s, msg, len) < 0)
3088     {
3089         send_dcn(s);
3090         return -1;
3091     }
3092     /*endif*/
3093 
3094     if (s->phase_b_handler)
3095     {
3096         new_status = s->phase_b_handler(s->phase_b_user_data, msg[2]);
3097         if (new_status != T30_ERR_OK)
3098         {
3099             span_log(&s->logging, SPAN_LOG_FLOW, "Application rejected DCS - '%s'\n", t30_completion_code_to_str(new_status));
3100             t30_set_status(s, new_status);
3101             /* TODO: If FNV is allowed, process it here */
3102             send_dcn(s);
3103             return -1;
3104         }
3105         /*endif*/
3106     }
3107     /*endif*/
3108     /* Start document reception */
3109     span_log(&s->logging,
3110              SPAN_LOG_FLOW,
3111              "Get document with modem (%d) %s at %dbps\n",
3112              fallback_sequence[s->current_fallback].modem_type,
3113              t30_modem_to_str(fallback_sequence[s->current_fallback].modem_type),
3114              fallback_sequence[s->current_fallback].bit_rate);
3115     if (s->rx_file[0] == '\0')
3116     {
3117         span_log(&s->logging, SPAN_LOG_FLOW, "No document to receive\n");
3118         t30_set_status(s, T30_ERR_FILEERROR);
3119         send_dcn(s);
3120         return -1;
3121     }
3122     /*endif*/
3123     if (s->operation_in_progress != OPERATION_IN_PROGRESS_T4_RX)
3124     {
3125         if (t4_rx_init(&s->t4.rx, s->rx_file, s->supported_output_compressions) == NULL)
3126         {
3127             span_log(&s->logging, SPAN_LOG_WARNING, "Cannot open target TIFF file '%s'\n", s->rx_file);
3128             t30_set_status(s, T30_ERR_FILEERROR);
3129             send_dcn(s);
3130             return -1;
3131         }
3132         /*endif*/
3133         s->operation_in_progress = OPERATION_IN_PROGRESS_T4_RX;
3134     }
3135     /*endif*/
3136     if (!(s->iaf & T30_IAF_MODE_NO_TCF))
3137     {
3138         /* TCF is always sent with long training */
3139         s->short_train = false;
3140         set_state(s, T30_STATE_F_TCF);
3141         queue_phase(s, T30_PHASE_C_NON_ECM_RX);
3142         timer_t2_start(s);
3143     }
3144     /*endif*/
3145     return 0;
3146 }
3147 /*- End of function --------------------------------------------------------*/
3148 
assess_copy_quality(t30_state_t * s,uint8_t fcf)3149 static void assess_copy_quality(t30_state_t *s, uint8_t fcf)
3150 {
3151     int quality;
3152 
3153     quality = copy_quality(s);
3154     switch (quality)
3155     {
3156     case T30_COPY_QUALITY_PERFECT:
3157     case T30_COPY_QUALITY_GOOD:
3158         rx_end_page(s);
3159         break;
3160     case T30_COPY_QUALITY_POOR:
3161         rx_end_page(s);
3162         break;
3163     case T30_COPY_QUALITY_BAD:
3164         /* Some people want to keep even the bad pages */
3165         if (s->keep_bad_pages)
3166             rx_end_page(s);
3167         /*endif*/
3168         break;
3169     }
3170     /*endswitch*/
3171 
3172     if (s->phase_d_handler)
3173         s->phase_d_handler(s->phase_d_user_data, fcf);
3174     /*endif*/
3175     if (fcf == T30_EOP)
3176         terminate_operation_in_progress(s);
3177     else
3178         rx_start_page(s);
3179     /*endif*/
3180 
3181     switch (quality)
3182     {
3183     case T30_COPY_QUALITY_PERFECT:
3184     case T30_COPY_QUALITY_GOOD:
3185         s->last_rx_page_result = T30_MCF;
3186         break;
3187     case T30_COPY_QUALITY_POOR:
3188         s->last_rx_page_result = T30_RTP;
3189         break;
3190     case T30_COPY_QUALITY_BAD:
3191     default:
3192         s->last_rx_page_result = T30_RTN;
3193         break;
3194     }
3195     /*endswitch*/
3196     set_state(s, T30_STATE_III_Q);
3197     send_simple_frame(s, s->last_rx_page_result);
3198 }
3199 /*- End of function --------------------------------------------------------*/
3200 
send_response_to_pps(t30_state_t * s)3201 static int send_response_to_pps(t30_state_t *s)
3202 {
3203     queue_phase(s, T30_PHASE_D_TX);
3204     if (s->rx_ecm_block_ok)
3205     {
3206         set_state(s, T30_STATE_F_POST_RCP_MCF);
3207         send_simple_frame(s, T30_MCF);
3208         return true;
3209     }
3210     /*endif*/
3211     /* We need to send the PPR frame we have created, to try to fill in the missing/bad data. */
3212     set_state(s, T30_STATE_F_POST_RCP_PPR);
3213     s->ecm_frame_map[0] = ADDRESS_FIELD;
3214     s->ecm_frame_map[1] = CONTROL_FIELD_FINAL_FRAME;
3215     s->ecm_frame_map[2] = (uint8_t) (T30_PPR | s->dis_received);
3216     send_frame(s, s->ecm_frame_map, 3 + 32);
3217     return false;
3218 }
3219 /*- End of function --------------------------------------------------------*/
3220 
process_rx_pps(t30_state_t * s,const uint8_t * msg,int len)3221 static int process_rx_pps(t30_state_t *s, const uint8_t *msg, int len)
3222 {
3223     int page;
3224     int block;
3225     int frames;
3226     int i;
3227     int j;
3228     int frame_no;
3229     int first_bad_frame;
3230     int first;
3231     int expected_len;
3232     int res;
3233 
3234     if (len < 7)
3235     {
3236         span_log(&s->logging, SPAN_LOG_FLOW, "Bad PPS message length %d.\n", len);
3237         return -1;
3238     }
3239     /*endif*/
3240     s->last_pps_fcf2 = msg[3] & 0xFE;
3241 
3242     /* The frames count is not well specified in T.30. In practice it seems it might be the
3243        number of frames in the current block, or it might be the number of frames in the
3244        current burst of transmission. For a burst of resent frames this would make it smaller
3245        than the actual size of the block. If we only accept the number when it exceeds
3246        previous values, we should get the real number of frames in the block. */
3247     frames = msg[6] + 1;
3248     block = msg[5];
3249     page = msg[4];
3250 
3251     if (s->ecm_frames < 0)
3252     {
3253         /* First time. Take the number and believe in it. */
3254         s->ecm_frames = frames;
3255     }
3256     else
3257     {
3258         /* If things have gone wrong, the far end might try to send us zero FCD
3259            frames. It can't represent zero in the block count field, so it might
3260            put zero there, or it might simplistically insert (blocks - 1), and put
3261            0xFF there. Beware of this. */
3262         if (frames == 0xFF)
3263         {
3264             /* This is probably zero, erroneously rolled over to the maximum count */
3265             frames = 0;
3266         }
3267         /*endif*/
3268     }
3269     /*endif*/
3270     span_log(&s->logging,
3271              SPAN_LOG_FLOW,
3272              "Received PPS-%s - page %d, block %d, %d frames\n",
3273              t30_frametype(msg[3]),
3274              page,
3275              block,
3276              frames);
3277     /* Check that we have received the page and block we expected. If the far end missed
3278        our last response, it might have repeated the previous chunk. */
3279     if ((s->rx_page_number & 0xFF) != page  ||  (s->ecm_block & 0xFF) != block)
3280     {
3281         span_log(&s->logging,
3282                  SPAN_LOG_FLOW,
3283                  "ECM rx page/block mismatch - expected %d/%d, but received %d/%d.\n",
3284                  (s->rx_page_number & 0xFF),
3285                  (s->ecm_block & 0xFF),
3286                  page,
3287                  block);
3288         /* Look for this being a repeat, because the other end missed the last response
3289            we sent - which would have been a T30_MCF - If the block is for the previous
3290            page, or the previous block of the current page, we can assume we have hit this
3291            condition. */
3292         if (((s->rx_page_number & 0xFF) == page  &&  ((s->ecm_block - 1) & 0xFF) == block)
3293             ||
3294             (((s->rx_page_number - 1) & 0xFF) == page  &&  s->ecm_block == 0))
3295         {
3296             /* This must be a repeat of the last thing the far end sent, while we are expecting
3297                the first transfer of a new block. */
3298             span_log(&s->logging, SPAN_LOG_FLOW, "Looks like a repeat from the previous page/block - send MCF again.\n");
3299             /* Clear the ECM buffer */
3300             for (i = 0;  i < 256;  i++)
3301                 s->ecm_len[i] = -1;
3302             /*endfor*/
3303             s->ecm_frames = -1;
3304             queue_phase(s, T30_PHASE_D_TX);
3305             set_state(s, T30_STATE_F_POST_RCP_MCF);
3306             send_simple_frame(s, T30_MCF);
3307         }
3308         else
3309         {
3310             /* Give up */
3311             t30_set_status(s, T30_ERR_RX_ECMPHD);
3312             send_dcn(s);
3313         }
3314         /*endif*/
3315         return 0;
3316     }
3317     /*endif*/
3318 
3319     /* Build a bit map of which frames we now have stored OK */
3320     first_bad_frame = 256;
3321     first = true;
3322     expected_len = 256;
3323     for (i = 0;  i < 32;  i++)
3324     {
3325         s->ecm_frame_map[i + 3] = 0;
3326         for (j = 0;  j < 8;  j++)
3327         {
3328             frame_no = (i << 3) + j;
3329             if (s->ecm_len[frame_no] >= 0)
3330             {
3331                 /* The correct pattern of frame lengths is they will all be 64 or 256 octets long, except the
3332                    last one. The last one might the same length as all the others, or it might be exactly the
3333                    right length to contain the last chunk of the data. That is, some people pad at the end,
3334                    and some do not. */
3335                 /* Vet the frames which are present, to detect any with inappropriate lengths. This might seem
3336                    like overkill, as the frames must have had good CRCs to get this far. However, in the real
3337                    world there are systems, especially T.38 ones, which give bad frame lengths, and which screw
3338                    up communication unless you apply these checks. From experience, if you find a frame has a
3339                    suspect length, and demand retransmission, there is a good chance the new copy will be alright. */
3340                 if (frame_no < s->ecm_frames - 1)
3341                 {
3342                     /* Expect all frames, except the last one, to follow the length of the first one */
3343                     if (first)
3344                     {
3345                         /* Use the length of the first frame as our model for what the length should be */
3346                         if (s->ecm_len[frame_no] == 64)
3347                             expected_len = 64;
3348                         /*endif*/
3349                         first = false;
3350                     }
3351                     /*endif*/
3352                     /* Check the length is consistent with the first frame */
3353                     if (s->ecm_len[frame_no] != expected_len)
3354                     {
3355                         span_log(&s->logging, SPAN_LOG_FLOW, "Bad length ECM frame - %d\n", s->ecm_len[frame_no]);
3356                         s->ecm_len[frame_no] = -1;
3357                     }
3358                     /*endif*/
3359                 }
3360                 /*endif*/
3361             }
3362             /*endif*/
3363             if (s->ecm_len[frame_no] < 0)
3364             {
3365                 s->ecm_frame_map[i + 3] |= (1 << j);
3366                 if (frame_no < first_bad_frame)
3367                     first_bad_frame = frame_no;
3368                 /*endif*/
3369                 if (frame_no < s->ecm_frames)
3370                     s->error_correcting_mode_retries++;
3371                 /*endif*/
3372             }
3373             /*endif*/
3374         }
3375         /*endfor*/
3376     }
3377     /*endfor*/
3378     s->rx_ecm_block_ok = (first_bad_frame >= s->ecm_frames);
3379     if (s->rx_ecm_block_ok)
3380     {
3381         span_log(&s->logging, SPAN_LOG_FLOW, "Partial page OK - committing block %d, %d frames\n", s->ecm_block, s->ecm_frames);
3382         /* Deliver the ECM data */
3383         for (i = 0;  i < s->ecm_frames;  i++)
3384         {
3385             if (s->document_put_handler)
3386                 res = s->document_put_handler(s->document_put_user_data, s->ecm_data[i], s->ecm_len[i]);
3387             else
3388                 res = t4_rx_put(&s->t4.rx, s->ecm_data[i], s->ecm_len[i]);
3389             /*endif*/
3390             if (res != T4_DECODE_MORE_DATA)
3391             {
3392                 /* This is the end of the document */
3393                 if (res != T4_DECODE_OK)
3394                     span_log(&s->logging, SPAN_LOG_FLOW, "Document ended with status %d\n", res);
3395                 break;
3396             }
3397             /*endif*/
3398         }
3399         /*endfor*/
3400         /* Clear the ECM buffer */
3401         for (i = 0;  i < 256;  i++)
3402             s->ecm_len[i] = -1;
3403         /*endfor*/
3404         s->ecm_block++;
3405         s->ecm_frames = -1;
3406 
3407         switch (s->last_pps_fcf2)
3408         {
3409         case T30_NULL:
3410             /* We can accept only this partial page. */
3411             break;
3412         default:
3413             /* We can accept and confirm the whole page. */
3414             s->next_rx_step = s->last_pps_fcf2;
3415             rx_end_page(s);
3416             report_rx_ecm_page_result(s);
3417             if (s->phase_d_handler)
3418                 s->phase_d_handler(s->phase_d_user_data, s->last_pps_fcf2);
3419             /*endif*/
3420             rx_start_page(s);
3421             break;
3422         }
3423         /*endswitch*/
3424     }
3425     /*endif*/
3426 
3427     switch (s->last_pps_fcf2)
3428     {
3429     case T30_PRI_MPS:
3430     case T30_PRI_EOM:
3431     case T30_PRI_EOP:
3432         if (s->remote_interrupts_allowed)
3433         {
3434         }
3435         /*endif*/
3436         /* Fall through */
3437     case T30_NULL:
3438     case T30_MPS:
3439     case T30_EOM:
3440     case T30_EOS:
3441     case T30_EOP:
3442         if (s->receiver_not_ready_count > 0)
3443         {
3444             s->receiver_not_ready_count--;
3445             queue_phase(s, T30_PHASE_D_TX);
3446             set_state(s, T30_STATE_F_POST_RCP_RNR);
3447             send_simple_frame(s, T30_RNR);
3448         }
3449         else
3450         {
3451             if (send_response_to_pps(s))
3452             {
3453                 switch (s->last_pps_fcf2)
3454                 {
3455                 case T30_PRI_EOP:
3456                 case T30_EOP:
3457                     span_log(&s->logging, SPAN_LOG_FLOW, "End of procedure detected\n");
3458                     s->end_of_procedure_detected = true;
3459                     break;
3460                 }
3461                 /*endswitch*/
3462             }
3463             /*endif*/
3464         }
3465         /*endif*/
3466         break;
3467     default:
3468         unexpected_final_frame(s, msg, len);
3469         break;
3470     }
3471     /*endswitch*/
3472     return 0;
3473 }
3474 /*- End of function --------------------------------------------------------*/
3475 
process_rx_ppr(t30_state_t * s,const uint8_t * msg,int len)3476 static void process_rx_ppr(t30_state_t *s, const uint8_t *msg, int len)
3477 {
3478     int i;
3479     int j;
3480     int frame_no;
3481     uint8_t frame[5];
3482 
3483     if (len != 3 + 256/8)
3484     {
3485         span_log(&s->logging, SPAN_LOG_FLOW, "Bad length for PPR bits - %d\n", (len - 3)*8);
3486         /* This frame didn't get corrupted in transit, because its CRC is OK. It was sent bad
3487            and there is little possibility that causing a retransmission will help. It is best
3488            to just give up. */
3489         t30_set_status(s, T30_ERR_TX_ECMPHD);
3490         terminate_call(s);
3491         return;
3492     }
3493     /*endif*/
3494     s->retries = 0;
3495     /* Check which frames are OK, and mark them as OK. */
3496     for (i = 0;  i < 32;  i++)
3497     {
3498         for (j = 0;  j < 8;  j++)
3499         {
3500             frame_no = (i << 3) + j;
3501             /* Tick off the frames they are not complaining about as OK */
3502             if ((msg[i + 3] & (1 << j)) == 0)
3503             {
3504                 if (s->ecm_len[frame_no] >= 0)
3505                     s->ecm_progress++;
3506                 /*endif*/
3507                 s->ecm_len[frame_no] = -1;
3508             }
3509             else
3510             {
3511                 if (frame_no < s->ecm_frames)
3512                 {
3513                     span_log(&s->logging, SPAN_LOG_FLOW, "Frame %d to be resent\n", frame_no);
3514                     s->error_correcting_mode_retries++;
3515                 }
3516                 /*endif*/
3517 #if 0
3518                 /* Diagnostic: See if the other end is complaining about something we didn't even send this time. */
3519                 if (s->ecm_len[frame_no] < 0)
3520                     span_log(&s->logging, SPAN_LOG_FLOW, "PPR contains complaint about frame %d, which was not sent\n", frame_no);
3521                 /*endif*/
3522 #endif
3523             }
3524             /*endif*/
3525         }
3526         /*endfor*/
3527     }
3528     /*endfor*/
3529     if (++s->ppr_count >= PPR_LIMIT_BEFORE_CTC_OR_EOR)
3530     {
3531         /* Continue to correct? */
3532         /* Continue only if we have been making progress */
3533         s->ppr_count = 0;
3534         if (s->ecm_progress  &&  fallback_sequence[s->current_fallback + 1].bit_rate)
3535         {
3536             s->current_fallback++;
3537             s->ecm_progress = 0;
3538             queue_phase(s, T30_PHASE_D_TX);
3539             set_state(s, T30_STATE_IV_CTC);
3540             frame[0] = ADDRESS_FIELD;
3541             frame[1] = CONTROL_FIELD_FINAL_FRAME;
3542             frame[2] = (uint8_t) (T30_CTC | s->dis_received);
3543             frame[3] = 0;
3544             frame[4] = fallback_sequence[s->current_fallback].dcs_code;
3545             send_frame(s, frame, 5);
3546         }
3547         else
3548         {
3549             set_state(s, T30_STATE_IV_EOR);
3550             queue_phase(s, T30_PHASE_D_TX);
3551             frame[0] = ADDRESS_FIELD;
3552             frame[1] = CONTROL_FIELD_FINAL_FRAME;
3553             frame[2] = (uint8_t) (T30_EOR | s->dis_received);
3554             frame[3] = (s->ecm_at_page_end)  ?  ((uint8_t) (s->next_tx_step | s->dis_received))  :  T30_NULL;
3555             span_log(&s->logging, SPAN_LOG_FLOW, "Sending EOR + %s\n", t30_frametype(frame[3]));
3556             send_frame(s, frame, 4);
3557         }
3558         /*endif*/
3559     }
3560     else
3561     {
3562         /* Initiate resending of the remainder of the frames. */
3563         set_state(s, T30_STATE_IV);
3564         queue_phase(s, T30_PHASE_C_ECM_TX);
3565         send_first_ecm_frame(s);
3566     }
3567     /*endif*/
3568 }
3569 /*- End of function --------------------------------------------------------*/
3570 
process_rx_fcd(t30_state_t * s,const uint8_t * msg,int len)3571 static void process_rx_fcd(t30_state_t *s, const uint8_t *msg, int len)
3572 {
3573     int frame_no;
3574 
3575     /* Facsimile coded data */
3576     switch (s->state)
3577     {
3578     case T30_STATE_F_DOC_ECM:
3579         if (len > 4 + 256)
3580         {
3581             /* For other frame types we kill the call on an unexpected frame length. For FCD frames it is better to just ignore
3582                the frame, and let retries sort things out. */
3583             span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected %s frame length - %d\n", t30_frametype(msg[0]), len);
3584         }
3585         else
3586         {
3587             frame_no = msg[3];
3588             /* Just store the actual image data, and record its length */
3589             span_log(&s->logging, SPAN_LOG_FLOW, "Storing ECM frame %d, length %d\n", frame_no, len - 4);
3590             memcpy(&s->ecm_data[frame_no][0], &msg[4], len - 4);
3591             s->ecm_len[frame_no] = (int16_t) (len - 4);
3592             /* In case we are just after a CTC/CTR exchange, which kicked us back to long training */
3593             s->short_train = true;
3594         }
3595         /*endif*/
3596         /* We have received something, so any missing carrier status is out of date */
3597         if (s->current_status == T30_ERR_RX_NOCARRIER)
3598             t30_set_status(s, T30_ERR_OK);
3599         /*endif*/
3600         break;
3601     default:
3602         unexpected_non_final_frame(s, msg, len);
3603         break;
3604     }
3605     /*endswitch*/
3606 }
3607 /*- End of function --------------------------------------------------------*/
3608 
process_rx_rcp(t30_state_t * s,const uint8_t * msg,int len)3609 static void process_rx_rcp(t30_state_t *s, const uint8_t *msg, int len)
3610 {
3611     /* Return to control for partial page. These might come through with or without the final frame tag.
3612        Here we deal with the "no final frame tag" case. */
3613     switch (s->state)
3614     {
3615     case T30_STATE_F_DOC_ECM:
3616         set_state(s, T30_STATE_F_POST_DOC_ECM);
3617         queue_phase(s, T30_PHASE_D_RX);
3618         timer_t2_start(s);
3619         /* We have received something, so any missing carrier status is out of date */
3620         if (s->current_status == T30_ERR_RX_NOCARRIER)
3621             t30_set_status(s, T30_ERR_OK);
3622         /*endif*/
3623         break;
3624     case T30_STATE_F_POST_DOC_ECM:
3625         /* Just ignore this. It must be an extra RCP. Several are usually sent, to maximise the chance
3626            of receiving a correct one. */
3627         timer_t2_start(s);
3628         break;
3629     default:
3630         unexpected_non_final_frame(s, msg, len);
3631         break;
3632     }
3633     /*endswitch*/
3634 }
3635 /*- End of function --------------------------------------------------------*/
3636 
process_rx_fnv(t30_state_t * s,const uint8_t * msg,int len)3637 static void process_rx_fnv(t30_state_t *s, const uint8_t *msg, int len)
3638 {
3639     logging_state_t *log;
3640     const char *x;
3641 
3642     /* Field not valid */
3643     /* TODO: analyse the message, as per 5.3.6.2.13 */
3644     if (!span_log_test(&s->logging, SPAN_LOG_FLOW))
3645         return;
3646     /*endif*/
3647     log = &s->logging;
3648 
3649     if ((msg[3] & 0x01))
3650         span_log(log, SPAN_LOG_FLOW, "  Incorrect password (PWD).\n");
3651     /*endif*/
3652     if ((msg[3] & 0x02))
3653         span_log(log, SPAN_LOG_FLOW, "  Selective polling reference (SEP) not known.\n");
3654     /*endif*/
3655     if ((msg[3] & 0x04))
3656         span_log(log, SPAN_LOG_FLOW, "  Sub-address (SUB) not known.\n");
3657     /*endif*/
3658     if ((msg[3] & 0x08))
3659         span_log(log, SPAN_LOG_FLOW, "  Sender identity (SID) not known.\n");
3660     /*endif*/
3661     if ((msg[3] & 0x10))
3662         span_log(log, SPAN_LOG_FLOW, "  Secure fax error.\n");
3663     /*endif*/
3664     if ((msg[3] & 0x20))
3665         span_log(log, SPAN_LOG_FLOW, "  Transmitting subscriber identity (TSI) not accepted.\n");
3666     /*endif*/
3667     if ((msg[3] & 0x40))
3668         span_log(log, SPAN_LOG_FLOW, "  Polled sub-address (PSA) not known.\n");
3669     /*endif*/
3670     if (len > 4  &&  (msg[3] & DISBIT8))
3671     {
3672         if ((msg[4] & 0x01))
3673             span_log(log, SPAN_LOG_FLOW, "  BFT negotiations request not accepted.\n");
3674         /*endif*/
3675         if ((msg[4] & 0x02))
3676             span_log(log, SPAN_LOG_FLOW, "  Internet routing address (IRA) not known.\n");
3677         /*endif*/
3678         if ((msg[4] & 0x04))
3679             span_log(log, SPAN_LOG_FLOW, "  Internet selective polling address (ISP) not known.\n");
3680         /*endif*/
3681     }
3682     /*endif*/
3683     if (len > 5)
3684     {
3685         span_log(log, SPAN_LOG_FLOW, "  FNV sequence number %d.\n", msg[5]);
3686     }
3687     /*endif*/
3688     if (len > 6)
3689     {
3690         switch (msg[6])
3691         {
3692         case T30_PWD:
3693             x = "Incorrect password (PWD)";
3694             break;
3695         case T30_SEP:
3696             x = "Selective polling reference (SEP) not known";
3697             break;
3698         case T30_SUB:
3699         case T30_SUB | 0x01:
3700             x = "Sub-address (SUB) not known";
3701             break;
3702         case T30_SID:
3703         case T30_SID | 0x01:
3704             x = "Sender identity (SID) not known";
3705             break;
3706         case T30_SPI:
3707             x = "Secure fax error";
3708             break;
3709         case T30_TSI:
3710         case T30_TSI | 0x01:
3711             x = "Transmitting subscriber identity (TSI) not accepted";
3712             break;
3713         case T30_PSA:
3714             x = "Polled sub-address (PSA) not known";
3715             break;
3716         default:
3717             x = "???";
3718             break;
3719         }
3720         /*endswitch*/
3721         span_log(log, SPAN_LOG_FLOW, "  FNV diagnostic info type %s.\n", x);
3722     }
3723     /*endif*/
3724     if (len > 7)
3725     {
3726         span_log(log, SPAN_LOG_FLOW, "  FNV length %d.\n", msg[7]);
3727     }
3728     /*endif*/
3729     /* We've decoded it, but we don't yet know how to deal with it, so treat it as unexpected */
3730     unexpected_final_frame(s, msg, len);
3731 }
3732 /*- End of function --------------------------------------------------------*/
3733 
process_state_answering(t30_state_t * s,const uint8_t * msg,int len)3734 static void process_state_answering(t30_state_t *s, const uint8_t *msg, int len)
3735 {
3736     uint8_t fcf;
3737 
3738     /* We should be sending the TCF data right now */
3739     fcf = msg[2] & 0xFE;
3740     switch (fcf)
3741     {
3742     case T30_DIS:
3743         /* TODO: This is a fudge to allow for starting up in T.38, where the other end has
3744            seen DIS by analogue modem means, and has immediately sent DIS/DTC. We might have
3745            missed useful info, like TSI, but just accept things and carry on form now. */
3746         span_log(&s->logging, SPAN_LOG_FLOW, "DIS/DTC before DIS\n");
3747         process_rx_dis_dtc(s, msg, len);
3748         break;
3749     case T30_DCS:
3750         /* TODO: This is a fudge to allow for starting up in T.38, where the other end has
3751            seen DIS by analogue modem means, and has immediately sent DCS. We might have
3752            missed useful info, like TSI, but just accept things and carry on form now. */
3753         span_log(&s->logging, SPAN_LOG_FLOW, "DCS before DIS\n");
3754         process_rx_dcs(s, msg, len);
3755         break;
3756     case T30_DCN:
3757         t30_set_status(s, T30_ERR_TX_GOTDCN);
3758         terminate_call(s);
3759         break;
3760     default:
3761         /* We don't know what to do with this. */
3762         unexpected_final_frame(s, msg, len);
3763         break;
3764     }
3765     /*endswitch*/
3766 }
3767 /*- End of function --------------------------------------------------------*/
3768 
process_state_b(t30_state_t * s,const uint8_t * msg,int len)3769 static void process_state_b(t30_state_t *s, const uint8_t *msg, int len)
3770 {
3771     uint8_t fcf;
3772 
3773     fcf = msg[2] & 0xFE;
3774     switch (fcf)
3775     {
3776     case T30_DCN:
3777         /* Just ignore any DCN's which appear at this stage. */
3778         break;
3779     case T30_CRP:
3780         repeat_last_command(s);
3781         break;
3782     case T30_FNV:
3783         process_rx_fnv(s, msg, len);
3784         break;
3785     default:
3786         /* We don't know what to do with this. */
3787         unexpected_final_frame(s, msg, len);
3788         break;
3789     }
3790     /*endswitch*/
3791 }
3792 /*- End of function --------------------------------------------------------*/
3793 
process_state_c(t30_state_t * s,const uint8_t * msg,int len)3794 static void process_state_c(t30_state_t *s, const uint8_t *msg, int len)
3795 {
3796     uint8_t fcf;
3797 
3798     fcf = msg[2] & 0xFE;
3799     switch (fcf)
3800     {
3801     case T30_DCN:
3802         /* Just ignore any DCN's which appear at this stage. */
3803         break;
3804     case T30_CRP:
3805         repeat_last_command(s);
3806         break;
3807     case T30_FNV:
3808         process_rx_fnv(s, msg, len);
3809         break;
3810     default:
3811         /* We don't know what to do with this. */
3812         unexpected_final_frame(s, msg, len);
3813         break;
3814     }
3815     /*endswitch*/
3816 }
3817 /*- End of function --------------------------------------------------------*/
3818 
process_state_d(t30_state_t * s,const uint8_t * msg,int len)3819 static void process_state_d(t30_state_t *s, const uint8_t *msg, int len)
3820 {
3821     uint8_t fcf;
3822 
3823     /* We should be sending the DCS sequence right now */
3824     fcf = msg[2] & 0xFE;
3825     switch (fcf)
3826     {
3827     case T30_DCN:
3828         t30_set_status(s, T30_ERR_TX_BADDCS);
3829         terminate_call(s);
3830         break;
3831     case T30_CRP:
3832         repeat_last_command(s);
3833         break;
3834     case T30_FNV:
3835         process_rx_fnv(s, msg, len);
3836         break;
3837     default:
3838         /* We don't know what to do with this. */
3839         unexpected_final_frame(s, msg, len);
3840         break;
3841     }
3842     /*endswitch*/
3843 }
3844 /*- End of function --------------------------------------------------------*/
3845 
process_state_d_tcf(t30_state_t * s,const uint8_t * msg,int len)3846 static void process_state_d_tcf(t30_state_t *s, const uint8_t *msg, int len)
3847 {
3848     uint8_t fcf;
3849 
3850     /* We should be sending the TCF data right now */
3851     fcf = msg[2] & 0xFE;
3852     switch (fcf)
3853     {
3854     case T30_DCN:
3855         t30_set_status(s, T30_ERR_TX_BADDCS);
3856         terminate_call(s);
3857         break;
3858     case T30_CRP:
3859         repeat_last_command(s);
3860         break;
3861     case T30_FNV:
3862         process_rx_fnv(s, msg, len);
3863         break;
3864     default:
3865         /* We don't know what to do with this. */
3866         unexpected_final_frame(s, msg, len);
3867         break;
3868     }
3869     /*endswitch*/
3870 }
3871 /*- End of function --------------------------------------------------------*/
3872 
process_state_d_post_tcf(t30_state_t * s,const uint8_t * msg,int len)3873 static void process_state_d_post_tcf(t30_state_t *s, const uint8_t *msg, int len)
3874 {
3875     uint8_t fcf;
3876 
3877     fcf = msg[2] & 0xFE;
3878     switch (fcf)
3879     {
3880     case T30_CFR:
3881         /* Trainability test succeeded. Send the document. */
3882         span_log(&s->logging, SPAN_LOG_FLOW, "Trainability test succeeded\n");
3883         s->retries = 0;
3884         s->short_train = true;
3885         if (s->error_correcting_mode)
3886         {
3887             set_state(s, T30_STATE_IV);
3888             queue_phase(s, T30_PHASE_C_ECM_TX);
3889             send_first_ecm_frame(s);
3890         }
3891         else
3892         {
3893             set_state(s, T30_STATE_I);
3894             queue_phase(s, T30_PHASE_C_NON_ECM_TX);
3895         }
3896         /*endif*/
3897         break;
3898     case T30_FTT:
3899         /* Trainability test failed. Try again. */
3900         span_log(&s->logging, SPAN_LOG_FLOW, "Trainability test failed\n");
3901         s->retries = 0;
3902         s->short_train = false;
3903         if (step_fallback_entry(s) < 0)
3904         {
3905             /* We have fallen back as far as we can go. Give up. */
3906             t30_set_status(s, T30_ERR_CANNOT_TRAIN);
3907             send_dcn(s);
3908             break;
3909         }
3910         /*endif*/
3911         queue_phase(s, T30_PHASE_B_TX);
3912         send_dcs_sequence(s, true);
3913         break;
3914     case T30_DIS:
3915         /* It appears they didn't see what we sent - retry the TCF */
3916         if (++s->retries >= MAX_COMMAND_TRIES)
3917         {
3918             span_log(&s->logging, SPAN_LOG_FLOW, "Too many retries. Giving up.\n");
3919             t30_set_status(s, T30_ERR_RETRYDCN);
3920             send_dcn(s);
3921             break;
3922         }
3923         /*endif*/
3924         span_log(&s->logging, SPAN_LOG_FLOW, "Retry number %d\n", s->retries);
3925         queue_phase(s, T30_PHASE_B_TX);
3926         /* TODO: should we reassess the new DIS message, and possibly adjust the DCS we use? */
3927         send_dcs_sequence(s, true);
3928         break;
3929     case T30_DCN:
3930         t30_set_status(s, T30_ERR_TX_BADDCS);
3931         terminate_call(s);
3932         break;
3933     case T30_CRP:
3934         repeat_last_command(s);
3935         break;
3936     case T30_FNV:
3937         process_rx_fnv(s, msg, len);
3938         break;
3939     default:
3940         /* We don't know what to do with this. */
3941         unexpected_final_frame(s, msg, len);
3942         break;
3943     }
3944     /*endswitch*/
3945 }
3946 /*- End of function --------------------------------------------------------*/
3947 
process_state_f_tcf(t30_state_t * s,const uint8_t * msg,int len)3948 static void process_state_f_tcf(t30_state_t *s, const uint8_t *msg, int len)
3949 {
3950     uint8_t fcf;
3951 
3952     /* We should be receiving TCF right now, not HDLC messages */
3953     fcf = msg[2] & 0xFE;
3954     switch (fcf)
3955     {
3956     case T30_CRP:
3957         repeat_last_command(s);
3958         break;
3959     case T30_FNV:
3960         process_rx_fnv(s, msg, len);
3961         break;
3962     default:
3963         /* We don't know what to do with this. */
3964         unexpected_final_frame(s, msg, len);
3965         break;
3966     }
3967     /*endswitch*/
3968 }
3969 /*- End of function --------------------------------------------------------*/
3970 
process_state_f_cfr(t30_state_t * s,const uint8_t * msg,int len)3971 static void process_state_f_cfr(t30_state_t *s, const uint8_t *msg, int len)
3972 {
3973     uint8_t fcf;
3974 
3975     /* We're waiting for a response to the CFR we sent */
3976     fcf = msg[2] & 0xFE;
3977     switch (fcf)
3978     {
3979     case T30_DCS:
3980         /* If we received another DCS, they must have missed our CFR */
3981         process_rx_dcs(s, msg, len);
3982         break;
3983     case T30_CRP:
3984         repeat_last_command(s);
3985         break;
3986     case T30_FNV:
3987         process_rx_fnv(s, msg, len);
3988         break;
3989     default:
3990         /* We don't know what to do with this. */
3991         unexpected_final_frame(s, msg, len);
3992         break;
3993     }
3994     /*endswitch*/
3995 }
3996 /*- End of function --------------------------------------------------------*/
3997 
process_state_f_ftt(t30_state_t * s,const uint8_t * msg,int len)3998 static void process_state_f_ftt(t30_state_t *s, const uint8_t *msg, int len)
3999 {
4000     uint8_t fcf;
4001 
4002     /* We're waiting for a response to the FTT we sent */
4003     fcf = msg[2] & 0xFE;
4004     switch (fcf)
4005     {
4006     case T30_DCS:
4007         process_rx_dcs(s, msg, len);
4008         break;
4009     case T30_CRP:
4010         repeat_last_command(s);
4011         break;
4012     case T30_FNV:
4013         process_rx_fnv(s, msg, len);
4014         break;
4015     default:
4016         /* We don't know what to do with this. */
4017         unexpected_final_frame(s, msg, len);
4018         break;
4019     }
4020     /*endswitch*/
4021 }
4022 /*- End of function --------------------------------------------------------*/
4023 
process_state_f_doc_non_ecm(t30_state_t * s,const uint8_t * msg,int len)4024 static void process_state_f_doc_non_ecm(t30_state_t *s, const uint8_t *msg, int len)
4025 {
4026     uint8_t fcf;
4027 
4028     /* If we are getting HDLC messages, and we have not moved to the _POST_DOC_NON_ECM
4029        state, it looks like either:
4030         - we didn't see the image data carrier properly, or
4031         - they didn't see our T30_CFR, and are repeating the DCS/TCF sequence.
4032         - they didn't see our T30_MCF, T30_RTP or T30_RTN and are repeating the end of page message. */
4033     fcf = msg[2] & 0xFE;
4034     switch (fcf)
4035     {
4036     case T30_DIS:
4037         process_rx_dis_dtc(s, msg, len);
4038         break;
4039     case T30_DCS:
4040         process_rx_dcs(s, msg, len);
4041         break;
4042     case T30_PRI_MPS:
4043         if (s->remote_interrupts_allowed)
4044         {
4045         }
4046         /*endif*/
4047         /* Fall through */
4048     case T30_MPS:
4049         if (s->image_carrier_attempted)
4050         {
4051             /* Treat this as a bad quality page. */
4052             if (s->phase_d_handler)
4053                 s->phase_d_handler(s->phase_d_user_data, fcf);
4054             /*endif*/
4055             s->next_rx_step = fcf;
4056             s->last_rx_page_result = T30_RTN;
4057             queue_phase(s, T30_PHASE_D_TX);
4058             set_state(s, T30_STATE_III_Q);
4059             send_simple_frame(s, s->last_rx_page_result);
4060         }
4061         else
4062         {
4063             /* This appears to be a retry, because the far end didn't see our last response */
4064             repeat_last_command(s);
4065         }
4066         /*endif*/
4067         break;
4068     case T30_PRI_EOM:
4069         if (s->remote_interrupts_allowed)
4070         {
4071         }
4072         /*endif*/
4073         /* Fall through */
4074     case T30_EOM:
4075     case T30_EOS:
4076         if (s->image_carrier_attempted)
4077         {
4078             /* Treat this as a bad quality page. */
4079             if (s->phase_d_handler)
4080                 s->phase_d_handler(s->phase_d_user_data, fcf);
4081             /*endif*/
4082             s->next_rx_step = fcf;
4083             s->last_rx_page_result = T30_RTN;
4084             /* Return to phase B */
4085             queue_phase(s, T30_PHASE_B_TX);
4086             set_state(s, T30_STATE_III_Q);
4087             send_simple_frame(s, s->last_rx_page_result);
4088         }
4089         else
4090         {
4091             /* This appears to be a retry, because the far end didn't see our last response */
4092             repeat_last_command(s);
4093         }
4094         /*endif*/
4095         break;
4096     case T30_PRI_EOP:
4097         if (s->remote_interrupts_allowed)
4098         {
4099         }
4100         /*endif*/
4101         /* Fall through */
4102     case T30_EOP:
4103         if (s->image_carrier_attempted)
4104         {
4105             /* Treat this as a bad quality page. */
4106             if (s->phase_d_handler)
4107                 s->phase_d_handler(s->phase_d_user_data, fcf);
4108             /*endif*/
4109             s->next_rx_step = fcf;
4110             s->last_rx_page_result = T30_RTN;
4111             queue_phase(s, T30_PHASE_D_TX);
4112             set_state(s, T30_STATE_III_Q);
4113             send_simple_frame(s, s->last_rx_page_result);
4114         }
4115         else
4116         {
4117             /* This appears to be a retry, because the far end didn't see our last response */
4118             repeat_last_command(s);
4119         }
4120         /*endif*/
4121         break;
4122     case T30_DCN:
4123         t30_set_status(s, T30_ERR_RX_DCNDATA);
4124         terminate_call(s);
4125         break;
4126     case T30_CRP:
4127         repeat_last_command(s);
4128         break;
4129     case T30_FNV:
4130         process_rx_fnv(s, msg, len);
4131         break;
4132     default:
4133         /* We don't know what to do with this. */
4134         t30_set_status(s, T30_ERR_RX_INVALCMD);
4135         unexpected_final_frame(s, msg, len);
4136         break;
4137     }
4138     /*endswitch*/
4139 }
4140 /*- End of function --------------------------------------------------------*/
4141 
process_state_f_post_doc_non_ecm(t30_state_t * s,const uint8_t * msg,int len)4142 static void process_state_f_post_doc_non_ecm(t30_state_t *s, const uint8_t *msg, int len)
4143 {
4144     uint8_t fcf;
4145 
4146     fcf = msg[2] & 0xFE;
4147     switch (fcf)
4148     {
4149     case T30_PRI_MPS:
4150         if (s->remote_interrupts_allowed)
4151         {
4152         }
4153         /*endif*/
4154         /* Fall through */
4155     case T30_MPS:
4156         s->next_rx_step = fcf;
4157         queue_phase(s, T30_PHASE_D_TX);
4158         assess_copy_quality(s, fcf);
4159         break;
4160     case T30_PRI_EOM:
4161         if (s->remote_interrupts_allowed)
4162         {
4163         }
4164         /*endif*/
4165         /* Fall through */
4166     case T30_EOM:
4167     case T30_EOS:
4168         s->next_rx_step = fcf;
4169         /* Return to phase B */
4170         queue_phase(s, T30_PHASE_B_TX);
4171         assess_copy_quality(s, fcf);
4172         break;
4173     case T30_PRI_EOP:
4174         if (s->remote_interrupts_allowed)
4175         {
4176         }
4177         /*endif*/
4178         /* Fall through */
4179     case T30_EOP:
4180         span_log(&s->logging, SPAN_LOG_FLOW, "End of procedure detected\n");
4181         s->end_of_procedure_detected = true;
4182         s->next_rx_step = fcf;
4183         queue_phase(s, T30_PHASE_D_TX);
4184         assess_copy_quality(s, fcf);
4185         break;
4186     case T30_DCS:
4187         span_log(&s->logging, SPAN_LOG_FLOW, "DCS received after CFR\n");
4188         process_rx_dcs(s, msg, len);
4189         break;
4190     case T30_DCN:
4191         t30_set_status(s, T30_ERR_RX_DCNFAX);
4192         terminate_call(s);
4193         break;
4194     case T30_CRP:
4195         repeat_last_command(s);
4196         break;
4197     case T30_FNV:
4198         process_rx_fnv(s, msg, len);
4199         break;
4200     default:
4201         /* We don't know what to do with this. */
4202         t30_set_status(s, T30_ERR_RX_INVALCMD);
4203         unexpected_final_frame(s, msg, len);
4204         break;
4205     }
4206     /*endswitch*/
4207 }
4208 /*- End of function --------------------------------------------------------*/
4209 
process_state_f_doc_and_post_doc_ecm(t30_state_t * s,const uint8_t * msg,int len)4210 static void process_state_f_doc_and_post_doc_ecm(t30_state_t *s, const uint8_t *msg, int len)
4211 {
4212     uint8_t fcf;
4213     uint8_t fcf2;
4214 
4215     /* This actually handles 2 states - _DOC_ECM and _POST_DOC_ECM - as they are very similar */
4216     fcf = msg[2] & 0xFE;
4217     switch (fcf)
4218     {
4219     case T30_DIS:
4220         process_rx_dis_dtc(s, msg, len);
4221         break;
4222     case T30_DCS:
4223         process_rx_dcs(s, msg, len);
4224         break;
4225     case T4_RCP:
4226         /* Return to control for partial page. These might come through with or without the final frame tag.
4227            Here we deal with the "final frame tag" case. */
4228         process_rx_rcp(s, msg, len);
4229         break;
4230     case T30_EOR:
4231         if (len != 4)
4232         {
4233             unexpected_frame_length(s, msg, len);
4234             break;
4235         }
4236         /*endif*/
4237         fcf2 = msg[3] & 0xFE;
4238         span_log(&s->logging, SPAN_LOG_FLOW, "Received EOR + %s\n", t30_frametype(msg[3]));
4239         switch (fcf2)
4240         {
4241         case T30_PRI_EOP:
4242         case T30_PRI_EOM:
4243         case T30_PRI_MPS:
4244             if (s->remote_interrupts_allowed)
4245             {
4246                 /* TODO: Alert operator */
4247             }
4248             /*endif*/
4249             /* Fall through */
4250         case T30_NULL:
4251         case T30_EOP:
4252         case T30_EOM:
4253         case T30_EOS:
4254         case T30_MPS:
4255             s->image_carrier_attempted = false;
4256             s->next_rx_step = fcf2;
4257             queue_phase(s, T30_PHASE_D_TX);
4258             set_state(s, T30_STATE_F_DOC_ECM);
4259             send_simple_frame(s, T30_ERR);
4260             break;
4261         default:
4262             unexpected_final_frame(s, msg, len);
4263             break;
4264         }
4265         /*endswitch*/
4266         break;
4267     case T30_PPS:
4268         process_rx_pps(s, msg, len);
4269         break;
4270     case T30_CTC:
4271         if ((msg[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3)) != fallback_sequence[s->current_fallback].dcs_code)
4272         {
4273             span_log(&s->logging, SPAN_LOG_FLOW, "Modem changed in CTC.\n");
4274             if ((s->current_fallback = find_fallback_entry(msg[4] & (DISBIT6 | DISBIT5 | DISBIT4 | DISBIT3))) < 0)
4275                 span_log(&s->logging, SPAN_LOG_FLOW, "Remote asked for a modem standard we do not support\n");
4276             /*endif*/
4277         }
4278         /*endif*/
4279         s->image_carrier_attempted = false;
4280         /* T.30 says we change back to long training here, whether or not the far end changed the modem type. */
4281         s->short_train = false;
4282         queue_phase(s, T30_PHASE_D_TX);
4283         set_state(s, T30_STATE_F_DOC_ECM);
4284         send_simple_frame(s, T30_CTR);
4285         break;
4286     case T30_RR:
4287         break;
4288     case T30_DCN:
4289         t30_set_status(s, T30_ERR_RX_DCNDATA);
4290         terminate_call(s);
4291         break;
4292     case T30_CRP:
4293         repeat_last_command(s);
4294         break;
4295     case T30_FNV:
4296         process_rx_fnv(s, msg, len);
4297         break;
4298     default:
4299         /* We don't know what to do with this. */
4300         t30_set_status(s, T30_ERR_RX_INVALCMD);
4301         unexpected_final_frame(s, msg, len);
4302         break;
4303     }
4304     /*endswitch*/
4305 }
4306 /*- End of function --------------------------------------------------------*/
4307 
process_state_f_post_rcp_mcf(t30_state_t * s,const uint8_t * msg,int len)4308 static void process_state_f_post_rcp_mcf(t30_state_t *s, const uint8_t *msg, int len)
4309 {
4310     uint8_t fcf;
4311 
4312     fcf = msg[2] & 0xFE;
4313     switch (fcf)
4314     {
4315     case T30_CRP:
4316         repeat_last_command(s);
4317         break;
4318     case T30_FNV:
4319         process_rx_fnv(s, msg, len);
4320         break;
4321     case T30_DCN:
4322         terminate_call(s);
4323         break;
4324     default:
4325         /* We don't know what to do with this. */
4326         unexpected_final_frame(s, msg, len);
4327         break;
4328     }
4329     /*endswitch*/
4330 }
4331 /*- End of function --------------------------------------------------------*/
4332 
process_state_f_post_rcp_ppr(t30_state_t * s,const uint8_t * msg,int len)4333 static void process_state_f_post_rcp_ppr(t30_state_t *s, const uint8_t *msg, int len)
4334 {
4335     uint8_t fcf;
4336 
4337     fcf = msg[2] & 0xFE;
4338     switch (fcf)
4339     {
4340     case T30_CRP:
4341         repeat_last_command(s);
4342         break;
4343     case T30_FNV:
4344         process_rx_fnv(s, msg, len);
4345         break;
4346     default:
4347         /* We don't know what to do with this. */
4348         unexpected_final_frame(s, msg, len);
4349         break;
4350     }
4351     /*endswitch*/
4352 }
4353 /*- End of function --------------------------------------------------------*/
4354 
process_state_f_post_rcp_rnr(t30_state_t * s,const uint8_t * msg,int len)4355 static void process_state_f_post_rcp_rnr(t30_state_t *s, const uint8_t *msg, int len)
4356 {
4357     uint8_t fcf;
4358 
4359     fcf = msg[2] & 0xFE;
4360     switch (fcf)
4361     {
4362     case T30_RR:
4363         if (s->receiver_not_ready_count > 0)
4364         {
4365             s->receiver_not_ready_count--;
4366             queue_phase(s, T30_PHASE_D_TX);
4367             set_state(s, T30_STATE_F_POST_RCP_RNR);
4368             send_simple_frame(s, T30_RNR);
4369         }
4370         else
4371         {
4372             /* Now we send the deferred response */
4373             if (send_response_to_pps(s))
4374             {
4375                 switch (s->last_pps_fcf2)
4376                 {
4377                 case T30_PRI_EOP:
4378                 case T30_EOP:
4379                     span_log(&s->logging, SPAN_LOG_FLOW, "End of procedure detected\n");
4380                     s->end_of_procedure_detected = true;
4381                     break;
4382                 }
4383                 /*endswitch*/
4384             }
4385             /*endif*/
4386         }
4387         /*endif*/
4388         break;
4389     case T30_CRP:
4390         repeat_last_command(s);
4391         break;
4392     case T30_FNV:
4393         process_rx_fnv(s, msg, len);
4394         break;
4395     default:
4396         /* We don't know what to do with this. */
4397         unexpected_final_frame(s, msg, len);
4398         break;
4399     }
4400     /*endswitch*/
4401 }
4402 /*- End of function --------------------------------------------------------*/
4403 
process_state_r(t30_state_t * s,const uint8_t * msg,int len)4404 static void process_state_r(t30_state_t *s, const uint8_t *msg, int len)
4405 {
4406     uint8_t fcf;
4407 
4408     fcf = msg[2] & 0xFE;
4409     switch (fcf)
4410     {
4411     case T30_DIS:
4412         process_rx_dis_dtc(s, msg, len);
4413         break;
4414     case T30_DCS:
4415         process_rx_dcs(s, msg, len);
4416         break;
4417     case T30_DCN:
4418         /* Received a DCN while waiting for a DIS or DCN */
4419         t30_set_status(s, T30_ERR_RX_DCNWHY);
4420         terminate_call(s);
4421         break;
4422     case T30_CRP:
4423         repeat_last_command(s);
4424         break;
4425     case T30_FNV:
4426         process_rx_fnv(s, msg, len);
4427         break;
4428     default:
4429         /* We don't know what to do with this. */
4430         unexpected_final_frame(s, msg, len);
4431         break;
4432     }
4433     /*endswitch*/
4434 }
4435 /*- End of function --------------------------------------------------------*/
4436 
process_state_t(t30_state_t * s,const uint8_t * msg,int len)4437 static void process_state_t(t30_state_t *s, const uint8_t *msg, int len)
4438 {
4439     uint8_t fcf;
4440 
4441     fcf = msg[2] & 0xFE;
4442     switch (fcf)
4443     {
4444     case T30_DIS:
4445         process_rx_dis_dtc(s, msg, len);
4446         break;
4447     case T30_DCN:
4448         t30_set_status(s, T30_ERR_TX_GOTDCN);
4449         terminate_call(s);
4450         break;
4451     case T30_CRP:
4452         repeat_last_command(s);
4453         break;
4454     case T30_FNV:
4455         process_rx_fnv(s, msg, len);
4456         break;
4457     default:
4458         /* We don't know what to do with this. */
4459         unexpected_final_frame(s, msg, len);
4460         t30_set_status(s, T30_ERR_TX_NODIS);
4461         break;
4462     }
4463     /*endswitch*/
4464 }
4465 /*- End of function --------------------------------------------------------*/
4466 
process_state_i(t30_state_t * s,const uint8_t * msg,int len)4467 static void process_state_i(t30_state_t *s, const uint8_t *msg, int len)
4468 {
4469     uint8_t fcf;
4470 
4471     fcf = msg[2] & 0xFE;
4472     switch (fcf)
4473     {
4474     case T30_CRP:
4475         repeat_last_command(s);
4476         break;
4477     case T30_FNV:
4478         process_rx_fnv(s, msg, len);
4479         break;
4480     default:
4481         /* We don't know what to do with this. */
4482         unexpected_final_frame(s, msg, len);
4483         break;
4484     }
4485     /*endswitch*/
4486 }
4487 /*- End of function --------------------------------------------------------*/
4488 
process_state_ii(t30_state_t * s,const uint8_t * msg,int len)4489 static void process_state_ii(t30_state_t *s, const uint8_t *msg, int len)
4490 {
4491     uint8_t fcf;
4492 
4493     fcf = msg[2] & 0xFE;
4494     switch (fcf)
4495     {
4496     case T30_CRP:
4497         repeat_last_command(s);
4498         break;
4499     case T30_FNV:
4500         process_rx_fnv(s, msg, len);
4501         break;
4502     default:
4503         /* We don't know what to do with this. */
4504         unexpected_final_frame(s, msg, len);
4505         break;
4506     }
4507     /*endswitch*/
4508 }
4509 /*- End of function --------------------------------------------------------*/
4510 
process_state_ii_q(t30_state_t * s,const uint8_t * msg,int len)4511 static void process_state_ii_q(t30_state_t *s, const uint8_t *msg, int len)
4512 {
4513     uint8_t fcf;
4514 
4515     fcf = msg[2] & 0xFE;
4516     switch (fcf)
4517     {
4518     case T30_PIP:
4519         if (s->remote_interrupts_allowed)
4520         {
4521             s->retries = 0;
4522             if (s->phase_d_handler)
4523             {
4524                 s->phase_d_handler(s->phase_d_user_data, fcf);
4525                 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
4526             }
4527             /*endif*/
4528         }
4529         /*endif*/
4530         /* Fall through */
4531     case T30_MCF:
4532         switch (s->next_tx_step)
4533         {
4534         case T30_PRI_MPS:
4535         case T30_MPS:
4536             tx_end_page(s);
4537             if (s->phase_d_handler)
4538                 s->phase_d_handler(s->phase_d_user_data, fcf);
4539             /*endif*/
4540             /* Transmit the next page */
4541             if (tx_start_page(s))
4542             {
4543                 /* TODO: recover */
4544                 break;
4545             }
4546             /*endif*/
4547             set_state(s, T30_STATE_I);
4548             queue_phase(s, T30_PHASE_C_NON_ECM_TX);
4549             break;
4550         case T30_PRI_EOM:
4551         case T30_EOM:
4552         case T30_EOS:
4553             tx_end_page(s);
4554             if (s->phase_d_handler)
4555                 s->phase_d_handler(s->phase_d_user_data, fcf);
4556             /*endif*/
4557             terminate_operation_in_progress(s);
4558             report_tx_result(s, true);
4559             return_to_phase_b(s, false);
4560             break;
4561         case T30_PRI_EOP:
4562         case T30_EOP:
4563             tx_end_page(s);
4564             if (s->phase_d_handler)
4565                 s->phase_d_handler(s->phase_d_user_data, fcf);
4566             /*endif*/
4567             terminate_operation_in_progress(s);
4568             send_dcn(s);
4569             report_tx_result(s, true);
4570             break;
4571         }
4572         /*endswitch*/
4573         break;
4574     case T30_RTP:
4575         s->rtp_events++;
4576         switch (s->next_tx_step)
4577         {
4578         case T30_PRI_MPS:
4579         case T30_MPS:
4580             tx_end_page(s);
4581             if (s->phase_d_handler)
4582                 s->phase_d_handler(s->phase_d_user_data, fcf);
4583             /*endif*/
4584             if (tx_start_page(s))
4585             {
4586                 /* TODO: recover */
4587                 break;
4588             }
4589             /*endif*/
4590             /* Send fresh training, and then the next page */
4591             if (step_fallback_entry(s) < 0)
4592             {
4593                 /* We have fallen back as far as we can go. Give up. */
4594                 t30_set_status(s, T30_ERR_CANNOT_TRAIN);
4595                 send_dcn(s);
4596                 break;
4597             }
4598             /*endif*/
4599             queue_phase(s, T30_PHASE_B_TX);
4600             restart_sending_document(s);
4601             break;
4602         case T30_PRI_EOM:
4603         case T30_EOM:
4604         case T30_EOS:
4605             tx_end_page(s);
4606             if (s->phase_d_handler)
4607                 s->phase_d_handler(s->phase_d_user_data, fcf);
4608             /*endif*/
4609             t4_tx_release(&s->t4.tx);
4610             /* TODO: should go back to T, and resend */
4611             return_to_phase_b(s, true);
4612             break;
4613         case T30_PRI_EOP:
4614         case T30_EOP:
4615             tx_end_page(s);
4616             if (s->phase_d_handler)
4617                 s->phase_d_handler(s->phase_d_user_data, fcf);
4618             /*endif*/
4619             t4_tx_release(&s->t4.tx);
4620             send_dcn(s);
4621             break;
4622         }
4623         /*endswitch*/
4624         break;
4625     case T30_PIN:
4626         if (s->remote_interrupts_allowed)
4627         {
4628             s->retries = 0;
4629             if (s->phase_d_handler)
4630             {
4631                 s->phase_d_handler(s->phase_d_user_data, fcf);
4632                 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
4633             }
4634             /*endif*/
4635         }
4636         /*endif*/
4637         /* Fall through */
4638     case T30_RTN:
4639         s->rtn_events++;
4640         switch (s->next_tx_step)
4641         {
4642         case T30_PRI_MPS:
4643         case T30_MPS:
4644             s->retries = 0;
4645             if (s->phase_d_handler)
4646                 s->phase_d_handler(s->phase_d_user_data, fcf);
4647             /*endif*/
4648             if (!s->retransmit_capable)
4649             {
4650                 /* Send the next page, regardless of the problem with the current one. */
4651                 if (tx_start_page(s))
4652                 {
4653                     /* TODO: recover */
4654                     break;
4655                 }
4656                 /*endif*/
4657             }
4658             /*endif*/
4659             /* Send fresh training */
4660             if (step_fallback_entry(s) < 0)
4661             {
4662                 /* We have fallen back as far as we can go. Give up. */
4663                 t30_set_status(s, T30_ERR_CANNOT_TRAIN);
4664                 send_dcn(s);
4665                 break;
4666             }
4667             /*endif*/
4668             queue_phase(s, T30_PHASE_B_TX);
4669             restart_sending_document(s);
4670             break;
4671         case T30_PRI_EOM:
4672         case T30_EOM:
4673         case T30_EOS:
4674             s->retries = 0;
4675             if (s->phase_d_handler)
4676                 s->phase_d_handler(s->phase_d_user_data, fcf);
4677             /*endif*/
4678             if (s->retransmit_capable)
4679             {
4680                 /* Wait for DIS */
4681             }
4682             else
4683             {
4684                 return_to_phase_b(s, true);
4685             }
4686             /*endif*/
4687             break;
4688         case T30_PRI_EOP:
4689         case T30_EOP:
4690             s->retries = 0;
4691             if (s->phase_d_handler)
4692                 s->phase_d_handler(s->phase_d_user_data, fcf);
4693             /*endif*/
4694             if (s->retransmit_capable)
4695             {
4696                 /* Send fresh training, and then repeat the last page */
4697                 if (step_fallback_entry(s) < 0)
4698                 {
4699                     /* We have fallen back as far as we can go. Give up. */
4700                     t30_set_status(s, T30_ERR_CANNOT_TRAIN);
4701                     send_dcn(s);
4702                     break;
4703                 }
4704                 /*endif*/
4705                 queue_phase(s, T30_PHASE_B_TX);
4706                 restart_sending_document(s);
4707             }
4708             else
4709             {
4710                 send_dcn(s);
4711             }
4712             /*endif*/
4713             break;
4714         }
4715         /*endswitch*/
4716         break;
4717     case T30_DCN:
4718         switch (s->next_tx_step)
4719         {
4720         case T30_PRI_MPS:
4721         case T30_PRI_EOM:
4722         case T30_MPS:
4723         case T30_EOM:
4724         case T30_EOS:
4725             /* Unexpected DCN after EOM, EOS or MPS sequence */
4726             t30_set_status(s, T30_ERR_RX_DCNPHD);
4727             break;
4728         default:
4729             t30_set_status(s, T30_ERR_TX_BADPG);
4730             break;
4731         }
4732         /*endswitch*/
4733         terminate_call(s);
4734         break;
4735     case T30_CRP:
4736         repeat_last_command(s);
4737         break;
4738     case T30_FNV:
4739         process_rx_fnv(s, msg, len);
4740         break;
4741     case T30_MPS:
4742     case T30_PRI_EOM:
4743     case T30_EOM:
4744     case T30_EOS:
4745     case T30_PRI_EOP:
4746     case T30_EOP:
4747         if (fcf == s->next_tx_step)
4748         {
4749             /* It looks like we have received an echo of what we just sent */
4750             span_log(&s->logging, SPAN_LOG_FLOW, "Received an echo of our own %s\n", t30_frametype(fcf));
4751             timer_t4_start(s);
4752             break;
4753         }
4754         /*endif*/
4755         /* Fall through */
4756     default:
4757         /* We don't know what to do with this. */
4758         t30_set_status(s, T30_ERR_TX_INVALRSP);
4759         unexpected_final_frame(s, msg, len);
4760         break;
4761     }
4762     /*endswitch*/
4763 }
4764 /*- End of function --------------------------------------------------------*/
4765 
process_state_iii_q(t30_state_t * s,const uint8_t * msg,int len)4766 static void process_state_iii_q(t30_state_t *s, const uint8_t *msg, int len)
4767 {
4768     uint8_t fcf;
4769 
4770     fcf = msg[2] & 0xFE;
4771     switch (fcf)
4772     {
4773     case T30_EOP:
4774     case T30_EOM:
4775     case T30_EOS:
4776     case T30_MPS:
4777         /* Looks like they didn't see our signal. Repeat it */
4778         queue_phase(s, T30_PHASE_D_TX);
4779         set_state(s, T30_STATE_III_Q);
4780         send_simple_frame(s, s->last_rx_page_result);
4781         break;
4782     case T30_DIS:
4783         if (msg[2] == T30_DTC)
4784             process_rx_dis_dtc(s, msg, len);
4785         /*endif*/
4786         break;
4787     case T30_CRP:
4788         repeat_last_command(s);
4789         break;
4790     case T30_FNV:
4791         process_rx_fnv(s, msg, len);
4792         break;
4793     case T30_DCN:
4794         if (s->last_rx_page_result == T30_RTN)
4795             t30_set_status(s, T30_ERR_RX_DCNNORTN);
4796         /*endif*/
4797         terminate_call(s);
4798         break;
4799     default:
4800         /* We don't know what to do with this. */
4801         unexpected_final_frame(s, msg, len);
4802         break;
4803     }
4804     /*endswitch*/
4805 }
4806 /*- End of function --------------------------------------------------------*/
4807 
process_state_iv(t30_state_t * s,const uint8_t * msg,int len)4808 static void process_state_iv(t30_state_t *s, const uint8_t *msg, int len)
4809 {
4810     uint8_t fcf;
4811 
4812     fcf = msg[2] & 0xFE;
4813     switch (fcf)
4814     {
4815     case T30_CRP:
4816         repeat_last_command(s);
4817         break;
4818     case T30_FNV:
4819         process_rx_fnv(s, msg, len);
4820         break;
4821     default:
4822         /* We don't know what to do with this. */
4823         unexpected_final_frame(s, msg, len);
4824         break;
4825     }
4826     /*endswitch*/
4827 }
4828 /*- End of function --------------------------------------------------------*/
4829 
process_state_iv_pps_null(t30_state_t * s,const uint8_t * msg,int len)4830 static void process_state_iv_pps_null(t30_state_t *s, const uint8_t *msg, int len)
4831 {
4832     uint8_t fcf;
4833 
4834     fcf = msg[2] & 0xFE;
4835     switch (fcf)
4836     {
4837     case T30_MCF:
4838         s->retries = 0;
4839         s->timer_t5 = 0;
4840         /* Is there more of the current page to get, or do we move on? */
4841         span_log(&s->logging, SPAN_LOG_FLOW, "Is there more to send? - %d %d\n", s->ecm_frames, s->ecm_len[255]);
4842         if (!s->ecm_at_page_end  &&  get_partial_ecm_page(s) > 0)
4843         {
4844             span_log(&s->logging, SPAN_LOG_FLOW, "Additional image data to send\n");
4845             s->ecm_block++;
4846             set_state(s, T30_STATE_IV);
4847             queue_phase(s, T30_PHASE_C_ECM_TX);
4848             send_first_ecm_frame(s);
4849         }
4850         else
4851         {
4852             span_log(&s->logging, SPAN_LOG_FLOW, "Moving on to the next page\n");
4853             switch (s->next_tx_step)
4854             {
4855             case T30_PRI_MPS:
4856             case T30_MPS:
4857                 tx_end_page(s);
4858                 if (s->phase_d_handler)
4859                     s->phase_d_handler(s->phase_d_user_data, fcf);
4860                 /*endif*/
4861                 if (tx_start_page(s))
4862                 {
4863                     /* TODO: recover */
4864                     break;
4865                 }
4866                 /*endif*/
4867                 if (get_partial_ecm_page(s) > 0)
4868                 {
4869                     set_state(s, T30_STATE_IV);
4870                     queue_phase(s, T30_PHASE_C_ECM_TX);
4871                     send_first_ecm_frame(s);
4872                 }
4873                 /*endif*/
4874                 break;
4875             case T30_PRI_EOM:
4876             case T30_EOM:
4877             case T30_EOS:
4878                 tx_end_page(s);
4879                 if (s->phase_d_handler)
4880                     s->phase_d_handler(s->phase_d_user_data, fcf);
4881                 /*endif*/
4882                 terminate_operation_in_progress(s);
4883                 report_tx_result(s, true);
4884                 return_to_phase_b(s, false);
4885                 break;
4886             case T30_PRI_EOP:
4887             case T30_EOP:
4888                 tx_end_page(s);
4889                 if (s->phase_d_handler)
4890                     s->phase_d_handler(s->phase_d_user_data, fcf);
4891                 /*endif*/
4892                 terminate_operation_in_progress(s);
4893                 send_dcn(s);
4894                 report_tx_result(s, true);
4895                 break;
4896             }
4897             /*endswitch*/
4898         }
4899         /*endif*/
4900         break;
4901     case T30_PPR:
4902         process_rx_ppr(s, msg, len);
4903         break;
4904     case T30_RNR:
4905         if (s->timer_t5 == 0)
4906             s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
4907         /*endif*/
4908         queue_phase(s, T30_PHASE_D_TX);
4909         set_state(s, T30_STATE_IV_PPS_RNR);
4910         send_rr(s);
4911         break;
4912     case T30_DCN:
4913         t30_set_status(s, T30_ERR_TX_BADPG);
4914         terminate_call(s);
4915         break;
4916     case T30_CRP:
4917         repeat_last_command(s);
4918         break;
4919     case T30_FNV:
4920         process_rx_fnv(s, msg, len);
4921         break;
4922     case T30_PPS:
4923         if (msg[3] == s->next_tx_step)
4924         {
4925             /* It looks like we have received an echo of what we just sent */
4926             span_log(&s->logging, SPAN_LOG_FLOW, "Received an echo of our own PPS-%s\n", t30_frametype(msg[3]));
4927             timer_t4_start(s);
4928             break;
4929         }
4930         /*endif*/
4931         /* Fall through */
4932     default:
4933         /* We don't know what to do with this. */
4934         unexpected_final_frame(s, msg, len);
4935         t30_set_status(s, T30_ERR_TX_ECMPHD);
4936         break;
4937     }
4938     /*endswitch*/
4939 }
4940 /*- End of function --------------------------------------------------------*/
4941 
process_state_iv_pps_q(t30_state_t * s,const uint8_t * msg,int len)4942 static void process_state_iv_pps_q(t30_state_t *s, const uint8_t *msg, int len)
4943 {
4944     uint8_t fcf;
4945 
4946     fcf = msg[2] & 0xFE;
4947     switch (fcf)
4948     {
4949     case T30_PIP:
4950         if (s->remote_interrupts_allowed)
4951         {
4952             s->retries = 0;
4953             if (s->phase_d_handler)
4954             {
4955                 s->phase_d_handler(s->phase_d_user_data, fcf);
4956                 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
4957             }
4958             /*endif*/
4959         }
4960         /*endif*/
4961         /* Fall through */
4962     case T30_MCF:
4963         s->retries = 0;
4964         s->timer_t5 = 0;
4965         /* Is there more of the current page to get, or do we move on? */
4966         span_log(&s->logging, SPAN_LOG_FLOW, "Is there more to send? - %d %d\n", s->ecm_frames, s->ecm_len[255]);
4967         if (!s->ecm_at_page_end  &&  get_partial_ecm_page(s) > 0)
4968         {
4969             span_log(&s->logging, SPAN_LOG_FLOW, "Additional image data to send\n");
4970             s->ecm_block++;
4971             set_state(s, T30_STATE_IV);
4972             queue_phase(s, T30_PHASE_C_ECM_TX);
4973             send_first_ecm_frame(s);
4974         }
4975         else
4976         {
4977             span_log(&s->logging, SPAN_LOG_FLOW, "Moving on to the next page\n");
4978             switch (s->next_tx_step)
4979             {
4980             case T30_PRI_MPS:
4981             case T30_MPS:
4982                 tx_end_page(s);
4983                 if (s->phase_d_handler)
4984                     s->phase_d_handler(s->phase_d_user_data, fcf);
4985                 /*endif*/
4986                 if (tx_start_page(s))
4987                 {
4988                     /* TODO: recover */
4989                     break;
4990                 }
4991                 /*endif*/
4992                 if (get_partial_ecm_page(s) > 0)
4993                 {
4994                     set_state(s, T30_STATE_IV);
4995                     queue_phase(s, T30_PHASE_C_ECM_TX);
4996                     send_first_ecm_frame(s);
4997                 }
4998                 /*endif*/
4999                 break;
5000             case T30_PRI_EOM:
5001             case T30_EOM:
5002             case T30_EOS:
5003                 tx_end_page(s);
5004                 if (s->phase_d_handler)
5005                     s->phase_d_handler(s->phase_d_user_data, fcf);
5006                 /*endif*/
5007                 terminate_operation_in_progress(s);
5008                 report_tx_result(s, true);
5009                 return_to_phase_b(s, false);
5010                 break;
5011             case T30_PRI_EOP:
5012             case T30_EOP:
5013                 tx_end_page(s);
5014                 if (s->phase_d_handler)
5015                     s->phase_d_handler(s->phase_d_user_data, fcf);
5016                 /*endif*/
5017                 terminate_operation_in_progress(s);
5018                 send_dcn(s);
5019                 report_tx_result(s, true);
5020                 break;
5021             }
5022             /*endswitch*/
5023         }
5024         /*endif*/
5025         break;
5026     case T30_RNR:
5027         if (s->timer_t5 == 0)
5028             s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
5029         /*endif*/
5030         queue_phase(s, T30_PHASE_D_TX);
5031         set_state(s, T30_STATE_IV_PPS_RNR);
5032         send_rr(s);
5033         break;
5034     case T30_PPR:
5035         process_rx_ppr(s, msg, len);
5036         break;
5037     case T30_DCN:
5038         t30_set_status(s, T30_ERR_TX_BADPG);
5039         terminate_call(s);
5040         break;
5041     case T30_CRP:
5042         repeat_last_command(s);
5043         break;
5044     case T30_FNV:
5045         process_rx_fnv(s, msg, len);
5046         break;
5047     case T30_PPS:
5048         if (msg[3] == s->next_tx_step)
5049         {
5050             /* It looks like we have received an echo of what we just sent */
5051             span_log(&s->logging, SPAN_LOG_FLOW, "Received an echo of our own PPS-%s\n", t30_frametype(msg[3]));
5052             timer_t4_start(s);
5053             break;
5054         }
5055         /*endif*/
5056         /* We don't know what to do with this. */
5057         unexpected_final_frame(s, msg, len);
5058         t30_set_status(s, T30_ERR_TX_ECMPHD);
5059         break;
5060     case T30_PIN:
5061         if (s->remote_interrupts_allowed)
5062         {
5063             s->retries = 0;
5064             if (s->phase_d_handler)
5065             {
5066                 s->phase_d_handler(s->phase_d_user_data, fcf);
5067                 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
5068             }
5069             /*endif*/
5070         }
5071         /*endif*/
5072         /* Fall through */
5073     default:
5074         /* We don't know what to do with this. */
5075         unexpected_final_frame(s, msg, len);
5076         t30_set_status(s, T30_ERR_TX_ECMPHD);
5077         break;
5078     }
5079     /*endswitch*/
5080 }
5081 /*- End of function --------------------------------------------------------*/
5082 
process_state_iv_pps_rnr(t30_state_t * s,const uint8_t * msg,int len)5083 static void process_state_iv_pps_rnr(t30_state_t *s, const uint8_t *msg, int len)
5084 {
5085     uint8_t fcf;
5086 
5087     fcf = msg[2] & 0xFE;
5088     switch (fcf)
5089     {
5090     case T30_PIP:
5091         if (s->remote_interrupts_allowed)
5092         {
5093             s->retries = 0;
5094             if (s->phase_d_handler)
5095             {
5096                 s->phase_d_handler(s->phase_d_user_data, fcf);
5097                 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
5098             }
5099             /*endif*/
5100         }
5101         /*endif*/
5102         /* Fall through */
5103     case T30_MCF:
5104         s->retries = 0;
5105         s->timer_t5 = 0;
5106         /* Is there more of the current page to get, or do we move on? */
5107         span_log(&s->logging, SPAN_LOG_FLOW, "Is there more to send? - %d %d\n", s->ecm_frames, s->ecm_len[255]);
5108         if (!s->ecm_at_page_end  &&  get_partial_ecm_page(s) > 0)
5109         {
5110             span_log(&s->logging, SPAN_LOG_FLOW, "Additional image data to send\n");
5111             s->ecm_block++;
5112             set_state(s, T30_STATE_IV);
5113             queue_phase(s, T30_PHASE_C_ECM_TX);
5114             send_first_ecm_frame(s);
5115         }
5116         else
5117         {
5118             span_log(&s->logging, SPAN_LOG_FLOW, "Moving on to the next page\n");
5119             switch (s->next_tx_step)
5120             {
5121             case T30_PRI_MPS:
5122             case T30_MPS:
5123                 tx_end_page(s);
5124                 if (s->phase_d_handler)
5125                     s->phase_d_handler(s->phase_d_user_data, fcf);
5126                 /*endif*/
5127                 if (tx_start_page(s))
5128                 {
5129                     /* TODO: recover */
5130                     break;
5131                 }
5132                 /*endif*/
5133                 if (get_partial_ecm_page(s) > 0)
5134                 {
5135                     set_state(s, T30_STATE_IV);
5136                     queue_phase(s, T30_PHASE_C_ECM_TX);
5137                     send_first_ecm_frame(s);
5138                 }
5139                 /*endif*/
5140                 break;
5141             case T30_PRI_EOM:
5142             case T30_EOM:
5143             case T30_EOS:
5144                 tx_end_page(s);
5145                 if (s->phase_d_handler)
5146                     s->phase_d_handler(s->phase_d_user_data, fcf);
5147                 /*endif*/
5148                 terminate_operation_in_progress(s);
5149                 report_tx_result(s, true);
5150                 return_to_phase_b(s, false);
5151                 break;
5152             case T30_PRI_EOP:
5153             case T30_EOP:
5154                 tx_end_page(s);
5155                 if (s->phase_d_handler)
5156                     s->phase_d_handler(s->phase_d_user_data, fcf);
5157                 /*endif*/
5158                 terminate_operation_in_progress(s);
5159                 send_dcn(s);
5160                 report_tx_result(s, true);
5161                 break;
5162             }
5163             /*endswitch*/
5164         }
5165         /*endif*/
5166         break;
5167     case T30_RNR:
5168         if (s->timer_t5 == 0)
5169             s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
5170         /*endif*/
5171         queue_phase(s, T30_PHASE_D_TX);
5172         set_state(s, T30_STATE_IV_PPS_RNR);
5173         send_rr(s);
5174         break;
5175     case T30_DCN:
5176         t30_set_status(s, T30_ERR_RX_DCNRRD);
5177         terminate_call(s);
5178         break;
5179     case T30_CRP:
5180         repeat_last_command(s);
5181         break;
5182     case T30_FNV:
5183         process_rx_fnv(s, msg, len);
5184         break;
5185     case T30_PPS:
5186         if (msg[3] == s->next_tx_step)
5187         {
5188             /* It looks like we have received an echo of what we just sent */
5189             span_log(&s->logging, SPAN_LOG_FLOW, "Received an echo of our own PPS-%s\n", t30_frametype(msg[3]));
5190             timer_t4_start(s);
5191             break;
5192         }
5193         /*endif*/
5194         /* We don't know what to do with this. */
5195         unexpected_final_frame(s, msg, len);
5196         break;
5197     case T30_PIN:
5198         if (s->remote_interrupts_allowed)
5199         {
5200             s->retries = 0;
5201             if (s->phase_d_handler)
5202             {
5203                 s->phase_d_handler(s->phase_d_user_data, fcf);
5204                 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
5205             }
5206             /*endif*/
5207         }
5208         /*endif*/
5209         /* Fall through */
5210     default:
5211         /* We don't know what to do with this. */
5212         unexpected_final_frame(s, msg, len);
5213         break;
5214     }
5215     /*endswitch*/
5216 }
5217 /*- End of function --------------------------------------------------------*/
5218 
process_state_iv_ctc(t30_state_t * s,const uint8_t * msg,int len)5219 static void process_state_iv_ctc(t30_state_t *s, const uint8_t *msg, int len)
5220 {
5221     uint8_t fcf;
5222 
5223     fcf = msg[2] & 0xFE;
5224     switch (fcf)
5225     {
5226     case T30_CTR:
5227         /* Valid response to a CTC received */
5228         /* T.30 says we change back to long training here */
5229         s->short_train = false;
5230         /* Initiate resending of the remainder of the frames. */
5231         set_state(s, T30_STATE_IV);
5232         queue_phase(s, T30_PHASE_C_ECM_TX);
5233         send_first_ecm_frame(s);
5234         break;
5235     case T30_CRP:
5236         repeat_last_command(s);
5237         break;
5238     case T30_FNV:
5239         process_rx_fnv(s, msg, len);
5240         break;
5241     default:
5242         /* We don't know what to do with this. */
5243         unexpected_final_frame(s, msg, len);
5244         break;
5245     }
5246     /*endswitch*/
5247 }
5248 /*- End of function --------------------------------------------------------*/
5249 
process_state_iv_eor(t30_state_t * s,const uint8_t * msg,int len)5250 static void process_state_iv_eor(t30_state_t *s, const uint8_t *msg, int len)
5251 {
5252     uint8_t fcf;
5253 
5254     fcf = msg[2] & 0xFE;
5255     switch (fcf)
5256     {
5257     case T30_RNR:
5258         if (s->timer_t5 == 0)
5259             s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
5260         /*endif*/
5261         queue_phase(s, T30_PHASE_D_TX);
5262         set_state(s, T30_STATE_IV_EOR_RNR);
5263         send_rr(s);
5264         break;
5265     case T30_ERR:
5266         /* TODO: Continue with the next message if MPS or EOM? */
5267         t30_set_status(s, T30_ERR_RETRYDCN);
5268         s->timer_t5 = 0;
5269         send_dcn(s);
5270         break;
5271     case T30_CRP:
5272         repeat_last_command(s);
5273         break;
5274     case T30_FNV:
5275         process_rx_fnv(s, msg, len);
5276         break;
5277     case T30_PIN:
5278         if (s->remote_interrupts_allowed)
5279         {
5280             s->retries = 0;
5281             if (s->phase_d_handler)
5282             {
5283                 s->phase_d_handler(s->phase_d_user_data, fcf);
5284                 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
5285             }
5286             /*endif*/
5287         }
5288         /*endif*/
5289         /* Fall through */
5290     default:
5291         /* We don't know what to do with this. */
5292         unexpected_final_frame(s, msg, len);
5293         break;
5294     }
5295     /*endswitch*/
5296 }
5297 /*- End of function --------------------------------------------------------*/
5298 
process_state_iv_eor_rnr(t30_state_t * s,const uint8_t * msg,int len)5299 static void process_state_iv_eor_rnr(t30_state_t *s, const uint8_t *msg, int len)
5300 {
5301     uint8_t fcf;
5302 
5303     fcf = msg[2] & 0xFE;
5304     switch (fcf)
5305     {
5306     case T30_RNR:
5307         if (s->timer_t5 == 0)
5308             s->timer_t5 = ms_to_samples(DEFAULT_TIMER_T5);
5309         /*endif*/
5310         queue_phase(s, T30_PHASE_D_TX);
5311         set_state(s, T30_STATE_IV_EOR_RNR);
5312         send_rr(s);
5313         break;
5314     case T30_ERR:
5315         /* TODO: Continue with the next message if MPS or EOM? */
5316         t30_set_status(s, T30_ERR_RETRYDCN);
5317         s->timer_t5 = 0;
5318         send_dcn(s);
5319         break;
5320     case T30_DCN:
5321         t30_set_status(s, T30_ERR_RX_DCNRRD);
5322         terminate_call(s);
5323         break;
5324     case T30_CRP:
5325         repeat_last_command(s);
5326         break;
5327     case T30_FNV:
5328         process_rx_fnv(s, msg, len);
5329         break;
5330     case T30_PIN:
5331         if (s->remote_interrupts_allowed)
5332         {
5333             s->retries = 0;
5334             if (s->phase_d_handler)
5335             {
5336                 s->phase_d_handler(s->phase_d_user_data, fcf);
5337                 s->timer_t3 = ms_to_samples(DEFAULT_TIMER_T3);
5338             }
5339             /*endif*/
5340         }
5341         /*endif*/
5342         /* Fall through */
5343     default:
5344         /* We don't know what to do with this. */
5345         unexpected_final_frame(s, msg, len);
5346         break;
5347     }
5348     /*endswitch*/
5349 }
5350 /*- End of function --------------------------------------------------------*/
5351 
process_state_call_finished(t30_state_t * s,const uint8_t * msg,int len)5352 static void process_state_call_finished(t30_state_t *s, const uint8_t *msg, int len)
5353 {
5354     /* Simply ignore anything which comes in when we have declared the call
5355        to have finished. */
5356 }
5357 /*- End of function --------------------------------------------------------*/
5358 
process_rx_control_msg(t30_state_t * s,const uint8_t * msg,int len)5359 static void process_rx_control_msg(t30_state_t *s, const uint8_t *msg, int len)
5360 {
5361     /* We should only get good frames here. */
5362     print_frame(s, "Rx: ", msg, len);
5363     if (s->real_time_frame_handler)
5364         s->real_time_frame_handler(s->real_time_frame_user_data, true, msg, len);
5365     /*endif*/
5366     if ((msg[1] & 0x10) == 0)
5367     {
5368         /* This is not a final frame */
5369         /* It seems we should not restart the command or response timer when exchanging HDLC image
5370            data. If the modem looses sync in the middle of the image, we should just wait until
5371            the carrier goes away before proceeding. */
5372         if (s->phase != T30_PHASE_C_ECM_RX)
5373         {
5374             /* Restart the command or response timer, T2 or T4 */
5375             switch (s->timer_t2_t4_is)
5376             {
5377             case TIMER_IS_T1A:
5378             case TIMER_IS_T2:
5379             case TIMER_IS_T2_FLAGGED:
5380             case TIMER_IS_T2_DROPPED:
5381                 timer_t2_flagged_start(s);
5382                 break;
5383             case TIMER_IS_T4:
5384             case TIMER_IS_T4_FLAGGED:
5385             case TIMER_IS_T4_DROPPED:
5386                 timer_t4_flagged_start(s);
5387                 break;
5388             }
5389             /*endswitch*/
5390         }
5391         /*endif*/
5392         /* The following handles all the message types we expect to get without
5393            a final frame tag. If we get one that T.30 says we should not expect
5394            in a particular context, its pretty harmless, so don't worry. */
5395         switch (msg[2] & 0xFE)
5396         {
5397         case (T30_CSI & 0xFE):
5398             /* Called subscriber identification or Calling subscriber identification (T30_CIG) */
5399             /* OK in (NSF) (CSI) DIS */
5400             /* OK in (NSC) (CIG) DTC */
5401             /* OK in (PWD) (SEP) (CIG) DTC */
5402             decode_20digit_msg(s, s->rx_info.ident, &msg[2], len - 2);
5403             break;
5404         case (T30_NSF & 0xFE):
5405             if (msg[2] == T30_NSF)
5406             {
5407                 /* Non-standard facilities */
5408                 /* OK in (NSF) (CSI) DIS */
5409                 t35_decode(&msg[3], len - 3, &s->country, &s->vendor, &s->model);
5410                 if (s->country)
5411                     span_log(&s->logging, SPAN_LOG_FLOW, "The remote was made in '%s'\n", s->country);
5412                 /*endif*/
5413                 if (s->vendor)
5414                     span_log(&s->logging, SPAN_LOG_FLOW, "The remote was made by '%s'\n", s->vendor);
5415                 /*endif*/
5416                 if (s->model)
5417                     span_log(&s->logging, SPAN_LOG_FLOW, "The remote is a '%s'\n", s->model);
5418                 /*endif*/
5419                 s->rx_info.nsf_len = decode_nsf_nss_nsc(s, &s->rx_info.nsf, &msg[2], len - 2);
5420             }
5421             else
5422             {
5423                 /* NSC - Non-standard facilities command */
5424                 /* OK in (NSC) (CIG) DTC */
5425                 s->rx_info.nsc_len = decode_nsf_nss_nsc(s, &s->rx_info.nsc, &msg[2], len - 2);
5426             }
5427             /*endif*/
5428             break;
5429         case (T30_PWD & 0xFE):
5430             if (msg[2] == T30_PWD)
5431             {
5432                 /* Password */
5433                 /* OK in (SUB) (SID) (SEP) (PWD) (TSI) DCS */
5434                 /* OK in (SUB) (SID) (SEP) (PWD) (CIG) DTC */
5435                 decode_20digit_msg(s, s->rx_info.password, &msg[2], len - 2);
5436             }
5437             else
5438             {
5439                 unexpected_non_final_frame(s, msg, len);
5440             }
5441             /*endif*/
5442             break;
5443         case (T30_SEP & 0xFE):
5444             if (msg[2] == T30_SEP)
5445             {
5446                 /* Selective polling address */
5447                 /* OK in (PWD) (SEP) (CIG) DTC */
5448                 decode_20digit_msg(s, s->rx_info.selective_polling_address, &msg[2], len - 2);
5449             }
5450             else
5451             {
5452                 unexpected_non_final_frame(s, msg, len);
5453             }
5454             /*endif*/
5455             break;
5456         case (T30_PSA & 0xFE):
5457             if (msg[2] == T30_PSA)
5458             {
5459                 /* Polled sub-address */
5460                 decode_20digit_msg(s, s->rx_info.polled_sub_address, &msg[2], len - 2);
5461             }
5462             else
5463             {
5464                 unexpected_non_final_frame(s, msg, len);
5465             }
5466             /*endif*/
5467             break;
5468         case (T30_CIA & 0xFE):
5469             if (msg[2] == T30_CIA)
5470             {
5471                 /* Calling subscriber internet address */
5472                 decode_url_msg(s, NULL, &msg[2], len - 2);
5473             }
5474             else
5475             {
5476                 unexpected_non_final_frame(s, msg, len);
5477             }
5478             /*endif*/
5479             break;
5480         case (T30_ISP & 0xFE):
5481             if (msg[2] == T30_ISP)
5482             {
5483                 /* Internet selective polling address */
5484                 decode_url_msg(s, NULL, &msg[2], len - 2);
5485             }
5486             else
5487             {
5488                 unexpected_non_final_frame(s, msg, len);
5489             }
5490             /*endif*/
5491             break;
5492         case (T30_TSI & 0xFE):
5493             /* Transmitting subscriber identity */
5494             /* OK in (PWD) (SUB) (TSI) DCS */
5495             decode_20digit_msg(s, s->rx_info.ident, &msg[2], len - 2);
5496             break;
5497         case (T30_NSS & 0xFE):
5498             /* Non-standard facilities set-up */
5499             s->rx_info.nss_len = decode_nsf_nss_nsc(s, &s->rx_info.nss, &msg[2], len - 2);
5500             break;
5501         case (T30_SUB & 0xFE):
5502             /* Sub-address */
5503             /* OK in (PWD) (SUB) (TSI) DCS */
5504             decode_20digit_msg(s, s->rx_info.sub_address, &msg[2], len - 2);
5505             break;
5506         case (T30_SID & 0xFE):
5507             /* Sender Identification */
5508             /* OK in (SUB) (SID) (SEP) (PWD) (TSI) DCS */
5509             /* OK in (SUB) (SID) (SEP) (PWD) (CIG) DTC */
5510             decode_20digit_msg(s, s->rx_info.sender_ident, &msg[2], len - 2);
5511             break;
5512         case (T30_CSA & 0xFE):
5513             /* Calling subscriber internet address */
5514             decode_url_msg(s, NULL, &msg[2], len - 2);
5515             break;
5516         case (T30_TSA & 0xFE):
5517             /* Transmitting subscriber internet address */
5518             decode_url_msg(s, NULL, &msg[2], len - 2);
5519             break;
5520         case (T30_IRA & 0xFE):
5521             /* Internet routing address */
5522             decode_url_msg(s, NULL, &msg[2], len - 2);
5523             break;
5524         case T4_FCD:
5525             process_rx_fcd(s, msg, len);
5526             break;
5527         case T4_RCP:
5528             process_rx_rcp(s, msg, len);
5529             break;
5530         default:
5531             unexpected_non_final_frame(s, msg, len);
5532             break;
5533         }
5534         /*endswitch*/
5535     }
5536     else
5537     {
5538         /* This is a final frame */
5539         /* Once we have any successful message from the far end, we
5540            cancel timer T1 */
5541         s->timer_t0_t1 = 0;
5542 
5543         /* The following handles context sensitive message types, which should
5544            occur at the end of message sequences. They should, therefore have
5545            the final frame flag set. */
5546         span_log(&s->logging, SPAN_LOG_FLOW, "Rx final frame in state %s\n", state_names[s->state]);
5547 
5548         switch (s->state)
5549         {
5550         case T30_STATE_ANSWERING:
5551             process_state_answering(s, msg, len);
5552             break;
5553         case T30_STATE_B:
5554             process_state_b(s, msg, len);
5555             break;
5556         case T30_STATE_C:
5557             process_state_c(s, msg, len);
5558             break;
5559         case T30_STATE_D:
5560             process_state_d(s, msg, len);
5561             break;
5562         case T30_STATE_D_TCF:
5563             process_state_d_tcf(s, msg, len);
5564             break;
5565         case T30_STATE_D_POST_TCF:
5566             process_state_d_post_tcf(s, msg, len);
5567             break;
5568         case T30_STATE_F_TCF:
5569             process_state_f_tcf(s, msg, len);
5570             break;
5571         case T30_STATE_F_CFR:
5572             process_state_f_cfr(s, msg, len);
5573             break;
5574         case T30_STATE_F_FTT:
5575             process_state_f_ftt(s, msg, len);
5576             break;
5577         case T30_STATE_F_DOC_NON_ECM:
5578             process_state_f_doc_non_ecm(s, msg, len);
5579             break;
5580         case T30_STATE_F_POST_DOC_NON_ECM:
5581             process_state_f_post_doc_non_ecm(s, msg, len);
5582             break;
5583         case T30_STATE_F_DOC_ECM:
5584         case T30_STATE_F_POST_DOC_ECM:
5585             process_state_f_doc_and_post_doc_ecm(s, msg, len);
5586             break;
5587         case T30_STATE_F_POST_RCP_MCF:
5588             process_state_f_post_rcp_mcf(s, msg, len);
5589             break;
5590         case T30_STATE_F_POST_RCP_PPR:
5591             process_state_f_post_rcp_ppr(s, msg, len);
5592             break;
5593         case T30_STATE_F_POST_RCP_RNR:
5594             process_state_f_post_rcp_rnr(s, msg, len);
5595             break;
5596         case T30_STATE_R:
5597             process_state_r(s, msg, len);
5598             break;
5599         case T30_STATE_T:
5600             process_state_t(s, msg, len);
5601             break;
5602         case T30_STATE_I:
5603             process_state_i(s, msg, len);
5604             break;
5605         case T30_STATE_II:
5606             process_state_ii(s, msg, len);
5607             break;
5608         case T30_STATE_II_Q:
5609             process_state_ii_q(s, msg, len);
5610             break;
5611         case T30_STATE_III_Q:
5612             process_state_iii_q(s, msg, len);
5613             break;
5614         case T30_STATE_IV:
5615             process_state_iv(s, msg, len);
5616             break;
5617         case T30_STATE_IV_PPS_NULL:
5618             process_state_iv_pps_null(s, msg, len);
5619             break;
5620         case T30_STATE_IV_PPS_Q:
5621             process_state_iv_pps_q(s, msg, len);
5622             break;
5623         case T30_STATE_IV_PPS_RNR:
5624             process_state_iv_pps_rnr(s, msg, len);
5625             break;
5626         case T30_STATE_IV_CTC:
5627             process_state_iv_ctc(s, msg, len);
5628             break;
5629         case T30_STATE_IV_EOR:
5630             process_state_iv_eor(s, msg, len);
5631             break;
5632         case T30_STATE_IV_EOR_RNR:
5633             process_state_iv_eor_rnr(s, msg, len);
5634             break;
5635         case T30_STATE_CALL_FINISHED:
5636             process_state_call_finished(s, msg, len);
5637             break;
5638         default:
5639             /* We don't know what to do with this. */
5640             unexpected_final_frame(s, msg, len);
5641             break;
5642         }
5643         /*endswitch*/
5644     }
5645     /*endif*/
5646 }
5647 /*- End of function --------------------------------------------------------*/
5648 
queue_phase(t30_state_t * s,int phase)5649 static void queue_phase(t30_state_t *s, int phase)
5650 {
5651     if (s->rx_signal_present)
5652     {
5653         /* We need to wait for that signal to go away */
5654         if (s->next_phase != T30_PHASE_IDLE)
5655         {
5656             span_log(&s->logging, SPAN_LOG_FLOW, "Flushing queued phase %s\n", phase_names[s->next_phase]);
5657             /* Ensure nothing has been left in the queue that was scheduled to go out in the previous next
5658                phase */
5659             if (s->send_hdlc_handler)
5660                 s->send_hdlc_handler(s->send_hdlc_user_data, NULL, -1);
5661             /*endif*/
5662         }
5663         /*endif*/
5664         s->next_phase = phase;
5665         span_log(&s->logging, SPAN_LOG_FLOW, "Queuing phase %s\n", phase_names[s->next_phase]);
5666     }
5667     else
5668     {
5669         /* We don't need to queue the new phase. We can change to it immediately. */
5670         set_phase(s, phase);
5671     }
5672     /*endif*/
5673 }
5674 /*- End of function --------------------------------------------------------*/
5675 
set_phase(t30_state_t * s,int phase)5676 static void set_phase(t30_state_t *s, int phase)
5677 {
5678     if (s->next_phase != phase  &&  s->next_phase != T30_PHASE_IDLE)
5679     {
5680         span_log(&s->logging, SPAN_LOG_FLOW, "Flushing queued phase %s\n", phase_names[s->next_phase]);
5681         /* Ensure nothing has been left in the queue that was scheduled to go out in the previous next
5682            phase */
5683         if (s->send_hdlc_handler)
5684             s->send_hdlc_handler(s->send_hdlc_user_data, NULL, -1);
5685         /*endif*/
5686     }
5687     /*endif*/
5688     span_log(&s->logging, SPAN_LOG_FLOW, "Changing from phase %s to %s\n", phase_names[s->phase], phase_names[phase]);
5689     /* We may be killing a receiver before it has declared the end of the
5690        signal. Force the signal present indicator to off, because the
5691        receiver will never be able to. */
5692     if (s->phase != T30_PHASE_A_CED  &&  s->phase != T30_PHASE_A_CNG)
5693         s->rx_signal_present = false;
5694     /*endif*/
5695     s->rx_trained = false;
5696     s->rx_frame_received = false;
5697     s->phase = phase;
5698     s->next_phase = T30_PHASE_IDLE;
5699     switch (phase)
5700     {
5701     case T30_PHASE_A_CED:
5702         if (s->set_rx_type_handler)
5703             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_V21, 300, false, true);
5704         /*endif*/
5705         if (s->set_tx_type_handler)
5706             s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_CED, 0, false, false);
5707         /*endif*/
5708         break;
5709     case T30_PHASE_A_CNG:
5710         if (s->set_rx_type_handler)
5711             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_V21, 300, false, true);
5712         /*endif*/
5713         if (s->set_tx_type_handler)
5714             s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_CNG, 0, false, false);
5715         /*endif*/
5716         break;
5717     case T30_PHASE_B_RX:
5718     case T30_PHASE_D_RX:
5719         if (s->set_rx_type_handler)
5720             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_V21, 300, false, true);
5721         /*endif*/
5722         if (s->set_tx_type_handler)
5723             s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_NONE, 0, false, false);
5724         /*endif*/
5725         break;
5726     case T30_PHASE_B_TX:
5727     case T30_PHASE_D_TX:
5728         if (!s->far_end_detected  &&  s->timer_t0_t1 > 0)
5729         {
5730             /* Switch from T0 to T1 */
5731             s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T1);
5732             s->far_end_detected = true;
5733         }
5734         /*endif*/
5735         if (s->set_rx_type_handler)
5736             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, false, false);
5737         /*endif*/
5738         if (s->set_tx_type_handler)
5739             s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_V21, 300, false, true);
5740         /*endif*/
5741         break;
5742     case T30_PHASE_C_NON_ECM_RX:
5743         if (s->set_rx_type_handler)
5744         {
5745             /* Momentarily stop the receive modem, so the next change is forced to happen. If we don't do this
5746                an HDLC message on the slow modem, which has disabled the fast modem, will prevent the same
5747                fast modem from restarting. */
5748             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, false, false);
5749             s->set_rx_type_handler(s->set_rx_type_user_data, fallback_sequence[s->current_fallback].modem_type, fallback_sequence[s->current_fallback].bit_rate, s->short_train, false);
5750         }
5751         /*endif*/
5752         if (s->set_tx_type_handler)
5753             s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_NONE, 0, false, false);
5754         /*endif*/
5755         break;
5756     case T30_PHASE_C_NON_ECM_TX:
5757         /* Pause before switching from anything to phase C */
5758         /* Always prime the training count for 1.5s of data at the current rate. Its harmless if
5759            we prime it and are not doing TCF. */
5760         s->tcf_test_bits = (3*fallback_sequence[s->current_fallback].bit_rate)/2;
5761         if (s->set_rx_type_handler)
5762         {
5763             /* Momentarily stop the receive modem, so the next change is forced to happen. If we don't do this
5764                an HDLC message on the slow modem, which has disabled the fast modem, will prevent the same
5765                fast modem from restarting. */
5766             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, false, false);
5767             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, false, false);
5768         }
5769         /*endif*/
5770         if (s->set_tx_type_handler)
5771             s->set_tx_type_handler(s->set_tx_type_user_data, fallback_sequence[s->current_fallback].modem_type, fallback_sequence[s->current_fallback].bit_rate, s->short_train, false);
5772         /*endif*/
5773         break;
5774     case T30_PHASE_C_ECM_RX:
5775         if (s->set_rx_type_handler)
5776             s->set_rx_type_handler(s->set_rx_type_user_data, fallback_sequence[s->current_fallback].modem_type, fallback_sequence[s->current_fallback].bit_rate, s->short_train, true);
5777         /*endif*/
5778         if (s->set_tx_type_handler)
5779             s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_NONE, 0, false, false);
5780         /*endif*/
5781         break;
5782     case T30_PHASE_C_ECM_TX:
5783         /* Pause before switching from anything to phase C */
5784         if (s->set_rx_type_handler)
5785             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, false, false);
5786         /*endif*/
5787         if (s->set_tx_type_handler)
5788             s->set_tx_type_handler(s->set_tx_type_user_data, fallback_sequence[s->current_fallback].modem_type, fallback_sequence[s->current_fallback].bit_rate, s->short_train, true);
5789         /*endif*/
5790         break;
5791     case T30_PHASE_E:
5792         /* Send a little silence before ending things, to ensure the buffers are flushed all they way
5793            through to the far end, and the far end has been able to see the last message we sent. */
5794         s->tcf_test_bits = 0;
5795         s->tcf_current_zeros = 0;
5796         s->tcf_most_zeros = 0;
5797         if (s->set_rx_type_handler)
5798             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_NONE, 0, false, false);
5799         /*endif*/
5800         if (s->set_tx_type_handler)
5801             s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_PAUSE, 0, FINAL_FLUSH_TIME, false);
5802         /*endif*/
5803         break;
5804     case T30_PHASE_CALL_FINISHED:
5805         if (s->set_rx_type_handler)
5806             s->set_rx_type_handler(s->set_rx_type_user_data, T30_MODEM_DONE, 0, false, false);
5807         /*endif*/
5808         if (s->set_tx_type_handler)
5809             s->set_tx_type_handler(s->set_tx_type_user_data, T30_MODEM_DONE, 0, false, false);
5810         /*endif*/
5811         break;
5812     }
5813     /*endswitch*/
5814 }
5815 /*- End of function --------------------------------------------------------*/
5816 
set_state(t30_state_t * s,int state)5817 static void set_state(t30_state_t *s, int state)
5818 {
5819     if (s->state != state)
5820     {
5821         span_log(&s->logging, SPAN_LOG_FLOW, "Changing from state %s to %s\n", state_names[s->state], state_names[state]);
5822         s->state = state;
5823     }
5824     /*endif*/
5825     s->step = 0;
5826 }
5827 /*- End of function --------------------------------------------------------*/
5828 
repeat_last_command(t30_state_t * s)5829 static void repeat_last_command(t30_state_t *s)
5830 {
5831     s->step = 0;
5832     /* If T0 or T1 are in progress we do not want to apply a limit to the maximum number of retries. We
5833        let T0 or T1 terminate things if the far end doesn't communicate. */
5834     s->retries++;
5835     if (s->timer_t0_t1 == 0  &&  s->retries >= MAX_COMMAND_TRIES)
5836     {
5837         span_log(&s->logging, SPAN_LOG_FLOW, "Too many retries. Giving up.\n");
5838         switch (s->state)
5839         {
5840         case T30_STATE_D_POST_TCF:
5841             /* Received no response to DCS or TCF */
5842             t30_set_status(s, T30_ERR_TX_PHBDEAD);
5843             break;
5844         case T30_STATE_II_Q:
5845         case T30_STATE_IV_PPS_NULL:
5846         case T30_STATE_IV_PPS_Q:
5847             /* No response after sending a page */
5848             t30_set_status(s, T30_ERR_TX_PHDDEAD);
5849             break;
5850         default:
5851             /* Disconnect after permitted retries */
5852             t30_set_status(s, T30_ERR_RETRYDCN);
5853             break;
5854         }
5855         /*endswitch*/
5856         send_dcn(s);
5857         return;
5858     }
5859     /*endif*/
5860     span_log(&s->logging, SPAN_LOG_FLOW, "Retry number %d\n", s->retries);
5861     switch (s->state)
5862     {
5863     case T30_STATE_R:
5864         s->dis_received = false;
5865         queue_phase(s, T30_PHASE_B_TX);
5866         send_dis_or_dtc_sequence(s, true);
5867         break;
5868     case T30_STATE_F_DOC_NON_ECM:
5869     case T30_STATE_III_Q:
5870         queue_phase(s, T30_PHASE_D_TX);
5871         send_simple_frame(s, s->last_rx_page_result);
5872         break;
5873     case T30_STATE_II_Q:
5874         queue_phase(s, T30_PHASE_D_TX);
5875         send_simple_frame(s, s->next_tx_step);
5876         break;
5877     case T30_STATE_IV_PPS_NULL:
5878     case T30_STATE_IV_PPS_Q:
5879         queue_phase(s, T30_PHASE_D_TX);
5880         send_pps_frame(s);
5881         break;
5882     case T30_STATE_IV_PPS_RNR:
5883     case T30_STATE_IV_EOR_RNR:
5884         queue_phase(s, T30_PHASE_D_TX);
5885         send_rr(s);
5886         break;
5887     case T30_STATE_D:
5888         queue_phase(s, T30_PHASE_B_TX);
5889         send_dcs_sequence(s, true);
5890         break;
5891     case T30_STATE_F_FTT:
5892         queue_phase(s, T30_PHASE_B_TX);
5893         send_simple_frame(s, T30_FTT);
5894         break;
5895     case T30_STATE_F_CFR:
5896         queue_phase(s, T30_PHASE_B_TX);
5897         send_cfr_sequence(s, true);
5898         break;
5899     case T30_STATE_D_POST_TCF:
5900         /* Need to send the whole training thing again */
5901         s->short_train = false;
5902         queue_phase(s, T30_PHASE_B_TX);
5903         send_dcs_sequence(s, true);
5904         break;
5905     case T30_STATE_F_POST_RCP_PPR:
5906         queue_phase(s, T30_PHASE_D_TX);
5907         send_frame(s, s->ecm_frame_map, 3 + 32);
5908         break;
5909     case T30_STATE_F_POST_RCP_MCF:
5910         queue_phase(s, T30_PHASE_D_TX);
5911         send_simple_frame(s, T30_MCF);
5912         break;
5913     case T30_STATE_F_POST_RCP_RNR:
5914         /* Just ignore */
5915         break;
5916     default:
5917         span_log(&s->logging,
5918                  SPAN_LOG_FLOW,
5919                  "Repeat command called with nothing to repeat - phase %s, state %s\n",
5920                  phase_names[s->phase],
5921                  state_names[s->state]);
5922         break;
5923     }
5924     /*endswitch*/
5925 }
5926 /*- End of function --------------------------------------------------------*/
5927 
timer_t2_start(t30_state_t * s)5928 static void timer_t2_start(t30_state_t *s)
5929 {
5930     span_log(&s->logging, SPAN_LOG_FLOW, "Start T2\n");
5931     s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2);
5932     s->timer_t2_t4_is = TIMER_IS_T2;
5933 }
5934 /*- End of function --------------------------------------------------------*/
5935 
timer_t2_flagged_start(t30_state_t * s)5936 static void timer_t2_flagged_start(t30_state_t *s)
5937 {
5938     /* T.30 Annex A says timeout T1 should be used in ECM phase C to time out the
5939        first frame after the flags start. This seems a strange reuse of the name T1
5940        for a different purpose, but there it is. We distinguish it by calling it T1A. */
5941     if (s->phase == T30_PHASE_C_ECM_RX)
5942     {
5943         span_log(&s->logging, SPAN_LOG_FLOW, "Start T1A\n");
5944         s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T1A);
5945         s->timer_t2_t4_is = TIMER_IS_T1A;
5946     }
5947     else
5948     {
5949         span_log(&s->logging, SPAN_LOG_FLOW, "Start T2-flagged\n");
5950         s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2_FLAGGED);
5951         s->timer_t2_t4_is = TIMER_IS_T2_FLAGGED;
5952     }
5953     /*endif*/
5954 }
5955 /*- End of function --------------------------------------------------------*/
5956 
timer_t2_dropped_start(t30_state_t * s)5957 static void timer_t2_dropped_start(t30_state_t *s)
5958 {
5959     span_log(&s->logging, SPAN_LOG_FLOW, "Start T2-dropped\n");
5960     s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T2_DROPPED);
5961     s->timer_t2_t4_is = TIMER_IS_T2_DROPPED;
5962 }
5963 /*- End of function --------------------------------------------------------*/
5964 
timer_t4_start(t30_state_t * s)5965 static void timer_t4_start(t30_state_t *s)
5966 {
5967     span_log(&s->logging, SPAN_LOG_FLOW, "Start T4\n");
5968     s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4);
5969     s->timer_t2_t4_is = TIMER_IS_T4;
5970 }
5971 /*- End of function --------------------------------------------------------*/
5972 
timer_t4_flagged_start(t30_state_t * s)5973 static void timer_t4_flagged_start(t30_state_t *s)
5974 {
5975     span_log(&s->logging, SPAN_LOG_FLOW, "Start T4-flagged\n");
5976     s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4_FLAGGED);
5977     s->timer_t2_t4_is = TIMER_IS_T4_FLAGGED;
5978 }
5979 /*- End of function --------------------------------------------------------*/
5980 
timer_t4_dropped_start(t30_state_t * s)5981 static void timer_t4_dropped_start(t30_state_t *s)
5982 {
5983     span_log(&s->logging, SPAN_LOG_FLOW, "Start T4-dropped\n");
5984     s->timer_t2_t4 = ms_to_samples(DEFAULT_TIMER_T4_DROPPED);
5985     s->timer_t2_t4_is = TIMER_IS_T4_DROPPED;
5986 }
5987 /*- End of function --------------------------------------------------------*/
5988 
timer_t2_t4_stop(t30_state_t * s)5989 static void timer_t2_t4_stop(t30_state_t *s)
5990 {
5991     const char *tag;
5992 
5993     switch (s->timer_t2_t4_is)
5994     {
5995     case TIMER_IS_IDLE:
5996         tag = "none";
5997         break;
5998     case TIMER_IS_T1A:
5999         tag = "T1A";
6000         break;
6001     case TIMER_IS_T2:
6002         tag = "T2";
6003         break;
6004     case TIMER_IS_T2_FLAGGED:
6005         tag = "T2-flagged";
6006         break;
6007     case TIMER_IS_T2_DROPPED:
6008         tag = "T2-dropped";
6009         break;
6010     case TIMER_IS_T2C:
6011         tag = "T2C";
6012         break;
6013     case TIMER_IS_T4:
6014         tag = "T4";
6015         break;
6016     case TIMER_IS_T4_FLAGGED:
6017         tag = "T4-flagged";
6018         break;
6019     case TIMER_IS_T4_DROPPED:
6020         tag = "T4-dropped";
6021         break;
6022     case TIMER_IS_T4C:
6023         tag = "T4C";
6024         break;
6025     default:
6026         tag = "T2/T4";
6027         break;
6028     }
6029     /*endswitch*/
6030     span_log(&s->logging, SPAN_LOG_FLOW, "Stop %s (%d remaining)\n", tag, s->timer_t2_t4);
6031     s->timer_t2_t4 = 0;
6032     s->timer_t2_t4_is = TIMER_IS_IDLE;
6033 }
6034 /*- End of function --------------------------------------------------------*/
6035 
timer_t0_expired(t30_state_t * s)6036 static void timer_t0_expired(t30_state_t *s)
6037 {
6038     span_log(&s->logging, SPAN_LOG_FLOW, "T0 expired in state %s\n", state_names[s->state]);
6039     t30_set_status(s, T30_ERR_T0_EXPIRED);
6040     /* Just end the call */
6041     terminate_call(s);
6042 }
6043 /*- End of function --------------------------------------------------------*/
6044 
timer_t1_expired(t30_state_t * s)6045 static void timer_t1_expired(t30_state_t *s)
6046 {
6047     span_log(&s->logging, SPAN_LOG_FLOW, "T1 expired in state %s\n", state_names[s->state]);
6048     /* The initial connection establishment has timeout out. In other words, we
6049        have been unable to communicate successfully with a remote machine.
6050        It is time to abandon the call. */
6051     t30_set_status(s, T30_ERR_T1_EXPIRED);
6052     switch (s->state)
6053     {
6054     case T30_STATE_T:
6055         /* Just end the call */
6056         terminate_call(s);
6057         break;
6058     case T30_STATE_R:
6059         /* Send disconnect, and then end the call. Since we have not
6060            successfully contacted the far end, it is unclear why we should
6061            send a disconnect message at this point. However, it is what T.30
6062            says we should do. */
6063         send_dcn(s);
6064         break;
6065     }
6066     /*endswitch*/
6067 }
6068 /*- End of function --------------------------------------------------------*/
6069 
timer_t1a_expired(t30_state_t * s)6070 static void timer_t1a_expired(t30_state_t *s)
6071 {
6072     span_log(&s->logging, SPAN_LOG_FLOW, "T1A expired in phase %s, state %s. An HDLC frame lasted too long.\n", phase_names[s->phase], state_names[s->state]);
6073     t30_set_status(s, T30_ERR_HDLC_CARRIER);
6074     terminate_call(s);
6075 }
6076 /*- End of function --------------------------------------------------------*/
6077 
timer_t2_expired(t30_state_t * s)6078 static void timer_t2_expired(t30_state_t *s)
6079 {
6080     if (s->timer_t2_t4_is != TIMER_IS_T2_DROPPED)
6081         span_log(&s->logging, SPAN_LOG_FLOW, "T2 expired in phase %s, state %s\n", phase_names[s->phase], state_names[s->state]);
6082     /*endif*/
6083     switch (s->state)
6084     {
6085     case T30_STATE_III_Q:
6086     case T30_STATE_F_POST_RCP_PPR:
6087     case T30_STATE_F_POST_RCP_MCF:
6088         switch (s->next_rx_step)
6089         {
6090         case T30_PRI_EOM:
6091         case T30_EOM:
6092         case T30_EOS:
6093             /* We didn't receive a response to our T30_MCF after T30_EOM, so we must be OK
6094                to proceed to phase B, and pretty much act like its the beginning of a call. */
6095             span_log(&s->logging, SPAN_LOG_FLOW, "Returning to phase B after %s\n", t30_frametype(s->next_rx_step));
6096             /* Run the T1 timer, like we do on first detecting the far end. */
6097             s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T1);
6098             s->dis_received = false;
6099             set_phase(s, T30_PHASE_B_TX);
6100             timer_t2_start(s);
6101             send_dis_or_dtc_sequence(s, true);
6102             return;
6103         }
6104         /*endswitch*/
6105         break;
6106     case T30_STATE_F_TCF:
6107         span_log(&s->logging, SPAN_LOG_FLOW, "No TCF data received\n");
6108         set_phase(s, T30_PHASE_B_TX);
6109         set_state(s, T30_STATE_F_FTT);
6110         send_simple_frame(s, T30_FTT);
6111         return;
6112     case T30_STATE_F_DOC_ECM:
6113     case T30_STATE_F_DOC_NON_ECM:
6114         /* While waiting for FAX page */
6115         t30_set_status(s, T30_ERR_RX_T2EXPFAX);
6116         break;
6117     case T30_STATE_F_POST_DOC_ECM:
6118     case T30_STATE_F_POST_DOC_NON_ECM:
6119         /* While waiting for next FAX page */
6120         /* Figure 5-2b/T.30 and note 7 says we should allow 1 to 3 tries at this point.
6121            The way we work now is effectively hard coding a 1 try limit */
6122         t30_set_status(s, T30_ERR_RX_T2EXPMPS);
6123         break;
6124 #if 0
6125     case ??????:
6126         /* While waiting for DCN */
6127         t30_set_status(s, T30_ERR_RX_T2EXPDCN);
6128         break;
6129     case ??????:
6130         /* While waiting for phase D */
6131         t30_set_status(s, T30_ERR_RX_T2EXPD);
6132         break;
6133 #endif
6134     case T30_STATE_IV_PPS_RNR:
6135     case T30_STATE_IV_EOR_RNR:
6136         /* While waiting for RR command */
6137         t30_set_status(s, T30_ERR_RX_T2EXPRR);
6138         break;
6139     case T30_STATE_R:
6140         /* While waiting for NSS, DCS or MCF */
6141         t30_set_status(s, T30_ERR_RX_T2EXP);
6142         break;
6143     case T30_STATE_F_FTT:
6144         break;
6145     }
6146     /*endswitch*/
6147     queue_phase(s, T30_PHASE_B_TX);
6148     start_receiving_document(s);
6149 }
6150 /*- End of function --------------------------------------------------------*/
6151 
timer_t2_flagged_expired(t30_state_t * s)6152 static void timer_t2_flagged_expired(t30_state_t *s)
6153 {
6154     span_log(&s->logging, SPAN_LOG_FLOW, "T2-flagged expired in phase %s, state %s. An HDLC frame lasted too long.\n", phase_names[s->phase], state_names[s->state]);
6155     t30_set_status(s, T30_ERR_HDLC_CARRIER);
6156     /* T.30 says we should retry at this point, but we can't. We would need to
6157        wait for the far end to go quiet before sending. Experience says you only
6158        get here when the far end is buggy, and it will not go quiet unless you
6159        hang up. If we were to retry, how long should we wait for the line to go
6160        quiet? T.30 doesn't specify things like that. The only effective strategy,
6161        when trying to deal with problems found in logs from real world systems,
6162        is to abandon the call. */
6163     terminate_call(s);
6164 }
6165 /*- End of function --------------------------------------------------------*/
6166 
timer_t2_dropped_expired(t30_state_t * s)6167 static void timer_t2_dropped_expired(t30_state_t *s)
6168 {
6169     span_log(&s->logging, SPAN_LOG_FLOW, "T2-dropped expired in phase %s, state %s. The line is now quiet.\n", phase_names[s->phase], state_names[s->state]);
6170     timer_t2_expired(s);
6171 }
6172 /*- End of function --------------------------------------------------------*/
6173 
timer_t3_expired(t30_state_t * s)6174 static void timer_t3_expired(t30_state_t *s)
6175 {
6176     span_log(&s->logging, SPAN_LOG_FLOW, "T3 expired in phase %s, state %s\n", phase_names[s->phase], state_names[s->state]);
6177     t30_set_status(s, T30_ERR_T3_EXPIRED);
6178     terminate_call(s);
6179 }
6180 /*- End of function --------------------------------------------------------*/
6181 
timer_t4_expired(t30_state_t * s)6182 static void timer_t4_expired(t30_state_t *s)
6183 {
6184     /* There was no response (or only a corrupt response) to a command,
6185        within the T4 timeout period. */
6186     if (s->timer_t2_t4_is == TIMER_IS_T4)
6187         span_log(&s->logging, SPAN_LOG_FLOW, "T4 expired in phase %s, state %s\n", phase_names[s->phase], state_names[s->state]);
6188     /*endif*/
6189     /* Of course, things might just be a little late, especially if there are T.38
6190        links in the path. There is no point in simply timing out, and resending,
6191        if we are currently receiving something from the far end - its a half-duplex
6192        path, so the two transmissions will conflict. Our best strategy is to wait
6193        until there is nothing being received, or give up after a long backstop timeout.
6194        In the meantime, if we get a meaningful, if somewhat delayed, response, we
6195        should accept it and carry on. */
6196     repeat_last_command(s);
6197 }
6198 /*- End of function --------------------------------------------------------*/
6199 
timer_t4_flagged_expired(t30_state_t * s)6200 static void timer_t4_flagged_expired(t30_state_t *s)
6201 {
6202     span_log(&s->logging, SPAN_LOG_FLOW, "T4-flagged expired in phase %s, state %s. An HDLC frame lasted too long.\n", phase_names[s->phase], state_names[s->state]);
6203     t30_set_status(s, T30_ERR_HDLC_CARRIER);
6204     terminate_call(s);
6205 }
6206 /*- End of function --------------------------------------------------------*/
6207 
timer_t4_dropped_expired(t30_state_t * s)6208 static void timer_t4_dropped_expired(t30_state_t *s)
6209 {
6210     span_log(&s->logging, SPAN_LOG_FLOW, "T4-dropped expired in phase %s, state %s. The line is now quiet.\n", phase_names[s->phase], state_names[s->state]);
6211     timer_t4_expired(s);
6212 }
6213 /*- End of function --------------------------------------------------------*/
6214 
timer_t5_expired(t30_state_t * s)6215 static void timer_t5_expired(t30_state_t *s)
6216 {
6217     /* Give up waiting for the receiver to become ready in error correction mode */
6218     span_log(&s->logging, SPAN_LOG_FLOW, "T5 expired in phase %s, state %s\n", phase_names[s->phase], state_names[s->state]);
6219     t30_set_status(s, T30_ERR_TX_T5EXP);
6220 }
6221 /*- End of function --------------------------------------------------------*/
6222 
decode_20digit_msg(t30_state_t * s,char * msg,const uint8_t * pkt,int len)6223 static void decode_20digit_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len)
6224 {
6225     int p;
6226     int k;
6227     char text[T30_MAX_IDENT_LEN + 1];
6228 
6229     if (msg == NULL)
6230         msg = text;
6231     /*endif*/
6232     if (len > T30_MAX_IDENT_LEN + 1)
6233     {
6234         unexpected_frame_length(s, pkt, len);
6235         msg[0] = '\0';
6236         return;
6237     }
6238     /*endif*/
6239     p = len;
6240     /* Strip trailing spaces */
6241     while (p > 1  &&  pkt[p - 1] == ' ')
6242         p--;
6243     /*endwhile*/
6244     /* The string is actually backwards in the message */
6245     k = 0;
6246     while (p > 1)
6247         msg[k++] = pkt[--p];
6248     /*endwhile*/
6249     msg[k] = '\0';
6250     span_log(&s->logging, SPAN_LOG_FLOW, "Remote gave %s as: \"%s\"\n", t30_frametype(pkt[0]), msg);
6251 }
6252 /*- End of function --------------------------------------------------------*/
6253 
decode_url_msg(t30_state_t * s,char * msg,const uint8_t * pkt,int len)6254 static void decode_url_msg(t30_state_t *s, char *msg, const uint8_t *pkt, int len)
6255 {
6256     char text[77 + 1];
6257 
6258     /* TODO: decode properly, as per T.30 5.3.6.2.12 */
6259     if (msg == NULL)
6260         msg = text;
6261     /*endif*/
6262     if (len < 3  ||  len > 77 + 3  ||  len != pkt[2] + 3)
6263     {
6264         unexpected_frame_length(s, pkt, len);
6265         msg[0] = '\0';
6266         return;
6267     }
6268     /*endif*/
6269     /* First octet is the sequence number of the packet.
6270             Bit 7 = 1 for more follows, 0 for last packet in the sequence.
6271             Bits 6-0 = The sequence number, 0 to 0x7F
6272        Second octet is the type of internet address.
6273             Bits 7-4 = reserved
6274             Bits 3-0 = type:
6275                     0 = reserved
6276                     1 = e-mail address
6277                     2 = URL
6278                     3 = TCP/IP V4
6279                     4 = TCP/IP V6
6280                     5 = international phone number, in the usual +... format
6281                     6-15 = reserved
6282        Third octet is the length of the internet address
6283             Bit 7 = 1 for more follows, 0 for last packet in the sequence.
6284             Bits 6-0 = length
6285      */
6286     memcpy(msg, &pkt[3], len - 3);
6287     msg[len - 3] = '\0';
6288     span_log(&s->logging, SPAN_LOG_FLOW, "Remote fax gave %s as: %d, %d, \"%s\"\n", t30_frametype(pkt[0]), pkt[0], pkt[1], msg);
6289 }
6290 /*- End of function --------------------------------------------------------*/
6291 
decode_nsf_nss_nsc(t30_state_t * s,uint8_t * msg[],const uint8_t * pkt,int len)6292 static int decode_nsf_nss_nsc(t30_state_t *s, uint8_t *msg[], const uint8_t *pkt, int len)
6293 {
6294     uint8_t *t;
6295 
6296     if ((t = span_alloc(len - 1)) == NULL)
6297         return 0;
6298     /*endif*/
6299     memcpy(t, &pkt[1], len - 1);
6300     *msg = t;
6301     return len - 1;
6302 }
6303 /*- End of function --------------------------------------------------------*/
6304 
t30_non_ecm_rx_status(void * user_data,int status)6305 static void t30_non_ecm_rx_status(void *user_data, int status)
6306 {
6307     t30_state_t *s;
6308     int was_trained;
6309 
6310     s = (t30_state_t *) user_data;
6311     span_log(&s->logging, SPAN_LOG_FLOW, "Non-ECM signal status is %s (%d) in state %s\n", signal_status_to_str(status), status, state_names[s->state]);
6312     switch (status)
6313     {
6314     case SIG_STATUS_TRAINING_IN_PROGRESS:
6315         s->image_carrier_attempted = true;
6316         break;
6317     case SIG_STATUS_TRAINING_FAILED:
6318         s->rx_trained = false;
6319         break;
6320     case SIG_STATUS_TRAINING_SUCCEEDED:
6321         /* The modem is now trained */
6322         /* In case we are in trainability test mode... */
6323         s->tcf_test_bits = 0;
6324         s->tcf_current_zeros = 0;
6325         s->tcf_most_zeros = 0;
6326         s->rx_signal_present = true;
6327         s->rx_trained = true;
6328         timer_t2_t4_stop(s);
6329         break;
6330     case SIG_STATUS_CARRIER_UP:
6331         break;
6332     case SIG_STATUS_CARRIER_DOWN:
6333         was_trained = s->rx_trained;
6334         s->rx_signal_present = false;
6335         s->rx_trained = false;
6336         switch (s->state)
6337         {
6338         case T30_STATE_F_TCF:
6339             /* Only respond if we managed to actually sync up with the source. We don't
6340                want to respond just because we saw a click. These often occur just
6341                before the real signal, with many modems. Presumably this is due to switching
6342                within the far end modem. We also want to avoid the possibility of responding
6343                to the tail end of any slow modem signal. If there was a genuine data signal
6344                which we failed to train on it should not matter. If things are that bad, we
6345                do not stand much chance of good quality communications. */
6346             if (was_trained)
6347             {
6348                 /* Although T.30 says the training test should be 1.5s of all 0's, some FAX
6349                    machines send a burst of all 1's before the all 0's. Tolerate this. */
6350                 if (s->tcf_current_zeros > s->tcf_most_zeros)
6351                     s->tcf_most_zeros = s->tcf_current_zeros;
6352                 /*endif*/
6353                 span_log(&s->logging, SPAN_LOG_FLOW, "Trainability (TCF) test result - %d total bits. longest run of zeros was %d\n", s->tcf_test_bits, s->tcf_most_zeros);
6354                 if (s->tcf_most_zeros < fallback_sequence[s->current_fallback].bit_rate)
6355                 {
6356                     span_log(&s->logging, SPAN_LOG_FLOW, "Trainability (TCF) test failed - longest run of zeros was %d\n", s->tcf_most_zeros);
6357                     set_phase(s, T30_PHASE_B_TX);
6358                     set_state(s, T30_STATE_F_FTT);
6359                     send_simple_frame(s, T30_FTT);
6360                 }
6361                 else
6362                 {
6363                     /* The training went OK */
6364                     s->short_train = true;
6365                     rx_start_page(s);
6366                     set_phase(s, T30_PHASE_B_TX);
6367                     set_state(s, T30_STATE_F_CFR);
6368                     send_cfr_sequence(s, true);
6369                 }
6370                 /*endif*/
6371             }
6372             /*endif*/
6373             break;
6374         case T30_STATE_F_POST_DOC_NON_ECM:
6375             /* Page ended cleanly */
6376             /* We have received something, so any missing carrier status is out of date */
6377             if (s->current_status == T30_ERR_RX_NOCARRIER)
6378                 t30_set_status(s, T30_ERR_OK);
6379             /*endif*/
6380             break;
6381         default:
6382             if (was_trained)
6383             {
6384                 span_log(&s->logging, SPAN_LOG_WARNING, "Page did not end cleanly\n");
6385                 /* We trained OK, so we should have some kind of received page, even though
6386                    it did not end cleanly. */
6387                 set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
6388                 set_phase(s, T30_PHASE_D_RX);
6389                 timer_t2_start(s);
6390                 /* We have received something, so any missing carrier status is out of date */
6391                 if (s->current_status == T30_ERR_RX_NOCARRIER)
6392                     t30_set_status(s, T30_ERR_OK);
6393                 /*endif*/
6394             }
6395             else
6396             {
6397                 span_log(&s->logging, SPAN_LOG_WARNING, "Non-ECM carrier not found\n");
6398                 t30_set_status(s, T30_ERR_RX_NOCARRIER);
6399             }
6400             /*endif*/
6401             break;
6402         }
6403         /*endswitch*/
6404         if (s->next_phase != T30_PHASE_IDLE)
6405             set_phase(s, s->next_phase);
6406         /*endif*/
6407         break;
6408     default:
6409         span_log(&s->logging, SPAN_LOG_WARNING, "Unexpected non-ECM rx status - %d!\n", status);
6410         break;
6411     }
6412     /*endswitch*/
6413 }
6414 /*- End of function --------------------------------------------------------*/
6415 
t30_non_ecm_put_bit(void * user_data,int bit)6416 SPAN_DECLARE(void) t30_non_ecm_put_bit(void *user_data, int bit)
6417 {
6418     t30_state_t *s;
6419     int res;
6420 
6421     if (bit < 0)
6422     {
6423         t30_non_ecm_rx_status(user_data, bit);
6424         return;
6425     }
6426     /*endif*/
6427     s = (t30_state_t *) user_data;
6428     switch (s->state)
6429     {
6430     case T30_STATE_F_TCF:
6431         /* Trainability test */
6432         s->tcf_test_bits++;
6433         if (bit)
6434         {
6435             if (s->tcf_current_zeros > s->tcf_most_zeros)
6436                 s->tcf_most_zeros = s->tcf_current_zeros;
6437             /*endif*/
6438             s->tcf_current_zeros = 0;
6439         }
6440         else
6441         {
6442             s->tcf_current_zeros++;
6443         }
6444         /*endif*/
6445         break;
6446     case T30_STATE_F_DOC_NON_ECM:
6447         /* Image transfer */
6448         if ((res = t4_rx_put_bit(&s->t4.rx, bit)) != T4_DECODE_MORE_DATA)
6449         {
6450             /* This is the end of the image */
6451             if (res != T4_DECODE_OK)
6452                 span_log(&s->logging, SPAN_LOG_FLOW, "Page ended with status %d\n", res);
6453             /*endif*/
6454             set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
6455             queue_phase(s, T30_PHASE_D_RX);
6456             timer_t2_start(s);
6457         }
6458         /*endif*/
6459         break;
6460     }
6461     /*endswitch*/
6462 }
6463 /*- End of function --------------------------------------------------------*/
6464 
t30_non_ecm_put(void * user_data,const uint8_t buf[],int len)6465 SPAN_DECLARE(void) t30_non_ecm_put(void *user_data, const uint8_t buf[], int len)
6466 {
6467     t30_state_t *s;
6468     int i;
6469     int res;
6470 
6471     s = (t30_state_t *) user_data;
6472     switch (s->state)
6473     {
6474     case T30_STATE_F_TCF:
6475         /* Trainability test */
6476         /* This makes counting zeros fast, but approximate. That really doesn't matter */
6477         s->tcf_test_bits += 8*len;
6478         for (i = 0;  i < len;  i++)
6479         {
6480             if (buf[i])
6481             {
6482                 if (s->tcf_current_zeros > s->tcf_most_zeros)
6483                     s->tcf_most_zeros = s->tcf_current_zeros;
6484                 /*endif*/
6485                 s->tcf_current_zeros = 0;
6486             }
6487             else
6488             {
6489                 s->tcf_current_zeros += 8;
6490             }
6491             /*endif*/
6492         }
6493         /*endfor*/
6494         break;
6495     case T30_STATE_F_DOC_NON_ECM:
6496         /* Image transfer */
6497         if ((res = t4_rx_put(&s->t4.rx, buf, len)) != T4_DECODE_MORE_DATA)
6498         {
6499             /* This is the end of the image */
6500             if (res != T4_DECODE_OK)
6501                 span_log(&s->logging, SPAN_LOG_FLOW, "Page ended with status %d\n", res);
6502             /*endif*/
6503             set_state(s, T30_STATE_F_POST_DOC_NON_ECM);
6504             queue_phase(s, T30_PHASE_D_RX);
6505             timer_t2_start(s);
6506         }
6507         /*endif*/
6508         break;
6509     }
6510     /*endswitch*/
6511 }
6512 /*- End of function --------------------------------------------------------*/
6513 
t30_non_ecm_get_bit(void * user_data)6514 SPAN_DECLARE(int) t30_non_ecm_get_bit(void *user_data)
6515 {
6516     int bit;
6517     t30_state_t *s;
6518 
6519     s = (t30_state_t *) user_data;
6520     switch (s->state)
6521     {
6522     case T30_STATE_D_TCF:
6523         /* Trainability test. */
6524         bit = 0;
6525         if (s->tcf_test_bits-- < 0)
6526         {
6527             /* Finished sending training test. */
6528             bit = SIG_STATUS_END_OF_DATA;
6529         }
6530         /*endif*/
6531         break;
6532     case T30_STATE_I:
6533         /* Transferring real data. */
6534         bit = t4_tx_get_bit(&s->t4.tx);
6535         break;
6536     case T30_STATE_D_POST_TCF:
6537     case T30_STATE_II_Q:
6538         /* We should be padding out a block of samples if we are here */
6539         bit = 0;
6540         break;
6541     default:
6542         span_log(&s->logging, SPAN_LOG_WARNING, "t30_non_ecm_get_bit in bad state %s\n", state_names[s->state]);
6543         bit = SIG_STATUS_END_OF_DATA;
6544         break;
6545     }
6546     /*endswitch*/
6547     return bit;
6548 }
6549 /*- End of function --------------------------------------------------------*/
6550 
t30_non_ecm_get(void * user_data,uint8_t buf[],int max_len)6551 SPAN_DECLARE(int) t30_non_ecm_get(void *user_data, uint8_t buf[], int max_len)
6552 {
6553     int len;
6554     t30_state_t *s;
6555 
6556     s = (t30_state_t *) user_data;
6557     switch (s->state)
6558     {
6559     case T30_STATE_D_TCF:
6560         /* Trainability test. */
6561         for (len = 0;  len < max_len;  len++)
6562         {
6563             buf[len] = 0;
6564             if ((s->tcf_test_bits -= 8) < 0)
6565                 break;
6566             /*endif*/
6567         }
6568         /*endfor*/
6569         break;
6570     case T30_STATE_I:
6571         /* Transferring real data. */
6572         len = t4_tx_get(&s->t4.tx, buf, max_len);
6573         break;
6574     case T30_STATE_D_POST_TCF:
6575     case T30_STATE_II_Q:
6576         /* We should be padding out a block of samples if we are here */
6577         len = 0;
6578         break;
6579     default:
6580         span_log(&s->logging, SPAN_LOG_WARNING, "t30_non_ecm_get in bad state %s\n", state_names[s->state]);
6581         len = -1;
6582         break;
6583     }
6584     /*endswitch*/
6585     return len;
6586 }
6587 /*- End of function --------------------------------------------------------*/
6588 
t30_hdlc_rx_status(void * user_data,int status)6589 static void t30_hdlc_rx_status(void *user_data, int status)
6590 {
6591     t30_state_t *s;
6592     int was_trained;
6593 
6594     s = (t30_state_t *) user_data;
6595     span_log(&s->logging, SPAN_LOG_FLOW, "HDLC signal status is %s (%d) in state %s\n", signal_status_to_str(status), status, state_names[s->state]);
6596     switch (status)
6597     {
6598     case SIG_STATUS_TRAINING_IN_PROGRESS:
6599         break;
6600     case SIG_STATUS_TRAINING_FAILED:
6601         s->rx_trained = false;
6602         break;
6603     case SIG_STATUS_TRAINING_SUCCEEDED:
6604         /* The modem is now trained */
6605         s->rx_signal_present = true;
6606         s->rx_trained = true;
6607         break;
6608     case SIG_STATUS_CARRIER_UP:
6609         s->rx_signal_present = true;
6610         switch (s->timer_t2_t4_is)
6611         {
6612         case TIMER_IS_T2_DROPPED:
6613             timer_t2_t4_stop(s);
6614             s->timer_t2_t4_is = TIMER_IS_T2C;
6615             break;
6616         case TIMER_IS_T4_DROPPED:
6617             timer_t2_t4_stop(s);
6618             s->timer_t2_t4_is = TIMER_IS_T4C;
6619             break;
6620         }
6621         /*endswitch*/
6622         break;
6623     case SIG_STATUS_CARRIER_DOWN:
6624         was_trained = s->rx_trained;
6625         s->rx_signal_present = false;
6626         s->rx_trained = false;
6627         /* If a phase change has been queued to occur after the receive signal drops,
6628            its time to change. */
6629         if (s->state == T30_STATE_F_DOC_ECM)
6630         {
6631             /* We should be receiving a document right now, but we haven't seen an RCP at the end of
6632                transmission. */
6633             if (was_trained)
6634             {
6635                 /* We trained OK, so we should have some kind of received page, possibly with
6636                    zero good HDLC frames. It just did'nt end cleanly with an RCP. */
6637                 span_log(&s->logging, SPAN_LOG_WARNING, "ECM signal did not end cleanly\n");
6638                 /* Fake the existance of an RCP, and proceed */
6639                 set_state(s, T30_STATE_F_POST_DOC_ECM);
6640                 queue_phase(s, T30_PHASE_D_RX);
6641                 timer_t2_start(s);
6642                 /* We at least trained, so any missing carrier status is out of date */
6643                 if (s->current_status == T30_ERR_RX_NOCARRIER)
6644                     t30_set_status(s, T30_ERR_OK);
6645                 /*endif*/
6646             }
6647             else
6648             {
6649                 /* Either there was no image carrier, or we failed to train to it. */
6650                 span_log(&s->logging, SPAN_LOG_WARNING, "ECM carrier not found\n");
6651                 t30_set_status(s, T30_ERR_RX_NOCARRIER);
6652             }
6653             /*endif*/
6654         }
6655         /*endif*/
6656         if (s->next_phase != T30_PHASE_IDLE)
6657         {
6658             /* The appropriate timer for the next phase should already be in progress */
6659             set_phase(s, s->next_phase);
6660         }
6661         else
6662         {
6663             switch (s->timer_t2_t4_is)
6664             {
6665             case TIMER_IS_T1A:
6666             case TIMER_IS_T2_FLAGGED:
6667             case TIMER_IS_T2C:
6668                 timer_t2_dropped_start(s);
6669                 break;
6670             case TIMER_IS_T4_FLAGGED:
6671             case TIMER_IS_T4C:
6672                 timer_t4_dropped_start(s);
6673                 break;
6674             }
6675             /*endswitch*/
6676         }
6677         /*endif*/
6678         break;
6679     case SIG_STATUS_FRAMING_OK:
6680         if (!s->far_end_detected  &&  s->timer_t0_t1 > 0)
6681         {
6682             /* Switch from T0 to T1 */
6683             s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T1);
6684             s->far_end_detected = true;
6685             if (s->phase == T30_PHASE_A_CED  ||  s->phase == T30_PHASE_A_CNG)
6686                 set_phase(s, T30_PHASE_B_RX);
6687             /*endif*/
6688         }
6689         /*endif*/
6690         /* 5.4.3.1 Timer T2 is reset if flag is received. Timer T2_FLAGGED must be started. */
6691         /* Unstated, but implied, is that timer T4 and T4_FLAGGED are handled the same way. */
6692         if (s->timer_t2_t4 > 0)
6693         {
6694             switch(s->timer_t2_t4_is)
6695             {
6696             case TIMER_IS_T1A:
6697             case TIMER_IS_T2:
6698             case TIMER_IS_T2_FLAGGED:
6699                 timer_t2_flagged_start(s);
6700                 break;
6701             case TIMER_IS_T4:
6702             case TIMER_IS_T4_FLAGGED:
6703                 timer_t4_flagged_start(s);
6704                 break;
6705             }
6706             /*endswitch*/
6707         }
6708         /*endif*/
6709         break;
6710     case SIG_STATUS_ABORT:
6711         /* Just ignore these */
6712         break;
6713     default:
6714         span_log(&s->logging, SPAN_LOG_FLOW, "Unexpected HDLC special length - %d!\n", status);
6715         break;
6716     }
6717     /*endswitch*/
6718 }
6719 /*- End of function --------------------------------------------------------*/
6720 
t30_hdlc_accept(void * user_data,const uint8_t * msg,int len,int ok)6721 SPAN_DECLARE(void) t30_hdlc_accept(void *user_data, const uint8_t *msg, int len, int ok)
6722 {
6723     t30_state_t *s;
6724 
6725     if (len < 0)
6726     {
6727         t30_hdlc_rx_status(user_data, len);
6728         return;
6729     }
6730     /*endif*/
6731 
6732     s = (t30_state_t *) user_data;
6733     /* The spec. says a command or response is not valid if:
6734         - any of the frames, optional or mandatory, have an FCS error.
6735         - any single frame exceeds 3s +- 15% (i.e. no frame should exceed 2.55s)
6736         - the final frame is not tagged as a final frame
6737         - the final frame is not a recognised one.
6738        The first point seems benign. If we accept an optional frame, and a later
6739        frame is bad, having accepted the optional frame should be harmless.
6740        The 2.55s maximum seems to limit signalling frames to no more than 95 octets,
6741        including FCS, and flag octets (assuming the use of V.21).
6742     */
6743     if (!ok)
6744     {
6745         span_log(&s->logging, SPAN_LOG_FLOW, "Bad HDLC CRC received\n");
6746         if (s->phase != T30_PHASE_C_ECM_RX)
6747         {
6748             /* We either force a resend, or we wait until a resend occurs through a timeout. */
6749             if ((s->supported_t30_features & T30_SUPPORT_COMMAND_REPEAT))
6750             {
6751                 s->step = 0;
6752                 if (s->phase == T30_PHASE_B_RX)
6753                     queue_phase(s, T30_PHASE_B_TX);
6754                 else
6755                     queue_phase(s, T30_PHASE_D_TX);
6756                 /*endif*/
6757                 send_simple_frame(s, T30_CRP);
6758             }
6759             else
6760             {
6761                 /* Cancel the command or response timer (if one is running) */
6762                 span_log(&s->logging, SPAN_LOG_FLOW, "Bad CRC and timer is %d\n", s->timer_t2_t4_is);
6763                 if (s->timer_t2_t4_is == TIMER_IS_T2_FLAGGED)
6764                     timer_t2_t4_stop(s);
6765                 /*endif*/
6766             }
6767             /*endif*/
6768         }
6769         /*endif*/
6770         return;
6771     }
6772     /*endif*/
6773 
6774     if (len < 3)
6775     {
6776         span_log(&s->logging, SPAN_LOG_FLOW, "Bad HDLC frame length - %d\n", len);
6777         /* Cancel the command or response timer (if one is running) */
6778         timer_t2_t4_stop(s);
6779         return;
6780     }
6781     /*endif*/
6782     if (msg[0] != ADDRESS_FIELD
6783         ||
6784         !(msg[1] == CONTROL_FIELD_NON_FINAL_FRAME  ||  msg[1] == CONTROL_FIELD_FINAL_FRAME))
6785     {
6786         span_log(&s->logging, SPAN_LOG_FLOW, "Bad HDLC frame header - %02x %02x\n", msg[0], msg[1]);
6787         /* Cancel the command or response timer (if one is running) */
6788         timer_t2_t4_stop(s);
6789         return;
6790     }
6791     /*endif*/
6792     s->rx_frame_received = true;
6793     /* Cancel the command or response timer (if one is running) */
6794     timer_t2_t4_stop(s);
6795     process_rx_control_msg(s, msg, len);
6796 }
6797 /*- End of function --------------------------------------------------------*/
6798 
t30_front_end_status(void * user_data,int status)6799 SPAN_DECLARE(void) t30_front_end_status(void *user_data, int status)
6800 {
6801     t30_state_t *s;
6802 
6803     s = (t30_state_t *) user_data;
6804 
6805     switch (status)
6806     {
6807     case T30_FRONT_END_SEND_STEP_COMPLETE:
6808         span_log(&s->logging, SPAN_LOG_FLOW, "Send complete in phase %s, state %s\n", phase_names[s->phase], state_names[s->state]);
6809         /* We have finished sending our messages, so move on to the next operation. */
6810         switch (s->state)
6811         {
6812         case T30_STATE_ANSWERING:
6813             span_log(&s->logging, SPAN_LOG_FLOW, "Starting answer mode\n");
6814             s->dis_received = false;
6815             set_phase(s, T30_PHASE_B_TX);
6816             timer_t2_start(s);
6817             send_dis_or_dtc_sequence(s, true);
6818             break;
6819         case T30_STATE_R:
6820             if (send_dis_or_dtc_sequence(s, false))
6821             {
6822                 /* Wait for an acknowledgement. */
6823                 set_phase(s, T30_PHASE_B_RX);
6824                 timer_t4_start(s);
6825             }
6826             /*endif*/
6827             break;
6828         case T30_STATE_F_CFR:
6829             if (send_cfr_sequence(s, false))
6830             {
6831                 s->image_carrier_attempted = false;
6832                 s->last_rx_page_result = -1;
6833                 if (s->error_correcting_mode)
6834                 {
6835                     set_state(s, T30_STATE_F_DOC_ECM);
6836                     queue_phase(s, T30_PHASE_C_ECM_RX);
6837                 }
6838                 else
6839                 {
6840                     set_state(s, T30_STATE_F_DOC_NON_ECM);
6841                     queue_phase(s, T30_PHASE_C_NON_ECM_RX);
6842                 }
6843                 /*endif*/
6844                 timer_t2_start(s);
6845                 s->next_rx_step = T30_MPS;
6846             }
6847             /*endif*/
6848             break;
6849         case T30_STATE_F_FTT:
6850             if (s->step == 0)
6851             {
6852                 shut_down_hdlc_tx(s);
6853                 s->step++;
6854             }
6855             else
6856             {
6857                 set_phase(s, T30_PHASE_B_RX);
6858                 timer_t2_start(s);
6859             }
6860             /*endif*/
6861             break;
6862         case T30_STATE_F_DOC_NON_ECM:
6863         case T30_STATE_III_Q:
6864         case T30_STATE_F_POST_RCP_PPR:
6865         case T30_STATE_F_POST_RCP_MCF:
6866             if (s->step == 0)
6867             {
6868                 shut_down_hdlc_tx(s);
6869                 s->step++;
6870             }
6871             else
6872             {
6873                 switch (s->next_rx_step)
6874                 {
6875                 case T30_PRI_MPS:
6876                 case T30_MPS:
6877                     /* We should now start to get another page */
6878                     s->image_carrier_attempted = false;
6879                     if (s->error_correcting_mode)
6880                     {
6881                         set_state(s, T30_STATE_F_DOC_ECM);
6882                         queue_phase(s, T30_PHASE_C_ECM_RX);
6883                     }
6884                     else
6885                     {
6886                         set_state(s, T30_STATE_F_DOC_NON_ECM);
6887                         queue_phase(s, T30_PHASE_C_NON_ECM_RX);
6888                     }
6889                     /*endif*/
6890                     timer_t2_start(s);
6891                     break;
6892                 case T30_PRI_EOM:
6893                 case T30_EOM:
6894                 case T30_EOS:
6895                     /* See if we get something back, before moving to phase B. */
6896                     set_phase(s, T30_PHASE_D_RX);
6897                     timer_t2_start(s);
6898                     break;
6899                 case T30_PRI_EOP:
6900                 case T30_EOP:
6901                     /* Wait for a DCN. */
6902                     set_phase(s, T30_PHASE_D_RX);
6903                     timer_t4_start(s);
6904                     break;
6905                 default:
6906                     span_log(&s->logging, SPAN_LOG_FLOW, "Unknown next rx step - %d\n", s->next_rx_step);
6907                     terminate_call(s);
6908                     break;
6909                 }
6910                 /*endswitch*/
6911             }
6912             /*endif*/
6913             break;
6914         case T30_STATE_II_Q:
6915         case T30_STATE_IV_PPS_NULL:
6916         case T30_STATE_IV_PPS_Q:
6917         case T30_STATE_IV_PPS_RNR:
6918         case T30_STATE_IV_EOR_RNR:
6919         case T30_STATE_F_POST_RCP_RNR:
6920         case T30_STATE_IV_EOR:
6921         case T30_STATE_IV_CTC:
6922             if (s->step == 0)
6923             {
6924                 shut_down_hdlc_tx(s);
6925                 s->step++;
6926             }
6927             else
6928             {
6929                 /* We have finished sending the post image message. Wait for an
6930                    acknowledgement. */
6931                 set_phase(s, T30_PHASE_D_RX);
6932                 timer_t4_start(s);
6933             }
6934             /*endif*/
6935             break;
6936         case T30_STATE_B:
6937             /* We have now allowed time for the last message to flush through
6938                the system, so it is safe to report the end of the call. */
6939             terminate_call(s);
6940             break;
6941         case T30_STATE_C:
6942             if (s->step == 0)
6943             {
6944                 shut_down_hdlc_tx(s);
6945                 s->step++;
6946             }
6947             else
6948             {
6949                 /* We just sent the disconnect message. Now it is time to clean up and
6950                    end the call. */
6951                 start_final_pause(s);
6952             }
6953             /*endif*/
6954             break;
6955         case T30_STATE_D:
6956             if (send_dcs_sequence(s, false))
6957             {
6958                 if ((s->iaf & T30_IAF_MODE_NO_TCF))
6959                 {
6960                     /* Skip the trainability test */
6961                     s->retries = 0;
6962                     s->short_train = true;
6963                     if (s->error_correcting_mode)
6964                     {
6965                         set_state(s, T30_STATE_IV);
6966                         queue_phase(s, T30_PHASE_C_ECM_TX);
6967                     }
6968                     else
6969                     {
6970                         set_state(s, T30_STATE_I);
6971                         queue_phase(s, T30_PHASE_C_NON_ECM_TX);
6972                     }
6973                     /*endif*/
6974                 }
6975                 else
6976                 {
6977                     /* Do the trainability test */
6978                     /* TCF is always sent with long training */
6979                     s->short_train = false;
6980                     set_state(s, T30_STATE_D_TCF);
6981                     set_phase(s, T30_PHASE_C_NON_ECM_TX);
6982                 }
6983                 /*endif*/
6984             }
6985             /*endif*/
6986             break;
6987         case T30_STATE_D_TCF:
6988             /* Finished sending training test. Listen for the response. */
6989             set_phase(s, T30_PHASE_B_RX);
6990             timer_t4_start(s);
6991             set_state(s, T30_STATE_D_POST_TCF);
6992             break;
6993         case T30_STATE_I:
6994             /* Send the end of page message */
6995             set_phase(s, T30_PHASE_D_TX);
6996             set_state(s, T30_STATE_II_Q);
6997             /* We might need to resend the page we are on, but we need to check if there
6998                are any more pages to send, so we can send the correct signal right now. */
6999             send_simple_frame(s, s->next_tx_step = check_next_tx_step(s));
7000             break;
7001         case T30_STATE_IV:
7002             /* We have finished sending an FCD frame */
7003             if (s->step == 0)
7004             {
7005                 if (send_next_ecm_frame(s))
7006                 {
7007                     shut_down_hdlc_tx(s);
7008                     s->step++;
7009                 }
7010                 /*endif*/
7011             }
7012             else
7013             {
7014                 /* Send the end of page or partial page message */
7015                 set_phase(s, T30_PHASE_D_TX);
7016                 if (s->ecm_at_page_end)
7017                     s->next_tx_step = check_next_tx_step(s);
7018                 /*endif*/
7019                 if (send_pps_frame(s) == T30_NULL)
7020                     set_state(s, T30_STATE_IV_PPS_NULL);
7021                 else
7022                     set_state(s, T30_STATE_IV_PPS_Q);
7023                 /*endif*/
7024             }
7025             /*endif*/
7026             break;
7027         case T30_STATE_F_DOC_ECM:
7028             /* This should be the end of a CTR being sent. */
7029             if (s->step == 0)
7030             {
7031                 shut_down_hdlc_tx(s);
7032                 s->step++;
7033             }
7034             else
7035             {
7036                 /* We have finished sending the CTR. Wait for image data again. */
7037                 queue_phase(s, T30_PHASE_C_ECM_RX);
7038                 timer_t2_start(s);
7039             }
7040             /*endif*/
7041             break;
7042         case T30_STATE_CALL_FINISHED:
7043             /* Just ignore anything that happens now. We might get here if a premature
7044                disconnect from the far end overlaps something. */
7045             break;
7046         default:
7047             span_log(&s->logging, SPAN_LOG_FLOW, "Bad state for send complete in t30_front_end_status - %s\n", state_names[s->state]);
7048             break;
7049         }
7050         /*endswitch*/
7051         break;
7052     case T30_FRONT_END_RECEIVE_COMPLETE:
7053         span_log(&s->logging, SPAN_LOG_FLOW, "Receive complete in phase %s, state %s\n", phase_names[s->phase], state_names[s->state]);
7054         /* Usually receive complete is notified by a carrier down signal. However,
7055            in cases like a T.38 packet stream dying in the middle of reception
7056            there needs to be a means to stop things. */
7057         switch (s->phase)
7058         {
7059         case T30_PHASE_C_NON_ECM_RX:
7060             t30_non_ecm_rx_status(s, SIG_STATUS_CARRIER_DOWN);
7061             break;
7062         default:
7063             t30_hdlc_rx_status(s, SIG_STATUS_CARRIER_DOWN);
7064             break;
7065         }
7066         /*endswitch*/
7067         break;
7068     case T30_FRONT_END_SIGNAL_PRESENT:
7069         span_log(&s->logging, SPAN_LOG_FLOW, "A signal is present\n");
7070         /* The front end is explicitly telling us the signal we expect is present. This might
7071            be a premature indication from a T.38 implementation, but we have to believe it.
7072            if we don't we can time out improperly. For example, we might get an image modem
7073            carrier signal, but the first HDLC frame might only occur several seconds later.
7074            Many ECM senders idle on HDLC flags while waiting for the paper or filing system
7075            to become ready. T.38 offers no specific indication of correct carrier training, so
7076            if we don't kill the timer on the initial carrier starting signal, we will surely
7077            time out quite often before the next thing we receive. */
7078         switch (s->phase)
7079         {
7080         case T30_PHASE_A_CED:
7081         case T30_PHASE_A_CNG:
7082         case T30_PHASE_B_RX:
7083         case T30_PHASE_D_RX:
7084             /* We are running a V.21 receive modem, where an explicit training indication
7085                will not occur. */
7086             t30_hdlc_rx_status(s, SIG_STATUS_CARRIER_UP);
7087             t30_hdlc_rx_status(s, SIG_STATUS_FRAMING_OK);
7088             break;
7089         default:
7090             /* Cancel any receive timeout, and declare that a receive signal is present,
7091                since the front end is explicitly telling us we have seen something. */
7092             s->rx_signal_present = true;
7093             break;
7094         }
7095         /*endswitch*/
7096         break;
7097     case T30_FRONT_END_SIGNAL_ABSENT:
7098         span_log(&s->logging, SPAN_LOG_FLOW, "No signal is present\n");
7099         /* TODO: Should we do anything here? */
7100         break;
7101     case T30_FRONT_END_CED_PRESENT:
7102         span_log(&s->logging, SPAN_LOG_FLOW, "CED tone is present\n");
7103         /* TODO: Should we do anything here? */
7104         break;
7105     case T30_FRONT_END_CNG_PRESENT:
7106         span_log(&s->logging, SPAN_LOG_FLOW, "CNG tone is present\n");
7107         /* TODO: Should we do anything here? */
7108         break;
7109     }
7110     /*endswitch*/
7111 }
7112 /*- End of function --------------------------------------------------------*/
7113 
t30_timer_update(t30_state_t * s,int samples)7114 SPAN_DECLARE(void) t30_timer_update(t30_state_t *s, int samples)
7115 {
7116     int previous;
7117 
7118     if (s->timer_t0_t1 > 0)
7119     {
7120         if ((s->timer_t0_t1 -= samples) <= 0)
7121         {
7122             s->timer_t0_t1 = 0;
7123             if (s->far_end_detected)
7124                 timer_t1_expired(s);
7125             else
7126                 timer_t0_expired(s);
7127             /*endif*/
7128         }
7129         /*endif*/
7130     }
7131     /*endif*/
7132     if (s->timer_t3 > 0)
7133     {
7134         if ((s->timer_t3 -= samples) <= 0)
7135         {
7136             s->timer_t3 = 0;
7137             timer_t3_expired(s);
7138         }
7139         /*endif*/
7140     }
7141     /*endif*/
7142     if (s->timer_t2_t4 > 0)
7143     {
7144         if ((s->timer_t2_t4 -= samples) <= 0)
7145         {
7146             previous = s->timer_t2_t4_is;
7147             /* Don't allow the count to be left at a small negative number.
7148                It looks cosmetically bad in the logs. */
7149             s->timer_t2_t4 = 0;
7150             s->timer_t2_t4_is = TIMER_IS_IDLE;
7151             switch (previous)
7152             {
7153             case TIMER_IS_T1A:
7154                 timer_t1a_expired(s);
7155                 break;
7156             case TIMER_IS_T2:
7157                 timer_t2_expired(s);
7158                 break;
7159             case TIMER_IS_T2_FLAGGED:
7160                 timer_t2_flagged_expired(s);
7161                 break;
7162             case TIMER_IS_T2_DROPPED:
7163                 timer_t2_dropped_expired(s);
7164                 break;
7165             case TIMER_IS_T4:
7166                 timer_t4_expired(s);
7167                 break;
7168             case TIMER_IS_T4_FLAGGED:
7169                 timer_t4_flagged_expired(s);
7170                 break;
7171             case TIMER_IS_T4_DROPPED:
7172                 timer_t4_dropped_expired(s);
7173                 break;
7174             }
7175             /*endswitch*/
7176         }
7177         /*endif*/
7178     }
7179     /*endif*/
7180     if (s->timer_t5 > 0)
7181     {
7182         if ((s->timer_t5 -= samples) <= 0)
7183         {
7184             s->timer_t5 = 0;
7185             timer_t5_expired(s);
7186         }
7187         /*endif*/
7188     }
7189     /*endif*/
7190 }
7191 /*- End of function --------------------------------------------------------*/
7192 
t30_terminate(t30_state_t * s)7193 SPAN_DECLARE(void) t30_terminate(t30_state_t *s)
7194 {
7195     if (s->phase != T30_PHASE_CALL_FINISHED)
7196     {
7197         /* The far end disconnected early, but was it just a tiny bit too early,
7198            as we were just tidying up, or seriously early as in a failure? */
7199         switch (s->state)
7200         {
7201         case T30_STATE_C:
7202             /* We were sending the final disconnect, so just hussle things along. */
7203             break;
7204         case T30_STATE_B:
7205             /* We were in the final pause, waiting for everything to flush through,
7206                so just hussle things along. */
7207             break;
7208         default:
7209             /* If we have seen a genuine EOP or PRI_EOP, and that's good enough for us.
7210                The far end might not agree, as it might not have seen the MCF we sent
7211                in response to EOP or PRI_EOP. This might cause it to say the call did
7212                not complete properly. However, if this function has been called we can
7213                do no more. */
7214             if (!s->end_of_procedure_detected)
7215             {
7216                 /* The call terminated prematurely. */
7217                 t30_set_status(s, T30_ERR_CALLDROPPED);
7218             }
7219             /*endif*/
7220             break;
7221         }
7222         /*endswitch*/
7223         terminate_call(s);
7224     }
7225     /*endif*/
7226 }
7227 /*- End of function --------------------------------------------------------*/
7228 
t30_get_transfer_statistics(t30_state_t * s,t30_stats_t * t)7229 SPAN_DECLARE(void) t30_get_transfer_statistics(t30_state_t *s, t30_stats_t *t)
7230 {
7231     t4_stats_t stats;
7232 
7233     t->bit_rate = fallback_sequence[s->current_fallback].bit_rate;
7234     t->error_correcting_mode = s->error_correcting_mode;
7235     t->error_correcting_mode_retries = s->error_correcting_mode_retries;
7236     switch (s->operation_in_progress)
7237     {
7238     case OPERATION_IN_PROGRESS_T4_TX:
7239     case OPERATION_IN_PROGRESS_POST_T4_TX:
7240         t4_tx_get_transfer_statistics(&s->t4.tx, &stats);
7241         break;
7242     case OPERATION_IN_PROGRESS_T4_RX:
7243     case OPERATION_IN_PROGRESS_POST_T4_RX:
7244         t4_rx_get_transfer_statistics(&s->t4.rx, &stats);
7245         break;
7246     default:
7247         memset(&stats, 0, sizeof(stats));
7248         break;
7249     }
7250     /*endswitch*/
7251     t->pages_tx = s->tx_page_number;
7252     t->pages_rx = s->rx_page_number;
7253     t->pages_in_file = stats.pages_in_file;
7254     t->bad_rows = stats.bad_rows;
7255     t->longest_bad_row_run = stats.longest_bad_row_run;
7256 
7257     t->image_type = stats.image_type;
7258     t->image_x_resolution = stats.image_x_resolution;
7259     t->image_y_resolution = stats.image_y_resolution;
7260     t->image_width = stats.image_width;
7261     t->image_length = stats.image_length;
7262 
7263     t->type = stats.type;
7264     t->x_resolution = stats.x_resolution;
7265     t->y_resolution = stats.y_resolution;
7266     t->width = stats.width;
7267     t->length = stats.length;
7268 
7269     t->compression = stats.compression;
7270     t->image_size = stats.line_image_size;
7271     t->current_status = s->current_status;
7272     t->rtn_events = s->rtn_events;
7273     t->rtp_events = s->rtp_events;
7274 }
7275 /*- End of function --------------------------------------------------------*/
7276 
t30_local_interrupt_request(t30_state_t * s,int state)7277 SPAN_DECLARE(void) t30_local_interrupt_request(t30_state_t *s, int state)
7278 {
7279     if (s->timer_t3 > 0)
7280     {
7281         /* Accept the far end's outstanding request for interrupt. */
7282         /* TODO: */
7283         send_simple_frame(s, (state)  ?  T30_PIP  :  T30_PIN);
7284     }
7285     /*endif*/
7286     s->local_interrupt_pending = state;
7287 }
7288 /*- End of function --------------------------------------------------------*/
7289 
t30_remote_interrupts_allowed(t30_state_t * s,int state)7290 SPAN_DECLARE(void) t30_remote_interrupts_allowed(t30_state_t *s, int state)
7291 {
7292     s->remote_interrupts_allowed = state;
7293 }
7294 /*- End of function --------------------------------------------------------*/
7295 
t30_restart(t30_state_t * s,bool calling_party)7296 SPAN_DECLARE(int) t30_restart(t30_state_t *s, bool calling_party)
7297 {
7298     release_resources(s);
7299     s->calling_party = calling_party;
7300     s->state = T30_STATE_IDLE;
7301     s->phase = T30_PHASE_IDLE;
7302     s->next_phase = T30_PHASE_IDLE;
7303     s->current_fallback = 0;
7304     s->rx_signal_present = false;
7305     s->rx_trained = false;
7306     s->rx_frame_received = false;
7307     s->current_status = T30_ERR_OK;
7308     s->ppr_count = 0;
7309     s->ecm_progress = 0;
7310     s->receiver_not_ready_count = 0;
7311     memset(&s->far_dis_dtc_frame, 0, sizeof(s->far_dis_dtc_frame));
7312     t30_build_dis_or_dtc(s);
7313     memset(&s->rx_info, 0, sizeof(s->rx_info));
7314     /* The page number is only reset at call establishment */
7315     s->rx_page_number = 0;
7316     s->tx_page_number = 0;
7317     s->rtn_events = 0;
7318     s->rtp_events = 0;
7319     s->local_interrupt_pending = false;
7320     s->far_end_detected = false;
7321     s->end_of_procedure_detected = false;
7322     s->timer_t0_t1 = ms_to_samples(DEFAULT_TIMER_T0);
7323     if (s->calling_party)
7324     {
7325         set_state(s, T30_STATE_T);
7326         set_phase(s, T30_PHASE_A_CNG);
7327     }
7328     else
7329     {
7330         set_state(s, T30_STATE_ANSWERING);
7331         set_phase(s, T30_PHASE_A_CED);
7332     }
7333     /*endif*/
7334     return 0;
7335 }
7336 /*- End of function --------------------------------------------------------*/
7337 
t30_init(t30_state_t * s,bool calling_party,t30_set_handler_t set_rx_type_handler,void * set_rx_type_user_data,t30_set_handler_t set_tx_type_handler,void * set_tx_type_user_data,t30_send_hdlc_handler_t send_hdlc_handler,void * send_hdlc_user_data)7338 SPAN_DECLARE(t30_state_t *) t30_init(t30_state_t *s,
7339                                      bool calling_party,
7340                                      t30_set_handler_t set_rx_type_handler,
7341                                      void *set_rx_type_user_data,
7342                                      t30_set_handler_t set_tx_type_handler,
7343                                      void *set_tx_type_user_data,
7344                                      t30_send_hdlc_handler_t send_hdlc_handler,
7345                                      void *send_hdlc_user_data)
7346 {
7347     if (s == NULL)
7348     {
7349         if ((s = (t30_state_t *) span_alloc(sizeof(*s))) == NULL)
7350             return NULL;
7351         /*endif*/
7352     }
7353     /*endif*/
7354     memset(s, 0, sizeof(*s));
7355     s->set_rx_type_handler = set_rx_type_handler;
7356     s->set_rx_type_user_data = set_rx_type_user_data;
7357     s->set_tx_type_handler = set_tx_type_handler;
7358     s->set_tx_type_user_data = set_tx_type_user_data;
7359     s->send_hdlc_handler = send_hdlc_handler;
7360     s->send_hdlc_user_data = send_hdlc_user_data;
7361 
7362     /* Default to the basic modems. */
7363     s->supported_modems = T30_SUPPORT_V27TER | T30_SUPPORT_V29 | T30_SUPPORT_V17;
7364     s->supported_compressions = T4_COMPRESSION_T4_1D | T4_COMPRESSION_T4_2D;
7365     s->supported_bilevel_resolutions = T4_RESOLUTION_R8_STANDARD
7366                                      | T4_RESOLUTION_R8_FINE
7367                                      | T4_RESOLUTION_R8_SUPERFINE
7368                                      | T4_RESOLUTION_200_100
7369                                      | T4_RESOLUTION_200_200
7370                                      | T4_RESOLUTION_200_400;
7371     s->supported_image_sizes = T4_SUPPORT_WIDTH_215MM
7372                              | T4_SUPPORT_LENGTH_US_LETTER
7373                              | T4_SUPPORT_LENGTH_US_LEGAL
7374                              | T4_SUPPORT_LENGTH_A4
7375                              | T4_SUPPORT_LENGTH_B4
7376                              | T4_SUPPORT_LENGTH_UNLIMITED;
7377     /* Set the output encoding to something safe. For bi-level images most things
7378        get 1D and 2D encoding right. Quite a lot get other things wrong. */
7379     s->supported_output_compressions = T4_COMPRESSION_T4_2D | T4_COMPRESSION_JPEG;
7380     s->local_min_scan_time_code = T30_MIN_SCAN_0MS;
7381     span_log_init(&s->logging, SPAN_LOG_NONE, NULL);
7382     span_log_set_protocol(&s->logging, "T.30");
7383     t30_restart(s, calling_party);
7384     return s;
7385 }
7386 /*- End of function --------------------------------------------------------*/
7387 
t30_release(t30_state_t * s)7388 SPAN_DECLARE(int) t30_release(t30_state_t *s)
7389 {
7390     /* Make sure any FAX in progress is tidied up. If the tidying up has
7391        already happened, repeating it here is harmless. */
7392     terminate_operation_in_progress(s);
7393     return 0;
7394 }
7395 /*- End of function --------------------------------------------------------*/
7396 
t30_free(t30_state_t * s)7397 SPAN_DECLARE(int) t30_free(t30_state_t *s)
7398 {
7399     t30_release(s);
7400     span_free(s);
7401     return 0;
7402 }
7403 /*- End of function --------------------------------------------------------*/
7404 
t30_call_active(t30_state_t * s)7405 SPAN_DECLARE(int) t30_call_active(t30_state_t *s)
7406 {
7407     return (s->phase != T30_PHASE_CALL_FINISHED);
7408 }
7409 /*- End of function --------------------------------------------------------*/
7410 /*- End of file ------------------------------------------------------------*/
7411