1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
5 * Original from Linux kernel 3.0.1
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #include <ipxe/pci.h>
21
22 #include "ath9k.h"
23
24 static struct pci_device_id ath_pci_id_table[] = {
25 PCI_ROM(0x168c, 0x0023, "ar5416", "Atheros 5416 PCI", 0), /* PCI */
26 PCI_ROM(0x168c, 0x0024, "ar5416", "Atheros 5416 PCI-E", 0), /* PCI-E */
27 PCI_ROM(0x168c, 0x0027, "ar9160", "Atheros 9160 PCI", 0), /* PCI */
28 PCI_ROM(0x168c, 0x0029, "ar9280", "Atheros 9280 PCI", 0), /* PCI */
29 PCI_ROM(0x168c, 0x002A, "ar9280", "Atheros 9280 PCI-E", 0), /* PCI-E */
30 PCI_ROM(0x168c, 0x002B, "ar9285", "Atheros 9285 PCI-E", 0), /* PCI-E */
31 PCI_ROM(0x168c, 0x002C, "ar2427", "Atheros 2427 PCI-E", 0), /* PCI-E 802.11n bonded out */
32 PCI_ROM(0x168c, 0x002D, "ar9287", "Atheros 9287 PCI", 0), /* PCI */
33 PCI_ROM(0x168c, 0x002E, "ar9287", "Atheros 9287 PCI-E", 0), /* PCI-E */
34 PCI_ROM(0x168c, 0x0030, "ar9300", "Atheros 9300 PCI-E", 0), /* PCI-E AR9300 */
35 PCI_ROM(0x168c, 0x0032, "ar9485", "Atheros 9485 PCI-E", 0), /* PCI-E AR9485 */
36 };
37
38
39 /* return bus cachesize in 4B word units */
ath_pci_read_cachesize(struct ath_common * common,int * csz)40 static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
41 {
42 struct ath_softc *sc = (struct ath_softc *) common->priv;
43 u8 u8tmp;
44
45 pci_read_config_byte(sc->pdev, PCI_CACHE_LINE_SIZE, &u8tmp);
46 *csz = (int)u8tmp;
47
48 /*
49 * This check was put in to avoid "unpleasant" consequences if
50 * the bootrom has not fully initialized all PCI devices.
51 * Sometimes the cache line size register is not set
52 */
53
54 if (*csz == 0)
55 *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
56 }
57
ath_pci_eeprom_read(struct ath_common * common,u32 off,u16 * data)58 static int ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
59 {
60 struct ath_hw *ah = (struct ath_hw *) common->ah;
61
62 common->ops->read(ah, AR5416_EEPROM_OFFSET +
63 (off << AR5416_EEPROM_S));
64
65 if (!ath9k_hw_wait(ah,
66 AR_EEPROM_STATUS_DATA,
67 AR_EEPROM_STATUS_DATA_BUSY |
68 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
69 AH_WAIT_TIMEOUT)) {
70 return 0;
71 }
72
73 *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
74 AR_EEPROM_STATUS_DATA_VAL);
75
76 return 1;
77 }
78
ath_pci_extn_synch_enable(struct ath_common * common)79 static void ath_pci_extn_synch_enable(struct ath_common *common)
80 {
81 struct ath_softc *sc = (struct ath_softc *) common->priv;
82 struct pci_device *pdev = sc->pdev;
83 u8 lnkctl;
84
85 pci_read_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, &lnkctl);
86 lnkctl |= 0x0080;
87 pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl);
88 }
89
90 static const struct ath_bus_ops ath_pci_bus_ops = {
91 .ath_bus_type = ATH_PCI,
92 .read_cachesize = ath_pci_read_cachesize,
93 .eeprom_read = ath_pci_eeprom_read,
94 .extn_synch_en = ath_pci_extn_synch_enable,
95 };
96
ath_pci_probe(struct pci_device * pdev)97 static int ath_pci_probe(struct pci_device *pdev)
98 {
99 void *mem;
100 struct ath_softc *sc;
101 struct net80211_device *dev;
102 u8 csz;
103 u16 subsysid;
104 u32 val;
105 int ret = 0;
106 char hw_name[64];
107
108 adjust_pci_device(pdev);
109
110 /*
111 * Cache line size is used to size and align various
112 * structures used to communicate with the hardware.
113 */
114 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
115 if (csz == 0) {
116 /*
117 * Linux 2.4.18 (at least) writes the cache line size
118 * register as a 16-bit wide register which is wrong.
119 * We must have this setup properly for rx buffer
120 * DMA to work so force a reasonable value here if it
121 * comes up zero.
122 */
123 csz =16;
124 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
125 }
126 /*
127 * The default setting of latency timer yields poor results,
128 * set it to the value used by other systems. It may be worth
129 * tweaking this setting more.
130 */
131 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
132
133 /*
134 * Disable the RETRY_TIMEOUT register (0x41) to keep
135 * PCI Tx retries from interfering with C3 CPU state.
136 */
137 pci_read_config_dword(pdev, 0x40, &val);
138 if ((val & 0x0000ff00) != 0)
139 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
140
141 mem = pci_ioremap(pdev, pdev->membase, 0x10000);
142 if (!mem) {
143 DBG("ath9K: PCI memory map error\n") ;
144 ret = -EIO;
145 goto err_iomap;
146 }
147
148 dev = net80211_alloc(sizeof(struct ath_softc));
149 if (!dev) {
150 DBG("ath9k: No memory for net80211_device\n");
151 ret = -ENOMEM;
152 goto err_alloc_hw;
153 }
154
155 pci_set_drvdata(pdev, dev);
156 dev->netdev->dev = (struct device *)pdev;
157
158 sc = dev->priv;
159 sc->dev = dev;
160 sc->pdev = pdev;
161 sc->mem = mem;
162
163 /* Will be cleared in ath9k_start() */
164 sc->sc_flags |= SC_OP_INVALID;
165
166 sc->irq = pdev->irq;
167
168 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsysid);
169 ret = ath9k_init_device(pdev->device, sc, subsysid, &ath_pci_bus_ops);
170 if (ret) {
171 DBG("ath9k: Failed to initialize device\n");
172 goto err_init;
173 }
174
175 ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
176 DBG("ath9k: %s mem=0x%lx, irq=%d\n",
177 hw_name, (unsigned long)mem, pdev->irq);
178
179 return 0;
180
181 err_init:
182 net80211_free(dev);
183 err_alloc_hw:
184 iounmap(mem);
185 err_iomap:
186 return ret;
187 }
188
ath_pci_remove(struct pci_device * pdev)189 static void ath_pci_remove(struct pci_device *pdev)
190 {
191 struct net80211_device *dev = pci_get_drvdata(pdev);
192 struct ath_softc *sc = dev->priv;
193 void *mem = sc->mem;
194
195 if (!is_ath9k_unloaded)
196 sc->sc_ah->ah_flags |= AH_UNPLUGGED;
197 ath9k_deinit_device(sc);
198 net80211_free(sc->dev);
199
200 iounmap(mem);
201 }
202
203 struct pci_driver ath_pci_driver __pci_driver = {
204 .id_count = ARRAY_SIZE(ath_pci_id_table),
205 .ids = ath_pci_id_table,
206 .probe = ath_pci_probe,
207 .remove = ath_pci_remove,
208 };
209