1 /*
2 * Copyright (c) 2013 by Farsight Security, Inc.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 /*
18 Copyright (c) 2008,2009,2010 Massachusetts Institute of Technology.
19 All rights reserved.
20
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions are
23 met:
24
25 * Redistributions of source code must retain the above copyright
26 notice, this list of conditions and the following disclaimer.
27
28 * Redistributions in binary form must reproduce the above copyright
29 notice, this list of conditions and the following disclaimer in the
30 documentation and/or other materials provided with the distribution.
31
32 * Neither the name of the Massachusetts Institute of Technology nor
33 the names of its contributors may be used to endorse or promote
34 products derived from this software without specific prior written
35 permission.
36
37 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 */
49
50 /*
51 * Copyright (c) 2004-2006 Intel Corporation - All Rights Reserved
52 *
53 * This software program is licensed subject to the BSD License,
54 * available at http://www.opensource.org/licenses/bsd-license.html
55 */
56
57 // Copyright 2010 Google Inc. All rights reserved.
58 //
59 // Licensed under the Apache License, Version 2.0 (the "License");
60 // you may not use this file except in compliance with the License.
61 // You may obtain a copy of the License at
62 //
63 // http://www.apache.org/licenses/LICENSE-2.0
64 //
65 // Unless required by applicable law or agreed to in writing, software
66 // distributed under the License is distributed on an "AS IS" BASIS,
67 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
68 // See the License for the specific language governing permissions and
69 // limitations under the License.
70
71 #if __GNUC__ >= 3 && defined(__x86_64__)
72
73 #include <stdbool.h>
74 #include <stddef.h>
75 #include <stdint.h>
76
77 #define CPUID_FEATURES (1)
78 #define SSE42_FEATURE_BIT (1 << 20)
79
80 bool my_crc32c_sse42_supported(void);
81
82 uint32_t my_crc32c_sse42(const uint8_t *, size_t);
83
84 static uint32_t
cpuid(uint32_t level)85 cpuid(uint32_t level)
86 {
87 uint32_t eax, ebx, ecx, edx;
88 asm("cpuid" : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (level));
89 return (ecx);
90 }
91
92 bool
my_crc32c_sse42_supported(void)93 my_crc32c_sse42_supported(void)
94 {
95 return (cpuid(CPUID_FEATURES) & SSE42_FEATURE_BIT);
96 }
97
98 static inline uint64_t
my_asm_crc32_u64(uint64_t crc,uint64_t value)99 my_asm_crc32_u64(uint64_t crc, uint64_t value) {
100 asm("crc32q %[value], %[crc]\n" : [crc] "+r" (crc) : [value] "rm" (value));
101 return crc;
102 }
103
104 static inline uint32_t
my_asm_crc32_u32(uint32_t crc,uint32_t value)105 my_asm_crc32_u32(uint32_t crc, uint32_t value) {
106 asm("crc32l %[value], %[crc]\n" : [crc] "+r" (crc) : [value] "rm" (value));
107 return crc;
108 }
109
110 static inline uint32_t
my_asm_crc32_u16(uint32_t crc,uint16_t value)111 my_asm_crc32_u16(uint32_t crc, uint16_t value) {
112 asm("crc32w %[value], %[crc]\n" : [crc] "+r" (crc) : [value] "rm" (value));
113 return crc;
114 }
115
116 static inline uint32_t
my_asm_crc32_u8(uint32_t crc,uint8_t value)117 my_asm_crc32_u8(uint32_t crc, uint8_t value) {
118 asm("crc32b %[value], %[crc]\n" : [crc] "+r" (crc) : [value] "rm" (value));
119 return crc;
120 }
121
122 uint32_t
my_crc32c_sse42(const uint8_t * buf,size_t len)123 my_crc32c_sse42(const uint8_t *buf, size_t len)
124 {
125 const uint8_t *p = buf;
126 uint64_t crc64bit = 0xFFFFFFFF;
127
128 for (size_t i = 0; i < len / sizeof(uint64_t); i++) {
129 crc64bit = my_asm_crc32_u64(crc64bit, *(uint64_t *) p);
130 p += sizeof(uint64_t);
131 }
132
133 uint32_t crc32bit = (uint32_t) crc64bit;
134 len &= sizeof(uint64_t) - 1;
135 switch (len) {
136 case 7:
137 crc32bit = my_asm_crc32_u8(crc32bit, *p++);
138 case 6:
139 crc32bit = my_asm_crc32_u16(crc32bit, *(uint16_t *) p);
140 p += 2;
141 case 4:
142 crc32bit = my_asm_crc32_u32(crc32bit, *(uint32_t *) p);
143 break;
144 case 3:
145 crc32bit = my_asm_crc32_u8(crc32bit, *p++);
146 case 2:
147 crc32bit = my_asm_crc32_u16(crc32bit, *(uint16_t *) p);
148 break;
149 case 5:
150 crc32bit = my_asm_crc32_u32(crc32bit, *(uint32_t *) p);
151 p += 4;
152 case 1:
153 crc32bit = my_asm_crc32_u8(crc32bit, *p);
154 break;
155 case 0:
156 break;
157 default:
158 break;
159 }
160
161 return ~crc32bit;
162 }
163
164 #endif /* __GNUC__ >= 3 && defined(__x86_64__) */
165