1//===- TableGen'erated file -------------------------------------*- C++ -*-===// 2// 3// Intrinsic Function Source Fragment 4// 5// Automatically generated file, do not edit! 6// 7//===----------------------------------------------------------------------===// 8 9// VisualStudio defines setjmp as _setjmp 10#if defined(_MSC_VER) && defined(setjmp) 11#define setjmp_undefined_for_visual_studio 12#undef setjmp 13#endif 14 15// Enum values for Intrinsics.h 16#ifdef GET_INTRINSIC_ENUM_VALUES 17 alpha_umulh, // llvm.alpha.umulh 18 annotation, // llvm.annotation 19 arm_get_fpscr, // llvm.arm.get.fpscr 20 arm_neon_vabds, // llvm.arm.neon.vabds 21 arm_neon_vabdu, // llvm.arm.neon.vabdu 22 arm_neon_vabs, // llvm.arm.neon.vabs 23 arm_neon_vacged, // llvm.arm.neon.vacged 24 arm_neon_vacgeq, // llvm.arm.neon.vacgeq 25 arm_neon_vacgtd, // llvm.arm.neon.vacgtd 26 arm_neon_vacgtq, // llvm.arm.neon.vacgtq 27 arm_neon_vaddhn, // llvm.arm.neon.vaddhn 28 arm_neon_vcls, // llvm.arm.neon.vcls 29 arm_neon_vclz, // llvm.arm.neon.vclz 30 arm_neon_vcnt, // llvm.arm.neon.vcnt 31 arm_neon_vcvtfp2fxs, // llvm.arm.neon.vcvtfp2fxs 32 arm_neon_vcvtfp2fxu, // llvm.arm.neon.vcvtfp2fxu 33 arm_neon_vcvtfxs2fp, // llvm.arm.neon.vcvtfxs2fp 34 arm_neon_vcvtfxu2fp, // llvm.arm.neon.vcvtfxu2fp 35 arm_neon_vhadds, // llvm.arm.neon.vhadds 36 arm_neon_vhaddu, // llvm.arm.neon.vhaddu 37 arm_neon_vhsubs, // llvm.arm.neon.vhsubs 38 arm_neon_vhsubu, // llvm.arm.neon.vhsubu 39 arm_neon_vld1, // llvm.arm.neon.vld1 40 arm_neon_vld2, // llvm.arm.neon.vld2 41 arm_neon_vld2lane, // llvm.arm.neon.vld2lane 42 arm_neon_vld3, // llvm.arm.neon.vld3 43 arm_neon_vld3lane, // llvm.arm.neon.vld3lane 44 arm_neon_vld4, // llvm.arm.neon.vld4 45 arm_neon_vld4lane, // llvm.arm.neon.vld4lane 46 arm_neon_vmaxs, // llvm.arm.neon.vmaxs 47 arm_neon_vmaxu, // llvm.arm.neon.vmaxu 48 arm_neon_vmins, // llvm.arm.neon.vmins 49 arm_neon_vminu, // llvm.arm.neon.vminu 50 arm_neon_vmullp, // llvm.arm.neon.vmullp 51 arm_neon_vmulp, // llvm.arm.neon.vmulp 52 arm_neon_vpadals, // llvm.arm.neon.vpadals 53 arm_neon_vpadalu, // llvm.arm.neon.vpadalu 54 arm_neon_vpadd, // llvm.arm.neon.vpadd 55 arm_neon_vpaddls, // llvm.arm.neon.vpaddls 56 arm_neon_vpaddlu, // llvm.arm.neon.vpaddlu 57 arm_neon_vpmaxs, // llvm.arm.neon.vpmaxs 58 arm_neon_vpmaxu, // llvm.arm.neon.vpmaxu 59 arm_neon_vpmins, // llvm.arm.neon.vpmins 60 arm_neon_vpminu, // llvm.arm.neon.vpminu 61 arm_neon_vqabs, // llvm.arm.neon.vqabs 62 arm_neon_vqadds, // llvm.arm.neon.vqadds 63 arm_neon_vqaddu, // llvm.arm.neon.vqaddu 64 arm_neon_vqdmlal, // llvm.arm.neon.vqdmlal 65 arm_neon_vqdmlsl, // llvm.arm.neon.vqdmlsl 66 arm_neon_vqdmulh, // llvm.arm.neon.vqdmulh 67 arm_neon_vqdmull, // llvm.arm.neon.vqdmull 68 arm_neon_vqmovns, // llvm.arm.neon.vqmovns 69 arm_neon_vqmovnsu, // llvm.arm.neon.vqmovnsu 70 arm_neon_vqmovnu, // llvm.arm.neon.vqmovnu 71 arm_neon_vqneg, // llvm.arm.neon.vqneg 72 arm_neon_vqrdmulh, // llvm.arm.neon.vqrdmulh 73 arm_neon_vqrshiftns, // llvm.arm.neon.vqrshiftns 74 arm_neon_vqrshiftnsu, // llvm.arm.neon.vqrshiftnsu 75 arm_neon_vqrshiftnu, // llvm.arm.neon.vqrshiftnu 76 arm_neon_vqrshifts, // llvm.arm.neon.vqrshifts 77 arm_neon_vqrshiftu, // llvm.arm.neon.vqrshiftu 78 arm_neon_vqshiftns, // llvm.arm.neon.vqshiftns 79 arm_neon_vqshiftnsu, // llvm.arm.neon.vqshiftnsu 80 arm_neon_vqshiftnu, // llvm.arm.neon.vqshiftnu 81 arm_neon_vqshifts, // llvm.arm.neon.vqshifts 82 arm_neon_vqshiftsu, // llvm.arm.neon.vqshiftsu 83 arm_neon_vqshiftu, // llvm.arm.neon.vqshiftu 84 arm_neon_vqsubs, // llvm.arm.neon.vqsubs 85 arm_neon_vqsubu, // llvm.arm.neon.vqsubu 86 arm_neon_vraddhn, // llvm.arm.neon.vraddhn 87 arm_neon_vrecpe, // llvm.arm.neon.vrecpe 88 arm_neon_vrecps, // llvm.arm.neon.vrecps 89 arm_neon_vrhadds, // llvm.arm.neon.vrhadds 90 arm_neon_vrhaddu, // llvm.arm.neon.vrhaddu 91 arm_neon_vrshiftn, // llvm.arm.neon.vrshiftn 92 arm_neon_vrshifts, // llvm.arm.neon.vrshifts 93 arm_neon_vrshiftu, // llvm.arm.neon.vrshiftu 94 arm_neon_vrsqrte, // llvm.arm.neon.vrsqrte 95 arm_neon_vrsqrts, // llvm.arm.neon.vrsqrts 96 arm_neon_vrsubhn, // llvm.arm.neon.vrsubhn 97 arm_neon_vshiftins, // llvm.arm.neon.vshiftins 98 arm_neon_vshiftls, // llvm.arm.neon.vshiftls 99 arm_neon_vshiftlu, // llvm.arm.neon.vshiftlu 100 arm_neon_vshiftn, // llvm.arm.neon.vshiftn 101 arm_neon_vshifts, // llvm.arm.neon.vshifts 102 arm_neon_vshiftu, // llvm.arm.neon.vshiftu 103 arm_neon_vst1, // llvm.arm.neon.vst1 104 arm_neon_vst2, // llvm.arm.neon.vst2 105 arm_neon_vst2lane, // llvm.arm.neon.vst2lane 106 arm_neon_vst3, // llvm.arm.neon.vst3 107 arm_neon_vst3lane, // llvm.arm.neon.vst3lane 108 arm_neon_vst4, // llvm.arm.neon.vst4 109 arm_neon_vst4lane, // llvm.arm.neon.vst4lane 110 arm_neon_vsubhn, // llvm.arm.neon.vsubhn 111 arm_neon_vtbl1, // llvm.arm.neon.vtbl1 112 arm_neon_vtbl2, // llvm.arm.neon.vtbl2 113 arm_neon_vtbl3, // llvm.arm.neon.vtbl3 114 arm_neon_vtbl4, // llvm.arm.neon.vtbl4 115 arm_neon_vtbx1, // llvm.arm.neon.vtbx1 116 arm_neon_vtbx2, // llvm.arm.neon.vtbx2 117 arm_neon_vtbx3, // llvm.arm.neon.vtbx3 118 arm_neon_vtbx4, // llvm.arm.neon.vtbx4 119 arm_qadd, // llvm.arm.qadd 120 arm_qsub, // llvm.arm.qsub 121 arm_set_fpscr, // llvm.arm.set.fpscr 122 arm_ssat, // llvm.arm.ssat 123 arm_thread_pointer, // llvm.arm.thread.pointer 124 arm_usat, // llvm.arm.usat 125 arm_vcvtr, // llvm.arm.vcvtr 126 arm_vcvtru, // llvm.arm.vcvtru 127 atomic_cmp_swap, // llvm.atomic.cmp.swap 128 atomic_load_add, // llvm.atomic.load.add 129 atomic_load_and, // llvm.atomic.load.and 130 atomic_load_max, // llvm.atomic.load.max 131 atomic_load_min, // llvm.atomic.load.min 132 atomic_load_nand, // llvm.atomic.load.nand 133 atomic_load_or, // llvm.atomic.load.or 134 atomic_load_sub, // llvm.atomic.load.sub 135 atomic_load_umax, // llvm.atomic.load.umax 136 atomic_load_umin, // llvm.atomic.load.umin 137 atomic_load_xor, // llvm.atomic.load.xor 138 atomic_swap, // llvm.atomic.swap 139 bswap, // llvm.bswap 140 convert_from_fp16, // llvm.convert.from.fp16 141 convert_to_fp16, // llvm.convert.to.fp16 142 convertff, // llvm.convertff 143 convertfsi, // llvm.convertfsi 144 convertfui, // llvm.convertfui 145 convertsif, // llvm.convertsif 146 convertss, // llvm.convertss 147 convertsu, // llvm.convertsu 148 convertuif, // llvm.convertuif 149 convertus, // llvm.convertus 150 convertuu, // llvm.convertuu 151 cos, // llvm.cos 152 ctlz, // llvm.ctlz 153 ctpop, // llvm.ctpop 154 cttz, // llvm.cttz 155 dbg_declare, // llvm.dbg.declare 156 dbg_value, // llvm.dbg.value 157 eh_dwarf_cfa, // llvm.eh.dwarf.cfa 158 eh_exception, // llvm.eh.exception 159 eh_return_i32, // llvm.eh.return.i32 160 eh_return_i64, // llvm.eh.return.i64 161 eh_selector, // llvm.eh.selector 162 eh_sjlj_callsite, // llvm.eh.sjlj.callsite 163 eh_sjlj_longjmp, // llvm.eh.sjlj.longjmp 164 eh_sjlj_lsda, // llvm.eh.sjlj.lsda 165 eh_sjlj_setjmp, // llvm.eh.sjlj.setjmp 166 eh_typeid_for, // llvm.eh.typeid.for 167 eh_unwind_init, // llvm.eh.unwind.init 168 exp, // llvm.exp 169 exp2, // llvm.exp2 170 flt_rounds, // llvm.flt.rounds 171 frameaddress, // llvm.frameaddress 172 gcread, // llvm.gcread 173 gcroot, // llvm.gcroot 174 gcwrite, // llvm.gcwrite 175 init_trampoline, // llvm.init.trampoline 176 invariant_end, // llvm.invariant.end 177 invariant_start, // llvm.invariant.start 178 lifetime_end, // llvm.lifetime.end 179 lifetime_start, // llvm.lifetime.start 180 log, // llvm.log 181 log10, // llvm.log10 182 log2, // llvm.log2 183 longjmp, // llvm.longjmp 184 memcpy, // llvm.memcpy 185 memmove, // llvm.memmove 186 memory_barrier, // llvm.memory.barrier 187 memset, // llvm.memset 188 objectsize, // llvm.objectsize 189 pcmarker, // llvm.pcmarker 190 pow, // llvm.pow 191 powi, // llvm.powi 192 ppc_altivec_dss, // llvm.ppc.altivec.dss 193 ppc_altivec_dssall, // llvm.ppc.altivec.dssall 194 ppc_altivec_dst, // llvm.ppc.altivec.dst 195 ppc_altivec_dstst, // llvm.ppc.altivec.dstst 196 ppc_altivec_dststt, // llvm.ppc.altivec.dststt 197 ppc_altivec_dstt, // llvm.ppc.altivec.dstt 198 ppc_altivec_lvebx, // llvm.ppc.altivec.lvebx 199 ppc_altivec_lvehx, // llvm.ppc.altivec.lvehx 200 ppc_altivec_lvewx, // llvm.ppc.altivec.lvewx 201 ppc_altivec_lvsl, // llvm.ppc.altivec.lvsl 202 ppc_altivec_lvsr, // llvm.ppc.altivec.lvsr 203 ppc_altivec_lvx, // llvm.ppc.altivec.lvx 204 ppc_altivec_lvxl, // llvm.ppc.altivec.lvxl 205 ppc_altivec_mfvscr, // llvm.ppc.altivec.mfvscr 206 ppc_altivec_mtvscr, // llvm.ppc.altivec.mtvscr 207 ppc_altivec_stvebx, // llvm.ppc.altivec.stvebx 208 ppc_altivec_stvehx, // llvm.ppc.altivec.stvehx 209 ppc_altivec_stvewx, // llvm.ppc.altivec.stvewx 210 ppc_altivec_stvx, // llvm.ppc.altivec.stvx 211 ppc_altivec_stvxl, // llvm.ppc.altivec.stvxl 212 ppc_altivec_vaddcuw, // llvm.ppc.altivec.vaddcuw 213 ppc_altivec_vaddsbs, // llvm.ppc.altivec.vaddsbs 214 ppc_altivec_vaddshs, // llvm.ppc.altivec.vaddshs 215 ppc_altivec_vaddsws, // llvm.ppc.altivec.vaddsws 216 ppc_altivec_vaddubs, // llvm.ppc.altivec.vaddubs 217 ppc_altivec_vadduhs, // llvm.ppc.altivec.vadduhs 218 ppc_altivec_vadduws, // llvm.ppc.altivec.vadduws 219 ppc_altivec_vavgsb, // llvm.ppc.altivec.vavgsb 220 ppc_altivec_vavgsh, // llvm.ppc.altivec.vavgsh 221 ppc_altivec_vavgsw, // llvm.ppc.altivec.vavgsw 222 ppc_altivec_vavgub, // llvm.ppc.altivec.vavgub 223 ppc_altivec_vavguh, // llvm.ppc.altivec.vavguh 224 ppc_altivec_vavguw, // llvm.ppc.altivec.vavguw 225 ppc_altivec_vcfsx, // llvm.ppc.altivec.vcfsx 226 ppc_altivec_vcfux, // llvm.ppc.altivec.vcfux 227 ppc_altivec_vcmpbfp, // llvm.ppc.altivec.vcmpbfp 228 ppc_altivec_vcmpbfp_p, // llvm.ppc.altivec.vcmpbfp.p 229 ppc_altivec_vcmpeqfp, // llvm.ppc.altivec.vcmpeqfp 230 ppc_altivec_vcmpeqfp_p, // llvm.ppc.altivec.vcmpeqfp.p 231 ppc_altivec_vcmpequb, // llvm.ppc.altivec.vcmpequb 232 ppc_altivec_vcmpequb_p, // llvm.ppc.altivec.vcmpequb.p 233 ppc_altivec_vcmpequh, // llvm.ppc.altivec.vcmpequh 234 ppc_altivec_vcmpequh_p, // llvm.ppc.altivec.vcmpequh.p 235 ppc_altivec_vcmpequw, // llvm.ppc.altivec.vcmpequw 236 ppc_altivec_vcmpequw_p, // llvm.ppc.altivec.vcmpequw.p 237 ppc_altivec_vcmpgefp, // llvm.ppc.altivec.vcmpgefp 238 ppc_altivec_vcmpgefp_p, // llvm.ppc.altivec.vcmpgefp.p 239 ppc_altivec_vcmpgtfp, // llvm.ppc.altivec.vcmpgtfp 240 ppc_altivec_vcmpgtfp_p, // llvm.ppc.altivec.vcmpgtfp.p 241 ppc_altivec_vcmpgtsb, // llvm.ppc.altivec.vcmpgtsb 242 ppc_altivec_vcmpgtsb_p, // llvm.ppc.altivec.vcmpgtsb.p 243 ppc_altivec_vcmpgtsh, // llvm.ppc.altivec.vcmpgtsh 244 ppc_altivec_vcmpgtsh_p, // llvm.ppc.altivec.vcmpgtsh.p 245 ppc_altivec_vcmpgtsw, // llvm.ppc.altivec.vcmpgtsw 246 ppc_altivec_vcmpgtsw_p, // llvm.ppc.altivec.vcmpgtsw.p 247 ppc_altivec_vcmpgtub, // llvm.ppc.altivec.vcmpgtub 248 ppc_altivec_vcmpgtub_p, // llvm.ppc.altivec.vcmpgtub.p 249 ppc_altivec_vcmpgtuh, // llvm.ppc.altivec.vcmpgtuh 250 ppc_altivec_vcmpgtuh_p, // llvm.ppc.altivec.vcmpgtuh.p 251 ppc_altivec_vcmpgtuw, // llvm.ppc.altivec.vcmpgtuw 252 ppc_altivec_vcmpgtuw_p, // llvm.ppc.altivec.vcmpgtuw.p 253 ppc_altivec_vctsxs, // llvm.ppc.altivec.vctsxs 254 ppc_altivec_vctuxs, // llvm.ppc.altivec.vctuxs 255 ppc_altivec_vexptefp, // llvm.ppc.altivec.vexptefp 256 ppc_altivec_vlogefp, // llvm.ppc.altivec.vlogefp 257 ppc_altivec_vmaddfp, // llvm.ppc.altivec.vmaddfp 258 ppc_altivec_vmaxfp, // llvm.ppc.altivec.vmaxfp 259 ppc_altivec_vmaxsb, // llvm.ppc.altivec.vmaxsb 260 ppc_altivec_vmaxsh, // llvm.ppc.altivec.vmaxsh 261 ppc_altivec_vmaxsw, // llvm.ppc.altivec.vmaxsw 262 ppc_altivec_vmaxub, // llvm.ppc.altivec.vmaxub 263 ppc_altivec_vmaxuh, // llvm.ppc.altivec.vmaxuh 264 ppc_altivec_vmaxuw, // llvm.ppc.altivec.vmaxuw 265 ppc_altivec_vmhaddshs, // llvm.ppc.altivec.vmhaddshs 266 ppc_altivec_vmhraddshs, // llvm.ppc.altivec.vmhraddshs 267 ppc_altivec_vminfp, // llvm.ppc.altivec.vminfp 268 ppc_altivec_vminsb, // llvm.ppc.altivec.vminsb 269 ppc_altivec_vminsh, // llvm.ppc.altivec.vminsh 270 ppc_altivec_vminsw, // llvm.ppc.altivec.vminsw 271 ppc_altivec_vminub, // llvm.ppc.altivec.vminub 272 ppc_altivec_vminuh, // llvm.ppc.altivec.vminuh 273 ppc_altivec_vminuw, // llvm.ppc.altivec.vminuw 274 ppc_altivec_vmladduhm, // llvm.ppc.altivec.vmladduhm 275 ppc_altivec_vmsummbm, // llvm.ppc.altivec.vmsummbm 276 ppc_altivec_vmsumshm, // llvm.ppc.altivec.vmsumshm 277 ppc_altivec_vmsumshs, // llvm.ppc.altivec.vmsumshs 278 ppc_altivec_vmsumubm, // llvm.ppc.altivec.vmsumubm 279 ppc_altivec_vmsumuhm, // llvm.ppc.altivec.vmsumuhm 280 ppc_altivec_vmsumuhs, // llvm.ppc.altivec.vmsumuhs 281 ppc_altivec_vmulesb, // llvm.ppc.altivec.vmulesb 282 ppc_altivec_vmulesh, // llvm.ppc.altivec.vmulesh 283 ppc_altivec_vmuleub, // llvm.ppc.altivec.vmuleub 284 ppc_altivec_vmuleuh, // llvm.ppc.altivec.vmuleuh 285 ppc_altivec_vmulosb, // llvm.ppc.altivec.vmulosb 286 ppc_altivec_vmulosh, // llvm.ppc.altivec.vmulosh 287 ppc_altivec_vmuloub, // llvm.ppc.altivec.vmuloub 288 ppc_altivec_vmulouh, // llvm.ppc.altivec.vmulouh 289 ppc_altivec_vnmsubfp, // llvm.ppc.altivec.vnmsubfp 290 ppc_altivec_vperm, // llvm.ppc.altivec.vperm 291 ppc_altivec_vpkpx, // llvm.ppc.altivec.vpkpx 292 ppc_altivec_vpkshss, // llvm.ppc.altivec.vpkshss 293 ppc_altivec_vpkshus, // llvm.ppc.altivec.vpkshus 294 ppc_altivec_vpkswss, // llvm.ppc.altivec.vpkswss 295 ppc_altivec_vpkswus, // llvm.ppc.altivec.vpkswus 296 ppc_altivec_vpkuhus, // llvm.ppc.altivec.vpkuhus 297 ppc_altivec_vpkuwus, // llvm.ppc.altivec.vpkuwus 298 ppc_altivec_vrefp, // llvm.ppc.altivec.vrefp 299 ppc_altivec_vrfim, // llvm.ppc.altivec.vrfim 300 ppc_altivec_vrfin, // llvm.ppc.altivec.vrfin 301 ppc_altivec_vrfip, // llvm.ppc.altivec.vrfip 302 ppc_altivec_vrfiz, // llvm.ppc.altivec.vrfiz 303 ppc_altivec_vrlb, // llvm.ppc.altivec.vrlb 304 ppc_altivec_vrlh, // llvm.ppc.altivec.vrlh 305 ppc_altivec_vrlw, // llvm.ppc.altivec.vrlw 306 ppc_altivec_vrsqrtefp, // llvm.ppc.altivec.vrsqrtefp 307 ppc_altivec_vsel, // llvm.ppc.altivec.vsel 308 ppc_altivec_vsl, // llvm.ppc.altivec.vsl 309 ppc_altivec_vslb, // llvm.ppc.altivec.vslb 310 ppc_altivec_vslh, // llvm.ppc.altivec.vslh 311 ppc_altivec_vslo, // llvm.ppc.altivec.vslo 312 ppc_altivec_vslw, // llvm.ppc.altivec.vslw 313 ppc_altivec_vsr, // llvm.ppc.altivec.vsr 314 ppc_altivec_vsrab, // llvm.ppc.altivec.vsrab 315 ppc_altivec_vsrah, // llvm.ppc.altivec.vsrah 316 ppc_altivec_vsraw, // llvm.ppc.altivec.vsraw 317 ppc_altivec_vsrb, // llvm.ppc.altivec.vsrb 318 ppc_altivec_vsrh, // llvm.ppc.altivec.vsrh 319 ppc_altivec_vsro, // llvm.ppc.altivec.vsro 320 ppc_altivec_vsrw, // llvm.ppc.altivec.vsrw 321 ppc_altivec_vsubcuw, // llvm.ppc.altivec.vsubcuw 322 ppc_altivec_vsubsbs, // llvm.ppc.altivec.vsubsbs 323 ppc_altivec_vsubshs, // llvm.ppc.altivec.vsubshs 324 ppc_altivec_vsubsws, // llvm.ppc.altivec.vsubsws 325 ppc_altivec_vsububs, // llvm.ppc.altivec.vsububs 326 ppc_altivec_vsubuhs, // llvm.ppc.altivec.vsubuhs 327 ppc_altivec_vsubuws, // llvm.ppc.altivec.vsubuws 328 ppc_altivec_vsum2sws, // llvm.ppc.altivec.vsum2sws 329 ppc_altivec_vsum4sbs, // llvm.ppc.altivec.vsum4sbs 330 ppc_altivec_vsum4shs, // llvm.ppc.altivec.vsum4shs 331 ppc_altivec_vsum4ubs, // llvm.ppc.altivec.vsum4ubs 332 ppc_altivec_vsumsws, // llvm.ppc.altivec.vsumsws 333 ppc_altivec_vupkhpx, // llvm.ppc.altivec.vupkhpx 334 ppc_altivec_vupkhsb, // llvm.ppc.altivec.vupkhsb 335 ppc_altivec_vupkhsh, // llvm.ppc.altivec.vupkhsh 336 ppc_altivec_vupklpx, // llvm.ppc.altivec.vupklpx 337 ppc_altivec_vupklsb, // llvm.ppc.altivec.vupklsb 338 ppc_altivec_vupklsh, // llvm.ppc.altivec.vupklsh 339 ppc_dcba, // llvm.ppc.dcba 340 ppc_dcbf, // llvm.ppc.dcbf 341 ppc_dcbi, // llvm.ppc.dcbi 342 ppc_dcbst, // llvm.ppc.dcbst 343 ppc_dcbt, // llvm.ppc.dcbt 344 ppc_dcbtst, // llvm.ppc.dcbtst 345 ppc_dcbz, // llvm.ppc.dcbz 346 ppc_dcbzl, // llvm.ppc.dcbzl 347 ppc_sync, // llvm.ppc.sync 348 prefetch, // llvm.prefetch 349 ptr_annotation, // llvm.ptr.annotation 350 readcyclecounter, // llvm.readcyclecounter 351 returnaddress, // llvm.returnaddress 352 sadd_with_overflow, // llvm.sadd.with.overflow 353 setjmp, // llvm.setjmp 354 siglongjmp, // llvm.siglongjmp 355 sigsetjmp, // llvm.sigsetjmp 356 sin, // llvm.sin 357 smul_with_overflow, // llvm.smul.with.overflow 358 spu_si_a, // llvm.spu.si.a 359 spu_si_addx, // llvm.spu.si.addx 360 spu_si_ah, // llvm.spu.si.ah 361 spu_si_ahi, // llvm.spu.si.ahi 362 spu_si_ai, // llvm.spu.si.ai 363 spu_si_and, // llvm.spu.si.and 364 spu_si_andbi, // llvm.spu.si.andbi 365 spu_si_andc, // llvm.spu.si.andc 366 spu_si_andhi, // llvm.spu.si.andhi 367 spu_si_andi, // llvm.spu.si.andi 368 spu_si_bg, // llvm.spu.si.bg 369 spu_si_bgx, // llvm.spu.si.bgx 370 spu_si_ceq, // llvm.spu.si.ceq 371 spu_si_ceqb, // llvm.spu.si.ceqb 372 spu_si_ceqbi, // llvm.spu.si.ceqbi 373 spu_si_ceqh, // llvm.spu.si.ceqh 374 spu_si_ceqhi, // llvm.spu.si.ceqhi 375 spu_si_ceqi, // llvm.spu.si.ceqi 376 spu_si_cg, // llvm.spu.si.cg 377 spu_si_cgt, // llvm.spu.si.cgt 378 spu_si_cgtb, // llvm.spu.si.cgtb 379 spu_si_cgtbi, // llvm.spu.si.cgtbi 380 spu_si_cgth, // llvm.spu.si.cgth 381 spu_si_cgthi, // llvm.spu.si.cgthi 382 spu_si_cgti, // llvm.spu.si.cgti 383 spu_si_cgx, // llvm.spu.si.cgx 384 spu_si_clgt, // llvm.spu.si.clgt 385 spu_si_clgtb, // llvm.spu.si.clgtb 386 spu_si_clgtbi, // llvm.spu.si.clgtbi 387 spu_si_clgth, // llvm.spu.si.clgth 388 spu_si_clgthi, // llvm.spu.si.clgthi 389 spu_si_clgti, // llvm.spu.si.clgti 390 spu_si_dfa, // llvm.spu.si.dfa 391 spu_si_dfm, // llvm.spu.si.dfm 392 spu_si_dfma, // llvm.spu.si.dfma 393 spu_si_dfms, // llvm.spu.si.dfms 394 spu_si_dfnma, // llvm.spu.si.dfnma 395 spu_si_dfnms, // llvm.spu.si.dfnms 396 spu_si_dfs, // llvm.spu.si.dfs 397 spu_si_fa, // llvm.spu.si.fa 398 spu_si_fceq, // llvm.spu.si.fceq 399 spu_si_fcgt, // llvm.spu.si.fcgt 400 spu_si_fcmeq, // llvm.spu.si.fcmeq 401 spu_si_fcmgt, // llvm.spu.si.fcmgt 402 spu_si_fm, // llvm.spu.si.fm 403 spu_si_fma, // llvm.spu.si.fma 404 spu_si_fms, // llvm.spu.si.fms 405 spu_si_fnms, // llvm.spu.si.fnms 406 spu_si_fs, // llvm.spu.si.fs 407 spu_si_fsmbi, // llvm.spu.si.fsmbi 408 spu_si_mpy, // llvm.spu.si.mpy 409 spu_si_mpya, // llvm.spu.si.mpya 410 spu_si_mpyh, // llvm.spu.si.mpyh 411 spu_si_mpyhh, // llvm.spu.si.mpyhh 412 spu_si_mpyhha, // llvm.spu.si.mpyhha 413 spu_si_mpyhhau, // llvm.spu.si.mpyhhau 414 spu_si_mpyhhu, // llvm.spu.si.mpyhhu 415 spu_si_mpyi, // llvm.spu.si.mpyi 416 spu_si_mpys, // llvm.spu.si.mpys 417 spu_si_mpyu, // llvm.spu.si.mpyu 418 spu_si_mpyui, // llvm.spu.si.mpyui 419 spu_si_nand, // llvm.spu.si.nand 420 spu_si_nor, // llvm.spu.si.nor 421 spu_si_or, // llvm.spu.si.or 422 spu_si_orbi, // llvm.spu.si.orbi 423 spu_si_orc, // llvm.spu.si.orc 424 spu_si_orhi, // llvm.spu.si.orhi 425 spu_si_ori, // llvm.spu.si.ori 426 spu_si_sf, // llvm.spu.si.sf 427 spu_si_sfh, // llvm.spu.si.sfh 428 spu_si_sfhi, // llvm.spu.si.sfhi 429 spu_si_sfi, // llvm.spu.si.sfi 430 spu_si_sfx, // llvm.spu.si.sfx 431 spu_si_shli, // llvm.spu.si.shli 432 spu_si_shlqbi, // llvm.spu.si.shlqbi 433 spu_si_shlqbii, // llvm.spu.si.shlqbii 434 spu_si_shlqby, // llvm.spu.si.shlqby 435 spu_si_shlqbyi, // llvm.spu.si.shlqbyi 436 spu_si_xor, // llvm.spu.si.xor 437 spu_si_xorbi, // llvm.spu.si.xorbi 438 spu_si_xorhi, // llvm.spu.si.xorhi 439 spu_si_xori, // llvm.spu.si.xori 440 sqrt, // llvm.sqrt 441 ssub_with_overflow, // llvm.ssub.with.overflow 442 stackprotector, // llvm.stackprotector 443 stackrestore, // llvm.stackrestore 444 stacksave, // llvm.stacksave 445 trap, // llvm.trap 446 uadd_with_overflow, // llvm.uadd.with.overflow 447 umul_with_overflow, // llvm.umul.with.overflow 448 usub_with_overflow, // llvm.usub.with.overflow 449 vacopy, // llvm.va_copy 450 vaend, // llvm.va_end 451 var_annotation, // llvm.var.annotation 452 vastart, // llvm.va_start 453 x86_aesni_aesdec, // llvm.x86.aesni.aesdec 454 x86_aesni_aesdeclast, // llvm.x86.aesni.aesdeclast 455 x86_aesni_aesenc, // llvm.x86.aesni.aesenc 456 x86_aesni_aesenclast, // llvm.x86.aesni.aesenclast 457 x86_aesni_aesimc, // llvm.x86.aesni.aesimc 458 x86_aesni_aeskeygenassist, // llvm.x86.aesni.aeskeygenassist 459 x86_avx_addsub_pd_256, // llvm.x86.avx.addsub.pd.256 460 x86_avx_addsub_ps_256, // llvm.x86.avx.addsub.ps.256 461 x86_avx_blend_pd_256, // llvm.x86.avx.blend.pd.256 462 x86_avx_blend_ps_256, // llvm.x86.avx.blend.ps.256 463 x86_avx_blendv_pd_256, // llvm.x86.avx.blendv.pd.256 464 x86_avx_blendv_ps_256, // llvm.x86.avx.blendv.ps.256 465 x86_avx_cmp_pd_256, // llvm.x86.avx.cmp.pd.256 466 x86_avx_cmp_ps_256, // llvm.x86.avx.cmp.ps.256 467 x86_avx_cvt_pd2_ps_256, // llvm.x86.avx.cvt.pd2.ps.256 468 x86_avx_cvt_pd2dq_256, // llvm.x86.avx.cvt.pd2dq.256 469 x86_avx_cvt_ps2_pd_256, // llvm.x86.avx.cvt.ps2.pd.256 470 x86_avx_cvt_ps2dq_256, // llvm.x86.avx.cvt.ps2dq.256 471 x86_avx_cvtdq2_pd_256, // llvm.x86.avx.cvtdq2.pd.256 472 x86_avx_cvtdq2_ps_256, // llvm.x86.avx.cvtdq2.ps.256 473 x86_avx_cvtt_pd2dq_256, // llvm.x86.avx.cvtt.pd2dq.256 474 x86_avx_cvtt_ps2dq_256, // llvm.x86.avx.cvtt.ps2dq.256 475 x86_avx_dp_ps_256, // llvm.x86.avx.dp.ps.256 476 x86_avx_hadd_pd_256, // llvm.x86.avx.hadd.pd.256 477 x86_avx_hadd_ps_256, // llvm.x86.avx.hadd.ps.256 478 x86_avx_hsub_pd_256, // llvm.x86.avx.hsub.pd.256 479 x86_avx_hsub_ps_256, // llvm.x86.avx.hsub.ps.256 480 x86_avx_ldu_dq_256, // llvm.x86.avx.ldu.dq.256 481 x86_avx_loadu_dq_256, // llvm.x86.avx.loadu.dq.256 482 x86_avx_loadu_pd_256, // llvm.x86.avx.loadu.pd.256 483 x86_avx_loadu_ps_256, // llvm.x86.avx.loadu.ps.256 484 x86_avx_maskload_pd, // llvm.x86.avx.maskload.pd 485 x86_avx_maskload_pd_256, // llvm.x86.avx.maskload.pd.256 486 x86_avx_maskload_ps, // llvm.x86.avx.maskload.ps 487 x86_avx_maskload_ps_256, // llvm.x86.avx.maskload.ps.256 488 x86_avx_maskstore_pd, // llvm.x86.avx.maskstore.pd 489 x86_avx_maskstore_pd_256, // llvm.x86.avx.maskstore.pd.256 490 x86_avx_maskstore_ps, // llvm.x86.avx.maskstore.ps 491 x86_avx_maskstore_ps_256, // llvm.x86.avx.maskstore.ps.256 492 x86_avx_max_pd_256, // llvm.x86.avx.max.pd.256 493 x86_avx_max_ps_256, // llvm.x86.avx.max.ps.256 494 x86_avx_min_pd_256, // llvm.x86.avx.min.pd.256 495 x86_avx_min_ps_256, // llvm.x86.avx.min.ps.256 496 x86_avx_movmsk_pd_256, // llvm.x86.avx.movmsk.pd.256 497 x86_avx_movmsk_ps_256, // llvm.x86.avx.movmsk.ps.256 498 x86_avx_movnt_dq_256, // llvm.x86.avx.movnt.dq.256 499 x86_avx_movnt_pd_256, // llvm.x86.avx.movnt.pd.256 500 x86_avx_movnt_ps_256, // llvm.x86.avx.movnt.ps.256 501 x86_avx_ptestc_256, // llvm.x86.avx.ptestc.256 502 x86_avx_ptestnzc_256, // llvm.x86.avx.ptestnzc.256 503 x86_avx_ptestz_256, // llvm.x86.avx.ptestz.256 504 x86_avx_rcp_ps_256, // llvm.x86.avx.rcp.ps.256 505 x86_avx_round_pd_256, // llvm.x86.avx.round.pd.256 506 x86_avx_round_ps_256, // llvm.x86.avx.round.ps.256 507 x86_avx_rsqrt_ps_256, // llvm.x86.avx.rsqrt.ps.256 508 x86_avx_sqrt_pd_256, // llvm.x86.avx.sqrt.pd.256 509 x86_avx_sqrt_ps_256, // llvm.x86.avx.sqrt.ps.256 510 x86_avx_storeu_dq_256, // llvm.x86.avx.storeu.dq.256 511 x86_avx_storeu_pd_256, // llvm.x86.avx.storeu.pd.256 512 x86_avx_storeu_ps_256, // llvm.x86.avx.storeu.ps.256 513 x86_avx_vbroadcast_sd_256, // llvm.x86.avx.vbroadcast.sd.256 514 x86_avx_vbroadcastf128_pd_256, // llvm.x86.avx.vbroadcastf128.pd.256 515 x86_avx_vbroadcastf128_ps_256, // llvm.x86.avx.vbroadcastf128.ps.256 516 x86_avx_vbroadcastss, // llvm.x86.avx.vbroadcastss 517 x86_avx_vbroadcastss_256, // llvm.x86.avx.vbroadcastss.256 518 x86_avx_vextractf128_pd_256, // llvm.x86.avx.vextractf128.pd.256 519 x86_avx_vextractf128_ps_256, // llvm.x86.avx.vextractf128.ps.256 520 x86_avx_vextractf128_si_256, // llvm.x86.avx.vextractf128.si.256 521 x86_avx_vinsertf128_pd_256, // llvm.x86.avx.vinsertf128.pd.256 522 x86_avx_vinsertf128_ps_256, // llvm.x86.avx.vinsertf128.ps.256 523 x86_avx_vinsertf128_si_256, // llvm.x86.avx.vinsertf128.si.256 524 x86_avx_vperm2f128_pd_256, // llvm.x86.avx.vperm2f128.pd.256 525 x86_avx_vperm2f128_ps_256, // llvm.x86.avx.vperm2f128.ps.256 526 x86_avx_vperm2f128_si_256, // llvm.x86.avx.vperm2f128.si.256 527 x86_avx_vpermil_pd, // llvm.x86.avx.vpermil.pd 528 x86_avx_vpermil_pd_256, // llvm.x86.avx.vpermil.pd.256 529 x86_avx_vpermil_ps, // llvm.x86.avx.vpermil.ps 530 x86_avx_vpermil_ps_256, // llvm.x86.avx.vpermil.ps.256 531 x86_avx_vpermilvar_pd, // llvm.x86.avx.vpermilvar.pd 532 x86_avx_vpermilvar_pd_256, // llvm.x86.avx.vpermilvar.pd.256 533 x86_avx_vpermilvar_ps, // llvm.x86.avx.vpermilvar.ps 534 x86_avx_vpermilvar_ps_256, // llvm.x86.avx.vpermilvar.ps.256 535 x86_avx_vtestc_pd, // llvm.x86.avx.vtestc.pd 536 x86_avx_vtestc_pd_256, // llvm.x86.avx.vtestc.pd.256 537 x86_avx_vtestc_ps, // llvm.x86.avx.vtestc.ps 538 x86_avx_vtestc_ps_256, // llvm.x86.avx.vtestc.ps.256 539 x86_avx_vtestnzc_pd, // llvm.x86.avx.vtestnzc.pd 540 x86_avx_vtestnzc_pd_256, // llvm.x86.avx.vtestnzc.pd.256 541 x86_avx_vtestnzc_ps, // llvm.x86.avx.vtestnzc.ps 542 x86_avx_vtestnzc_ps_256, // llvm.x86.avx.vtestnzc.ps.256 543 x86_avx_vtestz_pd, // llvm.x86.avx.vtestz.pd 544 x86_avx_vtestz_pd_256, // llvm.x86.avx.vtestz.pd.256 545 x86_avx_vtestz_ps, // llvm.x86.avx.vtestz.ps 546 x86_avx_vtestz_ps_256, // llvm.x86.avx.vtestz.ps.256 547 x86_avx_vzeroall, // llvm.x86.avx.vzeroall 548 x86_avx_vzeroupper, // llvm.x86.avx.vzeroupper 549 x86_int, // llvm.x86.int 550 x86_mmx_cvtsi32_si64, // llvm.x86.mmx.cvtsi32.si64 551 x86_mmx_cvtsi64_si32, // llvm.x86.mmx.cvtsi64.si32 552 x86_mmx_emms, // llvm.x86.mmx.emms 553 x86_mmx_femms, // llvm.x86.mmx.femms 554 x86_mmx_maskmovq, // llvm.x86.mmx.maskmovq 555 x86_mmx_movnt_dq, // llvm.x86.mmx.movnt.dq 556 x86_mmx_packssdw, // llvm.x86.mmx.packssdw 557 x86_mmx_packsswb, // llvm.x86.mmx.packsswb 558 x86_mmx_packuswb, // llvm.x86.mmx.packuswb 559 x86_mmx_padd_b, // llvm.x86.mmx.padd.b 560 x86_mmx_padd_d, // llvm.x86.mmx.padd.d 561 x86_mmx_padd_q, // llvm.x86.mmx.padd.q 562 x86_mmx_padd_w, // llvm.x86.mmx.padd.w 563 x86_mmx_padds_b, // llvm.x86.mmx.padds.b 564 x86_mmx_padds_w, // llvm.x86.mmx.padds.w 565 x86_mmx_paddus_b, // llvm.x86.mmx.paddus.b 566 x86_mmx_paddus_w, // llvm.x86.mmx.paddus.w 567 x86_mmx_pand, // llvm.x86.mmx.pand 568 x86_mmx_pandn, // llvm.x86.mmx.pandn 569 x86_mmx_pavg_b, // llvm.x86.mmx.pavg.b 570 x86_mmx_pavg_w, // llvm.x86.mmx.pavg.w 571 x86_mmx_pcmpeq_b, // llvm.x86.mmx.pcmpeq.b 572 x86_mmx_pcmpeq_d, // llvm.x86.mmx.pcmpeq.d 573 x86_mmx_pcmpeq_w, // llvm.x86.mmx.pcmpeq.w 574 x86_mmx_pcmpgt_b, // llvm.x86.mmx.pcmpgt.b 575 x86_mmx_pcmpgt_d, // llvm.x86.mmx.pcmpgt.d 576 x86_mmx_pcmpgt_w, // llvm.x86.mmx.pcmpgt.w 577 x86_mmx_pextr_w, // llvm.x86.mmx.pextr.w 578 x86_mmx_pinsr_w, // llvm.x86.mmx.pinsr.w 579 x86_mmx_pmadd_wd, // llvm.x86.mmx.pmadd.wd 580 x86_mmx_pmaxs_w, // llvm.x86.mmx.pmaxs.w 581 x86_mmx_pmaxu_b, // llvm.x86.mmx.pmaxu.b 582 x86_mmx_pmins_w, // llvm.x86.mmx.pmins.w 583 x86_mmx_pminu_b, // llvm.x86.mmx.pminu.b 584 x86_mmx_pmovmskb, // llvm.x86.mmx.pmovmskb 585 x86_mmx_pmulh_w, // llvm.x86.mmx.pmulh.w 586 x86_mmx_pmulhu_w, // llvm.x86.mmx.pmulhu.w 587 x86_mmx_pmull_w, // llvm.x86.mmx.pmull.w 588 x86_mmx_pmulu_dq, // llvm.x86.mmx.pmulu.dq 589 x86_mmx_por, // llvm.x86.mmx.por 590 x86_mmx_psad_bw, // llvm.x86.mmx.psad.bw 591 x86_mmx_psll_d, // llvm.x86.mmx.psll.d 592 x86_mmx_psll_q, // llvm.x86.mmx.psll.q 593 x86_mmx_psll_w, // llvm.x86.mmx.psll.w 594 x86_mmx_pslli_d, // llvm.x86.mmx.pslli.d 595 x86_mmx_pslli_q, // llvm.x86.mmx.pslli.q 596 x86_mmx_pslli_w, // llvm.x86.mmx.pslli.w 597 x86_mmx_psra_d, // llvm.x86.mmx.psra.d 598 x86_mmx_psra_w, // llvm.x86.mmx.psra.w 599 x86_mmx_psrai_d, // llvm.x86.mmx.psrai.d 600 x86_mmx_psrai_w, // llvm.x86.mmx.psrai.w 601 x86_mmx_psrl_d, // llvm.x86.mmx.psrl.d 602 x86_mmx_psrl_q, // llvm.x86.mmx.psrl.q 603 x86_mmx_psrl_w, // llvm.x86.mmx.psrl.w 604 x86_mmx_psrli_d, // llvm.x86.mmx.psrli.d 605 x86_mmx_psrli_q, // llvm.x86.mmx.psrli.q 606 x86_mmx_psrli_w, // llvm.x86.mmx.psrli.w 607 x86_mmx_psub_b, // llvm.x86.mmx.psub.b 608 x86_mmx_psub_d, // llvm.x86.mmx.psub.d 609 x86_mmx_psub_q, // llvm.x86.mmx.psub.q 610 x86_mmx_psub_w, // llvm.x86.mmx.psub.w 611 x86_mmx_psubs_b, // llvm.x86.mmx.psubs.b 612 x86_mmx_psubs_w, // llvm.x86.mmx.psubs.w 613 x86_mmx_psubus_b, // llvm.x86.mmx.psubus.b 614 x86_mmx_psubus_w, // llvm.x86.mmx.psubus.w 615 x86_mmx_punpckhbw, // llvm.x86.mmx.punpckhbw 616 x86_mmx_punpckhdq, // llvm.x86.mmx.punpckhdq 617 x86_mmx_punpckhwd, // llvm.x86.mmx.punpckhwd 618 x86_mmx_punpcklbw, // llvm.x86.mmx.punpcklbw 619 x86_mmx_punpckldq, // llvm.x86.mmx.punpckldq 620 x86_mmx_punpcklwd, // llvm.x86.mmx.punpcklwd 621 x86_mmx_pxor, // llvm.x86.mmx.pxor 622 x86_mmx_vec_ext_d, // llvm.x86.mmx.vec.ext.d 623 x86_mmx_vec_init_b, // llvm.x86.mmx.vec.init.b 624 x86_mmx_vec_init_d, // llvm.x86.mmx.vec.init.d 625 x86_mmx_vec_init_w, // llvm.x86.mmx.vec.init.w 626 x86_sse2_add_sd, // llvm.x86.sse2.add.sd 627 x86_sse2_clflush, // llvm.x86.sse2.clflush 628 x86_sse2_cmp_pd, // llvm.x86.sse2.cmp.pd 629 x86_sse2_cmp_sd, // llvm.x86.sse2.cmp.sd 630 x86_sse2_comieq_sd, // llvm.x86.sse2.comieq.sd 631 x86_sse2_comige_sd, // llvm.x86.sse2.comige.sd 632 x86_sse2_comigt_sd, // llvm.x86.sse2.comigt.sd 633 x86_sse2_comile_sd, // llvm.x86.sse2.comile.sd 634 x86_sse2_comilt_sd, // llvm.x86.sse2.comilt.sd 635 x86_sse2_comineq_sd, // llvm.x86.sse2.comineq.sd 636 x86_sse2_cvtdq2pd, // llvm.x86.sse2.cvtdq2pd 637 x86_sse2_cvtdq2ps, // llvm.x86.sse2.cvtdq2ps 638 x86_sse2_cvtpd2dq, // llvm.x86.sse2.cvtpd2dq 639 x86_sse2_cvtpd2ps, // llvm.x86.sse2.cvtpd2ps 640 x86_sse2_cvtps2dq, // llvm.x86.sse2.cvtps2dq 641 x86_sse2_cvtps2pd, // llvm.x86.sse2.cvtps2pd 642 x86_sse2_cvtsd2si, // llvm.x86.sse2.cvtsd2si 643 x86_sse2_cvtsd2si64, // llvm.x86.sse2.cvtsd2si64 644 x86_sse2_cvtsd2ss, // llvm.x86.sse2.cvtsd2ss 645 x86_sse2_cvtsi2sd, // llvm.x86.sse2.cvtsi2sd 646 x86_sse2_cvtsi642sd, // llvm.x86.sse2.cvtsi642sd 647 x86_sse2_cvtss2sd, // llvm.x86.sse2.cvtss2sd 648 x86_sse2_cvttpd2dq, // llvm.x86.sse2.cvttpd2dq 649 x86_sse2_cvttps2dq, // llvm.x86.sse2.cvttps2dq 650 x86_sse2_cvttsd2si, // llvm.x86.sse2.cvttsd2si 651 x86_sse2_cvttsd2si64, // llvm.x86.sse2.cvttsd2si64 652 x86_sse2_div_sd, // llvm.x86.sse2.div.sd 653 x86_sse2_lfence, // llvm.x86.sse2.lfence 654 x86_sse2_loadu_dq, // llvm.x86.sse2.loadu.dq 655 x86_sse2_loadu_pd, // llvm.x86.sse2.loadu.pd 656 x86_sse2_maskmov_dqu, // llvm.x86.sse2.maskmov.dqu 657 x86_sse2_max_pd, // llvm.x86.sse2.max.pd 658 x86_sse2_max_sd, // llvm.x86.sse2.max.sd 659 x86_sse2_mfence, // llvm.x86.sse2.mfence 660 x86_sse2_min_pd, // llvm.x86.sse2.min.pd 661 x86_sse2_min_sd, // llvm.x86.sse2.min.sd 662 x86_sse2_movmsk_pd, // llvm.x86.sse2.movmsk.pd 663 x86_sse2_movnt_dq, // llvm.x86.sse2.movnt.dq 664 x86_sse2_movnt_i, // llvm.x86.sse2.movnt.i 665 x86_sse2_movnt_pd, // llvm.x86.sse2.movnt.pd 666 x86_sse2_mul_sd, // llvm.x86.sse2.mul.sd 667 x86_sse2_packssdw_128, // llvm.x86.sse2.packssdw.128 668 x86_sse2_packsswb_128, // llvm.x86.sse2.packsswb.128 669 x86_sse2_packuswb_128, // llvm.x86.sse2.packuswb.128 670 x86_sse2_padds_b, // llvm.x86.sse2.padds.b 671 x86_sse2_padds_w, // llvm.x86.sse2.padds.w 672 x86_sse2_paddus_b, // llvm.x86.sse2.paddus.b 673 x86_sse2_paddus_w, // llvm.x86.sse2.paddus.w 674 x86_sse2_pavg_b, // llvm.x86.sse2.pavg.b 675 x86_sse2_pavg_w, // llvm.x86.sse2.pavg.w 676 x86_sse2_pcmpeq_b, // llvm.x86.sse2.pcmpeq.b 677 x86_sse2_pcmpeq_d, // llvm.x86.sse2.pcmpeq.d 678 x86_sse2_pcmpeq_w, // llvm.x86.sse2.pcmpeq.w 679 x86_sse2_pcmpgt_b, // llvm.x86.sse2.pcmpgt.b 680 x86_sse2_pcmpgt_d, // llvm.x86.sse2.pcmpgt.d 681 x86_sse2_pcmpgt_w, // llvm.x86.sse2.pcmpgt.w 682 x86_sse2_pmadd_wd, // llvm.x86.sse2.pmadd.wd 683 x86_sse2_pmaxs_w, // llvm.x86.sse2.pmaxs.w 684 x86_sse2_pmaxu_b, // llvm.x86.sse2.pmaxu.b 685 x86_sse2_pmins_w, // llvm.x86.sse2.pmins.w 686 x86_sse2_pminu_b, // llvm.x86.sse2.pminu.b 687 x86_sse2_pmovmskb_128, // llvm.x86.sse2.pmovmskb.128 688 x86_sse2_pmulh_w, // llvm.x86.sse2.pmulh.w 689 x86_sse2_pmulhu_w, // llvm.x86.sse2.pmulhu.w 690 x86_sse2_pmulu_dq, // llvm.x86.sse2.pmulu.dq 691 x86_sse2_psad_bw, // llvm.x86.sse2.psad.bw 692 x86_sse2_psll_d, // llvm.x86.sse2.psll.d 693 x86_sse2_psll_dq, // llvm.x86.sse2.psll.dq 694 x86_sse2_psll_dq_bs, // llvm.x86.sse2.psll.dq.bs 695 x86_sse2_psll_q, // llvm.x86.sse2.psll.q 696 x86_sse2_psll_w, // llvm.x86.sse2.psll.w 697 x86_sse2_pslli_d, // llvm.x86.sse2.pslli.d 698 x86_sse2_pslli_q, // llvm.x86.sse2.pslli.q 699 x86_sse2_pslli_w, // llvm.x86.sse2.pslli.w 700 x86_sse2_psra_d, // llvm.x86.sse2.psra.d 701 x86_sse2_psra_w, // llvm.x86.sse2.psra.w 702 x86_sse2_psrai_d, // llvm.x86.sse2.psrai.d 703 x86_sse2_psrai_w, // llvm.x86.sse2.psrai.w 704 x86_sse2_psrl_d, // llvm.x86.sse2.psrl.d 705 x86_sse2_psrl_dq, // llvm.x86.sse2.psrl.dq 706 x86_sse2_psrl_dq_bs, // llvm.x86.sse2.psrl.dq.bs 707 x86_sse2_psrl_q, // llvm.x86.sse2.psrl.q 708 x86_sse2_psrl_w, // llvm.x86.sse2.psrl.w 709 x86_sse2_psrli_d, // llvm.x86.sse2.psrli.d 710 x86_sse2_psrli_q, // llvm.x86.sse2.psrli.q 711 x86_sse2_psrli_w, // llvm.x86.sse2.psrli.w 712 x86_sse2_psubs_b, // llvm.x86.sse2.psubs.b 713 x86_sse2_psubs_w, // llvm.x86.sse2.psubs.w 714 x86_sse2_psubus_b, // llvm.x86.sse2.psubus.b 715 x86_sse2_psubus_w, // llvm.x86.sse2.psubus.w 716 x86_sse2_sqrt_pd, // llvm.x86.sse2.sqrt.pd 717 x86_sse2_sqrt_sd, // llvm.x86.sse2.sqrt.sd 718 x86_sse2_storel_dq, // llvm.x86.sse2.storel.dq 719 x86_sse2_storeu_dq, // llvm.x86.sse2.storeu.dq 720 x86_sse2_storeu_pd, // llvm.x86.sse2.storeu.pd 721 x86_sse2_sub_sd, // llvm.x86.sse2.sub.sd 722 x86_sse2_ucomieq_sd, // llvm.x86.sse2.ucomieq.sd 723 x86_sse2_ucomige_sd, // llvm.x86.sse2.ucomige.sd 724 x86_sse2_ucomigt_sd, // llvm.x86.sse2.ucomigt.sd 725 x86_sse2_ucomile_sd, // llvm.x86.sse2.ucomile.sd 726 x86_sse2_ucomilt_sd, // llvm.x86.sse2.ucomilt.sd 727 x86_sse2_ucomineq_sd, // llvm.x86.sse2.ucomineq.sd 728 x86_sse3_addsub_pd, // llvm.x86.sse3.addsub.pd 729 x86_sse3_addsub_ps, // llvm.x86.sse3.addsub.ps 730 x86_sse3_hadd_pd, // llvm.x86.sse3.hadd.pd 731 x86_sse3_hadd_ps, // llvm.x86.sse3.hadd.ps 732 x86_sse3_hsub_pd, // llvm.x86.sse3.hsub.pd 733 x86_sse3_hsub_ps, // llvm.x86.sse3.hsub.ps 734 x86_sse3_ldu_dq, // llvm.x86.sse3.ldu.dq 735 x86_sse3_monitor, // llvm.x86.sse3.monitor 736 x86_sse3_mwait, // llvm.x86.sse3.mwait 737 x86_sse41_blendpd, // llvm.x86.sse41.blendpd 738 x86_sse41_blendps, // llvm.x86.sse41.blendps 739 x86_sse41_blendvpd, // llvm.x86.sse41.blendvpd 740 x86_sse41_blendvps, // llvm.x86.sse41.blendvps 741 x86_sse41_dppd, // llvm.x86.sse41.dppd 742 x86_sse41_dpps, // llvm.x86.sse41.dpps 743 x86_sse41_extractps, // llvm.x86.sse41.extractps 744 x86_sse41_insertps, // llvm.x86.sse41.insertps 745 x86_sse41_movntdqa, // llvm.x86.sse41.movntdqa 746 x86_sse41_mpsadbw, // llvm.x86.sse41.mpsadbw 747 x86_sse41_packusdw, // llvm.x86.sse41.packusdw 748 x86_sse41_pblendvb, // llvm.x86.sse41.pblendvb 749 x86_sse41_pblendw, // llvm.x86.sse41.pblendw 750 x86_sse41_pcmpeqq, // llvm.x86.sse41.pcmpeqq 751 x86_sse41_pextrb, // llvm.x86.sse41.pextrb 752 x86_sse41_pextrd, // llvm.x86.sse41.pextrd 753 x86_sse41_pextrq, // llvm.x86.sse41.pextrq 754 x86_sse41_phminposuw, // llvm.x86.sse41.phminposuw 755 x86_sse41_pmaxsb, // llvm.x86.sse41.pmaxsb 756 x86_sse41_pmaxsd, // llvm.x86.sse41.pmaxsd 757 x86_sse41_pmaxud, // llvm.x86.sse41.pmaxud 758 x86_sse41_pmaxuw, // llvm.x86.sse41.pmaxuw 759 x86_sse41_pminsb, // llvm.x86.sse41.pminsb 760 x86_sse41_pminsd, // llvm.x86.sse41.pminsd 761 x86_sse41_pminud, // llvm.x86.sse41.pminud 762 x86_sse41_pminuw, // llvm.x86.sse41.pminuw 763 x86_sse41_pmovsxbd, // llvm.x86.sse41.pmovsxbd 764 x86_sse41_pmovsxbq, // llvm.x86.sse41.pmovsxbq 765 x86_sse41_pmovsxbw, // llvm.x86.sse41.pmovsxbw 766 x86_sse41_pmovsxdq, // llvm.x86.sse41.pmovsxdq 767 x86_sse41_pmovsxwd, // llvm.x86.sse41.pmovsxwd 768 x86_sse41_pmovsxwq, // llvm.x86.sse41.pmovsxwq 769 x86_sse41_pmovzxbd, // llvm.x86.sse41.pmovzxbd 770 x86_sse41_pmovzxbq, // llvm.x86.sse41.pmovzxbq 771 x86_sse41_pmovzxbw, // llvm.x86.sse41.pmovzxbw 772 x86_sse41_pmovzxdq, // llvm.x86.sse41.pmovzxdq 773 x86_sse41_pmovzxwd, // llvm.x86.sse41.pmovzxwd 774 x86_sse41_pmovzxwq, // llvm.x86.sse41.pmovzxwq 775 x86_sse41_pmuldq, // llvm.x86.sse41.pmuldq 776 x86_sse41_ptestc, // llvm.x86.sse41.ptestc 777 x86_sse41_ptestnzc, // llvm.x86.sse41.ptestnzc 778 x86_sse41_ptestz, // llvm.x86.sse41.ptestz 779 x86_sse41_round_pd, // llvm.x86.sse41.round.pd 780 x86_sse41_round_ps, // llvm.x86.sse41.round.ps 781 x86_sse41_round_sd, // llvm.x86.sse41.round.sd 782 x86_sse41_round_ss, // llvm.x86.sse41.round.ss 783 x86_sse42_crc32_16, // llvm.x86.sse42.crc32.16 784 x86_sse42_crc32_32, // llvm.x86.sse42.crc32.32 785 x86_sse42_crc32_8, // llvm.x86.sse42.crc32.8 786 x86_sse42_crc64_64, // llvm.x86.sse42.crc64.64 787 x86_sse42_crc64_8, // llvm.x86.sse42.crc64.8 788 x86_sse42_pcmpestri128, // llvm.x86.sse42.pcmpestri128 789 x86_sse42_pcmpestria128, // llvm.x86.sse42.pcmpestria128 790 x86_sse42_pcmpestric128, // llvm.x86.sse42.pcmpestric128 791 x86_sse42_pcmpestrio128, // llvm.x86.sse42.pcmpestrio128 792 x86_sse42_pcmpestris128, // llvm.x86.sse42.pcmpestris128 793 x86_sse42_pcmpestriz128, // llvm.x86.sse42.pcmpestriz128 794 x86_sse42_pcmpestrm128, // llvm.x86.sse42.pcmpestrm128 795 x86_sse42_pcmpgtq, // llvm.x86.sse42.pcmpgtq 796 x86_sse42_pcmpistri128, // llvm.x86.sse42.pcmpistri128 797 x86_sse42_pcmpistria128, // llvm.x86.sse42.pcmpistria128 798 x86_sse42_pcmpistric128, // llvm.x86.sse42.pcmpistric128 799 x86_sse42_pcmpistrio128, // llvm.x86.sse42.pcmpistrio128 800 x86_sse42_pcmpistris128, // llvm.x86.sse42.pcmpistris128 801 x86_sse42_pcmpistriz128, // llvm.x86.sse42.pcmpistriz128 802 x86_sse42_pcmpistrm128, // llvm.x86.sse42.pcmpistrm128 803 x86_sse_add_ss, // llvm.x86.sse.add.ss 804 x86_sse_cmp_ps, // llvm.x86.sse.cmp.ps 805 x86_sse_cmp_ss, // llvm.x86.sse.cmp.ss 806 x86_sse_comieq_ss, // llvm.x86.sse.comieq.ss 807 x86_sse_comige_ss, // llvm.x86.sse.comige.ss 808 x86_sse_comigt_ss, // llvm.x86.sse.comigt.ss 809 x86_sse_comile_ss, // llvm.x86.sse.comile.ss 810 x86_sse_comilt_ss, // llvm.x86.sse.comilt.ss 811 x86_sse_comineq_ss, // llvm.x86.sse.comineq.ss 812 x86_sse_cvtpd2pi, // llvm.x86.sse.cvtpd2pi 813 x86_sse_cvtpi2pd, // llvm.x86.sse.cvtpi2pd 814 x86_sse_cvtpi2ps, // llvm.x86.sse.cvtpi2ps 815 x86_sse_cvtps2pi, // llvm.x86.sse.cvtps2pi 816 x86_sse_cvtsi2ss, // llvm.x86.sse.cvtsi2ss 817 x86_sse_cvtsi642ss, // llvm.x86.sse.cvtsi642ss 818 x86_sse_cvtss2si, // llvm.x86.sse.cvtss2si 819 x86_sse_cvtss2si64, // llvm.x86.sse.cvtss2si64 820 x86_sse_cvttpd2pi, // llvm.x86.sse.cvttpd2pi 821 x86_sse_cvttps2pi, // llvm.x86.sse.cvttps2pi 822 x86_sse_cvttss2si, // llvm.x86.sse.cvttss2si 823 x86_sse_cvttss2si64, // llvm.x86.sse.cvttss2si64 824 x86_sse_div_ss, // llvm.x86.sse.div.ss 825 x86_sse_ldmxcsr, // llvm.x86.sse.ldmxcsr 826 x86_sse_loadu_ps, // llvm.x86.sse.loadu.ps 827 x86_sse_max_ps, // llvm.x86.sse.max.ps 828 x86_sse_max_ss, // llvm.x86.sse.max.ss 829 x86_sse_min_ps, // llvm.x86.sse.min.ps 830 x86_sse_min_ss, // llvm.x86.sse.min.ss 831 x86_sse_movmsk_ps, // llvm.x86.sse.movmsk.ps 832 x86_sse_movnt_ps, // llvm.x86.sse.movnt.ps 833 x86_sse_mul_ss, // llvm.x86.sse.mul.ss 834 x86_sse_rcp_ps, // llvm.x86.sse.rcp.ps 835 x86_sse_rcp_ss, // llvm.x86.sse.rcp.ss 836 x86_sse_rsqrt_ps, // llvm.x86.sse.rsqrt.ps 837 x86_sse_rsqrt_ss, // llvm.x86.sse.rsqrt.ss 838 x86_sse_sfence, // llvm.x86.sse.sfence 839 x86_sse_sqrt_ps, // llvm.x86.sse.sqrt.ps 840 x86_sse_sqrt_ss, // llvm.x86.sse.sqrt.ss 841 x86_sse_stmxcsr, // llvm.x86.sse.stmxcsr 842 x86_sse_storeu_ps, // llvm.x86.sse.storeu.ps 843 x86_sse_sub_ss, // llvm.x86.sse.sub.ss 844 x86_sse_ucomieq_ss, // llvm.x86.sse.ucomieq.ss 845 x86_sse_ucomige_ss, // llvm.x86.sse.ucomige.ss 846 x86_sse_ucomigt_ss, // llvm.x86.sse.ucomigt.ss 847 x86_sse_ucomile_ss, // llvm.x86.sse.ucomile.ss 848 x86_sse_ucomilt_ss, // llvm.x86.sse.ucomilt.ss 849 x86_sse_ucomineq_ss, // llvm.x86.sse.ucomineq.ss 850 x86_ssse3_pabs_b, // llvm.x86.ssse3.pabs.b 851 x86_ssse3_pabs_b_128, // llvm.x86.ssse3.pabs.b.128 852 x86_ssse3_pabs_d, // llvm.x86.ssse3.pabs.d 853 x86_ssse3_pabs_d_128, // llvm.x86.ssse3.pabs.d.128 854 x86_ssse3_pabs_w, // llvm.x86.ssse3.pabs.w 855 x86_ssse3_pabs_w_128, // llvm.x86.ssse3.pabs.w.128 856 x86_ssse3_phadd_d, // llvm.x86.ssse3.phadd.d 857 x86_ssse3_phadd_d_128, // llvm.x86.ssse3.phadd.d.128 858 x86_ssse3_phadd_sw, // llvm.x86.ssse3.phadd.sw 859 x86_ssse3_phadd_sw_128, // llvm.x86.ssse3.phadd.sw.128 860 x86_ssse3_phadd_w, // llvm.x86.ssse3.phadd.w 861 x86_ssse3_phadd_w_128, // llvm.x86.ssse3.phadd.w.128 862 x86_ssse3_phsub_d, // llvm.x86.ssse3.phsub.d 863 x86_ssse3_phsub_d_128, // llvm.x86.ssse3.phsub.d.128 864 x86_ssse3_phsub_sw, // llvm.x86.ssse3.phsub.sw 865 x86_ssse3_phsub_sw_128, // llvm.x86.ssse3.phsub.sw.128 866 x86_ssse3_phsub_w, // llvm.x86.ssse3.phsub.w 867 x86_ssse3_phsub_w_128, // llvm.x86.ssse3.phsub.w.128 868 x86_ssse3_pmadd_ub_sw, // llvm.x86.ssse3.pmadd.ub.sw 869 x86_ssse3_pmadd_ub_sw_128, // llvm.x86.ssse3.pmadd.ub.sw.128 870 x86_ssse3_pmul_hr_sw, // llvm.x86.ssse3.pmul.hr.sw 871 x86_ssse3_pmul_hr_sw_128, // llvm.x86.ssse3.pmul.hr.sw.128 872 x86_ssse3_pshuf_b, // llvm.x86.ssse3.pshuf.b 873 x86_ssse3_pshuf_b_128, // llvm.x86.ssse3.pshuf.b.128 874 x86_ssse3_pshuf_w, // llvm.x86.ssse3.pshuf.w 875 x86_ssse3_psign_b, // llvm.x86.ssse3.psign.b 876 x86_ssse3_psign_b_128, // llvm.x86.ssse3.psign.b.128 877 x86_ssse3_psign_d, // llvm.x86.ssse3.psign.d 878 x86_ssse3_psign_d_128, // llvm.x86.ssse3.psign.d.128 879 x86_ssse3_psign_w, // llvm.x86.ssse3.psign.w 880 x86_ssse3_psign_w_128, // llvm.x86.ssse3.psign.w.128 881 xcore_bitrev, // llvm.xcore.bitrev 882 xcore_getid // llvm.xcore.getid 883#endif 884 885// Intrinsic ID to name table 886#ifdef GET_INTRINSIC_NAME_TABLE 887 // Note that entry #0 is the invalid intrinsic! 888 "llvm.alpha.umulh", 889 "llvm.annotation", 890 "llvm.arm.get.fpscr", 891 "llvm.arm.neon.vabds", 892 "llvm.arm.neon.vabdu", 893 "llvm.arm.neon.vabs", 894 "llvm.arm.neon.vacged", 895 "llvm.arm.neon.vacgeq", 896 "llvm.arm.neon.vacgtd", 897 "llvm.arm.neon.vacgtq", 898 "llvm.arm.neon.vaddhn", 899 "llvm.arm.neon.vcls", 900 "llvm.arm.neon.vclz", 901 "llvm.arm.neon.vcnt", 902 "llvm.arm.neon.vcvtfp2fxs", 903 "llvm.arm.neon.vcvtfp2fxu", 904 "llvm.arm.neon.vcvtfxs2fp", 905 "llvm.arm.neon.vcvtfxu2fp", 906 "llvm.arm.neon.vhadds", 907 "llvm.arm.neon.vhaddu", 908 "llvm.arm.neon.vhsubs", 909 "llvm.arm.neon.vhsubu", 910 "llvm.arm.neon.vld1", 911 "llvm.arm.neon.vld2", 912 "llvm.arm.neon.vld2lane", 913 "llvm.arm.neon.vld3", 914 "llvm.arm.neon.vld3lane", 915 "llvm.arm.neon.vld4", 916 "llvm.arm.neon.vld4lane", 917 "llvm.arm.neon.vmaxs", 918 "llvm.arm.neon.vmaxu", 919 "llvm.arm.neon.vmins", 920 "llvm.arm.neon.vminu", 921 "llvm.arm.neon.vmullp", 922 "llvm.arm.neon.vmulp", 923 "llvm.arm.neon.vpadals", 924 "llvm.arm.neon.vpadalu", 925 "llvm.arm.neon.vpadd", 926 "llvm.arm.neon.vpaddls", 927 "llvm.arm.neon.vpaddlu", 928 "llvm.arm.neon.vpmaxs", 929 "llvm.arm.neon.vpmaxu", 930 "llvm.arm.neon.vpmins", 931 "llvm.arm.neon.vpminu", 932 "llvm.arm.neon.vqabs", 933 "llvm.arm.neon.vqadds", 934 "llvm.arm.neon.vqaddu", 935 "llvm.arm.neon.vqdmlal", 936 "llvm.arm.neon.vqdmlsl", 937 "llvm.arm.neon.vqdmulh", 938 "llvm.arm.neon.vqdmull", 939 "llvm.arm.neon.vqmovns", 940 "llvm.arm.neon.vqmovnsu", 941 "llvm.arm.neon.vqmovnu", 942 "llvm.arm.neon.vqneg", 943 "llvm.arm.neon.vqrdmulh", 944 "llvm.arm.neon.vqrshiftns", 945 "llvm.arm.neon.vqrshiftnsu", 946 "llvm.arm.neon.vqrshiftnu", 947 "llvm.arm.neon.vqrshifts", 948 "llvm.arm.neon.vqrshiftu", 949 "llvm.arm.neon.vqshiftns", 950 "llvm.arm.neon.vqshiftnsu", 951 "llvm.arm.neon.vqshiftnu", 952 "llvm.arm.neon.vqshifts", 953 "llvm.arm.neon.vqshiftsu", 954 "llvm.arm.neon.vqshiftu", 955 "llvm.arm.neon.vqsubs", 956 "llvm.arm.neon.vqsubu", 957 "llvm.arm.neon.vraddhn", 958 "llvm.arm.neon.vrecpe", 959 "llvm.arm.neon.vrecps", 960 "llvm.arm.neon.vrhadds", 961 "llvm.arm.neon.vrhaddu", 962 "llvm.arm.neon.vrshiftn", 963 "llvm.arm.neon.vrshifts", 964 "llvm.arm.neon.vrshiftu", 965 "llvm.arm.neon.vrsqrte", 966 "llvm.arm.neon.vrsqrts", 967 "llvm.arm.neon.vrsubhn", 968 "llvm.arm.neon.vshiftins", 969 "llvm.arm.neon.vshiftls", 970 "llvm.arm.neon.vshiftlu", 971 "llvm.arm.neon.vshiftn", 972 "llvm.arm.neon.vshifts", 973 "llvm.arm.neon.vshiftu", 974 "llvm.arm.neon.vst1", 975 "llvm.arm.neon.vst2", 976 "llvm.arm.neon.vst2lane", 977 "llvm.arm.neon.vst3", 978 "llvm.arm.neon.vst3lane", 979 "llvm.arm.neon.vst4", 980 "llvm.arm.neon.vst4lane", 981 "llvm.arm.neon.vsubhn", 982 "llvm.arm.neon.vtbl1", 983 "llvm.arm.neon.vtbl2", 984 "llvm.arm.neon.vtbl3", 985 "llvm.arm.neon.vtbl4", 986 "llvm.arm.neon.vtbx1", 987 "llvm.arm.neon.vtbx2", 988 "llvm.arm.neon.vtbx3", 989 "llvm.arm.neon.vtbx4", 990 "llvm.arm.qadd", 991 "llvm.arm.qsub", 992 "llvm.arm.set.fpscr", 993 "llvm.arm.ssat", 994 "llvm.arm.thread.pointer", 995 "llvm.arm.usat", 996 "llvm.arm.vcvtr", 997 "llvm.arm.vcvtru", 998 "llvm.atomic.cmp.swap", 999 "llvm.atomic.load.add", 1000 "llvm.atomic.load.and", 1001 "llvm.atomic.load.max", 1002 "llvm.atomic.load.min", 1003 "llvm.atomic.load.nand", 1004 "llvm.atomic.load.or", 1005 "llvm.atomic.load.sub", 1006 "llvm.atomic.load.umax", 1007 "llvm.atomic.load.umin", 1008 "llvm.atomic.load.xor", 1009 "llvm.atomic.swap", 1010 "llvm.bswap", 1011 "llvm.convert.from.fp16", 1012 "llvm.convert.to.fp16", 1013 "llvm.convertff", 1014 "llvm.convertfsi", 1015 "llvm.convertfui", 1016 "llvm.convertsif", 1017 "llvm.convertss", 1018 "llvm.convertsu", 1019 "llvm.convertuif", 1020 "llvm.convertus", 1021 "llvm.convertuu", 1022 "llvm.cos", 1023 "llvm.ctlz", 1024 "llvm.ctpop", 1025 "llvm.cttz", 1026 "llvm.dbg.declare", 1027 "llvm.dbg.value", 1028 "llvm.eh.dwarf.cfa", 1029 "llvm.eh.exception", 1030 "llvm.eh.return.i32", 1031 "llvm.eh.return.i64", 1032 "llvm.eh.selector", 1033 "llvm.eh.sjlj.callsite", 1034 "llvm.eh.sjlj.longjmp", 1035 "llvm.eh.sjlj.lsda", 1036 "llvm.eh.sjlj.setjmp", 1037 "llvm.eh.typeid.for", 1038 "llvm.eh.unwind.init", 1039 "llvm.exp", 1040 "llvm.exp2", 1041 "llvm.flt.rounds", 1042 "llvm.frameaddress", 1043 "llvm.gcread", 1044 "llvm.gcroot", 1045 "llvm.gcwrite", 1046 "llvm.init.trampoline", 1047 "llvm.invariant.end", 1048 "llvm.invariant.start", 1049 "llvm.lifetime.end", 1050 "llvm.lifetime.start", 1051 "llvm.log", 1052 "llvm.log10", 1053 "llvm.log2", 1054 "llvm.longjmp", 1055 "llvm.memcpy", 1056 "llvm.memmove", 1057 "llvm.memory.barrier", 1058 "llvm.memset", 1059 "llvm.objectsize", 1060 "llvm.pcmarker", 1061 "llvm.pow", 1062 "llvm.powi", 1063 "llvm.ppc.altivec.dss", 1064 "llvm.ppc.altivec.dssall", 1065 "llvm.ppc.altivec.dst", 1066 "llvm.ppc.altivec.dstst", 1067 "llvm.ppc.altivec.dststt", 1068 "llvm.ppc.altivec.dstt", 1069 "llvm.ppc.altivec.lvebx", 1070 "llvm.ppc.altivec.lvehx", 1071 "llvm.ppc.altivec.lvewx", 1072 "llvm.ppc.altivec.lvsl", 1073 "llvm.ppc.altivec.lvsr", 1074 "llvm.ppc.altivec.lvx", 1075 "llvm.ppc.altivec.lvxl", 1076 "llvm.ppc.altivec.mfvscr", 1077 "llvm.ppc.altivec.mtvscr", 1078 "llvm.ppc.altivec.stvebx", 1079 "llvm.ppc.altivec.stvehx", 1080 "llvm.ppc.altivec.stvewx", 1081 "llvm.ppc.altivec.stvx", 1082 "llvm.ppc.altivec.stvxl", 1083 "llvm.ppc.altivec.vaddcuw", 1084 "llvm.ppc.altivec.vaddsbs", 1085 "llvm.ppc.altivec.vaddshs", 1086 "llvm.ppc.altivec.vaddsws", 1087 "llvm.ppc.altivec.vaddubs", 1088 "llvm.ppc.altivec.vadduhs", 1089 "llvm.ppc.altivec.vadduws", 1090 "llvm.ppc.altivec.vavgsb", 1091 "llvm.ppc.altivec.vavgsh", 1092 "llvm.ppc.altivec.vavgsw", 1093 "llvm.ppc.altivec.vavgub", 1094 "llvm.ppc.altivec.vavguh", 1095 "llvm.ppc.altivec.vavguw", 1096 "llvm.ppc.altivec.vcfsx", 1097 "llvm.ppc.altivec.vcfux", 1098 "llvm.ppc.altivec.vcmpbfp", 1099 "llvm.ppc.altivec.vcmpbfp.p", 1100 "llvm.ppc.altivec.vcmpeqfp", 1101 "llvm.ppc.altivec.vcmpeqfp.p", 1102 "llvm.ppc.altivec.vcmpequb", 1103 "llvm.ppc.altivec.vcmpequb.p", 1104 "llvm.ppc.altivec.vcmpequh", 1105 "llvm.ppc.altivec.vcmpequh.p", 1106 "llvm.ppc.altivec.vcmpequw", 1107 "llvm.ppc.altivec.vcmpequw.p", 1108 "llvm.ppc.altivec.vcmpgefp", 1109 "llvm.ppc.altivec.vcmpgefp.p", 1110 "llvm.ppc.altivec.vcmpgtfp", 1111 "llvm.ppc.altivec.vcmpgtfp.p", 1112 "llvm.ppc.altivec.vcmpgtsb", 1113 "llvm.ppc.altivec.vcmpgtsb.p", 1114 "llvm.ppc.altivec.vcmpgtsh", 1115 "llvm.ppc.altivec.vcmpgtsh.p", 1116 "llvm.ppc.altivec.vcmpgtsw", 1117 "llvm.ppc.altivec.vcmpgtsw.p", 1118 "llvm.ppc.altivec.vcmpgtub", 1119 "llvm.ppc.altivec.vcmpgtub.p", 1120 "llvm.ppc.altivec.vcmpgtuh", 1121 "llvm.ppc.altivec.vcmpgtuh.p", 1122 "llvm.ppc.altivec.vcmpgtuw", 1123 "llvm.ppc.altivec.vcmpgtuw.p", 1124 "llvm.ppc.altivec.vctsxs", 1125 "llvm.ppc.altivec.vctuxs", 1126 "llvm.ppc.altivec.vexptefp", 1127 "llvm.ppc.altivec.vlogefp", 1128 "llvm.ppc.altivec.vmaddfp", 1129 "llvm.ppc.altivec.vmaxfp", 1130 "llvm.ppc.altivec.vmaxsb", 1131 "llvm.ppc.altivec.vmaxsh", 1132 "llvm.ppc.altivec.vmaxsw", 1133 "llvm.ppc.altivec.vmaxub", 1134 "llvm.ppc.altivec.vmaxuh", 1135 "llvm.ppc.altivec.vmaxuw", 1136 "llvm.ppc.altivec.vmhaddshs", 1137 "llvm.ppc.altivec.vmhraddshs", 1138 "llvm.ppc.altivec.vminfp", 1139 "llvm.ppc.altivec.vminsb", 1140 "llvm.ppc.altivec.vminsh", 1141 "llvm.ppc.altivec.vminsw", 1142 "llvm.ppc.altivec.vminub", 1143 "llvm.ppc.altivec.vminuh", 1144 "llvm.ppc.altivec.vminuw", 1145 "llvm.ppc.altivec.vmladduhm", 1146 "llvm.ppc.altivec.vmsummbm", 1147 "llvm.ppc.altivec.vmsumshm", 1148 "llvm.ppc.altivec.vmsumshs", 1149 "llvm.ppc.altivec.vmsumubm", 1150 "llvm.ppc.altivec.vmsumuhm", 1151 "llvm.ppc.altivec.vmsumuhs", 1152 "llvm.ppc.altivec.vmulesb", 1153 "llvm.ppc.altivec.vmulesh", 1154 "llvm.ppc.altivec.vmuleub", 1155 "llvm.ppc.altivec.vmuleuh", 1156 "llvm.ppc.altivec.vmulosb", 1157 "llvm.ppc.altivec.vmulosh", 1158 "llvm.ppc.altivec.vmuloub", 1159 "llvm.ppc.altivec.vmulouh", 1160 "llvm.ppc.altivec.vnmsubfp", 1161 "llvm.ppc.altivec.vperm", 1162 "llvm.ppc.altivec.vpkpx", 1163 "llvm.ppc.altivec.vpkshss", 1164 "llvm.ppc.altivec.vpkshus", 1165 "llvm.ppc.altivec.vpkswss", 1166 "llvm.ppc.altivec.vpkswus", 1167 "llvm.ppc.altivec.vpkuhus", 1168 "llvm.ppc.altivec.vpkuwus", 1169 "llvm.ppc.altivec.vrefp", 1170 "llvm.ppc.altivec.vrfim", 1171 "llvm.ppc.altivec.vrfin", 1172 "llvm.ppc.altivec.vrfip", 1173 "llvm.ppc.altivec.vrfiz", 1174 "llvm.ppc.altivec.vrlb", 1175 "llvm.ppc.altivec.vrlh", 1176 "llvm.ppc.altivec.vrlw", 1177 "llvm.ppc.altivec.vrsqrtefp", 1178 "llvm.ppc.altivec.vsel", 1179 "llvm.ppc.altivec.vsl", 1180 "llvm.ppc.altivec.vslb", 1181 "llvm.ppc.altivec.vslh", 1182 "llvm.ppc.altivec.vslo", 1183 "llvm.ppc.altivec.vslw", 1184 "llvm.ppc.altivec.vsr", 1185 "llvm.ppc.altivec.vsrab", 1186 "llvm.ppc.altivec.vsrah", 1187 "llvm.ppc.altivec.vsraw", 1188 "llvm.ppc.altivec.vsrb", 1189 "llvm.ppc.altivec.vsrh", 1190 "llvm.ppc.altivec.vsro", 1191 "llvm.ppc.altivec.vsrw", 1192 "llvm.ppc.altivec.vsubcuw", 1193 "llvm.ppc.altivec.vsubsbs", 1194 "llvm.ppc.altivec.vsubshs", 1195 "llvm.ppc.altivec.vsubsws", 1196 "llvm.ppc.altivec.vsububs", 1197 "llvm.ppc.altivec.vsubuhs", 1198 "llvm.ppc.altivec.vsubuws", 1199 "llvm.ppc.altivec.vsum2sws", 1200 "llvm.ppc.altivec.vsum4sbs", 1201 "llvm.ppc.altivec.vsum4shs", 1202 "llvm.ppc.altivec.vsum4ubs", 1203 "llvm.ppc.altivec.vsumsws", 1204 "llvm.ppc.altivec.vupkhpx", 1205 "llvm.ppc.altivec.vupkhsb", 1206 "llvm.ppc.altivec.vupkhsh", 1207 "llvm.ppc.altivec.vupklpx", 1208 "llvm.ppc.altivec.vupklsb", 1209 "llvm.ppc.altivec.vupklsh", 1210 "llvm.ppc.dcba", 1211 "llvm.ppc.dcbf", 1212 "llvm.ppc.dcbi", 1213 "llvm.ppc.dcbst", 1214 "llvm.ppc.dcbt", 1215 "llvm.ppc.dcbtst", 1216 "llvm.ppc.dcbz", 1217 "llvm.ppc.dcbzl", 1218 "llvm.ppc.sync", 1219 "llvm.prefetch", 1220 "llvm.ptr.annotation", 1221 "llvm.readcyclecounter", 1222 "llvm.returnaddress", 1223 "llvm.sadd.with.overflow", 1224 "llvm.setjmp", 1225 "llvm.siglongjmp", 1226 "llvm.sigsetjmp", 1227 "llvm.sin", 1228 "llvm.smul.with.overflow", 1229 "llvm.spu.si.a", 1230 "llvm.spu.si.addx", 1231 "llvm.spu.si.ah", 1232 "llvm.spu.si.ahi", 1233 "llvm.spu.si.ai", 1234 "llvm.spu.si.and", 1235 "llvm.spu.si.andbi", 1236 "llvm.spu.si.andc", 1237 "llvm.spu.si.andhi", 1238 "llvm.spu.si.andi", 1239 "llvm.spu.si.bg", 1240 "llvm.spu.si.bgx", 1241 "llvm.spu.si.ceq", 1242 "llvm.spu.si.ceqb", 1243 "llvm.spu.si.ceqbi", 1244 "llvm.spu.si.ceqh", 1245 "llvm.spu.si.ceqhi", 1246 "llvm.spu.si.ceqi", 1247 "llvm.spu.si.cg", 1248 "llvm.spu.si.cgt", 1249 "llvm.spu.si.cgtb", 1250 "llvm.spu.si.cgtbi", 1251 "llvm.spu.si.cgth", 1252 "llvm.spu.si.cgthi", 1253 "llvm.spu.si.cgti", 1254 "llvm.spu.si.cgx", 1255 "llvm.spu.si.clgt", 1256 "llvm.spu.si.clgtb", 1257 "llvm.spu.si.clgtbi", 1258 "llvm.spu.si.clgth", 1259 "llvm.spu.si.clgthi", 1260 "llvm.spu.si.clgti", 1261 "llvm.spu.si.dfa", 1262 "llvm.spu.si.dfm", 1263 "llvm.spu.si.dfma", 1264 "llvm.spu.si.dfms", 1265 "llvm.spu.si.dfnma", 1266 "llvm.spu.si.dfnms", 1267 "llvm.spu.si.dfs", 1268 "llvm.spu.si.fa", 1269 "llvm.spu.si.fceq", 1270 "llvm.spu.si.fcgt", 1271 "llvm.spu.si.fcmeq", 1272 "llvm.spu.si.fcmgt", 1273 "llvm.spu.si.fm", 1274 "llvm.spu.si.fma", 1275 "llvm.spu.si.fms", 1276 "llvm.spu.si.fnms", 1277 "llvm.spu.si.fs", 1278 "llvm.spu.si.fsmbi", 1279 "llvm.spu.si.mpy", 1280 "llvm.spu.si.mpya", 1281 "llvm.spu.si.mpyh", 1282 "llvm.spu.si.mpyhh", 1283 "llvm.spu.si.mpyhha", 1284 "llvm.spu.si.mpyhhau", 1285 "llvm.spu.si.mpyhhu", 1286 "llvm.spu.si.mpyi", 1287 "llvm.spu.si.mpys", 1288 "llvm.spu.si.mpyu", 1289 "llvm.spu.si.mpyui", 1290 "llvm.spu.si.nand", 1291 "llvm.spu.si.nor", 1292 "llvm.spu.si.or", 1293 "llvm.spu.si.orbi", 1294 "llvm.spu.si.orc", 1295 "llvm.spu.si.orhi", 1296 "llvm.spu.si.ori", 1297 "llvm.spu.si.sf", 1298 "llvm.spu.si.sfh", 1299 "llvm.spu.si.sfhi", 1300 "llvm.spu.si.sfi", 1301 "llvm.spu.si.sfx", 1302 "llvm.spu.si.shli", 1303 "llvm.spu.si.shlqbi", 1304 "llvm.spu.si.shlqbii", 1305 "llvm.spu.si.shlqby", 1306 "llvm.spu.si.shlqbyi", 1307 "llvm.spu.si.xor", 1308 "llvm.spu.si.xorbi", 1309 "llvm.spu.si.xorhi", 1310 "llvm.spu.si.xori", 1311 "llvm.sqrt", 1312 "llvm.ssub.with.overflow", 1313 "llvm.stackprotector", 1314 "llvm.stackrestore", 1315 "llvm.stacksave", 1316 "llvm.trap", 1317 "llvm.uadd.with.overflow", 1318 "llvm.umul.with.overflow", 1319 "llvm.usub.with.overflow", 1320 "llvm.va_copy", 1321 "llvm.va_end", 1322 "llvm.var.annotation", 1323 "llvm.va_start", 1324 "llvm.x86.aesni.aesdec", 1325 "llvm.x86.aesni.aesdeclast", 1326 "llvm.x86.aesni.aesenc", 1327 "llvm.x86.aesni.aesenclast", 1328 "llvm.x86.aesni.aesimc", 1329 "llvm.x86.aesni.aeskeygenassist", 1330 "llvm.x86.avx.addsub.pd.256", 1331 "llvm.x86.avx.addsub.ps.256", 1332 "llvm.x86.avx.blend.pd.256", 1333 "llvm.x86.avx.blend.ps.256", 1334 "llvm.x86.avx.blendv.pd.256", 1335 "llvm.x86.avx.blendv.ps.256", 1336 "llvm.x86.avx.cmp.pd.256", 1337 "llvm.x86.avx.cmp.ps.256", 1338 "llvm.x86.avx.cvt.pd2.ps.256", 1339 "llvm.x86.avx.cvt.pd2dq.256", 1340 "llvm.x86.avx.cvt.ps2.pd.256", 1341 "llvm.x86.avx.cvt.ps2dq.256", 1342 "llvm.x86.avx.cvtdq2.pd.256", 1343 "llvm.x86.avx.cvtdq2.ps.256", 1344 "llvm.x86.avx.cvtt.pd2dq.256", 1345 "llvm.x86.avx.cvtt.ps2dq.256", 1346 "llvm.x86.avx.dp.ps.256", 1347 "llvm.x86.avx.hadd.pd.256", 1348 "llvm.x86.avx.hadd.ps.256", 1349 "llvm.x86.avx.hsub.pd.256", 1350 "llvm.x86.avx.hsub.ps.256", 1351 "llvm.x86.avx.ldu.dq.256", 1352 "llvm.x86.avx.loadu.dq.256", 1353 "llvm.x86.avx.loadu.pd.256", 1354 "llvm.x86.avx.loadu.ps.256", 1355 "llvm.x86.avx.maskload.pd", 1356 "llvm.x86.avx.maskload.pd.256", 1357 "llvm.x86.avx.maskload.ps", 1358 "llvm.x86.avx.maskload.ps.256", 1359 "llvm.x86.avx.maskstore.pd", 1360 "llvm.x86.avx.maskstore.pd.256", 1361 "llvm.x86.avx.maskstore.ps", 1362 "llvm.x86.avx.maskstore.ps.256", 1363 "llvm.x86.avx.max.pd.256", 1364 "llvm.x86.avx.max.ps.256", 1365 "llvm.x86.avx.min.pd.256", 1366 "llvm.x86.avx.min.ps.256", 1367 "llvm.x86.avx.movmsk.pd.256", 1368 "llvm.x86.avx.movmsk.ps.256", 1369 "llvm.x86.avx.movnt.dq.256", 1370 "llvm.x86.avx.movnt.pd.256", 1371 "llvm.x86.avx.movnt.ps.256", 1372 "llvm.x86.avx.ptestc.256", 1373 "llvm.x86.avx.ptestnzc.256", 1374 "llvm.x86.avx.ptestz.256", 1375 "llvm.x86.avx.rcp.ps.256", 1376 "llvm.x86.avx.round.pd.256", 1377 "llvm.x86.avx.round.ps.256", 1378 "llvm.x86.avx.rsqrt.ps.256", 1379 "llvm.x86.avx.sqrt.pd.256", 1380 "llvm.x86.avx.sqrt.ps.256", 1381 "llvm.x86.avx.storeu.dq.256", 1382 "llvm.x86.avx.storeu.pd.256", 1383 "llvm.x86.avx.storeu.ps.256", 1384 "llvm.x86.avx.vbroadcast.sd.256", 1385 "llvm.x86.avx.vbroadcastf128.pd.256", 1386 "llvm.x86.avx.vbroadcastf128.ps.256", 1387 "llvm.x86.avx.vbroadcastss", 1388 "llvm.x86.avx.vbroadcastss.256", 1389 "llvm.x86.avx.vextractf128.pd.256", 1390 "llvm.x86.avx.vextractf128.ps.256", 1391 "llvm.x86.avx.vextractf128.si.256", 1392 "llvm.x86.avx.vinsertf128.pd.256", 1393 "llvm.x86.avx.vinsertf128.ps.256", 1394 "llvm.x86.avx.vinsertf128.si.256", 1395 "llvm.x86.avx.vperm2f128.pd.256", 1396 "llvm.x86.avx.vperm2f128.ps.256", 1397 "llvm.x86.avx.vperm2f128.si.256", 1398 "llvm.x86.avx.vpermil.pd", 1399 "llvm.x86.avx.vpermil.pd.256", 1400 "llvm.x86.avx.vpermil.ps", 1401 "llvm.x86.avx.vpermil.ps.256", 1402 "llvm.x86.avx.vpermilvar.pd", 1403 "llvm.x86.avx.vpermilvar.pd.256", 1404 "llvm.x86.avx.vpermilvar.ps", 1405 "llvm.x86.avx.vpermilvar.ps.256", 1406 "llvm.x86.avx.vtestc.pd", 1407 "llvm.x86.avx.vtestc.pd.256", 1408 "llvm.x86.avx.vtestc.ps", 1409 "llvm.x86.avx.vtestc.ps.256", 1410 "llvm.x86.avx.vtestnzc.pd", 1411 "llvm.x86.avx.vtestnzc.pd.256", 1412 "llvm.x86.avx.vtestnzc.ps", 1413 "llvm.x86.avx.vtestnzc.ps.256", 1414 "llvm.x86.avx.vtestz.pd", 1415 "llvm.x86.avx.vtestz.pd.256", 1416 "llvm.x86.avx.vtestz.ps", 1417 "llvm.x86.avx.vtestz.ps.256", 1418 "llvm.x86.avx.vzeroall", 1419 "llvm.x86.avx.vzeroupper", 1420 "llvm.x86.int", 1421 "llvm.x86.mmx.cvtsi32.si64", 1422 "llvm.x86.mmx.cvtsi64.si32", 1423 "llvm.x86.mmx.emms", 1424 "llvm.x86.mmx.femms", 1425 "llvm.x86.mmx.maskmovq", 1426 "llvm.x86.mmx.movnt.dq", 1427 "llvm.x86.mmx.packssdw", 1428 "llvm.x86.mmx.packsswb", 1429 "llvm.x86.mmx.packuswb", 1430 "llvm.x86.mmx.padd.b", 1431 "llvm.x86.mmx.padd.d", 1432 "llvm.x86.mmx.padd.q", 1433 "llvm.x86.mmx.padd.w", 1434 "llvm.x86.mmx.padds.b", 1435 "llvm.x86.mmx.padds.w", 1436 "llvm.x86.mmx.paddus.b", 1437 "llvm.x86.mmx.paddus.w", 1438 "llvm.x86.mmx.pand", 1439 "llvm.x86.mmx.pandn", 1440 "llvm.x86.mmx.pavg.b", 1441 "llvm.x86.mmx.pavg.w", 1442 "llvm.x86.mmx.pcmpeq.b", 1443 "llvm.x86.mmx.pcmpeq.d", 1444 "llvm.x86.mmx.pcmpeq.w", 1445 "llvm.x86.mmx.pcmpgt.b", 1446 "llvm.x86.mmx.pcmpgt.d", 1447 "llvm.x86.mmx.pcmpgt.w", 1448 "llvm.x86.mmx.pextr.w", 1449 "llvm.x86.mmx.pinsr.w", 1450 "llvm.x86.mmx.pmadd.wd", 1451 "llvm.x86.mmx.pmaxs.w", 1452 "llvm.x86.mmx.pmaxu.b", 1453 "llvm.x86.mmx.pmins.w", 1454 "llvm.x86.mmx.pminu.b", 1455 "llvm.x86.mmx.pmovmskb", 1456 "llvm.x86.mmx.pmulh.w", 1457 "llvm.x86.mmx.pmulhu.w", 1458 "llvm.x86.mmx.pmull.w", 1459 "llvm.x86.mmx.pmulu.dq", 1460 "llvm.x86.mmx.por", 1461 "llvm.x86.mmx.psad.bw", 1462 "llvm.x86.mmx.psll.d", 1463 "llvm.x86.mmx.psll.q", 1464 "llvm.x86.mmx.psll.w", 1465 "llvm.x86.mmx.pslli.d", 1466 "llvm.x86.mmx.pslli.q", 1467 "llvm.x86.mmx.pslli.w", 1468 "llvm.x86.mmx.psra.d", 1469 "llvm.x86.mmx.psra.w", 1470 "llvm.x86.mmx.psrai.d", 1471 "llvm.x86.mmx.psrai.w", 1472 "llvm.x86.mmx.psrl.d", 1473 "llvm.x86.mmx.psrl.q", 1474 "llvm.x86.mmx.psrl.w", 1475 "llvm.x86.mmx.psrli.d", 1476 "llvm.x86.mmx.psrli.q", 1477 "llvm.x86.mmx.psrli.w", 1478 "llvm.x86.mmx.psub.b", 1479 "llvm.x86.mmx.psub.d", 1480 "llvm.x86.mmx.psub.q", 1481 "llvm.x86.mmx.psub.w", 1482 "llvm.x86.mmx.psubs.b", 1483 "llvm.x86.mmx.psubs.w", 1484 "llvm.x86.mmx.psubus.b", 1485 "llvm.x86.mmx.psubus.w", 1486 "llvm.x86.mmx.punpckhbw", 1487 "llvm.x86.mmx.punpckhdq", 1488 "llvm.x86.mmx.punpckhwd", 1489 "llvm.x86.mmx.punpcklbw", 1490 "llvm.x86.mmx.punpckldq", 1491 "llvm.x86.mmx.punpcklwd", 1492 "llvm.x86.mmx.pxor", 1493 "llvm.x86.mmx.vec.ext.d", 1494 "llvm.x86.mmx.vec.init.b", 1495 "llvm.x86.mmx.vec.init.d", 1496 "llvm.x86.mmx.vec.init.w", 1497 "llvm.x86.sse2.add.sd", 1498 "llvm.x86.sse2.clflush", 1499 "llvm.x86.sse2.cmp.pd", 1500 "llvm.x86.sse2.cmp.sd", 1501 "llvm.x86.sse2.comieq.sd", 1502 "llvm.x86.sse2.comige.sd", 1503 "llvm.x86.sse2.comigt.sd", 1504 "llvm.x86.sse2.comile.sd", 1505 "llvm.x86.sse2.comilt.sd", 1506 "llvm.x86.sse2.comineq.sd", 1507 "llvm.x86.sse2.cvtdq2pd", 1508 "llvm.x86.sse2.cvtdq2ps", 1509 "llvm.x86.sse2.cvtpd2dq", 1510 "llvm.x86.sse2.cvtpd2ps", 1511 "llvm.x86.sse2.cvtps2dq", 1512 "llvm.x86.sse2.cvtps2pd", 1513 "llvm.x86.sse2.cvtsd2si", 1514 "llvm.x86.sse2.cvtsd2si64", 1515 "llvm.x86.sse2.cvtsd2ss", 1516 "llvm.x86.sse2.cvtsi2sd", 1517 "llvm.x86.sse2.cvtsi642sd", 1518 "llvm.x86.sse2.cvtss2sd", 1519 "llvm.x86.sse2.cvttpd2dq", 1520 "llvm.x86.sse2.cvttps2dq", 1521 "llvm.x86.sse2.cvttsd2si", 1522 "llvm.x86.sse2.cvttsd2si64", 1523 "llvm.x86.sse2.div.sd", 1524 "llvm.x86.sse2.lfence", 1525 "llvm.x86.sse2.loadu.dq", 1526 "llvm.x86.sse2.loadu.pd", 1527 "llvm.x86.sse2.maskmov.dqu", 1528 "llvm.x86.sse2.max.pd", 1529 "llvm.x86.sse2.max.sd", 1530 "llvm.x86.sse2.mfence", 1531 "llvm.x86.sse2.min.pd", 1532 "llvm.x86.sse2.min.sd", 1533 "llvm.x86.sse2.movmsk.pd", 1534 "llvm.x86.sse2.movnt.dq", 1535 "llvm.x86.sse2.movnt.i", 1536 "llvm.x86.sse2.movnt.pd", 1537 "llvm.x86.sse2.mul.sd", 1538 "llvm.x86.sse2.packssdw.128", 1539 "llvm.x86.sse2.packsswb.128", 1540 "llvm.x86.sse2.packuswb.128", 1541 "llvm.x86.sse2.padds.b", 1542 "llvm.x86.sse2.padds.w", 1543 "llvm.x86.sse2.paddus.b", 1544 "llvm.x86.sse2.paddus.w", 1545 "llvm.x86.sse2.pavg.b", 1546 "llvm.x86.sse2.pavg.w", 1547 "llvm.x86.sse2.pcmpeq.b", 1548 "llvm.x86.sse2.pcmpeq.d", 1549 "llvm.x86.sse2.pcmpeq.w", 1550 "llvm.x86.sse2.pcmpgt.b", 1551 "llvm.x86.sse2.pcmpgt.d", 1552 "llvm.x86.sse2.pcmpgt.w", 1553 "llvm.x86.sse2.pmadd.wd", 1554 "llvm.x86.sse2.pmaxs.w", 1555 "llvm.x86.sse2.pmaxu.b", 1556 "llvm.x86.sse2.pmins.w", 1557 "llvm.x86.sse2.pminu.b", 1558 "llvm.x86.sse2.pmovmskb.128", 1559 "llvm.x86.sse2.pmulh.w", 1560 "llvm.x86.sse2.pmulhu.w", 1561 "llvm.x86.sse2.pmulu.dq", 1562 "llvm.x86.sse2.psad.bw", 1563 "llvm.x86.sse2.psll.d", 1564 "llvm.x86.sse2.psll.dq", 1565 "llvm.x86.sse2.psll.dq.bs", 1566 "llvm.x86.sse2.psll.q", 1567 "llvm.x86.sse2.psll.w", 1568 "llvm.x86.sse2.pslli.d", 1569 "llvm.x86.sse2.pslli.q", 1570 "llvm.x86.sse2.pslli.w", 1571 "llvm.x86.sse2.psra.d", 1572 "llvm.x86.sse2.psra.w", 1573 "llvm.x86.sse2.psrai.d", 1574 "llvm.x86.sse2.psrai.w", 1575 "llvm.x86.sse2.psrl.d", 1576 "llvm.x86.sse2.psrl.dq", 1577 "llvm.x86.sse2.psrl.dq.bs", 1578 "llvm.x86.sse2.psrl.q", 1579 "llvm.x86.sse2.psrl.w", 1580 "llvm.x86.sse2.psrli.d", 1581 "llvm.x86.sse2.psrli.q", 1582 "llvm.x86.sse2.psrli.w", 1583 "llvm.x86.sse2.psubs.b", 1584 "llvm.x86.sse2.psubs.w", 1585 "llvm.x86.sse2.psubus.b", 1586 "llvm.x86.sse2.psubus.w", 1587 "llvm.x86.sse2.sqrt.pd", 1588 "llvm.x86.sse2.sqrt.sd", 1589 "llvm.x86.sse2.storel.dq", 1590 "llvm.x86.sse2.storeu.dq", 1591 "llvm.x86.sse2.storeu.pd", 1592 "llvm.x86.sse2.sub.sd", 1593 "llvm.x86.sse2.ucomieq.sd", 1594 "llvm.x86.sse2.ucomige.sd", 1595 "llvm.x86.sse2.ucomigt.sd", 1596 "llvm.x86.sse2.ucomile.sd", 1597 "llvm.x86.sse2.ucomilt.sd", 1598 "llvm.x86.sse2.ucomineq.sd", 1599 "llvm.x86.sse3.addsub.pd", 1600 "llvm.x86.sse3.addsub.ps", 1601 "llvm.x86.sse3.hadd.pd", 1602 "llvm.x86.sse3.hadd.ps", 1603 "llvm.x86.sse3.hsub.pd", 1604 "llvm.x86.sse3.hsub.ps", 1605 "llvm.x86.sse3.ldu.dq", 1606 "llvm.x86.sse3.monitor", 1607 "llvm.x86.sse3.mwait", 1608 "llvm.x86.sse41.blendpd", 1609 "llvm.x86.sse41.blendps", 1610 "llvm.x86.sse41.blendvpd", 1611 "llvm.x86.sse41.blendvps", 1612 "llvm.x86.sse41.dppd", 1613 "llvm.x86.sse41.dpps", 1614 "llvm.x86.sse41.extractps", 1615 "llvm.x86.sse41.insertps", 1616 "llvm.x86.sse41.movntdqa", 1617 "llvm.x86.sse41.mpsadbw", 1618 "llvm.x86.sse41.packusdw", 1619 "llvm.x86.sse41.pblendvb", 1620 "llvm.x86.sse41.pblendw", 1621 "llvm.x86.sse41.pcmpeqq", 1622 "llvm.x86.sse41.pextrb", 1623 "llvm.x86.sse41.pextrd", 1624 "llvm.x86.sse41.pextrq", 1625 "llvm.x86.sse41.phminposuw", 1626 "llvm.x86.sse41.pmaxsb", 1627 "llvm.x86.sse41.pmaxsd", 1628 "llvm.x86.sse41.pmaxud", 1629 "llvm.x86.sse41.pmaxuw", 1630 "llvm.x86.sse41.pminsb", 1631 "llvm.x86.sse41.pminsd", 1632 "llvm.x86.sse41.pminud", 1633 "llvm.x86.sse41.pminuw", 1634 "llvm.x86.sse41.pmovsxbd", 1635 "llvm.x86.sse41.pmovsxbq", 1636 "llvm.x86.sse41.pmovsxbw", 1637 "llvm.x86.sse41.pmovsxdq", 1638 "llvm.x86.sse41.pmovsxwd", 1639 "llvm.x86.sse41.pmovsxwq", 1640 "llvm.x86.sse41.pmovzxbd", 1641 "llvm.x86.sse41.pmovzxbq", 1642 "llvm.x86.sse41.pmovzxbw", 1643 "llvm.x86.sse41.pmovzxdq", 1644 "llvm.x86.sse41.pmovzxwd", 1645 "llvm.x86.sse41.pmovzxwq", 1646 "llvm.x86.sse41.pmuldq", 1647 "llvm.x86.sse41.ptestc", 1648 "llvm.x86.sse41.ptestnzc", 1649 "llvm.x86.sse41.ptestz", 1650 "llvm.x86.sse41.round.pd", 1651 "llvm.x86.sse41.round.ps", 1652 "llvm.x86.sse41.round.sd", 1653 "llvm.x86.sse41.round.ss", 1654 "llvm.x86.sse42.crc32.16", 1655 "llvm.x86.sse42.crc32.32", 1656 "llvm.x86.sse42.crc32.8", 1657 "llvm.x86.sse42.crc64.64", 1658 "llvm.x86.sse42.crc64.8", 1659 "llvm.x86.sse42.pcmpestri128", 1660 "llvm.x86.sse42.pcmpestria128", 1661 "llvm.x86.sse42.pcmpestric128", 1662 "llvm.x86.sse42.pcmpestrio128", 1663 "llvm.x86.sse42.pcmpestris128", 1664 "llvm.x86.sse42.pcmpestriz128", 1665 "llvm.x86.sse42.pcmpestrm128", 1666 "llvm.x86.sse42.pcmpgtq", 1667 "llvm.x86.sse42.pcmpistri128", 1668 "llvm.x86.sse42.pcmpistria128", 1669 "llvm.x86.sse42.pcmpistric128", 1670 "llvm.x86.sse42.pcmpistrio128", 1671 "llvm.x86.sse42.pcmpistris128", 1672 "llvm.x86.sse42.pcmpistriz128", 1673 "llvm.x86.sse42.pcmpistrm128", 1674 "llvm.x86.sse.add.ss", 1675 "llvm.x86.sse.cmp.ps", 1676 "llvm.x86.sse.cmp.ss", 1677 "llvm.x86.sse.comieq.ss", 1678 "llvm.x86.sse.comige.ss", 1679 "llvm.x86.sse.comigt.ss", 1680 "llvm.x86.sse.comile.ss", 1681 "llvm.x86.sse.comilt.ss", 1682 "llvm.x86.sse.comineq.ss", 1683 "llvm.x86.sse.cvtpd2pi", 1684 "llvm.x86.sse.cvtpi2pd", 1685 "llvm.x86.sse.cvtpi2ps", 1686 "llvm.x86.sse.cvtps2pi", 1687 "llvm.x86.sse.cvtsi2ss", 1688 "llvm.x86.sse.cvtsi642ss", 1689 "llvm.x86.sse.cvtss2si", 1690 "llvm.x86.sse.cvtss2si64", 1691 "llvm.x86.sse.cvttpd2pi", 1692 "llvm.x86.sse.cvttps2pi", 1693 "llvm.x86.sse.cvttss2si", 1694 "llvm.x86.sse.cvttss2si64", 1695 "llvm.x86.sse.div.ss", 1696 "llvm.x86.sse.ldmxcsr", 1697 "llvm.x86.sse.loadu.ps", 1698 "llvm.x86.sse.max.ps", 1699 "llvm.x86.sse.max.ss", 1700 "llvm.x86.sse.min.ps", 1701 "llvm.x86.sse.min.ss", 1702 "llvm.x86.sse.movmsk.ps", 1703 "llvm.x86.sse.movnt.ps", 1704 "llvm.x86.sse.mul.ss", 1705 "llvm.x86.sse.rcp.ps", 1706 "llvm.x86.sse.rcp.ss", 1707 "llvm.x86.sse.rsqrt.ps", 1708 "llvm.x86.sse.rsqrt.ss", 1709 "llvm.x86.sse.sfence", 1710 "llvm.x86.sse.sqrt.ps", 1711 "llvm.x86.sse.sqrt.ss", 1712 "llvm.x86.sse.stmxcsr", 1713 "llvm.x86.sse.storeu.ps", 1714 "llvm.x86.sse.sub.ss", 1715 "llvm.x86.sse.ucomieq.ss", 1716 "llvm.x86.sse.ucomige.ss", 1717 "llvm.x86.sse.ucomigt.ss", 1718 "llvm.x86.sse.ucomile.ss", 1719 "llvm.x86.sse.ucomilt.ss", 1720 "llvm.x86.sse.ucomineq.ss", 1721 "llvm.x86.ssse3.pabs.b", 1722 "llvm.x86.ssse3.pabs.b.128", 1723 "llvm.x86.ssse3.pabs.d", 1724 "llvm.x86.ssse3.pabs.d.128", 1725 "llvm.x86.ssse3.pabs.w", 1726 "llvm.x86.ssse3.pabs.w.128", 1727 "llvm.x86.ssse3.phadd.d", 1728 "llvm.x86.ssse3.phadd.d.128", 1729 "llvm.x86.ssse3.phadd.sw", 1730 "llvm.x86.ssse3.phadd.sw.128", 1731 "llvm.x86.ssse3.phadd.w", 1732 "llvm.x86.ssse3.phadd.w.128", 1733 "llvm.x86.ssse3.phsub.d", 1734 "llvm.x86.ssse3.phsub.d.128", 1735 "llvm.x86.ssse3.phsub.sw", 1736 "llvm.x86.ssse3.phsub.sw.128", 1737 "llvm.x86.ssse3.phsub.w", 1738 "llvm.x86.ssse3.phsub.w.128", 1739 "llvm.x86.ssse3.pmadd.ub.sw", 1740 "llvm.x86.ssse3.pmadd.ub.sw.128", 1741 "llvm.x86.ssse3.pmul.hr.sw", 1742 "llvm.x86.ssse3.pmul.hr.sw.128", 1743 "llvm.x86.ssse3.pshuf.b", 1744 "llvm.x86.ssse3.pshuf.b.128", 1745 "llvm.x86.ssse3.pshuf.w", 1746 "llvm.x86.ssse3.psign.b", 1747 "llvm.x86.ssse3.psign.b.128", 1748 "llvm.x86.ssse3.psign.d", 1749 "llvm.x86.ssse3.psign.d.128", 1750 "llvm.x86.ssse3.psign.w", 1751 "llvm.x86.ssse3.psign.w.128", 1752 "llvm.xcore.bitrev", 1753 "llvm.xcore.getid", 1754#endif 1755 1756// Intrinsic ID to overload table 1757#ifdef GET_INTRINSIC_OVERLOAD_TABLE 1758 // Note that entry #0 is the invalid intrinsic! 1759 false, 1760 true, 1761 false, 1762 true, 1763 true, 1764 true, 1765 false, 1766 false, 1767 false, 1768 false, 1769 true, 1770 true, 1771 true, 1772 true, 1773 true, 1774 true, 1775 true, 1776 true, 1777 true, 1778 true, 1779 true, 1780 true, 1781 true, 1782 true, 1783 true, 1784 true, 1785 true, 1786 true, 1787 true, 1788 true, 1789 true, 1790 true, 1791 true, 1792 true, 1793 true, 1794 true, 1795 true, 1796 true, 1797 true, 1798 true, 1799 true, 1800 true, 1801 true, 1802 true, 1803 true, 1804 true, 1805 true, 1806 true, 1807 true, 1808 true, 1809 true, 1810 true, 1811 true, 1812 true, 1813 true, 1814 true, 1815 true, 1816 true, 1817 true, 1818 true, 1819 true, 1820 true, 1821 true, 1822 true, 1823 true, 1824 true, 1825 true, 1826 true, 1827 true, 1828 true, 1829 true, 1830 true, 1831 true, 1832 true, 1833 true, 1834 true, 1835 true, 1836 true, 1837 true, 1838 true, 1839 true, 1840 true, 1841 true, 1842 true, 1843 true, 1844 true, 1845 true, 1846 true, 1847 true, 1848 true, 1849 true, 1850 true, 1851 true, 1852 true, 1853 false, 1854 false, 1855 false, 1856 false, 1857 false, 1858 false, 1859 false, 1860 false, 1861 false, 1862 false, 1863 false, 1864 false, 1865 false, 1866 false, 1867 true, 1868 true, 1869 true, 1870 true, 1871 true, 1872 true, 1873 true, 1874 true, 1875 true, 1876 true, 1877 true, 1878 true, 1879 true, 1880 true, 1881 true, 1882 false, 1883 false, 1884 true, 1885 true, 1886 true, 1887 true, 1888 true, 1889 true, 1890 true, 1891 true, 1892 true, 1893 true, 1894 true, 1895 true, 1896 true, 1897 false, 1898 false, 1899 false, 1900 false, 1901 false, 1902 false, 1903 false, 1904 false, 1905 false, 1906 false, 1907 false, 1908 false, 1909 false, 1910 true, 1911 true, 1912 false, 1913 false, 1914 false, 1915 false, 1916 false, 1917 false, 1918 false, 1919 false, 1920 false, 1921 false, 1922 true, 1923 true, 1924 true, 1925 false, 1926 true, 1927 true, 1928 false, 1929 true, 1930 true, 1931 false, 1932 true, 1933 true, 1934 false, 1935 false, 1936 false, 1937 false, 1938 false, 1939 false, 1940 false, 1941 false, 1942 false, 1943 false, 1944 false, 1945 false, 1946 false, 1947 false, 1948 false, 1949 false, 1950 false, 1951 false, 1952 false, 1953 false, 1954 false, 1955 false, 1956 false, 1957 false, 1958 false, 1959 false, 1960 false, 1961 false, 1962 false, 1963 false, 1964 false, 1965 false, 1966 false, 1967 false, 1968 false, 1969 false, 1970 false, 1971 false, 1972 false, 1973 false, 1974 false, 1975 false, 1976 false, 1977 false, 1978 false, 1979 false, 1980 false, 1981 false, 1982 false, 1983 false, 1984 false, 1985 false, 1986 false, 1987 false, 1988 false, 1989 false, 1990 false, 1991 false, 1992 false, 1993 false, 1994 false, 1995 false, 1996 false, 1997 false, 1998 false, 1999 false, 2000 false, 2001 false, 2002 false, 2003 false, 2004 false, 2005 false, 2006 false, 2007 false, 2008 false, 2009 false, 2010 false, 2011 false, 2012 false, 2013 false, 2014 false, 2015 false, 2016 false, 2017 false, 2018 false, 2019 false, 2020 false, 2021 false, 2022 false, 2023 false, 2024 false, 2025 false, 2026 false, 2027 false, 2028 false, 2029 false, 2030 false, 2031 false, 2032 false, 2033 false, 2034 false, 2035 false, 2036 false, 2037 false, 2038 false, 2039 false, 2040 false, 2041 false, 2042 false, 2043 false, 2044 false, 2045 false, 2046 false, 2047 false, 2048 false, 2049 false, 2050 false, 2051 false, 2052 false, 2053 false, 2054 false, 2055 false, 2056 false, 2057 false, 2058 false, 2059 false, 2060 false, 2061 false, 2062 false, 2063 false, 2064 false, 2065 false, 2066 false, 2067 false, 2068 false, 2069 false, 2070 false, 2071 false, 2072 false, 2073 false, 2074 false, 2075 false, 2076 false, 2077 false, 2078 false, 2079 false, 2080 false, 2081 false, 2082 false, 2083 false, 2084 false, 2085 false, 2086 false, 2087 false, 2088 false, 2089 false, 2090 false, 2091 true, 2092 false, 2093 false, 2094 true, 2095 false, 2096 false, 2097 false, 2098 true, 2099 true, 2100 false, 2101 false, 2102 false, 2103 false, 2104 false, 2105 false, 2106 false, 2107 false, 2108 false, 2109 false, 2110 false, 2111 false, 2112 false, 2113 false, 2114 false, 2115 false, 2116 false, 2117 false, 2118 false, 2119 false, 2120 false, 2121 false, 2122 false, 2123 false, 2124 false, 2125 false, 2126 false, 2127 false, 2128 false, 2129 false, 2130 false, 2131 false, 2132 false, 2133 false, 2134 false, 2135 false, 2136 false, 2137 false, 2138 false, 2139 false, 2140 false, 2141 false, 2142 false, 2143 false, 2144 false, 2145 false, 2146 false, 2147 false, 2148 false, 2149 false, 2150 false, 2151 false, 2152 false, 2153 false, 2154 false, 2155 false, 2156 false, 2157 false, 2158 false, 2159 false, 2160 false, 2161 false, 2162 false, 2163 false, 2164 false, 2165 false, 2166 false, 2167 false, 2168 false, 2169 false, 2170 false, 2171 false, 2172 false, 2173 false, 2174 false, 2175 false, 2176 false, 2177 false, 2178 false, 2179 false, 2180 false, 2181 false, 2182 true, 2183 true, 2184 false, 2185 false, 2186 false, 2187 false, 2188 true, 2189 true, 2190 true, 2191 false, 2192 false, 2193 false, 2194 false, 2195 false, 2196 false, 2197 false, 2198 false, 2199 false, 2200 false, 2201 false, 2202 false, 2203 false, 2204 false, 2205 false, 2206 false, 2207 false, 2208 false, 2209 false, 2210 false, 2211 false, 2212 false, 2213 false, 2214 false, 2215 false, 2216 false, 2217 false, 2218 false, 2219 false, 2220 false, 2221 false, 2222 false, 2223 false, 2224 false, 2225 false, 2226 false, 2227 false, 2228 false, 2229 false, 2230 false, 2231 false, 2232 false, 2233 false, 2234 false, 2235 false, 2236 false, 2237 false, 2238 false, 2239 false, 2240 false, 2241 false, 2242 false, 2243 false, 2244 false, 2245 false, 2246 false, 2247 false, 2248 false, 2249 false, 2250 false, 2251 false, 2252 false, 2253 false, 2254 false, 2255 false, 2256 false, 2257 false, 2258 false, 2259 false, 2260 false, 2261 false, 2262 false, 2263 false, 2264 false, 2265 false, 2266 false, 2267 false, 2268 false, 2269 false, 2270 false, 2271 false, 2272 false, 2273 false, 2274 false, 2275 false, 2276 false, 2277 false, 2278 false, 2279 false, 2280 false, 2281 false, 2282 false, 2283 false, 2284 false, 2285 false, 2286 false, 2287 false, 2288 false, 2289 false, 2290 false, 2291 false, 2292 false, 2293 false, 2294 false, 2295 false, 2296 false, 2297 false, 2298 false, 2299 false, 2300 false, 2301 false, 2302 false, 2303 false, 2304 false, 2305 false, 2306 false, 2307 false, 2308 false, 2309 false, 2310 false, 2311 false, 2312 false, 2313 false, 2314 false, 2315 false, 2316 false, 2317 false, 2318 false, 2319 false, 2320 false, 2321 false, 2322 false, 2323 false, 2324 false, 2325 false, 2326 false, 2327 false, 2328 false, 2329 false, 2330 false, 2331 false, 2332 false, 2333 false, 2334 false, 2335 false, 2336 false, 2337 false, 2338 false, 2339 false, 2340 false, 2341 false, 2342 false, 2343 false, 2344 false, 2345 false, 2346 false, 2347 false, 2348 false, 2349 false, 2350 false, 2351 false, 2352 false, 2353 false, 2354 false, 2355 false, 2356 false, 2357 false, 2358 false, 2359 false, 2360 false, 2361 false, 2362 false, 2363 false, 2364 false, 2365 false, 2366 false, 2367 false, 2368 false, 2369 false, 2370 false, 2371 false, 2372 false, 2373 false, 2374 false, 2375 false, 2376 false, 2377 false, 2378 false, 2379 false, 2380 false, 2381 false, 2382 false, 2383 false, 2384 false, 2385 false, 2386 false, 2387 false, 2388 false, 2389 false, 2390 false, 2391 false, 2392 false, 2393 false, 2394 false, 2395 false, 2396 false, 2397 false, 2398 false, 2399 false, 2400 false, 2401 false, 2402 false, 2403 false, 2404 false, 2405 false, 2406 false, 2407 false, 2408 false, 2409 false, 2410 false, 2411 false, 2412 false, 2413 false, 2414 false, 2415 false, 2416 false, 2417 false, 2418 false, 2419 false, 2420 false, 2421 false, 2422 false, 2423 false, 2424 false, 2425 false, 2426 false, 2427 false, 2428 false, 2429 false, 2430 false, 2431 false, 2432 false, 2433 false, 2434 false, 2435 false, 2436 false, 2437 false, 2438 false, 2439 false, 2440 false, 2441 false, 2442 false, 2443 false, 2444 false, 2445 false, 2446 false, 2447 false, 2448 false, 2449 false, 2450 false, 2451 false, 2452 false, 2453 false, 2454 false, 2455 false, 2456 false, 2457 false, 2458 false, 2459 false, 2460 false, 2461 false, 2462 false, 2463 false, 2464 false, 2465 false, 2466 false, 2467 false, 2468 false, 2469 false, 2470 false, 2471 false, 2472 false, 2473 false, 2474 false, 2475 false, 2476 false, 2477 false, 2478 false, 2479 false, 2480 false, 2481 false, 2482 false, 2483 false, 2484 false, 2485 false, 2486 false, 2487 false, 2488 false, 2489 false, 2490 false, 2491 false, 2492 false, 2493 false, 2494 false, 2495 false, 2496 false, 2497 false, 2498 false, 2499 false, 2500 false, 2501 false, 2502 false, 2503 false, 2504 false, 2505 false, 2506 false, 2507 false, 2508 false, 2509 false, 2510 false, 2511 false, 2512 false, 2513 false, 2514 false, 2515 false, 2516 false, 2517 false, 2518 false, 2519 false, 2520 false, 2521 false, 2522 false, 2523 false, 2524 false, 2525 false, 2526 false, 2527 false, 2528 false, 2529 false, 2530 false, 2531 false, 2532 false, 2533 false, 2534 false, 2535 false, 2536 false, 2537 false, 2538 false, 2539 false, 2540 false, 2541 false, 2542 false, 2543 false, 2544 false, 2545 false, 2546 false, 2547 false, 2548 false, 2549 false, 2550 false, 2551 false, 2552 false, 2553 false, 2554 false, 2555 false, 2556 false, 2557 false, 2558 false, 2559 false, 2560 false, 2561 false, 2562 false, 2563 false, 2564 false, 2565 false, 2566 false, 2567 false, 2568 false, 2569 false, 2570 false, 2571 false, 2572 false, 2573 false, 2574 false, 2575 false, 2576 false, 2577 false, 2578 false, 2579 false, 2580 false, 2581 false, 2582 false, 2583 false, 2584 false, 2585 false, 2586 false, 2587 false, 2588 false, 2589 false, 2590 false, 2591 false, 2592 false, 2593 false, 2594 false, 2595 false, 2596 false, 2597 false, 2598 false, 2599 false, 2600 false, 2601 false, 2602 false, 2603 false, 2604 false, 2605 false, 2606 false, 2607 false, 2608 false, 2609 false, 2610 false, 2611 false, 2612 false, 2613 false, 2614 false, 2615 false, 2616 false, 2617 false, 2618 false, 2619 false, 2620 false, 2621 false, 2622 false, 2623 false, 2624 false, 2625#endif 2626 2627// Function name -> enum value recognizer code. 2628#ifdef GET_FUNCTION_RECOGNIZER 2629 switch (Name[5]) { 2630 default: 2631 break; 2632 case 'a': 2633 if (Len == 16 && !memcmp(Name, "llvm.alpha.umulh", 16)) return Intrinsic::alpha_umulh; 2634 if (Len > 15 && !memcmp(Name, "llvm.annotation.", 16)) return Intrinsic::annotation; 2635 if (Len == 18 && !memcmp(Name, "llvm.arm.get.fpscr", 18)) return Intrinsic::arm_get_fpscr; 2636 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vabds.", 20)) return Intrinsic::arm_neon_vabds; 2637 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vabdu.", 20)) return Intrinsic::arm_neon_vabdu; 2638 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vabs.", 19)) return Intrinsic::arm_neon_vabs; 2639 if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacged", 20)) return Intrinsic::arm_neon_vacged; 2640 if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacgeq", 20)) return Intrinsic::arm_neon_vacgeq; 2641 if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacgtd", 20)) return Intrinsic::arm_neon_vacgtd; 2642 if (Len == 20 && !memcmp(Name, "llvm.arm.neon.vacgtq", 20)) return Intrinsic::arm_neon_vacgtq; 2643 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vaddhn.", 21)) return Intrinsic::arm_neon_vaddhn; 2644 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vcls.", 19)) return Intrinsic::arm_neon_vcls; 2645 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vclz.", 19)) return Intrinsic::arm_neon_vclz; 2646 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vcnt.", 19)) return Intrinsic::arm_neon_vcnt; 2647 if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfp2fxs.", 25)) return Intrinsic::arm_neon_vcvtfp2fxs; 2648 if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfp2fxu.", 25)) return Intrinsic::arm_neon_vcvtfp2fxu; 2649 if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfxs2fp.", 25)) return Intrinsic::arm_neon_vcvtfxs2fp; 2650 if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vcvtfxu2fp.", 25)) return Intrinsic::arm_neon_vcvtfxu2fp; 2651 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhadds.", 21)) return Intrinsic::arm_neon_vhadds; 2652 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhaddu.", 21)) return Intrinsic::arm_neon_vhaddu; 2653 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhsubs.", 21)) return Intrinsic::arm_neon_vhsubs; 2654 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vhsubu.", 21)) return Intrinsic::arm_neon_vhsubu; 2655 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld1.", 19)) return Intrinsic::arm_neon_vld1; 2656 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld2.", 19)) return Intrinsic::arm_neon_vld2; 2657 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vld2lane.", 23)) return Intrinsic::arm_neon_vld2lane; 2658 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld3.", 19)) return Intrinsic::arm_neon_vld3; 2659 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vld3lane.", 23)) return Intrinsic::arm_neon_vld3lane; 2660 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vld4.", 19)) return Intrinsic::arm_neon_vld4; 2661 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vld4lane.", 23)) return Intrinsic::arm_neon_vld4lane; 2662 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmaxs.", 20)) return Intrinsic::arm_neon_vmaxs; 2663 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmaxu.", 20)) return Intrinsic::arm_neon_vmaxu; 2664 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmins.", 20)) return Intrinsic::arm_neon_vmins; 2665 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vminu.", 20)) return Intrinsic::arm_neon_vminu; 2666 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vmullp.", 21)) return Intrinsic::arm_neon_vmullp; 2667 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vmulp.", 20)) return Intrinsic::arm_neon_vmulp; 2668 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpadals.", 22)) return Intrinsic::arm_neon_vpadals; 2669 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpadalu.", 22)) return Intrinsic::arm_neon_vpadalu; 2670 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vpadd.", 20)) return Intrinsic::arm_neon_vpadd; 2671 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpaddls.", 22)) return Intrinsic::arm_neon_vpaddls; 2672 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vpaddlu.", 22)) return Intrinsic::arm_neon_vpaddlu; 2673 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpmaxs.", 21)) return Intrinsic::arm_neon_vpmaxs; 2674 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpmaxu.", 21)) return Intrinsic::arm_neon_vpmaxu; 2675 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpmins.", 21)) return Intrinsic::arm_neon_vpmins; 2676 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vpminu.", 21)) return Intrinsic::arm_neon_vpminu; 2677 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vqabs.", 20)) return Intrinsic::arm_neon_vqabs; 2678 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqadds.", 21)) return Intrinsic::arm_neon_vqadds; 2679 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqaddu.", 21)) return Intrinsic::arm_neon_vqaddu; 2680 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmlal.", 22)) return Intrinsic::arm_neon_vqdmlal; 2681 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmlsl.", 22)) return Intrinsic::arm_neon_vqdmlsl; 2682 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmulh.", 22)) return Intrinsic::arm_neon_vqdmulh; 2683 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqdmull.", 22)) return Intrinsic::arm_neon_vqdmull; 2684 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqmovns.", 22)) return Intrinsic::arm_neon_vqmovns; 2685 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqmovnsu.", 23)) return Intrinsic::arm_neon_vqmovnsu; 2686 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vqmovnu.", 22)) return Intrinsic::arm_neon_vqmovnu; 2687 if (Len > 19 && !memcmp(Name, "llvm.arm.neon.vqneg.", 20)) return Intrinsic::arm_neon_vqneg; 2688 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqrdmulh.", 23)) return Intrinsic::arm_neon_vqrdmulh; 2689 if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vqrshiftns.", 25)) return Intrinsic::arm_neon_vqrshiftns; 2690 if (Len > 25 && !memcmp(Name, "llvm.arm.neon.vqrshiftnsu.", 26)) return Intrinsic::arm_neon_vqrshiftnsu; 2691 if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vqrshiftnu.", 25)) return Intrinsic::arm_neon_vqrshiftnu; 2692 if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqrshifts.", 24)) return Intrinsic::arm_neon_vqrshifts; 2693 if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqrshiftu.", 24)) return Intrinsic::arm_neon_vqrshiftu; 2694 if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqshiftns.", 24)) return Intrinsic::arm_neon_vqshiftns; 2695 if (Len > 24 && !memcmp(Name, "llvm.arm.neon.vqshiftnsu.", 25)) return Intrinsic::arm_neon_vqshiftnsu; 2696 if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqshiftnu.", 24)) return Intrinsic::arm_neon_vqshiftnu; 2697 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqshifts.", 23)) return Intrinsic::arm_neon_vqshifts; 2698 if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vqshiftsu.", 24)) return Intrinsic::arm_neon_vqshiftsu; 2699 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vqshiftu.", 23)) return Intrinsic::arm_neon_vqshiftu; 2700 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqsubs.", 21)) return Intrinsic::arm_neon_vqsubs; 2701 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vqsubu.", 21)) return Intrinsic::arm_neon_vqsubu; 2702 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vraddhn.", 22)) return Intrinsic::arm_neon_vraddhn; 2703 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vrecpe.", 21)) return Intrinsic::arm_neon_vrecpe; 2704 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vrecps.", 21)) return Intrinsic::arm_neon_vrecps; 2705 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrhadds.", 22)) return Intrinsic::arm_neon_vrhadds; 2706 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrhaddu.", 22)) return Intrinsic::arm_neon_vrhaddu; 2707 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vrshiftn.", 23)) return Intrinsic::arm_neon_vrshiftn; 2708 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vrshifts.", 23)) return Intrinsic::arm_neon_vrshifts; 2709 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vrshiftu.", 23)) return Intrinsic::arm_neon_vrshiftu; 2710 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrsqrte.", 22)) return Intrinsic::arm_neon_vrsqrte; 2711 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrsqrts.", 22)) return Intrinsic::arm_neon_vrsqrts; 2712 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vrsubhn.", 22)) return Intrinsic::arm_neon_vrsubhn; 2713 if (Len > 23 && !memcmp(Name, "llvm.arm.neon.vshiftins.", 24)) return Intrinsic::arm_neon_vshiftins; 2714 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vshiftls.", 23)) return Intrinsic::arm_neon_vshiftls; 2715 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vshiftlu.", 23)) return Intrinsic::arm_neon_vshiftlu; 2716 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vshiftn.", 22)) return Intrinsic::arm_neon_vshiftn; 2717 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vshifts.", 22)) return Intrinsic::arm_neon_vshifts; 2718 if (Len > 21 && !memcmp(Name, "llvm.arm.neon.vshiftu.", 22)) return Intrinsic::arm_neon_vshiftu; 2719 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst1.", 19)) return Intrinsic::arm_neon_vst1; 2720 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst2.", 19)) return Intrinsic::arm_neon_vst2; 2721 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vst2lane.", 23)) return Intrinsic::arm_neon_vst2lane; 2722 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst3.", 19)) return Intrinsic::arm_neon_vst3; 2723 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vst3lane.", 23)) return Intrinsic::arm_neon_vst3lane; 2724 if (Len > 18 && !memcmp(Name, "llvm.arm.neon.vst4.", 19)) return Intrinsic::arm_neon_vst4; 2725 if (Len > 22 && !memcmp(Name, "llvm.arm.neon.vst4lane.", 23)) return Intrinsic::arm_neon_vst4lane; 2726 if (Len > 20 && !memcmp(Name, "llvm.arm.neon.vsubhn.", 21)) return Intrinsic::arm_neon_vsubhn; 2727 if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl1", 19)) return Intrinsic::arm_neon_vtbl1; 2728 if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl2", 19)) return Intrinsic::arm_neon_vtbl2; 2729 if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl3", 19)) return Intrinsic::arm_neon_vtbl3; 2730 if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbl4", 19)) return Intrinsic::arm_neon_vtbl4; 2731 if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx1", 19)) return Intrinsic::arm_neon_vtbx1; 2732 if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx2", 19)) return Intrinsic::arm_neon_vtbx2; 2733 if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx3", 19)) return Intrinsic::arm_neon_vtbx3; 2734 if (Len == 19 && !memcmp(Name, "llvm.arm.neon.vtbx4", 19)) return Intrinsic::arm_neon_vtbx4; 2735 if (Len == 13 && !memcmp(Name, "llvm.arm.qadd", 13)) return Intrinsic::arm_qadd; 2736 if (Len == 13 && !memcmp(Name, "llvm.arm.qsub", 13)) return Intrinsic::arm_qsub; 2737 if (Len == 18 && !memcmp(Name, "llvm.arm.set.fpscr", 18)) return Intrinsic::arm_set_fpscr; 2738 if (Len == 13 && !memcmp(Name, "llvm.arm.ssat", 13)) return Intrinsic::arm_ssat; 2739 if (Len == 23 && !memcmp(Name, "llvm.arm.thread.pointer", 23)) return Intrinsic::arm_thread_pointer; 2740 if (Len == 13 && !memcmp(Name, "llvm.arm.usat", 13)) return Intrinsic::arm_usat; 2741 if (Len > 14 && !memcmp(Name, "llvm.arm.vcvtr.", 15)) return Intrinsic::arm_vcvtr; 2742 if (Len > 15 && !memcmp(Name, "llvm.arm.vcvtru.", 16)) return Intrinsic::arm_vcvtru; 2743 if (Len > 20 && !memcmp(Name, "llvm.atomic.cmp.swap.", 21)) return Intrinsic::atomic_cmp_swap; 2744 if (Len > 20 && !memcmp(Name, "llvm.atomic.load.add.", 21)) return Intrinsic::atomic_load_add; 2745 if (Len > 20 && !memcmp(Name, "llvm.atomic.load.and.", 21)) return Intrinsic::atomic_load_and; 2746 if (Len > 20 && !memcmp(Name, "llvm.atomic.load.max.", 21)) return Intrinsic::atomic_load_max; 2747 if (Len > 20 && !memcmp(Name, "llvm.atomic.load.min.", 21)) return Intrinsic::atomic_load_min; 2748 if (Len > 21 && !memcmp(Name, "llvm.atomic.load.nand.", 22)) return Intrinsic::atomic_load_nand; 2749 if (Len > 19 && !memcmp(Name, "llvm.atomic.load.or.", 20)) return Intrinsic::atomic_load_or; 2750 if (Len > 20 && !memcmp(Name, "llvm.atomic.load.sub.", 21)) return Intrinsic::atomic_load_sub; 2751 if (Len > 21 && !memcmp(Name, "llvm.atomic.load.umax.", 22)) return Intrinsic::atomic_load_umax; 2752 if (Len > 21 && !memcmp(Name, "llvm.atomic.load.umin.", 22)) return Intrinsic::atomic_load_umin; 2753 if (Len > 20 && !memcmp(Name, "llvm.atomic.load.xor.", 21)) return Intrinsic::atomic_load_xor; 2754 if (Len > 16 && !memcmp(Name, "llvm.atomic.swap.", 17)) return Intrinsic::atomic_swap; 2755 break; 2756 case 'b': 2757 if (Len > 10 && !memcmp(Name, "llvm.bswap.", 11)) return Intrinsic::bswap; 2758 break; 2759 case 'c': 2760 if (Len == 22 && !memcmp(Name, "llvm.convert.from.fp16", 22)) return Intrinsic::convert_from_fp16; 2761 if (Len == 20 && !memcmp(Name, "llvm.convert.to.fp16", 20)) return Intrinsic::convert_to_fp16; 2762 if (Len > 14 && !memcmp(Name, "llvm.convertff.", 15)) return Intrinsic::convertff; 2763 if (Len > 15 && !memcmp(Name, "llvm.convertfsi.", 16)) return Intrinsic::convertfsi; 2764 if (Len > 15 && !memcmp(Name, "llvm.convertfui.", 16)) return Intrinsic::convertfui; 2765 if (Len > 15 && !memcmp(Name, "llvm.convertsif.", 16)) return Intrinsic::convertsif; 2766 if (Len > 14 && !memcmp(Name, "llvm.convertss.", 15)) return Intrinsic::convertss; 2767 if (Len > 14 && !memcmp(Name, "llvm.convertsu.", 15)) return Intrinsic::convertsu; 2768 if (Len > 15 && !memcmp(Name, "llvm.convertuif.", 16)) return Intrinsic::convertuif; 2769 if (Len > 14 && !memcmp(Name, "llvm.convertus.", 15)) return Intrinsic::convertus; 2770 if (Len > 14 && !memcmp(Name, "llvm.convertuu.", 15)) return Intrinsic::convertuu; 2771 if (Len > 8 && !memcmp(Name, "llvm.cos.", 9)) return Intrinsic::cos; 2772 if (Len > 9 && !memcmp(Name, "llvm.ctlz.", 10)) return Intrinsic::ctlz; 2773 if (Len > 10 && !memcmp(Name, "llvm.ctpop.", 11)) return Intrinsic::ctpop; 2774 if (Len > 9 && !memcmp(Name, "llvm.cttz.", 10)) return Intrinsic::cttz; 2775 break; 2776 case 'd': 2777 if (Len == 16 && !memcmp(Name, "llvm.dbg.declare", 16)) return Intrinsic::dbg_declare; 2778 if (Len == 14 && !memcmp(Name, "llvm.dbg.value", 14)) return Intrinsic::dbg_value; 2779 break; 2780 case 'e': 2781 if (Len == 17 && !memcmp(Name, "llvm.eh.dwarf.cfa", 17)) return Intrinsic::eh_dwarf_cfa; 2782 if (Len == 17 && !memcmp(Name, "llvm.eh.exception", 17)) return Intrinsic::eh_exception; 2783 if (Len == 18 && !memcmp(Name, "llvm.eh.return.i32", 18)) return Intrinsic::eh_return_i32; 2784 if (Len == 18 && !memcmp(Name, "llvm.eh.return.i64", 18)) return Intrinsic::eh_return_i64; 2785 if (Len == 16 && !memcmp(Name, "llvm.eh.selector", 16)) return Intrinsic::eh_selector; 2786 if (Len == 21 && !memcmp(Name, "llvm.eh.sjlj.callsite", 21)) return Intrinsic::eh_sjlj_callsite; 2787 if (Len == 20 && !memcmp(Name, "llvm.eh.sjlj.longjmp", 20)) return Intrinsic::eh_sjlj_longjmp; 2788 if (Len == 17 && !memcmp(Name, "llvm.eh.sjlj.lsda", 17)) return Intrinsic::eh_sjlj_lsda; 2789 if (Len == 19 && !memcmp(Name, "llvm.eh.sjlj.setjmp", 19)) return Intrinsic::eh_sjlj_setjmp; 2790 if (Len == 18 && !memcmp(Name, "llvm.eh.typeid.for", 18)) return Intrinsic::eh_typeid_for; 2791 if (Len == 19 && !memcmp(Name, "llvm.eh.unwind.init", 19)) return Intrinsic::eh_unwind_init; 2792 if (Len > 8 && !memcmp(Name, "llvm.exp.", 9)) return Intrinsic::exp; 2793 if (Len > 9 && !memcmp(Name, "llvm.exp2.", 10)) return Intrinsic::exp2; 2794 break; 2795 case 'f': 2796 if (Len == 15 && !memcmp(Name, "llvm.flt.rounds", 15)) return Intrinsic::flt_rounds; 2797 if (Len == 17 && !memcmp(Name, "llvm.frameaddress", 17)) return Intrinsic::frameaddress; 2798 break; 2799 case 'g': 2800 if (Len == 11 && !memcmp(Name, "llvm.gcread", 11)) return Intrinsic::gcread; 2801 if (Len == 11 && !memcmp(Name, "llvm.gcroot", 11)) return Intrinsic::gcroot; 2802 if (Len == 12 && !memcmp(Name, "llvm.gcwrite", 12)) return Intrinsic::gcwrite; 2803 break; 2804 case 'i': 2805 if (Len == 20 && !memcmp(Name, "llvm.init.trampoline", 20)) return Intrinsic::init_trampoline; 2806 if (Len == 18 && !memcmp(Name, "llvm.invariant.end", 18)) return Intrinsic::invariant_end; 2807 if (Len == 20 && !memcmp(Name, "llvm.invariant.start", 20)) return Intrinsic::invariant_start; 2808 break; 2809 case 'l': 2810 if (Len == 17 && !memcmp(Name, "llvm.lifetime.end", 17)) return Intrinsic::lifetime_end; 2811 if (Len == 19 && !memcmp(Name, "llvm.lifetime.start", 19)) return Intrinsic::lifetime_start; 2812 if (Len > 8 && !memcmp(Name, "llvm.log.", 9)) return Intrinsic::log; 2813 if (Len > 10 && !memcmp(Name, "llvm.log10.", 11)) return Intrinsic::log10; 2814 if (Len > 9 && !memcmp(Name, "llvm.log2.", 10)) return Intrinsic::log2; 2815 if (Len == 12 && !memcmp(Name, "llvm.longjmp", 12)) return Intrinsic::longjmp; 2816 break; 2817 case 'm': 2818 if (Len > 11 && !memcmp(Name, "llvm.memcpy.", 12)) return Intrinsic::memcpy; 2819 if (Len > 12 && !memcmp(Name, "llvm.memmove.", 13)) return Intrinsic::memmove; 2820 if (Len == 19 && !memcmp(Name, "llvm.memory.barrier", 19)) return Intrinsic::memory_barrier; 2821 if (Len > 11 && !memcmp(Name, "llvm.memset.", 12)) return Intrinsic::memset; 2822 break; 2823 case 'o': 2824 if (Len > 15 && !memcmp(Name, "llvm.objectsize.", 16)) return Intrinsic::objectsize; 2825 break; 2826 case 'p': 2827 if (Len == 13 && !memcmp(Name, "llvm.pcmarker", 13)) return Intrinsic::pcmarker; 2828 if (Len > 8 && !memcmp(Name, "llvm.pow.", 9)) return Intrinsic::pow; 2829 if (Len > 9 && !memcmp(Name, "llvm.powi.", 10)) return Intrinsic::powi; 2830 if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.dss", 20)) return Intrinsic::ppc_altivec_dss; 2831 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.dssall", 23)) return Intrinsic::ppc_altivec_dssall; 2832 if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.dst", 20)) return Intrinsic::ppc_altivec_dst; 2833 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.dstst", 22)) return Intrinsic::ppc_altivec_dstst; 2834 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.dststt", 23)) return Intrinsic::ppc_altivec_dststt; 2835 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.dstt", 21)) return Intrinsic::ppc_altivec_dstt; 2836 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.lvebx", 22)) return Intrinsic::ppc_altivec_lvebx; 2837 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.lvehx", 22)) return Intrinsic::ppc_altivec_lvehx; 2838 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.lvewx", 22)) return Intrinsic::ppc_altivec_lvewx; 2839 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.lvsl", 21)) return Intrinsic::ppc_altivec_lvsl; 2840 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.lvsr", 21)) return Intrinsic::ppc_altivec_lvsr; 2841 if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.lvx", 20)) return Intrinsic::ppc_altivec_lvx; 2842 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.lvxl", 21)) return Intrinsic::ppc_altivec_lvxl; 2843 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.mfvscr", 23)) return Intrinsic::ppc_altivec_mfvscr; 2844 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.mtvscr", 23)) return Intrinsic::ppc_altivec_mtvscr; 2845 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.stvebx", 23)) return Intrinsic::ppc_altivec_stvebx; 2846 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.stvehx", 23)) return Intrinsic::ppc_altivec_stvehx; 2847 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.stvewx", 23)) return Intrinsic::ppc_altivec_stvewx; 2848 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.stvx", 21)) return Intrinsic::ppc_altivec_stvx; 2849 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.stvxl", 22)) return Intrinsic::ppc_altivec_stvxl; 2850 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddcuw", 24)) return Intrinsic::ppc_altivec_vaddcuw; 2851 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddsbs", 24)) return Intrinsic::ppc_altivec_vaddsbs; 2852 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddshs", 24)) return Intrinsic::ppc_altivec_vaddshs; 2853 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddsws", 24)) return Intrinsic::ppc_altivec_vaddsws; 2854 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vaddubs", 24)) return Intrinsic::ppc_altivec_vaddubs; 2855 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vadduhs", 24)) return Intrinsic::ppc_altivec_vadduhs; 2856 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vadduws", 24)) return Intrinsic::ppc_altivec_vadduws; 2857 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgsb", 23)) return Intrinsic::ppc_altivec_vavgsb; 2858 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgsh", 23)) return Intrinsic::ppc_altivec_vavgsh; 2859 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgsw", 23)) return Intrinsic::ppc_altivec_vavgsw; 2860 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavgub", 23)) return Intrinsic::ppc_altivec_vavgub; 2861 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavguh", 23)) return Intrinsic::ppc_altivec_vavguh; 2862 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vavguw", 23)) return Intrinsic::ppc_altivec_vavguw; 2863 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vcfsx", 22)) return Intrinsic::ppc_altivec_vcfsx; 2864 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vcfux", 22)) return Intrinsic::ppc_altivec_vcfux; 2865 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vcmpbfp", 24)) return Intrinsic::ppc_altivec_vcmpbfp; 2866 if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vcmpbfp.p", 26)) return Intrinsic::ppc_altivec_vcmpbfp_p; 2867 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpeqfp", 25)) return Intrinsic::ppc_altivec_vcmpeqfp; 2868 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpeqfp.p", 27)) return Intrinsic::ppc_altivec_vcmpeqfp_p; 2869 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpequb", 25)) return Intrinsic::ppc_altivec_vcmpequb; 2870 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpequb.p", 27)) return Intrinsic::ppc_altivec_vcmpequb_p; 2871 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpequh", 25)) return Intrinsic::ppc_altivec_vcmpequh; 2872 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpequh.p", 27)) return Intrinsic::ppc_altivec_vcmpequh_p; 2873 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpequw", 25)) return Intrinsic::ppc_altivec_vcmpequw; 2874 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpequw.p", 27)) return Intrinsic::ppc_altivec_vcmpequw_p; 2875 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgefp", 25)) return Intrinsic::ppc_altivec_vcmpgefp; 2876 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgefp.p", 27)) return Intrinsic::ppc_altivec_vcmpgefp_p; 2877 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtfp", 25)) return Intrinsic::ppc_altivec_vcmpgtfp; 2878 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtfp.p", 27)) return Intrinsic::ppc_altivec_vcmpgtfp_p; 2879 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsb", 25)) return Intrinsic::ppc_altivec_vcmpgtsb; 2880 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsb.p", 27)) return Intrinsic::ppc_altivec_vcmpgtsb_p; 2881 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsh", 25)) return Intrinsic::ppc_altivec_vcmpgtsh; 2882 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsh.p", 27)) return Intrinsic::ppc_altivec_vcmpgtsh_p; 2883 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsw", 25)) return Intrinsic::ppc_altivec_vcmpgtsw; 2884 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtsw.p", 27)) return Intrinsic::ppc_altivec_vcmpgtsw_p; 2885 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtub", 25)) return Intrinsic::ppc_altivec_vcmpgtub; 2886 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtub.p", 27)) return Intrinsic::ppc_altivec_vcmpgtub_p; 2887 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuh", 25)) return Intrinsic::ppc_altivec_vcmpgtuh; 2888 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuh.p", 27)) return Intrinsic::ppc_altivec_vcmpgtuh_p; 2889 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuw", 25)) return Intrinsic::ppc_altivec_vcmpgtuw; 2890 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vcmpgtuw.p", 27)) return Intrinsic::ppc_altivec_vcmpgtuw_p; 2891 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vctsxs", 23)) return Intrinsic::ppc_altivec_vctsxs; 2892 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vctuxs", 23)) return Intrinsic::ppc_altivec_vctuxs; 2893 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vexptefp", 25)) return Intrinsic::ppc_altivec_vexptefp; 2894 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vlogefp", 24)) return Intrinsic::ppc_altivec_vlogefp; 2895 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmaddfp", 24)) return Intrinsic::ppc_altivec_vmaddfp; 2896 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxfp", 23)) return Intrinsic::ppc_altivec_vmaxfp; 2897 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxsb", 23)) return Intrinsic::ppc_altivec_vmaxsb; 2898 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxsh", 23)) return Intrinsic::ppc_altivec_vmaxsh; 2899 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxsw", 23)) return Intrinsic::ppc_altivec_vmaxsw; 2900 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxub", 23)) return Intrinsic::ppc_altivec_vmaxub; 2901 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxuh", 23)) return Intrinsic::ppc_altivec_vmaxuh; 2902 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vmaxuw", 23)) return Intrinsic::ppc_altivec_vmaxuw; 2903 if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vmhaddshs", 26)) return Intrinsic::ppc_altivec_vmhaddshs; 2904 if (Len == 27 && !memcmp(Name, "llvm.ppc.altivec.vmhraddshs", 27)) return Intrinsic::ppc_altivec_vmhraddshs; 2905 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminfp", 23)) return Intrinsic::ppc_altivec_vminfp; 2906 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminsb", 23)) return Intrinsic::ppc_altivec_vminsb; 2907 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminsh", 23)) return Intrinsic::ppc_altivec_vminsh; 2908 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminsw", 23)) return Intrinsic::ppc_altivec_vminsw; 2909 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminub", 23)) return Intrinsic::ppc_altivec_vminub; 2910 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminuh", 23)) return Intrinsic::ppc_altivec_vminuh; 2911 if (Len == 23 && !memcmp(Name, "llvm.ppc.altivec.vminuw", 23)) return Intrinsic::ppc_altivec_vminuw; 2912 if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vmladduhm", 26)) return Intrinsic::ppc_altivec_vmladduhm; 2913 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsummbm", 25)) return Intrinsic::ppc_altivec_vmsummbm; 2914 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumshm", 25)) return Intrinsic::ppc_altivec_vmsumshm; 2915 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumshs", 25)) return Intrinsic::ppc_altivec_vmsumshs; 2916 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumubm", 25)) return Intrinsic::ppc_altivec_vmsumubm; 2917 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumuhm", 25)) return Intrinsic::ppc_altivec_vmsumuhm; 2918 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vmsumuhs", 25)) return Intrinsic::ppc_altivec_vmsumuhs; 2919 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulesb", 24)) return Intrinsic::ppc_altivec_vmulesb; 2920 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulesh", 24)) return Intrinsic::ppc_altivec_vmulesh; 2921 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmuleub", 24)) return Intrinsic::ppc_altivec_vmuleub; 2922 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmuleuh", 24)) return Intrinsic::ppc_altivec_vmuleuh; 2923 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulosb", 24)) return Intrinsic::ppc_altivec_vmulosb; 2924 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulosh", 24)) return Intrinsic::ppc_altivec_vmulosh; 2925 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmuloub", 24)) return Intrinsic::ppc_altivec_vmuloub; 2926 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vmulouh", 24)) return Intrinsic::ppc_altivec_vmulouh; 2927 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vnmsubfp", 25)) return Intrinsic::ppc_altivec_vnmsubfp; 2928 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vperm", 22)) return Intrinsic::ppc_altivec_vperm; 2929 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vpkpx", 22)) return Intrinsic::ppc_altivec_vpkpx; 2930 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkshss", 24)) return Intrinsic::ppc_altivec_vpkshss; 2931 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkshus", 24)) return Intrinsic::ppc_altivec_vpkshus; 2932 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkswss", 24)) return Intrinsic::ppc_altivec_vpkswss; 2933 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkswus", 24)) return Intrinsic::ppc_altivec_vpkswus; 2934 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkuhus", 24)) return Intrinsic::ppc_altivec_vpkuhus; 2935 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vpkuwus", 24)) return Intrinsic::ppc_altivec_vpkuwus; 2936 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrefp", 22)) return Intrinsic::ppc_altivec_vrefp; 2937 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfim", 22)) return Intrinsic::ppc_altivec_vrfim; 2938 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfin", 22)) return Intrinsic::ppc_altivec_vrfin; 2939 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfip", 22)) return Intrinsic::ppc_altivec_vrfip; 2940 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vrfiz", 22)) return Intrinsic::ppc_altivec_vrfiz; 2941 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vrlb", 21)) return Intrinsic::ppc_altivec_vrlb; 2942 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vrlh", 21)) return Intrinsic::ppc_altivec_vrlh; 2943 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vrlw", 21)) return Intrinsic::ppc_altivec_vrlw; 2944 if (Len == 26 && !memcmp(Name, "llvm.ppc.altivec.vrsqrtefp", 26)) return Intrinsic::ppc_altivec_vrsqrtefp; 2945 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsel", 21)) return Intrinsic::ppc_altivec_vsel; 2946 if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.vsl", 20)) return Intrinsic::ppc_altivec_vsl; 2947 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslb", 21)) return Intrinsic::ppc_altivec_vslb; 2948 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslh", 21)) return Intrinsic::ppc_altivec_vslh; 2949 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslo", 21)) return Intrinsic::ppc_altivec_vslo; 2950 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vslw", 21)) return Intrinsic::ppc_altivec_vslw; 2951 if (Len == 20 && !memcmp(Name, "llvm.ppc.altivec.vsr", 20)) return Intrinsic::ppc_altivec_vsr; 2952 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vsrab", 22)) return Intrinsic::ppc_altivec_vsrab; 2953 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vsrah", 22)) return Intrinsic::ppc_altivec_vsrah; 2954 if (Len == 22 && !memcmp(Name, "llvm.ppc.altivec.vsraw", 22)) return Intrinsic::ppc_altivec_vsraw; 2955 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsrb", 21)) return Intrinsic::ppc_altivec_vsrb; 2956 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsrh", 21)) return Intrinsic::ppc_altivec_vsrh; 2957 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsro", 21)) return Intrinsic::ppc_altivec_vsro; 2958 if (Len == 21 && !memcmp(Name, "llvm.ppc.altivec.vsrw", 21)) return Intrinsic::ppc_altivec_vsrw; 2959 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubcuw", 24)) return Intrinsic::ppc_altivec_vsubcuw; 2960 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubsbs", 24)) return Intrinsic::ppc_altivec_vsubsbs; 2961 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubshs", 24)) return Intrinsic::ppc_altivec_vsubshs; 2962 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubsws", 24)) return Intrinsic::ppc_altivec_vsubsws; 2963 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsububs", 24)) return Intrinsic::ppc_altivec_vsububs; 2964 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubuhs", 24)) return Intrinsic::ppc_altivec_vsubuhs; 2965 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsubuws", 24)) return Intrinsic::ppc_altivec_vsubuws; 2966 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum2sws", 25)) return Intrinsic::ppc_altivec_vsum2sws; 2967 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum4sbs", 25)) return Intrinsic::ppc_altivec_vsum4sbs; 2968 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum4shs", 25)) return Intrinsic::ppc_altivec_vsum4shs; 2969 if (Len == 25 && !memcmp(Name, "llvm.ppc.altivec.vsum4ubs", 25)) return Intrinsic::ppc_altivec_vsum4ubs; 2970 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vsumsws", 24)) return Intrinsic::ppc_altivec_vsumsws; 2971 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupkhpx", 24)) return Intrinsic::ppc_altivec_vupkhpx; 2972 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupkhsb", 24)) return Intrinsic::ppc_altivec_vupkhsb; 2973 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupkhsh", 24)) return Intrinsic::ppc_altivec_vupkhsh; 2974 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupklpx", 24)) return Intrinsic::ppc_altivec_vupklpx; 2975 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupklsb", 24)) return Intrinsic::ppc_altivec_vupklsb; 2976 if (Len == 24 && !memcmp(Name, "llvm.ppc.altivec.vupklsh", 24)) return Intrinsic::ppc_altivec_vupklsh; 2977 if (Len == 13 && !memcmp(Name, "llvm.ppc.dcba", 13)) return Intrinsic::ppc_dcba; 2978 if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbf", 13)) return Intrinsic::ppc_dcbf; 2979 if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbi", 13)) return Intrinsic::ppc_dcbi; 2980 if (Len == 14 && !memcmp(Name, "llvm.ppc.dcbst", 14)) return Intrinsic::ppc_dcbst; 2981 if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbt", 13)) return Intrinsic::ppc_dcbt; 2982 if (Len == 15 && !memcmp(Name, "llvm.ppc.dcbtst", 15)) return Intrinsic::ppc_dcbtst; 2983 if (Len == 13 && !memcmp(Name, "llvm.ppc.dcbz", 13)) return Intrinsic::ppc_dcbz; 2984 if (Len == 14 && !memcmp(Name, "llvm.ppc.dcbzl", 14)) return Intrinsic::ppc_dcbzl; 2985 if (Len == 13 && !memcmp(Name, "llvm.ppc.sync", 13)) return Intrinsic::ppc_sync; 2986 if (Len == 13 && !memcmp(Name, "llvm.prefetch", 13)) return Intrinsic::prefetch; 2987 if (Len > 19 && !memcmp(Name, "llvm.ptr.annotation.", 20)) return Intrinsic::ptr_annotation; 2988 break; 2989 case 'r': 2990 if (Len == 21 && !memcmp(Name, "llvm.readcyclecounter", 21)) return Intrinsic::readcyclecounter; 2991 if (Len == 18 && !memcmp(Name, "llvm.returnaddress", 18)) return Intrinsic::returnaddress; 2992 break; 2993 case 's': 2994 if (Len > 23 && !memcmp(Name, "llvm.sadd.with.overflow.", 24)) return Intrinsic::sadd_with_overflow; 2995 if (Len == 11 && !memcmp(Name, "llvm.setjmp", 11)) return Intrinsic::setjmp; 2996 if (Len == 15 && !memcmp(Name, "llvm.siglongjmp", 15)) return Intrinsic::siglongjmp; 2997 if (Len == 14 && !memcmp(Name, "llvm.sigsetjmp", 14)) return Intrinsic::sigsetjmp; 2998 if (Len > 8 && !memcmp(Name, "llvm.sin.", 9)) return Intrinsic::sin; 2999 if (Len > 23 && !memcmp(Name, "llvm.smul.with.overflow.", 24)) return Intrinsic::smul_with_overflow; 3000 if (Len == 13 && !memcmp(Name, "llvm.spu.si.a", 13)) return Intrinsic::spu_si_a; 3001 if (Len == 16 && !memcmp(Name, "llvm.spu.si.addx", 16)) return Intrinsic::spu_si_addx; 3002 if (Len == 14 && !memcmp(Name, "llvm.spu.si.ah", 14)) return Intrinsic::spu_si_ah; 3003 if (Len == 15 && !memcmp(Name, "llvm.spu.si.ahi", 15)) return Intrinsic::spu_si_ahi; 3004 if (Len == 14 && !memcmp(Name, "llvm.spu.si.ai", 14)) return Intrinsic::spu_si_ai; 3005 if (Len == 15 && !memcmp(Name, "llvm.spu.si.and", 15)) return Intrinsic::spu_si_and; 3006 if (Len == 17 && !memcmp(Name, "llvm.spu.si.andbi", 17)) return Intrinsic::spu_si_andbi; 3007 if (Len == 16 && !memcmp(Name, "llvm.spu.si.andc", 16)) return Intrinsic::spu_si_andc; 3008 if (Len == 17 && !memcmp(Name, "llvm.spu.si.andhi", 17)) return Intrinsic::spu_si_andhi; 3009 if (Len == 16 && !memcmp(Name, "llvm.spu.si.andi", 16)) return Intrinsic::spu_si_andi; 3010 if (Len == 14 && !memcmp(Name, "llvm.spu.si.bg", 14)) return Intrinsic::spu_si_bg; 3011 if (Len == 15 && !memcmp(Name, "llvm.spu.si.bgx", 15)) return Intrinsic::spu_si_bgx; 3012 if (Len == 15 && !memcmp(Name, "llvm.spu.si.ceq", 15)) return Intrinsic::spu_si_ceq; 3013 if (Len == 16 && !memcmp(Name, "llvm.spu.si.ceqb", 16)) return Intrinsic::spu_si_ceqb; 3014 if (Len == 17 && !memcmp(Name, "llvm.spu.si.ceqbi", 17)) return Intrinsic::spu_si_ceqbi; 3015 if (Len == 16 && !memcmp(Name, "llvm.spu.si.ceqh", 16)) return Intrinsic::spu_si_ceqh; 3016 if (Len == 17 && !memcmp(Name, "llvm.spu.si.ceqhi", 17)) return Intrinsic::spu_si_ceqhi; 3017 if (Len == 16 && !memcmp(Name, "llvm.spu.si.ceqi", 16)) return Intrinsic::spu_si_ceqi; 3018 if (Len == 14 && !memcmp(Name, "llvm.spu.si.cg", 14)) return Intrinsic::spu_si_cg; 3019 if (Len == 15 && !memcmp(Name, "llvm.spu.si.cgt", 15)) return Intrinsic::spu_si_cgt; 3020 if (Len == 16 && !memcmp(Name, "llvm.spu.si.cgtb", 16)) return Intrinsic::spu_si_cgtb; 3021 if (Len == 17 && !memcmp(Name, "llvm.spu.si.cgtbi", 17)) return Intrinsic::spu_si_cgtbi; 3022 if (Len == 16 && !memcmp(Name, "llvm.spu.si.cgth", 16)) return Intrinsic::spu_si_cgth; 3023 if (Len == 17 && !memcmp(Name, "llvm.spu.si.cgthi", 17)) return Intrinsic::spu_si_cgthi; 3024 if (Len == 16 && !memcmp(Name, "llvm.spu.si.cgti", 16)) return Intrinsic::spu_si_cgti; 3025 if (Len == 15 && !memcmp(Name, "llvm.spu.si.cgx", 15)) return Intrinsic::spu_si_cgx; 3026 if (Len == 16 && !memcmp(Name, "llvm.spu.si.clgt", 16)) return Intrinsic::spu_si_clgt; 3027 if (Len == 17 && !memcmp(Name, "llvm.spu.si.clgtb", 17)) return Intrinsic::spu_si_clgtb; 3028 if (Len == 18 && !memcmp(Name, "llvm.spu.si.clgtbi", 18)) return Intrinsic::spu_si_clgtbi; 3029 if (Len == 17 && !memcmp(Name, "llvm.spu.si.clgth", 17)) return Intrinsic::spu_si_clgth; 3030 if (Len == 18 && !memcmp(Name, "llvm.spu.si.clgthi", 18)) return Intrinsic::spu_si_clgthi; 3031 if (Len == 17 && !memcmp(Name, "llvm.spu.si.clgti", 17)) return Intrinsic::spu_si_clgti; 3032 if (Len == 15 && !memcmp(Name, "llvm.spu.si.dfa", 15)) return Intrinsic::spu_si_dfa; 3033 if (Len == 15 && !memcmp(Name, "llvm.spu.si.dfm", 15)) return Intrinsic::spu_si_dfm; 3034 if (Len == 16 && !memcmp(Name, "llvm.spu.si.dfma", 16)) return Intrinsic::spu_si_dfma; 3035 if (Len == 16 && !memcmp(Name, "llvm.spu.si.dfms", 16)) return Intrinsic::spu_si_dfms; 3036 if (Len == 17 && !memcmp(Name, "llvm.spu.si.dfnma", 17)) return Intrinsic::spu_si_dfnma; 3037 if (Len == 17 && !memcmp(Name, "llvm.spu.si.dfnms", 17)) return Intrinsic::spu_si_dfnms; 3038 if (Len == 15 && !memcmp(Name, "llvm.spu.si.dfs", 15)) return Intrinsic::spu_si_dfs; 3039 if (Len == 14 && !memcmp(Name, "llvm.spu.si.fa", 14)) return Intrinsic::spu_si_fa; 3040 if (Len == 16 && !memcmp(Name, "llvm.spu.si.fceq", 16)) return Intrinsic::spu_si_fceq; 3041 if (Len == 16 && !memcmp(Name, "llvm.spu.si.fcgt", 16)) return Intrinsic::spu_si_fcgt; 3042 if (Len == 17 && !memcmp(Name, "llvm.spu.si.fcmeq", 17)) return Intrinsic::spu_si_fcmeq; 3043 if (Len == 17 && !memcmp(Name, "llvm.spu.si.fcmgt", 17)) return Intrinsic::spu_si_fcmgt; 3044 if (Len == 14 && !memcmp(Name, "llvm.spu.si.fm", 14)) return Intrinsic::spu_si_fm; 3045 if (Len == 15 && !memcmp(Name, "llvm.spu.si.fma", 15)) return Intrinsic::spu_si_fma; 3046 if (Len == 15 && !memcmp(Name, "llvm.spu.si.fms", 15)) return Intrinsic::spu_si_fms; 3047 if (Len == 16 && !memcmp(Name, "llvm.spu.si.fnms", 16)) return Intrinsic::spu_si_fnms; 3048 if (Len == 14 && !memcmp(Name, "llvm.spu.si.fs", 14)) return Intrinsic::spu_si_fs; 3049 if (Len == 17 && !memcmp(Name, "llvm.spu.si.fsmbi", 17)) return Intrinsic::spu_si_fsmbi; 3050 if (Len == 15 && !memcmp(Name, "llvm.spu.si.mpy", 15)) return Intrinsic::spu_si_mpy; 3051 if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpya", 16)) return Intrinsic::spu_si_mpya; 3052 if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpyh", 16)) return Intrinsic::spu_si_mpyh; 3053 if (Len == 17 && !memcmp(Name, "llvm.spu.si.mpyhh", 17)) return Intrinsic::spu_si_mpyhh; 3054 if (Len == 18 && !memcmp(Name, "llvm.spu.si.mpyhha", 18)) return Intrinsic::spu_si_mpyhha; 3055 if (Len == 19 && !memcmp(Name, "llvm.spu.si.mpyhhau", 19)) return Intrinsic::spu_si_mpyhhau; 3056 if (Len == 18 && !memcmp(Name, "llvm.spu.si.mpyhhu", 18)) return Intrinsic::spu_si_mpyhhu; 3057 if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpyi", 16)) return Intrinsic::spu_si_mpyi; 3058 if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpys", 16)) return Intrinsic::spu_si_mpys; 3059 if (Len == 16 && !memcmp(Name, "llvm.spu.si.mpyu", 16)) return Intrinsic::spu_si_mpyu; 3060 if (Len == 17 && !memcmp(Name, "llvm.spu.si.mpyui", 17)) return Intrinsic::spu_si_mpyui; 3061 if (Len == 16 && !memcmp(Name, "llvm.spu.si.nand", 16)) return Intrinsic::spu_si_nand; 3062 if (Len == 15 && !memcmp(Name, "llvm.spu.si.nor", 15)) return Intrinsic::spu_si_nor; 3063 if (Len == 14 && !memcmp(Name, "llvm.spu.si.or", 14)) return Intrinsic::spu_si_or; 3064 if (Len == 16 && !memcmp(Name, "llvm.spu.si.orbi", 16)) return Intrinsic::spu_si_orbi; 3065 if (Len == 15 && !memcmp(Name, "llvm.spu.si.orc", 15)) return Intrinsic::spu_si_orc; 3066 if (Len == 16 && !memcmp(Name, "llvm.spu.si.orhi", 16)) return Intrinsic::spu_si_orhi; 3067 if (Len == 15 && !memcmp(Name, "llvm.spu.si.ori", 15)) return Intrinsic::spu_si_ori; 3068 if (Len == 14 && !memcmp(Name, "llvm.spu.si.sf", 14)) return Intrinsic::spu_si_sf; 3069 if (Len == 15 && !memcmp(Name, "llvm.spu.si.sfh", 15)) return Intrinsic::spu_si_sfh; 3070 if (Len == 16 && !memcmp(Name, "llvm.spu.si.sfhi", 16)) return Intrinsic::spu_si_sfhi; 3071 if (Len == 15 && !memcmp(Name, "llvm.spu.si.sfi", 15)) return Intrinsic::spu_si_sfi; 3072 if (Len == 15 && !memcmp(Name, "llvm.spu.si.sfx", 15)) return Intrinsic::spu_si_sfx; 3073 if (Len == 16 && !memcmp(Name, "llvm.spu.si.shli", 16)) return Intrinsic::spu_si_shli; 3074 if (Len == 18 && !memcmp(Name, "llvm.spu.si.shlqbi", 18)) return Intrinsic::spu_si_shlqbi; 3075 if (Len == 19 && !memcmp(Name, "llvm.spu.si.shlqbii", 19)) return Intrinsic::spu_si_shlqbii; 3076 if (Len == 18 && !memcmp(Name, "llvm.spu.si.shlqby", 18)) return Intrinsic::spu_si_shlqby; 3077 if (Len == 19 && !memcmp(Name, "llvm.spu.si.shlqbyi", 19)) return Intrinsic::spu_si_shlqbyi; 3078 if (Len == 15 && !memcmp(Name, "llvm.spu.si.xor", 15)) return Intrinsic::spu_si_xor; 3079 if (Len == 17 && !memcmp(Name, "llvm.spu.si.xorbi", 17)) return Intrinsic::spu_si_xorbi; 3080 if (Len == 17 && !memcmp(Name, "llvm.spu.si.xorhi", 17)) return Intrinsic::spu_si_xorhi; 3081 if (Len == 16 && !memcmp(Name, "llvm.spu.si.xori", 16)) return Intrinsic::spu_si_xori; 3082 if (Len > 9 && !memcmp(Name, "llvm.sqrt.", 10)) return Intrinsic::sqrt; 3083 if (Len > 23 && !memcmp(Name, "llvm.ssub.with.overflow.", 24)) return Intrinsic::ssub_with_overflow; 3084 if (Len == 19 && !memcmp(Name, "llvm.stackprotector", 19)) return Intrinsic::stackprotector; 3085 if (Len == 17 && !memcmp(Name, "llvm.stackrestore", 17)) return Intrinsic::stackrestore; 3086 if (Len == 14 && !memcmp(Name, "llvm.stacksave", 14)) return Intrinsic::stacksave; 3087 break; 3088 case 't': 3089 if (Len == 9 && !memcmp(Name, "llvm.trap", 9)) return Intrinsic::trap; 3090 break; 3091 case 'u': 3092 if (Len > 23 && !memcmp(Name, "llvm.uadd.with.overflow.", 24)) return Intrinsic::uadd_with_overflow; 3093 if (Len > 23 && !memcmp(Name, "llvm.umul.with.overflow.", 24)) return Intrinsic::umul_with_overflow; 3094 if (Len > 23 && !memcmp(Name, "llvm.usub.with.overflow.", 24)) return Intrinsic::usub_with_overflow; 3095 break; 3096 case 'v': 3097 if (Len == 12 && !memcmp(Name, "llvm.va_copy", 12)) return Intrinsic::vacopy; 3098 if (Len == 11 && !memcmp(Name, "llvm.va_end", 11)) return Intrinsic::vaend; 3099 if (Len == 13 && !memcmp(Name, "llvm.va_start", 13)) return Intrinsic::vastart; 3100 if (Len == 19 && !memcmp(Name, "llvm.var.annotation", 19)) return Intrinsic::var_annotation; 3101 break; 3102 case 'x': 3103 if (Len == 21 && !memcmp(Name, "llvm.x86.aesni.aesdec", 21)) return Intrinsic::x86_aesni_aesdec; 3104 if (Len == 25 && !memcmp(Name, "llvm.x86.aesni.aesdeclast", 25)) return Intrinsic::x86_aesni_aesdeclast; 3105 if (Len == 21 && !memcmp(Name, "llvm.x86.aesni.aesenc", 21)) return Intrinsic::x86_aesni_aesenc; 3106 if (Len == 25 && !memcmp(Name, "llvm.x86.aesni.aesenclast", 25)) return Intrinsic::x86_aesni_aesenclast; 3107 if (Len == 21 && !memcmp(Name, "llvm.x86.aesni.aesimc", 21)) return Intrinsic::x86_aesni_aesimc; 3108 if (Len == 30 && !memcmp(Name, "llvm.x86.aesni.aeskeygenassist", 30)) return Intrinsic::x86_aesni_aeskeygenassist; 3109 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.addsub.pd.256", 26)) return Intrinsic::x86_avx_addsub_pd_256; 3110 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.addsub.ps.256", 26)) return Intrinsic::x86_avx_addsub_ps_256; 3111 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.blend.pd.256", 25)) return Intrinsic::x86_avx_blend_pd_256; 3112 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.blend.ps.256", 25)) return Intrinsic::x86_avx_blend_ps_256; 3113 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.blendv.pd.256", 26)) return Intrinsic::x86_avx_blendv_pd_256; 3114 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.blendv.ps.256", 26)) return Intrinsic::x86_avx_blendv_ps_256; 3115 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.cmp.pd.256", 23)) return Intrinsic::x86_avx_cmp_pd_256; 3116 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.cmp.ps.256", 23)) return Intrinsic::x86_avx_cmp_ps_256; 3117 if (Len == 27 && !memcmp(Name, "llvm.x86.avx.cvt.pd2.ps.256", 27)) return Intrinsic::x86_avx_cvt_pd2_ps_256; 3118 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.cvt.pd2dq.256", 26)) return Intrinsic::x86_avx_cvt_pd2dq_256; 3119 if (Len == 27 && !memcmp(Name, "llvm.x86.avx.cvt.ps2.pd.256", 27)) return Intrinsic::x86_avx_cvt_ps2_pd_256; 3120 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.cvt.ps2dq.256", 26)) return Intrinsic::x86_avx_cvt_ps2dq_256; 3121 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.cvtdq2.pd.256", 26)) return Intrinsic::x86_avx_cvtdq2_pd_256; 3122 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.cvtdq2.ps.256", 26)) return Intrinsic::x86_avx_cvtdq2_ps_256; 3123 if (Len == 27 && !memcmp(Name, "llvm.x86.avx.cvtt.pd2dq.256", 27)) return Intrinsic::x86_avx_cvtt_pd2dq_256; 3124 if (Len == 27 && !memcmp(Name, "llvm.x86.avx.cvtt.ps2dq.256", 27)) return Intrinsic::x86_avx_cvtt_ps2dq_256; 3125 if (Len == 22 && !memcmp(Name, "llvm.x86.avx.dp.ps.256", 22)) return Intrinsic::x86_avx_dp_ps_256; 3126 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.hadd.pd.256", 24)) return Intrinsic::x86_avx_hadd_pd_256; 3127 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.hadd.ps.256", 24)) return Intrinsic::x86_avx_hadd_ps_256; 3128 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.hsub.pd.256", 24)) return Intrinsic::x86_avx_hsub_pd_256; 3129 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.hsub.ps.256", 24)) return Intrinsic::x86_avx_hsub_ps_256; 3130 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.ldu.dq.256", 23)) return Intrinsic::x86_avx_ldu_dq_256; 3131 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.loadu.dq.256", 25)) return Intrinsic::x86_avx_loadu_dq_256; 3132 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.loadu.pd.256", 25)) return Intrinsic::x86_avx_loadu_pd_256; 3133 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.loadu.ps.256", 25)) return Intrinsic::x86_avx_loadu_ps_256; 3134 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.maskload.pd", 24)) return Intrinsic::x86_avx_maskload_pd; 3135 if (Len == 28 && !memcmp(Name, "llvm.x86.avx.maskload.pd.256", 28)) return Intrinsic::x86_avx_maskload_pd_256; 3136 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.maskload.ps", 24)) return Intrinsic::x86_avx_maskload_ps; 3137 if (Len == 28 && !memcmp(Name, "llvm.x86.avx.maskload.ps.256", 28)) return Intrinsic::x86_avx_maskload_ps_256; 3138 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.maskstore.pd", 25)) return Intrinsic::x86_avx_maskstore_pd; 3139 if (Len == 29 && !memcmp(Name, "llvm.x86.avx.maskstore.pd.256", 29)) return Intrinsic::x86_avx_maskstore_pd_256; 3140 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.maskstore.ps", 25)) return Intrinsic::x86_avx_maskstore_ps; 3141 if (Len == 29 && !memcmp(Name, "llvm.x86.avx.maskstore.ps.256", 29)) return Intrinsic::x86_avx_maskstore_ps_256; 3142 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.max.pd.256", 23)) return Intrinsic::x86_avx_max_pd_256; 3143 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.max.ps.256", 23)) return Intrinsic::x86_avx_max_ps_256; 3144 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.min.pd.256", 23)) return Intrinsic::x86_avx_min_pd_256; 3145 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.min.ps.256", 23)) return Intrinsic::x86_avx_min_ps_256; 3146 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.movmsk.pd.256", 26)) return Intrinsic::x86_avx_movmsk_pd_256; 3147 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.movmsk.ps.256", 26)) return Intrinsic::x86_avx_movmsk_ps_256; 3148 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.movnt.dq.256", 25)) return Intrinsic::x86_avx_movnt_dq_256; 3149 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.movnt.pd.256", 25)) return Intrinsic::x86_avx_movnt_pd_256; 3150 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.movnt.ps.256", 25)) return Intrinsic::x86_avx_movnt_ps_256; 3151 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.ptestc.256", 23)) return Intrinsic::x86_avx_ptestc_256; 3152 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.ptestnzc.256", 25)) return Intrinsic::x86_avx_ptestnzc_256; 3153 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.ptestz.256", 23)) return Intrinsic::x86_avx_ptestz_256; 3154 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.rcp.ps.256", 23)) return Intrinsic::x86_avx_rcp_ps_256; 3155 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.round.pd.256", 25)) return Intrinsic::x86_avx_round_pd_256; 3156 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.round.ps.256", 25)) return Intrinsic::x86_avx_round_ps_256; 3157 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.rsqrt.ps.256", 25)) return Intrinsic::x86_avx_rsqrt_ps_256; 3158 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.sqrt.pd.256", 24)) return Intrinsic::x86_avx_sqrt_pd_256; 3159 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.sqrt.ps.256", 24)) return Intrinsic::x86_avx_sqrt_ps_256; 3160 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.storeu.dq.256", 26)) return Intrinsic::x86_avx_storeu_dq_256; 3161 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.storeu.pd.256", 26)) return Intrinsic::x86_avx_storeu_pd_256; 3162 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.storeu.ps.256", 26)) return Intrinsic::x86_avx_storeu_ps_256; 3163 if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vbroadcast.sd.256", 30)) return Intrinsic::x86_avx_vbroadcast_sd_256; 3164 if (Len == 34 && !memcmp(Name, "llvm.x86.avx.vbroadcastf128.pd.256", 34)) return Intrinsic::x86_avx_vbroadcastf128_pd_256; 3165 if (Len == 34 && !memcmp(Name, "llvm.x86.avx.vbroadcastf128.ps.256", 34)) return Intrinsic::x86_avx_vbroadcastf128_ps_256; 3166 if (Len == 25 && !memcmp(Name, "llvm.x86.avx.vbroadcastss", 25)) return Intrinsic::x86_avx_vbroadcastss; 3167 if (Len == 29 && !memcmp(Name, "llvm.x86.avx.vbroadcastss.256", 29)) return Intrinsic::x86_avx_vbroadcastss_256; 3168 if (Len == 32 && !memcmp(Name, "llvm.x86.avx.vextractf128.pd.256", 32)) return Intrinsic::x86_avx_vextractf128_pd_256; 3169 if (Len == 32 && !memcmp(Name, "llvm.x86.avx.vextractf128.ps.256", 32)) return Intrinsic::x86_avx_vextractf128_ps_256; 3170 if (Len == 32 && !memcmp(Name, "llvm.x86.avx.vextractf128.si.256", 32)) return Intrinsic::x86_avx_vextractf128_si_256; 3171 if (Len == 31 && !memcmp(Name, "llvm.x86.avx.vinsertf128.pd.256", 31)) return Intrinsic::x86_avx_vinsertf128_pd_256; 3172 if (Len == 31 && !memcmp(Name, "llvm.x86.avx.vinsertf128.ps.256", 31)) return Intrinsic::x86_avx_vinsertf128_ps_256; 3173 if (Len == 31 && !memcmp(Name, "llvm.x86.avx.vinsertf128.si.256", 31)) return Intrinsic::x86_avx_vinsertf128_si_256; 3174 if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vperm2f128.pd.256", 30)) return Intrinsic::x86_avx_vperm2f128_pd_256; 3175 if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vperm2f128.ps.256", 30)) return Intrinsic::x86_avx_vperm2f128_ps_256; 3176 if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vperm2f128.si.256", 30)) return Intrinsic::x86_avx_vperm2f128_si_256; 3177 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.vpermil.pd", 23)) return Intrinsic::x86_avx_vpermil_pd; 3178 if (Len == 27 && !memcmp(Name, "llvm.x86.avx.vpermil.pd.256", 27)) return Intrinsic::x86_avx_vpermil_pd_256; 3179 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.vpermil.ps", 23)) return Intrinsic::x86_avx_vpermil_ps; 3180 if (Len == 27 && !memcmp(Name, "llvm.x86.avx.vpermil.ps.256", 27)) return Intrinsic::x86_avx_vpermil_ps_256; 3181 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vpermilvar.pd", 26)) return Intrinsic::x86_avx_vpermilvar_pd; 3182 if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vpermilvar.pd.256", 30)) return Intrinsic::x86_avx_vpermilvar_pd_256; 3183 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vpermilvar.ps", 26)) return Intrinsic::x86_avx_vpermilvar_ps; 3184 if (Len == 30 && !memcmp(Name, "llvm.x86.avx.vpermilvar.ps.256", 30)) return Intrinsic::x86_avx_vpermilvar_ps_256; 3185 if (Len == 22 && !memcmp(Name, "llvm.x86.avx.vtestc.pd", 22)) return Intrinsic::x86_avx_vtestc_pd; 3186 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vtestc.pd.256", 26)) return Intrinsic::x86_avx_vtestc_pd_256; 3187 if (Len == 22 && !memcmp(Name, "llvm.x86.avx.vtestc.ps", 22)) return Intrinsic::x86_avx_vtestc_ps; 3188 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vtestc.ps.256", 26)) return Intrinsic::x86_avx_vtestc_ps_256; 3189 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.vtestnzc.pd", 24)) return Intrinsic::x86_avx_vtestnzc_pd; 3190 if (Len == 28 && !memcmp(Name, "llvm.x86.avx.vtestnzc.pd.256", 28)) return Intrinsic::x86_avx_vtestnzc_pd_256; 3191 if (Len == 24 && !memcmp(Name, "llvm.x86.avx.vtestnzc.ps", 24)) return Intrinsic::x86_avx_vtestnzc_ps; 3192 if (Len == 28 && !memcmp(Name, "llvm.x86.avx.vtestnzc.ps.256", 28)) return Intrinsic::x86_avx_vtestnzc_ps_256; 3193 if (Len == 22 && !memcmp(Name, "llvm.x86.avx.vtestz.pd", 22)) return Intrinsic::x86_avx_vtestz_pd; 3194 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vtestz.pd.256", 26)) return Intrinsic::x86_avx_vtestz_pd_256; 3195 if (Len == 22 && !memcmp(Name, "llvm.x86.avx.vtestz.ps", 22)) return Intrinsic::x86_avx_vtestz_ps; 3196 if (Len == 26 && !memcmp(Name, "llvm.x86.avx.vtestz.ps.256", 26)) return Intrinsic::x86_avx_vtestz_ps_256; 3197 if (Len == 21 && !memcmp(Name, "llvm.x86.avx.vzeroall", 21)) return Intrinsic::x86_avx_vzeroall; 3198 if (Len == 23 && !memcmp(Name, "llvm.x86.avx.vzeroupper", 23)) return Intrinsic::x86_avx_vzeroupper; 3199 if (Len == 12 && !memcmp(Name, "llvm.x86.int", 12)) return Intrinsic::x86_int; 3200 if (Len == 25 && !memcmp(Name, "llvm.x86.mmx.cvtsi32.si64", 25)) return Intrinsic::x86_mmx_cvtsi32_si64; 3201 if (Len == 25 && !memcmp(Name, "llvm.x86.mmx.cvtsi64.si32", 25)) return Intrinsic::x86_mmx_cvtsi64_si32; 3202 if (Len == 17 && !memcmp(Name, "llvm.x86.mmx.emms", 17)) return Intrinsic::x86_mmx_emms; 3203 if (Len == 18 && !memcmp(Name, "llvm.x86.mmx.femms", 18)) return Intrinsic::x86_mmx_femms; 3204 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.maskmovq", 21)) return Intrinsic::x86_mmx_maskmovq; 3205 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.movnt.dq", 21)) return Intrinsic::x86_mmx_movnt_dq; 3206 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.packssdw", 21)) return Intrinsic::x86_mmx_packssdw; 3207 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.packsswb", 21)) return Intrinsic::x86_mmx_packsswb; 3208 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.packuswb", 21)) return Intrinsic::x86_mmx_packuswb; 3209 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.padd.b", 19)) return Intrinsic::x86_mmx_padd_b; 3210 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.padd.d", 19)) return Intrinsic::x86_mmx_padd_d; 3211 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.padd.q", 19)) return Intrinsic::x86_mmx_padd_q; 3212 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.padd.w", 19)) return Intrinsic::x86_mmx_padd_w; 3213 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.padds.b", 20)) return Intrinsic::x86_mmx_padds_b; 3214 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.padds.w", 20)) return Intrinsic::x86_mmx_padds_w; 3215 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.paddus.b", 21)) return Intrinsic::x86_mmx_paddus_b; 3216 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.paddus.w", 21)) return Intrinsic::x86_mmx_paddus_w; 3217 if (Len == 17 && !memcmp(Name, "llvm.x86.mmx.pand", 17)) return Intrinsic::x86_mmx_pand; 3218 if (Len == 18 && !memcmp(Name, "llvm.x86.mmx.pandn", 18)) return Intrinsic::x86_mmx_pandn; 3219 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.pavg.b", 19)) return Intrinsic::x86_mmx_pavg_b; 3220 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.pavg.w", 19)) return Intrinsic::x86_mmx_pavg_w; 3221 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpeq.b", 21)) return Intrinsic::x86_mmx_pcmpeq_b; 3222 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpeq.d", 21)) return Intrinsic::x86_mmx_pcmpeq_d; 3223 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpeq.w", 21)) return Intrinsic::x86_mmx_pcmpeq_w; 3224 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpgt.b", 21)) return Intrinsic::x86_mmx_pcmpgt_b; 3225 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpgt.d", 21)) return Intrinsic::x86_mmx_pcmpgt_d; 3226 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pcmpgt.w", 21)) return Intrinsic::x86_mmx_pcmpgt_w; 3227 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pextr.w", 20)) return Intrinsic::x86_mmx_pextr_w; 3228 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pinsr.w", 20)) return Intrinsic::x86_mmx_pinsr_w; 3229 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmadd.wd", 21)) return Intrinsic::x86_mmx_pmadd_wd; 3230 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmaxs.w", 20)) return Intrinsic::x86_mmx_pmaxs_w; 3231 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmaxu.b", 20)) return Intrinsic::x86_mmx_pmaxu_b; 3232 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmins.w", 20)) return Intrinsic::x86_mmx_pmins_w; 3233 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pminu.b", 20)) return Intrinsic::x86_mmx_pminu_b; 3234 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmovmskb", 21)) return Intrinsic::x86_mmx_pmovmskb; 3235 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmulh.w", 20)) return Intrinsic::x86_mmx_pmulh_w; 3236 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmulhu.w", 21)) return Intrinsic::x86_mmx_pmulhu_w; 3237 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pmull.w", 20)) return Intrinsic::x86_mmx_pmull_w; 3238 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.pmulu.dq", 21)) return Intrinsic::x86_mmx_pmulu_dq; 3239 if (Len == 16 && !memcmp(Name, "llvm.x86.mmx.por", 16)) return Intrinsic::x86_mmx_por; 3240 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psad.bw", 20)) return Intrinsic::x86_mmx_psad_bw; 3241 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psll.d", 19)) return Intrinsic::x86_mmx_psll_d; 3242 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psll.q", 19)) return Intrinsic::x86_mmx_psll_q; 3243 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psll.w", 19)) return Intrinsic::x86_mmx_psll_w; 3244 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pslli.d", 20)) return Intrinsic::x86_mmx_pslli_d; 3245 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pslli.q", 20)) return Intrinsic::x86_mmx_pslli_q; 3246 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.pslli.w", 20)) return Intrinsic::x86_mmx_pslli_w; 3247 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psra.d", 19)) return Intrinsic::x86_mmx_psra_d; 3248 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psra.w", 19)) return Intrinsic::x86_mmx_psra_w; 3249 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrai.d", 20)) return Intrinsic::x86_mmx_psrai_d; 3250 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrai.w", 20)) return Intrinsic::x86_mmx_psrai_w; 3251 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psrl.d", 19)) return Intrinsic::x86_mmx_psrl_d; 3252 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psrl.q", 19)) return Intrinsic::x86_mmx_psrl_q; 3253 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psrl.w", 19)) return Intrinsic::x86_mmx_psrl_w; 3254 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrli.d", 20)) return Intrinsic::x86_mmx_psrli_d; 3255 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrli.q", 20)) return Intrinsic::x86_mmx_psrli_q; 3256 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psrli.w", 20)) return Intrinsic::x86_mmx_psrli_w; 3257 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psub.b", 19)) return Intrinsic::x86_mmx_psub_b; 3258 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psub.d", 19)) return Intrinsic::x86_mmx_psub_d; 3259 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psub.q", 19)) return Intrinsic::x86_mmx_psub_q; 3260 if (Len == 19 && !memcmp(Name, "llvm.x86.mmx.psub.w", 19)) return Intrinsic::x86_mmx_psub_w; 3261 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psubs.b", 20)) return Intrinsic::x86_mmx_psubs_b; 3262 if (Len == 20 && !memcmp(Name, "llvm.x86.mmx.psubs.w", 20)) return Intrinsic::x86_mmx_psubs_w; 3263 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.psubus.b", 21)) return Intrinsic::x86_mmx_psubus_b; 3264 if (Len == 21 && !memcmp(Name, "llvm.x86.mmx.psubus.w", 21)) return Intrinsic::x86_mmx_psubus_w; 3265 if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpckhbw", 22)) return Intrinsic::x86_mmx_punpckhbw; 3266 if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpckhdq", 22)) return Intrinsic::x86_mmx_punpckhdq; 3267 if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpckhwd", 22)) return Intrinsic::x86_mmx_punpckhwd; 3268 if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpcklbw", 22)) return Intrinsic::x86_mmx_punpcklbw; 3269 if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpckldq", 22)) return Intrinsic::x86_mmx_punpckldq; 3270 if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.punpcklwd", 22)) return Intrinsic::x86_mmx_punpcklwd; 3271 if (Len == 17 && !memcmp(Name, "llvm.x86.mmx.pxor", 17)) return Intrinsic::x86_mmx_pxor; 3272 if (Len == 22 && !memcmp(Name, "llvm.x86.mmx.vec.ext.d", 22)) return Intrinsic::x86_mmx_vec_ext_d; 3273 if (Len == 23 && !memcmp(Name, "llvm.x86.mmx.vec.init.b", 23)) return Intrinsic::x86_mmx_vec_init_b; 3274 if (Len == 23 && !memcmp(Name, "llvm.x86.mmx.vec.init.d", 23)) return Intrinsic::x86_mmx_vec_init_d; 3275 if (Len == 23 && !memcmp(Name, "llvm.x86.mmx.vec.init.w", 23)) return Intrinsic::x86_mmx_vec_init_w; 3276 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.add.ss", 19)) return Intrinsic::x86_sse_add_ss; 3277 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.cmp.ps", 19)) return Intrinsic::x86_sse_cmp_ps; 3278 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.cmp.ss", 19)) return Intrinsic::x86_sse_cmp_ss; 3279 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comieq.ss", 22)) return Intrinsic::x86_sse_comieq_ss; 3280 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comige.ss", 22)) return Intrinsic::x86_sse_comige_ss; 3281 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comigt.ss", 22)) return Intrinsic::x86_sse_comigt_ss; 3282 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comile.ss", 22)) return Intrinsic::x86_sse_comile_ss; 3283 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.comilt.ss", 22)) return Intrinsic::x86_sse_comilt_ss; 3284 if (Len == 23 && !memcmp(Name, "llvm.x86.sse.comineq.ss", 23)) return Intrinsic::x86_sse_comineq_ss; 3285 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtpd2pi", 21)) return Intrinsic::x86_sse_cvtpd2pi; 3286 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtpi2pd", 21)) return Intrinsic::x86_sse_cvtpi2pd; 3287 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtpi2ps", 21)) return Intrinsic::x86_sse_cvtpi2ps; 3288 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtps2pi", 21)) return Intrinsic::x86_sse_cvtps2pi; 3289 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtsi2ss", 21)) return Intrinsic::x86_sse_cvtsi2ss; 3290 if (Len == 23 && !memcmp(Name, "llvm.x86.sse.cvtsi642ss", 23)) return Intrinsic::x86_sse_cvtsi642ss; 3291 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.cvtss2si", 21)) return Intrinsic::x86_sse_cvtss2si; 3292 if (Len == 23 && !memcmp(Name, "llvm.x86.sse.cvtss2si64", 23)) return Intrinsic::x86_sse_cvtss2si64; 3293 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.cvttpd2pi", 22)) return Intrinsic::x86_sse_cvttpd2pi; 3294 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.cvttps2pi", 22)) return Intrinsic::x86_sse_cvttps2pi; 3295 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.cvttss2si", 22)) return Intrinsic::x86_sse_cvttss2si; 3296 if (Len == 24 && !memcmp(Name, "llvm.x86.sse.cvttss2si64", 24)) return Intrinsic::x86_sse_cvttss2si64; 3297 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.div.ss", 19)) return Intrinsic::x86_sse_div_ss; 3298 if (Len == 20 && !memcmp(Name, "llvm.x86.sse.ldmxcsr", 20)) return Intrinsic::x86_sse_ldmxcsr; 3299 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.loadu.ps", 21)) return Intrinsic::x86_sse_loadu_ps; 3300 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.max.ps", 19)) return Intrinsic::x86_sse_max_ps; 3301 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.max.ss", 19)) return Intrinsic::x86_sse_max_ss; 3302 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.min.ps", 19)) return Intrinsic::x86_sse_min_ps; 3303 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.min.ss", 19)) return Intrinsic::x86_sse_min_ss; 3304 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.movmsk.ps", 22)) return Intrinsic::x86_sse_movmsk_ps; 3305 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.movnt.ps", 21)) return Intrinsic::x86_sse_movnt_ps; 3306 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.mul.ss", 19)) return Intrinsic::x86_sse_mul_ss; 3307 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.rcp.ps", 19)) return Intrinsic::x86_sse_rcp_ps; 3308 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.rcp.ss", 19)) return Intrinsic::x86_sse_rcp_ss; 3309 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.rsqrt.ps", 21)) return Intrinsic::x86_sse_rsqrt_ps; 3310 if (Len == 21 && !memcmp(Name, "llvm.x86.sse.rsqrt.ss", 21)) return Intrinsic::x86_sse_rsqrt_ss; 3311 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.sfence", 19)) return Intrinsic::x86_sse_sfence; 3312 if (Len == 20 && !memcmp(Name, "llvm.x86.sse.sqrt.ps", 20)) return Intrinsic::x86_sse_sqrt_ps; 3313 if (Len == 20 && !memcmp(Name, "llvm.x86.sse.sqrt.ss", 20)) return Intrinsic::x86_sse_sqrt_ss; 3314 if (Len == 20 && !memcmp(Name, "llvm.x86.sse.stmxcsr", 20)) return Intrinsic::x86_sse_stmxcsr; 3315 if (Len == 22 && !memcmp(Name, "llvm.x86.sse.storeu.ps", 22)) return Intrinsic::x86_sse_storeu_ps; 3316 if (Len == 19 && !memcmp(Name, "llvm.x86.sse.sub.ss", 19)) return Intrinsic::x86_sse_sub_ss; 3317 if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomieq.ss", 23)) return Intrinsic::x86_sse_ucomieq_ss; 3318 if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomige.ss", 23)) return Intrinsic::x86_sse_ucomige_ss; 3319 if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomigt.ss", 23)) return Intrinsic::x86_sse_ucomigt_ss; 3320 if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomile.ss", 23)) return Intrinsic::x86_sse_ucomile_ss; 3321 if (Len == 23 && !memcmp(Name, "llvm.x86.sse.ucomilt.ss", 23)) return Intrinsic::x86_sse_ucomilt_ss; 3322 if (Len == 24 && !memcmp(Name, "llvm.x86.sse.ucomineq.ss", 24)) return Intrinsic::x86_sse_ucomineq_ss; 3323 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.add.sd", 20)) return Intrinsic::x86_sse2_add_sd; 3324 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.clflush", 21)) return Intrinsic::x86_sse2_clflush; 3325 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.cmp.pd", 20)) return Intrinsic::x86_sse2_cmp_pd; 3326 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.cmp.sd", 20)) return Intrinsic::x86_sse2_cmp_sd; 3327 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comieq.sd", 23)) return Intrinsic::x86_sse2_comieq_sd; 3328 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comige.sd", 23)) return Intrinsic::x86_sse2_comige_sd; 3329 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comigt.sd", 23)) return Intrinsic::x86_sse2_comigt_sd; 3330 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comile.sd", 23)) return Intrinsic::x86_sse2_comile_sd; 3331 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.comilt.sd", 23)) return Intrinsic::x86_sse2_comilt_sd; 3332 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.comineq.sd", 24)) return Intrinsic::x86_sse2_comineq_sd; 3333 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtdq2pd", 22)) return Intrinsic::x86_sse2_cvtdq2pd; 3334 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtdq2ps", 22)) return Intrinsic::x86_sse2_cvtdq2ps; 3335 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtpd2dq", 22)) return Intrinsic::x86_sse2_cvtpd2dq; 3336 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtpd2ps", 22)) return Intrinsic::x86_sse2_cvtpd2ps; 3337 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtps2dq", 22)) return Intrinsic::x86_sse2_cvtps2dq; 3338 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtps2pd", 22)) return Intrinsic::x86_sse2_cvtps2pd; 3339 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtsd2si", 22)) return Intrinsic::x86_sse2_cvtsd2si; 3340 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.cvtsd2si64", 24)) return Intrinsic::x86_sse2_cvtsd2si64; 3341 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtsd2ss", 22)) return Intrinsic::x86_sse2_cvtsd2ss; 3342 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtsi2sd", 22)) return Intrinsic::x86_sse2_cvtsi2sd; 3343 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.cvtsi642sd", 24)) return Intrinsic::x86_sse2_cvtsi642sd; 3344 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.cvtss2sd", 22)) return Intrinsic::x86_sse2_cvtss2sd; 3345 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.cvttpd2dq", 23)) return Intrinsic::x86_sse2_cvttpd2dq; 3346 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.cvttps2dq", 23)) return Intrinsic::x86_sse2_cvttps2dq; 3347 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.cvttsd2si", 23)) return Intrinsic::x86_sse2_cvttsd2si; 3348 if (Len == 25 && !memcmp(Name, "llvm.x86.sse2.cvttsd2si64", 25)) return Intrinsic::x86_sse2_cvttsd2si64; 3349 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.div.sd", 20)) return Intrinsic::x86_sse2_div_sd; 3350 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.lfence", 20)) return Intrinsic::x86_sse2_lfence; 3351 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.loadu.dq", 22)) return Intrinsic::x86_sse2_loadu_dq; 3352 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.loadu.pd", 22)) return Intrinsic::x86_sse2_loadu_pd; 3353 if (Len == 25 && !memcmp(Name, "llvm.x86.sse2.maskmov.dqu", 25)) return Intrinsic::x86_sse2_maskmov_dqu; 3354 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.max.pd", 20)) return Intrinsic::x86_sse2_max_pd; 3355 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.max.sd", 20)) return Intrinsic::x86_sse2_max_sd; 3356 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.mfence", 20)) return Intrinsic::x86_sse2_mfence; 3357 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.min.pd", 20)) return Intrinsic::x86_sse2_min_pd; 3358 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.min.sd", 20)) return Intrinsic::x86_sse2_min_sd; 3359 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.movmsk.pd", 23)) return Intrinsic::x86_sse2_movmsk_pd; 3360 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.movnt.dq", 22)) return Intrinsic::x86_sse2_movnt_dq; 3361 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.movnt.i", 21)) return Intrinsic::x86_sse2_movnt_i; 3362 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.movnt.pd", 22)) return Intrinsic::x86_sse2_movnt_pd; 3363 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.mul.sd", 20)) return Intrinsic::x86_sse2_mul_sd; 3364 if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.packssdw.128", 26)) return Intrinsic::x86_sse2_packssdw_128; 3365 if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.packsswb.128", 26)) return Intrinsic::x86_sse2_packsswb_128; 3366 if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.packuswb.128", 26)) return Intrinsic::x86_sse2_packuswb_128; 3367 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.padds.b", 21)) return Intrinsic::x86_sse2_padds_b; 3368 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.padds.w", 21)) return Intrinsic::x86_sse2_padds_w; 3369 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.paddus.b", 22)) return Intrinsic::x86_sse2_paddus_b; 3370 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.paddus.w", 22)) return Intrinsic::x86_sse2_paddus_w; 3371 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.pavg.b", 20)) return Intrinsic::x86_sse2_pavg_b; 3372 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.pavg.w", 20)) return Intrinsic::x86_sse2_pavg_w; 3373 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpeq.b", 22)) return Intrinsic::x86_sse2_pcmpeq_b; 3374 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpeq.d", 22)) return Intrinsic::x86_sse2_pcmpeq_d; 3375 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpeq.w", 22)) return Intrinsic::x86_sse2_pcmpeq_w; 3376 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpgt.b", 22)) return Intrinsic::x86_sse2_pcmpgt_b; 3377 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpgt.d", 22)) return Intrinsic::x86_sse2_pcmpgt_d; 3378 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pcmpgt.w", 22)) return Intrinsic::x86_sse2_pcmpgt_w; 3379 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pmadd.wd", 22)) return Intrinsic::x86_sse2_pmadd_wd; 3380 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmaxs.w", 21)) return Intrinsic::x86_sse2_pmaxs_w; 3381 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmaxu.b", 21)) return Intrinsic::x86_sse2_pmaxu_b; 3382 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmins.w", 21)) return Intrinsic::x86_sse2_pmins_w; 3383 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pminu.b", 21)) return Intrinsic::x86_sse2_pminu_b; 3384 if (Len == 26 && !memcmp(Name, "llvm.x86.sse2.pmovmskb.128", 26)) return Intrinsic::x86_sse2_pmovmskb_128; 3385 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pmulh.w", 21)) return Intrinsic::x86_sse2_pmulh_w; 3386 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pmulhu.w", 22)) return Intrinsic::x86_sse2_pmulhu_w; 3387 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.pmulu.dq", 22)) return Intrinsic::x86_sse2_pmulu_dq; 3388 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psad.bw", 21)) return Intrinsic::x86_sse2_psad_bw; 3389 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psll.d", 20)) return Intrinsic::x86_sse2_psll_d; 3390 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psll.dq", 21)) return Intrinsic::x86_sse2_psll_dq; 3391 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.psll.dq.bs", 24)) return Intrinsic::x86_sse2_psll_dq_bs; 3392 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psll.q", 20)) return Intrinsic::x86_sse2_psll_q; 3393 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psll.w", 20)) return Intrinsic::x86_sse2_psll_w; 3394 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pslli.d", 21)) return Intrinsic::x86_sse2_pslli_d; 3395 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pslli.q", 21)) return Intrinsic::x86_sse2_pslli_q; 3396 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.pslli.w", 21)) return Intrinsic::x86_sse2_pslli_w; 3397 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psra.d", 20)) return Intrinsic::x86_sse2_psra_d; 3398 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psra.w", 20)) return Intrinsic::x86_sse2_psra_w; 3399 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrai.d", 21)) return Intrinsic::x86_sse2_psrai_d; 3400 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrai.w", 21)) return Intrinsic::x86_sse2_psrai_w; 3401 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psrl.d", 20)) return Intrinsic::x86_sse2_psrl_d; 3402 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrl.dq", 21)) return Intrinsic::x86_sse2_psrl_dq; 3403 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.psrl.dq.bs", 24)) return Intrinsic::x86_sse2_psrl_dq_bs; 3404 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psrl.q", 20)) return Intrinsic::x86_sse2_psrl_q; 3405 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.psrl.w", 20)) return Intrinsic::x86_sse2_psrl_w; 3406 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrli.d", 21)) return Intrinsic::x86_sse2_psrli_d; 3407 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrli.q", 21)) return Intrinsic::x86_sse2_psrli_q; 3408 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psrli.w", 21)) return Intrinsic::x86_sse2_psrli_w; 3409 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psubs.b", 21)) return Intrinsic::x86_sse2_psubs_b; 3410 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.psubs.w", 21)) return Intrinsic::x86_sse2_psubs_w; 3411 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.psubus.b", 22)) return Intrinsic::x86_sse2_psubus_b; 3412 if (Len == 22 && !memcmp(Name, "llvm.x86.sse2.psubus.w", 22)) return Intrinsic::x86_sse2_psubus_w; 3413 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.sqrt.pd", 21)) return Intrinsic::x86_sse2_sqrt_pd; 3414 if (Len == 21 && !memcmp(Name, "llvm.x86.sse2.sqrt.sd", 21)) return Intrinsic::x86_sse2_sqrt_sd; 3415 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.storel.dq", 23)) return Intrinsic::x86_sse2_storel_dq; 3416 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.storeu.dq", 23)) return Intrinsic::x86_sse2_storeu_dq; 3417 if (Len == 23 && !memcmp(Name, "llvm.x86.sse2.storeu.pd", 23)) return Intrinsic::x86_sse2_storeu_pd; 3418 if (Len == 20 && !memcmp(Name, "llvm.x86.sse2.sub.sd", 20)) return Intrinsic::x86_sse2_sub_sd; 3419 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomieq.sd", 24)) return Intrinsic::x86_sse2_ucomieq_sd; 3420 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomige.sd", 24)) return Intrinsic::x86_sse2_ucomige_sd; 3421 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomigt.sd", 24)) return Intrinsic::x86_sse2_ucomigt_sd; 3422 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomile.sd", 24)) return Intrinsic::x86_sse2_ucomile_sd; 3423 if (Len == 24 && !memcmp(Name, "llvm.x86.sse2.ucomilt.sd", 24)) return Intrinsic::x86_sse2_ucomilt_sd; 3424 if (Len == 25 && !memcmp(Name, "llvm.x86.sse2.ucomineq.sd", 25)) return Intrinsic::x86_sse2_ucomineq_sd; 3425 if (Len == 23 && !memcmp(Name, "llvm.x86.sse3.addsub.pd", 23)) return Intrinsic::x86_sse3_addsub_pd; 3426 if (Len == 23 && !memcmp(Name, "llvm.x86.sse3.addsub.ps", 23)) return Intrinsic::x86_sse3_addsub_ps; 3427 if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hadd.pd", 21)) return Intrinsic::x86_sse3_hadd_pd; 3428 if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hadd.ps", 21)) return Intrinsic::x86_sse3_hadd_ps; 3429 if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hsub.pd", 21)) return Intrinsic::x86_sse3_hsub_pd; 3430 if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.hsub.ps", 21)) return Intrinsic::x86_sse3_hsub_ps; 3431 if (Len == 20 && !memcmp(Name, "llvm.x86.sse3.ldu.dq", 20)) return Intrinsic::x86_sse3_ldu_dq; 3432 if (Len == 21 && !memcmp(Name, "llvm.x86.sse3.monitor", 21)) return Intrinsic::x86_sse3_monitor; 3433 if (Len == 19 && !memcmp(Name, "llvm.x86.sse3.mwait", 19)) return Intrinsic::x86_sse3_mwait; 3434 if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.blendpd", 22)) return Intrinsic::x86_sse41_blendpd; 3435 if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.blendps", 22)) return Intrinsic::x86_sse41_blendps; 3436 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.blendvpd", 23)) return Intrinsic::x86_sse41_blendvpd; 3437 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.blendvps", 23)) return Intrinsic::x86_sse41_blendvps; 3438 if (Len == 19 && !memcmp(Name, "llvm.x86.sse41.dppd", 19)) return Intrinsic::x86_sse41_dppd; 3439 if (Len == 19 && !memcmp(Name, "llvm.x86.sse41.dpps", 19)) return Intrinsic::x86_sse41_dpps; 3440 if (Len == 24 && !memcmp(Name, "llvm.x86.sse41.extractps", 24)) return Intrinsic::x86_sse41_extractps; 3441 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.insertps", 23)) return Intrinsic::x86_sse41_insertps; 3442 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.movntdqa", 23)) return Intrinsic::x86_sse41_movntdqa; 3443 if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.mpsadbw", 22)) return Intrinsic::x86_sse41_mpsadbw; 3444 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.packusdw", 23)) return Intrinsic::x86_sse41_packusdw; 3445 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pblendvb", 23)) return Intrinsic::x86_sse41_pblendvb; 3446 if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.pblendw", 22)) return Intrinsic::x86_sse41_pblendw; 3447 if (Len == 22 && !memcmp(Name, "llvm.x86.sse41.pcmpeqq", 22)) return Intrinsic::x86_sse41_pcmpeqq; 3448 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pextrb", 21)) return Intrinsic::x86_sse41_pextrb; 3449 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pextrd", 21)) return Intrinsic::x86_sse41_pextrd; 3450 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pextrq", 21)) return Intrinsic::x86_sse41_pextrq; 3451 if (Len == 25 && !memcmp(Name, "llvm.x86.sse41.phminposuw", 25)) return Intrinsic::x86_sse41_phminposuw; 3452 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxsb", 21)) return Intrinsic::x86_sse41_pmaxsb; 3453 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxsd", 21)) return Intrinsic::x86_sse41_pmaxsd; 3454 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxud", 21)) return Intrinsic::x86_sse41_pmaxud; 3455 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmaxuw", 21)) return Intrinsic::x86_sse41_pmaxuw; 3456 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminsb", 21)) return Intrinsic::x86_sse41_pminsb; 3457 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminsd", 21)) return Intrinsic::x86_sse41_pminsd; 3458 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminud", 21)) return Intrinsic::x86_sse41_pminud; 3459 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pminuw", 21)) return Intrinsic::x86_sse41_pminuw; 3460 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxbd", 23)) return Intrinsic::x86_sse41_pmovsxbd; 3461 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxbq", 23)) return Intrinsic::x86_sse41_pmovsxbq; 3462 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxbw", 23)) return Intrinsic::x86_sse41_pmovsxbw; 3463 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxdq", 23)) return Intrinsic::x86_sse41_pmovsxdq; 3464 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxwd", 23)) return Intrinsic::x86_sse41_pmovsxwd; 3465 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovsxwq", 23)) return Intrinsic::x86_sse41_pmovsxwq; 3466 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxbd", 23)) return Intrinsic::x86_sse41_pmovzxbd; 3467 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxbq", 23)) return Intrinsic::x86_sse41_pmovzxbq; 3468 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxbw", 23)) return Intrinsic::x86_sse41_pmovzxbw; 3469 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxdq", 23)) return Intrinsic::x86_sse41_pmovzxdq; 3470 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxwd", 23)) return Intrinsic::x86_sse41_pmovzxwd; 3471 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.pmovzxwq", 23)) return Intrinsic::x86_sse41_pmovzxwq; 3472 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.pmuldq", 21)) return Intrinsic::x86_sse41_pmuldq; 3473 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.ptestc", 21)) return Intrinsic::x86_sse41_ptestc; 3474 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.ptestnzc", 23)) return Intrinsic::x86_sse41_ptestnzc; 3475 if (Len == 21 && !memcmp(Name, "llvm.x86.sse41.ptestz", 21)) return Intrinsic::x86_sse41_ptestz; 3476 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.pd", 23)) return Intrinsic::x86_sse41_round_pd; 3477 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.ps", 23)) return Intrinsic::x86_sse41_round_ps; 3478 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.sd", 23)) return Intrinsic::x86_sse41_round_sd; 3479 if (Len == 23 && !memcmp(Name, "llvm.x86.sse41.round.ss", 23)) return Intrinsic::x86_sse41_round_ss; 3480 if (Len == 23 && !memcmp(Name, "llvm.x86.sse42.crc32.16", 23)) return Intrinsic::x86_sse42_crc32_16; 3481 if (Len == 23 && !memcmp(Name, "llvm.x86.sse42.crc32.32", 23)) return Intrinsic::x86_sse42_crc32_32; 3482 if (Len == 22 && !memcmp(Name, "llvm.x86.sse42.crc32.8", 22)) return Intrinsic::x86_sse42_crc32_8; 3483 if (Len == 23 && !memcmp(Name, "llvm.x86.sse42.crc64.64", 23)) return Intrinsic::x86_sse42_crc64_64; 3484 if (Len == 22 && !memcmp(Name, "llvm.x86.sse42.crc64.8", 22)) return Intrinsic::x86_sse42_crc64_8; 3485 if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpestri128", 27)) return Intrinsic::x86_sse42_pcmpestri128; 3486 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestria128", 28)) return Intrinsic::x86_sse42_pcmpestria128; 3487 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestric128", 28)) return Intrinsic::x86_sse42_pcmpestric128; 3488 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestrio128", 28)) return Intrinsic::x86_sse42_pcmpestrio128; 3489 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestris128", 28)) return Intrinsic::x86_sse42_pcmpestris128; 3490 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpestriz128", 28)) return Intrinsic::x86_sse42_pcmpestriz128; 3491 if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpestrm128", 27)) return Intrinsic::x86_sse42_pcmpestrm128; 3492 if (Len == 22 && !memcmp(Name, "llvm.x86.sse42.pcmpgtq", 22)) return Intrinsic::x86_sse42_pcmpgtq; 3493 if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpistri128", 27)) return Intrinsic::x86_sse42_pcmpistri128; 3494 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistria128", 28)) return Intrinsic::x86_sse42_pcmpistria128; 3495 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistric128", 28)) return Intrinsic::x86_sse42_pcmpistric128; 3496 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistrio128", 28)) return Intrinsic::x86_sse42_pcmpistrio128; 3497 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistris128", 28)) return Intrinsic::x86_sse42_pcmpistris128; 3498 if (Len == 28 && !memcmp(Name, "llvm.x86.sse42.pcmpistriz128", 28)) return Intrinsic::x86_sse42_pcmpistriz128; 3499 if (Len == 27 && !memcmp(Name, "llvm.x86.sse42.pcmpistrm128", 27)) return Intrinsic::x86_sse42_pcmpistrm128; 3500 if (Len == 21 && !memcmp(Name, "llvm.x86.ssse3.pabs.b", 21)) return Intrinsic::x86_ssse3_pabs_b; 3501 if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pabs.b.128", 25)) return Intrinsic::x86_ssse3_pabs_b_128; 3502 if (Len == 21 && !memcmp(Name, "llvm.x86.ssse3.pabs.d", 21)) return Intrinsic::x86_ssse3_pabs_d; 3503 if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pabs.d.128", 25)) return Intrinsic::x86_ssse3_pabs_d_128; 3504 if (Len == 21 && !memcmp(Name, "llvm.x86.ssse3.pabs.w", 21)) return Intrinsic::x86_ssse3_pabs_w; 3505 if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pabs.w.128", 25)) return Intrinsic::x86_ssse3_pabs_w_128; 3506 if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phadd.d", 22)) return Intrinsic::x86_ssse3_phadd_d; 3507 if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phadd.d.128", 26)) return Intrinsic::x86_ssse3_phadd_d_128; 3508 if (Len == 23 && !memcmp(Name, "llvm.x86.ssse3.phadd.sw", 23)) return Intrinsic::x86_ssse3_phadd_sw; 3509 if (Len == 27 && !memcmp(Name, "llvm.x86.ssse3.phadd.sw.128", 27)) return Intrinsic::x86_ssse3_phadd_sw_128; 3510 if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phadd.w", 22)) return Intrinsic::x86_ssse3_phadd_w; 3511 if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phadd.w.128", 26)) return Intrinsic::x86_ssse3_phadd_w_128; 3512 if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phsub.d", 22)) return Intrinsic::x86_ssse3_phsub_d; 3513 if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phsub.d.128", 26)) return Intrinsic::x86_ssse3_phsub_d_128; 3514 if (Len == 23 && !memcmp(Name, "llvm.x86.ssse3.phsub.sw", 23)) return Intrinsic::x86_ssse3_phsub_sw; 3515 if (Len == 27 && !memcmp(Name, "llvm.x86.ssse3.phsub.sw.128", 27)) return Intrinsic::x86_ssse3_phsub_sw_128; 3516 if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.phsub.w", 22)) return Intrinsic::x86_ssse3_phsub_w; 3517 if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.phsub.w.128", 26)) return Intrinsic::x86_ssse3_phsub_w_128; 3518 if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.pmadd.ub.sw", 26)) return Intrinsic::x86_ssse3_pmadd_ub_sw; 3519 if (Len == 30 && !memcmp(Name, "llvm.x86.ssse3.pmadd.ub.sw.128", 30)) return Intrinsic::x86_ssse3_pmadd_ub_sw_128; 3520 if (Len == 25 && !memcmp(Name, "llvm.x86.ssse3.pmul.hr.sw", 25)) return Intrinsic::x86_ssse3_pmul_hr_sw; 3521 if (Len == 29 && !memcmp(Name, "llvm.x86.ssse3.pmul.hr.sw.128", 29)) return Intrinsic::x86_ssse3_pmul_hr_sw_128; 3522 if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.pshuf.b", 22)) return Intrinsic::x86_ssse3_pshuf_b; 3523 if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.pshuf.b.128", 26)) return Intrinsic::x86_ssse3_pshuf_b_128; 3524 if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.pshuf.w", 22)) return Intrinsic::x86_ssse3_pshuf_w; 3525 if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.psign.b", 22)) return Intrinsic::x86_ssse3_psign_b; 3526 if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.psign.b.128", 26)) return Intrinsic::x86_ssse3_psign_b_128; 3527 if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.psign.d", 22)) return Intrinsic::x86_ssse3_psign_d; 3528 if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.psign.d.128", 26)) return Intrinsic::x86_ssse3_psign_d_128; 3529 if (Len == 22 && !memcmp(Name, "llvm.x86.ssse3.psign.w", 22)) return Intrinsic::x86_ssse3_psign_w; 3530 if (Len == 26 && !memcmp(Name, "llvm.x86.ssse3.psign.w.128", 26)) return Intrinsic::x86_ssse3_psign_w_128; 3531 if (Len == 17 && !memcmp(Name, "llvm.xcore.bitrev", 17)) return Intrinsic::xcore_bitrev; 3532 if (Len == 16 && !memcmp(Name, "llvm.xcore.getid", 16)) return Intrinsic::xcore_getid; 3533 } 3534#endif 3535 3536// Verifier::visitIntrinsicFunctionCall code. 3537#ifdef GET_INTRINSIC_VERIFIER 3538 switch (ID) { 3539 default: assert(0 && "Invalid intrinsic!"); 3540 case Intrinsic::eh_unwind_init: // llvm.eh.unwind.init 3541 case Intrinsic::ppc_altivec_dssall: // llvm.ppc.altivec.dssall 3542 case Intrinsic::ppc_sync: // llvm.ppc.sync 3543 case Intrinsic::trap: // llvm.trap 3544 case Intrinsic::x86_avx_vzeroall: // llvm.x86.avx.vzeroall 3545 case Intrinsic::x86_avx_vzeroupper: // llvm.x86.avx.vzeroupper 3546 case Intrinsic::x86_mmx_emms: // llvm.x86.mmx.emms 3547 case Intrinsic::x86_mmx_femms: // llvm.x86.mmx.femms 3548 case Intrinsic::x86_sse2_lfence: // llvm.x86.sse2.lfence 3549 case Intrinsic::x86_sse2_mfence: // llvm.x86.sse2.mfence 3550 case Intrinsic::x86_sse_sfence: // llvm.x86.sse.sfence 3551 VerifyIntrinsicPrototype(ID, IF, 0, 0); 3552 break; 3553 case Intrinsic::memcpy: // llvm.memcpy 3554 case Intrinsic::memmove: // llvm.memmove 3555 VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTRAny, MVT::iPTRAny, MVT::iAny, MVT::i32, MVT::i1); 3556 break; 3557 case Intrinsic::memset: // llvm.memset 3558 VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTRAny, MVT::i8, MVT::iAny, MVT::i32, MVT::i1); 3559 break; 3560 case Intrinsic::invariant_end: // llvm.invariant.end 3561 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::i64, MVT::iPTR); 3562 break; 3563 case Intrinsic::memory_barrier: // llvm.memory.barrier 3564 VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::i1, MVT::i1, MVT::i1, MVT::i1, MVT::i1); 3565 break; 3566 case Intrinsic::arm_set_fpscr: // llvm.arm.set.fpscr 3567 case Intrinsic::eh_sjlj_callsite: // llvm.eh.sjlj.callsite 3568 case Intrinsic::pcmarker: // llvm.pcmarker 3569 case Intrinsic::ppc_altivec_dss: // llvm.ppc.altivec.dss 3570 VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::i32); 3571 break; 3572 case Intrinsic::x86_sse3_mwait: // llvm.x86.sse3.mwait 3573 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::i32, MVT::i32); 3574 break; 3575 case Intrinsic::eh_return_i32: // llvm.eh.return.i32 3576 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::i32, MVT::iPTR); 3577 break; 3578 case Intrinsic::eh_return_i64: // llvm.eh.return.i64 3579 case Intrinsic::lifetime_end: // llvm.lifetime.end 3580 case Intrinsic::lifetime_start: // llvm.lifetime.start 3581 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::i64, MVT::iPTR); 3582 break; 3583 case Intrinsic::x86_int: // llvm.x86.int 3584 VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::i8); 3585 break; 3586 case Intrinsic::dbg_value: // llvm.dbg.value 3587 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::Metadata, MVT::i64, MVT::Metadata); 3588 break; 3589 case Intrinsic::dbg_declare: // llvm.dbg.declare 3590 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::Metadata, MVT::Metadata); 3591 break; 3592 case Intrinsic::eh_sjlj_longjmp: // llvm.eh.sjlj.longjmp 3593 case Intrinsic::ppc_dcba: // llvm.ppc.dcba 3594 case Intrinsic::ppc_dcbf: // llvm.ppc.dcbf 3595 case Intrinsic::ppc_dcbi: // llvm.ppc.dcbi 3596 case Intrinsic::ppc_dcbst: // llvm.ppc.dcbst 3597 case Intrinsic::ppc_dcbt: // llvm.ppc.dcbt 3598 case Intrinsic::ppc_dcbtst: // llvm.ppc.dcbtst 3599 case Intrinsic::ppc_dcbz: // llvm.ppc.dcbz 3600 case Intrinsic::ppc_dcbzl: // llvm.ppc.dcbzl 3601 case Intrinsic::stackrestore: // llvm.stackrestore 3602 case Intrinsic::vaend: // llvm.va_end 3603 case Intrinsic::vastart: // llvm.va_start 3604 case Intrinsic::x86_sse2_clflush: // llvm.x86.sse2.clflush 3605 case Intrinsic::x86_sse_ldmxcsr: // llvm.x86.sse.ldmxcsr 3606 case Intrinsic::x86_sse_stmxcsr: // llvm.x86.sse.stmxcsr 3607 VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::iPTR); 3608 break; 3609 case Intrinsic::arm_neon_vst2: // llvm.arm.neon.vst2 3610 VerifyIntrinsicPrototype(ID, IF, 0, 4, MVT::iPTR, MVT::vAny, ~1, MVT::i32); 3611 break; 3612 case Intrinsic::arm_neon_vst3: // llvm.arm.neon.vst3 3613 VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTR, MVT::vAny, ~1, ~1, MVT::i32); 3614 break; 3615 case Intrinsic::arm_neon_vst4: // llvm.arm.neon.vst4 3616 VerifyIntrinsicPrototype(ID, IF, 0, 6, MVT::iPTR, MVT::vAny, ~1, ~1, ~1, MVT::i32); 3617 break; 3618 case Intrinsic::arm_neon_vst2lane: // llvm.arm.neon.vst2lane 3619 VerifyIntrinsicPrototype(ID, IF, 0, 5, MVT::iPTR, MVT::vAny, ~1, MVT::i32, MVT::i32); 3620 break; 3621 case Intrinsic::arm_neon_vst3lane: // llvm.arm.neon.vst3lane 3622 VerifyIntrinsicPrototype(ID, IF, 0, 6, MVT::iPTR, MVT::vAny, ~1, ~1, MVT::i32, MVT::i32); 3623 break; 3624 case Intrinsic::arm_neon_vst4lane: // llvm.arm.neon.vst4lane 3625 VerifyIntrinsicPrototype(ID, IF, 0, 7, MVT::iPTR, MVT::vAny, ~1, ~1, ~1, MVT::i32, MVT::i32); 3626 break; 3627 case Intrinsic::arm_neon_vst1: // llvm.arm.neon.vst1 3628 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::vAny, MVT::i32); 3629 break; 3630 case Intrinsic::longjmp: // llvm.longjmp 3631 case Intrinsic::siglongjmp: // llvm.siglongjmp 3632 case Intrinsic::x86_sse2_movnt_i: // llvm.x86.sse2.movnt.i 3633 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::i32); 3634 break; 3635 case Intrinsic::ppc_altivec_dst: // llvm.ppc.altivec.dst 3636 case Intrinsic::ppc_altivec_dstst: // llvm.ppc.altivec.dstst 3637 case Intrinsic::ppc_altivec_dststt: // llvm.ppc.altivec.dststt 3638 case Intrinsic::ppc_altivec_dstt: // llvm.ppc.altivec.dstt 3639 case Intrinsic::prefetch: // llvm.prefetch 3640 case Intrinsic::x86_sse3_monitor: // llvm.x86.sse3.monitor 3641 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::i32, MVT::i32); 3642 break; 3643 case Intrinsic::vacopy: // llvm.va_copy 3644 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::iPTR); 3645 break; 3646 case Intrinsic::var_annotation: // llvm.var.annotation 3647 VerifyIntrinsicPrototype(ID, IF, 0, 4, MVT::iPTR, MVT::iPTR, MVT::iPTR, MVT::i32); 3648 break; 3649 case Intrinsic::gcwrite: // llvm.gcwrite 3650 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::iPTR, MVT::iPTR); 3651 break; 3652 case Intrinsic::stackprotector: // llvm.stackprotector 3653 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::iPTR); 3654 break; 3655 case Intrinsic::x86_sse2_storeu_dq: // llvm.x86.sse2.storeu.dq 3656 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v16i8); 3657 break; 3658 case Intrinsic::x86_mmx_movnt_dq: // llvm.x86.mmx.movnt.dq 3659 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v1i64); 3660 break; 3661 case Intrinsic::x86_sse2_movnt_pd: // llvm.x86.sse2.movnt.pd 3662 case Intrinsic::x86_sse2_storeu_pd: // llvm.x86.sse2.storeu.pd 3663 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v2f64); 3664 break; 3665 case Intrinsic::x86_avx_maskstore_pd: // llvm.x86.avx.maskstore.pd 3666 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v2f64, MVT::v2f64); 3667 break; 3668 case Intrinsic::x86_sse2_movnt_dq: // llvm.x86.sse2.movnt.dq 3669 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v2i64); 3670 break; 3671 case Intrinsic::x86_avx_storeu_dq_256: // llvm.x86.avx.storeu.dq.256 3672 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v32i8); 3673 break; 3674 case Intrinsic::x86_sse_movnt_ps: // llvm.x86.sse.movnt.ps 3675 case Intrinsic::x86_sse_storeu_ps: // llvm.x86.sse.storeu.ps 3676 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4f32); 3677 break; 3678 case Intrinsic::x86_avx_maskstore_ps: // llvm.x86.avx.maskstore.ps 3679 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v4f32, MVT::v4f32); 3680 break; 3681 case Intrinsic::x86_avx_movnt_pd_256: // llvm.x86.avx.movnt.pd.256 3682 case Intrinsic::x86_avx_storeu_pd_256: // llvm.x86.avx.storeu.pd.256 3683 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4f64); 3684 break; 3685 case Intrinsic::x86_avx_maskstore_pd_256: // llvm.x86.avx.maskstore.pd.256 3686 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v4f64, MVT::v4f64); 3687 break; 3688 case Intrinsic::x86_sse2_storel_dq: // llvm.x86.sse2.storel.dq 3689 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4i32); 3690 break; 3691 case Intrinsic::x86_avx_movnt_dq_256: // llvm.x86.avx.movnt.dq.256 3692 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v4i64); 3693 break; 3694 case Intrinsic::x86_avx_movnt_ps_256: // llvm.x86.avx.movnt.ps.256 3695 case Intrinsic::x86_avx_storeu_ps_256: // llvm.x86.avx.storeu.ps.256 3696 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::v8f32); 3697 break; 3698 case Intrinsic::x86_avx_maskstore_ps_256: // llvm.x86.avx.maskstore.ps.256 3699 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::iPTR, MVT::v8f32, MVT::v8f32); 3700 break; 3701 case Intrinsic::gcroot: // llvm.gcroot 3702 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::iPTR, MVT::iPTR); 3703 break; 3704 case Intrinsic::ppc_altivec_stvebx: // llvm.ppc.altivec.stvebx 3705 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::v16i8, MVT::iPTR); 3706 break; 3707 case Intrinsic::x86_sse2_maskmov_dqu: // llvm.x86.sse2.maskmov.dqu 3708 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::v16i8, MVT::v16i8, MVT::iPTR); 3709 break; 3710 case Intrinsic::ppc_altivec_mtvscr: // llvm.ppc.altivec.mtvscr 3711 VerifyIntrinsicPrototype(ID, IF, 0, 1, MVT::v4i32); 3712 break; 3713 case Intrinsic::ppc_altivec_stvewx: // llvm.ppc.altivec.stvewx 3714 case Intrinsic::ppc_altivec_stvx: // llvm.ppc.altivec.stvx 3715 case Intrinsic::ppc_altivec_stvxl: // llvm.ppc.altivec.stvxl 3716 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::v4i32, MVT::iPTR); 3717 break; 3718 case Intrinsic::ppc_altivec_stvehx: // llvm.ppc.altivec.stvehx 3719 VerifyIntrinsicPrototype(ID, IF, 0, 2, MVT::v8i16, MVT::iPTR); 3720 break; 3721 case Intrinsic::x86_mmx_maskmovq: // llvm.x86.mmx.maskmovq 3722 VerifyIntrinsicPrototype(ID, IF, 0, 3, MVT::v8i8, MVT::v8i8, MVT::iPTR); 3723 break; 3724 case Intrinsic::ptr_annotation: // llvm.ptr.annotation 3725 VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::iPTRAny, ~0, MVT::iPTR, MVT::iPTR, MVT::i32); 3726 break; 3727 case Intrinsic::sin: // llvm.sin 3728 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0); 3729 break; 3730 case Intrinsic::cos: // llvm.cos 3731 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0); 3732 break; 3733 case Intrinsic::pow: // llvm.pow 3734 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, ~0, ~0); 3735 break; 3736 case Intrinsic::log: // llvm.log 3737 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0); 3738 break; 3739 case Intrinsic::log10: // llvm.log10 3740 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0); 3741 break; 3742 case Intrinsic::log2: // llvm.log2 3743 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0); 3744 break; 3745 case Intrinsic::exp: // llvm.exp 3746 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0); 3747 break; 3748 case Intrinsic::exp2: // llvm.exp2 3749 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0); 3750 break; 3751 case Intrinsic::sqrt: // llvm.sqrt 3752 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::fAny, ~0); 3753 break; 3754 case Intrinsic::powi: // llvm.powi 3755 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, ~0, MVT::i32); 3756 break; 3757 case Intrinsic::convertff: // llvm.convertff 3758 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::fAny, MVT::fAny, MVT::i32, MVT::i32); 3759 break; 3760 case Intrinsic::arm_neon_vcvtfxs2fp: // llvm.arm.neon.vcvtfxs2fp 3761 case Intrinsic::arm_neon_vcvtfxu2fp: // llvm.arm.neon.vcvtfxu2fp 3762 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::fAny, MVT::iAny, MVT::i32); 3763 break; 3764 case Intrinsic::convertfsi: // llvm.convertfsi 3765 case Intrinsic::convertfui: // llvm.convertfui 3766 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::fAny, MVT::iAny, MVT::i32, MVT::i32); 3767 break; 3768 case Intrinsic::bswap: // llvm.bswap 3769 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0); 3770 break; 3771 case Intrinsic::ctpop: // llvm.ctpop 3772 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0); 3773 break; 3774 case Intrinsic::ctlz: // llvm.ctlz 3775 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0); 3776 break; 3777 case Intrinsic::cttz: // llvm.cttz 3778 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iAny, ~0); 3779 break; 3780 case Intrinsic::annotation: // llvm.annotation 3781 VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::iAny, ~0, MVT::iPTR, MVT::iPTR, MVT::i32); 3782 break; 3783 case Intrinsic::atomic_cmp_swap: // llvm.atomic.cmp.swap 3784 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::iPTRAny, ~0, ~0); 3785 break; 3786 case Intrinsic::atomic_load_add: // llvm.atomic.load.add 3787 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3788 break; 3789 case Intrinsic::atomic_swap: // llvm.atomic.swap 3790 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3791 break; 3792 case Intrinsic::atomic_load_sub: // llvm.atomic.load.sub 3793 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3794 break; 3795 case Intrinsic::atomic_load_and: // llvm.atomic.load.and 3796 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3797 break; 3798 case Intrinsic::atomic_load_or: // llvm.atomic.load.or 3799 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3800 break; 3801 case Intrinsic::atomic_load_xor: // llvm.atomic.load.xor 3802 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3803 break; 3804 case Intrinsic::atomic_load_nand: // llvm.atomic.load.nand 3805 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3806 break; 3807 case Intrinsic::atomic_load_min: // llvm.atomic.load.min 3808 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3809 break; 3810 case Intrinsic::atomic_load_max: // llvm.atomic.load.max 3811 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3812 break; 3813 case Intrinsic::atomic_load_umin: // llvm.atomic.load.umin 3814 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3815 break; 3816 case Intrinsic::atomic_load_umax: // llvm.atomic.load.umax 3817 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTRAny, ~0); 3818 break; 3819 case Intrinsic::arm_neon_vcvtfp2fxs: // llvm.arm.neon.vcvtfp2fxs 3820 case Intrinsic::arm_neon_vcvtfp2fxu: // llvm.arm.neon.vcvtfp2fxu 3821 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::fAny, MVT::i32); 3822 break; 3823 case Intrinsic::convertsif: // llvm.convertsif 3824 case Intrinsic::convertuif: // llvm.convertuif 3825 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::fAny, MVT::i32, MVT::i32); 3826 break; 3827 case Intrinsic::convertss: // llvm.convertss 3828 case Intrinsic::convertsu: // llvm.convertsu 3829 case Intrinsic::convertus: // llvm.convertus 3830 case Intrinsic::convertuu: // llvm.convertuu 3831 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iAny, MVT::iAny, MVT::i32, MVT::i32); 3832 break; 3833 case Intrinsic::objectsize: // llvm.objectsize 3834 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iAny, MVT::iPTR, MVT::i1); 3835 break; 3836 case Intrinsic::sadd_with_overflow: // llvm.sadd.with.overflow 3837 VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0); 3838 break; 3839 case Intrinsic::uadd_with_overflow: // llvm.uadd.with.overflow 3840 VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0); 3841 break; 3842 case Intrinsic::ssub_with_overflow: // llvm.ssub.with.overflow 3843 VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0); 3844 break; 3845 case Intrinsic::usub_with_overflow: // llvm.usub.with.overflow 3846 VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0); 3847 break; 3848 case Intrinsic::smul_with_overflow: // llvm.smul.with.overflow 3849 VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0); 3850 break; 3851 case Intrinsic::umul_with_overflow: // llvm.umul.with.overflow 3852 VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::iAny, MVT::i1, ~0, ~0); 3853 break; 3854 case Intrinsic::arm_neon_vqdmlal: // llvm.arm.neon.vqdmlal 3855 case Intrinsic::arm_neon_vqdmlsl: // llvm.arm.neon.vqdmlsl 3856 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::vAny, ~0, ~(TruncatedElementVectorType | 0), ~(TruncatedElementVectorType | 0)); 3857 break; 3858 case Intrinsic::arm_neon_vpadals: // llvm.arm.neon.vpadals 3859 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, MVT::vAny); 3860 break; 3861 case Intrinsic::arm_neon_vpadalu: // llvm.arm.neon.vpadalu 3862 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, MVT::vAny); 3863 break; 3864 case Intrinsic::arm_neon_vabs: // llvm.arm.neon.vabs 3865 case Intrinsic::arm_neon_vcls: // llvm.arm.neon.vcls 3866 case Intrinsic::arm_neon_vclz: // llvm.arm.neon.vclz 3867 case Intrinsic::arm_neon_vcnt: // llvm.arm.neon.vcnt 3868 case Intrinsic::arm_neon_vqabs: // llvm.arm.neon.vqabs 3869 case Intrinsic::arm_neon_vqneg: // llvm.arm.neon.vqneg 3870 case Intrinsic::arm_neon_vrecpe: // llvm.arm.neon.vrecpe 3871 case Intrinsic::arm_neon_vrsqrte: // llvm.arm.neon.vrsqrte 3872 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, ~0); 3873 break; 3874 case Intrinsic::arm_neon_vqmovns: // llvm.arm.neon.vqmovns 3875 case Intrinsic::arm_neon_vqmovnsu: // llvm.arm.neon.vqmovnsu 3876 case Intrinsic::arm_neon_vqmovnu: // llvm.arm.neon.vqmovnu 3877 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, ~(ExtendedElementVectorType | 0)); 3878 break; 3879 case Intrinsic::arm_neon_vabds: // llvm.arm.neon.vabds 3880 case Intrinsic::arm_neon_vabdu: // llvm.arm.neon.vabdu 3881 case Intrinsic::arm_neon_vhadds: // llvm.arm.neon.vhadds 3882 case Intrinsic::arm_neon_vhaddu: // llvm.arm.neon.vhaddu 3883 case Intrinsic::arm_neon_vhsubs: // llvm.arm.neon.vhsubs 3884 case Intrinsic::arm_neon_vhsubu: // llvm.arm.neon.vhsubu 3885 case Intrinsic::arm_neon_vmaxs: // llvm.arm.neon.vmaxs 3886 case Intrinsic::arm_neon_vmaxu: // llvm.arm.neon.vmaxu 3887 case Intrinsic::arm_neon_vmins: // llvm.arm.neon.vmins 3888 case Intrinsic::arm_neon_vminu: // llvm.arm.neon.vminu 3889 case Intrinsic::arm_neon_vmulp: // llvm.arm.neon.vmulp 3890 case Intrinsic::arm_neon_vpadd: // llvm.arm.neon.vpadd 3891 case Intrinsic::arm_neon_vpmaxs: // llvm.arm.neon.vpmaxs 3892 case Intrinsic::arm_neon_vpmaxu: // llvm.arm.neon.vpmaxu 3893 case Intrinsic::arm_neon_vpmins: // llvm.arm.neon.vpmins 3894 case Intrinsic::arm_neon_vpminu: // llvm.arm.neon.vpminu 3895 case Intrinsic::arm_neon_vqadds: // llvm.arm.neon.vqadds 3896 case Intrinsic::arm_neon_vqaddu: // llvm.arm.neon.vqaddu 3897 case Intrinsic::arm_neon_vqdmulh: // llvm.arm.neon.vqdmulh 3898 case Intrinsic::arm_neon_vqrdmulh: // llvm.arm.neon.vqrdmulh 3899 case Intrinsic::arm_neon_vqrshifts: // llvm.arm.neon.vqrshifts 3900 case Intrinsic::arm_neon_vqrshiftu: // llvm.arm.neon.vqrshiftu 3901 case Intrinsic::arm_neon_vqshifts: // llvm.arm.neon.vqshifts 3902 case Intrinsic::arm_neon_vqshiftsu: // llvm.arm.neon.vqshiftsu 3903 case Intrinsic::arm_neon_vqshiftu: // llvm.arm.neon.vqshiftu 3904 case Intrinsic::arm_neon_vqsubs: // llvm.arm.neon.vqsubs 3905 case Intrinsic::arm_neon_vqsubu: // llvm.arm.neon.vqsubu 3906 case Intrinsic::arm_neon_vrecps: // llvm.arm.neon.vrecps 3907 case Intrinsic::arm_neon_vrhadds: // llvm.arm.neon.vrhadds 3908 case Intrinsic::arm_neon_vrhaddu: // llvm.arm.neon.vrhaddu 3909 case Intrinsic::arm_neon_vrshifts: // llvm.arm.neon.vrshifts 3910 case Intrinsic::arm_neon_vrshiftu: // llvm.arm.neon.vrshiftu 3911 case Intrinsic::arm_neon_vrsqrts: // llvm.arm.neon.vrsqrts 3912 case Intrinsic::arm_neon_vshifts: // llvm.arm.neon.vshifts 3913 case Intrinsic::arm_neon_vshiftu: // llvm.arm.neon.vshiftu 3914 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~0, ~0); 3915 break; 3916 case Intrinsic::arm_neon_vaddhn: // llvm.arm.neon.vaddhn 3917 case Intrinsic::arm_neon_vqrshiftns: // llvm.arm.neon.vqrshiftns 3918 case Intrinsic::arm_neon_vqrshiftnsu: // llvm.arm.neon.vqrshiftnsu 3919 case Intrinsic::arm_neon_vqrshiftnu: // llvm.arm.neon.vqrshiftnu 3920 case Intrinsic::arm_neon_vqshiftns: // llvm.arm.neon.vqshiftns 3921 case Intrinsic::arm_neon_vqshiftnsu: // llvm.arm.neon.vqshiftnsu 3922 case Intrinsic::arm_neon_vqshiftnu: // llvm.arm.neon.vqshiftnu 3923 case Intrinsic::arm_neon_vraddhn: // llvm.arm.neon.vraddhn 3924 case Intrinsic::arm_neon_vrshiftn: // llvm.arm.neon.vrshiftn 3925 case Intrinsic::arm_neon_vrsubhn: // llvm.arm.neon.vrsubhn 3926 case Intrinsic::arm_neon_vshiftn: // llvm.arm.neon.vshiftn 3927 case Intrinsic::arm_neon_vsubhn: // llvm.arm.neon.vsubhn 3928 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~(ExtendedElementVectorType | 0), ~(ExtendedElementVectorType | 0)); 3929 break; 3930 case Intrinsic::arm_neon_vmullp: // llvm.arm.neon.vmullp 3931 case Intrinsic::arm_neon_vqdmull: // llvm.arm.neon.vqdmull 3932 case Intrinsic::arm_neon_vshiftls: // llvm.arm.neon.vshiftls 3933 case Intrinsic::arm_neon_vshiftlu: // llvm.arm.neon.vshiftlu 3934 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, ~(TruncatedElementVectorType | 0), ~(TruncatedElementVectorType | 0)); 3935 break; 3936 case Intrinsic::arm_neon_vshiftins: // llvm.arm.neon.vshiftins 3937 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::vAny, ~0, ~0, ~0); 3938 break; 3939 case Intrinsic::arm_neon_vpaddls: // llvm.arm.neon.vpaddls 3940 case Intrinsic::arm_neon_vpaddlu: // llvm.arm.neon.vpaddlu 3941 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::vAny, MVT::vAny); 3942 break; 3943 case Intrinsic::arm_neon_vld1: // llvm.arm.neon.vld1 3944 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::vAny, MVT::iPTR, MVT::i32); 3945 break; 3946 case Intrinsic::arm_neon_vld2: // llvm.arm.neon.vld2 3947 VerifyIntrinsicPrototype(ID, IF, 2, 2, MVT::vAny, ~0, MVT::iPTR, MVT::i32); 3948 break; 3949 case Intrinsic::arm_neon_vld3: // llvm.arm.neon.vld3 3950 VerifyIntrinsicPrototype(ID, IF, 3, 2, MVT::vAny, ~0, ~0, MVT::iPTR, MVT::i32); 3951 break; 3952 case Intrinsic::arm_neon_vld4: // llvm.arm.neon.vld4 3953 VerifyIntrinsicPrototype(ID, IF, 4, 2, MVT::vAny, ~0, ~0, ~0, MVT::iPTR, MVT::i32); 3954 break; 3955 case Intrinsic::arm_neon_vld2lane: // llvm.arm.neon.vld2lane 3956 VerifyIntrinsicPrototype(ID, IF, 2, 5, MVT::vAny, ~0, MVT::iPTR, ~0, ~0, MVT::i32, MVT::i32); 3957 break; 3958 case Intrinsic::arm_neon_vld3lane: // llvm.arm.neon.vld3lane 3959 VerifyIntrinsicPrototype(ID, IF, 3, 6, MVT::vAny, ~0, ~0, MVT::iPTR, ~0, ~0, ~0, MVT::i32, MVT::i32); 3960 break; 3961 case Intrinsic::arm_neon_vld4lane: // llvm.arm.neon.vld4lane 3962 VerifyIntrinsicPrototype(ID, IF, 4, 7, MVT::vAny, ~0, ~0, ~0, MVT::iPTR, ~0, ~0, ~0, ~0, MVT::i32, MVT::i32); 3963 break; 3964 case Intrinsic::invariant_start: // llvm.invariant.start 3965 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iPTR, MVT::i64, MVT::iPTR); 3966 break; 3967 case Intrinsic::arm_vcvtr: // llvm.arm.vcvtr 3968 case Intrinsic::arm_vcvtru: // llvm.arm.vcvtru 3969 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::f32, MVT::fAny); 3970 break; 3971 case Intrinsic::convert_from_fp16: // llvm.convert.from.fp16 3972 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::f32, MVT::i16); 3973 break; 3974 case Intrinsic::convert_to_fp16: // llvm.convert.to.fp16 3975 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i16, MVT::f32); 3976 break; 3977 case Intrinsic::arm_get_fpscr: // llvm.arm.get.fpscr 3978 case Intrinsic::flt_rounds: // llvm.flt.rounds 3979 case Intrinsic::xcore_getid: // llvm.xcore.getid 3980 VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::i32); 3981 break; 3982 case Intrinsic::xcore_bitrev: // llvm.xcore.bitrev 3983 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::i32); 3984 break; 3985 case Intrinsic::x86_sse42_crc32_16: // llvm.x86.sse42.crc32.16 3986 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i16); 3987 break; 3988 case Intrinsic::arm_qadd: // llvm.arm.qadd 3989 case Intrinsic::arm_qsub: // llvm.arm.qsub 3990 case Intrinsic::arm_ssat: // llvm.arm.ssat 3991 case Intrinsic::arm_usat: // llvm.arm.usat 3992 case Intrinsic::x86_sse42_crc32_32: // llvm.x86.sse42.crc32.32 3993 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i32); 3994 break; 3995 case Intrinsic::x86_sse42_crc32_8: // llvm.x86.sse42.crc32.8 3996 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::i32, MVT::i8); 3997 break; 3998 case Intrinsic::ppc_altivec_vcmpequb_p: // llvm.ppc.altivec.vcmpequb.p 3999 case Intrinsic::ppc_altivec_vcmpgtsb_p: // llvm.ppc.altivec.vcmpgtsb.p 4000 case Intrinsic::ppc_altivec_vcmpgtub_p: // llvm.ppc.altivec.vcmpgtub.p 4001 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v16i8, MVT::v16i8); 4002 break; 4003 case Intrinsic::ppc_altivec_vcmpbfp_p: // llvm.ppc.altivec.vcmpbfp.p 4004 case Intrinsic::ppc_altivec_vcmpeqfp_p: // llvm.ppc.altivec.vcmpeqfp.p 4005 case Intrinsic::ppc_altivec_vcmpgefp_p: // llvm.ppc.altivec.vcmpgefp.p 4006 case Intrinsic::ppc_altivec_vcmpgtfp_p: // llvm.ppc.altivec.vcmpgtfp.p 4007 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v4f32, MVT::v4f32); 4008 break; 4009 case Intrinsic::ppc_altivec_vcmpequw_p: // llvm.ppc.altivec.vcmpequw.p 4010 case Intrinsic::ppc_altivec_vcmpgtsw_p: // llvm.ppc.altivec.vcmpgtsw.p 4011 case Intrinsic::ppc_altivec_vcmpgtuw_p: // llvm.ppc.altivec.vcmpgtuw.p 4012 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v4i32, MVT::v4i32); 4013 break; 4014 case Intrinsic::ppc_altivec_vcmpequh_p: // llvm.ppc.altivec.vcmpequh.p 4015 case Intrinsic::ppc_altivec_vcmpgtsh_p: // llvm.ppc.altivec.vcmpgtsh.p 4016 case Intrinsic::ppc_altivec_vcmpgtuh_p: // llvm.ppc.altivec.vcmpgtuh.p 4017 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::i32, MVT::v8i16, MVT::v8i16); 4018 break; 4019 case Intrinsic::eh_sjlj_setjmp: // llvm.eh.sjlj.setjmp 4020 case Intrinsic::eh_typeid_for: // llvm.eh.typeid.for 4021 case Intrinsic::setjmp: // llvm.setjmp 4022 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::iPTR); 4023 break; 4024 case Intrinsic::sigsetjmp: // llvm.sigsetjmp 4025 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::iPTR, MVT::i32); 4026 break; 4027 case Intrinsic::eh_selector: // llvm.eh.selector 4028 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::iPTR, MVT::iPTR, MVT::isVoid); 4029 break; 4030 case Intrinsic::x86_sse2_pmovmskb_128: // llvm.x86.sse2.pmovmskb.128 4031 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v16i8); 4032 break; 4033 case Intrinsic::x86_sse41_pextrb: // llvm.x86.sse41.pextrb 4034 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v16i8, MVT::i32); 4035 break; 4036 case Intrinsic::x86_sse42_pcmpestri128: // llvm.x86.sse42.pcmpestri128 4037 case Intrinsic::x86_sse42_pcmpestria128: // llvm.x86.sse42.pcmpestria128 4038 case Intrinsic::x86_sse42_pcmpestric128: // llvm.x86.sse42.pcmpestric128 4039 case Intrinsic::x86_sse42_pcmpestrio128: // llvm.x86.sse42.pcmpestrio128 4040 case Intrinsic::x86_sse42_pcmpestris128: // llvm.x86.sse42.pcmpestris128 4041 case Intrinsic::x86_sse42_pcmpestriz128: // llvm.x86.sse42.pcmpestriz128 4042 VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::i32, MVT::v16i8, MVT::i32, MVT::v16i8, MVT::i32, MVT::i8); 4043 break; 4044 case Intrinsic::x86_sse42_pcmpistri128: // llvm.x86.sse42.pcmpistri128 4045 case Intrinsic::x86_sse42_pcmpistria128: // llvm.x86.sse42.pcmpistria128 4046 case Intrinsic::x86_sse42_pcmpistric128: // llvm.x86.sse42.pcmpistric128 4047 case Intrinsic::x86_sse42_pcmpistrio128: // llvm.x86.sse42.pcmpistrio128 4048 case Intrinsic::x86_sse42_pcmpistris128: // llvm.x86.sse42.pcmpistris128 4049 case Intrinsic::x86_sse42_pcmpistriz128: // llvm.x86.sse42.pcmpistriz128 4050 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::i32, MVT::v16i8, MVT::v16i8, MVT::i8); 4051 break; 4052 case Intrinsic::x86_mmx_cvtsi64_si32: // llvm.x86.mmx.cvtsi64.si32 4053 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v1i64); 4054 break; 4055 case Intrinsic::x86_mmx_pextr_w: // llvm.x86.mmx.pextr.w 4056 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v1i64, MVT::i32); 4057 break; 4058 case Intrinsic::x86_sse2_cvtsd2si: // llvm.x86.sse2.cvtsd2si 4059 case Intrinsic::x86_sse2_cvttsd2si: // llvm.x86.sse2.cvttsd2si 4060 case Intrinsic::x86_sse2_movmsk_pd: // llvm.x86.sse2.movmsk.pd 4061 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v2f64); 4062 break; 4063 case Intrinsic::x86_avx_vtestc_pd: // llvm.x86.avx.vtestc.pd 4064 case Intrinsic::x86_avx_vtestnzc_pd: // llvm.x86.avx.vtestnzc.pd 4065 case Intrinsic::x86_avx_vtestz_pd: // llvm.x86.avx.vtestz.pd 4066 case Intrinsic::x86_sse2_comieq_sd: // llvm.x86.sse2.comieq.sd 4067 case Intrinsic::x86_sse2_comige_sd: // llvm.x86.sse2.comige.sd 4068 case Intrinsic::x86_sse2_comigt_sd: // llvm.x86.sse2.comigt.sd 4069 case Intrinsic::x86_sse2_comile_sd: // llvm.x86.sse2.comile.sd 4070 case Intrinsic::x86_sse2_comilt_sd: // llvm.x86.sse2.comilt.sd 4071 case Intrinsic::x86_sse2_comineq_sd: // llvm.x86.sse2.comineq.sd 4072 case Intrinsic::x86_sse2_ucomieq_sd: // llvm.x86.sse2.ucomieq.sd 4073 case Intrinsic::x86_sse2_ucomige_sd: // llvm.x86.sse2.ucomige.sd 4074 case Intrinsic::x86_sse2_ucomigt_sd: // llvm.x86.sse2.ucomigt.sd 4075 case Intrinsic::x86_sse2_ucomile_sd: // llvm.x86.sse2.ucomile.sd 4076 case Intrinsic::x86_sse2_ucomilt_sd: // llvm.x86.sse2.ucomilt.sd 4077 case Intrinsic::x86_sse2_ucomineq_sd: // llvm.x86.sse2.ucomineq.sd 4078 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v2f64, MVT::v2f64); 4079 break; 4080 case Intrinsic::x86_sse_cvtss2si: // llvm.x86.sse.cvtss2si 4081 case Intrinsic::x86_sse_cvttss2si: // llvm.x86.sse.cvttss2si 4082 case Intrinsic::x86_sse_movmsk_ps: // llvm.x86.sse.movmsk.ps 4083 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v4f32); 4084 break; 4085 case Intrinsic::x86_sse41_extractps: // llvm.x86.sse41.extractps 4086 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f32, MVT::i32); 4087 break; 4088 case Intrinsic::x86_avx_vtestc_ps: // llvm.x86.avx.vtestc.ps 4089 case Intrinsic::x86_avx_vtestnzc_ps: // llvm.x86.avx.vtestnzc.ps 4090 case Intrinsic::x86_avx_vtestz_ps: // llvm.x86.avx.vtestz.ps 4091 case Intrinsic::x86_sse41_ptestc: // llvm.x86.sse41.ptestc 4092 case Intrinsic::x86_sse41_ptestnzc: // llvm.x86.sse41.ptestnzc 4093 case Intrinsic::x86_sse41_ptestz: // llvm.x86.sse41.ptestz 4094 case Intrinsic::x86_sse_comieq_ss: // llvm.x86.sse.comieq.ss 4095 case Intrinsic::x86_sse_comige_ss: // llvm.x86.sse.comige.ss 4096 case Intrinsic::x86_sse_comigt_ss: // llvm.x86.sse.comigt.ss 4097 case Intrinsic::x86_sse_comile_ss: // llvm.x86.sse.comile.ss 4098 case Intrinsic::x86_sse_comilt_ss: // llvm.x86.sse.comilt.ss 4099 case Intrinsic::x86_sse_comineq_ss: // llvm.x86.sse.comineq.ss 4100 case Intrinsic::x86_sse_ucomieq_ss: // llvm.x86.sse.ucomieq.ss 4101 case Intrinsic::x86_sse_ucomige_ss: // llvm.x86.sse.ucomige.ss 4102 case Intrinsic::x86_sse_ucomigt_ss: // llvm.x86.sse.ucomigt.ss 4103 case Intrinsic::x86_sse_ucomile_ss: // llvm.x86.sse.ucomile.ss 4104 case Intrinsic::x86_sse_ucomilt_ss: // llvm.x86.sse.ucomilt.ss 4105 case Intrinsic::x86_sse_ucomineq_ss: // llvm.x86.sse.ucomineq.ss 4106 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f32, MVT::v4f32); 4107 break; 4108 case Intrinsic::x86_avx_movmsk_pd_256: // llvm.x86.avx.movmsk.pd.256 4109 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v4f64); 4110 break; 4111 case Intrinsic::x86_avx_vtestc_pd_256: // llvm.x86.avx.vtestc.pd.256 4112 case Intrinsic::x86_avx_vtestnzc_pd_256: // llvm.x86.avx.vtestnzc.pd.256 4113 case Intrinsic::x86_avx_vtestz_pd_256: // llvm.x86.avx.vtestz.pd.256 4114 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4f64, MVT::v4f64); 4115 break; 4116 case Intrinsic::x86_sse41_pextrd: // llvm.x86.sse41.pextrd 4117 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4i32, MVT::i32); 4118 break; 4119 case Intrinsic::x86_avx_ptestc_256: // llvm.x86.avx.ptestc.256 4120 case Intrinsic::x86_avx_ptestnzc_256: // llvm.x86.avx.ptestnzc.256 4121 case Intrinsic::x86_avx_ptestz_256: // llvm.x86.avx.ptestz.256 4122 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v4i64, MVT::v4i64); 4123 break; 4124 case Intrinsic::x86_avx_movmsk_ps_256: // llvm.x86.avx.movmsk.ps.256 4125 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v8f32); 4126 break; 4127 case Intrinsic::x86_avx_vtestc_ps_256: // llvm.x86.avx.vtestc.ps.256 4128 case Intrinsic::x86_avx_vtestnzc_ps_256: // llvm.x86.avx.vtestnzc.ps.256 4129 case Intrinsic::x86_avx_vtestz_ps_256: // llvm.x86.avx.vtestz.ps.256 4130 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i32, MVT::v8f32, MVT::v8f32); 4131 break; 4132 case Intrinsic::x86_mmx_pmovmskb: // llvm.x86.mmx.pmovmskb 4133 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i32, MVT::v8i8); 4134 break; 4135 case Intrinsic::readcyclecounter: // llvm.readcyclecounter 4136 VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::i64); 4137 break; 4138 case Intrinsic::alpha_umulh: // llvm.alpha.umulh 4139 case Intrinsic::x86_sse42_crc64_64: // llvm.x86.sse42.crc64.64 4140 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i64, MVT::i64); 4141 break; 4142 case Intrinsic::x86_sse42_crc64_8: // llvm.x86.sse42.crc64.8 4143 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::i64, MVT::i8); 4144 break; 4145 case Intrinsic::x86_sse2_cvtsd2si64: // llvm.x86.sse2.cvtsd2si64 4146 case Intrinsic::x86_sse2_cvttsd2si64: // llvm.x86.sse2.cvttsd2si64 4147 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::v2f64); 4148 break; 4149 case Intrinsic::x86_sse41_pextrq: // llvm.x86.sse41.pextrq 4150 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::i64, MVT::v2i64, MVT::i32); 4151 break; 4152 case Intrinsic::x86_sse_cvtss2si64: // llvm.x86.sse.cvtss2si64 4153 case Intrinsic::x86_sse_cvttss2si64: // llvm.x86.sse.cvttss2si64 4154 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::i64, MVT::v4f32); 4155 break; 4156 case Intrinsic::arm_thread_pointer: // llvm.arm.thread.pointer 4157 case Intrinsic::eh_exception: // llvm.eh.exception 4158 case Intrinsic::eh_sjlj_lsda: // llvm.eh.sjlj.lsda 4159 case Intrinsic::stacksave: // llvm.stacksave 4160 VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::iPTR); 4161 break; 4162 case Intrinsic::eh_dwarf_cfa: // llvm.eh.dwarf.cfa 4163 case Intrinsic::frameaddress: // llvm.frameaddress 4164 case Intrinsic::returnaddress: // llvm.returnaddress 4165 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::iPTR, MVT::i32); 4166 break; 4167 case Intrinsic::init_trampoline: // llvm.init.trampoline 4168 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::iPTR, MVT::iPTR, MVT::iPTR, MVT::iPTR); 4169 break; 4170 case Intrinsic::gcread: // llvm.gcread 4171 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::iPTR, MVT::iPTR, MVT::iPTR); 4172 break; 4173 case Intrinsic::ppc_altivec_lvebx: // llvm.ppc.altivec.lvebx 4174 case Intrinsic::ppc_altivec_lvsl: // llvm.ppc.altivec.lvsl 4175 case Intrinsic::ppc_altivec_lvsr: // llvm.ppc.altivec.lvsr 4176 case Intrinsic::x86_sse2_loadu_dq: // llvm.x86.sse2.loadu.dq 4177 case Intrinsic::x86_sse3_ldu_dq: // llvm.x86.sse3.ldu.dq 4178 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i8, MVT::iPTR); 4179 break; 4180 case Intrinsic::x86_ssse3_pabs_b_128: // llvm.x86.ssse3.pabs.b.128 4181 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v16i8, MVT::v16i8); 4182 break; 4183 case Intrinsic::spu_si_shlqbii: // llvm.spu.si.shlqbii 4184 case Intrinsic::spu_si_shlqbyi: // llvm.spu.si.shlqbyi 4185 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::i8); 4186 break; 4187 case Intrinsic::x86_sse42_pcmpestrm128: // llvm.x86.sse42.pcmpestrm128 4188 VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::v16i8, MVT::v16i8, MVT::i32, MVT::v16i8, MVT::i32, MVT::i8); 4189 break; 4190 case Intrinsic::spu_si_andbi: // llvm.spu.si.andbi 4191 case Intrinsic::spu_si_ceqbi: // llvm.spu.si.ceqbi 4192 case Intrinsic::spu_si_cgtbi: // llvm.spu.si.cgtbi 4193 case Intrinsic::spu_si_clgtbi: // llvm.spu.si.clgtbi 4194 case Intrinsic::spu_si_orbi: // llvm.spu.si.orbi 4195 case Intrinsic::spu_si_xorbi: // llvm.spu.si.xorbi 4196 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::i8); 4197 break; 4198 case Intrinsic::ppc_altivec_vaddsbs: // llvm.ppc.altivec.vaddsbs 4199 case Intrinsic::ppc_altivec_vaddubs: // llvm.ppc.altivec.vaddubs 4200 case Intrinsic::ppc_altivec_vavgsb: // llvm.ppc.altivec.vavgsb 4201 case Intrinsic::ppc_altivec_vavgub: // llvm.ppc.altivec.vavgub 4202 case Intrinsic::ppc_altivec_vcmpequb: // llvm.ppc.altivec.vcmpequb 4203 case Intrinsic::ppc_altivec_vcmpgtsb: // llvm.ppc.altivec.vcmpgtsb 4204 case Intrinsic::ppc_altivec_vcmpgtub: // llvm.ppc.altivec.vcmpgtub 4205 case Intrinsic::ppc_altivec_vmaxsb: // llvm.ppc.altivec.vmaxsb 4206 case Intrinsic::ppc_altivec_vmaxub: // llvm.ppc.altivec.vmaxub 4207 case Intrinsic::ppc_altivec_vminsb: // llvm.ppc.altivec.vminsb 4208 case Intrinsic::ppc_altivec_vminub: // llvm.ppc.altivec.vminub 4209 case Intrinsic::ppc_altivec_vrlb: // llvm.ppc.altivec.vrlb 4210 case Intrinsic::ppc_altivec_vslb: // llvm.ppc.altivec.vslb 4211 case Intrinsic::ppc_altivec_vsrab: // llvm.ppc.altivec.vsrab 4212 case Intrinsic::ppc_altivec_vsrb: // llvm.ppc.altivec.vsrb 4213 case Intrinsic::ppc_altivec_vsubsbs: // llvm.ppc.altivec.vsubsbs 4214 case Intrinsic::ppc_altivec_vsububs: // llvm.ppc.altivec.vsububs 4215 case Intrinsic::spu_si_ceqb: // llvm.spu.si.ceqb 4216 case Intrinsic::spu_si_cgtb: // llvm.spu.si.cgtb 4217 case Intrinsic::spu_si_clgtb: // llvm.spu.si.clgtb 4218 case Intrinsic::x86_sse2_padds_b: // llvm.x86.sse2.padds.b 4219 case Intrinsic::x86_sse2_paddus_b: // llvm.x86.sse2.paddus.b 4220 case Intrinsic::x86_sse2_pavg_b: // llvm.x86.sse2.pavg.b 4221 case Intrinsic::x86_sse2_pcmpeq_b: // llvm.x86.sse2.pcmpeq.b 4222 case Intrinsic::x86_sse2_pcmpgt_b: // llvm.x86.sse2.pcmpgt.b 4223 case Intrinsic::x86_sse2_pmaxu_b: // llvm.x86.sse2.pmaxu.b 4224 case Intrinsic::x86_sse2_pminu_b: // llvm.x86.sse2.pminu.b 4225 case Intrinsic::x86_sse2_psubs_b: // llvm.x86.sse2.psubs.b 4226 case Intrinsic::x86_sse2_psubus_b: // llvm.x86.sse2.psubus.b 4227 case Intrinsic::x86_sse41_pmaxsb: // llvm.x86.sse41.pmaxsb 4228 case Intrinsic::x86_sse41_pminsb: // llvm.x86.sse41.pminsb 4229 case Intrinsic::x86_ssse3_pshuf_b_128: // llvm.x86.ssse3.pshuf.b.128 4230 case Intrinsic::x86_ssse3_psign_b_128: // llvm.x86.ssse3.psign.b.128 4231 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v16i8, MVT::v16i8); 4232 break; 4233 case Intrinsic::x86_sse41_mpsadbw: // llvm.x86.sse41.mpsadbw 4234 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::i32); 4235 break; 4236 case Intrinsic::x86_sse42_pcmpistrm128: // llvm.x86.sse42.pcmpistrm128 4237 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::i8); 4238 break; 4239 case Intrinsic::x86_sse41_pblendvb: // llvm.x86.sse41.pblendvb 4240 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v16i8, MVT::v16i8, MVT::v16i8, MVT::v16i8); 4241 break; 4242 case Intrinsic::ppc_altivec_vpkswss: // llvm.ppc.altivec.vpkswss 4243 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v4i32, MVT::v4i32); 4244 break; 4245 case Intrinsic::ppc_altivec_vpkshss: // llvm.ppc.altivec.vpkshss 4246 case Intrinsic::ppc_altivec_vpkshus: // llvm.ppc.altivec.vpkshus 4247 case Intrinsic::ppc_altivec_vpkuhus: // llvm.ppc.altivec.vpkuhus 4248 case Intrinsic::x86_sse2_packsswb_128: // llvm.x86.sse2.packsswb.128 4249 case Intrinsic::x86_sse2_packuswb_128: // llvm.x86.sse2.packuswb.128 4250 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v16i8, MVT::v8i16, MVT::v8i16); 4251 break; 4252 case Intrinsic::x86_mmx_cvtsi32_si64: // llvm.x86.mmx.cvtsi32.si64 4253 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v1i64, MVT::i32); 4254 break; 4255 case Intrinsic::x86_mmx_pslli_q: // llvm.x86.mmx.pslli.q 4256 case Intrinsic::x86_mmx_psrli_q: // llvm.x86.mmx.psrli.q 4257 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v1i64, MVT::v1i64, MVT::i32); 4258 break; 4259 case Intrinsic::x86_mmx_pinsr_w: // llvm.x86.mmx.pinsr.w 4260 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v1i64, MVT::v1i64, MVT::i32, MVT::i32); 4261 break; 4262 case Intrinsic::x86_mmx_padd_q: // llvm.x86.mmx.padd.q 4263 case Intrinsic::x86_mmx_pand: // llvm.x86.mmx.pand 4264 case Intrinsic::x86_mmx_pandn: // llvm.x86.mmx.pandn 4265 case Intrinsic::x86_mmx_por: // llvm.x86.mmx.por 4266 case Intrinsic::x86_mmx_psll_q: // llvm.x86.mmx.psll.q 4267 case Intrinsic::x86_mmx_psrl_q: // llvm.x86.mmx.psrl.q 4268 case Intrinsic::x86_mmx_psub_q: // llvm.x86.mmx.psub.q 4269 case Intrinsic::x86_mmx_pxor: // llvm.x86.mmx.pxor 4270 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v1i64, MVT::v1i64, MVT::v1i64); 4271 break; 4272 case Intrinsic::x86_sse2_loadu_pd: // llvm.x86.sse2.loadu.pd 4273 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::iPTR); 4274 break; 4275 case Intrinsic::x86_avx_maskload_pd: // llvm.x86.avx.maskload.pd 4276 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::iPTR, MVT::v2f64); 4277 break; 4278 case Intrinsic::x86_sse2_sqrt_pd: // llvm.x86.sse2.sqrt.pd 4279 case Intrinsic::x86_sse2_sqrt_sd: // llvm.x86.sse2.sqrt.sd 4280 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v2f64); 4281 break; 4282 case Intrinsic::x86_sse2_cvtsi2sd: // llvm.x86.sse2.cvtsi2sd 4283 case Intrinsic::x86_sse41_round_pd: // llvm.x86.sse41.round.pd 4284 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i32); 4285 break; 4286 case Intrinsic::x86_sse2_cvtsi642sd: // llvm.x86.sse2.cvtsi642sd 4287 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i64); 4288 break; 4289 case Intrinsic::x86_avx_vpermil_pd: // llvm.x86.avx.vpermil.pd 4290 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::i8); 4291 break; 4292 case Intrinsic::spu_si_dfa: // llvm.spu.si.dfa 4293 case Intrinsic::spu_si_dfm: // llvm.spu.si.dfm 4294 case Intrinsic::spu_si_dfma: // llvm.spu.si.dfma 4295 case Intrinsic::spu_si_dfms: // llvm.spu.si.dfms 4296 case Intrinsic::spu_si_dfnma: // llvm.spu.si.dfnma 4297 case Intrinsic::spu_si_dfnms: // llvm.spu.si.dfnms 4298 case Intrinsic::spu_si_dfs: // llvm.spu.si.dfs 4299 case Intrinsic::x86_sse2_add_sd: // llvm.x86.sse2.add.sd 4300 case Intrinsic::x86_sse2_div_sd: // llvm.x86.sse2.div.sd 4301 case Intrinsic::x86_sse2_max_pd: // llvm.x86.sse2.max.pd 4302 case Intrinsic::x86_sse2_max_sd: // llvm.x86.sse2.max.sd 4303 case Intrinsic::x86_sse2_min_pd: // llvm.x86.sse2.min.pd 4304 case Intrinsic::x86_sse2_min_sd: // llvm.x86.sse2.min.sd 4305 case Intrinsic::x86_sse2_mul_sd: // llvm.x86.sse2.mul.sd 4306 case Intrinsic::x86_sse2_sub_sd: // llvm.x86.sse2.sub.sd 4307 case Intrinsic::x86_sse3_addsub_pd: // llvm.x86.sse3.addsub.pd 4308 case Intrinsic::x86_sse3_hadd_pd: // llvm.x86.sse3.hadd.pd 4309 case Intrinsic::x86_sse3_hsub_pd: // llvm.x86.sse3.hsub.pd 4310 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v2f64); 4311 break; 4312 case Intrinsic::x86_sse41_blendpd: // llvm.x86.sse41.blendpd 4313 case Intrinsic::x86_sse41_dppd: // llvm.x86.sse41.dppd 4314 case Intrinsic::x86_sse41_round_sd: // llvm.x86.sse41.round.sd 4315 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::i32); 4316 break; 4317 case Intrinsic::x86_sse2_cmp_pd: // llvm.x86.sse2.cmp.pd 4318 case Intrinsic::x86_sse2_cmp_sd: // llvm.x86.sse2.cmp.sd 4319 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::i8); 4320 break; 4321 case Intrinsic::x86_sse41_blendvpd: // llvm.x86.sse41.blendvpd 4322 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v2f64, MVT::v2f64, MVT::v2f64, MVT::v2f64); 4323 break; 4324 case Intrinsic::x86_avx_vpermilvar_pd: // llvm.x86.avx.vpermilvar.pd 4325 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v2i64); 4326 break; 4327 case Intrinsic::x86_sse2_cvtss2sd: // llvm.x86.sse2.cvtss2sd 4328 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v2f64, MVT::v4f32); 4329 break; 4330 case Intrinsic::x86_sse_cvtpi2pd: // llvm.x86.sse.cvtpi2pd 4331 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v2i32); 4332 break; 4333 case Intrinsic::x86_sse2_cvtps2pd: // llvm.x86.sse2.cvtps2pd 4334 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v4f32); 4335 break; 4336 case Intrinsic::x86_avx_vextractf128_pd_256: // llvm.x86.avx.vextractf128.pd.256 4337 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2f64, MVT::v4f64, MVT::i8); 4338 break; 4339 case Intrinsic::x86_sse2_cvtdq2pd: // llvm.x86.sse2.cvtdq2pd 4340 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2f64, MVT::v4i32); 4341 break; 4342 case Intrinsic::x86_mmx_vec_init_d: // llvm.x86.mmx.vec.init.d 4343 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::i32, MVT::i32); 4344 break; 4345 case Intrinsic::arm_neon_vacged: // llvm.arm.neon.vacged 4346 case Intrinsic::arm_neon_vacgtd: // llvm.arm.neon.vacgtd 4347 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2f32, MVT::v2f32); 4348 break; 4349 case Intrinsic::x86_sse_cvtpd2pi: // llvm.x86.sse.cvtpd2pi 4350 case Intrinsic::x86_sse_cvttpd2pi: // llvm.x86.sse.cvttpd2pi 4351 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i32, MVT::v2f64); 4352 break; 4353 case Intrinsic::x86_ssse3_pabs_d: // llvm.x86.ssse3.pabs.d 4354 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i32, MVT::v2i32); 4355 break; 4356 case Intrinsic::x86_mmx_pslli_d: // llvm.x86.mmx.pslli.d 4357 case Intrinsic::x86_mmx_psrai_d: // llvm.x86.mmx.psrai.d 4358 case Intrinsic::x86_mmx_psrli_d: // llvm.x86.mmx.psrli.d 4359 case Intrinsic::x86_mmx_vec_ext_d: // llvm.x86.mmx.vec.ext.d 4360 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2i32, MVT::i32); 4361 break; 4362 case Intrinsic::x86_mmx_psll_d: // llvm.x86.mmx.psll.d 4363 case Intrinsic::x86_mmx_psra_d: // llvm.x86.mmx.psra.d 4364 case Intrinsic::x86_mmx_psrl_d: // llvm.x86.mmx.psrl.d 4365 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2i32, MVT::v1i64); 4366 break; 4367 case Intrinsic::x86_mmx_padd_d: // llvm.x86.mmx.padd.d 4368 case Intrinsic::x86_mmx_pcmpeq_d: // llvm.x86.mmx.pcmpeq.d 4369 case Intrinsic::x86_mmx_pcmpgt_d: // llvm.x86.mmx.pcmpgt.d 4370 case Intrinsic::x86_mmx_pmulu_dq: // llvm.x86.mmx.pmulu.dq 4371 case Intrinsic::x86_mmx_psub_d: // llvm.x86.mmx.psub.d 4372 case Intrinsic::x86_mmx_punpckhdq: // llvm.x86.mmx.punpckhdq 4373 case Intrinsic::x86_mmx_punpckldq: // llvm.x86.mmx.punpckldq 4374 case Intrinsic::x86_ssse3_phadd_d: // llvm.x86.ssse3.phadd.d 4375 case Intrinsic::x86_ssse3_phsub_d: // llvm.x86.ssse3.phsub.d 4376 case Intrinsic::x86_ssse3_psign_d: // llvm.x86.ssse3.psign.d 4377 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v2i32, MVT::v2i32); 4378 break; 4379 case Intrinsic::x86_sse_cvtps2pi: // llvm.x86.sse.cvtps2pi 4380 case Intrinsic::x86_sse_cvttps2pi: // llvm.x86.sse.cvttps2pi 4381 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i32, MVT::v4f32); 4382 break; 4383 case Intrinsic::x86_mmx_pmadd_wd: // llvm.x86.mmx.pmadd.wd 4384 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i32, MVT::v4i16, MVT::v4i16); 4385 break; 4386 case Intrinsic::x86_sse41_movntdqa: // llvm.x86.sse41.movntdqa 4387 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::iPTR); 4388 break; 4389 case Intrinsic::x86_sse41_pmovsxbq: // llvm.x86.sse41.pmovsxbq 4390 case Intrinsic::x86_sse41_pmovzxbq: // llvm.x86.sse41.pmovzxbq 4391 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v16i8); 4392 break; 4393 case Intrinsic::x86_sse2_psad_bw: // llvm.x86.sse2.psad.bw 4394 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v16i8, MVT::v16i8); 4395 break; 4396 case Intrinsic::x86_aesni_aesimc: // llvm.x86.aesni.aesimc 4397 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v2i64); 4398 break; 4399 case Intrinsic::x86_sse2_psll_dq: // llvm.x86.sse2.psll.dq 4400 case Intrinsic::x86_sse2_psll_dq_bs: // llvm.x86.sse2.psll.dq.bs 4401 case Intrinsic::x86_sse2_pslli_q: // llvm.x86.sse2.pslli.q 4402 case Intrinsic::x86_sse2_psrl_dq: // llvm.x86.sse2.psrl.dq 4403 case Intrinsic::x86_sse2_psrl_dq_bs: // llvm.x86.sse2.psrl.dq.bs 4404 case Intrinsic::x86_sse2_psrli_q: // llvm.x86.sse2.psrli.q 4405 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::i32); 4406 break; 4407 case Intrinsic::x86_aesni_aeskeygenassist: // llvm.x86.aesni.aeskeygenassist 4408 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::i8); 4409 break; 4410 case Intrinsic::x86_aesni_aesdec: // llvm.x86.aesni.aesdec 4411 case Intrinsic::x86_aesni_aesdeclast: // llvm.x86.aesni.aesdeclast 4412 case Intrinsic::x86_aesni_aesenc: // llvm.x86.aesni.aesenc 4413 case Intrinsic::x86_aesni_aesenclast: // llvm.x86.aesni.aesenclast 4414 case Intrinsic::x86_sse2_psll_q: // llvm.x86.sse2.psll.q 4415 case Intrinsic::x86_sse2_psrl_q: // llvm.x86.sse2.psrl.q 4416 case Intrinsic::x86_sse41_pcmpeqq: // llvm.x86.sse41.pcmpeqq 4417 case Intrinsic::x86_sse42_pcmpgtq: // llvm.x86.sse42.pcmpgtq 4418 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v2i64, MVT::v2i64); 4419 break; 4420 case Intrinsic::x86_sse41_pmovsxdq: // llvm.x86.sse41.pmovsxdq 4421 case Intrinsic::x86_sse41_pmovzxdq: // llvm.x86.sse41.pmovzxdq 4422 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v4i32); 4423 break; 4424 case Intrinsic::x86_sse2_pmulu_dq: // llvm.x86.sse2.pmulu.dq 4425 case Intrinsic::x86_sse41_pmuldq: // llvm.x86.sse41.pmuldq 4426 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v2i64, MVT::v4i32, MVT::v4i32); 4427 break; 4428 case Intrinsic::x86_sse41_pmovsxwq: // llvm.x86.sse41.pmovsxwq 4429 case Intrinsic::x86_sse41_pmovzxwq: // llvm.x86.sse41.pmovzxwq 4430 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v2i64, MVT::v8i16); 4431 break; 4432 case Intrinsic::x86_avx_ldu_dq_256: // llvm.x86.avx.ldu.dq.256 4433 case Intrinsic::x86_avx_loadu_dq_256: // llvm.x86.avx.loadu.dq.256 4434 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v32i8, MVT::iPTR); 4435 break; 4436 case Intrinsic::x86_avx_vbroadcastss: // llvm.x86.avx.vbroadcastss 4437 case Intrinsic::x86_sse_loadu_ps: // llvm.x86.sse.loadu.ps 4438 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::iPTR); 4439 break; 4440 case Intrinsic::x86_avx_maskload_ps: // llvm.x86.avx.maskload.ps 4441 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::iPTR, MVT::v4f32); 4442 break; 4443 case Intrinsic::x86_sse2_cvtpd2ps: // llvm.x86.sse2.cvtpd2ps 4444 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v2f64); 4445 break; 4446 case Intrinsic::ppc_altivec_vexptefp: // llvm.ppc.altivec.vexptefp 4447 case Intrinsic::ppc_altivec_vlogefp: // llvm.ppc.altivec.vlogefp 4448 case Intrinsic::ppc_altivec_vrefp: // llvm.ppc.altivec.vrefp 4449 case Intrinsic::ppc_altivec_vrfim: // llvm.ppc.altivec.vrfim 4450 case Intrinsic::ppc_altivec_vrfin: // llvm.ppc.altivec.vrfin 4451 case Intrinsic::ppc_altivec_vrfip: // llvm.ppc.altivec.vrfip 4452 case Intrinsic::ppc_altivec_vrfiz: // llvm.ppc.altivec.vrfiz 4453 case Intrinsic::ppc_altivec_vrsqrtefp: // llvm.ppc.altivec.vrsqrtefp 4454 case Intrinsic::x86_sse_rcp_ps: // llvm.x86.sse.rcp.ps 4455 case Intrinsic::x86_sse_rcp_ss: // llvm.x86.sse.rcp.ss 4456 case Intrinsic::x86_sse_rsqrt_ps: // llvm.x86.sse.rsqrt.ps 4457 case Intrinsic::x86_sse_rsqrt_ss: // llvm.x86.sse.rsqrt.ss 4458 case Intrinsic::x86_sse_sqrt_ps: // llvm.x86.sse.sqrt.ps 4459 case Intrinsic::x86_sse_sqrt_ss: // llvm.x86.sse.sqrt.ss 4460 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4f32); 4461 break; 4462 case Intrinsic::x86_sse41_round_ps: // llvm.x86.sse41.round.ps 4463 case Intrinsic::x86_sse_cvtsi2ss: // llvm.x86.sse.cvtsi2ss 4464 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i32); 4465 break; 4466 case Intrinsic::x86_sse_cvtsi642ss: // llvm.x86.sse.cvtsi642ss 4467 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i64); 4468 break; 4469 case Intrinsic::x86_avx_vpermil_ps: // llvm.x86.avx.vpermil.ps 4470 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::i8); 4471 break; 4472 case Intrinsic::x86_sse2_cvtsd2ss: // llvm.x86.sse2.cvtsd2ss 4473 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v2f64); 4474 break; 4475 case Intrinsic::x86_sse_cvtpi2ps: // llvm.x86.sse.cvtpi2ps 4476 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v2i32); 4477 break; 4478 case Intrinsic::ppc_altivec_vmaxfp: // llvm.ppc.altivec.vmaxfp 4479 case Intrinsic::ppc_altivec_vminfp: // llvm.ppc.altivec.vminfp 4480 case Intrinsic::spu_si_fa: // llvm.spu.si.fa 4481 case Intrinsic::spu_si_fceq: // llvm.spu.si.fceq 4482 case Intrinsic::spu_si_fcgt: // llvm.spu.si.fcgt 4483 case Intrinsic::spu_si_fcmeq: // llvm.spu.si.fcmeq 4484 case Intrinsic::spu_si_fcmgt: // llvm.spu.si.fcmgt 4485 case Intrinsic::spu_si_fm: // llvm.spu.si.fm 4486 case Intrinsic::spu_si_fs: // llvm.spu.si.fs 4487 case Intrinsic::x86_sse3_addsub_ps: // llvm.x86.sse3.addsub.ps 4488 case Intrinsic::x86_sse3_hadd_ps: // llvm.x86.sse3.hadd.ps 4489 case Intrinsic::x86_sse3_hsub_ps: // llvm.x86.sse3.hsub.ps 4490 case Intrinsic::x86_sse_add_ss: // llvm.x86.sse.add.ss 4491 case Intrinsic::x86_sse_div_ss: // llvm.x86.sse.div.ss 4492 case Intrinsic::x86_sse_max_ps: // llvm.x86.sse.max.ps 4493 case Intrinsic::x86_sse_max_ss: // llvm.x86.sse.max.ss 4494 case Intrinsic::x86_sse_min_ps: // llvm.x86.sse.min.ps 4495 case Intrinsic::x86_sse_min_ss: // llvm.x86.sse.min.ss 4496 case Intrinsic::x86_sse_mul_ss: // llvm.x86.sse.mul.ss 4497 case Intrinsic::x86_sse_sub_ss: // llvm.x86.sse.sub.ss 4498 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v4f32); 4499 break; 4500 case Intrinsic::x86_sse41_blendps: // llvm.x86.sse41.blendps 4501 case Intrinsic::x86_sse41_dpps: // llvm.x86.sse41.dpps 4502 case Intrinsic::x86_sse41_insertps: // llvm.x86.sse41.insertps 4503 case Intrinsic::x86_sse41_round_ss: // llvm.x86.sse41.round.ss 4504 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::i32); 4505 break; 4506 case Intrinsic::x86_sse_cmp_ps: // llvm.x86.sse.cmp.ps 4507 case Intrinsic::x86_sse_cmp_ss: // llvm.x86.sse.cmp.ss 4508 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::i8); 4509 break; 4510 case Intrinsic::ppc_altivec_vmaddfp: // llvm.ppc.altivec.vmaddfp 4511 case Intrinsic::ppc_altivec_vnmsubfp: // llvm.ppc.altivec.vnmsubfp 4512 case Intrinsic::spu_si_fma: // llvm.spu.si.fma 4513 case Intrinsic::spu_si_fms: // llvm.spu.si.fms 4514 case Intrinsic::spu_si_fnms: // llvm.spu.si.fnms 4515 case Intrinsic::x86_sse41_blendvps: // llvm.x86.sse41.blendvps 4516 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f32, MVT::v4f32, MVT::v4f32, MVT::v4f32); 4517 break; 4518 case Intrinsic::x86_avx_vpermilvar_ps: // llvm.x86.avx.vpermilvar.ps 4519 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4f32, MVT::v4i32); 4520 break; 4521 case Intrinsic::x86_avx_cvt_pd2_ps_256: // llvm.x86.avx.cvt.pd2.ps.256 4522 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4f64); 4523 break; 4524 case Intrinsic::x86_sse2_cvtdq2ps: // llvm.x86.sse2.cvtdq2ps 4525 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f32, MVT::v4i32); 4526 break; 4527 case Intrinsic::ppc_altivec_vcfsx: // llvm.ppc.altivec.vcfsx 4528 case Intrinsic::ppc_altivec_vcfux: // llvm.ppc.altivec.vcfux 4529 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v4i32, MVT::i32); 4530 break; 4531 case Intrinsic::x86_avx_vextractf128_ps_256: // llvm.x86.avx.vextractf128.ps.256 4532 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f32, MVT::v8f32, MVT::i8); 4533 break; 4534 case Intrinsic::x86_avx_loadu_pd_256: // llvm.x86.avx.loadu.pd.256 4535 case Intrinsic::x86_avx_vbroadcast_sd_256: // llvm.x86.avx.vbroadcast.sd.256 4536 case Intrinsic::x86_avx_vbroadcastf128_pd_256: // llvm.x86.avx.vbroadcastf128.pd.256 4537 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::iPTR); 4538 break; 4539 case Intrinsic::x86_avx_maskload_pd_256: // llvm.x86.avx.maskload.pd.256 4540 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::iPTR, MVT::v4f64); 4541 break; 4542 case Intrinsic::x86_avx_cvt_ps2_pd_256: // llvm.x86.avx.cvt.ps2.pd.256 4543 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v4f32); 4544 break; 4545 case Intrinsic::x86_avx_sqrt_pd_256: // llvm.x86.avx.sqrt.pd.256 4546 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v4f64); 4547 break; 4548 case Intrinsic::x86_avx_round_pd_256: // llvm.x86.avx.round.pd.256 4549 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::i32); 4550 break; 4551 case Intrinsic::x86_avx_vpermil_pd_256: // llvm.x86.avx.vpermil.pd.256 4552 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::i8); 4553 break; 4554 case Intrinsic::x86_avx_vinsertf128_pd_256: // llvm.x86.avx.vinsertf128.pd.256 4555 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v2f64, MVT::i8); 4556 break; 4557 case Intrinsic::x86_avx_addsub_pd_256: // llvm.x86.avx.addsub.pd.256 4558 case Intrinsic::x86_avx_hadd_pd_256: // llvm.x86.avx.hadd.pd.256 4559 case Intrinsic::x86_avx_hsub_pd_256: // llvm.x86.avx.hsub.pd.256 4560 case Intrinsic::x86_avx_max_pd_256: // llvm.x86.avx.max.pd.256 4561 case Intrinsic::x86_avx_min_pd_256: // llvm.x86.avx.min.pd.256 4562 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::v4f64); 4563 break; 4564 case Intrinsic::x86_avx_blend_pd_256: // llvm.x86.avx.blend.pd.256 4565 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::i32); 4566 break; 4567 case Intrinsic::x86_avx_cmp_pd_256: // llvm.x86.avx.cmp.pd.256 4568 case Intrinsic::x86_avx_vperm2f128_pd_256: // llvm.x86.avx.vperm2f128.pd.256 4569 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::i8); 4570 break; 4571 case Intrinsic::x86_avx_blendv_pd_256: // llvm.x86.avx.blendv.pd.256 4572 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4f64, MVT::v4f64, MVT::v4f64, MVT::v4f64); 4573 break; 4574 case Intrinsic::x86_avx_vpermilvar_pd_256: // llvm.x86.avx.vpermilvar.pd.256 4575 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4f64, MVT::v4f64, MVT::v4i64); 4576 break; 4577 case Intrinsic::x86_avx_cvtdq2_pd_256: // llvm.x86.avx.cvtdq2.pd.256 4578 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4f64, MVT::v4i32); 4579 break; 4580 case Intrinsic::x86_mmx_vec_init_w: // llvm.x86.mmx.vec.init.w 4581 VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v4i16, MVT::i16, MVT::i16, MVT::i16, MVT::i16); 4582 break; 4583 case Intrinsic::x86_mmx_packssdw: // llvm.x86.mmx.packssdw 4584 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v2i32, MVT::v2i32); 4585 break; 4586 case Intrinsic::x86_ssse3_pabs_w: // llvm.x86.ssse3.pabs.w 4587 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i16, MVT::v4i16); 4588 break; 4589 case Intrinsic::x86_mmx_pslli_w: // llvm.x86.mmx.pslli.w 4590 case Intrinsic::x86_mmx_psrai_w: // llvm.x86.mmx.psrai.w 4591 case Intrinsic::x86_mmx_psrli_w: // llvm.x86.mmx.psrli.w 4592 case Intrinsic::x86_ssse3_pshuf_w: // llvm.x86.ssse3.pshuf.w 4593 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v4i16, MVT::i32); 4594 break; 4595 case Intrinsic::x86_mmx_psll_w: // llvm.x86.mmx.psll.w 4596 case Intrinsic::x86_mmx_psra_w: // llvm.x86.mmx.psra.w 4597 case Intrinsic::x86_mmx_psrl_w: // llvm.x86.mmx.psrl.w 4598 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v4i16, MVT::v1i64); 4599 break; 4600 case Intrinsic::x86_mmx_padd_w: // llvm.x86.mmx.padd.w 4601 case Intrinsic::x86_mmx_padds_w: // llvm.x86.mmx.padds.w 4602 case Intrinsic::x86_mmx_paddus_w: // llvm.x86.mmx.paddus.w 4603 case Intrinsic::x86_mmx_pavg_w: // llvm.x86.mmx.pavg.w 4604 case Intrinsic::x86_mmx_pcmpeq_w: // llvm.x86.mmx.pcmpeq.w 4605 case Intrinsic::x86_mmx_pcmpgt_w: // llvm.x86.mmx.pcmpgt.w 4606 case Intrinsic::x86_mmx_pmaxs_w: // llvm.x86.mmx.pmaxs.w 4607 case Intrinsic::x86_mmx_pmins_w: // llvm.x86.mmx.pmins.w 4608 case Intrinsic::x86_mmx_pmulh_w: // llvm.x86.mmx.pmulh.w 4609 case Intrinsic::x86_mmx_pmulhu_w: // llvm.x86.mmx.pmulhu.w 4610 case Intrinsic::x86_mmx_pmull_w: // llvm.x86.mmx.pmull.w 4611 case Intrinsic::x86_mmx_psub_w: // llvm.x86.mmx.psub.w 4612 case Intrinsic::x86_mmx_psubs_w: // llvm.x86.mmx.psubs.w 4613 case Intrinsic::x86_mmx_psubus_w: // llvm.x86.mmx.psubus.w 4614 case Intrinsic::x86_mmx_punpckhwd: // llvm.x86.mmx.punpckhwd 4615 case Intrinsic::x86_mmx_punpcklwd: // llvm.x86.mmx.punpcklwd 4616 case Intrinsic::x86_ssse3_phadd_sw: // llvm.x86.ssse3.phadd.sw 4617 case Intrinsic::x86_ssse3_phadd_w: // llvm.x86.ssse3.phadd.w 4618 case Intrinsic::x86_ssse3_phsub_sw: // llvm.x86.ssse3.phsub.sw 4619 case Intrinsic::x86_ssse3_phsub_w: // llvm.x86.ssse3.phsub.w 4620 case Intrinsic::x86_ssse3_pmadd_ub_sw: // llvm.x86.ssse3.pmadd.ub.sw 4621 case Intrinsic::x86_ssse3_pmul_hr_sw: // llvm.x86.ssse3.pmul.hr.sw 4622 case Intrinsic::x86_ssse3_psign_w: // llvm.x86.ssse3.psign.w 4623 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v4i16, MVT::v4i16); 4624 break; 4625 case Intrinsic::x86_mmx_psad_bw: // llvm.x86.mmx.psad.bw 4626 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i16, MVT::v8i8, MVT::v8i8); 4627 break; 4628 case Intrinsic::ppc_altivec_lvewx: // llvm.ppc.altivec.lvewx 4629 case Intrinsic::ppc_altivec_lvx: // llvm.ppc.altivec.lvx 4630 case Intrinsic::ppc_altivec_lvxl: // llvm.ppc.altivec.lvxl 4631 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::iPTR); 4632 break; 4633 case Intrinsic::x86_sse41_pmovsxbd: // llvm.x86.sse41.pmovsxbd 4634 case Intrinsic::x86_sse41_pmovzxbd: // llvm.x86.sse41.pmovzxbd 4635 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v16i8); 4636 break; 4637 case Intrinsic::ppc_altivec_vmsummbm: // llvm.ppc.altivec.vmsummbm 4638 case Intrinsic::ppc_altivec_vmsumubm: // llvm.ppc.altivec.vmsumubm 4639 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v16i8, MVT::v16i8, MVT::v4i32); 4640 break; 4641 case Intrinsic::ppc_altivec_vsum4sbs: // llvm.ppc.altivec.vsum4sbs 4642 case Intrinsic::ppc_altivec_vsum4ubs: // llvm.ppc.altivec.vsum4ubs 4643 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v16i8, MVT::v4i32); 4644 break; 4645 case Intrinsic::x86_sse2_cvtpd2dq: // llvm.x86.sse2.cvtpd2dq 4646 case Intrinsic::x86_sse2_cvttpd2dq: // llvm.x86.sse2.cvttpd2dq 4647 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v2f64); 4648 break; 4649 case Intrinsic::x86_sse2_cvtps2dq: // llvm.x86.sse2.cvtps2dq 4650 case Intrinsic::x86_sse2_cvttps2dq: // llvm.x86.sse2.cvttps2dq 4651 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4f32); 4652 break; 4653 case Intrinsic::ppc_altivec_vctsxs: // llvm.ppc.altivec.vctsxs 4654 case Intrinsic::ppc_altivec_vctuxs: // llvm.ppc.altivec.vctuxs 4655 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4f32, MVT::i32); 4656 break; 4657 case Intrinsic::arm_neon_vacgeq: // llvm.arm.neon.vacgeq 4658 case Intrinsic::arm_neon_vacgtq: // llvm.arm.neon.vacgtq 4659 case Intrinsic::ppc_altivec_vcmpbfp: // llvm.ppc.altivec.vcmpbfp 4660 case Intrinsic::ppc_altivec_vcmpeqfp: // llvm.ppc.altivec.vcmpeqfp 4661 case Intrinsic::ppc_altivec_vcmpgefp: // llvm.ppc.altivec.vcmpgefp 4662 case Intrinsic::ppc_altivec_vcmpgtfp: // llvm.ppc.altivec.vcmpgtfp 4663 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4f32, MVT::v4f32); 4664 break; 4665 case Intrinsic::x86_avx_cvt_pd2dq_256: // llvm.x86.avx.cvt.pd2dq.256 4666 case Intrinsic::x86_avx_cvtt_pd2dq_256: // llvm.x86.avx.cvtt.pd2dq.256 4667 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4f64); 4668 break; 4669 case Intrinsic::x86_ssse3_pabs_d_128: // llvm.x86.ssse3.pabs.d.128 4670 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v4i32); 4671 break; 4672 case Intrinsic::spu_si_shli: // llvm.spu.si.shli 4673 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i8); 4674 break; 4675 case Intrinsic::spu_si_ai: // llvm.spu.si.ai 4676 case Intrinsic::spu_si_andi: // llvm.spu.si.andi 4677 case Intrinsic::spu_si_ceqi: // llvm.spu.si.ceqi 4678 case Intrinsic::spu_si_cgti: // llvm.spu.si.cgti 4679 case Intrinsic::spu_si_clgti: // llvm.spu.si.clgti 4680 case Intrinsic::spu_si_ori: // llvm.spu.si.ori 4681 case Intrinsic::spu_si_sfi: // llvm.spu.si.sfi 4682 case Intrinsic::spu_si_xori: // llvm.spu.si.xori 4683 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i16); 4684 break; 4685 case Intrinsic::x86_sse2_pslli_d: // llvm.x86.sse2.pslli.d 4686 case Intrinsic::x86_sse2_psrai_d: // llvm.x86.sse2.psrai.d 4687 case Intrinsic::x86_sse2_psrli_d: // llvm.x86.sse2.psrli.d 4688 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::i32); 4689 break; 4690 case Intrinsic::ppc_altivec_vaddcuw: // llvm.ppc.altivec.vaddcuw 4691 case Intrinsic::ppc_altivec_vaddsws: // llvm.ppc.altivec.vaddsws 4692 case Intrinsic::ppc_altivec_vadduws: // llvm.ppc.altivec.vadduws 4693 case Intrinsic::ppc_altivec_vavgsw: // llvm.ppc.altivec.vavgsw 4694 case Intrinsic::ppc_altivec_vavguw: // llvm.ppc.altivec.vavguw 4695 case Intrinsic::ppc_altivec_vcmpequw: // llvm.ppc.altivec.vcmpequw 4696 case Intrinsic::ppc_altivec_vcmpgtsw: // llvm.ppc.altivec.vcmpgtsw 4697 case Intrinsic::ppc_altivec_vcmpgtuw: // llvm.ppc.altivec.vcmpgtuw 4698 case Intrinsic::ppc_altivec_vmaxsw: // llvm.ppc.altivec.vmaxsw 4699 case Intrinsic::ppc_altivec_vmaxuw: // llvm.ppc.altivec.vmaxuw 4700 case Intrinsic::ppc_altivec_vminsw: // llvm.ppc.altivec.vminsw 4701 case Intrinsic::ppc_altivec_vminuw: // llvm.ppc.altivec.vminuw 4702 case Intrinsic::ppc_altivec_vrlw: // llvm.ppc.altivec.vrlw 4703 case Intrinsic::ppc_altivec_vsl: // llvm.ppc.altivec.vsl 4704 case Intrinsic::ppc_altivec_vslo: // llvm.ppc.altivec.vslo 4705 case Intrinsic::ppc_altivec_vslw: // llvm.ppc.altivec.vslw 4706 case Intrinsic::ppc_altivec_vsr: // llvm.ppc.altivec.vsr 4707 case Intrinsic::ppc_altivec_vsraw: // llvm.ppc.altivec.vsraw 4708 case Intrinsic::ppc_altivec_vsro: // llvm.ppc.altivec.vsro 4709 case Intrinsic::ppc_altivec_vsrw: // llvm.ppc.altivec.vsrw 4710 case Intrinsic::ppc_altivec_vsubcuw: // llvm.ppc.altivec.vsubcuw 4711 case Intrinsic::ppc_altivec_vsubsws: // llvm.ppc.altivec.vsubsws 4712 case Intrinsic::ppc_altivec_vsubuws: // llvm.ppc.altivec.vsubuws 4713 case Intrinsic::ppc_altivec_vsum2sws: // llvm.ppc.altivec.vsum2sws 4714 case Intrinsic::ppc_altivec_vsumsws: // llvm.ppc.altivec.vsumsws 4715 case Intrinsic::spu_si_a: // llvm.spu.si.a 4716 case Intrinsic::spu_si_addx: // llvm.spu.si.addx 4717 case Intrinsic::spu_si_and: // llvm.spu.si.and 4718 case Intrinsic::spu_si_andc: // llvm.spu.si.andc 4719 case Intrinsic::spu_si_bg: // llvm.spu.si.bg 4720 case Intrinsic::spu_si_bgx: // llvm.spu.si.bgx 4721 case Intrinsic::spu_si_ceq: // llvm.spu.si.ceq 4722 case Intrinsic::spu_si_cg: // llvm.spu.si.cg 4723 case Intrinsic::spu_si_cgt: // llvm.spu.si.cgt 4724 case Intrinsic::spu_si_cgx: // llvm.spu.si.cgx 4725 case Intrinsic::spu_si_clgt: // llvm.spu.si.clgt 4726 case Intrinsic::spu_si_nand: // llvm.spu.si.nand 4727 case Intrinsic::spu_si_nor: // llvm.spu.si.nor 4728 case Intrinsic::spu_si_or: // llvm.spu.si.or 4729 case Intrinsic::spu_si_orc: // llvm.spu.si.orc 4730 case Intrinsic::spu_si_sf: // llvm.spu.si.sf 4731 case Intrinsic::spu_si_sfx: // llvm.spu.si.sfx 4732 case Intrinsic::spu_si_xor: // llvm.spu.si.xor 4733 case Intrinsic::x86_sse2_pcmpeq_d: // llvm.x86.sse2.pcmpeq.d 4734 case Intrinsic::x86_sse2_pcmpgt_d: // llvm.x86.sse2.pcmpgt.d 4735 case Intrinsic::x86_sse2_psll_d: // llvm.x86.sse2.psll.d 4736 case Intrinsic::x86_sse2_psra_d: // llvm.x86.sse2.psra.d 4737 case Intrinsic::x86_sse2_psrl_d: // llvm.x86.sse2.psrl.d 4738 case Intrinsic::x86_sse41_pmaxsd: // llvm.x86.sse41.pmaxsd 4739 case Intrinsic::x86_sse41_pmaxud: // llvm.x86.sse41.pmaxud 4740 case Intrinsic::x86_sse41_pminsd: // llvm.x86.sse41.pminsd 4741 case Intrinsic::x86_sse41_pminud: // llvm.x86.sse41.pminud 4742 case Intrinsic::x86_ssse3_phadd_d_128: // llvm.x86.ssse3.phadd.d.128 4743 case Intrinsic::x86_ssse3_phadd_sw_128: // llvm.x86.ssse3.phadd.sw.128 4744 case Intrinsic::x86_ssse3_phsub_d_128: // llvm.x86.ssse3.phsub.d.128 4745 case Intrinsic::x86_ssse3_psign_d_128: // llvm.x86.ssse3.psign.d.128 4746 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::v4i32); 4747 break; 4748 case Intrinsic::ppc_altivec_vperm: // llvm.ppc.altivec.vperm 4749 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v4i32, MVT::v4i32, MVT::v16i8); 4750 break; 4751 case Intrinsic::ppc_altivec_vsel: // llvm.ppc.altivec.vsel 4752 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v4i32, MVT::v4i32, MVT::v4i32); 4753 break; 4754 case Intrinsic::spu_si_mpyh: // llvm.spu.si.mpyh 4755 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v4i32, MVT::v8i16); 4756 break; 4757 case Intrinsic::ppc_altivec_vupkhpx: // llvm.ppc.altivec.vupkhpx 4758 case Intrinsic::ppc_altivec_vupkhsh: // llvm.ppc.altivec.vupkhsh 4759 case Intrinsic::ppc_altivec_vupklpx: // llvm.ppc.altivec.vupklpx 4760 case Intrinsic::ppc_altivec_vupklsh: // llvm.ppc.altivec.vupklsh 4761 case Intrinsic::x86_sse41_pmovsxwd: // llvm.x86.sse41.pmovsxwd 4762 case Intrinsic::x86_sse41_pmovzxwd: // llvm.x86.sse41.pmovzxwd 4763 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v4i32, MVT::v8i16); 4764 break; 4765 case Intrinsic::spu_si_mpyi: // llvm.spu.si.mpyi 4766 case Intrinsic::spu_si_mpyui: // llvm.spu.si.mpyui 4767 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::i16); 4768 break; 4769 case Intrinsic::ppc_altivec_vsum4shs: // llvm.ppc.altivec.vsum4shs 4770 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::v4i32); 4771 break; 4772 case Intrinsic::ppc_altivec_vmulesh: // llvm.ppc.altivec.vmulesh 4773 case Intrinsic::ppc_altivec_vmuleuh: // llvm.ppc.altivec.vmuleuh 4774 case Intrinsic::ppc_altivec_vmulosh: // llvm.ppc.altivec.vmulosh 4775 case Intrinsic::ppc_altivec_vmulouh: // llvm.ppc.altivec.vmulouh 4776 case Intrinsic::spu_si_mpy: // llvm.spu.si.mpy 4777 case Intrinsic::spu_si_mpyhh: // llvm.spu.si.mpyhh 4778 case Intrinsic::spu_si_mpyhha: // llvm.spu.si.mpyhha 4779 case Intrinsic::spu_si_mpyhhau: // llvm.spu.si.mpyhhau 4780 case Intrinsic::spu_si_mpyhhu: // llvm.spu.si.mpyhhu 4781 case Intrinsic::spu_si_mpys: // llvm.spu.si.mpys 4782 case Intrinsic::spu_si_mpyu: // llvm.spu.si.mpyu 4783 case Intrinsic::x86_sse2_pmadd_wd: // llvm.x86.sse2.pmadd.wd 4784 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i16, MVT::v8i16); 4785 break; 4786 case Intrinsic::ppc_altivec_vmsumshm: // llvm.ppc.altivec.vmsumshm 4787 case Intrinsic::ppc_altivec_vmsumshs: // llvm.ppc.altivec.vmsumshs 4788 case Intrinsic::ppc_altivec_vmsumuhm: // llvm.ppc.altivec.vmsumuhm 4789 case Intrinsic::ppc_altivec_vmsumuhs: // llvm.ppc.altivec.vmsumuhs 4790 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v8i16, MVT::v8i16, MVT::v4i32); 4791 break; 4792 case Intrinsic::spu_si_mpya: // llvm.spu.si.mpya 4793 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v4i32, MVT::v8i16, MVT::v8i16, MVT::v8i16); 4794 break; 4795 case Intrinsic::x86_avx_vextractf128_si_256: // llvm.x86.avx.vextractf128.si.256 4796 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v4i32, MVT::v8i32, MVT::i8); 4797 break; 4798 case Intrinsic::x86_avx_loadu_ps_256: // llvm.x86.avx.loadu.ps.256 4799 case Intrinsic::x86_avx_vbroadcastf128_ps_256: // llvm.x86.avx.vbroadcastf128.ps.256 4800 case Intrinsic::x86_avx_vbroadcastss_256: // llvm.x86.avx.vbroadcastss.256 4801 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::iPTR); 4802 break; 4803 case Intrinsic::x86_avx_maskload_ps_256: // llvm.x86.avx.maskload.ps.256 4804 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::iPTR, MVT::v8f32); 4805 break; 4806 case Intrinsic::x86_avx_rcp_ps_256: // llvm.x86.avx.rcp.ps.256 4807 case Intrinsic::x86_avx_rsqrt_ps_256: // llvm.x86.avx.rsqrt.ps.256 4808 case Intrinsic::x86_avx_sqrt_ps_256: // llvm.x86.avx.sqrt.ps.256 4809 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::v8f32); 4810 break; 4811 case Intrinsic::x86_avx_round_ps_256: // llvm.x86.avx.round.ps.256 4812 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::i32); 4813 break; 4814 case Intrinsic::x86_avx_vpermil_ps_256: // llvm.x86.avx.vpermil.ps.256 4815 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::i8); 4816 break; 4817 case Intrinsic::x86_avx_vinsertf128_ps_256: // llvm.x86.avx.vinsertf128.ps.256 4818 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v4f32, MVT::i8); 4819 break; 4820 case Intrinsic::x86_avx_addsub_ps_256: // llvm.x86.avx.addsub.ps.256 4821 case Intrinsic::x86_avx_hadd_ps_256: // llvm.x86.avx.hadd.ps.256 4822 case Intrinsic::x86_avx_hsub_ps_256: // llvm.x86.avx.hsub.ps.256 4823 case Intrinsic::x86_avx_max_ps_256: // llvm.x86.avx.max.ps.256 4824 case Intrinsic::x86_avx_min_ps_256: // llvm.x86.avx.min.ps.256 4825 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::v8f32); 4826 break; 4827 case Intrinsic::x86_avx_blend_ps_256: // llvm.x86.avx.blend.ps.256 4828 case Intrinsic::x86_avx_dp_ps_256: // llvm.x86.avx.dp.ps.256 4829 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::i32); 4830 break; 4831 case Intrinsic::x86_avx_cmp_ps_256: // llvm.x86.avx.cmp.ps.256 4832 case Intrinsic::x86_avx_vperm2f128_ps_256: // llvm.x86.avx.vperm2f128.ps.256 4833 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::i8); 4834 break; 4835 case Intrinsic::x86_avx_blendv_ps_256: // llvm.x86.avx.blendv.ps.256 4836 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8f32, MVT::v8f32, MVT::v8f32, MVT::v8f32); 4837 break; 4838 case Intrinsic::x86_avx_vpermilvar_ps_256: // llvm.x86.avx.vpermilvar.ps.256 4839 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8f32, MVT::v8f32, MVT::v8i32); 4840 break; 4841 case Intrinsic::x86_avx_cvtdq2_ps_256: // llvm.x86.avx.cvtdq2.ps.256 4842 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8f32, MVT::v8i32); 4843 break; 4844 case Intrinsic::ppc_altivec_mfvscr: // llvm.ppc.altivec.mfvscr 4845 VerifyIntrinsicPrototype(ID, IF, 1, 0, MVT::v8i16); 4846 break; 4847 case Intrinsic::ppc_altivec_lvehx: // llvm.ppc.altivec.lvehx 4848 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::iPTR); 4849 break; 4850 case Intrinsic::ppc_altivec_vupkhsb: // llvm.ppc.altivec.vupkhsb 4851 case Intrinsic::ppc_altivec_vupklsb: // llvm.ppc.altivec.vupklsb 4852 case Intrinsic::x86_sse41_pmovsxbw: // llvm.x86.sse41.pmovsxbw 4853 case Intrinsic::x86_sse41_pmovzxbw: // llvm.x86.sse41.pmovzxbw 4854 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::v16i8); 4855 break; 4856 case Intrinsic::ppc_altivec_vmulesb: // llvm.ppc.altivec.vmulesb 4857 case Intrinsic::ppc_altivec_vmuleub: // llvm.ppc.altivec.vmuleub 4858 case Intrinsic::ppc_altivec_vmulosb: // llvm.ppc.altivec.vmulosb 4859 case Intrinsic::ppc_altivec_vmuloub: // llvm.ppc.altivec.vmuloub 4860 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v16i8, MVT::v16i8); 4861 break; 4862 case Intrinsic::ppc_altivec_vpkpx: // llvm.ppc.altivec.vpkpx 4863 case Intrinsic::ppc_altivec_vpkswus: // llvm.ppc.altivec.vpkswus 4864 case Intrinsic::ppc_altivec_vpkuwus: // llvm.ppc.altivec.vpkuwus 4865 case Intrinsic::x86_sse2_packssdw_128: // llvm.x86.sse2.packssdw.128 4866 case Intrinsic::x86_sse41_packusdw: // llvm.x86.sse41.packusdw 4867 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v4i32, MVT::v4i32); 4868 break; 4869 case Intrinsic::x86_sse41_phminposuw: // llvm.x86.sse41.phminposuw 4870 case Intrinsic::x86_ssse3_pabs_w_128: // llvm.x86.ssse3.pabs.w.128 4871 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i16, MVT::v8i16); 4872 break; 4873 case Intrinsic::spu_si_ahi: // llvm.spu.si.ahi 4874 case Intrinsic::spu_si_andhi: // llvm.spu.si.andhi 4875 case Intrinsic::spu_si_ceqhi: // llvm.spu.si.ceqhi 4876 case Intrinsic::spu_si_cgthi: // llvm.spu.si.cgthi 4877 case Intrinsic::spu_si_clgthi: // llvm.spu.si.clgthi 4878 case Intrinsic::spu_si_fsmbi: // llvm.spu.si.fsmbi 4879 case Intrinsic::spu_si_orhi: // llvm.spu.si.orhi 4880 case Intrinsic::spu_si_sfhi: // llvm.spu.si.sfhi 4881 case Intrinsic::spu_si_xorhi: // llvm.spu.si.xorhi 4882 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::i16); 4883 break; 4884 case Intrinsic::spu_si_shlqbi: // llvm.spu.si.shlqbi 4885 case Intrinsic::spu_si_shlqby: // llvm.spu.si.shlqby 4886 case Intrinsic::x86_sse2_pslli_w: // llvm.x86.sse2.pslli.w 4887 case Intrinsic::x86_sse2_psrai_w: // llvm.x86.sse2.psrai.w 4888 case Intrinsic::x86_sse2_psrli_w: // llvm.x86.sse2.psrli.w 4889 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::i32); 4890 break; 4891 case Intrinsic::ppc_altivec_vaddshs: // llvm.ppc.altivec.vaddshs 4892 case Intrinsic::ppc_altivec_vadduhs: // llvm.ppc.altivec.vadduhs 4893 case Intrinsic::ppc_altivec_vavgsh: // llvm.ppc.altivec.vavgsh 4894 case Intrinsic::ppc_altivec_vavguh: // llvm.ppc.altivec.vavguh 4895 case Intrinsic::ppc_altivec_vcmpequh: // llvm.ppc.altivec.vcmpequh 4896 case Intrinsic::ppc_altivec_vcmpgtsh: // llvm.ppc.altivec.vcmpgtsh 4897 case Intrinsic::ppc_altivec_vcmpgtuh: // llvm.ppc.altivec.vcmpgtuh 4898 case Intrinsic::ppc_altivec_vmaxsh: // llvm.ppc.altivec.vmaxsh 4899 case Intrinsic::ppc_altivec_vmaxuh: // llvm.ppc.altivec.vmaxuh 4900 case Intrinsic::ppc_altivec_vminsh: // llvm.ppc.altivec.vminsh 4901 case Intrinsic::ppc_altivec_vminuh: // llvm.ppc.altivec.vminuh 4902 case Intrinsic::ppc_altivec_vrlh: // llvm.ppc.altivec.vrlh 4903 case Intrinsic::ppc_altivec_vslh: // llvm.ppc.altivec.vslh 4904 case Intrinsic::ppc_altivec_vsrah: // llvm.ppc.altivec.vsrah 4905 case Intrinsic::ppc_altivec_vsrh: // llvm.ppc.altivec.vsrh 4906 case Intrinsic::ppc_altivec_vsubshs: // llvm.ppc.altivec.vsubshs 4907 case Intrinsic::ppc_altivec_vsubuhs: // llvm.ppc.altivec.vsubuhs 4908 case Intrinsic::spu_si_ah: // llvm.spu.si.ah 4909 case Intrinsic::spu_si_ceqh: // llvm.spu.si.ceqh 4910 case Intrinsic::spu_si_cgth: // llvm.spu.si.cgth 4911 case Intrinsic::spu_si_clgth: // llvm.spu.si.clgth 4912 case Intrinsic::spu_si_sfh: // llvm.spu.si.sfh 4913 case Intrinsic::x86_sse2_padds_w: // llvm.x86.sse2.padds.w 4914 case Intrinsic::x86_sse2_paddus_w: // llvm.x86.sse2.paddus.w 4915 case Intrinsic::x86_sse2_pavg_w: // llvm.x86.sse2.pavg.w 4916 case Intrinsic::x86_sse2_pcmpeq_w: // llvm.x86.sse2.pcmpeq.w 4917 case Intrinsic::x86_sse2_pcmpgt_w: // llvm.x86.sse2.pcmpgt.w 4918 case Intrinsic::x86_sse2_pmaxs_w: // llvm.x86.sse2.pmaxs.w 4919 case Intrinsic::x86_sse2_pmins_w: // llvm.x86.sse2.pmins.w 4920 case Intrinsic::x86_sse2_pmulh_w: // llvm.x86.sse2.pmulh.w 4921 case Intrinsic::x86_sse2_pmulhu_w: // llvm.x86.sse2.pmulhu.w 4922 case Intrinsic::x86_sse2_psll_w: // llvm.x86.sse2.psll.w 4923 case Intrinsic::x86_sse2_psra_w: // llvm.x86.sse2.psra.w 4924 case Intrinsic::x86_sse2_psrl_w: // llvm.x86.sse2.psrl.w 4925 case Intrinsic::x86_sse2_psubs_w: // llvm.x86.sse2.psubs.w 4926 case Intrinsic::x86_sse2_psubus_w: // llvm.x86.sse2.psubus.w 4927 case Intrinsic::x86_sse41_pmaxuw: // llvm.x86.sse41.pmaxuw 4928 case Intrinsic::x86_sse41_pminuw: // llvm.x86.sse41.pminuw 4929 case Intrinsic::x86_ssse3_phadd_w_128: // llvm.x86.ssse3.phadd.w.128 4930 case Intrinsic::x86_ssse3_phsub_sw_128: // llvm.x86.ssse3.phsub.sw.128 4931 case Intrinsic::x86_ssse3_phsub_w_128: // llvm.x86.ssse3.phsub.w.128 4932 case Intrinsic::x86_ssse3_pmadd_ub_sw_128: // llvm.x86.ssse3.pmadd.ub.sw.128 4933 case Intrinsic::x86_ssse3_pmul_hr_sw_128: // llvm.x86.ssse3.pmul.hr.sw.128 4934 case Intrinsic::x86_ssse3_psign_w_128: // llvm.x86.ssse3.psign.w.128 4935 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i16, MVT::v8i16, MVT::v8i16); 4936 break; 4937 case Intrinsic::x86_sse41_pblendw: // llvm.x86.sse41.pblendw 4938 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i16, MVT::v8i16, MVT::v8i16, MVT::i32); 4939 break; 4940 case Intrinsic::ppc_altivec_vmhaddshs: // llvm.ppc.altivec.vmhaddshs 4941 case Intrinsic::ppc_altivec_vmhraddshs: // llvm.ppc.altivec.vmhraddshs 4942 case Intrinsic::ppc_altivec_vmladduhm: // llvm.ppc.altivec.vmladduhm 4943 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i16, MVT::v8i16, MVT::v8i16, MVT::v8i16); 4944 break; 4945 case Intrinsic::x86_avx_cvt_ps2dq_256: // llvm.x86.avx.cvt.ps2dq.256 4946 case Intrinsic::x86_avx_cvtt_ps2dq_256: // llvm.x86.avx.cvtt.ps2dq.256 4947 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i32, MVT::v8f32); 4948 break; 4949 case Intrinsic::x86_avx_vinsertf128_si_256: // llvm.x86.avx.vinsertf128.si.256 4950 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i32, MVT::v8i32, MVT::v4i32, MVT::i8); 4951 break; 4952 case Intrinsic::x86_avx_vperm2f128_si_256: // llvm.x86.avx.vperm2f128.si.256 4953 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i32, MVT::v8i32, MVT::v8i32, MVT::i8); 4954 break; 4955 case Intrinsic::x86_mmx_vec_init_b: // llvm.x86.mmx.vec.init.b 4956 VerifyIntrinsicPrototype(ID, IF, 1, 8, MVT::v8i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8, MVT::i8); 4957 break; 4958 case Intrinsic::x86_mmx_packsswb: // llvm.x86.mmx.packsswb 4959 case Intrinsic::x86_mmx_packuswb: // llvm.x86.mmx.packuswb 4960 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i8, MVT::v4i16, MVT::v4i16); 4961 break; 4962 case Intrinsic::x86_ssse3_pabs_b: // llvm.x86.ssse3.pabs.b 4963 VerifyIntrinsicPrototype(ID, IF, 1, 1, MVT::v8i8, MVT::v8i8); 4964 break; 4965 case Intrinsic::arm_neon_vtbl1: // llvm.arm.neon.vtbl1 4966 case Intrinsic::x86_mmx_padd_b: // llvm.x86.mmx.padd.b 4967 case Intrinsic::x86_mmx_padds_b: // llvm.x86.mmx.padds.b 4968 case Intrinsic::x86_mmx_paddus_b: // llvm.x86.mmx.paddus.b 4969 case Intrinsic::x86_mmx_pavg_b: // llvm.x86.mmx.pavg.b 4970 case Intrinsic::x86_mmx_pcmpeq_b: // llvm.x86.mmx.pcmpeq.b 4971 case Intrinsic::x86_mmx_pcmpgt_b: // llvm.x86.mmx.pcmpgt.b 4972 case Intrinsic::x86_mmx_pmaxu_b: // llvm.x86.mmx.pmaxu.b 4973 case Intrinsic::x86_mmx_pminu_b: // llvm.x86.mmx.pminu.b 4974 case Intrinsic::x86_mmx_psub_b: // llvm.x86.mmx.psub.b 4975 case Intrinsic::x86_mmx_psubs_b: // llvm.x86.mmx.psubs.b 4976 case Intrinsic::x86_mmx_psubus_b: // llvm.x86.mmx.psubus.b 4977 case Intrinsic::x86_mmx_punpckhbw: // llvm.x86.mmx.punpckhbw 4978 case Intrinsic::x86_mmx_punpcklbw: // llvm.x86.mmx.punpcklbw 4979 case Intrinsic::x86_ssse3_pshuf_b: // llvm.x86.ssse3.pshuf.b 4980 case Intrinsic::x86_ssse3_psign_b: // llvm.x86.ssse3.psign.b 4981 VerifyIntrinsicPrototype(ID, IF, 1, 2, MVT::v8i8, MVT::v8i8, MVT::v8i8); 4982 break; 4983 case Intrinsic::arm_neon_vtbl2: // llvm.arm.neon.vtbl2 4984 case Intrinsic::arm_neon_vtbx1: // llvm.arm.neon.vtbx1 4985 VerifyIntrinsicPrototype(ID, IF, 1, 3, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8); 4986 break; 4987 case Intrinsic::arm_neon_vtbl3: // llvm.arm.neon.vtbl3 4988 case Intrinsic::arm_neon_vtbx2: // llvm.arm.neon.vtbx2 4989 VerifyIntrinsicPrototype(ID, IF, 1, 4, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8); 4990 break; 4991 case Intrinsic::arm_neon_vtbl4: // llvm.arm.neon.vtbl4 4992 case Intrinsic::arm_neon_vtbx3: // llvm.arm.neon.vtbx3 4993 VerifyIntrinsicPrototype(ID, IF, 1, 5, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8); 4994 break; 4995 case Intrinsic::arm_neon_vtbx4: // llvm.arm.neon.vtbx4 4996 VerifyIntrinsicPrototype(ID, IF, 1, 6, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8, MVT::v8i8); 4997 break; 4998 } 4999#endif 5000 5001// Code for generating Intrinsic function declarations. 5002#ifdef GET_INTRINSIC_GENERATOR 5003 switch (id) { 5004 default: assert(0 && "Invalid intrinsic!"); 5005 case Intrinsic::eh_unwind_init: // llvm.eh.unwind.init 5006 case Intrinsic::ppc_altivec_dssall: // llvm.ppc.altivec.dssall 5007 case Intrinsic::ppc_sync: // llvm.ppc.sync 5008 case Intrinsic::trap: // llvm.trap 5009 case Intrinsic::x86_avx_vzeroall: // llvm.x86.avx.vzeroall 5010 case Intrinsic::x86_avx_vzeroupper: // llvm.x86.avx.vzeroupper 5011 case Intrinsic::x86_mmx_emms: // llvm.x86.mmx.emms 5012 case Intrinsic::x86_mmx_femms: // llvm.x86.mmx.femms 5013 case Intrinsic::x86_sse2_lfence: // llvm.x86.sse2.lfence 5014 case Intrinsic::x86_sse2_mfence: // llvm.x86.sse2.mfence 5015 case Intrinsic::x86_sse_sfence: // llvm.x86.sse.sfence 5016 ResultTy = Type::getVoidTy(Context); 5017 break; 5018 case Intrinsic::memcpy: // llvm.memcpy 5019 case Intrinsic::memmove: // llvm.memmove 5020 ResultTy = Type::getVoidTy(Context); 5021 ArgTys.push_back((0 < numTys) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8))); 5022 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(IntegerType::get(Context, 8))); 5023 ArgTys.push_back(Tys[2]); 5024 ArgTys.push_back(IntegerType::get(Context, 32)); 5025 ArgTys.push_back(IntegerType::get(Context, 1)); 5026 break; 5027 case Intrinsic::memset: // llvm.memset 5028 ResultTy = Type::getVoidTy(Context); 5029 ArgTys.push_back((0 < numTys) ? Tys[0] : PointerType::getUnqual(IntegerType::get(Context, 8))); 5030 ArgTys.push_back(IntegerType::get(Context, 8)); 5031 ArgTys.push_back(Tys[1]); 5032 ArgTys.push_back(IntegerType::get(Context, 32)); 5033 ArgTys.push_back(IntegerType::get(Context, 1)); 5034 break; 5035 case Intrinsic::invariant_end: // llvm.invariant.end 5036 ResultTy = Type::getVoidTy(Context); 5037 ArgTys.push_back(PointerType::getUnqual(StructType::get(Context))); 5038 ArgTys.push_back(IntegerType::get(Context, 64)); 5039 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5040 break; 5041 case Intrinsic::memory_barrier: // llvm.memory.barrier 5042 ResultTy = Type::getVoidTy(Context); 5043 ArgTys.push_back(IntegerType::get(Context, 1)); 5044 ArgTys.push_back(IntegerType::get(Context, 1)); 5045 ArgTys.push_back(IntegerType::get(Context, 1)); 5046 ArgTys.push_back(IntegerType::get(Context, 1)); 5047 ArgTys.push_back(IntegerType::get(Context, 1)); 5048 break; 5049 case Intrinsic::arm_set_fpscr: // llvm.arm.set.fpscr 5050 case Intrinsic::eh_sjlj_callsite: // llvm.eh.sjlj.callsite 5051 case Intrinsic::pcmarker: // llvm.pcmarker 5052 case Intrinsic::ppc_altivec_dss: // llvm.ppc.altivec.dss 5053 ResultTy = Type::getVoidTy(Context); 5054 ArgTys.push_back(IntegerType::get(Context, 32)); 5055 break; 5056 case Intrinsic::x86_sse3_mwait: // llvm.x86.sse3.mwait 5057 ResultTy = Type::getVoidTy(Context); 5058 ArgTys.push_back(IntegerType::get(Context, 32)); 5059 ArgTys.push_back(IntegerType::get(Context, 32)); 5060 break; 5061 case Intrinsic::eh_return_i32: // llvm.eh.return.i32 5062 ResultTy = Type::getVoidTy(Context); 5063 ArgTys.push_back(IntegerType::get(Context, 32)); 5064 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5065 break; 5066 case Intrinsic::eh_return_i64: // llvm.eh.return.i64 5067 case Intrinsic::lifetime_end: // llvm.lifetime.end 5068 case Intrinsic::lifetime_start: // llvm.lifetime.start 5069 ResultTy = Type::getVoidTy(Context); 5070 ArgTys.push_back(IntegerType::get(Context, 64)); 5071 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5072 break; 5073 case Intrinsic::x86_int: // llvm.x86.int 5074 ResultTy = Type::getVoidTy(Context); 5075 ArgTys.push_back(IntegerType::get(Context, 8)); 5076 break; 5077 case Intrinsic::dbg_value: // llvm.dbg.value 5078 ResultTy = Type::getVoidTy(Context); 5079 ArgTys.push_back(Type::getMetadataTy(Context)); 5080 ArgTys.push_back(IntegerType::get(Context, 64)); 5081 ArgTys.push_back(Type::getMetadataTy(Context)); 5082 break; 5083 case Intrinsic::dbg_declare: // llvm.dbg.declare 5084 ResultTy = Type::getVoidTy(Context); 5085 ArgTys.push_back(Type::getMetadataTy(Context)); 5086 ArgTys.push_back(Type::getMetadataTy(Context)); 5087 break; 5088 case Intrinsic::eh_sjlj_longjmp: // llvm.eh.sjlj.longjmp 5089 case Intrinsic::ppc_dcba: // llvm.ppc.dcba 5090 case Intrinsic::ppc_dcbf: // llvm.ppc.dcbf 5091 case Intrinsic::ppc_dcbi: // llvm.ppc.dcbi 5092 case Intrinsic::ppc_dcbst: // llvm.ppc.dcbst 5093 case Intrinsic::ppc_dcbt: // llvm.ppc.dcbt 5094 case Intrinsic::ppc_dcbtst: // llvm.ppc.dcbtst 5095 case Intrinsic::ppc_dcbz: // llvm.ppc.dcbz 5096 case Intrinsic::ppc_dcbzl: // llvm.ppc.dcbzl 5097 case Intrinsic::stackrestore: // llvm.stackrestore 5098 case Intrinsic::vaend: // llvm.va_end 5099 case Intrinsic::vastart: // llvm.va_start 5100 case Intrinsic::x86_sse2_clflush: // llvm.x86.sse2.clflush 5101 case Intrinsic::x86_sse_ldmxcsr: // llvm.x86.sse.ldmxcsr 5102 case Intrinsic::x86_sse_stmxcsr: // llvm.x86.sse.stmxcsr 5103 ResultTy = Type::getVoidTy(Context); 5104 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5105 break; 5106 case Intrinsic::arm_neon_vst2: // llvm.arm.neon.vst2 5107 ResultTy = Type::getVoidTy(Context); 5108 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5109 ArgTys.push_back(Tys[0]); 5110 ArgTys.push_back(Tys[0]); 5111 ArgTys.push_back(IntegerType::get(Context, 32)); 5112 break; 5113 case Intrinsic::arm_neon_vst3: // llvm.arm.neon.vst3 5114 ResultTy = Type::getVoidTy(Context); 5115 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5116 ArgTys.push_back(Tys[0]); 5117 ArgTys.push_back(Tys[0]); 5118 ArgTys.push_back(Tys[0]); 5119 ArgTys.push_back(IntegerType::get(Context, 32)); 5120 break; 5121 case Intrinsic::arm_neon_vst4: // llvm.arm.neon.vst4 5122 ResultTy = Type::getVoidTy(Context); 5123 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5124 ArgTys.push_back(Tys[0]); 5125 ArgTys.push_back(Tys[0]); 5126 ArgTys.push_back(Tys[0]); 5127 ArgTys.push_back(Tys[0]); 5128 ArgTys.push_back(IntegerType::get(Context, 32)); 5129 break; 5130 case Intrinsic::arm_neon_vst2lane: // llvm.arm.neon.vst2lane 5131 ResultTy = Type::getVoidTy(Context); 5132 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5133 ArgTys.push_back(Tys[0]); 5134 ArgTys.push_back(Tys[0]); 5135 ArgTys.push_back(IntegerType::get(Context, 32)); 5136 ArgTys.push_back(IntegerType::get(Context, 32)); 5137 break; 5138 case Intrinsic::arm_neon_vst3lane: // llvm.arm.neon.vst3lane 5139 ResultTy = Type::getVoidTy(Context); 5140 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5141 ArgTys.push_back(Tys[0]); 5142 ArgTys.push_back(Tys[0]); 5143 ArgTys.push_back(Tys[0]); 5144 ArgTys.push_back(IntegerType::get(Context, 32)); 5145 ArgTys.push_back(IntegerType::get(Context, 32)); 5146 break; 5147 case Intrinsic::arm_neon_vst4lane: // llvm.arm.neon.vst4lane 5148 ResultTy = Type::getVoidTy(Context); 5149 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5150 ArgTys.push_back(Tys[0]); 5151 ArgTys.push_back(Tys[0]); 5152 ArgTys.push_back(Tys[0]); 5153 ArgTys.push_back(Tys[0]); 5154 ArgTys.push_back(IntegerType::get(Context, 32)); 5155 ArgTys.push_back(IntegerType::get(Context, 32)); 5156 break; 5157 case Intrinsic::arm_neon_vst1: // llvm.arm.neon.vst1 5158 ResultTy = Type::getVoidTy(Context); 5159 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5160 ArgTys.push_back(Tys[0]); 5161 ArgTys.push_back(IntegerType::get(Context, 32)); 5162 break; 5163 case Intrinsic::longjmp: // llvm.longjmp 5164 case Intrinsic::siglongjmp: // llvm.siglongjmp 5165 case Intrinsic::x86_sse2_movnt_i: // llvm.x86.sse2.movnt.i 5166 ResultTy = Type::getVoidTy(Context); 5167 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5168 ArgTys.push_back(IntegerType::get(Context, 32)); 5169 break; 5170 case Intrinsic::ppc_altivec_dst: // llvm.ppc.altivec.dst 5171 case Intrinsic::ppc_altivec_dstst: // llvm.ppc.altivec.dstst 5172 case Intrinsic::ppc_altivec_dststt: // llvm.ppc.altivec.dststt 5173 case Intrinsic::ppc_altivec_dstt: // llvm.ppc.altivec.dstt 5174 case Intrinsic::prefetch: // llvm.prefetch 5175 case Intrinsic::x86_sse3_monitor: // llvm.x86.sse3.monitor 5176 ResultTy = Type::getVoidTy(Context); 5177 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5178 ArgTys.push_back(IntegerType::get(Context, 32)); 5179 ArgTys.push_back(IntegerType::get(Context, 32)); 5180 break; 5181 case Intrinsic::vacopy: // llvm.va_copy 5182 ResultTy = Type::getVoidTy(Context); 5183 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5184 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5185 break; 5186 case Intrinsic::var_annotation: // llvm.var.annotation 5187 ResultTy = Type::getVoidTy(Context); 5188 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5189 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5190 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5191 ArgTys.push_back(IntegerType::get(Context, 32)); 5192 break; 5193 case Intrinsic::gcwrite: // llvm.gcwrite 5194 ResultTy = Type::getVoidTy(Context); 5195 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5196 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5197 ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8)))); 5198 break; 5199 case Intrinsic::stackprotector: // llvm.stackprotector 5200 ResultTy = Type::getVoidTy(Context); 5201 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5202 ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8)))); 5203 break; 5204 case Intrinsic::x86_sse2_storeu_dq: // llvm.x86.sse2.storeu.dq 5205 ResultTy = Type::getVoidTy(Context); 5206 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5207 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5208 break; 5209 case Intrinsic::x86_mmx_movnt_dq: // llvm.x86.mmx.movnt.dq 5210 ResultTy = Type::getVoidTy(Context); 5211 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5212 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1)); 5213 break; 5214 case Intrinsic::x86_sse2_movnt_pd: // llvm.x86.sse2.movnt.pd 5215 case Intrinsic::x86_sse2_storeu_pd: // llvm.x86.sse2.storeu.pd 5216 ResultTy = Type::getVoidTy(Context); 5217 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5218 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 5219 break; 5220 case Intrinsic::x86_avx_maskstore_pd: // llvm.x86.avx.maskstore.pd 5221 ResultTy = Type::getVoidTy(Context); 5222 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5223 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 5224 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 5225 break; 5226 case Intrinsic::x86_sse2_movnt_dq: // llvm.x86.sse2.movnt.dq 5227 ResultTy = Type::getVoidTy(Context); 5228 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5229 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2)); 5230 break; 5231 case Intrinsic::x86_avx_storeu_dq_256: // llvm.x86.avx.storeu.dq.256 5232 ResultTy = Type::getVoidTy(Context); 5233 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5234 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 32)); 5235 break; 5236 case Intrinsic::x86_sse_movnt_ps: // llvm.x86.sse.movnt.ps 5237 case Intrinsic::x86_sse_storeu_ps: // llvm.x86.sse.storeu.ps 5238 ResultTy = Type::getVoidTy(Context); 5239 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5240 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5241 break; 5242 case Intrinsic::x86_avx_maskstore_ps: // llvm.x86.avx.maskstore.ps 5243 ResultTy = Type::getVoidTy(Context); 5244 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5245 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5246 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5247 break; 5248 case Intrinsic::x86_avx_movnt_pd_256: // llvm.x86.avx.movnt.pd.256 5249 case Intrinsic::x86_avx_storeu_pd_256: // llvm.x86.avx.storeu.pd.256 5250 ResultTy = Type::getVoidTy(Context); 5251 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5252 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 5253 break; 5254 case Intrinsic::x86_avx_maskstore_pd_256: // llvm.x86.avx.maskstore.pd.256 5255 ResultTy = Type::getVoidTy(Context); 5256 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5257 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 5258 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 5259 break; 5260 case Intrinsic::x86_sse2_storel_dq: // llvm.x86.sse2.storel.dq 5261 ResultTy = Type::getVoidTy(Context); 5262 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5263 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 5264 break; 5265 case Intrinsic::x86_avx_movnt_dq_256: // llvm.x86.avx.movnt.dq.256 5266 ResultTy = Type::getVoidTy(Context); 5267 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5268 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4)); 5269 break; 5270 case Intrinsic::x86_avx_movnt_ps_256: // llvm.x86.avx.movnt.ps.256 5271 case Intrinsic::x86_avx_storeu_ps_256: // llvm.x86.avx.storeu.ps.256 5272 ResultTy = Type::getVoidTy(Context); 5273 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5274 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 5275 break; 5276 case Intrinsic::x86_avx_maskstore_ps_256: // llvm.x86.avx.maskstore.ps.256 5277 ResultTy = Type::getVoidTy(Context); 5278 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5279 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 5280 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 5281 break; 5282 case Intrinsic::gcroot: // llvm.gcroot 5283 ResultTy = Type::getVoidTy(Context); 5284 ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8)))); 5285 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5286 break; 5287 case Intrinsic::ppc_altivec_stvebx: // llvm.ppc.altivec.stvebx 5288 ResultTy = Type::getVoidTy(Context); 5289 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5290 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5291 break; 5292 case Intrinsic::x86_sse2_maskmov_dqu: // llvm.x86.sse2.maskmov.dqu 5293 ResultTy = Type::getVoidTy(Context); 5294 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5295 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5296 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5297 break; 5298 case Intrinsic::ppc_altivec_mtvscr: // llvm.ppc.altivec.mtvscr 5299 ResultTy = Type::getVoidTy(Context); 5300 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 5301 break; 5302 case Intrinsic::ppc_altivec_stvewx: // llvm.ppc.altivec.stvewx 5303 case Intrinsic::ppc_altivec_stvx: // llvm.ppc.altivec.stvx 5304 case Intrinsic::ppc_altivec_stvxl: // llvm.ppc.altivec.stvxl 5305 ResultTy = Type::getVoidTy(Context); 5306 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 5307 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5308 break; 5309 case Intrinsic::ppc_altivec_stvehx: // llvm.ppc.altivec.stvehx 5310 ResultTy = Type::getVoidTy(Context); 5311 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 5312 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5313 break; 5314 case Intrinsic::x86_mmx_maskmovq: // llvm.x86.mmx.maskmovq 5315 ResultTy = Type::getVoidTy(Context); 5316 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 5317 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 5318 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5319 break; 5320 case Intrinsic::ptr_annotation: // llvm.ptr.annotation 5321 ResultTy = (0 < numTys) ? Tys[0] : PointerType::getUnqual(Tys[0]); 5322 ArgTys.push_back(Tys[0]); 5323 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5324 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5325 ArgTys.push_back(IntegerType::get(Context, 32)); 5326 break; 5327 case Intrinsic::sin: // llvm.sin 5328 ResultTy = Tys[0]; 5329 ArgTys.push_back(Tys[0]); 5330 break; 5331 case Intrinsic::cos: // llvm.cos 5332 ResultTy = Tys[0]; 5333 ArgTys.push_back(Tys[0]); 5334 break; 5335 case Intrinsic::pow: // llvm.pow 5336 ResultTy = Tys[0]; 5337 ArgTys.push_back(Tys[0]); 5338 ArgTys.push_back(Tys[0]); 5339 break; 5340 case Intrinsic::log: // llvm.log 5341 ResultTy = Tys[0]; 5342 ArgTys.push_back(Tys[0]); 5343 break; 5344 case Intrinsic::log10: // llvm.log10 5345 ResultTy = Tys[0]; 5346 ArgTys.push_back(Tys[0]); 5347 break; 5348 case Intrinsic::log2: // llvm.log2 5349 ResultTy = Tys[0]; 5350 ArgTys.push_back(Tys[0]); 5351 break; 5352 case Intrinsic::exp: // llvm.exp 5353 ResultTy = Tys[0]; 5354 ArgTys.push_back(Tys[0]); 5355 break; 5356 case Intrinsic::exp2: // llvm.exp2 5357 ResultTy = Tys[0]; 5358 ArgTys.push_back(Tys[0]); 5359 break; 5360 case Intrinsic::sqrt: // llvm.sqrt 5361 ResultTy = Tys[0]; 5362 ArgTys.push_back(Tys[0]); 5363 break; 5364 case Intrinsic::powi: // llvm.powi 5365 ResultTy = Tys[0]; 5366 ArgTys.push_back(Tys[0]); 5367 ArgTys.push_back(IntegerType::get(Context, 32)); 5368 break; 5369 case Intrinsic::convertff: // llvm.convertff 5370 ResultTy = Tys[0]; 5371 ArgTys.push_back(Tys[1]); 5372 ArgTys.push_back(IntegerType::get(Context, 32)); 5373 ArgTys.push_back(IntegerType::get(Context, 32)); 5374 break; 5375 case Intrinsic::arm_neon_vcvtfxs2fp: // llvm.arm.neon.vcvtfxs2fp 5376 case Intrinsic::arm_neon_vcvtfxu2fp: // llvm.arm.neon.vcvtfxu2fp 5377 ResultTy = Tys[0]; 5378 ArgTys.push_back(Tys[1]); 5379 ArgTys.push_back(IntegerType::get(Context, 32)); 5380 break; 5381 case Intrinsic::convertfsi: // llvm.convertfsi 5382 case Intrinsic::convertfui: // llvm.convertfui 5383 ResultTy = Tys[0]; 5384 ArgTys.push_back(Tys[1]); 5385 ArgTys.push_back(IntegerType::get(Context, 32)); 5386 ArgTys.push_back(IntegerType::get(Context, 32)); 5387 break; 5388 case Intrinsic::bswap: // llvm.bswap 5389 ResultTy = Tys[0]; 5390 ArgTys.push_back(Tys[0]); 5391 break; 5392 case Intrinsic::ctpop: // llvm.ctpop 5393 ResultTy = Tys[0]; 5394 ArgTys.push_back(Tys[0]); 5395 break; 5396 case Intrinsic::ctlz: // llvm.ctlz 5397 ResultTy = Tys[0]; 5398 ArgTys.push_back(Tys[0]); 5399 break; 5400 case Intrinsic::cttz: // llvm.cttz 5401 ResultTy = Tys[0]; 5402 ArgTys.push_back(Tys[0]); 5403 break; 5404 case Intrinsic::annotation: // llvm.annotation 5405 ResultTy = Tys[0]; 5406 ArgTys.push_back(Tys[0]); 5407 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5408 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5409 ArgTys.push_back(IntegerType::get(Context, 32)); 5410 break; 5411 case Intrinsic::atomic_cmp_swap: // llvm.atomic.cmp.swap 5412 ResultTy = Tys[0]; 5413 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5414 ArgTys.push_back(Tys[0]); 5415 ArgTys.push_back(Tys[0]); 5416 break; 5417 case Intrinsic::atomic_load_add: // llvm.atomic.load.add 5418 ResultTy = Tys[0]; 5419 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5420 ArgTys.push_back(Tys[0]); 5421 break; 5422 case Intrinsic::atomic_swap: // llvm.atomic.swap 5423 ResultTy = Tys[0]; 5424 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5425 ArgTys.push_back(Tys[0]); 5426 break; 5427 case Intrinsic::atomic_load_sub: // llvm.atomic.load.sub 5428 ResultTy = Tys[0]; 5429 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5430 ArgTys.push_back(Tys[0]); 5431 break; 5432 case Intrinsic::atomic_load_and: // llvm.atomic.load.and 5433 ResultTy = Tys[0]; 5434 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5435 ArgTys.push_back(Tys[0]); 5436 break; 5437 case Intrinsic::atomic_load_or: // llvm.atomic.load.or 5438 ResultTy = Tys[0]; 5439 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5440 ArgTys.push_back(Tys[0]); 5441 break; 5442 case Intrinsic::atomic_load_xor: // llvm.atomic.load.xor 5443 ResultTy = Tys[0]; 5444 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5445 ArgTys.push_back(Tys[0]); 5446 break; 5447 case Intrinsic::atomic_load_nand: // llvm.atomic.load.nand 5448 ResultTy = Tys[0]; 5449 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5450 ArgTys.push_back(Tys[0]); 5451 break; 5452 case Intrinsic::atomic_load_min: // llvm.atomic.load.min 5453 ResultTy = Tys[0]; 5454 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5455 ArgTys.push_back(Tys[0]); 5456 break; 5457 case Intrinsic::atomic_load_max: // llvm.atomic.load.max 5458 ResultTy = Tys[0]; 5459 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5460 ArgTys.push_back(Tys[0]); 5461 break; 5462 case Intrinsic::atomic_load_umin: // llvm.atomic.load.umin 5463 ResultTy = Tys[0]; 5464 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5465 ArgTys.push_back(Tys[0]); 5466 break; 5467 case Intrinsic::atomic_load_umax: // llvm.atomic.load.umax 5468 ResultTy = Tys[0]; 5469 ArgTys.push_back((1 < numTys) ? Tys[1] : PointerType::getUnqual(Tys[0])); 5470 ArgTys.push_back(Tys[0]); 5471 break; 5472 case Intrinsic::arm_neon_vcvtfp2fxs: // llvm.arm.neon.vcvtfp2fxs 5473 case Intrinsic::arm_neon_vcvtfp2fxu: // llvm.arm.neon.vcvtfp2fxu 5474 ResultTy = Tys[0]; 5475 ArgTys.push_back(Tys[1]); 5476 ArgTys.push_back(IntegerType::get(Context, 32)); 5477 break; 5478 case Intrinsic::convertsif: // llvm.convertsif 5479 case Intrinsic::convertuif: // llvm.convertuif 5480 ResultTy = Tys[0]; 5481 ArgTys.push_back(Tys[1]); 5482 ArgTys.push_back(IntegerType::get(Context, 32)); 5483 ArgTys.push_back(IntegerType::get(Context, 32)); 5484 break; 5485 case Intrinsic::convertss: // llvm.convertss 5486 case Intrinsic::convertsu: // llvm.convertsu 5487 case Intrinsic::convertus: // llvm.convertus 5488 case Intrinsic::convertuu: // llvm.convertuu 5489 ResultTy = Tys[0]; 5490 ArgTys.push_back(Tys[1]); 5491 ArgTys.push_back(IntegerType::get(Context, 32)); 5492 ArgTys.push_back(IntegerType::get(Context, 32)); 5493 break; 5494 case Intrinsic::objectsize: // llvm.objectsize 5495 ResultTy = Tys[0]; 5496 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5497 ArgTys.push_back(IntegerType::get(Context, 1)); 5498 break; 5499 case Intrinsic::sadd_with_overflow: // llvm.sadd.with.overflow 5500 ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1), NULL); 5501 ArgTys.push_back(Tys[0]); 5502 ArgTys.push_back(Tys[0]); 5503 break; 5504 case Intrinsic::uadd_with_overflow: // llvm.uadd.with.overflow 5505 ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1), NULL); 5506 ArgTys.push_back(Tys[0]); 5507 ArgTys.push_back(Tys[0]); 5508 break; 5509 case Intrinsic::ssub_with_overflow: // llvm.ssub.with.overflow 5510 ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1), NULL); 5511 ArgTys.push_back(Tys[0]); 5512 ArgTys.push_back(Tys[0]); 5513 break; 5514 case Intrinsic::usub_with_overflow: // llvm.usub.with.overflow 5515 ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1), NULL); 5516 ArgTys.push_back(Tys[0]); 5517 ArgTys.push_back(Tys[0]); 5518 break; 5519 case Intrinsic::smul_with_overflow: // llvm.smul.with.overflow 5520 ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1), NULL); 5521 ArgTys.push_back(Tys[0]); 5522 ArgTys.push_back(Tys[0]); 5523 break; 5524 case Intrinsic::umul_with_overflow: // llvm.umul.with.overflow 5525 ResultTy = StructType::get(Context, Tys[0], IntegerType::get(Context, 1), NULL); 5526 ArgTys.push_back(Tys[0]); 5527 ArgTys.push_back(Tys[0]); 5528 break; 5529 case Intrinsic::arm_neon_vqdmlal: // llvm.arm.neon.vqdmlal 5530 case Intrinsic::arm_neon_vqdmlsl: // llvm.arm.neon.vqdmlsl 5531 ResultTy = Tys[0]; 5532 ArgTys.push_back(Tys[0]); 5533 ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0]))); 5534 ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0]))); 5535 break; 5536 case Intrinsic::arm_neon_vpadals: // llvm.arm.neon.vpadals 5537 ResultTy = Tys[0]; 5538 ArgTys.push_back(Tys[0]); 5539 ArgTys.push_back(Tys[1]); 5540 break; 5541 case Intrinsic::arm_neon_vpadalu: // llvm.arm.neon.vpadalu 5542 ResultTy = Tys[0]; 5543 ArgTys.push_back(Tys[0]); 5544 ArgTys.push_back(Tys[1]); 5545 break; 5546 case Intrinsic::arm_neon_vabs: // llvm.arm.neon.vabs 5547 case Intrinsic::arm_neon_vcls: // llvm.arm.neon.vcls 5548 case Intrinsic::arm_neon_vclz: // llvm.arm.neon.vclz 5549 case Intrinsic::arm_neon_vcnt: // llvm.arm.neon.vcnt 5550 case Intrinsic::arm_neon_vqabs: // llvm.arm.neon.vqabs 5551 case Intrinsic::arm_neon_vqneg: // llvm.arm.neon.vqneg 5552 case Intrinsic::arm_neon_vrecpe: // llvm.arm.neon.vrecpe 5553 case Intrinsic::arm_neon_vrsqrte: // llvm.arm.neon.vrsqrte 5554 ResultTy = Tys[0]; 5555 ArgTys.push_back(Tys[0]); 5556 break; 5557 case Intrinsic::arm_neon_vqmovns: // llvm.arm.neon.vqmovns 5558 case Intrinsic::arm_neon_vqmovnsu: // llvm.arm.neon.vqmovnsu 5559 case Intrinsic::arm_neon_vqmovnu: // llvm.arm.neon.vqmovnu 5560 ResultTy = Tys[0]; 5561 ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0]))); 5562 break; 5563 case Intrinsic::arm_neon_vabds: // llvm.arm.neon.vabds 5564 case Intrinsic::arm_neon_vabdu: // llvm.arm.neon.vabdu 5565 case Intrinsic::arm_neon_vhadds: // llvm.arm.neon.vhadds 5566 case Intrinsic::arm_neon_vhaddu: // llvm.arm.neon.vhaddu 5567 case Intrinsic::arm_neon_vhsubs: // llvm.arm.neon.vhsubs 5568 case Intrinsic::arm_neon_vhsubu: // llvm.arm.neon.vhsubu 5569 case Intrinsic::arm_neon_vmaxs: // llvm.arm.neon.vmaxs 5570 case Intrinsic::arm_neon_vmaxu: // llvm.arm.neon.vmaxu 5571 case Intrinsic::arm_neon_vmins: // llvm.arm.neon.vmins 5572 case Intrinsic::arm_neon_vminu: // llvm.arm.neon.vminu 5573 case Intrinsic::arm_neon_vmulp: // llvm.arm.neon.vmulp 5574 case Intrinsic::arm_neon_vpadd: // llvm.arm.neon.vpadd 5575 case Intrinsic::arm_neon_vpmaxs: // llvm.arm.neon.vpmaxs 5576 case Intrinsic::arm_neon_vpmaxu: // llvm.arm.neon.vpmaxu 5577 case Intrinsic::arm_neon_vpmins: // llvm.arm.neon.vpmins 5578 case Intrinsic::arm_neon_vpminu: // llvm.arm.neon.vpminu 5579 case Intrinsic::arm_neon_vqadds: // llvm.arm.neon.vqadds 5580 case Intrinsic::arm_neon_vqaddu: // llvm.arm.neon.vqaddu 5581 case Intrinsic::arm_neon_vqdmulh: // llvm.arm.neon.vqdmulh 5582 case Intrinsic::arm_neon_vqrdmulh: // llvm.arm.neon.vqrdmulh 5583 case Intrinsic::arm_neon_vqrshifts: // llvm.arm.neon.vqrshifts 5584 case Intrinsic::arm_neon_vqrshiftu: // llvm.arm.neon.vqrshiftu 5585 case Intrinsic::arm_neon_vqshifts: // llvm.arm.neon.vqshifts 5586 case Intrinsic::arm_neon_vqshiftsu: // llvm.arm.neon.vqshiftsu 5587 case Intrinsic::arm_neon_vqshiftu: // llvm.arm.neon.vqshiftu 5588 case Intrinsic::arm_neon_vqsubs: // llvm.arm.neon.vqsubs 5589 case Intrinsic::arm_neon_vqsubu: // llvm.arm.neon.vqsubu 5590 case Intrinsic::arm_neon_vrecps: // llvm.arm.neon.vrecps 5591 case Intrinsic::arm_neon_vrhadds: // llvm.arm.neon.vrhadds 5592 case Intrinsic::arm_neon_vrhaddu: // llvm.arm.neon.vrhaddu 5593 case Intrinsic::arm_neon_vrshifts: // llvm.arm.neon.vrshifts 5594 case Intrinsic::arm_neon_vrshiftu: // llvm.arm.neon.vrshiftu 5595 case Intrinsic::arm_neon_vrsqrts: // llvm.arm.neon.vrsqrts 5596 case Intrinsic::arm_neon_vshifts: // llvm.arm.neon.vshifts 5597 case Intrinsic::arm_neon_vshiftu: // llvm.arm.neon.vshiftu 5598 ResultTy = Tys[0]; 5599 ArgTys.push_back(Tys[0]); 5600 ArgTys.push_back(Tys[0]); 5601 break; 5602 case Intrinsic::arm_neon_vaddhn: // llvm.arm.neon.vaddhn 5603 case Intrinsic::arm_neon_vqrshiftns: // llvm.arm.neon.vqrshiftns 5604 case Intrinsic::arm_neon_vqrshiftnsu: // llvm.arm.neon.vqrshiftnsu 5605 case Intrinsic::arm_neon_vqrshiftnu: // llvm.arm.neon.vqrshiftnu 5606 case Intrinsic::arm_neon_vqshiftns: // llvm.arm.neon.vqshiftns 5607 case Intrinsic::arm_neon_vqshiftnsu: // llvm.arm.neon.vqshiftnsu 5608 case Intrinsic::arm_neon_vqshiftnu: // llvm.arm.neon.vqshiftnu 5609 case Intrinsic::arm_neon_vraddhn: // llvm.arm.neon.vraddhn 5610 case Intrinsic::arm_neon_vrshiftn: // llvm.arm.neon.vrshiftn 5611 case Intrinsic::arm_neon_vrsubhn: // llvm.arm.neon.vrsubhn 5612 case Intrinsic::arm_neon_vshiftn: // llvm.arm.neon.vshiftn 5613 case Intrinsic::arm_neon_vsubhn: // llvm.arm.neon.vsubhn 5614 ResultTy = Tys[0]; 5615 ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0]))); 5616 ArgTys.push_back(VectorType::getExtendedElementVectorType(dyn_cast<VectorType>(Tys[0]))); 5617 break; 5618 case Intrinsic::arm_neon_vmullp: // llvm.arm.neon.vmullp 5619 case Intrinsic::arm_neon_vqdmull: // llvm.arm.neon.vqdmull 5620 case Intrinsic::arm_neon_vshiftls: // llvm.arm.neon.vshiftls 5621 case Intrinsic::arm_neon_vshiftlu: // llvm.arm.neon.vshiftlu 5622 ResultTy = Tys[0]; 5623 ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0]))); 5624 ArgTys.push_back(VectorType::getTruncatedElementVectorType(dyn_cast<VectorType>(Tys[0]))); 5625 break; 5626 case Intrinsic::arm_neon_vshiftins: // llvm.arm.neon.vshiftins 5627 ResultTy = Tys[0]; 5628 ArgTys.push_back(Tys[0]); 5629 ArgTys.push_back(Tys[0]); 5630 ArgTys.push_back(Tys[0]); 5631 break; 5632 case Intrinsic::arm_neon_vpaddls: // llvm.arm.neon.vpaddls 5633 case Intrinsic::arm_neon_vpaddlu: // llvm.arm.neon.vpaddlu 5634 ResultTy = Tys[0]; 5635 ArgTys.push_back(Tys[1]); 5636 break; 5637 case Intrinsic::arm_neon_vld1: // llvm.arm.neon.vld1 5638 ResultTy = Tys[0]; 5639 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5640 ArgTys.push_back(IntegerType::get(Context, 32)); 5641 break; 5642 case Intrinsic::arm_neon_vld2: // llvm.arm.neon.vld2 5643 ResultTy = StructType::get(Context, Tys[0], Tys[0], NULL); 5644 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5645 ArgTys.push_back(IntegerType::get(Context, 32)); 5646 break; 5647 case Intrinsic::arm_neon_vld3: // llvm.arm.neon.vld3 5648 ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0], NULL); 5649 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5650 ArgTys.push_back(IntegerType::get(Context, 32)); 5651 break; 5652 case Intrinsic::arm_neon_vld4: // llvm.arm.neon.vld4 5653 ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0], Tys[0], NULL); 5654 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5655 ArgTys.push_back(IntegerType::get(Context, 32)); 5656 break; 5657 case Intrinsic::arm_neon_vld2lane: // llvm.arm.neon.vld2lane 5658 ResultTy = StructType::get(Context, Tys[0], Tys[0], NULL); 5659 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5660 ArgTys.push_back(Tys[0]); 5661 ArgTys.push_back(Tys[0]); 5662 ArgTys.push_back(IntegerType::get(Context, 32)); 5663 ArgTys.push_back(IntegerType::get(Context, 32)); 5664 break; 5665 case Intrinsic::arm_neon_vld3lane: // llvm.arm.neon.vld3lane 5666 ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0], NULL); 5667 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5668 ArgTys.push_back(Tys[0]); 5669 ArgTys.push_back(Tys[0]); 5670 ArgTys.push_back(Tys[0]); 5671 ArgTys.push_back(IntegerType::get(Context, 32)); 5672 ArgTys.push_back(IntegerType::get(Context, 32)); 5673 break; 5674 case Intrinsic::arm_neon_vld4lane: // llvm.arm.neon.vld4lane 5675 ResultTy = StructType::get(Context, Tys[0], Tys[0], Tys[0], Tys[0], NULL); 5676 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5677 ArgTys.push_back(Tys[0]); 5678 ArgTys.push_back(Tys[0]); 5679 ArgTys.push_back(Tys[0]); 5680 ArgTys.push_back(Tys[0]); 5681 ArgTys.push_back(IntegerType::get(Context, 32)); 5682 ArgTys.push_back(IntegerType::get(Context, 32)); 5683 break; 5684 case Intrinsic::invariant_start: // llvm.invariant.start 5685 ResultTy = PointerType::getUnqual(StructType::get(Context)); 5686 ArgTys.push_back(IntegerType::get(Context, 64)); 5687 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5688 break; 5689 case Intrinsic::arm_vcvtr: // llvm.arm.vcvtr 5690 case Intrinsic::arm_vcvtru: // llvm.arm.vcvtru 5691 ResultTy = Type::getFloatTy(Context); 5692 ArgTys.push_back(Tys[0]); 5693 break; 5694 case Intrinsic::convert_from_fp16: // llvm.convert.from.fp16 5695 ResultTy = Type::getFloatTy(Context); 5696 ArgTys.push_back(IntegerType::get(Context, 16)); 5697 break; 5698 case Intrinsic::convert_to_fp16: // llvm.convert.to.fp16 5699 ResultTy = IntegerType::get(Context, 16); 5700 ArgTys.push_back(Type::getFloatTy(Context)); 5701 break; 5702 case Intrinsic::arm_get_fpscr: // llvm.arm.get.fpscr 5703 case Intrinsic::flt_rounds: // llvm.flt.rounds 5704 case Intrinsic::xcore_getid: // llvm.xcore.getid 5705 ResultTy = IntegerType::get(Context, 32); 5706 break; 5707 case Intrinsic::xcore_bitrev: // llvm.xcore.bitrev 5708 ResultTy = IntegerType::get(Context, 32); 5709 ArgTys.push_back(IntegerType::get(Context, 32)); 5710 break; 5711 case Intrinsic::x86_sse42_crc32_16: // llvm.x86.sse42.crc32.16 5712 ResultTy = IntegerType::get(Context, 32); 5713 ArgTys.push_back(IntegerType::get(Context, 32)); 5714 ArgTys.push_back(IntegerType::get(Context, 16)); 5715 break; 5716 case Intrinsic::arm_qadd: // llvm.arm.qadd 5717 case Intrinsic::arm_qsub: // llvm.arm.qsub 5718 case Intrinsic::arm_ssat: // llvm.arm.ssat 5719 case Intrinsic::arm_usat: // llvm.arm.usat 5720 case Intrinsic::x86_sse42_crc32_32: // llvm.x86.sse42.crc32.32 5721 ResultTy = IntegerType::get(Context, 32); 5722 ArgTys.push_back(IntegerType::get(Context, 32)); 5723 ArgTys.push_back(IntegerType::get(Context, 32)); 5724 break; 5725 case Intrinsic::x86_sse42_crc32_8: // llvm.x86.sse42.crc32.8 5726 ResultTy = IntegerType::get(Context, 32); 5727 ArgTys.push_back(IntegerType::get(Context, 32)); 5728 ArgTys.push_back(IntegerType::get(Context, 8)); 5729 break; 5730 case Intrinsic::ppc_altivec_vcmpequb_p: // llvm.ppc.altivec.vcmpequb.p 5731 case Intrinsic::ppc_altivec_vcmpgtsb_p: // llvm.ppc.altivec.vcmpgtsb.p 5732 case Intrinsic::ppc_altivec_vcmpgtub_p: // llvm.ppc.altivec.vcmpgtub.p 5733 ResultTy = IntegerType::get(Context, 32); 5734 ArgTys.push_back(IntegerType::get(Context, 32)); 5735 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5736 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5737 break; 5738 case Intrinsic::ppc_altivec_vcmpbfp_p: // llvm.ppc.altivec.vcmpbfp.p 5739 case Intrinsic::ppc_altivec_vcmpeqfp_p: // llvm.ppc.altivec.vcmpeqfp.p 5740 case Intrinsic::ppc_altivec_vcmpgefp_p: // llvm.ppc.altivec.vcmpgefp.p 5741 case Intrinsic::ppc_altivec_vcmpgtfp_p: // llvm.ppc.altivec.vcmpgtfp.p 5742 ResultTy = IntegerType::get(Context, 32); 5743 ArgTys.push_back(IntegerType::get(Context, 32)); 5744 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5745 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5746 break; 5747 case Intrinsic::ppc_altivec_vcmpequw_p: // llvm.ppc.altivec.vcmpequw.p 5748 case Intrinsic::ppc_altivec_vcmpgtsw_p: // llvm.ppc.altivec.vcmpgtsw.p 5749 case Intrinsic::ppc_altivec_vcmpgtuw_p: // llvm.ppc.altivec.vcmpgtuw.p 5750 ResultTy = IntegerType::get(Context, 32); 5751 ArgTys.push_back(IntegerType::get(Context, 32)); 5752 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 5753 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 5754 break; 5755 case Intrinsic::ppc_altivec_vcmpequh_p: // llvm.ppc.altivec.vcmpequh.p 5756 case Intrinsic::ppc_altivec_vcmpgtsh_p: // llvm.ppc.altivec.vcmpgtsh.p 5757 case Intrinsic::ppc_altivec_vcmpgtuh_p: // llvm.ppc.altivec.vcmpgtuh.p 5758 ResultTy = IntegerType::get(Context, 32); 5759 ArgTys.push_back(IntegerType::get(Context, 32)); 5760 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 5761 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 5762 break; 5763 case Intrinsic::eh_sjlj_setjmp: // llvm.eh.sjlj.setjmp 5764 case Intrinsic::eh_typeid_for: // llvm.eh.typeid.for 5765 case Intrinsic::setjmp: // llvm.setjmp 5766 ResultTy = IntegerType::get(Context, 32); 5767 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5768 break; 5769 case Intrinsic::sigsetjmp: // llvm.sigsetjmp 5770 ResultTy = IntegerType::get(Context, 32); 5771 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5772 ArgTys.push_back(IntegerType::get(Context, 32)); 5773 break; 5774 case Intrinsic::eh_selector: // llvm.eh.selector 5775 IsVarArg = true; 5776 ResultTy = IntegerType::get(Context, 32); 5777 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5778 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5779 break; 5780 case Intrinsic::x86_sse2_pmovmskb_128: // llvm.x86.sse2.pmovmskb.128 5781 ResultTy = IntegerType::get(Context, 32); 5782 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5783 break; 5784 case Intrinsic::x86_sse41_pextrb: // llvm.x86.sse41.pextrb 5785 ResultTy = IntegerType::get(Context, 32); 5786 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5787 ArgTys.push_back(IntegerType::get(Context, 32)); 5788 break; 5789 case Intrinsic::x86_sse42_pcmpestri128: // llvm.x86.sse42.pcmpestri128 5790 case Intrinsic::x86_sse42_pcmpestria128: // llvm.x86.sse42.pcmpestria128 5791 case Intrinsic::x86_sse42_pcmpestric128: // llvm.x86.sse42.pcmpestric128 5792 case Intrinsic::x86_sse42_pcmpestrio128: // llvm.x86.sse42.pcmpestrio128 5793 case Intrinsic::x86_sse42_pcmpestris128: // llvm.x86.sse42.pcmpestris128 5794 case Intrinsic::x86_sse42_pcmpestriz128: // llvm.x86.sse42.pcmpestriz128 5795 ResultTy = IntegerType::get(Context, 32); 5796 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5797 ArgTys.push_back(IntegerType::get(Context, 32)); 5798 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5799 ArgTys.push_back(IntegerType::get(Context, 32)); 5800 ArgTys.push_back(IntegerType::get(Context, 8)); 5801 break; 5802 case Intrinsic::x86_sse42_pcmpistri128: // llvm.x86.sse42.pcmpistri128 5803 case Intrinsic::x86_sse42_pcmpistria128: // llvm.x86.sse42.pcmpistria128 5804 case Intrinsic::x86_sse42_pcmpistric128: // llvm.x86.sse42.pcmpistric128 5805 case Intrinsic::x86_sse42_pcmpistrio128: // llvm.x86.sse42.pcmpistrio128 5806 case Intrinsic::x86_sse42_pcmpistris128: // llvm.x86.sse42.pcmpistris128 5807 case Intrinsic::x86_sse42_pcmpistriz128: // llvm.x86.sse42.pcmpistriz128 5808 ResultTy = IntegerType::get(Context, 32); 5809 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5810 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5811 ArgTys.push_back(IntegerType::get(Context, 8)); 5812 break; 5813 case Intrinsic::x86_mmx_cvtsi64_si32: // llvm.x86.mmx.cvtsi64.si32 5814 ResultTy = IntegerType::get(Context, 32); 5815 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1)); 5816 break; 5817 case Intrinsic::x86_mmx_pextr_w: // llvm.x86.mmx.pextr.w 5818 ResultTy = IntegerType::get(Context, 32); 5819 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1)); 5820 ArgTys.push_back(IntegerType::get(Context, 32)); 5821 break; 5822 case Intrinsic::x86_sse2_cvtsd2si: // llvm.x86.sse2.cvtsd2si 5823 case Intrinsic::x86_sse2_cvttsd2si: // llvm.x86.sse2.cvttsd2si 5824 case Intrinsic::x86_sse2_movmsk_pd: // llvm.x86.sse2.movmsk.pd 5825 ResultTy = IntegerType::get(Context, 32); 5826 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 5827 break; 5828 case Intrinsic::x86_avx_vtestc_pd: // llvm.x86.avx.vtestc.pd 5829 case Intrinsic::x86_avx_vtestnzc_pd: // llvm.x86.avx.vtestnzc.pd 5830 case Intrinsic::x86_avx_vtestz_pd: // llvm.x86.avx.vtestz.pd 5831 case Intrinsic::x86_sse2_comieq_sd: // llvm.x86.sse2.comieq.sd 5832 case Intrinsic::x86_sse2_comige_sd: // llvm.x86.sse2.comige.sd 5833 case Intrinsic::x86_sse2_comigt_sd: // llvm.x86.sse2.comigt.sd 5834 case Intrinsic::x86_sse2_comile_sd: // llvm.x86.sse2.comile.sd 5835 case Intrinsic::x86_sse2_comilt_sd: // llvm.x86.sse2.comilt.sd 5836 case Intrinsic::x86_sse2_comineq_sd: // llvm.x86.sse2.comineq.sd 5837 case Intrinsic::x86_sse2_ucomieq_sd: // llvm.x86.sse2.ucomieq.sd 5838 case Intrinsic::x86_sse2_ucomige_sd: // llvm.x86.sse2.ucomige.sd 5839 case Intrinsic::x86_sse2_ucomigt_sd: // llvm.x86.sse2.ucomigt.sd 5840 case Intrinsic::x86_sse2_ucomile_sd: // llvm.x86.sse2.ucomile.sd 5841 case Intrinsic::x86_sse2_ucomilt_sd: // llvm.x86.sse2.ucomilt.sd 5842 case Intrinsic::x86_sse2_ucomineq_sd: // llvm.x86.sse2.ucomineq.sd 5843 ResultTy = IntegerType::get(Context, 32); 5844 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 5845 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 5846 break; 5847 case Intrinsic::x86_sse_cvtss2si: // llvm.x86.sse.cvtss2si 5848 case Intrinsic::x86_sse_cvttss2si: // llvm.x86.sse.cvttss2si 5849 case Intrinsic::x86_sse_movmsk_ps: // llvm.x86.sse.movmsk.ps 5850 ResultTy = IntegerType::get(Context, 32); 5851 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5852 break; 5853 case Intrinsic::x86_sse41_extractps: // llvm.x86.sse41.extractps 5854 ResultTy = IntegerType::get(Context, 32); 5855 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5856 ArgTys.push_back(IntegerType::get(Context, 32)); 5857 break; 5858 case Intrinsic::x86_avx_vtestc_ps: // llvm.x86.avx.vtestc.ps 5859 case Intrinsic::x86_avx_vtestnzc_ps: // llvm.x86.avx.vtestnzc.ps 5860 case Intrinsic::x86_avx_vtestz_ps: // llvm.x86.avx.vtestz.ps 5861 case Intrinsic::x86_sse41_ptestc: // llvm.x86.sse41.ptestc 5862 case Intrinsic::x86_sse41_ptestnzc: // llvm.x86.sse41.ptestnzc 5863 case Intrinsic::x86_sse41_ptestz: // llvm.x86.sse41.ptestz 5864 case Intrinsic::x86_sse_comieq_ss: // llvm.x86.sse.comieq.ss 5865 case Intrinsic::x86_sse_comige_ss: // llvm.x86.sse.comige.ss 5866 case Intrinsic::x86_sse_comigt_ss: // llvm.x86.sse.comigt.ss 5867 case Intrinsic::x86_sse_comile_ss: // llvm.x86.sse.comile.ss 5868 case Intrinsic::x86_sse_comilt_ss: // llvm.x86.sse.comilt.ss 5869 case Intrinsic::x86_sse_comineq_ss: // llvm.x86.sse.comineq.ss 5870 case Intrinsic::x86_sse_ucomieq_ss: // llvm.x86.sse.ucomieq.ss 5871 case Intrinsic::x86_sse_ucomige_ss: // llvm.x86.sse.ucomige.ss 5872 case Intrinsic::x86_sse_ucomigt_ss: // llvm.x86.sse.ucomigt.ss 5873 case Intrinsic::x86_sse_ucomile_ss: // llvm.x86.sse.ucomile.ss 5874 case Intrinsic::x86_sse_ucomilt_ss: // llvm.x86.sse.ucomilt.ss 5875 case Intrinsic::x86_sse_ucomineq_ss: // llvm.x86.sse.ucomineq.ss 5876 ResultTy = IntegerType::get(Context, 32); 5877 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5878 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5879 break; 5880 case Intrinsic::x86_avx_movmsk_pd_256: // llvm.x86.avx.movmsk.pd.256 5881 ResultTy = IntegerType::get(Context, 32); 5882 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 5883 break; 5884 case Intrinsic::x86_avx_vtestc_pd_256: // llvm.x86.avx.vtestc.pd.256 5885 case Intrinsic::x86_avx_vtestnzc_pd_256: // llvm.x86.avx.vtestnzc.pd.256 5886 case Intrinsic::x86_avx_vtestz_pd_256: // llvm.x86.avx.vtestz.pd.256 5887 ResultTy = IntegerType::get(Context, 32); 5888 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 5889 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 5890 break; 5891 case Intrinsic::x86_sse41_pextrd: // llvm.x86.sse41.pextrd 5892 ResultTy = IntegerType::get(Context, 32); 5893 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 5894 ArgTys.push_back(IntegerType::get(Context, 32)); 5895 break; 5896 case Intrinsic::x86_avx_ptestc_256: // llvm.x86.avx.ptestc.256 5897 case Intrinsic::x86_avx_ptestnzc_256: // llvm.x86.avx.ptestnzc.256 5898 case Intrinsic::x86_avx_ptestz_256: // llvm.x86.avx.ptestz.256 5899 ResultTy = IntegerType::get(Context, 32); 5900 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4)); 5901 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4)); 5902 break; 5903 case Intrinsic::x86_avx_movmsk_ps_256: // llvm.x86.avx.movmsk.ps.256 5904 ResultTy = IntegerType::get(Context, 32); 5905 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 5906 break; 5907 case Intrinsic::x86_avx_vtestc_ps_256: // llvm.x86.avx.vtestc.ps.256 5908 case Intrinsic::x86_avx_vtestnzc_ps_256: // llvm.x86.avx.vtestnzc.ps.256 5909 case Intrinsic::x86_avx_vtestz_ps_256: // llvm.x86.avx.vtestz.ps.256 5910 ResultTy = IntegerType::get(Context, 32); 5911 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 5912 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 5913 break; 5914 case Intrinsic::x86_mmx_pmovmskb: // llvm.x86.mmx.pmovmskb 5915 ResultTy = IntegerType::get(Context, 32); 5916 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 5917 break; 5918 case Intrinsic::readcyclecounter: // llvm.readcyclecounter 5919 ResultTy = IntegerType::get(Context, 64); 5920 break; 5921 case Intrinsic::alpha_umulh: // llvm.alpha.umulh 5922 case Intrinsic::x86_sse42_crc64_64: // llvm.x86.sse42.crc64.64 5923 ResultTy = IntegerType::get(Context, 64); 5924 ArgTys.push_back(IntegerType::get(Context, 64)); 5925 ArgTys.push_back(IntegerType::get(Context, 64)); 5926 break; 5927 case Intrinsic::x86_sse42_crc64_8: // llvm.x86.sse42.crc64.8 5928 ResultTy = IntegerType::get(Context, 64); 5929 ArgTys.push_back(IntegerType::get(Context, 64)); 5930 ArgTys.push_back(IntegerType::get(Context, 8)); 5931 break; 5932 case Intrinsic::x86_sse2_cvtsd2si64: // llvm.x86.sse2.cvtsd2si64 5933 case Intrinsic::x86_sse2_cvttsd2si64: // llvm.x86.sse2.cvttsd2si64 5934 ResultTy = IntegerType::get(Context, 64); 5935 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 5936 break; 5937 case Intrinsic::x86_sse41_pextrq: // llvm.x86.sse41.pextrq 5938 ResultTy = IntegerType::get(Context, 64); 5939 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2)); 5940 ArgTys.push_back(IntegerType::get(Context, 32)); 5941 break; 5942 case Intrinsic::x86_sse_cvtss2si64: // llvm.x86.sse.cvtss2si64 5943 case Intrinsic::x86_sse_cvttss2si64: // llvm.x86.sse.cvttss2si64 5944 ResultTy = IntegerType::get(Context, 64); 5945 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 5946 break; 5947 case Intrinsic::arm_thread_pointer: // llvm.arm.thread.pointer 5948 case Intrinsic::eh_exception: // llvm.eh.exception 5949 case Intrinsic::eh_sjlj_lsda: // llvm.eh.sjlj.lsda 5950 case Intrinsic::stacksave: // llvm.stacksave 5951 ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8)); 5952 break; 5953 case Intrinsic::eh_dwarf_cfa: // llvm.eh.dwarf.cfa 5954 case Intrinsic::frameaddress: // llvm.frameaddress 5955 case Intrinsic::returnaddress: // llvm.returnaddress 5956 ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8)); 5957 ArgTys.push_back(IntegerType::get(Context, 32)); 5958 break; 5959 case Intrinsic::init_trampoline: // llvm.init.trampoline 5960 ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8)); 5961 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5962 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5963 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5964 break; 5965 case Intrinsic::gcread: // llvm.gcread 5966 ResultTy = PointerType::getUnqual(IntegerType::get(Context, 8)); 5967 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5968 ArgTys.push_back(PointerType::getUnqual(PointerType::getUnqual(IntegerType::get(Context, 8)))); 5969 break; 5970 case Intrinsic::ppc_altivec_lvebx: // llvm.ppc.altivec.lvebx 5971 case Intrinsic::ppc_altivec_lvsl: // llvm.ppc.altivec.lvsl 5972 case Intrinsic::ppc_altivec_lvsr: // llvm.ppc.altivec.lvsr 5973 case Intrinsic::x86_sse2_loadu_dq: // llvm.x86.sse2.loadu.dq 5974 case Intrinsic::x86_sse3_ldu_dq: // llvm.x86.sse3.ldu.dq 5975 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 5976 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 5977 break; 5978 case Intrinsic::x86_ssse3_pabs_b_128: // llvm.x86.ssse3.pabs.b.128 5979 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 5980 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5981 break; 5982 case Intrinsic::spu_si_shlqbii: // llvm.spu.si.shlqbii 5983 case Intrinsic::spu_si_shlqbyi: // llvm.spu.si.shlqbyi 5984 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 5985 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5986 ArgTys.push_back(IntegerType::get(Context, 8)); 5987 break; 5988 case Intrinsic::x86_sse42_pcmpestrm128: // llvm.x86.sse42.pcmpestrm128 5989 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 5990 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5991 ArgTys.push_back(IntegerType::get(Context, 32)); 5992 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 5993 ArgTys.push_back(IntegerType::get(Context, 32)); 5994 ArgTys.push_back(IntegerType::get(Context, 8)); 5995 break; 5996 case Intrinsic::spu_si_andbi: // llvm.spu.si.andbi 5997 case Intrinsic::spu_si_ceqbi: // llvm.spu.si.ceqbi 5998 case Intrinsic::spu_si_cgtbi: // llvm.spu.si.cgtbi 5999 case Intrinsic::spu_si_clgtbi: // llvm.spu.si.clgtbi 6000 case Intrinsic::spu_si_orbi: // llvm.spu.si.orbi 6001 case Intrinsic::spu_si_xorbi: // llvm.spu.si.xorbi 6002 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 6003 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6004 ArgTys.push_back(IntegerType::get(Context, 8)); 6005 break; 6006 case Intrinsic::ppc_altivec_vaddsbs: // llvm.ppc.altivec.vaddsbs 6007 case Intrinsic::ppc_altivec_vaddubs: // llvm.ppc.altivec.vaddubs 6008 case Intrinsic::ppc_altivec_vavgsb: // llvm.ppc.altivec.vavgsb 6009 case Intrinsic::ppc_altivec_vavgub: // llvm.ppc.altivec.vavgub 6010 case Intrinsic::ppc_altivec_vcmpequb: // llvm.ppc.altivec.vcmpequb 6011 case Intrinsic::ppc_altivec_vcmpgtsb: // llvm.ppc.altivec.vcmpgtsb 6012 case Intrinsic::ppc_altivec_vcmpgtub: // llvm.ppc.altivec.vcmpgtub 6013 case Intrinsic::ppc_altivec_vmaxsb: // llvm.ppc.altivec.vmaxsb 6014 case Intrinsic::ppc_altivec_vmaxub: // llvm.ppc.altivec.vmaxub 6015 case Intrinsic::ppc_altivec_vminsb: // llvm.ppc.altivec.vminsb 6016 case Intrinsic::ppc_altivec_vminub: // llvm.ppc.altivec.vminub 6017 case Intrinsic::ppc_altivec_vrlb: // llvm.ppc.altivec.vrlb 6018 case Intrinsic::ppc_altivec_vslb: // llvm.ppc.altivec.vslb 6019 case Intrinsic::ppc_altivec_vsrab: // llvm.ppc.altivec.vsrab 6020 case Intrinsic::ppc_altivec_vsrb: // llvm.ppc.altivec.vsrb 6021 case Intrinsic::ppc_altivec_vsubsbs: // llvm.ppc.altivec.vsubsbs 6022 case Intrinsic::ppc_altivec_vsububs: // llvm.ppc.altivec.vsububs 6023 case Intrinsic::spu_si_ceqb: // llvm.spu.si.ceqb 6024 case Intrinsic::spu_si_cgtb: // llvm.spu.si.cgtb 6025 case Intrinsic::spu_si_clgtb: // llvm.spu.si.clgtb 6026 case Intrinsic::x86_sse2_padds_b: // llvm.x86.sse2.padds.b 6027 case Intrinsic::x86_sse2_paddus_b: // llvm.x86.sse2.paddus.b 6028 case Intrinsic::x86_sse2_pavg_b: // llvm.x86.sse2.pavg.b 6029 case Intrinsic::x86_sse2_pcmpeq_b: // llvm.x86.sse2.pcmpeq.b 6030 case Intrinsic::x86_sse2_pcmpgt_b: // llvm.x86.sse2.pcmpgt.b 6031 case Intrinsic::x86_sse2_pmaxu_b: // llvm.x86.sse2.pmaxu.b 6032 case Intrinsic::x86_sse2_pminu_b: // llvm.x86.sse2.pminu.b 6033 case Intrinsic::x86_sse2_psubs_b: // llvm.x86.sse2.psubs.b 6034 case Intrinsic::x86_sse2_psubus_b: // llvm.x86.sse2.psubus.b 6035 case Intrinsic::x86_sse41_pmaxsb: // llvm.x86.sse41.pmaxsb 6036 case Intrinsic::x86_sse41_pminsb: // llvm.x86.sse41.pminsb 6037 case Intrinsic::x86_ssse3_pshuf_b_128: // llvm.x86.ssse3.pshuf.b.128 6038 case Intrinsic::x86_ssse3_psign_b_128: // llvm.x86.ssse3.psign.b.128 6039 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 6040 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6041 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6042 break; 6043 case Intrinsic::x86_sse41_mpsadbw: // llvm.x86.sse41.mpsadbw 6044 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 6045 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6046 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6047 ArgTys.push_back(IntegerType::get(Context, 32)); 6048 break; 6049 case Intrinsic::x86_sse42_pcmpistrm128: // llvm.x86.sse42.pcmpistrm128 6050 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 6051 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6052 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6053 ArgTys.push_back(IntegerType::get(Context, 8)); 6054 break; 6055 case Intrinsic::x86_sse41_pblendvb: // llvm.x86.sse41.pblendvb 6056 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 6057 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6058 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6059 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6060 break; 6061 case Intrinsic::ppc_altivec_vpkswss: // llvm.ppc.altivec.vpkswss 6062 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 6063 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6064 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6065 break; 6066 case Intrinsic::ppc_altivec_vpkshss: // llvm.ppc.altivec.vpkshss 6067 case Intrinsic::ppc_altivec_vpkshus: // llvm.ppc.altivec.vpkshus 6068 case Intrinsic::ppc_altivec_vpkuhus: // llvm.ppc.altivec.vpkuhus 6069 case Intrinsic::x86_sse2_packsswb_128: // llvm.x86.sse2.packsswb.128 6070 case Intrinsic::x86_sse2_packuswb_128: // llvm.x86.sse2.packuswb.128 6071 ResultTy = VectorType::get(IntegerType::get(Context, 8), 16); 6072 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6073 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6074 break; 6075 case Intrinsic::x86_mmx_cvtsi32_si64: // llvm.x86.mmx.cvtsi32.si64 6076 ResultTy = VectorType::get(IntegerType::get(Context, 64), 1); 6077 ArgTys.push_back(IntegerType::get(Context, 32)); 6078 break; 6079 case Intrinsic::x86_mmx_pslli_q: // llvm.x86.mmx.pslli.q 6080 case Intrinsic::x86_mmx_psrli_q: // llvm.x86.mmx.psrli.q 6081 ResultTy = VectorType::get(IntegerType::get(Context, 64), 1); 6082 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1)); 6083 ArgTys.push_back(IntegerType::get(Context, 32)); 6084 break; 6085 case Intrinsic::x86_mmx_pinsr_w: // llvm.x86.mmx.pinsr.w 6086 ResultTy = VectorType::get(IntegerType::get(Context, 64), 1); 6087 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1)); 6088 ArgTys.push_back(IntegerType::get(Context, 32)); 6089 ArgTys.push_back(IntegerType::get(Context, 32)); 6090 break; 6091 case Intrinsic::x86_mmx_padd_q: // llvm.x86.mmx.padd.q 6092 case Intrinsic::x86_mmx_pand: // llvm.x86.mmx.pand 6093 case Intrinsic::x86_mmx_pandn: // llvm.x86.mmx.pandn 6094 case Intrinsic::x86_mmx_por: // llvm.x86.mmx.por 6095 case Intrinsic::x86_mmx_psll_q: // llvm.x86.mmx.psll.q 6096 case Intrinsic::x86_mmx_psrl_q: // llvm.x86.mmx.psrl.q 6097 case Intrinsic::x86_mmx_psub_q: // llvm.x86.mmx.psub.q 6098 case Intrinsic::x86_mmx_pxor: // llvm.x86.mmx.pxor 6099 ResultTy = VectorType::get(IntegerType::get(Context, 64), 1); 6100 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1)); 6101 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1)); 6102 break; 6103 case Intrinsic::x86_sse2_loadu_pd: // llvm.x86.sse2.loadu.pd 6104 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6105 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6106 break; 6107 case Intrinsic::x86_avx_maskload_pd: // llvm.x86.avx.maskload.pd 6108 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6109 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6110 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6111 break; 6112 case Intrinsic::x86_sse2_sqrt_pd: // llvm.x86.sse2.sqrt.pd 6113 case Intrinsic::x86_sse2_sqrt_sd: // llvm.x86.sse2.sqrt.sd 6114 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6115 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6116 break; 6117 case Intrinsic::x86_sse2_cvtsi2sd: // llvm.x86.sse2.cvtsi2sd 6118 case Intrinsic::x86_sse41_round_pd: // llvm.x86.sse41.round.pd 6119 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6120 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6121 ArgTys.push_back(IntegerType::get(Context, 32)); 6122 break; 6123 case Intrinsic::x86_sse2_cvtsi642sd: // llvm.x86.sse2.cvtsi642sd 6124 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6125 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6126 ArgTys.push_back(IntegerType::get(Context, 64)); 6127 break; 6128 case Intrinsic::x86_avx_vpermil_pd: // llvm.x86.avx.vpermil.pd 6129 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6130 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6131 ArgTys.push_back(IntegerType::get(Context, 8)); 6132 break; 6133 case Intrinsic::spu_si_dfa: // llvm.spu.si.dfa 6134 case Intrinsic::spu_si_dfm: // llvm.spu.si.dfm 6135 case Intrinsic::spu_si_dfma: // llvm.spu.si.dfma 6136 case Intrinsic::spu_si_dfms: // llvm.spu.si.dfms 6137 case Intrinsic::spu_si_dfnma: // llvm.spu.si.dfnma 6138 case Intrinsic::spu_si_dfnms: // llvm.spu.si.dfnms 6139 case Intrinsic::spu_si_dfs: // llvm.spu.si.dfs 6140 case Intrinsic::x86_sse2_add_sd: // llvm.x86.sse2.add.sd 6141 case Intrinsic::x86_sse2_div_sd: // llvm.x86.sse2.div.sd 6142 case Intrinsic::x86_sse2_max_pd: // llvm.x86.sse2.max.pd 6143 case Intrinsic::x86_sse2_max_sd: // llvm.x86.sse2.max.sd 6144 case Intrinsic::x86_sse2_min_pd: // llvm.x86.sse2.min.pd 6145 case Intrinsic::x86_sse2_min_sd: // llvm.x86.sse2.min.sd 6146 case Intrinsic::x86_sse2_mul_sd: // llvm.x86.sse2.mul.sd 6147 case Intrinsic::x86_sse2_sub_sd: // llvm.x86.sse2.sub.sd 6148 case Intrinsic::x86_sse3_addsub_pd: // llvm.x86.sse3.addsub.pd 6149 case Intrinsic::x86_sse3_hadd_pd: // llvm.x86.sse3.hadd.pd 6150 case Intrinsic::x86_sse3_hsub_pd: // llvm.x86.sse3.hsub.pd 6151 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6152 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6153 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6154 break; 6155 case Intrinsic::x86_sse41_blendpd: // llvm.x86.sse41.blendpd 6156 case Intrinsic::x86_sse41_dppd: // llvm.x86.sse41.dppd 6157 case Intrinsic::x86_sse41_round_sd: // llvm.x86.sse41.round.sd 6158 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6159 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6160 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6161 ArgTys.push_back(IntegerType::get(Context, 32)); 6162 break; 6163 case Intrinsic::x86_sse2_cmp_pd: // llvm.x86.sse2.cmp.pd 6164 case Intrinsic::x86_sse2_cmp_sd: // llvm.x86.sse2.cmp.sd 6165 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6166 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6167 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6168 ArgTys.push_back(IntegerType::get(Context, 8)); 6169 break; 6170 case Intrinsic::x86_sse41_blendvpd: // llvm.x86.sse41.blendvpd 6171 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6172 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6173 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6174 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6175 break; 6176 case Intrinsic::x86_avx_vpermilvar_pd: // llvm.x86.avx.vpermilvar.pd 6177 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6178 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6179 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2)); 6180 break; 6181 case Intrinsic::x86_sse2_cvtss2sd: // llvm.x86.sse2.cvtss2sd 6182 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6183 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6184 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6185 break; 6186 case Intrinsic::x86_sse_cvtpi2pd: // llvm.x86.sse.cvtpi2pd 6187 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6188 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2)); 6189 break; 6190 case Intrinsic::x86_sse2_cvtps2pd: // llvm.x86.sse2.cvtps2pd 6191 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6192 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6193 break; 6194 case Intrinsic::x86_avx_vextractf128_pd_256: // llvm.x86.avx.vextractf128.pd.256 6195 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6196 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6197 ArgTys.push_back(IntegerType::get(Context, 8)); 6198 break; 6199 case Intrinsic::x86_sse2_cvtdq2pd: // llvm.x86.sse2.cvtdq2pd 6200 ResultTy = VectorType::get(Type::getDoubleTy(Context), 2); 6201 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6202 break; 6203 case Intrinsic::x86_mmx_vec_init_d: // llvm.x86.mmx.vec.init.d 6204 ResultTy = VectorType::get(IntegerType::get(Context, 32), 2); 6205 ArgTys.push_back(IntegerType::get(Context, 32)); 6206 ArgTys.push_back(IntegerType::get(Context, 32)); 6207 break; 6208 case Intrinsic::arm_neon_vacged: // llvm.arm.neon.vacged 6209 case Intrinsic::arm_neon_vacgtd: // llvm.arm.neon.vacgtd 6210 ResultTy = VectorType::get(IntegerType::get(Context, 32), 2); 6211 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 2)); 6212 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 2)); 6213 break; 6214 case Intrinsic::x86_sse_cvtpd2pi: // llvm.x86.sse.cvtpd2pi 6215 case Intrinsic::x86_sse_cvttpd2pi: // llvm.x86.sse.cvttpd2pi 6216 ResultTy = VectorType::get(IntegerType::get(Context, 32), 2); 6217 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6218 break; 6219 case Intrinsic::x86_ssse3_pabs_d: // llvm.x86.ssse3.pabs.d 6220 ResultTy = VectorType::get(IntegerType::get(Context, 32), 2); 6221 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2)); 6222 break; 6223 case Intrinsic::x86_mmx_pslli_d: // llvm.x86.mmx.pslli.d 6224 case Intrinsic::x86_mmx_psrai_d: // llvm.x86.mmx.psrai.d 6225 case Intrinsic::x86_mmx_psrli_d: // llvm.x86.mmx.psrli.d 6226 case Intrinsic::x86_mmx_vec_ext_d: // llvm.x86.mmx.vec.ext.d 6227 ResultTy = VectorType::get(IntegerType::get(Context, 32), 2); 6228 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2)); 6229 ArgTys.push_back(IntegerType::get(Context, 32)); 6230 break; 6231 case Intrinsic::x86_mmx_psll_d: // llvm.x86.mmx.psll.d 6232 case Intrinsic::x86_mmx_psra_d: // llvm.x86.mmx.psra.d 6233 case Intrinsic::x86_mmx_psrl_d: // llvm.x86.mmx.psrl.d 6234 ResultTy = VectorType::get(IntegerType::get(Context, 32), 2); 6235 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2)); 6236 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1)); 6237 break; 6238 case Intrinsic::x86_mmx_padd_d: // llvm.x86.mmx.padd.d 6239 case Intrinsic::x86_mmx_pcmpeq_d: // llvm.x86.mmx.pcmpeq.d 6240 case Intrinsic::x86_mmx_pcmpgt_d: // llvm.x86.mmx.pcmpgt.d 6241 case Intrinsic::x86_mmx_pmulu_dq: // llvm.x86.mmx.pmulu.dq 6242 case Intrinsic::x86_mmx_psub_d: // llvm.x86.mmx.psub.d 6243 case Intrinsic::x86_mmx_punpckhdq: // llvm.x86.mmx.punpckhdq 6244 case Intrinsic::x86_mmx_punpckldq: // llvm.x86.mmx.punpckldq 6245 case Intrinsic::x86_ssse3_phadd_d: // llvm.x86.ssse3.phadd.d 6246 case Intrinsic::x86_ssse3_phsub_d: // llvm.x86.ssse3.phsub.d 6247 case Intrinsic::x86_ssse3_psign_d: // llvm.x86.ssse3.psign.d 6248 ResultTy = VectorType::get(IntegerType::get(Context, 32), 2); 6249 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2)); 6250 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2)); 6251 break; 6252 case Intrinsic::x86_sse_cvtps2pi: // llvm.x86.sse.cvtps2pi 6253 case Intrinsic::x86_sse_cvttps2pi: // llvm.x86.sse.cvttps2pi 6254 ResultTy = VectorType::get(IntegerType::get(Context, 32), 2); 6255 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6256 break; 6257 case Intrinsic::x86_mmx_pmadd_wd: // llvm.x86.mmx.pmadd.wd 6258 ResultTy = VectorType::get(IntegerType::get(Context, 32), 2); 6259 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4)); 6260 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4)); 6261 break; 6262 case Intrinsic::x86_sse41_movntdqa: // llvm.x86.sse41.movntdqa 6263 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6264 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6265 break; 6266 case Intrinsic::x86_sse41_pmovsxbq: // llvm.x86.sse41.pmovsxbq 6267 case Intrinsic::x86_sse41_pmovzxbq: // llvm.x86.sse41.pmovzxbq 6268 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6269 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6270 break; 6271 case Intrinsic::x86_sse2_psad_bw: // llvm.x86.sse2.psad.bw 6272 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6273 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6274 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6275 break; 6276 case Intrinsic::x86_aesni_aesimc: // llvm.x86.aesni.aesimc 6277 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6278 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2)); 6279 break; 6280 case Intrinsic::x86_sse2_psll_dq: // llvm.x86.sse2.psll.dq 6281 case Intrinsic::x86_sse2_psll_dq_bs: // llvm.x86.sse2.psll.dq.bs 6282 case Intrinsic::x86_sse2_pslli_q: // llvm.x86.sse2.pslli.q 6283 case Intrinsic::x86_sse2_psrl_dq: // llvm.x86.sse2.psrl.dq 6284 case Intrinsic::x86_sse2_psrl_dq_bs: // llvm.x86.sse2.psrl.dq.bs 6285 case Intrinsic::x86_sse2_psrli_q: // llvm.x86.sse2.psrli.q 6286 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6287 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2)); 6288 ArgTys.push_back(IntegerType::get(Context, 32)); 6289 break; 6290 case Intrinsic::x86_aesni_aeskeygenassist: // llvm.x86.aesni.aeskeygenassist 6291 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6292 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2)); 6293 ArgTys.push_back(IntegerType::get(Context, 8)); 6294 break; 6295 case Intrinsic::x86_aesni_aesdec: // llvm.x86.aesni.aesdec 6296 case Intrinsic::x86_aesni_aesdeclast: // llvm.x86.aesni.aesdeclast 6297 case Intrinsic::x86_aesni_aesenc: // llvm.x86.aesni.aesenc 6298 case Intrinsic::x86_aesni_aesenclast: // llvm.x86.aesni.aesenclast 6299 case Intrinsic::x86_sse2_psll_q: // llvm.x86.sse2.psll.q 6300 case Intrinsic::x86_sse2_psrl_q: // llvm.x86.sse2.psrl.q 6301 case Intrinsic::x86_sse41_pcmpeqq: // llvm.x86.sse41.pcmpeqq 6302 case Intrinsic::x86_sse42_pcmpgtq: // llvm.x86.sse42.pcmpgtq 6303 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6304 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2)); 6305 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 2)); 6306 break; 6307 case Intrinsic::x86_sse41_pmovsxdq: // llvm.x86.sse41.pmovsxdq 6308 case Intrinsic::x86_sse41_pmovzxdq: // llvm.x86.sse41.pmovzxdq 6309 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6310 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6311 break; 6312 case Intrinsic::x86_sse2_pmulu_dq: // llvm.x86.sse2.pmulu.dq 6313 case Intrinsic::x86_sse41_pmuldq: // llvm.x86.sse41.pmuldq 6314 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6315 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6316 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6317 break; 6318 case Intrinsic::x86_sse41_pmovsxwq: // llvm.x86.sse41.pmovsxwq 6319 case Intrinsic::x86_sse41_pmovzxwq: // llvm.x86.sse41.pmovzxwq 6320 ResultTy = VectorType::get(IntegerType::get(Context, 64), 2); 6321 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6322 break; 6323 case Intrinsic::x86_avx_ldu_dq_256: // llvm.x86.avx.ldu.dq.256 6324 case Intrinsic::x86_avx_loadu_dq_256: // llvm.x86.avx.loadu.dq.256 6325 ResultTy = VectorType::get(IntegerType::get(Context, 8), 32); 6326 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6327 break; 6328 case Intrinsic::x86_avx_vbroadcastss: // llvm.x86.avx.vbroadcastss 6329 case Intrinsic::x86_sse_loadu_ps: // llvm.x86.sse.loadu.ps 6330 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6331 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6332 break; 6333 case Intrinsic::x86_avx_maskload_ps: // llvm.x86.avx.maskload.ps 6334 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6335 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6336 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6337 break; 6338 case Intrinsic::x86_sse2_cvtpd2ps: // llvm.x86.sse2.cvtpd2ps 6339 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6340 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6341 break; 6342 case Intrinsic::ppc_altivec_vexptefp: // llvm.ppc.altivec.vexptefp 6343 case Intrinsic::ppc_altivec_vlogefp: // llvm.ppc.altivec.vlogefp 6344 case Intrinsic::ppc_altivec_vrefp: // llvm.ppc.altivec.vrefp 6345 case Intrinsic::ppc_altivec_vrfim: // llvm.ppc.altivec.vrfim 6346 case Intrinsic::ppc_altivec_vrfin: // llvm.ppc.altivec.vrfin 6347 case Intrinsic::ppc_altivec_vrfip: // llvm.ppc.altivec.vrfip 6348 case Intrinsic::ppc_altivec_vrfiz: // llvm.ppc.altivec.vrfiz 6349 case Intrinsic::ppc_altivec_vrsqrtefp: // llvm.ppc.altivec.vrsqrtefp 6350 case Intrinsic::x86_sse_rcp_ps: // llvm.x86.sse.rcp.ps 6351 case Intrinsic::x86_sse_rcp_ss: // llvm.x86.sse.rcp.ss 6352 case Intrinsic::x86_sse_rsqrt_ps: // llvm.x86.sse.rsqrt.ps 6353 case Intrinsic::x86_sse_rsqrt_ss: // llvm.x86.sse.rsqrt.ss 6354 case Intrinsic::x86_sse_sqrt_ps: // llvm.x86.sse.sqrt.ps 6355 case Intrinsic::x86_sse_sqrt_ss: // llvm.x86.sse.sqrt.ss 6356 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6357 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6358 break; 6359 case Intrinsic::x86_sse41_round_ps: // llvm.x86.sse41.round.ps 6360 case Intrinsic::x86_sse_cvtsi2ss: // llvm.x86.sse.cvtsi2ss 6361 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6362 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6363 ArgTys.push_back(IntegerType::get(Context, 32)); 6364 break; 6365 case Intrinsic::x86_sse_cvtsi642ss: // llvm.x86.sse.cvtsi642ss 6366 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6367 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6368 ArgTys.push_back(IntegerType::get(Context, 64)); 6369 break; 6370 case Intrinsic::x86_avx_vpermil_ps: // llvm.x86.avx.vpermil.ps 6371 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6372 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6373 ArgTys.push_back(IntegerType::get(Context, 8)); 6374 break; 6375 case Intrinsic::x86_sse2_cvtsd2ss: // llvm.x86.sse2.cvtsd2ss 6376 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6377 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6378 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6379 break; 6380 case Intrinsic::x86_sse_cvtpi2ps: // llvm.x86.sse.cvtpi2ps 6381 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6382 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6383 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2)); 6384 break; 6385 case Intrinsic::ppc_altivec_vmaxfp: // llvm.ppc.altivec.vmaxfp 6386 case Intrinsic::ppc_altivec_vminfp: // llvm.ppc.altivec.vminfp 6387 case Intrinsic::spu_si_fa: // llvm.spu.si.fa 6388 case Intrinsic::spu_si_fceq: // llvm.spu.si.fceq 6389 case Intrinsic::spu_si_fcgt: // llvm.spu.si.fcgt 6390 case Intrinsic::spu_si_fcmeq: // llvm.spu.si.fcmeq 6391 case Intrinsic::spu_si_fcmgt: // llvm.spu.si.fcmgt 6392 case Intrinsic::spu_si_fm: // llvm.spu.si.fm 6393 case Intrinsic::spu_si_fs: // llvm.spu.si.fs 6394 case Intrinsic::x86_sse3_addsub_ps: // llvm.x86.sse3.addsub.ps 6395 case Intrinsic::x86_sse3_hadd_ps: // llvm.x86.sse3.hadd.ps 6396 case Intrinsic::x86_sse3_hsub_ps: // llvm.x86.sse3.hsub.ps 6397 case Intrinsic::x86_sse_add_ss: // llvm.x86.sse.add.ss 6398 case Intrinsic::x86_sse_div_ss: // llvm.x86.sse.div.ss 6399 case Intrinsic::x86_sse_max_ps: // llvm.x86.sse.max.ps 6400 case Intrinsic::x86_sse_max_ss: // llvm.x86.sse.max.ss 6401 case Intrinsic::x86_sse_min_ps: // llvm.x86.sse.min.ps 6402 case Intrinsic::x86_sse_min_ss: // llvm.x86.sse.min.ss 6403 case Intrinsic::x86_sse_mul_ss: // llvm.x86.sse.mul.ss 6404 case Intrinsic::x86_sse_sub_ss: // llvm.x86.sse.sub.ss 6405 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6406 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6407 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6408 break; 6409 case Intrinsic::x86_sse41_blendps: // llvm.x86.sse41.blendps 6410 case Intrinsic::x86_sse41_dpps: // llvm.x86.sse41.dpps 6411 case Intrinsic::x86_sse41_insertps: // llvm.x86.sse41.insertps 6412 case Intrinsic::x86_sse41_round_ss: // llvm.x86.sse41.round.ss 6413 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6414 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6415 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6416 ArgTys.push_back(IntegerType::get(Context, 32)); 6417 break; 6418 case Intrinsic::x86_sse_cmp_ps: // llvm.x86.sse.cmp.ps 6419 case Intrinsic::x86_sse_cmp_ss: // llvm.x86.sse.cmp.ss 6420 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6421 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6422 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6423 ArgTys.push_back(IntegerType::get(Context, 8)); 6424 break; 6425 case Intrinsic::ppc_altivec_vmaddfp: // llvm.ppc.altivec.vmaddfp 6426 case Intrinsic::ppc_altivec_vnmsubfp: // llvm.ppc.altivec.vnmsubfp 6427 case Intrinsic::spu_si_fma: // llvm.spu.si.fma 6428 case Intrinsic::spu_si_fms: // llvm.spu.si.fms 6429 case Intrinsic::spu_si_fnms: // llvm.spu.si.fnms 6430 case Intrinsic::x86_sse41_blendvps: // llvm.x86.sse41.blendvps 6431 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6432 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6433 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6434 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6435 break; 6436 case Intrinsic::x86_avx_vpermilvar_ps: // llvm.x86.avx.vpermilvar.ps 6437 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6438 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6439 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6440 break; 6441 case Intrinsic::x86_avx_cvt_pd2_ps_256: // llvm.x86.avx.cvt.pd2.ps.256 6442 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6443 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6444 break; 6445 case Intrinsic::x86_sse2_cvtdq2ps: // llvm.x86.sse2.cvtdq2ps 6446 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6447 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6448 break; 6449 case Intrinsic::ppc_altivec_vcfsx: // llvm.ppc.altivec.vcfsx 6450 case Intrinsic::ppc_altivec_vcfux: // llvm.ppc.altivec.vcfux 6451 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6452 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6453 ArgTys.push_back(IntegerType::get(Context, 32)); 6454 break; 6455 case Intrinsic::x86_avx_vextractf128_ps_256: // llvm.x86.avx.vextractf128.ps.256 6456 ResultTy = VectorType::get(Type::getFloatTy(Context), 4); 6457 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6458 ArgTys.push_back(IntegerType::get(Context, 8)); 6459 break; 6460 case Intrinsic::x86_avx_loadu_pd_256: // llvm.x86.avx.loadu.pd.256 6461 case Intrinsic::x86_avx_vbroadcast_sd_256: // llvm.x86.avx.vbroadcast.sd.256 6462 case Intrinsic::x86_avx_vbroadcastf128_pd_256: // llvm.x86.avx.vbroadcastf128.pd.256 6463 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6464 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6465 break; 6466 case Intrinsic::x86_avx_maskload_pd_256: // llvm.x86.avx.maskload.pd.256 6467 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6468 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6469 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6470 break; 6471 case Intrinsic::x86_avx_cvt_ps2_pd_256: // llvm.x86.avx.cvt.ps2.pd.256 6472 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6473 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6474 break; 6475 case Intrinsic::x86_avx_sqrt_pd_256: // llvm.x86.avx.sqrt.pd.256 6476 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6477 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6478 break; 6479 case Intrinsic::x86_avx_round_pd_256: // llvm.x86.avx.round.pd.256 6480 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6481 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6482 ArgTys.push_back(IntegerType::get(Context, 32)); 6483 break; 6484 case Intrinsic::x86_avx_vpermil_pd_256: // llvm.x86.avx.vpermil.pd.256 6485 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6486 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6487 ArgTys.push_back(IntegerType::get(Context, 8)); 6488 break; 6489 case Intrinsic::x86_avx_vinsertf128_pd_256: // llvm.x86.avx.vinsertf128.pd.256 6490 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6491 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6492 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6493 ArgTys.push_back(IntegerType::get(Context, 8)); 6494 break; 6495 case Intrinsic::x86_avx_addsub_pd_256: // llvm.x86.avx.addsub.pd.256 6496 case Intrinsic::x86_avx_hadd_pd_256: // llvm.x86.avx.hadd.pd.256 6497 case Intrinsic::x86_avx_hsub_pd_256: // llvm.x86.avx.hsub.pd.256 6498 case Intrinsic::x86_avx_max_pd_256: // llvm.x86.avx.max.pd.256 6499 case Intrinsic::x86_avx_min_pd_256: // llvm.x86.avx.min.pd.256 6500 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6501 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6502 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6503 break; 6504 case Intrinsic::x86_avx_blend_pd_256: // llvm.x86.avx.blend.pd.256 6505 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6506 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6507 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6508 ArgTys.push_back(IntegerType::get(Context, 32)); 6509 break; 6510 case Intrinsic::x86_avx_cmp_pd_256: // llvm.x86.avx.cmp.pd.256 6511 case Intrinsic::x86_avx_vperm2f128_pd_256: // llvm.x86.avx.vperm2f128.pd.256 6512 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6513 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6514 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6515 ArgTys.push_back(IntegerType::get(Context, 8)); 6516 break; 6517 case Intrinsic::x86_avx_blendv_pd_256: // llvm.x86.avx.blendv.pd.256 6518 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6519 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6520 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6521 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6522 break; 6523 case Intrinsic::x86_avx_vpermilvar_pd_256: // llvm.x86.avx.vpermilvar.pd.256 6524 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6525 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6526 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 4)); 6527 break; 6528 case Intrinsic::x86_avx_cvtdq2_pd_256: // llvm.x86.avx.cvtdq2.pd.256 6529 ResultTy = VectorType::get(Type::getDoubleTy(Context), 4); 6530 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6531 break; 6532 case Intrinsic::x86_mmx_vec_init_w: // llvm.x86.mmx.vec.init.w 6533 ResultTy = VectorType::get(IntegerType::get(Context, 16), 4); 6534 ArgTys.push_back(IntegerType::get(Context, 16)); 6535 ArgTys.push_back(IntegerType::get(Context, 16)); 6536 ArgTys.push_back(IntegerType::get(Context, 16)); 6537 ArgTys.push_back(IntegerType::get(Context, 16)); 6538 break; 6539 case Intrinsic::x86_mmx_packssdw: // llvm.x86.mmx.packssdw 6540 ResultTy = VectorType::get(IntegerType::get(Context, 16), 4); 6541 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2)); 6542 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 2)); 6543 break; 6544 case Intrinsic::x86_ssse3_pabs_w: // llvm.x86.ssse3.pabs.w 6545 ResultTy = VectorType::get(IntegerType::get(Context, 16), 4); 6546 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4)); 6547 break; 6548 case Intrinsic::x86_mmx_pslli_w: // llvm.x86.mmx.pslli.w 6549 case Intrinsic::x86_mmx_psrai_w: // llvm.x86.mmx.psrai.w 6550 case Intrinsic::x86_mmx_psrli_w: // llvm.x86.mmx.psrli.w 6551 case Intrinsic::x86_ssse3_pshuf_w: // llvm.x86.ssse3.pshuf.w 6552 ResultTy = VectorType::get(IntegerType::get(Context, 16), 4); 6553 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4)); 6554 ArgTys.push_back(IntegerType::get(Context, 32)); 6555 break; 6556 case Intrinsic::x86_mmx_psll_w: // llvm.x86.mmx.psll.w 6557 case Intrinsic::x86_mmx_psra_w: // llvm.x86.mmx.psra.w 6558 case Intrinsic::x86_mmx_psrl_w: // llvm.x86.mmx.psrl.w 6559 ResultTy = VectorType::get(IntegerType::get(Context, 16), 4); 6560 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4)); 6561 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 64), 1)); 6562 break; 6563 case Intrinsic::x86_mmx_padd_w: // llvm.x86.mmx.padd.w 6564 case Intrinsic::x86_mmx_padds_w: // llvm.x86.mmx.padds.w 6565 case Intrinsic::x86_mmx_paddus_w: // llvm.x86.mmx.paddus.w 6566 case Intrinsic::x86_mmx_pavg_w: // llvm.x86.mmx.pavg.w 6567 case Intrinsic::x86_mmx_pcmpeq_w: // llvm.x86.mmx.pcmpeq.w 6568 case Intrinsic::x86_mmx_pcmpgt_w: // llvm.x86.mmx.pcmpgt.w 6569 case Intrinsic::x86_mmx_pmaxs_w: // llvm.x86.mmx.pmaxs.w 6570 case Intrinsic::x86_mmx_pmins_w: // llvm.x86.mmx.pmins.w 6571 case Intrinsic::x86_mmx_pmulh_w: // llvm.x86.mmx.pmulh.w 6572 case Intrinsic::x86_mmx_pmulhu_w: // llvm.x86.mmx.pmulhu.w 6573 case Intrinsic::x86_mmx_pmull_w: // llvm.x86.mmx.pmull.w 6574 case Intrinsic::x86_mmx_psub_w: // llvm.x86.mmx.psub.w 6575 case Intrinsic::x86_mmx_psubs_w: // llvm.x86.mmx.psubs.w 6576 case Intrinsic::x86_mmx_psubus_w: // llvm.x86.mmx.psubus.w 6577 case Intrinsic::x86_mmx_punpckhwd: // llvm.x86.mmx.punpckhwd 6578 case Intrinsic::x86_mmx_punpcklwd: // llvm.x86.mmx.punpcklwd 6579 case Intrinsic::x86_ssse3_phadd_sw: // llvm.x86.ssse3.phadd.sw 6580 case Intrinsic::x86_ssse3_phadd_w: // llvm.x86.ssse3.phadd.w 6581 case Intrinsic::x86_ssse3_phsub_sw: // llvm.x86.ssse3.phsub.sw 6582 case Intrinsic::x86_ssse3_phsub_w: // llvm.x86.ssse3.phsub.w 6583 case Intrinsic::x86_ssse3_pmadd_ub_sw: // llvm.x86.ssse3.pmadd.ub.sw 6584 case Intrinsic::x86_ssse3_pmul_hr_sw: // llvm.x86.ssse3.pmul.hr.sw 6585 case Intrinsic::x86_ssse3_psign_w: // llvm.x86.ssse3.psign.w 6586 ResultTy = VectorType::get(IntegerType::get(Context, 16), 4); 6587 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4)); 6588 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4)); 6589 break; 6590 case Intrinsic::x86_mmx_psad_bw: // llvm.x86.mmx.psad.bw 6591 ResultTy = VectorType::get(IntegerType::get(Context, 16), 4); 6592 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 6593 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 6594 break; 6595 case Intrinsic::ppc_altivec_lvewx: // llvm.ppc.altivec.lvewx 6596 case Intrinsic::ppc_altivec_lvx: // llvm.ppc.altivec.lvx 6597 case Intrinsic::ppc_altivec_lvxl: // llvm.ppc.altivec.lvxl 6598 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6599 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6600 break; 6601 case Intrinsic::x86_sse41_pmovsxbd: // llvm.x86.sse41.pmovsxbd 6602 case Intrinsic::x86_sse41_pmovzxbd: // llvm.x86.sse41.pmovzxbd 6603 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6604 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6605 break; 6606 case Intrinsic::ppc_altivec_vmsummbm: // llvm.ppc.altivec.vmsummbm 6607 case Intrinsic::ppc_altivec_vmsumubm: // llvm.ppc.altivec.vmsumubm 6608 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6609 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6610 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6611 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6612 break; 6613 case Intrinsic::ppc_altivec_vsum4sbs: // llvm.ppc.altivec.vsum4sbs 6614 case Intrinsic::ppc_altivec_vsum4ubs: // llvm.ppc.altivec.vsum4ubs 6615 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6616 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6617 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6618 break; 6619 case Intrinsic::x86_sse2_cvtpd2dq: // llvm.x86.sse2.cvtpd2dq 6620 case Intrinsic::x86_sse2_cvttpd2dq: // llvm.x86.sse2.cvttpd2dq 6621 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6622 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 2)); 6623 break; 6624 case Intrinsic::x86_sse2_cvtps2dq: // llvm.x86.sse2.cvtps2dq 6625 case Intrinsic::x86_sse2_cvttps2dq: // llvm.x86.sse2.cvttps2dq 6626 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6627 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6628 break; 6629 case Intrinsic::ppc_altivec_vctsxs: // llvm.ppc.altivec.vctsxs 6630 case Intrinsic::ppc_altivec_vctuxs: // llvm.ppc.altivec.vctuxs 6631 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6632 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6633 ArgTys.push_back(IntegerType::get(Context, 32)); 6634 break; 6635 case Intrinsic::arm_neon_vacgeq: // llvm.arm.neon.vacgeq 6636 case Intrinsic::arm_neon_vacgtq: // llvm.arm.neon.vacgtq 6637 case Intrinsic::ppc_altivec_vcmpbfp: // llvm.ppc.altivec.vcmpbfp 6638 case Intrinsic::ppc_altivec_vcmpeqfp: // llvm.ppc.altivec.vcmpeqfp 6639 case Intrinsic::ppc_altivec_vcmpgefp: // llvm.ppc.altivec.vcmpgefp 6640 case Intrinsic::ppc_altivec_vcmpgtfp: // llvm.ppc.altivec.vcmpgtfp 6641 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6642 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6643 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6644 break; 6645 case Intrinsic::x86_avx_cvt_pd2dq_256: // llvm.x86.avx.cvt.pd2dq.256 6646 case Intrinsic::x86_avx_cvtt_pd2dq_256: // llvm.x86.avx.cvtt.pd2dq.256 6647 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6648 ArgTys.push_back(VectorType::get(Type::getDoubleTy(Context), 4)); 6649 break; 6650 case Intrinsic::x86_ssse3_pabs_d_128: // llvm.x86.ssse3.pabs.d.128 6651 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6652 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6653 break; 6654 case Intrinsic::spu_si_shli: // llvm.spu.si.shli 6655 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6656 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6657 ArgTys.push_back(IntegerType::get(Context, 8)); 6658 break; 6659 case Intrinsic::spu_si_ai: // llvm.spu.si.ai 6660 case Intrinsic::spu_si_andi: // llvm.spu.si.andi 6661 case Intrinsic::spu_si_ceqi: // llvm.spu.si.ceqi 6662 case Intrinsic::spu_si_cgti: // llvm.spu.si.cgti 6663 case Intrinsic::spu_si_clgti: // llvm.spu.si.clgti 6664 case Intrinsic::spu_si_ori: // llvm.spu.si.ori 6665 case Intrinsic::spu_si_sfi: // llvm.spu.si.sfi 6666 case Intrinsic::spu_si_xori: // llvm.spu.si.xori 6667 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6668 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6669 ArgTys.push_back(IntegerType::get(Context, 16)); 6670 break; 6671 case Intrinsic::x86_sse2_pslli_d: // llvm.x86.sse2.pslli.d 6672 case Intrinsic::x86_sse2_psrai_d: // llvm.x86.sse2.psrai.d 6673 case Intrinsic::x86_sse2_psrli_d: // llvm.x86.sse2.psrli.d 6674 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6675 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6676 ArgTys.push_back(IntegerType::get(Context, 32)); 6677 break; 6678 case Intrinsic::ppc_altivec_vaddcuw: // llvm.ppc.altivec.vaddcuw 6679 case Intrinsic::ppc_altivec_vaddsws: // llvm.ppc.altivec.vaddsws 6680 case Intrinsic::ppc_altivec_vadduws: // llvm.ppc.altivec.vadduws 6681 case Intrinsic::ppc_altivec_vavgsw: // llvm.ppc.altivec.vavgsw 6682 case Intrinsic::ppc_altivec_vavguw: // llvm.ppc.altivec.vavguw 6683 case Intrinsic::ppc_altivec_vcmpequw: // llvm.ppc.altivec.vcmpequw 6684 case Intrinsic::ppc_altivec_vcmpgtsw: // llvm.ppc.altivec.vcmpgtsw 6685 case Intrinsic::ppc_altivec_vcmpgtuw: // llvm.ppc.altivec.vcmpgtuw 6686 case Intrinsic::ppc_altivec_vmaxsw: // llvm.ppc.altivec.vmaxsw 6687 case Intrinsic::ppc_altivec_vmaxuw: // llvm.ppc.altivec.vmaxuw 6688 case Intrinsic::ppc_altivec_vminsw: // llvm.ppc.altivec.vminsw 6689 case Intrinsic::ppc_altivec_vminuw: // llvm.ppc.altivec.vminuw 6690 case Intrinsic::ppc_altivec_vrlw: // llvm.ppc.altivec.vrlw 6691 case Intrinsic::ppc_altivec_vsl: // llvm.ppc.altivec.vsl 6692 case Intrinsic::ppc_altivec_vslo: // llvm.ppc.altivec.vslo 6693 case Intrinsic::ppc_altivec_vslw: // llvm.ppc.altivec.vslw 6694 case Intrinsic::ppc_altivec_vsr: // llvm.ppc.altivec.vsr 6695 case Intrinsic::ppc_altivec_vsraw: // llvm.ppc.altivec.vsraw 6696 case Intrinsic::ppc_altivec_vsro: // llvm.ppc.altivec.vsro 6697 case Intrinsic::ppc_altivec_vsrw: // llvm.ppc.altivec.vsrw 6698 case Intrinsic::ppc_altivec_vsubcuw: // llvm.ppc.altivec.vsubcuw 6699 case Intrinsic::ppc_altivec_vsubsws: // llvm.ppc.altivec.vsubsws 6700 case Intrinsic::ppc_altivec_vsubuws: // llvm.ppc.altivec.vsubuws 6701 case Intrinsic::ppc_altivec_vsum2sws: // llvm.ppc.altivec.vsum2sws 6702 case Intrinsic::ppc_altivec_vsumsws: // llvm.ppc.altivec.vsumsws 6703 case Intrinsic::spu_si_a: // llvm.spu.si.a 6704 case Intrinsic::spu_si_addx: // llvm.spu.si.addx 6705 case Intrinsic::spu_si_and: // llvm.spu.si.and 6706 case Intrinsic::spu_si_andc: // llvm.spu.si.andc 6707 case Intrinsic::spu_si_bg: // llvm.spu.si.bg 6708 case Intrinsic::spu_si_bgx: // llvm.spu.si.bgx 6709 case Intrinsic::spu_si_ceq: // llvm.spu.si.ceq 6710 case Intrinsic::spu_si_cg: // llvm.spu.si.cg 6711 case Intrinsic::spu_si_cgt: // llvm.spu.si.cgt 6712 case Intrinsic::spu_si_cgx: // llvm.spu.si.cgx 6713 case Intrinsic::spu_si_clgt: // llvm.spu.si.clgt 6714 case Intrinsic::spu_si_nand: // llvm.spu.si.nand 6715 case Intrinsic::spu_si_nor: // llvm.spu.si.nor 6716 case Intrinsic::spu_si_or: // llvm.spu.si.or 6717 case Intrinsic::spu_si_orc: // llvm.spu.si.orc 6718 case Intrinsic::spu_si_sf: // llvm.spu.si.sf 6719 case Intrinsic::spu_si_sfx: // llvm.spu.si.sfx 6720 case Intrinsic::spu_si_xor: // llvm.spu.si.xor 6721 case Intrinsic::x86_sse2_pcmpeq_d: // llvm.x86.sse2.pcmpeq.d 6722 case Intrinsic::x86_sse2_pcmpgt_d: // llvm.x86.sse2.pcmpgt.d 6723 case Intrinsic::x86_sse2_psll_d: // llvm.x86.sse2.psll.d 6724 case Intrinsic::x86_sse2_psra_d: // llvm.x86.sse2.psra.d 6725 case Intrinsic::x86_sse2_psrl_d: // llvm.x86.sse2.psrl.d 6726 case Intrinsic::x86_sse41_pmaxsd: // llvm.x86.sse41.pmaxsd 6727 case Intrinsic::x86_sse41_pmaxud: // llvm.x86.sse41.pmaxud 6728 case Intrinsic::x86_sse41_pminsd: // llvm.x86.sse41.pminsd 6729 case Intrinsic::x86_sse41_pminud: // llvm.x86.sse41.pminud 6730 case Intrinsic::x86_ssse3_phadd_d_128: // llvm.x86.ssse3.phadd.d.128 6731 case Intrinsic::x86_ssse3_phadd_sw_128: // llvm.x86.ssse3.phadd.sw.128 6732 case Intrinsic::x86_ssse3_phsub_d_128: // llvm.x86.ssse3.phsub.d.128 6733 case Intrinsic::x86_ssse3_psign_d_128: // llvm.x86.ssse3.psign.d.128 6734 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6735 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6736 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6737 break; 6738 case Intrinsic::ppc_altivec_vperm: // llvm.ppc.altivec.vperm 6739 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6740 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6741 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6742 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6743 break; 6744 case Intrinsic::ppc_altivec_vsel: // llvm.ppc.altivec.vsel 6745 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6746 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6747 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6748 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6749 break; 6750 case Intrinsic::spu_si_mpyh: // llvm.spu.si.mpyh 6751 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6752 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6753 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6754 break; 6755 case Intrinsic::ppc_altivec_vupkhpx: // llvm.ppc.altivec.vupkhpx 6756 case Intrinsic::ppc_altivec_vupkhsh: // llvm.ppc.altivec.vupkhsh 6757 case Intrinsic::ppc_altivec_vupklpx: // llvm.ppc.altivec.vupklpx 6758 case Intrinsic::ppc_altivec_vupklsh: // llvm.ppc.altivec.vupklsh 6759 case Intrinsic::x86_sse41_pmovsxwd: // llvm.x86.sse41.pmovsxwd 6760 case Intrinsic::x86_sse41_pmovzxwd: // llvm.x86.sse41.pmovzxwd 6761 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6762 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6763 break; 6764 case Intrinsic::spu_si_mpyi: // llvm.spu.si.mpyi 6765 case Intrinsic::spu_si_mpyui: // llvm.spu.si.mpyui 6766 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6767 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6768 ArgTys.push_back(IntegerType::get(Context, 16)); 6769 break; 6770 case Intrinsic::ppc_altivec_vsum4shs: // llvm.ppc.altivec.vsum4shs 6771 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6772 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6773 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6774 break; 6775 case Intrinsic::ppc_altivec_vmulesh: // llvm.ppc.altivec.vmulesh 6776 case Intrinsic::ppc_altivec_vmuleuh: // llvm.ppc.altivec.vmuleuh 6777 case Intrinsic::ppc_altivec_vmulosh: // llvm.ppc.altivec.vmulosh 6778 case Intrinsic::ppc_altivec_vmulouh: // llvm.ppc.altivec.vmulouh 6779 case Intrinsic::spu_si_mpy: // llvm.spu.si.mpy 6780 case Intrinsic::spu_si_mpyhh: // llvm.spu.si.mpyhh 6781 case Intrinsic::spu_si_mpyhha: // llvm.spu.si.mpyhha 6782 case Intrinsic::spu_si_mpyhhau: // llvm.spu.si.mpyhhau 6783 case Intrinsic::spu_si_mpyhhu: // llvm.spu.si.mpyhhu 6784 case Intrinsic::spu_si_mpys: // llvm.spu.si.mpys 6785 case Intrinsic::spu_si_mpyu: // llvm.spu.si.mpyu 6786 case Intrinsic::x86_sse2_pmadd_wd: // llvm.x86.sse2.pmadd.wd 6787 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6788 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6789 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6790 break; 6791 case Intrinsic::ppc_altivec_vmsumshm: // llvm.ppc.altivec.vmsumshm 6792 case Intrinsic::ppc_altivec_vmsumshs: // llvm.ppc.altivec.vmsumshs 6793 case Intrinsic::ppc_altivec_vmsumuhm: // llvm.ppc.altivec.vmsumuhm 6794 case Intrinsic::ppc_altivec_vmsumuhs: // llvm.ppc.altivec.vmsumuhs 6795 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6796 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6797 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6798 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6799 break; 6800 case Intrinsic::spu_si_mpya: // llvm.spu.si.mpya 6801 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6802 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6803 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6804 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6805 break; 6806 case Intrinsic::x86_avx_vextractf128_si_256: // llvm.x86.avx.vextractf128.si.256 6807 ResultTy = VectorType::get(IntegerType::get(Context, 32), 4); 6808 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8)); 6809 ArgTys.push_back(IntegerType::get(Context, 8)); 6810 break; 6811 case Intrinsic::x86_avx_loadu_ps_256: // llvm.x86.avx.loadu.ps.256 6812 case Intrinsic::x86_avx_vbroadcastf128_ps_256: // llvm.x86.avx.vbroadcastf128.ps.256 6813 case Intrinsic::x86_avx_vbroadcastss_256: // llvm.x86.avx.vbroadcastss.256 6814 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6815 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6816 break; 6817 case Intrinsic::x86_avx_maskload_ps_256: // llvm.x86.avx.maskload.ps.256 6818 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6819 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6820 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6821 break; 6822 case Intrinsic::x86_avx_rcp_ps_256: // llvm.x86.avx.rcp.ps.256 6823 case Intrinsic::x86_avx_rsqrt_ps_256: // llvm.x86.avx.rsqrt.ps.256 6824 case Intrinsic::x86_avx_sqrt_ps_256: // llvm.x86.avx.sqrt.ps.256 6825 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6826 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6827 break; 6828 case Intrinsic::x86_avx_round_ps_256: // llvm.x86.avx.round.ps.256 6829 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6830 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6831 ArgTys.push_back(IntegerType::get(Context, 32)); 6832 break; 6833 case Intrinsic::x86_avx_vpermil_ps_256: // llvm.x86.avx.vpermil.ps.256 6834 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6835 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6836 ArgTys.push_back(IntegerType::get(Context, 8)); 6837 break; 6838 case Intrinsic::x86_avx_vinsertf128_ps_256: // llvm.x86.avx.vinsertf128.ps.256 6839 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6840 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6841 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 4)); 6842 ArgTys.push_back(IntegerType::get(Context, 8)); 6843 break; 6844 case Intrinsic::x86_avx_addsub_ps_256: // llvm.x86.avx.addsub.ps.256 6845 case Intrinsic::x86_avx_hadd_ps_256: // llvm.x86.avx.hadd.ps.256 6846 case Intrinsic::x86_avx_hsub_ps_256: // llvm.x86.avx.hsub.ps.256 6847 case Intrinsic::x86_avx_max_ps_256: // llvm.x86.avx.max.ps.256 6848 case Intrinsic::x86_avx_min_ps_256: // llvm.x86.avx.min.ps.256 6849 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6850 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6851 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6852 break; 6853 case Intrinsic::x86_avx_blend_ps_256: // llvm.x86.avx.blend.ps.256 6854 case Intrinsic::x86_avx_dp_ps_256: // llvm.x86.avx.dp.ps.256 6855 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6856 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6857 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6858 ArgTys.push_back(IntegerType::get(Context, 32)); 6859 break; 6860 case Intrinsic::x86_avx_cmp_ps_256: // llvm.x86.avx.cmp.ps.256 6861 case Intrinsic::x86_avx_vperm2f128_ps_256: // llvm.x86.avx.vperm2f128.ps.256 6862 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6863 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6864 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6865 ArgTys.push_back(IntegerType::get(Context, 8)); 6866 break; 6867 case Intrinsic::x86_avx_blendv_ps_256: // llvm.x86.avx.blendv.ps.256 6868 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6869 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6870 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6871 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6872 break; 6873 case Intrinsic::x86_avx_vpermilvar_ps_256: // llvm.x86.avx.vpermilvar.ps.256 6874 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6875 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 6876 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8)); 6877 break; 6878 case Intrinsic::x86_avx_cvtdq2_ps_256: // llvm.x86.avx.cvtdq2.ps.256 6879 ResultTy = VectorType::get(Type::getFloatTy(Context), 8); 6880 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8)); 6881 break; 6882 case Intrinsic::ppc_altivec_mfvscr: // llvm.ppc.altivec.mfvscr 6883 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6884 break; 6885 case Intrinsic::ppc_altivec_lvehx: // llvm.ppc.altivec.lvehx 6886 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6887 ArgTys.push_back(PointerType::getUnqual(IntegerType::get(Context, 8))); 6888 break; 6889 case Intrinsic::ppc_altivec_vupkhsb: // llvm.ppc.altivec.vupkhsb 6890 case Intrinsic::ppc_altivec_vupklsb: // llvm.ppc.altivec.vupklsb 6891 case Intrinsic::x86_sse41_pmovsxbw: // llvm.x86.sse41.pmovsxbw 6892 case Intrinsic::x86_sse41_pmovzxbw: // llvm.x86.sse41.pmovzxbw 6893 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6894 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6895 break; 6896 case Intrinsic::ppc_altivec_vmulesb: // llvm.ppc.altivec.vmulesb 6897 case Intrinsic::ppc_altivec_vmuleub: // llvm.ppc.altivec.vmuleub 6898 case Intrinsic::ppc_altivec_vmulosb: // llvm.ppc.altivec.vmulosb 6899 case Intrinsic::ppc_altivec_vmuloub: // llvm.ppc.altivec.vmuloub 6900 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6901 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6902 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 16)); 6903 break; 6904 case Intrinsic::ppc_altivec_vpkpx: // llvm.ppc.altivec.vpkpx 6905 case Intrinsic::ppc_altivec_vpkswus: // llvm.ppc.altivec.vpkswus 6906 case Intrinsic::ppc_altivec_vpkuwus: // llvm.ppc.altivec.vpkuwus 6907 case Intrinsic::x86_sse2_packssdw_128: // llvm.x86.sse2.packssdw.128 6908 case Intrinsic::x86_sse41_packusdw: // llvm.x86.sse41.packusdw 6909 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6910 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6911 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 6912 break; 6913 case Intrinsic::x86_sse41_phminposuw: // llvm.x86.sse41.phminposuw 6914 case Intrinsic::x86_ssse3_pabs_w_128: // llvm.x86.ssse3.pabs.w.128 6915 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6916 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6917 break; 6918 case Intrinsic::spu_si_ahi: // llvm.spu.si.ahi 6919 case Intrinsic::spu_si_andhi: // llvm.spu.si.andhi 6920 case Intrinsic::spu_si_ceqhi: // llvm.spu.si.ceqhi 6921 case Intrinsic::spu_si_cgthi: // llvm.spu.si.cgthi 6922 case Intrinsic::spu_si_clgthi: // llvm.spu.si.clgthi 6923 case Intrinsic::spu_si_fsmbi: // llvm.spu.si.fsmbi 6924 case Intrinsic::spu_si_orhi: // llvm.spu.si.orhi 6925 case Intrinsic::spu_si_sfhi: // llvm.spu.si.sfhi 6926 case Intrinsic::spu_si_xorhi: // llvm.spu.si.xorhi 6927 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6928 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6929 ArgTys.push_back(IntegerType::get(Context, 16)); 6930 break; 6931 case Intrinsic::spu_si_shlqbi: // llvm.spu.si.shlqbi 6932 case Intrinsic::spu_si_shlqby: // llvm.spu.si.shlqby 6933 case Intrinsic::x86_sse2_pslli_w: // llvm.x86.sse2.pslli.w 6934 case Intrinsic::x86_sse2_psrai_w: // llvm.x86.sse2.psrai.w 6935 case Intrinsic::x86_sse2_psrli_w: // llvm.x86.sse2.psrli.w 6936 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6937 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6938 ArgTys.push_back(IntegerType::get(Context, 32)); 6939 break; 6940 case Intrinsic::ppc_altivec_vaddshs: // llvm.ppc.altivec.vaddshs 6941 case Intrinsic::ppc_altivec_vadduhs: // llvm.ppc.altivec.vadduhs 6942 case Intrinsic::ppc_altivec_vavgsh: // llvm.ppc.altivec.vavgsh 6943 case Intrinsic::ppc_altivec_vavguh: // llvm.ppc.altivec.vavguh 6944 case Intrinsic::ppc_altivec_vcmpequh: // llvm.ppc.altivec.vcmpequh 6945 case Intrinsic::ppc_altivec_vcmpgtsh: // llvm.ppc.altivec.vcmpgtsh 6946 case Intrinsic::ppc_altivec_vcmpgtuh: // llvm.ppc.altivec.vcmpgtuh 6947 case Intrinsic::ppc_altivec_vmaxsh: // llvm.ppc.altivec.vmaxsh 6948 case Intrinsic::ppc_altivec_vmaxuh: // llvm.ppc.altivec.vmaxuh 6949 case Intrinsic::ppc_altivec_vminsh: // llvm.ppc.altivec.vminsh 6950 case Intrinsic::ppc_altivec_vminuh: // llvm.ppc.altivec.vminuh 6951 case Intrinsic::ppc_altivec_vrlh: // llvm.ppc.altivec.vrlh 6952 case Intrinsic::ppc_altivec_vslh: // llvm.ppc.altivec.vslh 6953 case Intrinsic::ppc_altivec_vsrah: // llvm.ppc.altivec.vsrah 6954 case Intrinsic::ppc_altivec_vsrh: // llvm.ppc.altivec.vsrh 6955 case Intrinsic::ppc_altivec_vsubshs: // llvm.ppc.altivec.vsubshs 6956 case Intrinsic::ppc_altivec_vsubuhs: // llvm.ppc.altivec.vsubuhs 6957 case Intrinsic::spu_si_ah: // llvm.spu.si.ah 6958 case Intrinsic::spu_si_ceqh: // llvm.spu.si.ceqh 6959 case Intrinsic::spu_si_cgth: // llvm.spu.si.cgth 6960 case Intrinsic::spu_si_clgth: // llvm.spu.si.clgth 6961 case Intrinsic::spu_si_sfh: // llvm.spu.si.sfh 6962 case Intrinsic::x86_sse2_padds_w: // llvm.x86.sse2.padds.w 6963 case Intrinsic::x86_sse2_paddus_w: // llvm.x86.sse2.paddus.w 6964 case Intrinsic::x86_sse2_pavg_w: // llvm.x86.sse2.pavg.w 6965 case Intrinsic::x86_sse2_pcmpeq_w: // llvm.x86.sse2.pcmpeq.w 6966 case Intrinsic::x86_sse2_pcmpgt_w: // llvm.x86.sse2.pcmpgt.w 6967 case Intrinsic::x86_sse2_pmaxs_w: // llvm.x86.sse2.pmaxs.w 6968 case Intrinsic::x86_sse2_pmins_w: // llvm.x86.sse2.pmins.w 6969 case Intrinsic::x86_sse2_pmulh_w: // llvm.x86.sse2.pmulh.w 6970 case Intrinsic::x86_sse2_pmulhu_w: // llvm.x86.sse2.pmulhu.w 6971 case Intrinsic::x86_sse2_psll_w: // llvm.x86.sse2.psll.w 6972 case Intrinsic::x86_sse2_psra_w: // llvm.x86.sse2.psra.w 6973 case Intrinsic::x86_sse2_psrl_w: // llvm.x86.sse2.psrl.w 6974 case Intrinsic::x86_sse2_psubs_w: // llvm.x86.sse2.psubs.w 6975 case Intrinsic::x86_sse2_psubus_w: // llvm.x86.sse2.psubus.w 6976 case Intrinsic::x86_sse41_pmaxuw: // llvm.x86.sse41.pmaxuw 6977 case Intrinsic::x86_sse41_pminuw: // llvm.x86.sse41.pminuw 6978 case Intrinsic::x86_ssse3_phadd_w_128: // llvm.x86.ssse3.phadd.w.128 6979 case Intrinsic::x86_ssse3_phsub_sw_128: // llvm.x86.ssse3.phsub.sw.128 6980 case Intrinsic::x86_ssse3_phsub_w_128: // llvm.x86.ssse3.phsub.w.128 6981 case Intrinsic::x86_ssse3_pmadd_ub_sw_128: // llvm.x86.ssse3.pmadd.ub.sw.128 6982 case Intrinsic::x86_ssse3_pmul_hr_sw_128: // llvm.x86.ssse3.pmul.hr.sw.128 6983 case Intrinsic::x86_ssse3_psign_w_128: // llvm.x86.ssse3.psign.w.128 6984 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6985 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6986 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6987 break; 6988 case Intrinsic::x86_sse41_pblendw: // llvm.x86.sse41.pblendw 6989 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6990 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6991 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6992 ArgTys.push_back(IntegerType::get(Context, 32)); 6993 break; 6994 case Intrinsic::ppc_altivec_vmhaddshs: // llvm.ppc.altivec.vmhaddshs 6995 case Intrinsic::ppc_altivec_vmhraddshs: // llvm.ppc.altivec.vmhraddshs 6996 case Intrinsic::ppc_altivec_vmladduhm: // llvm.ppc.altivec.vmladduhm 6997 ResultTy = VectorType::get(IntegerType::get(Context, 16), 8); 6998 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 6999 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 7000 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 8)); 7001 break; 7002 case Intrinsic::x86_avx_cvt_ps2dq_256: // llvm.x86.avx.cvt.ps2dq.256 7003 case Intrinsic::x86_avx_cvtt_ps2dq_256: // llvm.x86.avx.cvtt.ps2dq.256 7004 ResultTy = VectorType::get(IntegerType::get(Context, 32), 8); 7005 ArgTys.push_back(VectorType::get(Type::getFloatTy(Context), 8)); 7006 break; 7007 case Intrinsic::x86_avx_vinsertf128_si_256: // llvm.x86.avx.vinsertf128.si.256 7008 ResultTy = VectorType::get(IntegerType::get(Context, 32), 8); 7009 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8)); 7010 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 4)); 7011 ArgTys.push_back(IntegerType::get(Context, 8)); 7012 break; 7013 case Intrinsic::x86_avx_vperm2f128_si_256: // llvm.x86.avx.vperm2f128.si.256 7014 ResultTy = VectorType::get(IntegerType::get(Context, 32), 8); 7015 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8)); 7016 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 32), 8)); 7017 ArgTys.push_back(IntegerType::get(Context, 8)); 7018 break; 7019 case Intrinsic::x86_mmx_vec_init_b: // llvm.x86.mmx.vec.init.b 7020 ResultTy = VectorType::get(IntegerType::get(Context, 8), 8); 7021 ArgTys.push_back(IntegerType::get(Context, 8)); 7022 ArgTys.push_back(IntegerType::get(Context, 8)); 7023 ArgTys.push_back(IntegerType::get(Context, 8)); 7024 ArgTys.push_back(IntegerType::get(Context, 8)); 7025 ArgTys.push_back(IntegerType::get(Context, 8)); 7026 ArgTys.push_back(IntegerType::get(Context, 8)); 7027 ArgTys.push_back(IntegerType::get(Context, 8)); 7028 ArgTys.push_back(IntegerType::get(Context, 8)); 7029 break; 7030 case Intrinsic::x86_mmx_packsswb: // llvm.x86.mmx.packsswb 7031 case Intrinsic::x86_mmx_packuswb: // llvm.x86.mmx.packuswb 7032 ResultTy = VectorType::get(IntegerType::get(Context, 8), 8); 7033 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4)); 7034 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 16), 4)); 7035 break; 7036 case Intrinsic::x86_ssse3_pabs_b: // llvm.x86.ssse3.pabs.b 7037 ResultTy = VectorType::get(IntegerType::get(Context, 8), 8); 7038 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7039 break; 7040 case Intrinsic::arm_neon_vtbl1: // llvm.arm.neon.vtbl1 7041 case Intrinsic::x86_mmx_padd_b: // llvm.x86.mmx.padd.b 7042 case Intrinsic::x86_mmx_padds_b: // llvm.x86.mmx.padds.b 7043 case Intrinsic::x86_mmx_paddus_b: // llvm.x86.mmx.paddus.b 7044 case Intrinsic::x86_mmx_pavg_b: // llvm.x86.mmx.pavg.b 7045 case Intrinsic::x86_mmx_pcmpeq_b: // llvm.x86.mmx.pcmpeq.b 7046 case Intrinsic::x86_mmx_pcmpgt_b: // llvm.x86.mmx.pcmpgt.b 7047 case Intrinsic::x86_mmx_pmaxu_b: // llvm.x86.mmx.pmaxu.b 7048 case Intrinsic::x86_mmx_pminu_b: // llvm.x86.mmx.pminu.b 7049 case Intrinsic::x86_mmx_psub_b: // llvm.x86.mmx.psub.b 7050 case Intrinsic::x86_mmx_psubs_b: // llvm.x86.mmx.psubs.b 7051 case Intrinsic::x86_mmx_psubus_b: // llvm.x86.mmx.psubus.b 7052 case Intrinsic::x86_mmx_punpckhbw: // llvm.x86.mmx.punpckhbw 7053 case Intrinsic::x86_mmx_punpcklbw: // llvm.x86.mmx.punpcklbw 7054 case Intrinsic::x86_ssse3_pshuf_b: // llvm.x86.ssse3.pshuf.b 7055 case Intrinsic::x86_ssse3_psign_b: // llvm.x86.ssse3.psign.b 7056 ResultTy = VectorType::get(IntegerType::get(Context, 8), 8); 7057 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7058 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7059 break; 7060 case Intrinsic::arm_neon_vtbl2: // llvm.arm.neon.vtbl2 7061 case Intrinsic::arm_neon_vtbx1: // llvm.arm.neon.vtbx1 7062 ResultTy = VectorType::get(IntegerType::get(Context, 8), 8); 7063 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7064 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7065 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7066 break; 7067 case Intrinsic::arm_neon_vtbl3: // llvm.arm.neon.vtbl3 7068 case Intrinsic::arm_neon_vtbx2: // llvm.arm.neon.vtbx2 7069 ResultTy = VectorType::get(IntegerType::get(Context, 8), 8); 7070 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7071 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7072 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7073 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7074 break; 7075 case Intrinsic::arm_neon_vtbl4: // llvm.arm.neon.vtbl4 7076 case Intrinsic::arm_neon_vtbx3: // llvm.arm.neon.vtbx3 7077 ResultTy = VectorType::get(IntegerType::get(Context, 8), 8); 7078 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7079 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7080 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7081 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7082 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7083 break; 7084 case Intrinsic::arm_neon_vtbx4: // llvm.arm.neon.vtbx4 7085 ResultTy = VectorType::get(IntegerType::get(Context, 8), 8); 7086 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7087 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7088 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7089 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7090 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7091 ArgTys.push_back(VectorType::get(IntegerType::get(Context, 8), 8)); 7092 break; 7093 } 7094#endif 7095 7096// Add parameter attributes that are not common to all intrinsics. 7097#ifdef GET_INTRINSIC_ATTRIBUTES 7098AttrListPtr Intrinsic::getAttributes(ID id) { // No intrinsic can throw exceptions. 7099 Attributes Attr = Attribute::NoUnwind; 7100 switch (id) { 7101 default: break; 7102 case Intrinsic::alpha_umulh: 7103 case Intrinsic::arm_get_fpscr: 7104 case Intrinsic::arm_neon_vabds: 7105 case Intrinsic::arm_neon_vabdu: 7106 case Intrinsic::arm_neon_vabs: 7107 case Intrinsic::arm_neon_vacged: 7108 case Intrinsic::arm_neon_vacgeq: 7109 case Intrinsic::arm_neon_vacgtd: 7110 case Intrinsic::arm_neon_vacgtq: 7111 case Intrinsic::arm_neon_vaddhn: 7112 case Intrinsic::arm_neon_vcls: 7113 case Intrinsic::arm_neon_vclz: 7114 case Intrinsic::arm_neon_vcnt: 7115 case Intrinsic::arm_neon_vcvtfp2fxs: 7116 case Intrinsic::arm_neon_vcvtfp2fxu: 7117 case Intrinsic::arm_neon_vcvtfxs2fp: 7118 case Intrinsic::arm_neon_vcvtfxu2fp: 7119 case Intrinsic::arm_neon_vhadds: 7120 case Intrinsic::arm_neon_vhaddu: 7121 case Intrinsic::arm_neon_vhsubs: 7122 case Intrinsic::arm_neon_vhsubu: 7123 case Intrinsic::arm_neon_vmaxs: 7124 case Intrinsic::arm_neon_vmaxu: 7125 case Intrinsic::arm_neon_vmins: 7126 case Intrinsic::arm_neon_vminu: 7127 case Intrinsic::arm_neon_vmullp: 7128 case Intrinsic::arm_neon_vmulp: 7129 case Intrinsic::arm_neon_vpadals: 7130 case Intrinsic::arm_neon_vpadalu: 7131 case Intrinsic::arm_neon_vpadd: 7132 case Intrinsic::arm_neon_vpaddls: 7133 case Intrinsic::arm_neon_vpaddlu: 7134 case Intrinsic::arm_neon_vpmaxs: 7135 case Intrinsic::arm_neon_vpmaxu: 7136 case Intrinsic::arm_neon_vpmins: 7137 case Intrinsic::arm_neon_vpminu: 7138 case Intrinsic::arm_neon_vqabs: 7139 case Intrinsic::arm_neon_vqadds: 7140 case Intrinsic::arm_neon_vqaddu: 7141 case Intrinsic::arm_neon_vqdmlal: 7142 case Intrinsic::arm_neon_vqdmlsl: 7143 case Intrinsic::arm_neon_vqdmulh: 7144 case Intrinsic::arm_neon_vqdmull: 7145 case Intrinsic::arm_neon_vqmovns: 7146 case Intrinsic::arm_neon_vqmovnsu: 7147 case Intrinsic::arm_neon_vqmovnu: 7148 case Intrinsic::arm_neon_vqneg: 7149 case Intrinsic::arm_neon_vqrdmulh: 7150 case Intrinsic::arm_neon_vqrshiftns: 7151 case Intrinsic::arm_neon_vqrshiftnsu: 7152 case Intrinsic::arm_neon_vqrshiftnu: 7153 case Intrinsic::arm_neon_vqrshifts: 7154 case Intrinsic::arm_neon_vqrshiftu: 7155 case Intrinsic::arm_neon_vqshiftns: 7156 case Intrinsic::arm_neon_vqshiftnsu: 7157 case Intrinsic::arm_neon_vqshiftnu: 7158 case Intrinsic::arm_neon_vqshifts: 7159 case Intrinsic::arm_neon_vqshiftsu: 7160 case Intrinsic::arm_neon_vqshiftu: 7161 case Intrinsic::arm_neon_vqsubs: 7162 case Intrinsic::arm_neon_vqsubu: 7163 case Intrinsic::arm_neon_vraddhn: 7164 case Intrinsic::arm_neon_vrecpe: 7165 case Intrinsic::arm_neon_vrecps: 7166 case Intrinsic::arm_neon_vrhadds: 7167 case Intrinsic::arm_neon_vrhaddu: 7168 case Intrinsic::arm_neon_vrshiftn: 7169 case Intrinsic::arm_neon_vrshifts: 7170 case Intrinsic::arm_neon_vrshiftu: 7171 case Intrinsic::arm_neon_vrsqrte: 7172 case Intrinsic::arm_neon_vrsqrts: 7173 case Intrinsic::arm_neon_vrsubhn: 7174 case Intrinsic::arm_neon_vshiftins: 7175 case Intrinsic::arm_neon_vshiftls: 7176 case Intrinsic::arm_neon_vshiftlu: 7177 case Intrinsic::arm_neon_vshiftn: 7178 case Intrinsic::arm_neon_vshifts: 7179 case Intrinsic::arm_neon_vshiftu: 7180 case Intrinsic::arm_neon_vsubhn: 7181 case Intrinsic::arm_neon_vtbl1: 7182 case Intrinsic::arm_neon_vtbl2: 7183 case Intrinsic::arm_neon_vtbl3: 7184 case Intrinsic::arm_neon_vtbl4: 7185 case Intrinsic::arm_neon_vtbx1: 7186 case Intrinsic::arm_neon_vtbx2: 7187 case Intrinsic::arm_neon_vtbx3: 7188 case Intrinsic::arm_neon_vtbx4: 7189 case Intrinsic::arm_qadd: 7190 case Intrinsic::arm_qsub: 7191 case Intrinsic::arm_ssat: 7192 case Intrinsic::arm_thread_pointer: 7193 case Intrinsic::arm_usat: 7194 case Intrinsic::arm_vcvtr: 7195 case Intrinsic::arm_vcvtru: 7196 case Intrinsic::bswap: 7197 case Intrinsic::convert_from_fp16: 7198 case Intrinsic::convert_to_fp16: 7199 case Intrinsic::ctlz: 7200 case Intrinsic::ctpop: 7201 case Intrinsic::cttz: 7202 case Intrinsic::dbg_declare: 7203 case Intrinsic::dbg_value: 7204 case Intrinsic::eh_sjlj_callsite: 7205 case Intrinsic::eh_sjlj_lsda: 7206 case Intrinsic::frameaddress: 7207 case Intrinsic::ppc_altivec_lvsl: 7208 case Intrinsic::ppc_altivec_lvsr: 7209 case Intrinsic::ppc_altivec_vaddcuw: 7210 case Intrinsic::ppc_altivec_vaddsbs: 7211 case Intrinsic::ppc_altivec_vaddshs: 7212 case Intrinsic::ppc_altivec_vaddsws: 7213 case Intrinsic::ppc_altivec_vaddubs: 7214 case Intrinsic::ppc_altivec_vadduhs: 7215 case Intrinsic::ppc_altivec_vadduws: 7216 case Intrinsic::ppc_altivec_vavgsb: 7217 case Intrinsic::ppc_altivec_vavgsh: 7218 case Intrinsic::ppc_altivec_vavgsw: 7219 case Intrinsic::ppc_altivec_vavgub: 7220 case Intrinsic::ppc_altivec_vavguh: 7221 case Intrinsic::ppc_altivec_vavguw: 7222 case Intrinsic::ppc_altivec_vcfsx: 7223 case Intrinsic::ppc_altivec_vcfux: 7224 case Intrinsic::ppc_altivec_vcmpbfp: 7225 case Intrinsic::ppc_altivec_vcmpbfp_p: 7226 case Intrinsic::ppc_altivec_vcmpeqfp: 7227 case Intrinsic::ppc_altivec_vcmpeqfp_p: 7228 case Intrinsic::ppc_altivec_vcmpequb: 7229 case Intrinsic::ppc_altivec_vcmpequb_p: 7230 case Intrinsic::ppc_altivec_vcmpequh: 7231 case Intrinsic::ppc_altivec_vcmpequh_p: 7232 case Intrinsic::ppc_altivec_vcmpequw: 7233 case Intrinsic::ppc_altivec_vcmpequw_p: 7234 case Intrinsic::ppc_altivec_vcmpgefp: 7235 case Intrinsic::ppc_altivec_vcmpgefp_p: 7236 case Intrinsic::ppc_altivec_vcmpgtfp: 7237 case Intrinsic::ppc_altivec_vcmpgtfp_p: 7238 case Intrinsic::ppc_altivec_vcmpgtsb: 7239 case Intrinsic::ppc_altivec_vcmpgtsb_p: 7240 case Intrinsic::ppc_altivec_vcmpgtsh: 7241 case Intrinsic::ppc_altivec_vcmpgtsh_p: 7242 case Intrinsic::ppc_altivec_vcmpgtsw: 7243 case Intrinsic::ppc_altivec_vcmpgtsw_p: 7244 case Intrinsic::ppc_altivec_vcmpgtub: 7245 case Intrinsic::ppc_altivec_vcmpgtub_p: 7246 case Intrinsic::ppc_altivec_vcmpgtuh: 7247 case Intrinsic::ppc_altivec_vcmpgtuh_p: 7248 case Intrinsic::ppc_altivec_vcmpgtuw: 7249 case Intrinsic::ppc_altivec_vcmpgtuw_p: 7250 case Intrinsic::ppc_altivec_vctsxs: 7251 case Intrinsic::ppc_altivec_vctuxs: 7252 case Intrinsic::ppc_altivec_vexptefp: 7253 case Intrinsic::ppc_altivec_vlogefp: 7254 case Intrinsic::ppc_altivec_vmaddfp: 7255 case Intrinsic::ppc_altivec_vmaxfp: 7256 case Intrinsic::ppc_altivec_vmaxsb: 7257 case Intrinsic::ppc_altivec_vmaxsh: 7258 case Intrinsic::ppc_altivec_vmaxsw: 7259 case Intrinsic::ppc_altivec_vmaxub: 7260 case Intrinsic::ppc_altivec_vmaxuh: 7261 case Intrinsic::ppc_altivec_vmaxuw: 7262 case Intrinsic::ppc_altivec_vmhaddshs: 7263 case Intrinsic::ppc_altivec_vmhraddshs: 7264 case Intrinsic::ppc_altivec_vminfp: 7265 case Intrinsic::ppc_altivec_vminsb: 7266 case Intrinsic::ppc_altivec_vminsh: 7267 case Intrinsic::ppc_altivec_vminsw: 7268 case Intrinsic::ppc_altivec_vminub: 7269 case Intrinsic::ppc_altivec_vminuh: 7270 case Intrinsic::ppc_altivec_vminuw: 7271 case Intrinsic::ppc_altivec_vmladduhm: 7272 case Intrinsic::ppc_altivec_vmsummbm: 7273 case Intrinsic::ppc_altivec_vmsumshm: 7274 case Intrinsic::ppc_altivec_vmsumshs: 7275 case Intrinsic::ppc_altivec_vmsumubm: 7276 case Intrinsic::ppc_altivec_vmsumuhm: 7277 case Intrinsic::ppc_altivec_vmsumuhs: 7278 case Intrinsic::ppc_altivec_vmulesb: 7279 case Intrinsic::ppc_altivec_vmulesh: 7280 case Intrinsic::ppc_altivec_vmuleub: 7281 case Intrinsic::ppc_altivec_vmuleuh: 7282 case Intrinsic::ppc_altivec_vmulosb: 7283 case Intrinsic::ppc_altivec_vmulosh: 7284 case Intrinsic::ppc_altivec_vmuloub: 7285 case Intrinsic::ppc_altivec_vmulouh: 7286 case Intrinsic::ppc_altivec_vnmsubfp: 7287 case Intrinsic::ppc_altivec_vperm: 7288 case Intrinsic::ppc_altivec_vpkpx: 7289 case Intrinsic::ppc_altivec_vpkshss: 7290 case Intrinsic::ppc_altivec_vpkshus: 7291 case Intrinsic::ppc_altivec_vpkswss: 7292 case Intrinsic::ppc_altivec_vpkswus: 7293 case Intrinsic::ppc_altivec_vpkuhus: 7294 case Intrinsic::ppc_altivec_vpkuwus: 7295 case Intrinsic::ppc_altivec_vrefp: 7296 case Intrinsic::ppc_altivec_vrfim: 7297 case Intrinsic::ppc_altivec_vrfin: 7298 case Intrinsic::ppc_altivec_vrfip: 7299 case Intrinsic::ppc_altivec_vrfiz: 7300 case Intrinsic::ppc_altivec_vrlb: 7301 case Intrinsic::ppc_altivec_vrlh: 7302 case Intrinsic::ppc_altivec_vrlw: 7303 case Intrinsic::ppc_altivec_vrsqrtefp: 7304 case Intrinsic::ppc_altivec_vsel: 7305 case Intrinsic::ppc_altivec_vsl: 7306 case Intrinsic::ppc_altivec_vslb: 7307 case Intrinsic::ppc_altivec_vslh: 7308 case Intrinsic::ppc_altivec_vslo: 7309 case Intrinsic::ppc_altivec_vslw: 7310 case Intrinsic::ppc_altivec_vsr: 7311 case Intrinsic::ppc_altivec_vsrab: 7312 case Intrinsic::ppc_altivec_vsrah: 7313 case Intrinsic::ppc_altivec_vsraw: 7314 case Intrinsic::ppc_altivec_vsrb: 7315 case Intrinsic::ppc_altivec_vsrh: 7316 case Intrinsic::ppc_altivec_vsro: 7317 case Intrinsic::ppc_altivec_vsrw: 7318 case Intrinsic::ppc_altivec_vsubcuw: 7319 case Intrinsic::ppc_altivec_vsubsbs: 7320 case Intrinsic::ppc_altivec_vsubshs: 7321 case Intrinsic::ppc_altivec_vsubsws: 7322 case Intrinsic::ppc_altivec_vsububs: 7323 case Intrinsic::ppc_altivec_vsubuhs: 7324 case Intrinsic::ppc_altivec_vsubuws: 7325 case Intrinsic::ppc_altivec_vsum2sws: 7326 case Intrinsic::ppc_altivec_vsum4sbs: 7327 case Intrinsic::ppc_altivec_vsum4shs: 7328 case Intrinsic::ppc_altivec_vsum4ubs: 7329 case Intrinsic::ppc_altivec_vsumsws: 7330 case Intrinsic::ppc_altivec_vupkhpx: 7331 case Intrinsic::ppc_altivec_vupkhsb: 7332 case Intrinsic::ppc_altivec_vupkhsh: 7333 case Intrinsic::ppc_altivec_vupklpx: 7334 case Intrinsic::ppc_altivec_vupklsb: 7335 case Intrinsic::ppc_altivec_vupklsh: 7336 case Intrinsic::returnaddress: 7337 case Intrinsic::sadd_with_overflow: 7338 case Intrinsic::smul_with_overflow: 7339 case Intrinsic::spu_si_a: 7340 case Intrinsic::spu_si_addx: 7341 case Intrinsic::spu_si_ah: 7342 case Intrinsic::spu_si_ahi: 7343 case Intrinsic::spu_si_ai: 7344 case Intrinsic::spu_si_and: 7345 case Intrinsic::spu_si_andbi: 7346 case Intrinsic::spu_si_andc: 7347 case Intrinsic::spu_si_andhi: 7348 case Intrinsic::spu_si_andi: 7349 case Intrinsic::spu_si_bg: 7350 case Intrinsic::spu_si_bgx: 7351 case Intrinsic::spu_si_ceq: 7352 case Intrinsic::spu_si_ceqb: 7353 case Intrinsic::spu_si_ceqbi: 7354 case Intrinsic::spu_si_ceqh: 7355 case Intrinsic::spu_si_ceqhi: 7356 case Intrinsic::spu_si_ceqi: 7357 case Intrinsic::spu_si_cg: 7358 case Intrinsic::spu_si_cgt: 7359 case Intrinsic::spu_si_cgtb: 7360 case Intrinsic::spu_si_cgtbi: 7361 case Intrinsic::spu_si_cgth: 7362 case Intrinsic::spu_si_cgthi: 7363 case Intrinsic::spu_si_cgti: 7364 case Intrinsic::spu_si_cgx: 7365 case Intrinsic::spu_si_clgt: 7366 case Intrinsic::spu_si_clgtb: 7367 case Intrinsic::spu_si_clgtbi: 7368 case Intrinsic::spu_si_clgth: 7369 case Intrinsic::spu_si_clgthi: 7370 case Intrinsic::spu_si_clgti: 7371 case Intrinsic::spu_si_dfa: 7372 case Intrinsic::spu_si_dfm: 7373 case Intrinsic::spu_si_dfma: 7374 case Intrinsic::spu_si_dfms: 7375 case Intrinsic::spu_si_dfnma: 7376 case Intrinsic::spu_si_dfnms: 7377 case Intrinsic::spu_si_dfs: 7378 case Intrinsic::spu_si_fa: 7379 case Intrinsic::spu_si_fceq: 7380 case Intrinsic::spu_si_fcgt: 7381 case Intrinsic::spu_si_fcmeq: 7382 case Intrinsic::spu_si_fcmgt: 7383 case Intrinsic::spu_si_fm: 7384 case Intrinsic::spu_si_fma: 7385 case Intrinsic::spu_si_fms: 7386 case Intrinsic::spu_si_fnms: 7387 case Intrinsic::spu_si_fs: 7388 case Intrinsic::spu_si_fsmbi: 7389 case Intrinsic::spu_si_mpy: 7390 case Intrinsic::spu_si_mpya: 7391 case Intrinsic::spu_si_mpyh: 7392 case Intrinsic::spu_si_mpyhh: 7393 case Intrinsic::spu_si_mpyhha: 7394 case Intrinsic::spu_si_mpyhhau: 7395 case Intrinsic::spu_si_mpyhhu: 7396 case Intrinsic::spu_si_mpyi: 7397 case Intrinsic::spu_si_mpys: 7398 case Intrinsic::spu_si_mpyu: 7399 case Intrinsic::spu_si_mpyui: 7400 case Intrinsic::spu_si_nand: 7401 case Intrinsic::spu_si_nor: 7402 case Intrinsic::spu_si_or: 7403 case Intrinsic::spu_si_orbi: 7404 case Intrinsic::spu_si_orc: 7405 case Intrinsic::spu_si_orhi: 7406 case Intrinsic::spu_si_ori: 7407 case Intrinsic::spu_si_sf: 7408 case Intrinsic::spu_si_sfh: 7409 case Intrinsic::spu_si_sfhi: 7410 case Intrinsic::spu_si_sfi: 7411 case Intrinsic::spu_si_sfx: 7412 case Intrinsic::spu_si_shli: 7413 case Intrinsic::spu_si_shlqbi: 7414 case Intrinsic::spu_si_shlqbii: 7415 case Intrinsic::spu_si_shlqby: 7416 case Intrinsic::spu_si_shlqbyi: 7417 case Intrinsic::spu_si_xor: 7418 case Intrinsic::spu_si_xorbi: 7419 case Intrinsic::spu_si_xorhi: 7420 case Intrinsic::spu_si_xori: 7421 case Intrinsic::ssub_with_overflow: 7422 case Intrinsic::uadd_with_overflow: 7423 case Intrinsic::umul_with_overflow: 7424 case Intrinsic::usub_with_overflow: 7425 case Intrinsic::x86_aesni_aesdec: 7426 case Intrinsic::x86_aesni_aesdeclast: 7427 case Intrinsic::x86_aesni_aesenc: 7428 case Intrinsic::x86_aesni_aesenclast: 7429 case Intrinsic::x86_aesni_aesimc: 7430 case Intrinsic::x86_aesni_aeskeygenassist: 7431 case Intrinsic::x86_avx_addsub_pd_256: 7432 case Intrinsic::x86_avx_addsub_ps_256: 7433 case Intrinsic::x86_avx_blend_pd_256: 7434 case Intrinsic::x86_avx_blend_ps_256: 7435 case Intrinsic::x86_avx_blendv_pd_256: 7436 case Intrinsic::x86_avx_blendv_ps_256: 7437 case Intrinsic::x86_avx_cmp_pd_256: 7438 case Intrinsic::x86_avx_cmp_ps_256: 7439 case Intrinsic::x86_avx_cvt_pd2_ps_256: 7440 case Intrinsic::x86_avx_cvt_pd2dq_256: 7441 case Intrinsic::x86_avx_cvt_ps2_pd_256: 7442 case Intrinsic::x86_avx_cvt_ps2dq_256: 7443 case Intrinsic::x86_avx_cvtdq2_pd_256: 7444 case Intrinsic::x86_avx_cvtdq2_ps_256: 7445 case Intrinsic::x86_avx_cvtt_pd2dq_256: 7446 case Intrinsic::x86_avx_cvtt_ps2dq_256: 7447 case Intrinsic::x86_avx_dp_ps_256: 7448 case Intrinsic::x86_avx_hadd_pd_256: 7449 case Intrinsic::x86_avx_hadd_ps_256: 7450 case Intrinsic::x86_avx_hsub_pd_256: 7451 case Intrinsic::x86_avx_hsub_ps_256: 7452 case Intrinsic::x86_avx_max_pd_256: 7453 case Intrinsic::x86_avx_max_ps_256: 7454 case Intrinsic::x86_avx_min_pd_256: 7455 case Intrinsic::x86_avx_min_ps_256: 7456 case Intrinsic::x86_avx_movmsk_pd_256: 7457 case Intrinsic::x86_avx_movmsk_ps_256: 7458 case Intrinsic::x86_avx_ptestc_256: 7459 case Intrinsic::x86_avx_ptestnzc_256: 7460 case Intrinsic::x86_avx_ptestz_256: 7461 case Intrinsic::x86_avx_rcp_ps_256: 7462 case Intrinsic::x86_avx_round_pd_256: 7463 case Intrinsic::x86_avx_round_ps_256: 7464 case Intrinsic::x86_avx_rsqrt_ps_256: 7465 case Intrinsic::x86_avx_sqrt_pd_256: 7466 case Intrinsic::x86_avx_sqrt_ps_256: 7467 case Intrinsic::x86_avx_vextractf128_pd_256: 7468 case Intrinsic::x86_avx_vextractf128_ps_256: 7469 case Intrinsic::x86_avx_vextractf128_si_256: 7470 case Intrinsic::x86_avx_vinsertf128_pd_256: 7471 case Intrinsic::x86_avx_vinsertf128_ps_256: 7472 case Intrinsic::x86_avx_vinsertf128_si_256: 7473 case Intrinsic::x86_avx_vperm2f128_pd_256: 7474 case Intrinsic::x86_avx_vperm2f128_ps_256: 7475 case Intrinsic::x86_avx_vperm2f128_si_256: 7476 case Intrinsic::x86_avx_vpermil_pd: 7477 case Intrinsic::x86_avx_vpermil_pd_256: 7478 case Intrinsic::x86_avx_vpermil_ps: 7479 case Intrinsic::x86_avx_vpermil_ps_256: 7480 case Intrinsic::x86_avx_vpermilvar_pd: 7481 case Intrinsic::x86_avx_vpermilvar_pd_256: 7482 case Intrinsic::x86_avx_vpermilvar_ps: 7483 case Intrinsic::x86_avx_vpermilvar_ps_256: 7484 case Intrinsic::x86_avx_vtestc_pd: 7485 case Intrinsic::x86_avx_vtestc_pd_256: 7486 case Intrinsic::x86_avx_vtestc_ps: 7487 case Intrinsic::x86_avx_vtestc_ps_256: 7488 case Intrinsic::x86_avx_vtestnzc_pd: 7489 case Intrinsic::x86_avx_vtestnzc_pd_256: 7490 case Intrinsic::x86_avx_vtestnzc_ps: 7491 case Intrinsic::x86_avx_vtestnzc_ps_256: 7492 case Intrinsic::x86_avx_vtestz_pd: 7493 case Intrinsic::x86_avx_vtestz_pd_256: 7494 case Intrinsic::x86_avx_vtestz_ps: 7495 case Intrinsic::x86_avx_vtestz_ps_256: 7496 case Intrinsic::x86_mmx_cvtsi32_si64: 7497 case Intrinsic::x86_mmx_cvtsi64_si32: 7498 case Intrinsic::x86_mmx_packssdw: 7499 case Intrinsic::x86_mmx_packsswb: 7500 case Intrinsic::x86_mmx_packuswb: 7501 case Intrinsic::x86_mmx_padd_b: 7502 case Intrinsic::x86_mmx_padd_d: 7503 case Intrinsic::x86_mmx_padd_q: 7504 case Intrinsic::x86_mmx_padd_w: 7505 case Intrinsic::x86_mmx_padds_b: 7506 case Intrinsic::x86_mmx_padds_w: 7507 case Intrinsic::x86_mmx_paddus_b: 7508 case Intrinsic::x86_mmx_paddus_w: 7509 case Intrinsic::x86_mmx_pand: 7510 case Intrinsic::x86_mmx_pandn: 7511 case Intrinsic::x86_mmx_pavg_b: 7512 case Intrinsic::x86_mmx_pavg_w: 7513 case Intrinsic::x86_mmx_pcmpeq_b: 7514 case Intrinsic::x86_mmx_pcmpeq_d: 7515 case Intrinsic::x86_mmx_pcmpeq_w: 7516 case Intrinsic::x86_mmx_pcmpgt_b: 7517 case Intrinsic::x86_mmx_pcmpgt_d: 7518 case Intrinsic::x86_mmx_pcmpgt_w: 7519 case Intrinsic::x86_mmx_pextr_w: 7520 case Intrinsic::x86_mmx_pinsr_w: 7521 case Intrinsic::x86_mmx_pmadd_wd: 7522 case Intrinsic::x86_mmx_pmaxs_w: 7523 case Intrinsic::x86_mmx_pmaxu_b: 7524 case Intrinsic::x86_mmx_pmins_w: 7525 case Intrinsic::x86_mmx_pminu_b: 7526 case Intrinsic::x86_mmx_pmovmskb: 7527 case Intrinsic::x86_mmx_pmulh_w: 7528 case Intrinsic::x86_mmx_pmulhu_w: 7529 case Intrinsic::x86_mmx_pmull_w: 7530 case Intrinsic::x86_mmx_pmulu_dq: 7531 case Intrinsic::x86_mmx_por: 7532 case Intrinsic::x86_mmx_psad_bw: 7533 case Intrinsic::x86_mmx_psll_d: 7534 case Intrinsic::x86_mmx_psll_q: 7535 case Intrinsic::x86_mmx_psll_w: 7536 case Intrinsic::x86_mmx_pslli_d: 7537 case Intrinsic::x86_mmx_pslli_q: 7538 case Intrinsic::x86_mmx_pslli_w: 7539 case Intrinsic::x86_mmx_psra_d: 7540 case Intrinsic::x86_mmx_psra_w: 7541 case Intrinsic::x86_mmx_psrai_d: 7542 case Intrinsic::x86_mmx_psrai_w: 7543 case Intrinsic::x86_mmx_psrl_d: 7544 case Intrinsic::x86_mmx_psrl_q: 7545 case Intrinsic::x86_mmx_psrl_w: 7546 case Intrinsic::x86_mmx_psrli_d: 7547 case Intrinsic::x86_mmx_psrli_q: 7548 case Intrinsic::x86_mmx_psrli_w: 7549 case Intrinsic::x86_mmx_psub_b: 7550 case Intrinsic::x86_mmx_psub_d: 7551 case Intrinsic::x86_mmx_psub_q: 7552 case Intrinsic::x86_mmx_psub_w: 7553 case Intrinsic::x86_mmx_psubs_b: 7554 case Intrinsic::x86_mmx_psubs_w: 7555 case Intrinsic::x86_mmx_psubus_b: 7556 case Intrinsic::x86_mmx_psubus_w: 7557 case Intrinsic::x86_mmx_punpckhbw: 7558 case Intrinsic::x86_mmx_punpckhdq: 7559 case Intrinsic::x86_mmx_punpckhwd: 7560 case Intrinsic::x86_mmx_punpcklbw: 7561 case Intrinsic::x86_mmx_punpckldq: 7562 case Intrinsic::x86_mmx_punpcklwd: 7563 case Intrinsic::x86_mmx_pxor: 7564 case Intrinsic::x86_mmx_vec_ext_d: 7565 case Intrinsic::x86_mmx_vec_init_b: 7566 case Intrinsic::x86_mmx_vec_init_d: 7567 case Intrinsic::x86_mmx_vec_init_w: 7568 case Intrinsic::x86_sse2_add_sd: 7569 case Intrinsic::x86_sse2_cmp_pd: 7570 case Intrinsic::x86_sse2_cmp_sd: 7571 case Intrinsic::x86_sse2_comieq_sd: 7572 case Intrinsic::x86_sse2_comige_sd: 7573 case Intrinsic::x86_sse2_comigt_sd: 7574 case Intrinsic::x86_sse2_comile_sd: 7575 case Intrinsic::x86_sse2_comilt_sd: 7576 case Intrinsic::x86_sse2_comineq_sd: 7577 case Intrinsic::x86_sse2_cvtdq2pd: 7578 case Intrinsic::x86_sse2_cvtdq2ps: 7579 case Intrinsic::x86_sse2_cvtpd2dq: 7580 case Intrinsic::x86_sse2_cvtpd2ps: 7581 case Intrinsic::x86_sse2_cvtps2dq: 7582 case Intrinsic::x86_sse2_cvtps2pd: 7583 case Intrinsic::x86_sse2_cvtsd2si: 7584 case Intrinsic::x86_sse2_cvtsd2si64: 7585 case Intrinsic::x86_sse2_cvtsd2ss: 7586 case Intrinsic::x86_sse2_cvtsi2sd: 7587 case Intrinsic::x86_sse2_cvtsi642sd: 7588 case Intrinsic::x86_sse2_cvtss2sd: 7589 case Intrinsic::x86_sse2_cvttpd2dq: 7590 case Intrinsic::x86_sse2_cvttps2dq: 7591 case Intrinsic::x86_sse2_cvttsd2si: 7592 case Intrinsic::x86_sse2_cvttsd2si64: 7593 case Intrinsic::x86_sse2_div_sd: 7594 case Intrinsic::x86_sse2_max_pd: 7595 case Intrinsic::x86_sse2_max_sd: 7596 case Intrinsic::x86_sse2_min_pd: 7597 case Intrinsic::x86_sse2_min_sd: 7598 case Intrinsic::x86_sse2_movmsk_pd: 7599 case Intrinsic::x86_sse2_mul_sd: 7600 case Intrinsic::x86_sse2_packssdw_128: 7601 case Intrinsic::x86_sse2_packsswb_128: 7602 case Intrinsic::x86_sse2_packuswb_128: 7603 case Intrinsic::x86_sse2_padds_b: 7604 case Intrinsic::x86_sse2_padds_w: 7605 case Intrinsic::x86_sse2_paddus_b: 7606 case Intrinsic::x86_sse2_paddus_w: 7607 case Intrinsic::x86_sse2_pavg_b: 7608 case Intrinsic::x86_sse2_pavg_w: 7609 case Intrinsic::x86_sse2_pcmpeq_b: 7610 case Intrinsic::x86_sse2_pcmpeq_d: 7611 case Intrinsic::x86_sse2_pcmpeq_w: 7612 case Intrinsic::x86_sse2_pcmpgt_b: 7613 case Intrinsic::x86_sse2_pcmpgt_d: 7614 case Intrinsic::x86_sse2_pcmpgt_w: 7615 case Intrinsic::x86_sse2_pmadd_wd: 7616 case Intrinsic::x86_sse2_pmaxs_w: 7617 case Intrinsic::x86_sse2_pmaxu_b: 7618 case Intrinsic::x86_sse2_pmins_w: 7619 case Intrinsic::x86_sse2_pminu_b: 7620 case Intrinsic::x86_sse2_pmovmskb_128: 7621 case Intrinsic::x86_sse2_pmulh_w: 7622 case Intrinsic::x86_sse2_pmulhu_w: 7623 case Intrinsic::x86_sse2_pmulu_dq: 7624 case Intrinsic::x86_sse2_psad_bw: 7625 case Intrinsic::x86_sse2_psll_d: 7626 case Intrinsic::x86_sse2_psll_dq: 7627 case Intrinsic::x86_sse2_psll_dq_bs: 7628 case Intrinsic::x86_sse2_psll_q: 7629 case Intrinsic::x86_sse2_psll_w: 7630 case Intrinsic::x86_sse2_pslli_d: 7631 case Intrinsic::x86_sse2_pslli_q: 7632 case Intrinsic::x86_sse2_pslli_w: 7633 case Intrinsic::x86_sse2_psra_d: 7634 case Intrinsic::x86_sse2_psra_w: 7635 case Intrinsic::x86_sse2_psrai_d: 7636 case Intrinsic::x86_sse2_psrai_w: 7637 case Intrinsic::x86_sse2_psrl_d: 7638 case Intrinsic::x86_sse2_psrl_dq: 7639 case Intrinsic::x86_sse2_psrl_dq_bs: 7640 case Intrinsic::x86_sse2_psrl_q: 7641 case Intrinsic::x86_sse2_psrl_w: 7642 case Intrinsic::x86_sse2_psrli_d: 7643 case Intrinsic::x86_sse2_psrli_q: 7644 case Intrinsic::x86_sse2_psrli_w: 7645 case Intrinsic::x86_sse2_psubs_b: 7646 case Intrinsic::x86_sse2_psubs_w: 7647 case Intrinsic::x86_sse2_psubus_b: 7648 case Intrinsic::x86_sse2_psubus_w: 7649 case Intrinsic::x86_sse2_sqrt_pd: 7650 case Intrinsic::x86_sse2_sqrt_sd: 7651 case Intrinsic::x86_sse2_sub_sd: 7652 case Intrinsic::x86_sse2_ucomieq_sd: 7653 case Intrinsic::x86_sse2_ucomige_sd: 7654 case Intrinsic::x86_sse2_ucomigt_sd: 7655 case Intrinsic::x86_sse2_ucomile_sd: 7656 case Intrinsic::x86_sse2_ucomilt_sd: 7657 case Intrinsic::x86_sse2_ucomineq_sd: 7658 case Intrinsic::x86_sse3_addsub_pd: 7659 case Intrinsic::x86_sse3_addsub_ps: 7660 case Intrinsic::x86_sse3_hadd_pd: 7661 case Intrinsic::x86_sse3_hadd_ps: 7662 case Intrinsic::x86_sse3_hsub_pd: 7663 case Intrinsic::x86_sse3_hsub_ps: 7664 case Intrinsic::x86_sse41_blendpd: 7665 case Intrinsic::x86_sse41_blendps: 7666 case Intrinsic::x86_sse41_blendvpd: 7667 case Intrinsic::x86_sse41_blendvps: 7668 case Intrinsic::x86_sse41_dppd: 7669 case Intrinsic::x86_sse41_dpps: 7670 case Intrinsic::x86_sse41_extractps: 7671 case Intrinsic::x86_sse41_insertps: 7672 case Intrinsic::x86_sse41_mpsadbw: 7673 case Intrinsic::x86_sse41_packusdw: 7674 case Intrinsic::x86_sse41_pblendvb: 7675 case Intrinsic::x86_sse41_pblendw: 7676 case Intrinsic::x86_sse41_pcmpeqq: 7677 case Intrinsic::x86_sse41_pextrb: 7678 case Intrinsic::x86_sse41_pextrd: 7679 case Intrinsic::x86_sse41_pextrq: 7680 case Intrinsic::x86_sse41_phminposuw: 7681 case Intrinsic::x86_sse41_pmaxsb: 7682 case Intrinsic::x86_sse41_pmaxsd: 7683 case Intrinsic::x86_sse41_pmaxud: 7684 case Intrinsic::x86_sse41_pmaxuw: 7685 case Intrinsic::x86_sse41_pminsb: 7686 case Intrinsic::x86_sse41_pminsd: 7687 case Intrinsic::x86_sse41_pminud: 7688 case Intrinsic::x86_sse41_pminuw: 7689 case Intrinsic::x86_sse41_pmovsxbd: 7690 case Intrinsic::x86_sse41_pmovsxbq: 7691 case Intrinsic::x86_sse41_pmovsxbw: 7692 case Intrinsic::x86_sse41_pmovsxdq: 7693 case Intrinsic::x86_sse41_pmovsxwd: 7694 case Intrinsic::x86_sse41_pmovsxwq: 7695 case Intrinsic::x86_sse41_pmovzxbd: 7696 case Intrinsic::x86_sse41_pmovzxbq: 7697 case Intrinsic::x86_sse41_pmovzxbw: 7698 case Intrinsic::x86_sse41_pmovzxdq: 7699 case Intrinsic::x86_sse41_pmovzxwd: 7700 case Intrinsic::x86_sse41_pmovzxwq: 7701 case Intrinsic::x86_sse41_pmuldq: 7702 case Intrinsic::x86_sse41_ptestc: 7703 case Intrinsic::x86_sse41_ptestnzc: 7704 case Intrinsic::x86_sse41_ptestz: 7705 case Intrinsic::x86_sse41_round_pd: 7706 case Intrinsic::x86_sse41_round_ps: 7707 case Intrinsic::x86_sse41_round_sd: 7708 case Intrinsic::x86_sse41_round_ss: 7709 case Intrinsic::x86_sse42_crc32_16: 7710 case Intrinsic::x86_sse42_crc32_32: 7711 case Intrinsic::x86_sse42_crc32_8: 7712 case Intrinsic::x86_sse42_crc64_64: 7713 case Intrinsic::x86_sse42_crc64_8: 7714 case Intrinsic::x86_sse42_pcmpestri128: 7715 case Intrinsic::x86_sse42_pcmpestria128: 7716 case Intrinsic::x86_sse42_pcmpestric128: 7717 case Intrinsic::x86_sse42_pcmpestrio128: 7718 case Intrinsic::x86_sse42_pcmpestris128: 7719 case Intrinsic::x86_sse42_pcmpestriz128: 7720 case Intrinsic::x86_sse42_pcmpestrm128: 7721 case Intrinsic::x86_sse42_pcmpgtq: 7722 case Intrinsic::x86_sse42_pcmpistri128: 7723 case Intrinsic::x86_sse42_pcmpistria128: 7724 case Intrinsic::x86_sse42_pcmpistric128: 7725 case Intrinsic::x86_sse42_pcmpistrio128: 7726 case Intrinsic::x86_sse42_pcmpistris128: 7727 case Intrinsic::x86_sse42_pcmpistriz128: 7728 case Intrinsic::x86_sse42_pcmpistrm128: 7729 case Intrinsic::x86_sse_add_ss: 7730 case Intrinsic::x86_sse_cmp_ps: 7731 case Intrinsic::x86_sse_cmp_ss: 7732 case Intrinsic::x86_sse_comieq_ss: 7733 case Intrinsic::x86_sse_comige_ss: 7734 case Intrinsic::x86_sse_comigt_ss: 7735 case Intrinsic::x86_sse_comile_ss: 7736 case Intrinsic::x86_sse_comilt_ss: 7737 case Intrinsic::x86_sse_comineq_ss: 7738 case Intrinsic::x86_sse_cvtpd2pi: 7739 case Intrinsic::x86_sse_cvtpi2pd: 7740 case Intrinsic::x86_sse_cvtpi2ps: 7741 case Intrinsic::x86_sse_cvtps2pi: 7742 case Intrinsic::x86_sse_cvtsi2ss: 7743 case Intrinsic::x86_sse_cvtsi642ss: 7744 case Intrinsic::x86_sse_cvtss2si: 7745 case Intrinsic::x86_sse_cvtss2si64: 7746 case Intrinsic::x86_sse_cvttpd2pi: 7747 case Intrinsic::x86_sse_cvttps2pi: 7748 case Intrinsic::x86_sse_cvttss2si: 7749 case Intrinsic::x86_sse_cvttss2si64: 7750 case Intrinsic::x86_sse_div_ss: 7751 case Intrinsic::x86_sse_max_ps: 7752 case Intrinsic::x86_sse_max_ss: 7753 case Intrinsic::x86_sse_min_ps: 7754 case Intrinsic::x86_sse_min_ss: 7755 case Intrinsic::x86_sse_movmsk_ps: 7756 case Intrinsic::x86_sse_mul_ss: 7757 case Intrinsic::x86_sse_rcp_ps: 7758 case Intrinsic::x86_sse_rcp_ss: 7759 case Intrinsic::x86_sse_rsqrt_ps: 7760 case Intrinsic::x86_sse_rsqrt_ss: 7761 case Intrinsic::x86_sse_sqrt_ps: 7762 case Intrinsic::x86_sse_sqrt_ss: 7763 case Intrinsic::x86_sse_sub_ss: 7764 case Intrinsic::x86_sse_ucomieq_ss: 7765 case Intrinsic::x86_sse_ucomige_ss: 7766 case Intrinsic::x86_sse_ucomigt_ss: 7767 case Intrinsic::x86_sse_ucomile_ss: 7768 case Intrinsic::x86_sse_ucomilt_ss: 7769 case Intrinsic::x86_sse_ucomineq_ss: 7770 case Intrinsic::x86_ssse3_pabs_b: 7771 case Intrinsic::x86_ssse3_pabs_b_128: 7772 case Intrinsic::x86_ssse3_pabs_d: 7773 case Intrinsic::x86_ssse3_pabs_d_128: 7774 case Intrinsic::x86_ssse3_pabs_w: 7775 case Intrinsic::x86_ssse3_pabs_w_128: 7776 case Intrinsic::x86_ssse3_phadd_d: 7777 case Intrinsic::x86_ssse3_phadd_d_128: 7778 case Intrinsic::x86_ssse3_phadd_sw: 7779 case Intrinsic::x86_ssse3_phadd_sw_128: 7780 case Intrinsic::x86_ssse3_phadd_w: 7781 case Intrinsic::x86_ssse3_phadd_w_128: 7782 case Intrinsic::x86_ssse3_phsub_d: 7783 case Intrinsic::x86_ssse3_phsub_d_128: 7784 case Intrinsic::x86_ssse3_phsub_sw: 7785 case Intrinsic::x86_ssse3_phsub_sw_128: 7786 case Intrinsic::x86_ssse3_phsub_w: 7787 case Intrinsic::x86_ssse3_phsub_w_128: 7788 case Intrinsic::x86_ssse3_pmadd_ub_sw: 7789 case Intrinsic::x86_ssse3_pmadd_ub_sw_128: 7790 case Intrinsic::x86_ssse3_pmul_hr_sw: 7791 case Intrinsic::x86_ssse3_pmul_hr_sw_128: 7792 case Intrinsic::x86_ssse3_pshuf_b: 7793 case Intrinsic::x86_ssse3_pshuf_b_128: 7794 case Intrinsic::x86_ssse3_pshuf_w: 7795 case Intrinsic::x86_ssse3_psign_b: 7796 case Intrinsic::x86_ssse3_psign_b_128: 7797 case Intrinsic::x86_ssse3_psign_d: 7798 case Intrinsic::x86_ssse3_psign_d_128: 7799 case Intrinsic::x86_ssse3_psign_w: 7800 case Intrinsic::x86_ssse3_psign_w_128: 7801 case Intrinsic::xcore_bitrev: 7802 case Intrinsic::xcore_getid: 7803 Attr |= Attribute::ReadNone; // These do not access memory. 7804 break; 7805 case Intrinsic::arm_neon_vld1: 7806 case Intrinsic::arm_neon_vld2: 7807 case Intrinsic::arm_neon_vld2lane: 7808 case Intrinsic::arm_neon_vld3: 7809 case Intrinsic::arm_neon_vld3lane: 7810 case Intrinsic::arm_neon_vld4: 7811 case Intrinsic::arm_neon_vld4lane: 7812 case Intrinsic::cos: 7813 case Intrinsic::eh_exception: 7814 case Intrinsic::exp: 7815 case Intrinsic::exp2: 7816 case Intrinsic::gcread: 7817 case Intrinsic::invariant_start: 7818 case Intrinsic::log: 7819 case Intrinsic::log10: 7820 case Intrinsic::log2: 7821 case Intrinsic::objectsize: 7822 case Intrinsic::pow: 7823 case Intrinsic::powi: 7824 case Intrinsic::ppc_altivec_lvebx: 7825 case Intrinsic::ppc_altivec_lvehx: 7826 case Intrinsic::ppc_altivec_lvewx: 7827 case Intrinsic::ppc_altivec_lvx: 7828 case Intrinsic::ppc_altivec_lvxl: 7829 case Intrinsic::ppc_altivec_mfvscr: 7830 case Intrinsic::sin: 7831 case Intrinsic::sqrt: 7832 case Intrinsic::x86_avx_ldu_dq_256: 7833 case Intrinsic::x86_avx_loadu_dq_256: 7834 case Intrinsic::x86_avx_loadu_pd_256: 7835 case Intrinsic::x86_avx_loadu_ps_256: 7836 case Intrinsic::x86_avx_maskload_pd: 7837 case Intrinsic::x86_avx_maskload_pd_256: 7838 case Intrinsic::x86_avx_maskload_ps: 7839 case Intrinsic::x86_avx_maskload_ps_256: 7840 case Intrinsic::x86_avx_vbroadcast_sd_256: 7841 case Intrinsic::x86_avx_vbroadcastf128_pd_256: 7842 case Intrinsic::x86_avx_vbroadcastf128_ps_256: 7843 case Intrinsic::x86_avx_vbroadcastss: 7844 case Intrinsic::x86_avx_vbroadcastss_256: 7845 case Intrinsic::x86_sse2_loadu_dq: 7846 case Intrinsic::x86_sse2_loadu_pd: 7847 case Intrinsic::x86_sse3_ldu_dq: 7848 case Intrinsic::x86_sse41_movntdqa: 7849 case Intrinsic::x86_sse_loadu_ps: 7850 Attr |= Attribute::ReadOnly; // These do not write memory. 7851 break; 7852 } 7853 AttributeWithIndex AWI[3]; 7854 unsigned NumAttrs = 0; 7855 switch (id) { 7856 default: break; 7857 case Intrinsic::atomic_cmp_swap: 7858 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7859 NumAttrs = 1; 7860 break; 7861 case Intrinsic::atomic_load_add: 7862 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7863 NumAttrs = 1; 7864 break; 7865 case Intrinsic::atomic_load_and: 7866 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7867 NumAttrs = 1; 7868 break; 7869 case Intrinsic::atomic_load_max: 7870 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7871 NumAttrs = 1; 7872 break; 7873 case Intrinsic::atomic_load_min: 7874 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7875 NumAttrs = 1; 7876 break; 7877 case Intrinsic::atomic_load_nand: 7878 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7879 NumAttrs = 1; 7880 break; 7881 case Intrinsic::atomic_load_or: 7882 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7883 NumAttrs = 1; 7884 break; 7885 case Intrinsic::atomic_load_sub: 7886 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7887 NumAttrs = 1; 7888 break; 7889 case Intrinsic::atomic_load_umax: 7890 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7891 NumAttrs = 1; 7892 break; 7893 case Intrinsic::atomic_load_umin: 7894 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7895 NumAttrs = 1; 7896 break; 7897 case Intrinsic::atomic_load_xor: 7898 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7899 NumAttrs = 1; 7900 break; 7901 case Intrinsic::atomic_swap: 7902 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7903 NumAttrs = 1; 7904 break; 7905 case Intrinsic::gcwrite: 7906 AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture); 7907 AWI[1] = AttributeWithIndex::get(3, 0|Attribute::NoCapture); 7908 NumAttrs = 2; 7909 break; 7910 case Intrinsic::invariant_end: 7911 AWI[0] = AttributeWithIndex::get(3, 0|Attribute::NoCapture); 7912 NumAttrs = 1; 7913 break; 7914 case Intrinsic::invariant_start: 7915 AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture); 7916 NumAttrs = 1; 7917 break; 7918 case Intrinsic::lifetime_end: 7919 AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture); 7920 NumAttrs = 1; 7921 break; 7922 case Intrinsic::lifetime_start: 7923 AWI[0] = AttributeWithIndex::get(2, 0|Attribute::NoCapture); 7924 NumAttrs = 1; 7925 break; 7926 case Intrinsic::memcpy: 7927 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7928 AWI[1] = AttributeWithIndex::get(2, 0|Attribute::NoCapture); 7929 NumAttrs = 2; 7930 break; 7931 case Intrinsic::memmove: 7932 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7933 AWI[1] = AttributeWithIndex::get(2, 0|Attribute::NoCapture); 7934 NumAttrs = 2; 7935 break; 7936 case Intrinsic::memset: 7937 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7938 NumAttrs = 1; 7939 break; 7940 case Intrinsic::prefetch: 7941 AWI[0] = AttributeWithIndex::get(1, 0|Attribute::NoCapture); 7942 NumAttrs = 1; 7943 break; 7944 } 7945 AWI[NumAttrs] = AttributeWithIndex::get(~0, Attr); 7946 return AttrListPtr::get(AWI, NumAttrs+1); 7947} 7948#endif // GET_INTRINSIC_ATTRIBUTES 7949 7950// Determine intrinsic alias analysis mod/ref behavior. 7951#ifdef GET_INTRINSIC_MODREF_BEHAVIOR 7952switch (iid) { 7953default: 7954 return UnknownModRefBehavior; 7955case Intrinsic::alpha_umulh: 7956 return DoesNotAccessMemory; 7957case Intrinsic::arm_get_fpscr: 7958 return DoesNotAccessMemory; 7959case Intrinsic::arm_neon_vabds: 7960 return DoesNotAccessMemory; 7961case Intrinsic::arm_neon_vabdu: 7962 return DoesNotAccessMemory; 7963case Intrinsic::arm_neon_vabs: 7964 return DoesNotAccessMemory; 7965case Intrinsic::arm_neon_vacged: 7966 return DoesNotAccessMemory; 7967case Intrinsic::arm_neon_vacgeq: 7968 return DoesNotAccessMemory; 7969case Intrinsic::arm_neon_vacgtd: 7970 return DoesNotAccessMemory; 7971case Intrinsic::arm_neon_vacgtq: 7972 return DoesNotAccessMemory; 7973case Intrinsic::arm_neon_vaddhn: 7974 return DoesNotAccessMemory; 7975case Intrinsic::arm_neon_vcls: 7976 return DoesNotAccessMemory; 7977case Intrinsic::arm_neon_vclz: 7978 return DoesNotAccessMemory; 7979case Intrinsic::arm_neon_vcnt: 7980 return DoesNotAccessMemory; 7981case Intrinsic::arm_neon_vcvtfp2fxs: 7982 return DoesNotAccessMemory; 7983case Intrinsic::arm_neon_vcvtfp2fxu: 7984 return DoesNotAccessMemory; 7985case Intrinsic::arm_neon_vcvtfxs2fp: 7986 return DoesNotAccessMemory; 7987case Intrinsic::arm_neon_vcvtfxu2fp: 7988 return DoesNotAccessMemory; 7989case Intrinsic::arm_neon_vhadds: 7990 return DoesNotAccessMemory; 7991case Intrinsic::arm_neon_vhaddu: 7992 return DoesNotAccessMemory; 7993case Intrinsic::arm_neon_vhsubs: 7994 return DoesNotAccessMemory; 7995case Intrinsic::arm_neon_vhsubu: 7996 return DoesNotAccessMemory; 7997case Intrinsic::arm_neon_vld1: 7998 return OnlyReadsMemory; 7999case Intrinsic::arm_neon_vld2: 8000 return OnlyReadsMemory; 8001case Intrinsic::arm_neon_vld2lane: 8002 return OnlyReadsMemory; 8003case Intrinsic::arm_neon_vld3: 8004 return OnlyReadsMemory; 8005case Intrinsic::arm_neon_vld3lane: 8006 return OnlyReadsMemory; 8007case Intrinsic::arm_neon_vld4: 8008 return OnlyReadsMemory; 8009case Intrinsic::arm_neon_vld4lane: 8010 return OnlyReadsMemory; 8011case Intrinsic::arm_neon_vmaxs: 8012 return DoesNotAccessMemory; 8013case Intrinsic::arm_neon_vmaxu: 8014 return DoesNotAccessMemory; 8015case Intrinsic::arm_neon_vmins: 8016 return DoesNotAccessMemory; 8017case Intrinsic::arm_neon_vminu: 8018 return DoesNotAccessMemory; 8019case Intrinsic::arm_neon_vmullp: 8020 return DoesNotAccessMemory; 8021case Intrinsic::arm_neon_vmulp: 8022 return DoesNotAccessMemory; 8023case Intrinsic::arm_neon_vpadals: 8024 return DoesNotAccessMemory; 8025case Intrinsic::arm_neon_vpadalu: 8026 return DoesNotAccessMemory; 8027case Intrinsic::arm_neon_vpadd: 8028 return DoesNotAccessMemory; 8029case Intrinsic::arm_neon_vpaddls: 8030 return DoesNotAccessMemory; 8031case Intrinsic::arm_neon_vpaddlu: 8032 return DoesNotAccessMemory; 8033case Intrinsic::arm_neon_vpmaxs: 8034 return DoesNotAccessMemory; 8035case Intrinsic::arm_neon_vpmaxu: 8036 return DoesNotAccessMemory; 8037case Intrinsic::arm_neon_vpmins: 8038 return DoesNotAccessMemory; 8039case Intrinsic::arm_neon_vpminu: 8040 return DoesNotAccessMemory; 8041case Intrinsic::arm_neon_vqabs: 8042 return DoesNotAccessMemory; 8043case Intrinsic::arm_neon_vqadds: 8044 return DoesNotAccessMemory; 8045case Intrinsic::arm_neon_vqaddu: 8046 return DoesNotAccessMemory; 8047case Intrinsic::arm_neon_vqdmlal: 8048 return DoesNotAccessMemory; 8049case Intrinsic::arm_neon_vqdmlsl: 8050 return DoesNotAccessMemory; 8051case Intrinsic::arm_neon_vqdmulh: 8052 return DoesNotAccessMemory; 8053case Intrinsic::arm_neon_vqdmull: 8054 return DoesNotAccessMemory; 8055case Intrinsic::arm_neon_vqmovns: 8056 return DoesNotAccessMemory; 8057case Intrinsic::arm_neon_vqmovnsu: 8058 return DoesNotAccessMemory; 8059case Intrinsic::arm_neon_vqmovnu: 8060 return DoesNotAccessMemory; 8061case Intrinsic::arm_neon_vqneg: 8062 return DoesNotAccessMemory; 8063case Intrinsic::arm_neon_vqrdmulh: 8064 return DoesNotAccessMemory; 8065case Intrinsic::arm_neon_vqrshiftns: 8066 return DoesNotAccessMemory; 8067case Intrinsic::arm_neon_vqrshiftnsu: 8068 return DoesNotAccessMemory; 8069case Intrinsic::arm_neon_vqrshiftnu: 8070 return DoesNotAccessMemory; 8071case Intrinsic::arm_neon_vqrshifts: 8072 return DoesNotAccessMemory; 8073case Intrinsic::arm_neon_vqrshiftu: 8074 return DoesNotAccessMemory; 8075case Intrinsic::arm_neon_vqshiftns: 8076 return DoesNotAccessMemory; 8077case Intrinsic::arm_neon_vqshiftnsu: 8078 return DoesNotAccessMemory; 8079case Intrinsic::arm_neon_vqshiftnu: 8080 return DoesNotAccessMemory; 8081case Intrinsic::arm_neon_vqshifts: 8082 return DoesNotAccessMemory; 8083case Intrinsic::arm_neon_vqshiftsu: 8084 return DoesNotAccessMemory; 8085case Intrinsic::arm_neon_vqshiftu: 8086 return DoesNotAccessMemory; 8087case Intrinsic::arm_neon_vqsubs: 8088 return DoesNotAccessMemory; 8089case Intrinsic::arm_neon_vqsubu: 8090 return DoesNotAccessMemory; 8091case Intrinsic::arm_neon_vraddhn: 8092 return DoesNotAccessMemory; 8093case Intrinsic::arm_neon_vrecpe: 8094 return DoesNotAccessMemory; 8095case Intrinsic::arm_neon_vrecps: 8096 return DoesNotAccessMemory; 8097case Intrinsic::arm_neon_vrhadds: 8098 return DoesNotAccessMemory; 8099case Intrinsic::arm_neon_vrhaddu: 8100 return DoesNotAccessMemory; 8101case Intrinsic::arm_neon_vrshiftn: 8102 return DoesNotAccessMemory; 8103case Intrinsic::arm_neon_vrshifts: 8104 return DoesNotAccessMemory; 8105case Intrinsic::arm_neon_vrshiftu: 8106 return DoesNotAccessMemory; 8107case Intrinsic::arm_neon_vrsqrte: 8108 return DoesNotAccessMemory; 8109case Intrinsic::arm_neon_vrsqrts: 8110 return DoesNotAccessMemory; 8111case Intrinsic::arm_neon_vrsubhn: 8112 return DoesNotAccessMemory; 8113case Intrinsic::arm_neon_vshiftins: 8114 return DoesNotAccessMemory; 8115case Intrinsic::arm_neon_vshiftls: 8116 return DoesNotAccessMemory; 8117case Intrinsic::arm_neon_vshiftlu: 8118 return DoesNotAccessMemory; 8119case Intrinsic::arm_neon_vshiftn: 8120 return DoesNotAccessMemory; 8121case Intrinsic::arm_neon_vshifts: 8122 return DoesNotAccessMemory; 8123case Intrinsic::arm_neon_vshiftu: 8124 return DoesNotAccessMemory; 8125case Intrinsic::arm_neon_vst1: 8126 return AccessesArguments; 8127case Intrinsic::arm_neon_vst2: 8128 return AccessesArguments; 8129case Intrinsic::arm_neon_vst2lane: 8130 return AccessesArguments; 8131case Intrinsic::arm_neon_vst3: 8132 return AccessesArguments; 8133case Intrinsic::arm_neon_vst3lane: 8134 return AccessesArguments; 8135case Intrinsic::arm_neon_vst4: 8136 return AccessesArguments; 8137case Intrinsic::arm_neon_vst4lane: 8138 return AccessesArguments; 8139case Intrinsic::arm_neon_vsubhn: 8140 return DoesNotAccessMemory; 8141case Intrinsic::arm_neon_vtbl1: 8142 return DoesNotAccessMemory; 8143case Intrinsic::arm_neon_vtbl2: 8144 return DoesNotAccessMemory; 8145case Intrinsic::arm_neon_vtbl3: 8146 return DoesNotAccessMemory; 8147case Intrinsic::arm_neon_vtbl4: 8148 return DoesNotAccessMemory; 8149case Intrinsic::arm_neon_vtbx1: 8150 return DoesNotAccessMemory; 8151case Intrinsic::arm_neon_vtbx2: 8152 return DoesNotAccessMemory; 8153case Intrinsic::arm_neon_vtbx3: 8154 return DoesNotAccessMemory; 8155case Intrinsic::arm_neon_vtbx4: 8156 return DoesNotAccessMemory; 8157case Intrinsic::arm_qadd: 8158 return DoesNotAccessMemory; 8159case Intrinsic::arm_qsub: 8160 return DoesNotAccessMemory; 8161case Intrinsic::arm_ssat: 8162 return DoesNotAccessMemory; 8163case Intrinsic::arm_thread_pointer: 8164 return DoesNotAccessMemory; 8165case Intrinsic::arm_usat: 8166 return DoesNotAccessMemory; 8167case Intrinsic::arm_vcvtr: 8168 return DoesNotAccessMemory; 8169case Intrinsic::arm_vcvtru: 8170 return DoesNotAccessMemory; 8171case Intrinsic::atomic_cmp_swap: 8172 return AccessesArguments; 8173case Intrinsic::atomic_load_add: 8174 return AccessesArguments; 8175case Intrinsic::atomic_load_and: 8176 return AccessesArguments; 8177case Intrinsic::atomic_load_max: 8178 return AccessesArguments; 8179case Intrinsic::atomic_load_min: 8180 return AccessesArguments; 8181case Intrinsic::atomic_load_nand: 8182 return AccessesArguments; 8183case Intrinsic::atomic_load_or: 8184 return AccessesArguments; 8185case Intrinsic::atomic_load_sub: 8186 return AccessesArguments; 8187case Intrinsic::atomic_load_umax: 8188 return AccessesArguments; 8189case Intrinsic::atomic_load_umin: 8190 return AccessesArguments; 8191case Intrinsic::atomic_load_xor: 8192 return AccessesArguments; 8193case Intrinsic::atomic_swap: 8194 return AccessesArguments; 8195case Intrinsic::bswap: 8196 return DoesNotAccessMemory; 8197case Intrinsic::convert_from_fp16: 8198 return DoesNotAccessMemory; 8199case Intrinsic::convert_to_fp16: 8200 return DoesNotAccessMemory; 8201case Intrinsic::cos: 8202 return OnlyReadsMemory; 8203case Intrinsic::ctlz: 8204 return DoesNotAccessMemory; 8205case Intrinsic::ctpop: 8206 return DoesNotAccessMemory; 8207case Intrinsic::cttz: 8208 return DoesNotAccessMemory; 8209case Intrinsic::dbg_declare: 8210 return DoesNotAccessMemory; 8211case Intrinsic::dbg_value: 8212 return DoesNotAccessMemory; 8213case Intrinsic::eh_exception: 8214 return OnlyReadsMemory; 8215case Intrinsic::eh_sjlj_callsite: 8216 return DoesNotAccessMemory; 8217case Intrinsic::eh_sjlj_lsda: 8218 return DoesNotAccessMemory; 8219case Intrinsic::exp: 8220 return OnlyReadsMemory; 8221case Intrinsic::exp2: 8222 return OnlyReadsMemory; 8223case Intrinsic::frameaddress: 8224 return DoesNotAccessMemory; 8225case Intrinsic::gcread: 8226 return OnlyReadsMemory; 8227case Intrinsic::gcwrite: 8228 return AccessesArguments; 8229case Intrinsic::init_trampoline: 8230 return AccessesArguments; 8231case Intrinsic::invariant_end: 8232 return AccessesArguments; 8233case Intrinsic::invariant_start: 8234 return OnlyReadsMemory; 8235case Intrinsic::lifetime_end: 8236 return AccessesArguments; 8237case Intrinsic::lifetime_start: 8238 return AccessesArguments; 8239case Intrinsic::log: 8240 return OnlyReadsMemory; 8241case Intrinsic::log10: 8242 return OnlyReadsMemory; 8243case Intrinsic::log2: 8244 return OnlyReadsMemory; 8245case Intrinsic::memcpy: 8246 return AccessesArguments; 8247case Intrinsic::memmove: 8248 return AccessesArguments; 8249case Intrinsic::memset: 8250 return AccessesArguments; 8251case Intrinsic::objectsize: 8252 return OnlyReadsMemory; 8253case Intrinsic::pow: 8254 return OnlyReadsMemory; 8255case Intrinsic::powi: 8256 return OnlyReadsMemory; 8257case Intrinsic::ppc_altivec_lvebx: 8258 return OnlyReadsMemory; 8259case Intrinsic::ppc_altivec_lvehx: 8260 return OnlyReadsMemory; 8261case Intrinsic::ppc_altivec_lvewx: 8262 return OnlyReadsMemory; 8263case Intrinsic::ppc_altivec_lvsl: 8264 return DoesNotAccessMemory; 8265case Intrinsic::ppc_altivec_lvsr: 8266 return DoesNotAccessMemory; 8267case Intrinsic::ppc_altivec_lvx: 8268 return OnlyReadsMemory; 8269case Intrinsic::ppc_altivec_lvxl: 8270 return OnlyReadsMemory; 8271case Intrinsic::ppc_altivec_mfvscr: 8272 return OnlyReadsMemory; 8273case Intrinsic::ppc_altivec_vaddcuw: 8274 return DoesNotAccessMemory; 8275case Intrinsic::ppc_altivec_vaddsbs: 8276 return DoesNotAccessMemory; 8277case Intrinsic::ppc_altivec_vaddshs: 8278 return DoesNotAccessMemory; 8279case Intrinsic::ppc_altivec_vaddsws: 8280 return DoesNotAccessMemory; 8281case Intrinsic::ppc_altivec_vaddubs: 8282 return DoesNotAccessMemory; 8283case Intrinsic::ppc_altivec_vadduhs: 8284 return DoesNotAccessMemory; 8285case Intrinsic::ppc_altivec_vadduws: 8286 return DoesNotAccessMemory; 8287case Intrinsic::ppc_altivec_vavgsb: 8288 return DoesNotAccessMemory; 8289case Intrinsic::ppc_altivec_vavgsh: 8290 return DoesNotAccessMemory; 8291case Intrinsic::ppc_altivec_vavgsw: 8292 return DoesNotAccessMemory; 8293case Intrinsic::ppc_altivec_vavgub: 8294 return DoesNotAccessMemory; 8295case Intrinsic::ppc_altivec_vavguh: 8296 return DoesNotAccessMemory; 8297case Intrinsic::ppc_altivec_vavguw: 8298 return DoesNotAccessMemory; 8299case Intrinsic::ppc_altivec_vcfsx: 8300 return DoesNotAccessMemory; 8301case Intrinsic::ppc_altivec_vcfux: 8302 return DoesNotAccessMemory; 8303case Intrinsic::ppc_altivec_vcmpbfp: 8304 return DoesNotAccessMemory; 8305case Intrinsic::ppc_altivec_vcmpbfp_p: 8306 return DoesNotAccessMemory; 8307case Intrinsic::ppc_altivec_vcmpeqfp: 8308 return DoesNotAccessMemory; 8309case Intrinsic::ppc_altivec_vcmpeqfp_p: 8310 return DoesNotAccessMemory; 8311case Intrinsic::ppc_altivec_vcmpequb: 8312 return DoesNotAccessMemory; 8313case Intrinsic::ppc_altivec_vcmpequb_p: 8314 return DoesNotAccessMemory; 8315case Intrinsic::ppc_altivec_vcmpequh: 8316 return DoesNotAccessMemory; 8317case Intrinsic::ppc_altivec_vcmpequh_p: 8318 return DoesNotAccessMemory; 8319case Intrinsic::ppc_altivec_vcmpequw: 8320 return DoesNotAccessMemory; 8321case Intrinsic::ppc_altivec_vcmpequw_p: 8322 return DoesNotAccessMemory; 8323case Intrinsic::ppc_altivec_vcmpgefp: 8324 return DoesNotAccessMemory; 8325case Intrinsic::ppc_altivec_vcmpgefp_p: 8326 return DoesNotAccessMemory; 8327case Intrinsic::ppc_altivec_vcmpgtfp: 8328 return DoesNotAccessMemory; 8329case Intrinsic::ppc_altivec_vcmpgtfp_p: 8330 return DoesNotAccessMemory; 8331case Intrinsic::ppc_altivec_vcmpgtsb: 8332 return DoesNotAccessMemory; 8333case Intrinsic::ppc_altivec_vcmpgtsb_p: 8334 return DoesNotAccessMemory; 8335case Intrinsic::ppc_altivec_vcmpgtsh: 8336 return DoesNotAccessMemory; 8337case Intrinsic::ppc_altivec_vcmpgtsh_p: 8338 return DoesNotAccessMemory; 8339case Intrinsic::ppc_altivec_vcmpgtsw: 8340 return DoesNotAccessMemory; 8341case Intrinsic::ppc_altivec_vcmpgtsw_p: 8342 return DoesNotAccessMemory; 8343case Intrinsic::ppc_altivec_vcmpgtub: 8344 return DoesNotAccessMemory; 8345case Intrinsic::ppc_altivec_vcmpgtub_p: 8346 return DoesNotAccessMemory; 8347case Intrinsic::ppc_altivec_vcmpgtuh: 8348 return DoesNotAccessMemory; 8349case Intrinsic::ppc_altivec_vcmpgtuh_p: 8350 return DoesNotAccessMemory; 8351case Intrinsic::ppc_altivec_vcmpgtuw: 8352 return DoesNotAccessMemory; 8353case Intrinsic::ppc_altivec_vcmpgtuw_p: 8354 return DoesNotAccessMemory; 8355case Intrinsic::ppc_altivec_vctsxs: 8356 return DoesNotAccessMemory; 8357case Intrinsic::ppc_altivec_vctuxs: 8358 return DoesNotAccessMemory; 8359case Intrinsic::ppc_altivec_vexptefp: 8360 return DoesNotAccessMemory; 8361case Intrinsic::ppc_altivec_vlogefp: 8362 return DoesNotAccessMemory; 8363case Intrinsic::ppc_altivec_vmaddfp: 8364 return DoesNotAccessMemory; 8365case Intrinsic::ppc_altivec_vmaxfp: 8366 return DoesNotAccessMemory; 8367case Intrinsic::ppc_altivec_vmaxsb: 8368 return DoesNotAccessMemory; 8369case Intrinsic::ppc_altivec_vmaxsh: 8370 return DoesNotAccessMemory; 8371case Intrinsic::ppc_altivec_vmaxsw: 8372 return DoesNotAccessMemory; 8373case Intrinsic::ppc_altivec_vmaxub: 8374 return DoesNotAccessMemory; 8375case Intrinsic::ppc_altivec_vmaxuh: 8376 return DoesNotAccessMemory; 8377case Intrinsic::ppc_altivec_vmaxuw: 8378 return DoesNotAccessMemory; 8379case Intrinsic::ppc_altivec_vmhaddshs: 8380 return DoesNotAccessMemory; 8381case Intrinsic::ppc_altivec_vmhraddshs: 8382 return DoesNotAccessMemory; 8383case Intrinsic::ppc_altivec_vminfp: 8384 return DoesNotAccessMemory; 8385case Intrinsic::ppc_altivec_vminsb: 8386 return DoesNotAccessMemory; 8387case Intrinsic::ppc_altivec_vminsh: 8388 return DoesNotAccessMemory; 8389case Intrinsic::ppc_altivec_vminsw: 8390 return DoesNotAccessMemory; 8391case Intrinsic::ppc_altivec_vminub: 8392 return DoesNotAccessMemory; 8393case Intrinsic::ppc_altivec_vminuh: 8394 return DoesNotAccessMemory; 8395case Intrinsic::ppc_altivec_vminuw: 8396 return DoesNotAccessMemory; 8397case Intrinsic::ppc_altivec_vmladduhm: 8398 return DoesNotAccessMemory; 8399case Intrinsic::ppc_altivec_vmsummbm: 8400 return DoesNotAccessMemory; 8401case Intrinsic::ppc_altivec_vmsumshm: 8402 return DoesNotAccessMemory; 8403case Intrinsic::ppc_altivec_vmsumshs: 8404 return DoesNotAccessMemory; 8405case Intrinsic::ppc_altivec_vmsumubm: 8406 return DoesNotAccessMemory; 8407case Intrinsic::ppc_altivec_vmsumuhm: 8408 return DoesNotAccessMemory; 8409case Intrinsic::ppc_altivec_vmsumuhs: 8410 return DoesNotAccessMemory; 8411case Intrinsic::ppc_altivec_vmulesb: 8412 return DoesNotAccessMemory; 8413case Intrinsic::ppc_altivec_vmulesh: 8414 return DoesNotAccessMemory; 8415case Intrinsic::ppc_altivec_vmuleub: 8416 return DoesNotAccessMemory; 8417case Intrinsic::ppc_altivec_vmuleuh: 8418 return DoesNotAccessMemory; 8419case Intrinsic::ppc_altivec_vmulosb: 8420 return DoesNotAccessMemory; 8421case Intrinsic::ppc_altivec_vmulosh: 8422 return DoesNotAccessMemory; 8423case Intrinsic::ppc_altivec_vmuloub: 8424 return DoesNotAccessMemory; 8425case Intrinsic::ppc_altivec_vmulouh: 8426 return DoesNotAccessMemory; 8427case Intrinsic::ppc_altivec_vnmsubfp: 8428 return DoesNotAccessMemory; 8429case Intrinsic::ppc_altivec_vperm: 8430 return DoesNotAccessMemory; 8431case Intrinsic::ppc_altivec_vpkpx: 8432 return DoesNotAccessMemory; 8433case Intrinsic::ppc_altivec_vpkshss: 8434 return DoesNotAccessMemory; 8435case Intrinsic::ppc_altivec_vpkshus: 8436 return DoesNotAccessMemory; 8437case Intrinsic::ppc_altivec_vpkswss: 8438 return DoesNotAccessMemory; 8439case Intrinsic::ppc_altivec_vpkswus: 8440 return DoesNotAccessMemory; 8441case Intrinsic::ppc_altivec_vpkuhus: 8442 return DoesNotAccessMemory; 8443case Intrinsic::ppc_altivec_vpkuwus: 8444 return DoesNotAccessMemory; 8445case Intrinsic::ppc_altivec_vrefp: 8446 return DoesNotAccessMemory; 8447case Intrinsic::ppc_altivec_vrfim: 8448 return DoesNotAccessMemory; 8449case Intrinsic::ppc_altivec_vrfin: 8450 return DoesNotAccessMemory; 8451case Intrinsic::ppc_altivec_vrfip: 8452 return DoesNotAccessMemory; 8453case Intrinsic::ppc_altivec_vrfiz: 8454 return DoesNotAccessMemory; 8455case Intrinsic::ppc_altivec_vrlb: 8456 return DoesNotAccessMemory; 8457case Intrinsic::ppc_altivec_vrlh: 8458 return DoesNotAccessMemory; 8459case Intrinsic::ppc_altivec_vrlw: 8460 return DoesNotAccessMemory; 8461case Intrinsic::ppc_altivec_vrsqrtefp: 8462 return DoesNotAccessMemory; 8463case Intrinsic::ppc_altivec_vsel: 8464 return DoesNotAccessMemory; 8465case Intrinsic::ppc_altivec_vsl: 8466 return DoesNotAccessMemory; 8467case Intrinsic::ppc_altivec_vslb: 8468 return DoesNotAccessMemory; 8469case Intrinsic::ppc_altivec_vslh: 8470 return DoesNotAccessMemory; 8471case Intrinsic::ppc_altivec_vslo: 8472 return DoesNotAccessMemory; 8473case Intrinsic::ppc_altivec_vslw: 8474 return DoesNotAccessMemory; 8475case Intrinsic::ppc_altivec_vsr: 8476 return DoesNotAccessMemory; 8477case Intrinsic::ppc_altivec_vsrab: 8478 return DoesNotAccessMemory; 8479case Intrinsic::ppc_altivec_vsrah: 8480 return DoesNotAccessMemory; 8481case Intrinsic::ppc_altivec_vsraw: 8482 return DoesNotAccessMemory; 8483case Intrinsic::ppc_altivec_vsrb: 8484 return DoesNotAccessMemory; 8485case Intrinsic::ppc_altivec_vsrh: 8486 return DoesNotAccessMemory; 8487case Intrinsic::ppc_altivec_vsro: 8488 return DoesNotAccessMemory; 8489case Intrinsic::ppc_altivec_vsrw: 8490 return DoesNotAccessMemory; 8491case Intrinsic::ppc_altivec_vsubcuw: 8492 return DoesNotAccessMemory; 8493case Intrinsic::ppc_altivec_vsubsbs: 8494 return DoesNotAccessMemory; 8495case Intrinsic::ppc_altivec_vsubshs: 8496 return DoesNotAccessMemory; 8497case Intrinsic::ppc_altivec_vsubsws: 8498 return DoesNotAccessMemory; 8499case Intrinsic::ppc_altivec_vsububs: 8500 return DoesNotAccessMemory; 8501case Intrinsic::ppc_altivec_vsubuhs: 8502 return DoesNotAccessMemory; 8503case Intrinsic::ppc_altivec_vsubuws: 8504 return DoesNotAccessMemory; 8505case Intrinsic::ppc_altivec_vsum2sws: 8506 return DoesNotAccessMemory; 8507case Intrinsic::ppc_altivec_vsum4sbs: 8508 return DoesNotAccessMemory; 8509case Intrinsic::ppc_altivec_vsum4shs: 8510 return DoesNotAccessMemory; 8511case Intrinsic::ppc_altivec_vsum4ubs: 8512 return DoesNotAccessMemory; 8513case Intrinsic::ppc_altivec_vsumsws: 8514 return DoesNotAccessMemory; 8515case Intrinsic::ppc_altivec_vupkhpx: 8516 return DoesNotAccessMemory; 8517case Intrinsic::ppc_altivec_vupkhsb: 8518 return DoesNotAccessMemory; 8519case Intrinsic::ppc_altivec_vupkhsh: 8520 return DoesNotAccessMemory; 8521case Intrinsic::ppc_altivec_vupklpx: 8522 return DoesNotAccessMemory; 8523case Intrinsic::ppc_altivec_vupklsb: 8524 return DoesNotAccessMemory; 8525case Intrinsic::ppc_altivec_vupklsh: 8526 return DoesNotAccessMemory; 8527case Intrinsic::prefetch: 8528 return AccessesArguments; 8529case Intrinsic::returnaddress: 8530 return DoesNotAccessMemory; 8531case Intrinsic::sadd_with_overflow: 8532 return DoesNotAccessMemory; 8533case Intrinsic::sin: 8534 return OnlyReadsMemory; 8535case Intrinsic::smul_with_overflow: 8536 return DoesNotAccessMemory; 8537case Intrinsic::spu_si_a: 8538 return DoesNotAccessMemory; 8539case Intrinsic::spu_si_addx: 8540 return DoesNotAccessMemory; 8541case Intrinsic::spu_si_ah: 8542 return DoesNotAccessMemory; 8543case Intrinsic::spu_si_ahi: 8544 return DoesNotAccessMemory; 8545case Intrinsic::spu_si_ai: 8546 return DoesNotAccessMemory; 8547case Intrinsic::spu_si_and: 8548 return DoesNotAccessMemory; 8549case Intrinsic::spu_si_andbi: 8550 return DoesNotAccessMemory; 8551case Intrinsic::spu_si_andc: 8552 return DoesNotAccessMemory; 8553case Intrinsic::spu_si_andhi: 8554 return DoesNotAccessMemory; 8555case Intrinsic::spu_si_andi: 8556 return DoesNotAccessMemory; 8557case Intrinsic::spu_si_bg: 8558 return DoesNotAccessMemory; 8559case Intrinsic::spu_si_bgx: 8560 return DoesNotAccessMemory; 8561case Intrinsic::spu_si_ceq: 8562 return DoesNotAccessMemory; 8563case Intrinsic::spu_si_ceqb: 8564 return DoesNotAccessMemory; 8565case Intrinsic::spu_si_ceqbi: 8566 return DoesNotAccessMemory; 8567case Intrinsic::spu_si_ceqh: 8568 return DoesNotAccessMemory; 8569case Intrinsic::spu_si_ceqhi: 8570 return DoesNotAccessMemory; 8571case Intrinsic::spu_si_ceqi: 8572 return DoesNotAccessMemory; 8573case Intrinsic::spu_si_cg: 8574 return DoesNotAccessMemory; 8575case Intrinsic::spu_si_cgt: 8576 return DoesNotAccessMemory; 8577case Intrinsic::spu_si_cgtb: 8578 return DoesNotAccessMemory; 8579case Intrinsic::spu_si_cgtbi: 8580 return DoesNotAccessMemory; 8581case Intrinsic::spu_si_cgth: 8582 return DoesNotAccessMemory; 8583case Intrinsic::spu_si_cgthi: 8584 return DoesNotAccessMemory; 8585case Intrinsic::spu_si_cgti: 8586 return DoesNotAccessMemory; 8587case Intrinsic::spu_si_cgx: 8588 return DoesNotAccessMemory; 8589case Intrinsic::spu_si_clgt: 8590 return DoesNotAccessMemory; 8591case Intrinsic::spu_si_clgtb: 8592 return DoesNotAccessMemory; 8593case Intrinsic::spu_si_clgtbi: 8594 return DoesNotAccessMemory; 8595case Intrinsic::spu_si_clgth: 8596 return DoesNotAccessMemory; 8597case Intrinsic::spu_si_clgthi: 8598 return DoesNotAccessMemory; 8599case Intrinsic::spu_si_clgti: 8600 return DoesNotAccessMemory; 8601case Intrinsic::spu_si_dfa: 8602 return DoesNotAccessMemory; 8603case Intrinsic::spu_si_dfm: 8604 return DoesNotAccessMemory; 8605case Intrinsic::spu_si_dfma: 8606 return DoesNotAccessMemory; 8607case Intrinsic::spu_si_dfms: 8608 return DoesNotAccessMemory; 8609case Intrinsic::spu_si_dfnma: 8610 return DoesNotAccessMemory; 8611case Intrinsic::spu_si_dfnms: 8612 return DoesNotAccessMemory; 8613case Intrinsic::spu_si_dfs: 8614 return DoesNotAccessMemory; 8615case Intrinsic::spu_si_fa: 8616 return DoesNotAccessMemory; 8617case Intrinsic::spu_si_fceq: 8618 return DoesNotAccessMemory; 8619case Intrinsic::spu_si_fcgt: 8620 return DoesNotAccessMemory; 8621case Intrinsic::spu_si_fcmeq: 8622 return DoesNotAccessMemory; 8623case Intrinsic::spu_si_fcmgt: 8624 return DoesNotAccessMemory; 8625case Intrinsic::spu_si_fm: 8626 return DoesNotAccessMemory; 8627case Intrinsic::spu_si_fma: 8628 return DoesNotAccessMemory; 8629case Intrinsic::spu_si_fms: 8630 return DoesNotAccessMemory; 8631case Intrinsic::spu_si_fnms: 8632 return DoesNotAccessMemory; 8633case Intrinsic::spu_si_fs: 8634 return DoesNotAccessMemory; 8635case Intrinsic::spu_si_fsmbi: 8636 return DoesNotAccessMemory; 8637case Intrinsic::spu_si_mpy: 8638 return DoesNotAccessMemory; 8639case Intrinsic::spu_si_mpya: 8640 return DoesNotAccessMemory; 8641case Intrinsic::spu_si_mpyh: 8642 return DoesNotAccessMemory; 8643case Intrinsic::spu_si_mpyhh: 8644 return DoesNotAccessMemory; 8645case Intrinsic::spu_si_mpyhha: 8646 return DoesNotAccessMemory; 8647case Intrinsic::spu_si_mpyhhau: 8648 return DoesNotAccessMemory; 8649case Intrinsic::spu_si_mpyhhu: 8650 return DoesNotAccessMemory; 8651case Intrinsic::spu_si_mpyi: 8652 return DoesNotAccessMemory; 8653case Intrinsic::spu_si_mpys: 8654 return DoesNotAccessMemory; 8655case Intrinsic::spu_si_mpyu: 8656 return DoesNotAccessMemory; 8657case Intrinsic::spu_si_mpyui: 8658 return DoesNotAccessMemory; 8659case Intrinsic::spu_si_nand: 8660 return DoesNotAccessMemory; 8661case Intrinsic::spu_si_nor: 8662 return DoesNotAccessMemory; 8663case Intrinsic::spu_si_or: 8664 return DoesNotAccessMemory; 8665case Intrinsic::spu_si_orbi: 8666 return DoesNotAccessMemory; 8667case Intrinsic::spu_si_orc: 8668 return DoesNotAccessMemory; 8669case Intrinsic::spu_si_orhi: 8670 return DoesNotAccessMemory; 8671case Intrinsic::spu_si_ori: 8672 return DoesNotAccessMemory; 8673case Intrinsic::spu_si_sf: 8674 return DoesNotAccessMemory; 8675case Intrinsic::spu_si_sfh: 8676 return DoesNotAccessMemory; 8677case Intrinsic::spu_si_sfhi: 8678 return DoesNotAccessMemory; 8679case Intrinsic::spu_si_sfi: 8680 return DoesNotAccessMemory; 8681case Intrinsic::spu_si_sfx: 8682 return DoesNotAccessMemory; 8683case Intrinsic::spu_si_shli: 8684 return DoesNotAccessMemory; 8685case Intrinsic::spu_si_shlqbi: 8686 return DoesNotAccessMemory; 8687case Intrinsic::spu_si_shlqbii: 8688 return DoesNotAccessMemory; 8689case Intrinsic::spu_si_shlqby: 8690 return DoesNotAccessMemory; 8691case Intrinsic::spu_si_shlqbyi: 8692 return DoesNotAccessMemory; 8693case Intrinsic::spu_si_xor: 8694 return DoesNotAccessMemory; 8695case Intrinsic::spu_si_xorbi: 8696 return DoesNotAccessMemory; 8697case Intrinsic::spu_si_xorhi: 8698 return DoesNotAccessMemory; 8699case Intrinsic::spu_si_xori: 8700 return DoesNotAccessMemory; 8701case Intrinsic::sqrt: 8702 return OnlyReadsMemory; 8703case Intrinsic::ssub_with_overflow: 8704 return DoesNotAccessMemory; 8705case Intrinsic::uadd_with_overflow: 8706 return DoesNotAccessMemory; 8707case Intrinsic::umul_with_overflow: 8708 return DoesNotAccessMemory; 8709case Intrinsic::usub_with_overflow: 8710 return DoesNotAccessMemory; 8711case Intrinsic::x86_aesni_aesdec: 8712 return DoesNotAccessMemory; 8713case Intrinsic::x86_aesni_aesdeclast: 8714 return DoesNotAccessMemory; 8715case Intrinsic::x86_aesni_aesenc: 8716 return DoesNotAccessMemory; 8717case Intrinsic::x86_aesni_aesenclast: 8718 return DoesNotAccessMemory; 8719case Intrinsic::x86_aesni_aesimc: 8720 return DoesNotAccessMemory; 8721case Intrinsic::x86_aesni_aeskeygenassist: 8722 return DoesNotAccessMemory; 8723case Intrinsic::x86_avx_addsub_pd_256: 8724 return DoesNotAccessMemory; 8725case Intrinsic::x86_avx_addsub_ps_256: 8726 return DoesNotAccessMemory; 8727case Intrinsic::x86_avx_blend_pd_256: 8728 return DoesNotAccessMemory; 8729case Intrinsic::x86_avx_blend_ps_256: 8730 return DoesNotAccessMemory; 8731case Intrinsic::x86_avx_blendv_pd_256: 8732 return DoesNotAccessMemory; 8733case Intrinsic::x86_avx_blendv_ps_256: 8734 return DoesNotAccessMemory; 8735case Intrinsic::x86_avx_cmp_pd_256: 8736 return DoesNotAccessMemory; 8737case Intrinsic::x86_avx_cmp_ps_256: 8738 return DoesNotAccessMemory; 8739case Intrinsic::x86_avx_cvt_pd2_ps_256: 8740 return DoesNotAccessMemory; 8741case Intrinsic::x86_avx_cvt_pd2dq_256: 8742 return DoesNotAccessMemory; 8743case Intrinsic::x86_avx_cvt_ps2_pd_256: 8744 return DoesNotAccessMemory; 8745case Intrinsic::x86_avx_cvt_ps2dq_256: 8746 return DoesNotAccessMemory; 8747case Intrinsic::x86_avx_cvtdq2_pd_256: 8748 return DoesNotAccessMemory; 8749case Intrinsic::x86_avx_cvtdq2_ps_256: 8750 return DoesNotAccessMemory; 8751case Intrinsic::x86_avx_cvtt_pd2dq_256: 8752 return DoesNotAccessMemory; 8753case Intrinsic::x86_avx_cvtt_ps2dq_256: 8754 return DoesNotAccessMemory; 8755case Intrinsic::x86_avx_dp_ps_256: 8756 return DoesNotAccessMemory; 8757case Intrinsic::x86_avx_hadd_pd_256: 8758 return DoesNotAccessMemory; 8759case Intrinsic::x86_avx_hadd_ps_256: 8760 return DoesNotAccessMemory; 8761case Intrinsic::x86_avx_hsub_pd_256: 8762 return DoesNotAccessMemory; 8763case Intrinsic::x86_avx_hsub_ps_256: 8764 return DoesNotAccessMemory; 8765case Intrinsic::x86_avx_ldu_dq_256: 8766 return OnlyReadsMemory; 8767case Intrinsic::x86_avx_loadu_dq_256: 8768 return OnlyReadsMemory; 8769case Intrinsic::x86_avx_loadu_pd_256: 8770 return OnlyReadsMemory; 8771case Intrinsic::x86_avx_loadu_ps_256: 8772 return OnlyReadsMemory; 8773case Intrinsic::x86_avx_maskload_pd: 8774 return OnlyReadsMemory; 8775case Intrinsic::x86_avx_maskload_pd_256: 8776 return OnlyReadsMemory; 8777case Intrinsic::x86_avx_maskload_ps: 8778 return OnlyReadsMemory; 8779case Intrinsic::x86_avx_maskload_ps_256: 8780 return OnlyReadsMemory; 8781case Intrinsic::x86_avx_max_pd_256: 8782 return DoesNotAccessMemory; 8783case Intrinsic::x86_avx_max_ps_256: 8784 return DoesNotAccessMemory; 8785case Intrinsic::x86_avx_min_pd_256: 8786 return DoesNotAccessMemory; 8787case Intrinsic::x86_avx_min_ps_256: 8788 return DoesNotAccessMemory; 8789case Intrinsic::x86_avx_movmsk_pd_256: 8790 return DoesNotAccessMemory; 8791case Intrinsic::x86_avx_movmsk_ps_256: 8792 return DoesNotAccessMemory; 8793case Intrinsic::x86_avx_ptestc_256: 8794 return DoesNotAccessMemory; 8795case Intrinsic::x86_avx_ptestnzc_256: 8796 return DoesNotAccessMemory; 8797case Intrinsic::x86_avx_ptestz_256: 8798 return DoesNotAccessMemory; 8799case Intrinsic::x86_avx_rcp_ps_256: 8800 return DoesNotAccessMemory; 8801case Intrinsic::x86_avx_round_pd_256: 8802 return DoesNotAccessMemory; 8803case Intrinsic::x86_avx_round_ps_256: 8804 return DoesNotAccessMemory; 8805case Intrinsic::x86_avx_rsqrt_ps_256: 8806 return DoesNotAccessMemory; 8807case Intrinsic::x86_avx_sqrt_pd_256: 8808 return DoesNotAccessMemory; 8809case Intrinsic::x86_avx_sqrt_ps_256: 8810 return DoesNotAccessMemory; 8811case Intrinsic::x86_avx_vbroadcast_sd_256: 8812 return OnlyReadsMemory; 8813case Intrinsic::x86_avx_vbroadcastf128_pd_256: 8814 return OnlyReadsMemory; 8815case Intrinsic::x86_avx_vbroadcastf128_ps_256: 8816 return OnlyReadsMemory; 8817case Intrinsic::x86_avx_vbroadcastss: 8818 return OnlyReadsMemory; 8819case Intrinsic::x86_avx_vbroadcastss_256: 8820 return OnlyReadsMemory; 8821case Intrinsic::x86_avx_vextractf128_pd_256: 8822 return DoesNotAccessMemory; 8823case Intrinsic::x86_avx_vextractf128_ps_256: 8824 return DoesNotAccessMemory; 8825case Intrinsic::x86_avx_vextractf128_si_256: 8826 return DoesNotAccessMemory; 8827case Intrinsic::x86_avx_vinsertf128_pd_256: 8828 return DoesNotAccessMemory; 8829case Intrinsic::x86_avx_vinsertf128_ps_256: 8830 return DoesNotAccessMemory; 8831case Intrinsic::x86_avx_vinsertf128_si_256: 8832 return DoesNotAccessMemory; 8833case Intrinsic::x86_avx_vperm2f128_pd_256: 8834 return DoesNotAccessMemory; 8835case Intrinsic::x86_avx_vperm2f128_ps_256: 8836 return DoesNotAccessMemory; 8837case Intrinsic::x86_avx_vperm2f128_si_256: 8838 return DoesNotAccessMemory; 8839case Intrinsic::x86_avx_vpermil_pd: 8840 return DoesNotAccessMemory; 8841case Intrinsic::x86_avx_vpermil_pd_256: 8842 return DoesNotAccessMemory; 8843case Intrinsic::x86_avx_vpermil_ps: 8844 return DoesNotAccessMemory; 8845case Intrinsic::x86_avx_vpermil_ps_256: 8846 return DoesNotAccessMemory; 8847case Intrinsic::x86_avx_vpermilvar_pd: 8848 return DoesNotAccessMemory; 8849case Intrinsic::x86_avx_vpermilvar_pd_256: 8850 return DoesNotAccessMemory; 8851case Intrinsic::x86_avx_vpermilvar_ps: 8852 return DoesNotAccessMemory; 8853case Intrinsic::x86_avx_vpermilvar_ps_256: 8854 return DoesNotAccessMemory; 8855case Intrinsic::x86_avx_vtestc_pd: 8856 return DoesNotAccessMemory; 8857case Intrinsic::x86_avx_vtestc_pd_256: 8858 return DoesNotAccessMemory; 8859case Intrinsic::x86_avx_vtestc_ps: 8860 return DoesNotAccessMemory; 8861case Intrinsic::x86_avx_vtestc_ps_256: 8862 return DoesNotAccessMemory; 8863case Intrinsic::x86_avx_vtestnzc_pd: 8864 return DoesNotAccessMemory; 8865case Intrinsic::x86_avx_vtestnzc_pd_256: 8866 return DoesNotAccessMemory; 8867case Intrinsic::x86_avx_vtestnzc_ps: 8868 return DoesNotAccessMemory; 8869case Intrinsic::x86_avx_vtestnzc_ps_256: 8870 return DoesNotAccessMemory; 8871case Intrinsic::x86_avx_vtestz_pd: 8872 return DoesNotAccessMemory; 8873case Intrinsic::x86_avx_vtestz_pd_256: 8874 return DoesNotAccessMemory; 8875case Intrinsic::x86_avx_vtestz_ps: 8876 return DoesNotAccessMemory; 8877case Intrinsic::x86_avx_vtestz_ps_256: 8878 return DoesNotAccessMemory; 8879case Intrinsic::x86_mmx_cvtsi32_si64: 8880 return DoesNotAccessMemory; 8881case Intrinsic::x86_mmx_cvtsi64_si32: 8882 return DoesNotAccessMemory; 8883case Intrinsic::x86_mmx_packssdw: 8884 return DoesNotAccessMemory; 8885case Intrinsic::x86_mmx_packsswb: 8886 return DoesNotAccessMemory; 8887case Intrinsic::x86_mmx_packuswb: 8888 return DoesNotAccessMemory; 8889case Intrinsic::x86_mmx_padd_b: 8890 return DoesNotAccessMemory; 8891case Intrinsic::x86_mmx_padd_d: 8892 return DoesNotAccessMemory; 8893case Intrinsic::x86_mmx_padd_q: 8894 return DoesNotAccessMemory; 8895case Intrinsic::x86_mmx_padd_w: 8896 return DoesNotAccessMemory; 8897case Intrinsic::x86_mmx_padds_b: 8898 return DoesNotAccessMemory; 8899case Intrinsic::x86_mmx_padds_w: 8900 return DoesNotAccessMemory; 8901case Intrinsic::x86_mmx_paddus_b: 8902 return DoesNotAccessMemory; 8903case Intrinsic::x86_mmx_paddus_w: 8904 return DoesNotAccessMemory; 8905case Intrinsic::x86_mmx_pand: 8906 return DoesNotAccessMemory; 8907case Intrinsic::x86_mmx_pandn: 8908 return DoesNotAccessMemory; 8909case Intrinsic::x86_mmx_pavg_b: 8910 return DoesNotAccessMemory; 8911case Intrinsic::x86_mmx_pavg_w: 8912 return DoesNotAccessMemory; 8913case Intrinsic::x86_mmx_pcmpeq_b: 8914 return DoesNotAccessMemory; 8915case Intrinsic::x86_mmx_pcmpeq_d: 8916 return DoesNotAccessMemory; 8917case Intrinsic::x86_mmx_pcmpeq_w: 8918 return DoesNotAccessMemory; 8919case Intrinsic::x86_mmx_pcmpgt_b: 8920 return DoesNotAccessMemory; 8921case Intrinsic::x86_mmx_pcmpgt_d: 8922 return DoesNotAccessMemory; 8923case Intrinsic::x86_mmx_pcmpgt_w: 8924 return DoesNotAccessMemory; 8925case Intrinsic::x86_mmx_pextr_w: 8926 return DoesNotAccessMemory; 8927case Intrinsic::x86_mmx_pinsr_w: 8928 return DoesNotAccessMemory; 8929case Intrinsic::x86_mmx_pmadd_wd: 8930 return DoesNotAccessMemory; 8931case Intrinsic::x86_mmx_pmaxs_w: 8932 return DoesNotAccessMemory; 8933case Intrinsic::x86_mmx_pmaxu_b: 8934 return DoesNotAccessMemory; 8935case Intrinsic::x86_mmx_pmins_w: 8936 return DoesNotAccessMemory; 8937case Intrinsic::x86_mmx_pminu_b: 8938 return DoesNotAccessMemory; 8939case Intrinsic::x86_mmx_pmovmskb: 8940 return DoesNotAccessMemory; 8941case Intrinsic::x86_mmx_pmulh_w: 8942 return DoesNotAccessMemory; 8943case Intrinsic::x86_mmx_pmulhu_w: 8944 return DoesNotAccessMemory; 8945case Intrinsic::x86_mmx_pmull_w: 8946 return DoesNotAccessMemory; 8947case Intrinsic::x86_mmx_pmulu_dq: 8948 return DoesNotAccessMemory; 8949case Intrinsic::x86_mmx_por: 8950 return DoesNotAccessMemory; 8951case Intrinsic::x86_mmx_psad_bw: 8952 return DoesNotAccessMemory; 8953case Intrinsic::x86_mmx_psll_d: 8954 return DoesNotAccessMemory; 8955case Intrinsic::x86_mmx_psll_q: 8956 return DoesNotAccessMemory; 8957case Intrinsic::x86_mmx_psll_w: 8958 return DoesNotAccessMemory; 8959case Intrinsic::x86_mmx_pslli_d: 8960 return DoesNotAccessMemory; 8961case Intrinsic::x86_mmx_pslli_q: 8962 return DoesNotAccessMemory; 8963case Intrinsic::x86_mmx_pslli_w: 8964 return DoesNotAccessMemory; 8965case Intrinsic::x86_mmx_psra_d: 8966 return DoesNotAccessMemory; 8967case Intrinsic::x86_mmx_psra_w: 8968 return DoesNotAccessMemory; 8969case Intrinsic::x86_mmx_psrai_d: 8970 return DoesNotAccessMemory; 8971case Intrinsic::x86_mmx_psrai_w: 8972 return DoesNotAccessMemory; 8973case Intrinsic::x86_mmx_psrl_d: 8974 return DoesNotAccessMemory; 8975case Intrinsic::x86_mmx_psrl_q: 8976 return DoesNotAccessMemory; 8977case Intrinsic::x86_mmx_psrl_w: 8978 return DoesNotAccessMemory; 8979case Intrinsic::x86_mmx_psrli_d: 8980 return DoesNotAccessMemory; 8981case Intrinsic::x86_mmx_psrli_q: 8982 return DoesNotAccessMemory; 8983case Intrinsic::x86_mmx_psrli_w: 8984 return DoesNotAccessMemory; 8985case Intrinsic::x86_mmx_psub_b: 8986 return DoesNotAccessMemory; 8987case Intrinsic::x86_mmx_psub_d: 8988 return DoesNotAccessMemory; 8989case Intrinsic::x86_mmx_psub_q: 8990 return DoesNotAccessMemory; 8991case Intrinsic::x86_mmx_psub_w: 8992 return DoesNotAccessMemory; 8993case Intrinsic::x86_mmx_psubs_b: 8994 return DoesNotAccessMemory; 8995case Intrinsic::x86_mmx_psubs_w: 8996 return DoesNotAccessMemory; 8997case Intrinsic::x86_mmx_psubus_b: 8998 return DoesNotAccessMemory; 8999case Intrinsic::x86_mmx_psubus_w: 9000 return DoesNotAccessMemory; 9001case Intrinsic::x86_mmx_punpckhbw: 9002 return DoesNotAccessMemory; 9003case Intrinsic::x86_mmx_punpckhdq: 9004 return DoesNotAccessMemory; 9005case Intrinsic::x86_mmx_punpckhwd: 9006 return DoesNotAccessMemory; 9007case Intrinsic::x86_mmx_punpcklbw: 9008 return DoesNotAccessMemory; 9009case Intrinsic::x86_mmx_punpckldq: 9010 return DoesNotAccessMemory; 9011case Intrinsic::x86_mmx_punpcklwd: 9012 return DoesNotAccessMemory; 9013case Intrinsic::x86_mmx_pxor: 9014 return DoesNotAccessMemory; 9015case Intrinsic::x86_mmx_vec_ext_d: 9016 return DoesNotAccessMemory; 9017case Intrinsic::x86_mmx_vec_init_b: 9018 return DoesNotAccessMemory; 9019case Intrinsic::x86_mmx_vec_init_d: 9020 return DoesNotAccessMemory; 9021case Intrinsic::x86_mmx_vec_init_w: 9022 return DoesNotAccessMemory; 9023case Intrinsic::x86_sse2_add_sd: 9024 return DoesNotAccessMemory; 9025case Intrinsic::x86_sse2_cmp_pd: 9026 return DoesNotAccessMemory; 9027case Intrinsic::x86_sse2_cmp_sd: 9028 return DoesNotAccessMemory; 9029case Intrinsic::x86_sse2_comieq_sd: 9030 return DoesNotAccessMemory; 9031case Intrinsic::x86_sse2_comige_sd: 9032 return DoesNotAccessMemory; 9033case Intrinsic::x86_sse2_comigt_sd: 9034 return DoesNotAccessMemory; 9035case Intrinsic::x86_sse2_comile_sd: 9036 return DoesNotAccessMemory; 9037case Intrinsic::x86_sse2_comilt_sd: 9038 return DoesNotAccessMemory; 9039case Intrinsic::x86_sse2_comineq_sd: 9040 return DoesNotAccessMemory; 9041case Intrinsic::x86_sse2_cvtdq2pd: 9042 return DoesNotAccessMemory; 9043case Intrinsic::x86_sse2_cvtdq2ps: 9044 return DoesNotAccessMemory; 9045case Intrinsic::x86_sse2_cvtpd2dq: 9046 return DoesNotAccessMemory; 9047case Intrinsic::x86_sse2_cvtpd2ps: 9048 return DoesNotAccessMemory; 9049case Intrinsic::x86_sse2_cvtps2dq: 9050 return DoesNotAccessMemory; 9051case Intrinsic::x86_sse2_cvtps2pd: 9052 return DoesNotAccessMemory; 9053case Intrinsic::x86_sse2_cvtsd2si: 9054 return DoesNotAccessMemory; 9055case Intrinsic::x86_sse2_cvtsd2si64: 9056 return DoesNotAccessMemory; 9057case Intrinsic::x86_sse2_cvtsd2ss: 9058 return DoesNotAccessMemory; 9059case Intrinsic::x86_sse2_cvtsi2sd: 9060 return DoesNotAccessMemory; 9061case Intrinsic::x86_sse2_cvtsi642sd: 9062 return DoesNotAccessMemory; 9063case Intrinsic::x86_sse2_cvtss2sd: 9064 return DoesNotAccessMemory; 9065case Intrinsic::x86_sse2_cvttpd2dq: 9066 return DoesNotAccessMemory; 9067case Intrinsic::x86_sse2_cvttps2dq: 9068 return DoesNotAccessMemory; 9069case Intrinsic::x86_sse2_cvttsd2si: 9070 return DoesNotAccessMemory; 9071case Intrinsic::x86_sse2_cvttsd2si64: 9072 return DoesNotAccessMemory; 9073case Intrinsic::x86_sse2_div_sd: 9074 return DoesNotAccessMemory; 9075case Intrinsic::x86_sse2_loadu_dq: 9076 return OnlyReadsMemory; 9077case Intrinsic::x86_sse2_loadu_pd: 9078 return OnlyReadsMemory; 9079case Intrinsic::x86_sse2_max_pd: 9080 return DoesNotAccessMemory; 9081case Intrinsic::x86_sse2_max_sd: 9082 return DoesNotAccessMemory; 9083case Intrinsic::x86_sse2_min_pd: 9084 return DoesNotAccessMemory; 9085case Intrinsic::x86_sse2_min_sd: 9086 return DoesNotAccessMemory; 9087case Intrinsic::x86_sse2_movmsk_pd: 9088 return DoesNotAccessMemory; 9089case Intrinsic::x86_sse2_mul_sd: 9090 return DoesNotAccessMemory; 9091case Intrinsic::x86_sse2_packssdw_128: 9092 return DoesNotAccessMemory; 9093case Intrinsic::x86_sse2_packsswb_128: 9094 return DoesNotAccessMemory; 9095case Intrinsic::x86_sse2_packuswb_128: 9096 return DoesNotAccessMemory; 9097case Intrinsic::x86_sse2_padds_b: 9098 return DoesNotAccessMemory; 9099case Intrinsic::x86_sse2_padds_w: 9100 return DoesNotAccessMemory; 9101case Intrinsic::x86_sse2_paddus_b: 9102 return DoesNotAccessMemory; 9103case Intrinsic::x86_sse2_paddus_w: 9104 return DoesNotAccessMemory; 9105case Intrinsic::x86_sse2_pavg_b: 9106 return DoesNotAccessMemory; 9107case Intrinsic::x86_sse2_pavg_w: 9108 return DoesNotAccessMemory; 9109case Intrinsic::x86_sse2_pcmpeq_b: 9110 return DoesNotAccessMemory; 9111case Intrinsic::x86_sse2_pcmpeq_d: 9112 return DoesNotAccessMemory; 9113case Intrinsic::x86_sse2_pcmpeq_w: 9114 return DoesNotAccessMemory; 9115case Intrinsic::x86_sse2_pcmpgt_b: 9116 return DoesNotAccessMemory; 9117case Intrinsic::x86_sse2_pcmpgt_d: 9118 return DoesNotAccessMemory; 9119case Intrinsic::x86_sse2_pcmpgt_w: 9120 return DoesNotAccessMemory; 9121case Intrinsic::x86_sse2_pmadd_wd: 9122 return DoesNotAccessMemory; 9123case Intrinsic::x86_sse2_pmaxs_w: 9124 return DoesNotAccessMemory; 9125case Intrinsic::x86_sse2_pmaxu_b: 9126 return DoesNotAccessMemory; 9127case Intrinsic::x86_sse2_pmins_w: 9128 return DoesNotAccessMemory; 9129case Intrinsic::x86_sse2_pminu_b: 9130 return DoesNotAccessMemory; 9131case Intrinsic::x86_sse2_pmovmskb_128: 9132 return DoesNotAccessMemory; 9133case Intrinsic::x86_sse2_pmulh_w: 9134 return DoesNotAccessMemory; 9135case Intrinsic::x86_sse2_pmulhu_w: 9136 return DoesNotAccessMemory; 9137case Intrinsic::x86_sse2_pmulu_dq: 9138 return DoesNotAccessMemory; 9139case Intrinsic::x86_sse2_psad_bw: 9140 return DoesNotAccessMemory; 9141case Intrinsic::x86_sse2_psll_d: 9142 return DoesNotAccessMemory; 9143case Intrinsic::x86_sse2_psll_dq: 9144 return DoesNotAccessMemory; 9145case Intrinsic::x86_sse2_psll_dq_bs: 9146 return DoesNotAccessMemory; 9147case Intrinsic::x86_sse2_psll_q: 9148 return DoesNotAccessMemory; 9149case Intrinsic::x86_sse2_psll_w: 9150 return DoesNotAccessMemory; 9151case Intrinsic::x86_sse2_pslli_d: 9152 return DoesNotAccessMemory; 9153case Intrinsic::x86_sse2_pslli_q: 9154 return DoesNotAccessMemory; 9155case Intrinsic::x86_sse2_pslli_w: 9156 return DoesNotAccessMemory; 9157case Intrinsic::x86_sse2_psra_d: 9158 return DoesNotAccessMemory; 9159case Intrinsic::x86_sse2_psra_w: 9160 return DoesNotAccessMemory; 9161case Intrinsic::x86_sse2_psrai_d: 9162 return DoesNotAccessMemory; 9163case Intrinsic::x86_sse2_psrai_w: 9164 return DoesNotAccessMemory; 9165case Intrinsic::x86_sse2_psrl_d: 9166 return DoesNotAccessMemory; 9167case Intrinsic::x86_sse2_psrl_dq: 9168 return DoesNotAccessMemory; 9169case Intrinsic::x86_sse2_psrl_dq_bs: 9170 return DoesNotAccessMemory; 9171case Intrinsic::x86_sse2_psrl_q: 9172 return DoesNotAccessMemory; 9173case Intrinsic::x86_sse2_psrl_w: 9174 return DoesNotAccessMemory; 9175case Intrinsic::x86_sse2_psrli_d: 9176 return DoesNotAccessMemory; 9177case Intrinsic::x86_sse2_psrli_q: 9178 return DoesNotAccessMemory; 9179case Intrinsic::x86_sse2_psrli_w: 9180 return DoesNotAccessMemory; 9181case Intrinsic::x86_sse2_psubs_b: 9182 return DoesNotAccessMemory; 9183case Intrinsic::x86_sse2_psubs_w: 9184 return DoesNotAccessMemory; 9185case Intrinsic::x86_sse2_psubus_b: 9186 return DoesNotAccessMemory; 9187case Intrinsic::x86_sse2_psubus_w: 9188 return DoesNotAccessMemory; 9189case Intrinsic::x86_sse2_sqrt_pd: 9190 return DoesNotAccessMemory; 9191case Intrinsic::x86_sse2_sqrt_sd: 9192 return DoesNotAccessMemory; 9193case Intrinsic::x86_sse2_sub_sd: 9194 return DoesNotAccessMemory; 9195case Intrinsic::x86_sse2_ucomieq_sd: 9196 return DoesNotAccessMemory; 9197case Intrinsic::x86_sse2_ucomige_sd: 9198 return DoesNotAccessMemory; 9199case Intrinsic::x86_sse2_ucomigt_sd: 9200 return DoesNotAccessMemory; 9201case Intrinsic::x86_sse2_ucomile_sd: 9202 return DoesNotAccessMemory; 9203case Intrinsic::x86_sse2_ucomilt_sd: 9204 return DoesNotAccessMemory; 9205case Intrinsic::x86_sse2_ucomineq_sd: 9206 return DoesNotAccessMemory; 9207case Intrinsic::x86_sse3_addsub_pd: 9208 return DoesNotAccessMemory; 9209case Intrinsic::x86_sse3_addsub_ps: 9210 return DoesNotAccessMemory; 9211case Intrinsic::x86_sse3_hadd_pd: 9212 return DoesNotAccessMemory; 9213case Intrinsic::x86_sse3_hadd_ps: 9214 return DoesNotAccessMemory; 9215case Intrinsic::x86_sse3_hsub_pd: 9216 return DoesNotAccessMemory; 9217case Intrinsic::x86_sse3_hsub_ps: 9218 return DoesNotAccessMemory; 9219case Intrinsic::x86_sse3_ldu_dq: 9220 return OnlyReadsMemory; 9221case Intrinsic::x86_sse41_blendpd: 9222 return DoesNotAccessMemory; 9223case Intrinsic::x86_sse41_blendps: 9224 return DoesNotAccessMemory; 9225case Intrinsic::x86_sse41_blendvpd: 9226 return DoesNotAccessMemory; 9227case Intrinsic::x86_sse41_blendvps: 9228 return DoesNotAccessMemory; 9229case Intrinsic::x86_sse41_dppd: 9230 return DoesNotAccessMemory; 9231case Intrinsic::x86_sse41_dpps: 9232 return DoesNotAccessMemory; 9233case Intrinsic::x86_sse41_extractps: 9234 return DoesNotAccessMemory; 9235case Intrinsic::x86_sse41_insertps: 9236 return DoesNotAccessMemory; 9237case Intrinsic::x86_sse41_movntdqa: 9238 return OnlyReadsMemory; 9239case Intrinsic::x86_sse41_mpsadbw: 9240 return DoesNotAccessMemory; 9241case Intrinsic::x86_sse41_packusdw: 9242 return DoesNotAccessMemory; 9243case Intrinsic::x86_sse41_pblendvb: 9244 return DoesNotAccessMemory; 9245case Intrinsic::x86_sse41_pblendw: 9246 return DoesNotAccessMemory; 9247case Intrinsic::x86_sse41_pcmpeqq: 9248 return DoesNotAccessMemory; 9249case Intrinsic::x86_sse41_pextrb: 9250 return DoesNotAccessMemory; 9251case Intrinsic::x86_sse41_pextrd: 9252 return DoesNotAccessMemory; 9253case Intrinsic::x86_sse41_pextrq: 9254 return DoesNotAccessMemory; 9255case Intrinsic::x86_sse41_phminposuw: 9256 return DoesNotAccessMemory; 9257case Intrinsic::x86_sse41_pmaxsb: 9258 return DoesNotAccessMemory; 9259case Intrinsic::x86_sse41_pmaxsd: 9260 return DoesNotAccessMemory; 9261case Intrinsic::x86_sse41_pmaxud: 9262 return DoesNotAccessMemory; 9263case Intrinsic::x86_sse41_pmaxuw: 9264 return DoesNotAccessMemory; 9265case Intrinsic::x86_sse41_pminsb: 9266 return DoesNotAccessMemory; 9267case Intrinsic::x86_sse41_pminsd: 9268 return DoesNotAccessMemory; 9269case Intrinsic::x86_sse41_pminud: 9270 return DoesNotAccessMemory; 9271case Intrinsic::x86_sse41_pminuw: 9272 return DoesNotAccessMemory; 9273case Intrinsic::x86_sse41_pmovsxbd: 9274 return DoesNotAccessMemory; 9275case Intrinsic::x86_sse41_pmovsxbq: 9276 return DoesNotAccessMemory; 9277case Intrinsic::x86_sse41_pmovsxbw: 9278 return DoesNotAccessMemory; 9279case Intrinsic::x86_sse41_pmovsxdq: 9280 return DoesNotAccessMemory; 9281case Intrinsic::x86_sse41_pmovsxwd: 9282 return DoesNotAccessMemory; 9283case Intrinsic::x86_sse41_pmovsxwq: 9284 return DoesNotAccessMemory; 9285case Intrinsic::x86_sse41_pmovzxbd: 9286 return DoesNotAccessMemory; 9287case Intrinsic::x86_sse41_pmovzxbq: 9288 return DoesNotAccessMemory; 9289case Intrinsic::x86_sse41_pmovzxbw: 9290 return DoesNotAccessMemory; 9291case Intrinsic::x86_sse41_pmovzxdq: 9292 return DoesNotAccessMemory; 9293case Intrinsic::x86_sse41_pmovzxwd: 9294 return DoesNotAccessMemory; 9295case Intrinsic::x86_sse41_pmovzxwq: 9296 return DoesNotAccessMemory; 9297case Intrinsic::x86_sse41_pmuldq: 9298 return DoesNotAccessMemory; 9299case Intrinsic::x86_sse41_ptestc: 9300 return DoesNotAccessMemory; 9301case Intrinsic::x86_sse41_ptestnzc: 9302 return DoesNotAccessMemory; 9303case Intrinsic::x86_sse41_ptestz: 9304 return DoesNotAccessMemory; 9305case Intrinsic::x86_sse41_round_pd: 9306 return DoesNotAccessMemory; 9307case Intrinsic::x86_sse41_round_ps: 9308 return DoesNotAccessMemory; 9309case Intrinsic::x86_sse41_round_sd: 9310 return DoesNotAccessMemory; 9311case Intrinsic::x86_sse41_round_ss: 9312 return DoesNotAccessMemory; 9313case Intrinsic::x86_sse42_crc32_16: 9314 return DoesNotAccessMemory; 9315case Intrinsic::x86_sse42_crc32_32: 9316 return DoesNotAccessMemory; 9317case Intrinsic::x86_sse42_crc32_8: 9318 return DoesNotAccessMemory; 9319case Intrinsic::x86_sse42_crc64_64: 9320 return DoesNotAccessMemory; 9321case Intrinsic::x86_sse42_crc64_8: 9322 return DoesNotAccessMemory; 9323case Intrinsic::x86_sse42_pcmpestri128: 9324 return DoesNotAccessMemory; 9325case Intrinsic::x86_sse42_pcmpestria128: 9326 return DoesNotAccessMemory; 9327case Intrinsic::x86_sse42_pcmpestric128: 9328 return DoesNotAccessMemory; 9329case Intrinsic::x86_sse42_pcmpestrio128: 9330 return DoesNotAccessMemory; 9331case Intrinsic::x86_sse42_pcmpestris128: 9332 return DoesNotAccessMemory; 9333case Intrinsic::x86_sse42_pcmpestriz128: 9334 return DoesNotAccessMemory; 9335case Intrinsic::x86_sse42_pcmpestrm128: 9336 return DoesNotAccessMemory; 9337case Intrinsic::x86_sse42_pcmpgtq: 9338 return DoesNotAccessMemory; 9339case Intrinsic::x86_sse42_pcmpistri128: 9340 return DoesNotAccessMemory; 9341case Intrinsic::x86_sse42_pcmpistria128: 9342 return DoesNotAccessMemory; 9343case Intrinsic::x86_sse42_pcmpistric128: 9344 return DoesNotAccessMemory; 9345case Intrinsic::x86_sse42_pcmpistrio128: 9346 return DoesNotAccessMemory; 9347case Intrinsic::x86_sse42_pcmpistris128: 9348 return DoesNotAccessMemory; 9349case Intrinsic::x86_sse42_pcmpistriz128: 9350 return DoesNotAccessMemory; 9351case Intrinsic::x86_sse42_pcmpistrm128: 9352 return DoesNotAccessMemory; 9353case Intrinsic::x86_sse_add_ss: 9354 return DoesNotAccessMemory; 9355case Intrinsic::x86_sse_cmp_ps: 9356 return DoesNotAccessMemory; 9357case Intrinsic::x86_sse_cmp_ss: 9358 return DoesNotAccessMemory; 9359case Intrinsic::x86_sse_comieq_ss: 9360 return DoesNotAccessMemory; 9361case Intrinsic::x86_sse_comige_ss: 9362 return DoesNotAccessMemory; 9363case Intrinsic::x86_sse_comigt_ss: 9364 return DoesNotAccessMemory; 9365case Intrinsic::x86_sse_comile_ss: 9366 return DoesNotAccessMemory; 9367case Intrinsic::x86_sse_comilt_ss: 9368 return DoesNotAccessMemory; 9369case Intrinsic::x86_sse_comineq_ss: 9370 return DoesNotAccessMemory; 9371case Intrinsic::x86_sse_cvtpd2pi: 9372 return DoesNotAccessMemory; 9373case Intrinsic::x86_sse_cvtpi2pd: 9374 return DoesNotAccessMemory; 9375case Intrinsic::x86_sse_cvtpi2ps: 9376 return DoesNotAccessMemory; 9377case Intrinsic::x86_sse_cvtps2pi: 9378 return DoesNotAccessMemory; 9379case Intrinsic::x86_sse_cvtsi2ss: 9380 return DoesNotAccessMemory; 9381case Intrinsic::x86_sse_cvtsi642ss: 9382 return DoesNotAccessMemory; 9383case Intrinsic::x86_sse_cvtss2si: 9384 return DoesNotAccessMemory; 9385case Intrinsic::x86_sse_cvtss2si64: 9386 return DoesNotAccessMemory; 9387case Intrinsic::x86_sse_cvttpd2pi: 9388 return DoesNotAccessMemory; 9389case Intrinsic::x86_sse_cvttps2pi: 9390 return DoesNotAccessMemory; 9391case Intrinsic::x86_sse_cvttss2si: 9392 return DoesNotAccessMemory; 9393case Intrinsic::x86_sse_cvttss2si64: 9394 return DoesNotAccessMemory; 9395case Intrinsic::x86_sse_div_ss: 9396 return DoesNotAccessMemory; 9397case Intrinsic::x86_sse_loadu_ps: 9398 return OnlyReadsMemory; 9399case Intrinsic::x86_sse_max_ps: 9400 return DoesNotAccessMemory; 9401case Intrinsic::x86_sse_max_ss: 9402 return DoesNotAccessMemory; 9403case Intrinsic::x86_sse_min_ps: 9404 return DoesNotAccessMemory; 9405case Intrinsic::x86_sse_min_ss: 9406 return DoesNotAccessMemory; 9407case Intrinsic::x86_sse_movmsk_ps: 9408 return DoesNotAccessMemory; 9409case Intrinsic::x86_sse_mul_ss: 9410 return DoesNotAccessMemory; 9411case Intrinsic::x86_sse_rcp_ps: 9412 return DoesNotAccessMemory; 9413case Intrinsic::x86_sse_rcp_ss: 9414 return DoesNotAccessMemory; 9415case Intrinsic::x86_sse_rsqrt_ps: 9416 return DoesNotAccessMemory; 9417case Intrinsic::x86_sse_rsqrt_ss: 9418 return DoesNotAccessMemory; 9419case Intrinsic::x86_sse_sqrt_ps: 9420 return DoesNotAccessMemory; 9421case Intrinsic::x86_sse_sqrt_ss: 9422 return DoesNotAccessMemory; 9423case Intrinsic::x86_sse_sub_ss: 9424 return DoesNotAccessMemory; 9425case Intrinsic::x86_sse_ucomieq_ss: 9426 return DoesNotAccessMemory; 9427case Intrinsic::x86_sse_ucomige_ss: 9428 return DoesNotAccessMemory; 9429case Intrinsic::x86_sse_ucomigt_ss: 9430 return DoesNotAccessMemory; 9431case Intrinsic::x86_sse_ucomile_ss: 9432 return DoesNotAccessMemory; 9433case Intrinsic::x86_sse_ucomilt_ss: 9434 return DoesNotAccessMemory; 9435case Intrinsic::x86_sse_ucomineq_ss: 9436 return DoesNotAccessMemory; 9437case Intrinsic::x86_ssse3_pabs_b: 9438 return DoesNotAccessMemory; 9439case Intrinsic::x86_ssse3_pabs_b_128: 9440 return DoesNotAccessMemory; 9441case Intrinsic::x86_ssse3_pabs_d: 9442 return DoesNotAccessMemory; 9443case Intrinsic::x86_ssse3_pabs_d_128: 9444 return DoesNotAccessMemory; 9445case Intrinsic::x86_ssse3_pabs_w: 9446 return DoesNotAccessMemory; 9447case Intrinsic::x86_ssse3_pabs_w_128: 9448 return DoesNotAccessMemory; 9449case Intrinsic::x86_ssse3_phadd_d: 9450 return DoesNotAccessMemory; 9451case Intrinsic::x86_ssse3_phadd_d_128: 9452 return DoesNotAccessMemory; 9453case Intrinsic::x86_ssse3_phadd_sw: 9454 return DoesNotAccessMemory; 9455case Intrinsic::x86_ssse3_phadd_sw_128: 9456 return DoesNotAccessMemory; 9457case Intrinsic::x86_ssse3_phadd_w: 9458 return DoesNotAccessMemory; 9459case Intrinsic::x86_ssse3_phadd_w_128: 9460 return DoesNotAccessMemory; 9461case Intrinsic::x86_ssse3_phsub_d: 9462 return DoesNotAccessMemory; 9463case Intrinsic::x86_ssse3_phsub_d_128: 9464 return DoesNotAccessMemory; 9465case Intrinsic::x86_ssse3_phsub_sw: 9466 return DoesNotAccessMemory; 9467case Intrinsic::x86_ssse3_phsub_sw_128: 9468 return DoesNotAccessMemory; 9469case Intrinsic::x86_ssse3_phsub_w: 9470 return DoesNotAccessMemory; 9471case Intrinsic::x86_ssse3_phsub_w_128: 9472 return DoesNotAccessMemory; 9473case Intrinsic::x86_ssse3_pmadd_ub_sw: 9474 return DoesNotAccessMemory; 9475case Intrinsic::x86_ssse3_pmadd_ub_sw_128: 9476 return DoesNotAccessMemory; 9477case Intrinsic::x86_ssse3_pmul_hr_sw: 9478 return DoesNotAccessMemory; 9479case Intrinsic::x86_ssse3_pmul_hr_sw_128: 9480 return DoesNotAccessMemory; 9481case Intrinsic::x86_ssse3_pshuf_b: 9482 return DoesNotAccessMemory; 9483case Intrinsic::x86_ssse3_pshuf_b_128: 9484 return DoesNotAccessMemory; 9485case Intrinsic::x86_ssse3_pshuf_w: 9486 return DoesNotAccessMemory; 9487case Intrinsic::x86_ssse3_psign_b: 9488 return DoesNotAccessMemory; 9489case Intrinsic::x86_ssse3_psign_b_128: 9490 return DoesNotAccessMemory; 9491case Intrinsic::x86_ssse3_psign_d: 9492 return DoesNotAccessMemory; 9493case Intrinsic::x86_ssse3_psign_d_128: 9494 return DoesNotAccessMemory; 9495case Intrinsic::x86_ssse3_psign_w: 9496 return DoesNotAccessMemory; 9497case Intrinsic::x86_ssse3_psign_w_128: 9498 return DoesNotAccessMemory; 9499case Intrinsic::xcore_bitrev: 9500 return DoesNotAccessMemory; 9501case Intrinsic::xcore_getid: 9502 return DoesNotAccessMemory; 9503} 9504#endif // GET_INTRINSIC_MODREF_BEHAVIOR 9505 9506// Get the GCC builtin that corresponds to an LLVM intrinsic. 9507#ifdef GET_GCC_BUILTIN_NAME 9508 switch (F->getIntrinsicID()) { 9509 default: BuiltinName = ""; break; 9510 case Intrinsic::alpha_umulh: BuiltinName = "__builtin_alpha_umulh"; break; 9511 case Intrinsic::arm_get_fpscr: BuiltinName = "__builtin_arm_get_fpscr"; break; 9512 case Intrinsic::arm_qadd: BuiltinName = "__builtin_arm_qadd"; break; 9513 case Intrinsic::arm_qsub: BuiltinName = "__builtin_arm_qsub"; break; 9514 case Intrinsic::arm_set_fpscr: BuiltinName = "__builtin_arm_set_fpscr"; break; 9515 case Intrinsic::arm_ssat: BuiltinName = "__builtin_arm_ssat"; break; 9516 case Intrinsic::arm_thread_pointer: BuiltinName = "__builtin_thread_pointer"; break; 9517 case Intrinsic::arm_usat: BuiltinName = "__builtin_arm_usat"; break; 9518 case Intrinsic::atomic_cmp_swap: BuiltinName = "__sync_val_compare_and_swap"; break; 9519 case Intrinsic::atomic_load_add: BuiltinName = "__sync_fetch_and_add"; break; 9520 case Intrinsic::atomic_load_and: BuiltinName = "__sync_fetch_and_and"; break; 9521 case Intrinsic::atomic_load_max: BuiltinName = "__sync_fetch_and_max"; break; 9522 case Intrinsic::atomic_load_min: BuiltinName = "__sync_fetch_and_min"; break; 9523 case Intrinsic::atomic_load_nand: BuiltinName = "__sync_fetch_and_nand"; break; 9524 case Intrinsic::atomic_load_or: BuiltinName = "__sync_fetch_and_or"; break; 9525 case Intrinsic::atomic_load_sub: BuiltinName = "__sync_fetch_and_sub"; break; 9526 case Intrinsic::atomic_load_umax: BuiltinName = "__sync_fetch_and_umax"; break; 9527 case Intrinsic::atomic_load_umin: BuiltinName = "__sync_fetch_and_umin"; break; 9528 case Intrinsic::atomic_load_xor: BuiltinName = "__sync_fetch_and_xor"; break; 9529 case Intrinsic::atomic_swap: BuiltinName = "__sync_lock_test_and_set"; break; 9530 case Intrinsic::convert_from_fp16: BuiltinName = "__gnu_h2f_ieee"; break; 9531 case Intrinsic::convert_to_fp16: BuiltinName = "__gnu_f2h_ieee"; break; 9532 case Intrinsic::eh_unwind_init: BuiltinName = "__builtin_unwind_init"; break; 9533 case Intrinsic::flt_rounds: BuiltinName = "__builtin_flt_rounds"; break; 9534 case Intrinsic::init_trampoline: BuiltinName = "__builtin_init_trampoline"; break; 9535 case Intrinsic::memory_barrier: BuiltinName = "__builtin_llvm_memory_barrier"; break; 9536 case Intrinsic::objectsize: BuiltinName = "__builtin_object_size"; break; 9537 case Intrinsic::ppc_altivec_dss: BuiltinName = "__builtin_altivec_dss"; break; 9538 case Intrinsic::ppc_altivec_dssall: BuiltinName = "__builtin_altivec_dssall"; break; 9539 case Intrinsic::ppc_altivec_dst: BuiltinName = "__builtin_altivec_dst"; break; 9540 case Intrinsic::ppc_altivec_dstst: BuiltinName = "__builtin_altivec_dstst"; break; 9541 case Intrinsic::ppc_altivec_dststt: BuiltinName = "__builtin_altivec_dststt"; break; 9542 case Intrinsic::ppc_altivec_dstt: BuiltinName = "__builtin_altivec_dstt"; break; 9543 case Intrinsic::ppc_altivec_mfvscr: BuiltinName = "__builtin_altivec_mfvscr"; break; 9544 case Intrinsic::ppc_altivec_mtvscr: BuiltinName = "__builtin_altivec_mtvscr"; break; 9545 case Intrinsic::ppc_altivec_vaddcuw: BuiltinName = "__builtin_altivec_vaddcuw"; break; 9546 case Intrinsic::ppc_altivec_vaddsbs: BuiltinName = "__builtin_altivec_vaddsbs"; break; 9547 case Intrinsic::ppc_altivec_vaddshs: BuiltinName = "__builtin_altivec_vaddshs"; break; 9548 case Intrinsic::ppc_altivec_vaddsws: BuiltinName = "__builtin_altivec_vaddsws"; break; 9549 case Intrinsic::ppc_altivec_vaddubs: BuiltinName = "__builtin_altivec_vaddubs"; break; 9550 case Intrinsic::ppc_altivec_vadduhs: BuiltinName = "__builtin_altivec_vadduhs"; break; 9551 case Intrinsic::ppc_altivec_vadduws: BuiltinName = "__builtin_altivec_vadduws"; break; 9552 case Intrinsic::ppc_altivec_vavgsb: BuiltinName = "__builtin_altivec_vavgsb"; break; 9553 case Intrinsic::ppc_altivec_vavgsh: BuiltinName = "__builtin_altivec_vavgsh"; break; 9554 case Intrinsic::ppc_altivec_vavgsw: BuiltinName = "__builtin_altivec_vavgsw"; break; 9555 case Intrinsic::ppc_altivec_vavgub: BuiltinName = "__builtin_altivec_vavgub"; break; 9556 case Intrinsic::ppc_altivec_vavguh: BuiltinName = "__builtin_altivec_vavguh"; break; 9557 case Intrinsic::ppc_altivec_vavguw: BuiltinName = "__builtin_altivec_vavguw"; break; 9558 case Intrinsic::ppc_altivec_vcfsx: BuiltinName = "__builtin_altivec_vcfsx"; break; 9559 case Intrinsic::ppc_altivec_vcfux: BuiltinName = "__builtin_altivec_vcfux"; break; 9560 case Intrinsic::ppc_altivec_vcmpbfp: BuiltinName = "__builtin_altivec_vcmpbfp"; break; 9561 case Intrinsic::ppc_altivec_vcmpbfp_p: BuiltinName = "__builtin_altivec_vcmpbfp_p"; break; 9562 case Intrinsic::ppc_altivec_vcmpeqfp: BuiltinName = "__builtin_altivec_vcmpeqfp"; break; 9563 case Intrinsic::ppc_altivec_vcmpeqfp_p: BuiltinName = "__builtin_altivec_vcmpeqfp_p"; break; 9564 case Intrinsic::ppc_altivec_vcmpequb: BuiltinName = "__builtin_altivec_vcmpequb"; break; 9565 case Intrinsic::ppc_altivec_vcmpequb_p: BuiltinName = "__builtin_altivec_vcmpequb_p"; break; 9566 case Intrinsic::ppc_altivec_vcmpequh: BuiltinName = "__builtin_altivec_vcmpequh"; break; 9567 case Intrinsic::ppc_altivec_vcmpequh_p: BuiltinName = "__builtin_altivec_vcmpequh_p"; break; 9568 case Intrinsic::ppc_altivec_vcmpequw: BuiltinName = "__builtin_altivec_vcmpequw"; break; 9569 case Intrinsic::ppc_altivec_vcmpequw_p: BuiltinName = "__builtin_altivec_vcmpequw_p"; break; 9570 case Intrinsic::ppc_altivec_vcmpgefp: BuiltinName = "__builtin_altivec_vcmpgefp"; break; 9571 case Intrinsic::ppc_altivec_vcmpgefp_p: BuiltinName = "__builtin_altivec_vcmpgefp_p"; break; 9572 case Intrinsic::ppc_altivec_vcmpgtfp: BuiltinName = "__builtin_altivec_vcmpgtfp"; break; 9573 case Intrinsic::ppc_altivec_vcmpgtfp_p: BuiltinName = "__builtin_altivec_vcmpgtfp_p"; break; 9574 case Intrinsic::ppc_altivec_vcmpgtsb: BuiltinName = "__builtin_altivec_vcmpgtsb"; break; 9575 case Intrinsic::ppc_altivec_vcmpgtsb_p: BuiltinName = "__builtin_altivec_vcmpgtsb_p"; break; 9576 case Intrinsic::ppc_altivec_vcmpgtsh: BuiltinName = "__builtin_altivec_vcmpgtsh"; break; 9577 case Intrinsic::ppc_altivec_vcmpgtsh_p: BuiltinName = "__builtin_altivec_vcmpgtsh_p"; break; 9578 case Intrinsic::ppc_altivec_vcmpgtsw: BuiltinName = "__builtin_altivec_vcmpgtsw"; break; 9579 case Intrinsic::ppc_altivec_vcmpgtsw_p: BuiltinName = "__builtin_altivec_vcmpgtsw_p"; break; 9580 case Intrinsic::ppc_altivec_vcmpgtub: BuiltinName = "__builtin_altivec_vcmpgtub"; break; 9581 case Intrinsic::ppc_altivec_vcmpgtub_p: BuiltinName = "__builtin_altivec_vcmpgtub_p"; break; 9582 case Intrinsic::ppc_altivec_vcmpgtuh: BuiltinName = "__builtin_altivec_vcmpgtuh"; break; 9583 case Intrinsic::ppc_altivec_vcmpgtuh_p: BuiltinName = "__builtin_altivec_vcmpgtuh_p"; break; 9584 case Intrinsic::ppc_altivec_vcmpgtuw: BuiltinName = "__builtin_altivec_vcmpgtuw"; break; 9585 case Intrinsic::ppc_altivec_vcmpgtuw_p: BuiltinName = "__builtin_altivec_vcmpgtuw_p"; break; 9586 case Intrinsic::ppc_altivec_vctsxs: BuiltinName = "__builtin_altivec_vctsxs"; break; 9587 case Intrinsic::ppc_altivec_vctuxs: BuiltinName = "__builtin_altivec_vctuxs"; break; 9588 case Intrinsic::ppc_altivec_vexptefp: BuiltinName = "__builtin_altivec_vexptefp"; break; 9589 case Intrinsic::ppc_altivec_vlogefp: BuiltinName = "__builtin_altivec_vlogefp"; break; 9590 case Intrinsic::ppc_altivec_vmaddfp: BuiltinName = "__builtin_altivec_vmaddfp"; break; 9591 case Intrinsic::ppc_altivec_vmaxfp: BuiltinName = "__builtin_altivec_vmaxfp"; break; 9592 case Intrinsic::ppc_altivec_vmaxsb: BuiltinName = "__builtin_altivec_vmaxsb"; break; 9593 case Intrinsic::ppc_altivec_vmaxsh: BuiltinName = "__builtin_altivec_vmaxsh"; break; 9594 case Intrinsic::ppc_altivec_vmaxsw: BuiltinName = "__builtin_altivec_vmaxsw"; break; 9595 case Intrinsic::ppc_altivec_vmaxub: BuiltinName = "__builtin_altivec_vmaxub"; break; 9596 case Intrinsic::ppc_altivec_vmaxuh: BuiltinName = "__builtin_altivec_vmaxuh"; break; 9597 case Intrinsic::ppc_altivec_vmaxuw: BuiltinName = "__builtin_altivec_vmaxuw"; break; 9598 case Intrinsic::ppc_altivec_vmhaddshs: BuiltinName = "__builtin_altivec_vmhaddshs"; break; 9599 case Intrinsic::ppc_altivec_vmhraddshs: BuiltinName = "__builtin_altivec_vmhraddshs"; break; 9600 case Intrinsic::ppc_altivec_vminfp: BuiltinName = "__builtin_altivec_vminfp"; break; 9601 case Intrinsic::ppc_altivec_vminsb: BuiltinName = "__builtin_altivec_vminsb"; break; 9602 case Intrinsic::ppc_altivec_vminsh: BuiltinName = "__builtin_altivec_vminsh"; break; 9603 case Intrinsic::ppc_altivec_vminsw: BuiltinName = "__builtin_altivec_vminsw"; break; 9604 case Intrinsic::ppc_altivec_vminub: BuiltinName = "__builtin_altivec_vminub"; break; 9605 case Intrinsic::ppc_altivec_vminuh: BuiltinName = "__builtin_altivec_vminuh"; break; 9606 case Intrinsic::ppc_altivec_vminuw: BuiltinName = "__builtin_altivec_vminuw"; break; 9607 case Intrinsic::ppc_altivec_vmladduhm: BuiltinName = "__builtin_altivec_vmladduhm"; break; 9608 case Intrinsic::ppc_altivec_vmsummbm: BuiltinName = "__builtin_altivec_vmsummbm"; break; 9609 case Intrinsic::ppc_altivec_vmsumshm: BuiltinName = "__builtin_altivec_vmsumshm"; break; 9610 case Intrinsic::ppc_altivec_vmsumshs: BuiltinName = "__builtin_altivec_vmsumshs"; break; 9611 case Intrinsic::ppc_altivec_vmsumubm: BuiltinName = "__builtin_altivec_vmsumubm"; break; 9612 case Intrinsic::ppc_altivec_vmsumuhm: BuiltinName = "__builtin_altivec_vmsumuhm"; break; 9613 case Intrinsic::ppc_altivec_vmsumuhs: BuiltinName = "__builtin_altivec_vmsumuhs"; break; 9614 case Intrinsic::ppc_altivec_vmulesb: BuiltinName = "__builtin_altivec_vmulesb"; break; 9615 case Intrinsic::ppc_altivec_vmulesh: BuiltinName = "__builtin_altivec_vmulesh"; break; 9616 case Intrinsic::ppc_altivec_vmuleub: BuiltinName = "__builtin_altivec_vmuleub"; break; 9617 case Intrinsic::ppc_altivec_vmuleuh: BuiltinName = "__builtin_altivec_vmuleuh"; break; 9618 case Intrinsic::ppc_altivec_vmulosb: BuiltinName = "__builtin_altivec_vmulosb"; break; 9619 case Intrinsic::ppc_altivec_vmulosh: BuiltinName = "__builtin_altivec_vmulosh"; break; 9620 case Intrinsic::ppc_altivec_vmuloub: BuiltinName = "__builtin_altivec_vmuloub"; break; 9621 case Intrinsic::ppc_altivec_vmulouh: BuiltinName = "__builtin_altivec_vmulouh"; break; 9622 case Intrinsic::ppc_altivec_vnmsubfp: BuiltinName = "__builtin_altivec_vnmsubfp"; break; 9623 case Intrinsic::ppc_altivec_vperm: BuiltinName = "__builtin_altivec_vperm_4si"; break; 9624 case Intrinsic::ppc_altivec_vpkpx: BuiltinName = "__builtin_altivec_vpkpx"; break; 9625 case Intrinsic::ppc_altivec_vpkshss: BuiltinName = "__builtin_altivec_vpkshss"; break; 9626 case Intrinsic::ppc_altivec_vpkshus: BuiltinName = "__builtin_altivec_vpkshus"; break; 9627 case Intrinsic::ppc_altivec_vpkswss: BuiltinName = "__builtin_altivec_vpkswss"; break; 9628 case Intrinsic::ppc_altivec_vpkswus: BuiltinName = "__builtin_altivec_vpkswus"; break; 9629 case Intrinsic::ppc_altivec_vpkuhus: BuiltinName = "__builtin_altivec_vpkuhus"; break; 9630 case Intrinsic::ppc_altivec_vpkuwus: BuiltinName = "__builtin_altivec_vpkuwus"; break; 9631 case Intrinsic::ppc_altivec_vrefp: BuiltinName = "__builtin_altivec_vrefp"; break; 9632 case Intrinsic::ppc_altivec_vrfim: BuiltinName = "__builtin_altivec_vrfim"; break; 9633 case Intrinsic::ppc_altivec_vrfin: BuiltinName = "__builtin_altivec_vrfin"; break; 9634 case Intrinsic::ppc_altivec_vrfip: BuiltinName = "__builtin_altivec_vrfip"; break; 9635 case Intrinsic::ppc_altivec_vrfiz: BuiltinName = "__builtin_altivec_vrfiz"; break; 9636 case Intrinsic::ppc_altivec_vrlb: BuiltinName = "__builtin_altivec_vrlb"; break; 9637 case Intrinsic::ppc_altivec_vrlh: BuiltinName = "__builtin_altivec_vrlh"; break; 9638 case Intrinsic::ppc_altivec_vrlw: BuiltinName = "__builtin_altivec_vrlw"; break; 9639 case Intrinsic::ppc_altivec_vrsqrtefp: BuiltinName = "__builtin_altivec_vrsqrtefp"; break; 9640 case Intrinsic::ppc_altivec_vsel: BuiltinName = "__builtin_altivec_vsel_4si"; break; 9641 case Intrinsic::ppc_altivec_vsl: BuiltinName = "__builtin_altivec_vsl"; break; 9642 case Intrinsic::ppc_altivec_vslb: BuiltinName = "__builtin_altivec_vslb"; break; 9643 case Intrinsic::ppc_altivec_vslh: BuiltinName = "__builtin_altivec_vslh"; break; 9644 case Intrinsic::ppc_altivec_vslo: BuiltinName = "__builtin_altivec_vslo"; break; 9645 case Intrinsic::ppc_altivec_vslw: BuiltinName = "__builtin_altivec_vslw"; break; 9646 case Intrinsic::ppc_altivec_vsr: BuiltinName = "__builtin_altivec_vsr"; break; 9647 case Intrinsic::ppc_altivec_vsrab: BuiltinName = "__builtin_altivec_vsrab"; break; 9648 case Intrinsic::ppc_altivec_vsrah: BuiltinName = "__builtin_altivec_vsrah"; break; 9649 case Intrinsic::ppc_altivec_vsraw: BuiltinName = "__builtin_altivec_vsraw"; break; 9650 case Intrinsic::ppc_altivec_vsrb: BuiltinName = "__builtin_altivec_vsrb"; break; 9651 case Intrinsic::ppc_altivec_vsrh: BuiltinName = "__builtin_altivec_vsrh"; break; 9652 case Intrinsic::ppc_altivec_vsro: BuiltinName = "__builtin_altivec_vsro"; break; 9653 case Intrinsic::ppc_altivec_vsrw: BuiltinName = "__builtin_altivec_vsrw"; break; 9654 case Intrinsic::ppc_altivec_vsubcuw: BuiltinName = "__builtin_altivec_vsubcuw"; break; 9655 case Intrinsic::ppc_altivec_vsubsbs: BuiltinName = "__builtin_altivec_vsubsbs"; break; 9656 case Intrinsic::ppc_altivec_vsubshs: BuiltinName = "__builtin_altivec_vsubshs"; break; 9657 case Intrinsic::ppc_altivec_vsubsws: BuiltinName = "__builtin_altivec_vsubsws"; break; 9658 case Intrinsic::ppc_altivec_vsububs: BuiltinName = "__builtin_altivec_vsububs"; break; 9659 case Intrinsic::ppc_altivec_vsubuhs: BuiltinName = "__builtin_altivec_vsubuhs"; break; 9660 case Intrinsic::ppc_altivec_vsubuws: BuiltinName = "__builtin_altivec_vsubuws"; break; 9661 case Intrinsic::ppc_altivec_vsum2sws: BuiltinName = "__builtin_altivec_vsum2sws"; break; 9662 case Intrinsic::ppc_altivec_vsum4sbs: BuiltinName = "__builtin_altivec_vsum4sbs"; break; 9663 case Intrinsic::ppc_altivec_vsum4shs: BuiltinName = "__builtin_altivec_vsum4shs"; break; 9664 case Intrinsic::ppc_altivec_vsum4ubs: BuiltinName = "__builtin_altivec_vsum4ubs"; break; 9665 case Intrinsic::ppc_altivec_vsumsws: BuiltinName = "__builtin_altivec_vsumsws"; break; 9666 case Intrinsic::ppc_altivec_vupkhpx: BuiltinName = "__builtin_altivec_vupkhpx"; break; 9667 case Intrinsic::ppc_altivec_vupkhsb: BuiltinName = "__builtin_altivec_vupkhsb"; break; 9668 case Intrinsic::ppc_altivec_vupkhsh: BuiltinName = "__builtin_altivec_vupkhsh"; break; 9669 case Intrinsic::ppc_altivec_vupklpx: BuiltinName = "__builtin_altivec_vupklpx"; break; 9670 case Intrinsic::ppc_altivec_vupklsb: BuiltinName = "__builtin_altivec_vupklsb"; break; 9671 case Intrinsic::ppc_altivec_vupklsh: BuiltinName = "__builtin_altivec_vupklsh"; break; 9672 case Intrinsic::spu_si_a: BuiltinName = "__builtin_si_a"; break; 9673 case Intrinsic::spu_si_addx: BuiltinName = "__builtin_si_addx"; break; 9674 case Intrinsic::spu_si_ah: BuiltinName = "__builtin_si_ah"; break; 9675 case Intrinsic::spu_si_ahi: BuiltinName = "__builtin_si_ahi"; break; 9676 case Intrinsic::spu_si_ai: BuiltinName = "__builtin_si_ai"; break; 9677 case Intrinsic::spu_si_and: BuiltinName = "__builtin_si_and"; break; 9678 case Intrinsic::spu_si_andbi: BuiltinName = "__builtin_si_andbi"; break; 9679 case Intrinsic::spu_si_andc: BuiltinName = "__builtin_si_andc"; break; 9680 case Intrinsic::spu_si_andhi: BuiltinName = "__builtin_si_andhi"; break; 9681 case Intrinsic::spu_si_andi: BuiltinName = "__builtin_si_andi"; break; 9682 case Intrinsic::spu_si_bg: BuiltinName = "__builtin_si_bg"; break; 9683 case Intrinsic::spu_si_bgx: BuiltinName = "__builtin_si_bgx"; break; 9684 case Intrinsic::spu_si_ceq: BuiltinName = "__builtin_si_ceq"; break; 9685 case Intrinsic::spu_si_ceqb: BuiltinName = "__builtin_si_ceqb"; break; 9686 case Intrinsic::spu_si_ceqbi: BuiltinName = "__builtin_si_ceqbi"; break; 9687 case Intrinsic::spu_si_ceqh: BuiltinName = "__builtin_si_ceqh"; break; 9688 case Intrinsic::spu_si_ceqhi: BuiltinName = "__builtin_si_ceqhi"; break; 9689 case Intrinsic::spu_si_ceqi: BuiltinName = "__builtin_si_ceqi"; break; 9690 case Intrinsic::spu_si_cg: BuiltinName = "__builtin_si_cg"; break; 9691 case Intrinsic::spu_si_cgt: BuiltinName = "__builtin_si_cgt"; break; 9692 case Intrinsic::spu_si_cgtb: BuiltinName = "__builtin_si_cgtb"; break; 9693 case Intrinsic::spu_si_cgtbi: BuiltinName = "__builtin_si_cgtbi"; break; 9694 case Intrinsic::spu_si_cgth: BuiltinName = "__builtin_si_cgth"; break; 9695 case Intrinsic::spu_si_cgthi: BuiltinName = "__builtin_si_cgthi"; break; 9696 case Intrinsic::spu_si_cgti: BuiltinName = "__builtin_si_cgti"; break; 9697 case Intrinsic::spu_si_cgx: BuiltinName = "__builtin_si_cgx"; break; 9698 case Intrinsic::spu_si_clgt: BuiltinName = "__builtin_si_clgt"; break; 9699 case Intrinsic::spu_si_clgtb: BuiltinName = "__builtin_si_clgtb"; break; 9700 case Intrinsic::spu_si_clgtbi: BuiltinName = "__builtin_si_clgtbi"; break; 9701 case Intrinsic::spu_si_clgth: BuiltinName = "__builtin_si_clgth"; break; 9702 case Intrinsic::spu_si_clgthi: BuiltinName = "__builtin_si_clgthi"; break; 9703 case Intrinsic::spu_si_clgti: BuiltinName = "__builtin_si_clgti"; break; 9704 case Intrinsic::spu_si_dfa: BuiltinName = "__builtin_si_dfa"; break; 9705 case Intrinsic::spu_si_dfm: BuiltinName = "__builtin_si_dfm"; break; 9706 case Intrinsic::spu_si_dfma: BuiltinName = "__builtin_si_dfma"; break; 9707 case Intrinsic::spu_si_dfms: BuiltinName = "__builtin_si_dfms"; break; 9708 case Intrinsic::spu_si_dfnma: BuiltinName = "__builtin_si_dfnma"; break; 9709 case Intrinsic::spu_si_dfnms: BuiltinName = "__builtin_si_dfnms"; break; 9710 case Intrinsic::spu_si_dfs: BuiltinName = "__builtin_si_dfs"; break; 9711 case Intrinsic::spu_si_fa: BuiltinName = "__builtin_si_fa"; break; 9712 case Intrinsic::spu_si_fceq: BuiltinName = "__builtin_si_fceq"; break; 9713 case Intrinsic::spu_si_fcgt: BuiltinName = "__builtin_si_fcgt"; break; 9714 case Intrinsic::spu_si_fcmeq: BuiltinName = "__builtin_si_fcmeq"; break; 9715 case Intrinsic::spu_si_fcmgt: BuiltinName = "__builtin_si_fcmgt"; break; 9716 case Intrinsic::spu_si_fm: BuiltinName = "__builtin_si_fm"; break; 9717 case Intrinsic::spu_si_fma: BuiltinName = "__builtin_si_fma"; break; 9718 case Intrinsic::spu_si_fms: BuiltinName = "__builtin_si_fms"; break; 9719 case Intrinsic::spu_si_fnms: BuiltinName = "__builtin_si_fnms"; break; 9720 case Intrinsic::spu_si_fs: BuiltinName = "__builtin_si_fs"; break; 9721 case Intrinsic::spu_si_fsmbi: BuiltinName = "__builtin_si_fsmbi"; break; 9722 case Intrinsic::spu_si_mpy: BuiltinName = "__builtin_si_mpy"; break; 9723 case Intrinsic::spu_si_mpya: BuiltinName = "__builtin_si_mpya"; break; 9724 case Intrinsic::spu_si_mpyh: BuiltinName = "__builtin_si_mpyh"; break; 9725 case Intrinsic::spu_si_mpyhh: BuiltinName = "__builtin_si_mpyhh"; break; 9726 case Intrinsic::spu_si_mpyhha: BuiltinName = "__builtin_si_mpyhha"; break; 9727 case Intrinsic::spu_si_mpyhhau: BuiltinName = "__builtin_si_mpyhhau"; break; 9728 case Intrinsic::spu_si_mpyhhu: BuiltinName = "__builtin_si_mpyhhu"; break; 9729 case Intrinsic::spu_si_mpyi: BuiltinName = "__builtin_si_mpyi"; break; 9730 case Intrinsic::spu_si_mpys: BuiltinName = "__builtin_si_mpys"; break; 9731 case Intrinsic::spu_si_mpyu: BuiltinName = "__builtin_si_mpyu"; break; 9732 case Intrinsic::spu_si_mpyui: BuiltinName = "__builtin_si_mpyui"; break; 9733 case Intrinsic::spu_si_nand: BuiltinName = "__builtin_si_nand"; break; 9734 case Intrinsic::spu_si_nor: BuiltinName = "__builtin_si_nor"; break; 9735 case Intrinsic::spu_si_or: BuiltinName = "__builtin_si_or"; break; 9736 case Intrinsic::spu_si_orbi: BuiltinName = "__builtin_si_orbi"; break; 9737 case Intrinsic::spu_si_orc: BuiltinName = "__builtin_si_orc"; break; 9738 case Intrinsic::spu_si_orhi: BuiltinName = "__builtin_si_orhi"; break; 9739 case Intrinsic::spu_si_ori: BuiltinName = "__builtin_si_ori"; break; 9740 case Intrinsic::spu_si_sf: BuiltinName = "__builtin_si_sf"; break; 9741 case Intrinsic::spu_si_sfh: BuiltinName = "__builtin_si_sfh"; break; 9742 case Intrinsic::spu_si_sfhi: BuiltinName = "__builtin_si_sfhi"; break; 9743 case Intrinsic::spu_si_sfi: BuiltinName = "__builtin_si_sfi"; break; 9744 case Intrinsic::spu_si_sfx: BuiltinName = "__builtin_si_sfx"; break; 9745 case Intrinsic::spu_si_shli: BuiltinName = "__builtin_si_shli"; break; 9746 case Intrinsic::spu_si_shlqbi: BuiltinName = "__builtin_si_shlqbi"; break; 9747 case Intrinsic::spu_si_shlqbii: BuiltinName = "__builtin_si_shlqbii"; break; 9748 case Intrinsic::spu_si_shlqby: BuiltinName = "__builtin_si_shlqby"; break; 9749 case Intrinsic::spu_si_shlqbyi: BuiltinName = "__builtin_si_shlqbyi"; break; 9750 case Intrinsic::spu_si_xor: BuiltinName = "__builtin_si_xor"; break; 9751 case Intrinsic::spu_si_xorbi: BuiltinName = "__builtin_si_xorbi"; break; 9752 case Intrinsic::spu_si_xorhi: BuiltinName = "__builtin_si_xorhi"; break; 9753 case Intrinsic::spu_si_xori: BuiltinName = "__builtin_si_xori"; break; 9754 case Intrinsic::stackrestore: BuiltinName = "__builtin_stack_restore"; break; 9755 case Intrinsic::stacksave: BuiltinName = "__builtin_stack_save"; break; 9756 case Intrinsic::trap: BuiltinName = "__builtin_trap"; break; 9757 case Intrinsic::x86_aesni_aesdec: BuiltinName = "__builtin_ia32_aesdec128"; break; 9758 case Intrinsic::x86_aesni_aesdeclast: BuiltinName = "__builtin_ia32_aesdeclast128"; break; 9759 case Intrinsic::x86_aesni_aesenc: BuiltinName = "__builtin_ia32_aesenc128"; break; 9760 case Intrinsic::x86_aesni_aesenclast: BuiltinName = "__builtin_ia32_aesenclast128"; break; 9761 case Intrinsic::x86_aesni_aesimc: BuiltinName = "__builtin_ia32_aesimc128"; break; 9762 case Intrinsic::x86_aesni_aeskeygenassist: BuiltinName = "__builtin_ia32_aeskeygenassist128"; break; 9763 case Intrinsic::x86_avx_addsub_pd_256: BuiltinName = "__builtin_ia32_addsubpd256"; break; 9764 case Intrinsic::x86_avx_addsub_ps_256: BuiltinName = "__builtin_ia32_addsubps256"; break; 9765 case Intrinsic::x86_avx_blend_pd_256: BuiltinName = "__builtin_ia32_blendpd256"; break; 9766 case Intrinsic::x86_avx_blend_ps_256: BuiltinName = "__builtin_ia32_blendps256"; break; 9767 case Intrinsic::x86_avx_blendv_pd_256: BuiltinName = "__builtin_ia32_blendvpd256"; break; 9768 case Intrinsic::x86_avx_blendv_ps_256: BuiltinName = "__builtin_ia32_blendvps256"; break; 9769 case Intrinsic::x86_avx_cmp_pd_256: BuiltinName = "__builtin_ia32_cmppd256"; break; 9770 case Intrinsic::x86_avx_cmp_ps_256: BuiltinName = "__builtin_ia32_cmpps256"; break; 9771 case Intrinsic::x86_avx_cvt_pd2_ps_256: BuiltinName = "__builtin_ia32_cvtpd2ps256"; break; 9772 case Intrinsic::x86_avx_cvt_pd2dq_256: BuiltinName = "__builtin_ia32_cvtpd2dq256"; break; 9773 case Intrinsic::x86_avx_cvt_ps2_pd_256: BuiltinName = "__builtin_ia32_cvtps2pd256"; break; 9774 case Intrinsic::x86_avx_cvt_ps2dq_256: BuiltinName = "__builtin_ia32_cvtps2dq256"; break; 9775 case Intrinsic::x86_avx_cvtdq2_pd_256: BuiltinName = "__builtin_ia32_cvtdq2pd256"; break; 9776 case Intrinsic::x86_avx_cvtdq2_ps_256: BuiltinName = "__builtin_ia32_cvtdq2ps256"; break; 9777 case Intrinsic::x86_avx_cvtt_pd2dq_256: BuiltinName = "__builtin_ia32_cvttpd2dq256"; break; 9778 case Intrinsic::x86_avx_cvtt_ps2dq_256: BuiltinName = "__builtin_ia32_cvttps2dq256"; break; 9779 case Intrinsic::x86_avx_dp_ps_256: BuiltinName = "__builtin_ia32_dpps256"; break; 9780 case Intrinsic::x86_avx_hadd_pd_256: BuiltinName = "__builtin_ia32_haddpd256"; break; 9781 case Intrinsic::x86_avx_hadd_ps_256: BuiltinName = "__builtin_ia32_haddps256"; break; 9782 case Intrinsic::x86_avx_hsub_pd_256: BuiltinName = "__builtin_ia32_hsubpd256"; break; 9783 case Intrinsic::x86_avx_hsub_ps_256: BuiltinName = "__builtin_ia32_hsubps256"; break; 9784 case Intrinsic::x86_avx_ldu_dq_256: BuiltinName = "__builtin_ia32_lddqu256"; break; 9785 case Intrinsic::x86_avx_loadu_dq_256: BuiltinName = "__builtin_ia32_loaddqu256"; break; 9786 case Intrinsic::x86_avx_loadu_pd_256: BuiltinName = "__builtin_ia32_loadupd256"; break; 9787 case Intrinsic::x86_avx_loadu_ps_256: BuiltinName = "__builtin_ia32_loadups256"; break; 9788 case Intrinsic::x86_avx_maskload_pd: BuiltinName = "__builtin_ia32_maskloadpd"; break; 9789 case Intrinsic::x86_avx_maskload_pd_256: BuiltinName = "__builtin_ia32_maskloadpd256"; break; 9790 case Intrinsic::x86_avx_maskload_ps: BuiltinName = "__builtin_ia32_maskloadps"; break; 9791 case Intrinsic::x86_avx_maskload_ps_256: BuiltinName = "__builtin_ia32_maskloadps256"; break; 9792 case Intrinsic::x86_avx_maskstore_pd: BuiltinName = "__builtin_ia32_maskstorepd"; break; 9793 case Intrinsic::x86_avx_maskstore_pd_256: BuiltinName = "__builtin_ia32_maskstorepd256"; break; 9794 case Intrinsic::x86_avx_maskstore_ps: BuiltinName = "__builtin_ia32_maskstoreps"; break; 9795 case Intrinsic::x86_avx_maskstore_ps_256: BuiltinName = "__builtin_ia32_maskstoreps256"; break; 9796 case Intrinsic::x86_avx_max_pd_256: BuiltinName = "__builtin_ia32_maxpd256"; break; 9797 case Intrinsic::x86_avx_max_ps_256: BuiltinName = "__builtin_ia32_maxps256"; break; 9798 case Intrinsic::x86_avx_min_pd_256: BuiltinName = "__builtin_ia32_minpd256"; break; 9799 case Intrinsic::x86_avx_min_ps_256: BuiltinName = "__builtin_ia32_minps256"; break; 9800 case Intrinsic::x86_avx_movmsk_pd_256: BuiltinName = "__builtin_ia32_movmskpd256"; break; 9801 case Intrinsic::x86_avx_movmsk_ps_256: BuiltinName = "__builtin_ia32_movmskps256"; break; 9802 case Intrinsic::x86_avx_movnt_dq_256: BuiltinName = "__builtin_ia32_movntdq256"; break; 9803 case Intrinsic::x86_avx_movnt_pd_256: BuiltinName = "__builtin_ia32_movntpd256"; break; 9804 case Intrinsic::x86_avx_movnt_ps_256: BuiltinName = "__builtin_ia32_movntps256"; break; 9805 case Intrinsic::x86_avx_ptestc_256: BuiltinName = "__builtin_ia32_ptestc256"; break; 9806 case Intrinsic::x86_avx_ptestnzc_256: BuiltinName = "__builtin_ia32_ptestnzc256"; break; 9807 case Intrinsic::x86_avx_ptestz_256: BuiltinName = "__builtin_ia32_ptestz256"; break; 9808 case Intrinsic::x86_avx_rcp_ps_256: BuiltinName = "__builtin_ia32_rcpps256"; break; 9809 case Intrinsic::x86_avx_round_pd_256: BuiltinName = "__builtin_ia32_roundpd256"; break; 9810 case Intrinsic::x86_avx_round_ps_256: BuiltinName = "__builtin_ia32_roundps256"; break; 9811 case Intrinsic::x86_avx_rsqrt_ps_256: BuiltinName = "__builtin_ia32_rsqrtps256"; break; 9812 case Intrinsic::x86_avx_sqrt_pd_256: BuiltinName = "__builtin_ia32_sqrtpd256"; break; 9813 case Intrinsic::x86_avx_sqrt_ps_256: BuiltinName = "__builtin_ia32_sqrtps256"; break; 9814 case Intrinsic::x86_avx_storeu_dq_256: BuiltinName = "__builtin_ia32_storedqu256"; break; 9815 case Intrinsic::x86_avx_storeu_pd_256: BuiltinName = "__builtin_ia32_storeupd256"; break; 9816 case Intrinsic::x86_avx_storeu_ps_256: BuiltinName = "__builtin_ia32_storeups256"; break; 9817 case Intrinsic::x86_avx_vbroadcast_sd_256: BuiltinName = "__builtin_ia32_vbroadcastsd256"; break; 9818 case Intrinsic::x86_avx_vbroadcastf128_pd_256: BuiltinName = "__builtin_ia32_vbroadcastf128_pd256"; break; 9819 case Intrinsic::x86_avx_vbroadcastf128_ps_256: BuiltinName = "__builtin_ia32_vbroadcastf128_ps256"; break; 9820 case Intrinsic::x86_avx_vbroadcastss: BuiltinName = "__builtin_ia32_vbroadcastss"; break; 9821 case Intrinsic::x86_avx_vbroadcastss_256: BuiltinName = "__builtin_ia32_vbroadcastss256"; break; 9822 case Intrinsic::x86_avx_vextractf128_pd_256: BuiltinName = "__builtin_ia32_vextractf128_pd256"; break; 9823 case Intrinsic::x86_avx_vextractf128_ps_256: BuiltinName = "__builtin_ia32_vextractf128_ps256"; break; 9824 case Intrinsic::x86_avx_vextractf128_si_256: BuiltinName = "__builtin_ia32_vextractf128_si256"; break; 9825 case Intrinsic::x86_avx_vinsertf128_pd_256: BuiltinName = "__builtin_ia32_vinsertf128_pd256"; break; 9826 case Intrinsic::x86_avx_vinsertf128_ps_256: BuiltinName = "__builtin_ia32_vinsertf128_ps256"; break; 9827 case Intrinsic::x86_avx_vinsertf128_si_256: BuiltinName = "__builtin_ia32_vinsertf128_si256"; break; 9828 case Intrinsic::x86_avx_vperm2f128_pd_256: BuiltinName = "__builtin_ia32_vperm2f128_pd256"; break; 9829 case Intrinsic::x86_avx_vperm2f128_ps_256: BuiltinName = "__builtin_ia32_vperm2f128_ps256"; break; 9830 case Intrinsic::x86_avx_vperm2f128_si_256: BuiltinName = "__builtin_ia32_vperm2f128_si256"; break; 9831 case Intrinsic::x86_avx_vpermil_pd: BuiltinName = "__builtin_ia32_vpermilpd"; break; 9832 case Intrinsic::x86_avx_vpermil_pd_256: BuiltinName = "__builtin_ia32_vpermilpd256"; break; 9833 case Intrinsic::x86_avx_vpermil_ps: BuiltinName = "__builtin_ia32_vpermilps"; break; 9834 case Intrinsic::x86_avx_vpermil_ps_256: BuiltinName = "__builtin_ia32_vpermilps256"; break; 9835 case Intrinsic::x86_avx_vpermilvar_pd: BuiltinName = "__builtin_ia32_vpermilvarpd"; break; 9836 case Intrinsic::x86_avx_vpermilvar_pd_256: BuiltinName = "__builtin_ia32_vpermilvarpd256"; break; 9837 case Intrinsic::x86_avx_vpermilvar_ps: BuiltinName = "__builtin_ia32_vpermilvarps"; break; 9838 case Intrinsic::x86_avx_vpermilvar_ps_256: BuiltinName = "__builtin_ia32_vpermilvarps256"; break; 9839 case Intrinsic::x86_avx_vtestc_pd: BuiltinName = "__builtin_ia32_vtestcpd"; break; 9840 case Intrinsic::x86_avx_vtestc_pd_256: BuiltinName = "__builtin_ia32_vtestcpd256"; break; 9841 case Intrinsic::x86_avx_vtestc_ps: BuiltinName = "__builtin_ia32_vtestcps"; break; 9842 case Intrinsic::x86_avx_vtestc_ps_256: BuiltinName = "__builtin_ia32_vtestcps256"; break; 9843 case Intrinsic::x86_avx_vtestnzc_pd: BuiltinName = "__builtin_ia32_vtestnzcpd"; break; 9844 case Intrinsic::x86_avx_vtestnzc_pd_256: BuiltinName = "__builtin_ia32_vtestnzcpd256"; break; 9845 case Intrinsic::x86_avx_vtestnzc_ps: BuiltinName = "__builtin_ia32_vtestnzcps"; break; 9846 case Intrinsic::x86_avx_vtestnzc_ps_256: BuiltinName = "__builtin_ia32_vtestnzcps256"; break; 9847 case Intrinsic::x86_avx_vtestz_pd: BuiltinName = "__builtin_ia32_vtestzpd"; break; 9848 case Intrinsic::x86_avx_vtestz_pd_256: BuiltinName = "__builtin_ia32_vtestzpd256"; break; 9849 case Intrinsic::x86_avx_vtestz_ps: BuiltinName = "__builtin_ia32_vtestzps"; break; 9850 case Intrinsic::x86_avx_vtestz_ps_256: BuiltinName = "__builtin_ia32_vtestzps256"; break; 9851 case Intrinsic::x86_avx_vzeroall: BuiltinName = "__builtin_ia32_vzeroall"; break; 9852 case Intrinsic::x86_avx_vzeroupper: BuiltinName = "__builtin_ia32_vzeroupper"; break; 9853 case Intrinsic::x86_mmx_emms: BuiltinName = "__builtin_ia32_emms"; break; 9854 case Intrinsic::x86_mmx_femms: BuiltinName = "__builtin_ia32_femms"; break; 9855 case Intrinsic::x86_mmx_maskmovq: BuiltinName = "__builtin_ia32_maskmovq"; break; 9856 case Intrinsic::x86_mmx_movnt_dq: BuiltinName = "__builtin_ia32_movntq"; break; 9857 case Intrinsic::x86_mmx_packssdw: BuiltinName = "__builtin_ia32_packssdw"; break; 9858 case Intrinsic::x86_mmx_packsswb: BuiltinName = "__builtin_ia32_packsswb"; break; 9859 case Intrinsic::x86_mmx_packuswb: BuiltinName = "__builtin_ia32_packuswb"; break; 9860 case Intrinsic::x86_mmx_padd_b: BuiltinName = "__builtin_ia32_paddb"; break; 9861 case Intrinsic::x86_mmx_padd_d: BuiltinName = "__builtin_ia32_paddd"; break; 9862 case Intrinsic::x86_mmx_padd_q: BuiltinName = "__builtin_ia32_paddq"; break; 9863 case Intrinsic::x86_mmx_padd_w: BuiltinName = "__builtin_ia32_paddw"; break; 9864 case Intrinsic::x86_mmx_padds_b: BuiltinName = "__builtin_ia32_paddsb"; break; 9865 case Intrinsic::x86_mmx_padds_w: BuiltinName = "__builtin_ia32_paddsw"; break; 9866 case Intrinsic::x86_mmx_paddus_b: BuiltinName = "__builtin_ia32_paddusb"; break; 9867 case Intrinsic::x86_mmx_paddus_w: BuiltinName = "__builtin_ia32_paddusw"; break; 9868 case Intrinsic::x86_mmx_pand: BuiltinName = "__builtin_ia32_pand"; break; 9869 case Intrinsic::x86_mmx_pandn: BuiltinName = "__builtin_ia32_pandn"; break; 9870 case Intrinsic::x86_mmx_pavg_b: BuiltinName = "__builtin_ia32_pavgb"; break; 9871 case Intrinsic::x86_mmx_pavg_w: BuiltinName = "__builtin_ia32_pavgw"; break; 9872 case Intrinsic::x86_mmx_pcmpeq_b: BuiltinName = "__builtin_ia32_pcmpeqb"; break; 9873 case Intrinsic::x86_mmx_pcmpeq_d: BuiltinName = "__builtin_ia32_pcmpeqd"; break; 9874 case Intrinsic::x86_mmx_pcmpeq_w: BuiltinName = "__builtin_ia32_pcmpeqw"; break; 9875 case Intrinsic::x86_mmx_pcmpgt_b: BuiltinName = "__builtin_ia32_pcmpgtb"; break; 9876 case Intrinsic::x86_mmx_pcmpgt_d: BuiltinName = "__builtin_ia32_pcmpgtd"; break; 9877 case Intrinsic::x86_mmx_pcmpgt_w: BuiltinName = "__builtin_ia32_pcmpgtw"; break; 9878 case Intrinsic::x86_mmx_pmadd_wd: BuiltinName = "__builtin_ia32_pmaddwd"; break; 9879 case Intrinsic::x86_mmx_pmaxs_w: BuiltinName = "__builtin_ia32_pmaxsw"; break; 9880 case Intrinsic::x86_mmx_pmaxu_b: BuiltinName = "__builtin_ia32_pmaxub"; break; 9881 case Intrinsic::x86_mmx_pmins_w: BuiltinName = "__builtin_ia32_pminsw"; break; 9882 case Intrinsic::x86_mmx_pminu_b: BuiltinName = "__builtin_ia32_pminub"; break; 9883 case Intrinsic::x86_mmx_pmovmskb: BuiltinName = "__builtin_ia32_pmovmskb"; break; 9884 case Intrinsic::x86_mmx_pmulh_w: BuiltinName = "__builtin_ia32_pmulhw"; break; 9885 case Intrinsic::x86_mmx_pmulhu_w: BuiltinName = "__builtin_ia32_pmulhuw"; break; 9886 case Intrinsic::x86_mmx_pmull_w: BuiltinName = "__builtin_ia32_pmullw"; break; 9887 case Intrinsic::x86_mmx_pmulu_dq: BuiltinName = "__builtin_ia32_pmuludq"; break; 9888 case Intrinsic::x86_mmx_por: BuiltinName = "__builtin_ia32_por"; break; 9889 case Intrinsic::x86_mmx_psad_bw: BuiltinName = "__builtin_ia32_psadbw"; break; 9890 case Intrinsic::x86_mmx_psll_d: BuiltinName = "__builtin_ia32_pslld"; break; 9891 case Intrinsic::x86_mmx_psll_q: BuiltinName = "__builtin_ia32_psllq"; break; 9892 case Intrinsic::x86_mmx_psll_w: BuiltinName = "__builtin_ia32_psllw"; break; 9893 case Intrinsic::x86_mmx_pslli_d: BuiltinName = "__builtin_ia32_pslldi"; break; 9894 case Intrinsic::x86_mmx_pslli_q: BuiltinName = "__builtin_ia32_psllqi"; break; 9895 case Intrinsic::x86_mmx_pslli_w: BuiltinName = "__builtin_ia32_psllwi"; break; 9896 case Intrinsic::x86_mmx_psra_d: BuiltinName = "__builtin_ia32_psrad"; break; 9897 case Intrinsic::x86_mmx_psra_w: BuiltinName = "__builtin_ia32_psraw"; break; 9898 case Intrinsic::x86_mmx_psrai_d: BuiltinName = "__builtin_ia32_psradi"; break; 9899 case Intrinsic::x86_mmx_psrai_w: BuiltinName = "__builtin_ia32_psrawi"; break; 9900 case Intrinsic::x86_mmx_psrl_d: BuiltinName = "__builtin_ia32_psrld"; break; 9901 case Intrinsic::x86_mmx_psrl_q: BuiltinName = "__builtin_ia32_psrlq"; break; 9902 case Intrinsic::x86_mmx_psrl_w: BuiltinName = "__builtin_ia32_psrlw"; break; 9903 case Intrinsic::x86_mmx_psrli_d: BuiltinName = "__builtin_ia32_psrldi"; break; 9904 case Intrinsic::x86_mmx_psrli_q: BuiltinName = "__builtin_ia32_psrlqi"; break; 9905 case Intrinsic::x86_mmx_psrli_w: BuiltinName = "__builtin_ia32_psrlwi"; break; 9906 case Intrinsic::x86_mmx_psub_b: BuiltinName = "__builtin_ia32_psubb"; break; 9907 case Intrinsic::x86_mmx_psub_d: BuiltinName = "__builtin_ia32_psubd"; break; 9908 case Intrinsic::x86_mmx_psub_q: BuiltinName = "__builtin_ia32_psubq"; break; 9909 case Intrinsic::x86_mmx_psub_w: BuiltinName = "__builtin_ia32_psubw"; break; 9910 case Intrinsic::x86_mmx_psubs_b: BuiltinName = "__builtin_ia32_psubsb"; break; 9911 case Intrinsic::x86_mmx_psubs_w: BuiltinName = "__builtin_ia32_psubsw"; break; 9912 case Intrinsic::x86_mmx_psubus_b: BuiltinName = "__builtin_ia32_psubusb"; break; 9913 case Intrinsic::x86_mmx_psubus_w: BuiltinName = "__builtin_ia32_psubusw"; break; 9914 case Intrinsic::x86_mmx_punpckhbw: BuiltinName = "__builtin_ia32_punpckhbw"; break; 9915 case Intrinsic::x86_mmx_punpckhdq: BuiltinName = "__builtin_ia32_punpckhdq"; break; 9916 case Intrinsic::x86_mmx_punpckhwd: BuiltinName = "__builtin_ia32_punpckhwd"; break; 9917 case Intrinsic::x86_mmx_punpcklbw: BuiltinName = "__builtin_ia32_punpcklbw"; break; 9918 case Intrinsic::x86_mmx_punpckldq: BuiltinName = "__builtin_ia32_punpckldq"; break; 9919 case Intrinsic::x86_mmx_punpcklwd: BuiltinName = "__builtin_ia32_punpcklwd"; break; 9920 case Intrinsic::x86_mmx_pxor: BuiltinName = "__builtin_ia32_pxor"; break; 9921 case Intrinsic::x86_mmx_vec_ext_d: BuiltinName = "__builtin_ia32_vec_ext_v2si"; break; 9922 case Intrinsic::x86_mmx_vec_init_b: BuiltinName = "__builtin_ia32_vec_init_v8qi"; break; 9923 case Intrinsic::x86_mmx_vec_init_d: BuiltinName = "__builtin_ia32_vec_init_v2si"; break; 9924 case Intrinsic::x86_mmx_vec_init_w: BuiltinName = "__builtin_ia32_vec_init_v4hi"; break; 9925 case Intrinsic::x86_sse2_add_sd: BuiltinName = "__builtin_ia32_addsd"; break; 9926 case Intrinsic::x86_sse2_clflush: BuiltinName = "__builtin_ia32_clflush"; break; 9927 case Intrinsic::x86_sse2_comieq_sd: BuiltinName = "__builtin_ia32_comisdeq"; break; 9928 case Intrinsic::x86_sse2_comige_sd: BuiltinName = "__builtin_ia32_comisdge"; break; 9929 case Intrinsic::x86_sse2_comigt_sd: BuiltinName = "__builtin_ia32_comisdgt"; break; 9930 case Intrinsic::x86_sse2_comile_sd: BuiltinName = "__builtin_ia32_comisdle"; break; 9931 case Intrinsic::x86_sse2_comilt_sd: BuiltinName = "__builtin_ia32_comisdlt"; break; 9932 case Intrinsic::x86_sse2_comineq_sd: BuiltinName = "__builtin_ia32_comisdneq"; break; 9933 case Intrinsic::x86_sse2_cvtdq2pd: BuiltinName = "__builtin_ia32_cvtdq2pd"; break; 9934 case Intrinsic::x86_sse2_cvtdq2ps: BuiltinName = "__builtin_ia32_cvtdq2ps"; break; 9935 case Intrinsic::x86_sse2_cvtpd2dq: BuiltinName = "__builtin_ia32_cvtpd2dq"; break; 9936 case Intrinsic::x86_sse2_cvtpd2ps: BuiltinName = "__builtin_ia32_cvtpd2ps"; break; 9937 case Intrinsic::x86_sse2_cvtps2dq: BuiltinName = "__builtin_ia32_cvtps2dq"; break; 9938 case Intrinsic::x86_sse2_cvtps2pd: BuiltinName = "__builtin_ia32_cvtps2pd"; break; 9939 case Intrinsic::x86_sse2_cvtsd2si: BuiltinName = "__builtin_ia32_cvtsd2si"; break; 9940 case Intrinsic::x86_sse2_cvtsd2si64: BuiltinName = "__builtin_ia32_cvtsd2si64"; break; 9941 case Intrinsic::x86_sse2_cvtsd2ss: BuiltinName = "__builtin_ia32_cvtsd2ss"; break; 9942 case Intrinsic::x86_sse2_cvtsi2sd: BuiltinName = "__builtin_ia32_cvtsi2sd"; break; 9943 case Intrinsic::x86_sse2_cvtsi642sd: BuiltinName = "__builtin_ia32_cvtsi642sd"; break; 9944 case Intrinsic::x86_sse2_cvtss2sd: BuiltinName = "__builtin_ia32_cvtss2sd"; break; 9945 case Intrinsic::x86_sse2_cvttpd2dq: BuiltinName = "__builtin_ia32_cvttpd2dq"; break; 9946 case Intrinsic::x86_sse2_cvttps2dq: BuiltinName = "__builtin_ia32_cvttps2dq"; break; 9947 case Intrinsic::x86_sse2_cvttsd2si: BuiltinName = "__builtin_ia32_cvttsd2si"; break; 9948 case Intrinsic::x86_sse2_cvttsd2si64: BuiltinName = "__builtin_ia32_cvttsd2si64"; break; 9949 case Intrinsic::x86_sse2_div_sd: BuiltinName = "__builtin_ia32_divsd"; break; 9950 case Intrinsic::x86_sse2_lfence: BuiltinName = "__builtin_ia32_lfence"; break; 9951 case Intrinsic::x86_sse2_loadu_dq: BuiltinName = "__builtin_ia32_loaddqu"; break; 9952 case Intrinsic::x86_sse2_loadu_pd: BuiltinName = "__builtin_ia32_loadupd"; break; 9953 case Intrinsic::x86_sse2_maskmov_dqu: BuiltinName = "__builtin_ia32_maskmovdqu"; break; 9954 case Intrinsic::x86_sse2_max_pd: BuiltinName = "__builtin_ia32_maxpd"; break; 9955 case Intrinsic::x86_sse2_max_sd: BuiltinName = "__builtin_ia32_maxsd"; break; 9956 case Intrinsic::x86_sse2_mfence: BuiltinName = "__builtin_ia32_mfence"; break; 9957 case Intrinsic::x86_sse2_min_pd: BuiltinName = "__builtin_ia32_minpd"; break; 9958 case Intrinsic::x86_sse2_min_sd: BuiltinName = "__builtin_ia32_minsd"; break; 9959 case Intrinsic::x86_sse2_movmsk_pd: BuiltinName = "__builtin_ia32_movmskpd"; break; 9960 case Intrinsic::x86_sse2_movnt_dq: BuiltinName = "__builtin_ia32_movntdq"; break; 9961 case Intrinsic::x86_sse2_movnt_i: BuiltinName = "__builtin_ia32_movnti"; break; 9962 case Intrinsic::x86_sse2_movnt_pd: BuiltinName = "__builtin_ia32_movntpd"; break; 9963 case Intrinsic::x86_sse2_mul_sd: BuiltinName = "__builtin_ia32_mulsd"; break; 9964 case Intrinsic::x86_sse2_packssdw_128: BuiltinName = "__builtin_ia32_packssdw128"; break; 9965 case Intrinsic::x86_sse2_packsswb_128: BuiltinName = "__builtin_ia32_packsswb128"; break; 9966 case Intrinsic::x86_sse2_packuswb_128: BuiltinName = "__builtin_ia32_packuswb128"; break; 9967 case Intrinsic::x86_sse2_padds_b: BuiltinName = "__builtin_ia32_paddsb128"; break; 9968 case Intrinsic::x86_sse2_padds_w: BuiltinName = "__builtin_ia32_paddsw128"; break; 9969 case Intrinsic::x86_sse2_paddus_b: BuiltinName = "__builtin_ia32_paddusb128"; break; 9970 case Intrinsic::x86_sse2_paddus_w: BuiltinName = "__builtin_ia32_paddusw128"; break; 9971 case Intrinsic::x86_sse2_pavg_b: BuiltinName = "__builtin_ia32_pavgb128"; break; 9972 case Intrinsic::x86_sse2_pavg_w: BuiltinName = "__builtin_ia32_pavgw128"; break; 9973 case Intrinsic::x86_sse2_pcmpeq_b: BuiltinName = "__builtin_ia32_pcmpeqb128"; break; 9974 case Intrinsic::x86_sse2_pcmpeq_d: BuiltinName = "__builtin_ia32_pcmpeqd128"; break; 9975 case Intrinsic::x86_sse2_pcmpeq_w: BuiltinName = "__builtin_ia32_pcmpeqw128"; break; 9976 case Intrinsic::x86_sse2_pcmpgt_b: BuiltinName = "__builtin_ia32_pcmpgtb128"; break; 9977 case Intrinsic::x86_sse2_pcmpgt_d: BuiltinName = "__builtin_ia32_pcmpgtd128"; break; 9978 case Intrinsic::x86_sse2_pcmpgt_w: BuiltinName = "__builtin_ia32_pcmpgtw128"; break; 9979 case Intrinsic::x86_sse2_pmadd_wd: BuiltinName = "__builtin_ia32_pmaddwd128"; break; 9980 case Intrinsic::x86_sse2_pmaxs_w: BuiltinName = "__builtin_ia32_pmaxsw128"; break; 9981 case Intrinsic::x86_sse2_pmaxu_b: BuiltinName = "__builtin_ia32_pmaxub128"; break; 9982 case Intrinsic::x86_sse2_pmins_w: BuiltinName = "__builtin_ia32_pminsw128"; break; 9983 case Intrinsic::x86_sse2_pminu_b: BuiltinName = "__builtin_ia32_pminub128"; break; 9984 case Intrinsic::x86_sse2_pmovmskb_128: BuiltinName = "__builtin_ia32_pmovmskb128"; break; 9985 case Intrinsic::x86_sse2_pmulh_w: BuiltinName = "__builtin_ia32_pmulhw128"; break; 9986 case Intrinsic::x86_sse2_pmulhu_w: BuiltinName = "__builtin_ia32_pmulhuw128"; break; 9987 case Intrinsic::x86_sse2_pmulu_dq: BuiltinName = "__builtin_ia32_pmuludq128"; break; 9988 case Intrinsic::x86_sse2_psad_bw: BuiltinName = "__builtin_ia32_psadbw128"; break; 9989 case Intrinsic::x86_sse2_psll_d: BuiltinName = "__builtin_ia32_pslld128"; break; 9990 case Intrinsic::x86_sse2_psll_dq: BuiltinName = "__builtin_ia32_pslldqi128"; break; 9991 case Intrinsic::x86_sse2_psll_dq_bs: BuiltinName = "__builtin_ia32_pslldqi128_byteshift"; break; 9992 case Intrinsic::x86_sse2_psll_q: BuiltinName = "__builtin_ia32_psllq128"; break; 9993 case Intrinsic::x86_sse2_psll_w: BuiltinName = "__builtin_ia32_psllw128"; break; 9994 case Intrinsic::x86_sse2_pslli_d: BuiltinName = "__builtin_ia32_pslldi128"; break; 9995 case Intrinsic::x86_sse2_pslli_q: BuiltinName = "__builtin_ia32_psllqi128"; break; 9996 case Intrinsic::x86_sse2_pslli_w: BuiltinName = "__builtin_ia32_psllwi128"; break; 9997 case Intrinsic::x86_sse2_psra_d: BuiltinName = "__builtin_ia32_psrad128"; break; 9998 case Intrinsic::x86_sse2_psra_w: BuiltinName = "__builtin_ia32_psraw128"; break; 9999 case Intrinsic::x86_sse2_psrai_d: BuiltinName = "__builtin_ia32_psradi128"; break; 10000 case Intrinsic::x86_sse2_psrai_w: BuiltinName = "__builtin_ia32_psrawi128"; break; 10001 case Intrinsic::x86_sse2_psrl_d: BuiltinName = "__builtin_ia32_psrld128"; break; 10002 case Intrinsic::x86_sse2_psrl_dq: BuiltinName = "__builtin_ia32_psrldqi128"; break; 10003 case Intrinsic::x86_sse2_psrl_dq_bs: BuiltinName = "__builtin_ia32_psrldqi128_byteshift"; break; 10004 case Intrinsic::x86_sse2_psrl_q: BuiltinName = "__builtin_ia32_psrlq128"; break; 10005 case Intrinsic::x86_sse2_psrl_w: BuiltinName = "__builtin_ia32_psrlw128"; break; 10006 case Intrinsic::x86_sse2_psrli_d: BuiltinName = "__builtin_ia32_psrldi128"; break; 10007 case Intrinsic::x86_sse2_psrli_q: BuiltinName = "__builtin_ia32_psrlqi128"; break; 10008 case Intrinsic::x86_sse2_psrli_w: BuiltinName = "__builtin_ia32_psrlwi128"; break; 10009 case Intrinsic::x86_sse2_psubs_b: BuiltinName = "__builtin_ia32_psubsb128"; break; 10010 case Intrinsic::x86_sse2_psubs_w: BuiltinName = "__builtin_ia32_psubsw128"; break; 10011 case Intrinsic::x86_sse2_psubus_b: BuiltinName = "__builtin_ia32_psubusb128"; break; 10012 case Intrinsic::x86_sse2_psubus_w: BuiltinName = "__builtin_ia32_psubusw128"; break; 10013 case Intrinsic::x86_sse2_sqrt_pd: BuiltinName = "__builtin_ia32_sqrtpd"; break; 10014 case Intrinsic::x86_sse2_sqrt_sd: BuiltinName = "__builtin_ia32_sqrtsd"; break; 10015 case Intrinsic::x86_sse2_storel_dq: BuiltinName = "__builtin_ia32_storelv4si"; break; 10016 case Intrinsic::x86_sse2_storeu_dq: BuiltinName = "__builtin_ia32_storedqu"; break; 10017 case Intrinsic::x86_sse2_storeu_pd: BuiltinName = "__builtin_ia32_storeupd"; break; 10018 case Intrinsic::x86_sse2_sub_sd: BuiltinName = "__builtin_ia32_subsd"; break; 10019 case Intrinsic::x86_sse2_ucomieq_sd: BuiltinName = "__builtin_ia32_ucomisdeq"; break; 10020 case Intrinsic::x86_sse2_ucomige_sd: BuiltinName = "__builtin_ia32_ucomisdge"; break; 10021 case Intrinsic::x86_sse2_ucomigt_sd: BuiltinName = "__builtin_ia32_ucomisdgt"; break; 10022 case Intrinsic::x86_sse2_ucomile_sd: BuiltinName = "__builtin_ia32_ucomisdle"; break; 10023 case Intrinsic::x86_sse2_ucomilt_sd: BuiltinName = "__builtin_ia32_ucomisdlt"; break; 10024 case Intrinsic::x86_sse2_ucomineq_sd: BuiltinName = "__builtin_ia32_ucomisdneq"; break; 10025 case Intrinsic::x86_sse3_addsub_pd: BuiltinName = "__builtin_ia32_addsubpd"; break; 10026 case Intrinsic::x86_sse3_addsub_ps: BuiltinName = "__builtin_ia32_addsubps"; break; 10027 case Intrinsic::x86_sse3_hadd_pd: BuiltinName = "__builtin_ia32_haddpd"; break; 10028 case Intrinsic::x86_sse3_hadd_ps: BuiltinName = "__builtin_ia32_haddps"; break; 10029 case Intrinsic::x86_sse3_hsub_pd: BuiltinName = "__builtin_ia32_hsubpd"; break; 10030 case Intrinsic::x86_sse3_hsub_ps: BuiltinName = "__builtin_ia32_hsubps"; break; 10031 case Intrinsic::x86_sse3_ldu_dq: BuiltinName = "__builtin_ia32_lddqu"; break; 10032 case Intrinsic::x86_sse3_monitor: BuiltinName = "__builtin_ia32_monitor"; break; 10033 case Intrinsic::x86_sse3_mwait: BuiltinName = "__builtin_ia32_mwait"; break; 10034 case Intrinsic::x86_sse41_blendpd: BuiltinName = "__builtin_ia32_blendpd"; break; 10035 case Intrinsic::x86_sse41_blendps: BuiltinName = "__builtin_ia32_blendps"; break; 10036 case Intrinsic::x86_sse41_blendvpd: BuiltinName = "__builtin_ia32_blendvpd"; break; 10037 case Intrinsic::x86_sse41_blendvps: BuiltinName = "__builtin_ia32_blendvps"; break; 10038 case Intrinsic::x86_sse41_dppd: BuiltinName = "__builtin_ia32_dppd"; break; 10039 case Intrinsic::x86_sse41_dpps: BuiltinName = "__builtin_ia32_dpps"; break; 10040 case Intrinsic::x86_sse41_extractps: BuiltinName = "__builtin_ia32_extractps128"; break; 10041 case Intrinsic::x86_sse41_insertps: BuiltinName = "__builtin_ia32_insertps128"; break; 10042 case Intrinsic::x86_sse41_movntdqa: BuiltinName = "__builtin_ia32_movntdqa"; break; 10043 case Intrinsic::x86_sse41_mpsadbw: BuiltinName = "__builtin_ia32_mpsadbw128"; break; 10044 case Intrinsic::x86_sse41_packusdw: BuiltinName = "__builtin_ia32_packusdw128"; break; 10045 case Intrinsic::x86_sse41_pblendvb: BuiltinName = "__builtin_ia32_pblendvb128"; break; 10046 case Intrinsic::x86_sse41_pblendw: BuiltinName = "__builtin_ia32_pblendw128"; break; 10047 case Intrinsic::x86_sse41_pcmpeqq: BuiltinName = "__builtin_ia32_pcmpeqq"; break; 10048 case Intrinsic::x86_sse41_phminposuw: BuiltinName = "__builtin_ia32_phminposuw128"; break; 10049 case Intrinsic::x86_sse41_pmaxsb: BuiltinName = "__builtin_ia32_pmaxsb128"; break; 10050 case Intrinsic::x86_sse41_pmaxsd: BuiltinName = "__builtin_ia32_pmaxsd128"; break; 10051 case Intrinsic::x86_sse41_pmaxud: BuiltinName = "__builtin_ia32_pmaxud128"; break; 10052 case Intrinsic::x86_sse41_pmaxuw: BuiltinName = "__builtin_ia32_pmaxuw128"; break; 10053 case Intrinsic::x86_sse41_pminsb: BuiltinName = "__builtin_ia32_pminsb128"; break; 10054 case Intrinsic::x86_sse41_pminsd: BuiltinName = "__builtin_ia32_pminsd128"; break; 10055 case Intrinsic::x86_sse41_pminud: BuiltinName = "__builtin_ia32_pminud128"; break; 10056 case Intrinsic::x86_sse41_pminuw: BuiltinName = "__builtin_ia32_pminuw128"; break; 10057 case Intrinsic::x86_sse41_pmovsxbd: BuiltinName = "__builtin_ia32_pmovsxbd128"; break; 10058 case Intrinsic::x86_sse41_pmovsxbq: BuiltinName = "__builtin_ia32_pmovsxbq128"; break; 10059 case Intrinsic::x86_sse41_pmovsxbw: BuiltinName = "__builtin_ia32_pmovsxbw128"; break; 10060 case Intrinsic::x86_sse41_pmovsxdq: BuiltinName = "__builtin_ia32_pmovsxdq128"; break; 10061 case Intrinsic::x86_sse41_pmovsxwd: BuiltinName = "__builtin_ia32_pmovsxwd128"; break; 10062 case Intrinsic::x86_sse41_pmovsxwq: BuiltinName = "__builtin_ia32_pmovsxwq128"; break; 10063 case Intrinsic::x86_sse41_pmovzxbd: BuiltinName = "__builtin_ia32_pmovzxbd128"; break; 10064 case Intrinsic::x86_sse41_pmovzxbq: BuiltinName = "__builtin_ia32_pmovzxbq128"; break; 10065 case Intrinsic::x86_sse41_pmovzxbw: BuiltinName = "__builtin_ia32_pmovzxbw128"; break; 10066 case Intrinsic::x86_sse41_pmovzxdq: BuiltinName = "__builtin_ia32_pmovzxdq128"; break; 10067 case Intrinsic::x86_sse41_pmovzxwd: BuiltinName = "__builtin_ia32_pmovzxwd128"; break; 10068 case Intrinsic::x86_sse41_pmovzxwq: BuiltinName = "__builtin_ia32_pmovzxwq128"; break; 10069 case Intrinsic::x86_sse41_pmuldq: BuiltinName = "__builtin_ia32_pmuldq128"; break; 10070 case Intrinsic::x86_sse41_ptestc: BuiltinName = "__builtin_ia32_ptestc128"; break; 10071 case Intrinsic::x86_sse41_ptestnzc: BuiltinName = "__builtin_ia32_ptestnzc128"; break; 10072 case Intrinsic::x86_sse41_ptestz: BuiltinName = "__builtin_ia32_ptestz128"; break; 10073 case Intrinsic::x86_sse41_round_pd: BuiltinName = "__builtin_ia32_roundpd"; break; 10074 case Intrinsic::x86_sse41_round_ps: BuiltinName = "__builtin_ia32_roundps"; break; 10075 case Intrinsic::x86_sse41_round_sd: BuiltinName = "__builtin_ia32_roundsd"; break; 10076 case Intrinsic::x86_sse41_round_ss: BuiltinName = "__builtin_ia32_roundss"; break; 10077 case Intrinsic::x86_sse42_crc32_16: BuiltinName = "__builtin_ia32_crc32hi"; break; 10078 case Intrinsic::x86_sse42_crc32_32: BuiltinName = "__builtin_ia32_crc32si"; break; 10079 case Intrinsic::x86_sse42_crc32_8: BuiltinName = "__builtin_ia32_crc32qi"; break; 10080 case Intrinsic::x86_sse42_crc64_64: BuiltinName = "__builtin_ia32_crc32di"; break; 10081 case Intrinsic::x86_sse42_pcmpestri128: BuiltinName = "__builtin_ia32_pcmpestri128"; break; 10082 case Intrinsic::x86_sse42_pcmpestria128: BuiltinName = "__builtin_ia32_pcmpestria128"; break; 10083 case Intrinsic::x86_sse42_pcmpestric128: BuiltinName = "__builtin_ia32_pcmpestric128"; break; 10084 case Intrinsic::x86_sse42_pcmpestrio128: BuiltinName = "__builtin_ia32_pcmpestrio128"; break; 10085 case Intrinsic::x86_sse42_pcmpestris128: BuiltinName = "__builtin_ia32_pcmpestris128"; break; 10086 case Intrinsic::x86_sse42_pcmpestriz128: BuiltinName = "__builtin_ia32_pcmpestriz128"; break; 10087 case Intrinsic::x86_sse42_pcmpestrm128: BuiltinName = "__builtin_ia32_pcmpestrm128"; break; 10088 case Intrinsic::x86_sse42_pcmpgtq: BuiltinName = "__builtin_ia32_pcmpgtq"; break; 10089 case Intrinsic::x86_sse42_pcmpistri128: BuiltinName = "__builtin_ia32_pcmpistri128"; break; 10090 case Intrinsic::x86_sse42_pcmpistria128: BuiltinName = "__builtin_ia32_pcmpistria128"; break; 10091 case Intrinsic::x86_sse42_pcmpistric128: BuiltinName = "__builtin_ia32_pcmpistric128"; break; 10092 case Intrinsic::x86_sse42_pcmpistrio128: BuiltinName = "__builtin_ia32_pcmpistrio128"; break; 10093 case Intrinsic::x86_sse42_pcmpistris128: BuiltinName = "__builtin_ia32_pcmpistris128"; break; 10094 case Intrinsic::x86_sse42_pcmpistriz128: BuiltinName = "__builtin_ia32_pcmpistriz128"; break; 10095 case Intrinsic::x86_sse42_pcmpistrm128: BuiltinName = "__builtin_ia32_pcmpistrm128"; break; 10096 case Intrinsic::x86_sse_add_ss: BuiltinName = "__builtin_ia32_addss"; break; 10097 case Intrinsic::x86_sse_comieq_ss: BuiltinName = "__builtin_ia32_comieq"; break; 10098 case Intrinsic::x86_sse_comige_ss: BuiltinName = "__builtin_ia32_comige"; break; 10099 case Intrinsic::x86_sse_comigt_ss: BuiltinName = "__builtin_ia32_comigt"; break; 10100 case Intrinsic::x86_sse_comile_ss: BuiltinName = "__builtin_ia32_comile"; break; 10101 case Intrinsic::x86_sse_comilt_ss: BuiltinName = "__builtin_ia32_comilt"; break; 10102 case Intrinsic::x86_sse_comineq_ss: BuiltinName = "__builtin_ia32_comineq"; break; 10103 case Intrinsic::x86_sse_cvtpd2pi: BuiltinName = "__builtin_ia32_cvtpd2pi"; break; 10104 case Intrinsic::x86_sse_cvtpi2pd: BuiltinName = "__builtin_ia32_cvtpi2pd"; break; 10105 case Intrinsic::x86_sse_cvtpi2ps: BuiltinName = "__builtin_ia32_cvtpi2ps"; break; 10106 case Intrinsic::x86_sse_cvtps2pi: BuiltinName = "__builtin_ia32_cvtps2pi"; break; 10107 case Intrinsic::x86_sse_cvtsi2ss: BuiltinName = "__builtin_ia32_cvtsi2ss"; break; 10108 case Intrinsic::x86_sse_cvtsi642ss: BuiltinName = "__builtin_ia32_cvtsi642ss"; break; 10109 case Intrinsic::x86_sse_cvtss2si: BuiltinName = "__builtin_ia32_cvtss2si"; break; 10110 case Intrinsic::x86_sse_cvtss2si64: BuiltinName = "__builtin_ia32_cvtss2si64"; break; 10111 case Intrinsic::x86_sse_cvttpd2pi: BuiltinName = "__builtin_ia32_cvttpd2pi"; break; 10112 case Intrinsic::x86_sse_cvttps2pi: BuiltinName = "__builtin_ia32_cvttps2pi"; break; 10113 case Intrinsic::x86_sse_cvttss2si: BuiltinName = "__builtin_ia32_cvttss2si"; break; 10114 case Intrinsic::x86_sse_cvttss2si64: BuiltinName = "__builtin_ia32_cvttss2si64"; break; 10115 case Intrinsic::x86_sse_div_ss: BuiltinName = "__builtin_ia32_divss"; break; 10116 case Intrinsic::x86_sse_loadu_ps: BuiltinName = "__builtin_ia32_loadups"; break; 10117 case Intrinsic::x86_sse_max_ps: BuiltinName = "__builtin_ia32_maxps"; break; 10118 case Intrinsic::x86_sse_max_ss: BuiltinName = "__builtin_ia32_maxss"; break; 10119 case Intrinsic::x86_sse_min_ps: BuiltinName = "__builtin_ia32_minps"; break; 10120 case Intrinsic::x86_sse_min_ss: BuiltinName = "__builtin_ia32_minss"; break; 10121 case Intrinsic::x86_sse_movmsk_ps: BuiltinName = "__builtin_ia32_movmskps"; break; 10122 case Intrinsic::x86_sse_movnt_ps: BuiltinName = "__builtin_ia32_movntps"; break; 10123 case Intrinsic::x86_sse_mul_ss: BuiltinName = "__builtin_ia32_mulss"; break; 10124 case Intrinsic::x86_sse_rcp_ps: BuiltinName = "__builtin_ia32_rcpps"; break; 10125 case Intrinsic::x86_sse_rcp_ss: BuiltinName = "__builtin_ia32_rcpss"; break; 10126 case Intrinsic::x86_sse_rsqrt_ps: BuiltinName = "__builtin_ia32_rsqrtps"; break; 10127 case Intrinsic::x86_sse_rsqrt_ss: BuiltinName = "__builtin_ia32_rsqrtss"; break; 10128 case Intrinsic::x86_sse_sfence: BuiltinName = "__builtin_ia32_sfence"; break; 10129 case Intrinsic::x86_sse_sqrt_ps: BuiltinName = "__builtin_ia32_sqrtps"; break; 10130 case Intrinsic::x86_sse_sqrt_ss: BuiltinName = "__builtin_ia32_sqrtss"; break; 10131 case Intrinsic::x86_sse_storeu_ps: BuiltinName = "__builtin_ia32_storeups"; break; 10132 case Intrinsic::x86_sse_sub_ss: BuiltinName = "__builtin_ia32_subss"; break; 10133 case Intrinsic::x86_sse_ucomieq_ss: BuiltinName = "__builtin_ia32_ucomieq"; break; 10134 case Intrinsic::x86_sse_ucomige_ss: BuiltinName = "__builtin_ia32_ucomige"; break; 10135 case Intrinsic::x86_sse_ucomigt_ss: BuiltinName = "__builtin_ia32_ucomigt"; break; 10136 case Intrinsic::x86_sse_ucomile_ss: BuiltinName = "__builtin_ia32_ucomile"; break; 10137 case Intrinsic::x86_sse_ucomilt_ss: BuiltinName = "__builtin_ia32_ucomilt"; break; 10138 case Intrinsic::x86_sse_ucomineq_ss: BuiltinName = "__builtin_ia32_ucomineq"; break; 10139 case Intrinsic::x86_ssse3_pabs_b: BuiltinName = "__builtin_ia32_pabsb"; break; 10140 case Intrinsic::x86_ssse3_pabs_b_128: BuiltinName = "__builtin_ia32_pabsb128"; break; 10141 case Intrinsic::x86_ssse3_pabs_d: BuiltinName = "__builtin_ia32_pabsd"; break; 10142 case Intrinsic::x86_ssse3_pabs_d_128: BuiltinName = "__builtin_ia32_pabsd128"; break; 10143 case Intrinsic::x86_ssse3_pabs_w: BuiltinName = "__builtin_ia32_pabsw"; break; 10144 case Intrinsic::x86_ssse3_pabs_w_128: BuiltinName = "__builtin_ia32_pabsw128"; break; 10145 case Intrinsic::x86_ssse3_phadd_d: BuiltinName = "__builtin_ia32_phaddd"; break; 10146 case Intrinsic::x86_ssse3_phadd_d_128: BuiltinName = "__builtin_ia32_phaddd128"; break; 10147 case Intrinsic::x86_ssse3_phadd_sw: BuiltinName = "__builtin_ia32_phaddsw"; break; 10148 case Intrinsic::x86_ssse3_phadd_sw_128: BuiltinName = "__builtin_ia32_phaddsw128"; break; 10149 case Intrinsic::x86_ssse3_phadd_w: BuiltinName = "__builtin_ia32_phaddw"; break; 10150 case Intrinsic::x86_ssse3_phadd_w_128: BuiltinName = "__builtin_ia32_phaddw128"; break; 10151 case Intrinsic::x86_ssse3_phsub_d: BuiltinName = "__builtin_ia32_phsubd"; break; 10152 case Intrinsic::x86_ssse3_phsub_d_128: BuiltinName = "__builtin_ia32_phsubd128"; break; 10153 case Intrinsic::x86_ssse3_phsub_sw: BuiltinName = "__builtin_ia32_phsubsw"; break; 10154 case Intrinsic::x86_ssse3_phsub_sw_128: BuiltinName = "__builtin_ia32_phsubsw128"; break; 10155 case Intrinsic::x86_ssse3_phsub_w: BuiltinName = "__builtin_ia32_phsubw"; break; 10156 case Intrinsic::x86_ssse3_phsub_w_128: BuiltinName = "__builtin_ia32_phsubw128"; break; 10157 case Intrinsic::x86_ssse3_pmadd_ub_sw: BuiltinName = "__builtin_ia32_pmaddubsw"; break; 10158 case Intrinsic::x86_ssse3_pmadd_ub_sw_128: BuiltinName = "__builtin_ia32_pmaddubsw128"; break; 10159 case Intrinsic::x86_ssse3_pmul_hr_sw: BuiltinName = "__builtin_ia32_pmulhrsw"; break; 10160 case Intrinsic::x86_ssse3_pmul_hr_sw_128: BuiltinName = "__builtin_ia32_pmulhrsw128"; break; 10161 case Intrinsic::x86_ssse3_pshuf_b: BuiltinName = "__builtin_ia32_pshufb"; break; 10162 case Intrinsic::x86_ssse3_pshuf_b_128: BuiltinName = "__builtin_ia32_pshufb128"; break; 10163 case Intrinsic::x86_ssse3_pshuf_w: BuiltinName = "__builtin_ia32_pshufw"; break; 10164 case Intrinsic::x86_ssse3_psign_b: BuiltinName = "__builtin_ia32_psignb"; break; 10165 case Intrinsic::x86_ssse3_psign_b_128: BuiltinName = "__builtin_ia32_psignb128"; break; 10166 case Intrinsic::x86_ssse3_psign_d: BuiltinName = "__builtin_ia32_psignd"; break; 10167 case Intrinsic::x86_ssse3_psign_d_128: BuiltinName = "__builtin_ia32_psignd128"; break; 10168 case Intrinsic::x86_ssse3_psign_w: BuiltinName = "__builtin_ia32_psignw"; break; 10169 case Intrinsic::x86_ssse3_psign_w_128: BuiltinName = "__builtin_ia32_psignw128"; break; 10170 } 10171#endif 10172 10173// Get the LLVM intrinsic that corresponds to a GCC builtin. 10174// This is used by the C front-end. The GCC builtin name is passed 10175// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed 10176// in as TargetPrefix. The result is assigned to 'IntrinsicID'. 10177#ifdef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN 10178Intrinsic::ID Intrinsic::getIntrinsicForGCCBuiltin(const char *TargetPrefix, const char *BuiltinName) { 10179 Intrinsic::ID IntrinsicID = Intrinsic::not_intrinsic; 10180 /* Target Independent Builtins */ { 10181 switch (strlen(BuiltinName)) { 10182 default: break; 10183 case 14: 10184 if (!memcmp(BuiltinName, "__", 2)) { 10185 switch (BuiltinName[2]) { // "__" 10186 case 'b': 10187 if (!memcmp(BuiltinName+3, "uiltin_trap", 11)) 10188 IntrinsicID = Intrinsic::trap; 10189 break; 10190 case 'g': 10191 if (!memcmp(BuiltinName+3, "nu_", 3)) { 10192 switch (BuiltinName[6]) { // "__gnu_" 10193 case 'f': 10194 if (!memcmp(BuiltinName+7, "2h_ieee", 7)) 10195 IntrinsicID = Intrinsic::convert_to_fp16; 10196 break; 10197 case 'h': 10198 if (!memcmp(BuiltinName+7, "2f_ieee", 7)) 10199 IntrinsicID = Intrinsic::convert_from_fp16; 10200 break; 10201 } 10202 } 10203 break; 10204 } 10205 } 10206 break; 10207 case 19: 10208 if (!memcmp(BuiltinName, "__sync_fetch_and_or", 19)) 10209 IntrinsicID = Intrinsic::atomic_load_or; 10210 break; 10211 case 20: 10212 if (!memcmp(BuiltinName, "__", 2)) { 10213 switch (BuiltinName[2]) { // "__" 10214 case 'b': 10215 if (!memcmp(BuiltinName+3, "uiltin_", 7)) { 10216 switch (BuiltinName[10]) { // "__builtin_" 10217 case 'f': 10218 if (!memcmp(BuiltinName+11, "lt_rounds", 9)) 10219 IntrinsicID = Intrinsic::flt_rounds; 10220 break; 10221 case 's': 10222 if (!memcmp(BuiltinName+11, "tack_save", 9)) 10223 IntrinsicID = Intrinsic::stacksave; 10224 break; 10225 } 10226 } 10227 break; 10228 case 's': 10229 if (!memcmp(BuiltinName+3, "ync_fetch_and_", 14)) { 10230 switch (BuiltinName[17]) { // "__sync_fetch_and_" 10231 case 'a': 10232 switch (BuiltinName[18]) { // "__sync_fetch_and_a" 10233 case 'd': 10234 if (!memcmp(BuiltinName+19, "d", 1)) 10235 IntrinsicID = Intrinsic::atomic_load_add; 10236 break; 10237 case 'n': 10238 if (!memcmp(BuiltinName+19, "d", 1)) 10239 IntrinsicID = Intrinsic::atomic_load_and; 10240 break; 10241 } 10242 break; 10243 case 'm': 10244 switch (BuiltinName[18]) { // "__sync_fetch_and_m" 10245 case 'a': 10246 if (!memcmp(BuiltinName+19, "x", 1)) 10247 IntrinsicID = Intrinsic::atomic_load_max; 10248 break; 10249 case 'i': 10250 if (!memcmp(BuiltinName+19, "n", 1)) 10251 IntrinsicID = Intrinsic::atomic_load_min; 10252 break; 10253 } 10254 break; 10255 case 's': 10256 if (!memcmp(BuiltinName+18, "ub", 2)) 10257 IntrinsicID = Intrinsic::atomic_load_sub; 10258 break; 10259 case 'x': 10260 if (!memcmp(BuiltinName+18, "or", 2)) 10261 IntrinsicID = Intrinsic::atomic_load_xor; 10262 break; 10263 } 10264 } 10265 break; 10266 } 10267 } 10268 break; 10269 case 21: 10270 if (!memcmp(BuiltinName, "__", 2)) { 10271 switch (BuiltinName[2]) { // "__" 10272 case 'b': 10273 if (!memcmp(BuiltinName+3, "uiltin_", 7)) { 10274 switch (BuiltinName[10]) { // "__builtin_" 10275 case 'o': 10276 if (!memcmp(BuiltinName+11, "bject_size", 10)) 10277 IntrinsicID = Intrinsic::objectsize; 10278 break; 10279 case 'u': 10280 if (!memcmp(BuiltinName+11, "nwind_init", 10)) 10281 IntrinsicID = Intrinsic::eh_unwind_init; 10282 break; 10283 } 10284 } 10285 break; 10286 case 's': 10287 if (!memcmp(BuiltinName+3, "ync_fetch_and_", 14)) { 10288 switch (BuiltinName[17]) { // "__sync_fetch_and_" 10289 case 'n': 10290 if (!memcmp(BuiltinName+18, "and", 3)) 10291 IntrinsicID = Intrinsic::atomic_load_nand; 10292 break; 10293 case 'u': 10294 if (!memcmp(BuiltinName+18, "m", 1)) { 10295 switch (BuiltinName[19]) { // "__sync_fetch_and_um" 10296 case 'a': 10297 if (!memcmp(BuiltinName+20, "x", 1)) 10298 IntrinsicID = Intrinsic::atomic_load_umax; 10299 break; 10300 case 'i': 10301 if (!memcmp(BuiltinName+20, "n", 1)) 10302 IntrinsicID = Intrinsic::atomic_load_umin; 10303 break; 10304 } 10305 } 10306 break; 10307 } 10308 } 10309 break; 10310 } 10311 } 10312 break; 10313 case 23: 10314 if (!memcmp(BuiltinName, "__builtin_stack_restore", 23)) 10315 IntrinsicID = Intrinsic::stackrestore; 10316 break; 10317 case 24: 10318 if (!memcmp(BuiltinName, "__sync_lock_test_and_set", 24)) 10319 IntrinsicID = Intrinsic::atomic_swap; 10320 break; 10321 case 25: 10322 if (!memcmp(BuiltinName, "__builtin_init_trampoline", 25)) 10323 IntrinsicID = Intrinsic::init_trampoline; 10324 break; 10325 case 27: 10326 if (!memcmp(BuiltinName, "__sync_val_compare_and_swap", 27)) 10327 IntrinsicID = Intrinsic::atomic_cmp_swap; 10328 break; 10329 case 29: 10330 if (!memcmp(BuiltinName, "__builtin_llvm_memory_barrier", 29)) 10331 IntrinsicID = Intrinsic::memory_barrier; 10332 break; 10333 } 10334 } 10335 if (!strcmp(TargetPrefix, "alpha")) { 10336 switch (strlen(BuiltinName)) { 10337 default: break; 10338 case 21: 10339 if (!memcmp(BuiltinName, "__builtin_alpha_umulh", 21)) 10340 IntrinsicID = Intrinsic::alpha_umulh; 10341 break; 10342 } 10343 } 10344 if (!strcmp(TargetPrefix, "arm")) { 10345 switch (strlen(BuiltinName)) { 10346 default: break; 10347 case 18: 10348 if (!memcmp(BuiltinName, "__builtin_arm_", 14)) { 10349 switch (BuiltinName[14]) { // "__builtin_arm_" 10350 case 'q': 10351 switch (BuiltinName[15]) { // "__builtin_arm_q" 10352 case 'a': 10353 if (!memcmp(BuiltinName+16, "dd", 2)) 10354 IntrinsicID = Intrinsic::arm_qadd; 10355 break; 10356 case 's': 10357 if (!memcmp(BuiltinName+16, "ub", 2)) 10358 IntrinsicID = Intrinsic::arm_qsub; 10359 break; 10360 } 10361 break; 10362 case 's': 10363 if (!memcmp(BuiltinName+15, "sat", 3)) 10364 IntrinsicID = Intrinsic::arm_ssat; 10365 break; 10366 case 'u': 10367 if (!memcmp(BuiltinName+15, "sat", 3)) 10368 IntrinsicID = Intrinsic::arm_usat; 10369 break; 10370 } 10371 } 10372 break; 10373 case 23: 10374 if (!memcmp(BuiltinName, "__builtin_arm_", 14)) { 10375 switch (BuiltinName[14]) { // "__builtin_arm_" 10376 case 'g': 10377 if (!memcmp(BuiltinName+15, "et_fpscr", 8)) 10378 IntrinsicID = Intrinsic::arm_get_fpscr; 10379 break; 10380 case 's': 10381 if (!memcmp(BuiltinName+15, "et_fpscr", 8)) 10382 IntrinsicID = Intrinsic::arm_set_fpscr; 10383 break; 10384 } 10385 } 10386 break; 10387 case 24: 10388 if (!memcmp(BuiltinName, "__builtin_thread_pointer", 24)) 10389 IntrinsicID = Intrinsic::arm_thread_pointer; 10390 break; 10391 } 10392 } 10393 if (!strcmp(TargetPrefix, "ppc")) { 10394 switch (strlen(BuiltinName)) { 10395 default: break; 10396 case 21: 10397 if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) { 10398 switch (BuiltinName[18]) { // "__builtin_altivec_" 10399 case 'd': 10400 if (!memcmp(BuiltinName+19, "s", 1)) { 10401 switch (BuiltinName[20]) { // "__builtin_altivec_ds" 10402 case 's': 10403 IntrinsicID = Intrinsic::ppc_altivec_dss; 10404 break; 10405 case 't': 10406 IntrinsicID = Intrinsic::ppc_altivec_dst; 10407 break; 10408 } 10409 } 10410 break; 10411 case 'v': 10412 if (!memcmp(BuiltinName+19, "s", 1)) { 10413 switch (BuiltinName[20]) { // "__builtin_altivec_vs" 10414 case 'l': 10415 IntrinsicID = Intrinsic::ppc_altivec_vsl; 10416 break; 10417 case 'r': 10418 IntrinsicID = Intrinsic::ppc_altivec_vsr; 10419 break; 10420 } 10421 } 10422 break; 10423 } 10424 } 10425 break; 10426 case 22: 10427 if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) { 10428 switch (BuiltinName[18]) { // "__builtin_altivec_" 10429 case 'd': 10430 if (!memcmp(BuiltinName+19, "stt", 3)) 10431 IntrinsicID = Intrinsic::ppc_altivec_dstt; 10432 break; 10433 case 'v': 10434 switch (BuiltinName[19]) { // "__builtin_altivec_v" 10435 case 'r': 10436 if (!memcmp(BuiltinName+20, "l", 1)) { 10437 switch (BuiltinName[21]) { // "__builtin_altivec_vrl" 10438 case 'b': 10439 IntrinsicID = Intrinsic::ppc_altivec_vrlb; 10440 break; 10441 case 'h': 10442 IntrinsicID = Intrinsic::ppc_altivec_vrlh; 10443 break; 10444 case 'w': 10445 IntrinsicID = Intrinsic::ppc_altivec_vrlw; 10446 break; 10447 } 10448 } 10449 break; 10450 case 's': 10451 switch (BuiltinName[20]) { // "__builtin_altivec_vs" 10452 case 'l': 10453 switch (BuiltinName[21]) { // "__builtin_altivec_vsl" 10454 case 'b': 10455 IntrinsicID = Intrinsic::ppc_altivec_vslb; 10456 break; 10457 case 'h': 10458 IntrinsicID = Intrinsic::ppc_altivec_vslh; 10459 break; 10460 case 'o': 10461 IntrinsicID = Intrinsic::ppc_altivec_vslo; 10462 break; 10463 case 'w': 10464 IntrinsicID = Intrinsic::ppc_altivec_vslw; 10465 break; 10466 } 10467 break; 10468 case 'r': 10469 switch (BuiltinName[21]) { // "__builtin_altivec_vsr" 10470 case 'b': 10471 IntrinsicID = Intrinsic::ppc_altivec_vsrb; 10472 break; 10473 case 'h': 10474 IntrinsicID = Intrinsic::ppc_altivec_vsrh; 10475 break; 10476 case 'o': 10477 IntrinsicID = Intrinsic::ppc_altivec_vsro; 10478 break; 10479 case 'w': 10480 IntrinsicID = Intrinsic::ppc_altivec_vsrw; 10481 break; 10482 } 10483 break; 10484 } 10485 break; 10486 } 10487 break; 10488 } 10489 } 10490 break; 10491 case 23: 10492 if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) { 10493 switch (BuiltinName[18]) { // "__builtin_altivec_" 10494 case 'd': 10495 if (!memcmp(BuiltinName+19, "stst", 4)) 10496 IntrinsicID = Intrinsic::ppc_altivec_dstst; 10497 break; 10498 case 'v': 10499 switch (BuiltinName[19]) { // "__builtin_altivec_v" 10500 case 'c': 10501 if (!memcmp(BuiltinName+20, "f", 1)) { 10502 switch (BuiltinName[21]) { // "__builtin_altivec_vcf" 10503 case 's': 10504 if (!memcmp(BuiltinName+22, "x", 1)) 10505 IntrinsicID = Intrinsic::ppc_altivec_vcfsx; 10506 break; 10507 case 'u': 10508 if (!memcmp(BuiltinName+22, "x", 1)) 10509 IntrinsicID = Intrinsic::ppc_altivec_vcfux; 10510 break; 10511 } 10512 } 10513 break; 10514 case 'p': 10515 if (!memcmp(BuiltinName+20, "kpx", 3)) 10516 IntrinsicID = Intrinsic::ppc_altivec_vpkpx; 10517 break; 10518 case 'r': 10519 switch (BuiltinName[20]) { // "__builtin_altivec_vr" 10520 case 'e': 10521 if (!memcmp(BuiltinName+21, "fp", 2)) 10522 IntrinsicID = Intrinsic::ppc_altivec_vrefp; 10523 break; 10524 case 'f': 10525 if (!memcmp(BuiltinName+21, "i", 1)) { 10526 switch (BuiltinName[22]) { // "__builtin_altivec_vrfi" 10527 case 'm': 10528 IntrinsicID = Intrinsic::ppc_altivec_vrfim; 10529 break; 10530 case 'n': 10531 IntrinsicID = Intrinsic::ppc_altivec_vrfin; 10532 break; 10533 case 'p': 10534 IntrinsicID = Intrinsic::ppc_altivec_vrfip; 10535 break; 10536 case 'z': 10537 IntrinsicID = Intrinsic::ppc_altivec_vrfiz; 10538 break; 10539 } 10540 } 10541 break; 10542 } 10543 break; 10544 case 's': 10545 if (!memcmp(BuiltinName+20, "ra", 2)) { 10546 switch (BuiltinName[22]) { // "__builtin_altivec_vsra" 10547 case 'b': 10548 IntrinsicID = Intrinsic::ppc_altivec_vsrab; 10549 break; 10550 case 'h': 10551 IntrinsicID = Intrinsic::ppc_altivec_vsrah; 10552 break; 10553 case 'w': 10554 IntrinsicID = Intrinsic::ppc_altivec_vsraw; 10555 break; 10556 } 10557 } 10558 break; 10559 } 10560 break; 10561 } 10562 } 10563 break; 10564 case 24: 10565 if (!memcmp(BuiltinName, "__builtin_altivec_", 18)) { 10566 switch (BuiltinName[18]) { // "__builtin_altivec_" 10567 case 'd': 10568 if (!memcmp(BuiltinName+19, "s", 1)) { 10569 switch (BuiltinName[20]) { // "__builtin_altivec_ds" 10570 case 's': 10571 if (!memcmp(BuiltinName+21, "all", 3)) 10572 IntrinsicID = Intrinsic::ppc_altivec_dssall; 10573 break; 10574 case 't': 10575 if (!memcmp(BuiltinName+21, "stt", 3)) 10576 IntrinsicID = Intrinsic::ppc_altivec_dststt; 10577 break; 10578 } 10579 } 10580 break; 10581 case 'm': 10582 switch (BuiltinName[19]) { // "__builtin_altivec_m" 10583 case 'f': 10584 if (!memcmp(BuiltinName+20, "vscr", 4)) 10585 IntrinsicID = Intrinsic::ppc_altivec_mfvscr; 10586 break; 10587 case 't': 10588 if (!memcmp(BuiltinName+20, "vscr", 4)) 10589 IntrinsicID = Intrinsic::ppc_altivec_mtvscr; 10590 break; 10591 } 10592 break; 10593 case 'v': 10594 switch (BuiltinName[19]) { // "__builtin_altivec_v" 10595 case 'a': 10596 if (!memcmp(BuiltinName+20, "vg", 2)) { 10597 switch (BuiltinName[22]) { // "__builtin_altivec_vavg" 10598 case 's': 10599 switch (BuiltinName[23]) { // "__builtin_altivec_vavgs" 10600 case 'b': 10601 IntrinsicID = Intrinsic::ppc_altivec_vavgsb; 10602 break; 10603 case 'h': 10604 IntrinsicID = Intrinsic::ppc_altivec_vavgsh; 10605 break; 10606 case 'w': 10607 IntrinsicID = Intrinsic::ppc_altivec_vavgsw; 10608 break; 10609 } 10610 break; 10611 case 'u': 10612 switch (BuiltinName[23]) { // "__builtin_altivec_vavgu" 10613 case 'b': 10614 IntrinsicID = Intrinsic::ppc_altivec_vavgub; 10615 break; 10616 case 'h': 10617 IntrinsicID = Intrinsic::ppc_altivec_vavguh; 10618 break; 10619 case 'w': 10620 IntrinsicID = Intrinsic::ppc_altivec_vavguw; 10621 break; 10622 } 10623 break; 10624 } 10625 } 10626 break; 10627 case 'c': 10628 if (!memcmp(BuiltinName+20, "t", 1)) { 10629 switch (BuiltinName[21]) { // "__builtin_altivec_vct" 10630 case 's': 10631 if (!memcmp(BuiltinName+22, "xs", 2)) 10632 IntrinsicID = Intrinsic::ppc_altivec_vctsxs; 10633 break; 10634 case 'u': 10635 if (!memcmp(BuiltinName+22, "xs", 2)) 10636 IntrinsicID = Intrinsic::ppc_altivec_vctuxs; 10637 break; 10638 } 10639 } 10640 break; 10641 case 'm': 10642 switch (BuiltinName[20]) { // "__builtin_altivec_vm" 10643 case 'a': 10644 if (!memcmp(BuiltinName+21, "x", 1)) { 10645 switch (BuiltinName[22]) { // "__builtin_altivec_vmax" 10646 case 'f': 10647 if (!memcmp(BuiltinName+23, "p", 1)) 10648 IntrinsicID = Intrinsic::ppc_altivec_vmaxfp; 10649 break; 10650 case 's': 10651 switch (BuiltinName[23]) { // "__builtin_altivec_vmaxs" 10652 case 'b': 10653 IntrinsicID = Intrinsic::ppc_altivec_vmaxsb; 10654 break; 10655 case 'h': 10656 IntrinsicID = Intrinsic::ppc_altivec_vmaxsh; 10657 break; 10658 case 'w': 10659 IntrinsicID = Intrinsic::ppc_altivec_vmaxsw; 10660 break; 10661 } 10662 break; 10663 case 'u': 10664 switch (BuiltinName[23]) { // "__builtin_altivec_vmaxu" 10665 case 'b': 10666 IntrinsicID = Intrinsic::ppc_altivec_vmaxub; 10667 break; 10668 case 'h': 10669 IntrinsicID = Intrinsic::ppc_altivec_vmaxuh; 10670 break; 10671 case 'w': 10672 IntrinsicID = Intrinsic::ppc_altivec_vmaxuw; 10673 break; 10674 } 10675 break; 10676 } 10677 } 10678 break; 10679 case 'i': 10680 if (!memcmp(BuiltinName+21, "n", 1)) { 10681 switch (BuiltinName[22]) { // "__builtin_altivec_vmin" 10682 case 'f': 10683 if (!memcmp(BuiltinName+23, "p", 1)) 10684 IntrinsicID = Intrinsic::ppc_altivec_vminfp; 10685 break; 10686 case 's': 10687 switch (BuiltinName[23]) { // "__builtin_altivec_vmins" 10688 case 'b': 10689 IntrinsicID = Intrinsic::ppc_altivec_vminsb; 10690 break; 10691 case 'h': 10692 IntrinsicID = Intrinsic::ppc_altivec_vminsh; 10693 break; 10694 case 'w': 10695 IntrinsicID = Intrinsic::ppc_altivec_vminsw; 10696 break; 10697 } 10698 break; 10699 case 'u': 10700 switch (BuiltinName[23]) { // "__builtin_altivec_vminu" 10701 case 'b': 10702 IntrinsicID = Intrinsic::ppc_altivec_vminub; 10703 break; 10704 case 'h': 10705 IntrinsicID = Intrinsic::ppc_altivec_vminuh; 10706 break; 10707 case 'w': 10708 IntrinsicID = Intrinsic::ppc_altivec_vminuw; 10709 break; 10710 } 10711 break; 10712 } 10713 } 10714 break; 10715 } 10716 break; 10717 } 10718 break; 10719 } 10720 } 10721 break; 10722 case 25: 10723 if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) { 10724 switch (BuiltinName[19]) { // "__builtin_altivec_v" 10725 case 'a': 10726 if (!memcmp(BuiltinName+20, "dd", 2)) { 10727 switch (BuiltinName[22]) { // "__builtin_altivec_vadd" 10728 case 'c': 10729 if (!memcmp(BuiltinName+23, "uw", 2)) 10730 IntrinsicID = Intrinsic::ppc_altivec_vaddcuw; 10731 break; 10732 case 's': 10733 switch (BuiltinName[23]) { // "__builtin_altivec_vadds" 10734 case 'b': 10735 if (!memcmp(BuiltinName+24, "s", 1)) 10736 IntrinsicID = Intrinsic::ppc_altivec_vaddsbs; 10737 break; 10738 case 'h': 10739 if (!memcmp(BuiltinName+24, "s", 1)) 10740 IntrinsicID = Intrinsic::ppc_altivec_vaddshs; 10741 break; 10742 case 'w': 10743 if (!memcmp(BuiltinName+24, "s", 1)) 10744 IntrinsicID = Intrinsic::ppc_altivec_vaddsws; 10745 break; 10746 } 10747 break; 10748 case 'u': 10749 switch (BuiltinName[23]) { // "__builtin_altivec_vaddu" 10750 case 'b': 10751 if (!memcmp(BuiltinName+24, "s", 1)) 10752 IntrinsicID = Intrinsic::ppc_altivec_vaddubs; 10753 break; 10754 case 'h': 10755 if (!memcmp(BuiltinName+24, "s", 1)) 10756 IntrinsicID = Intrinsic::ppc_altivec_vadduhs; 10757 break; 10758 case 'w': 10759 if (!memcmp(BuiltinName+24, "s", 1)) 10760 IntrinsicID = Intrinsic::ppc_altivec_vadduws; 10761 break; 10762 } 10763 break; 10764 } 10765 } 10766 break; 10767 case 'c': 10768 if (!memcmp(BuiltinName+20, "mpbfp", 5)) 10769 IntrinsicID = Intrinsic::ppc_altivec_vcmpbfp; 10770 break; 10771 case 'l': 10772 if (!memcmp(BuiltinName+20, "ogefp", 5)) 10773 IntrinsicID = Intrinsic::ppc_altivec_vlogefp; 10774 break; 10775 case 'm': 10776 switch (BuiltinName[20]) { // "__builtin_altivec_vm" 10777 case 'a': 10778 if (!memcmp(BuiltinName+21, "ddfp", 4)) 10779 IntrinsicID = Intrinsic::ppc_altivec_vmaddfp; 10780 break; 10781 case 'u': 10782 if (!memcmp(BuiltinName+21, "l", 1)) { 10783 switch (BuiltinName[22]) { // "__builtin_altivec_vmul" 10784 case 'e': 10785 switch (BuiltinName[23]) { // "__builtin_altivec_vmule" 10786 case 's': 10787 switch (BuiltinName[24]) { // "__builtin_altivec_vmules" 10788 case 'b': 10789 IntrinsicID = Intrinsic::ppc_altivec_vmulesb; 10790 break; 10791 case 'h': 10792 IntrinsicID = Intrinsic::ppc_altivec_vmulesh; 10793 break; 10794 } 10795 break; 10796 case 'u': 10797 switch (BuiltinName[24]) { // "__builtin_altivec_vmuleu" 10798 case 'b': 10799 IntrinsicID = Intrinsic::ppc_altivec_vmuleub; 10800 break; 10801 case 'h': 10802 IntrinsicID = Intrinsic::ppc_altivec_vmuleuh; 10803 break; 10804 } 10805 break; 10806 } 10807 break; 10808 case 'o': 10809 switch (BuiltinName[23]) { // "__builtin_altivec_vmulo" 10810 case 's': 10811 switch (BuiltinName[24]) { // "__builtin_altivec_vmulos" 10812 case 'b': 10813 IntrinsicID = Intrinsic::ppc_altivec_vmulosb; 10814 break; 10815 case 'h': 10816 IntrinsicID = Intrinsic::ppc_altivec_vmulosh; 10817 break; 10818 } 10819 break; 10820 case 'u': 10821 switch (BuiltinName[24]) { // "__builtin_altivec_vmulou" 10822 case 'b': 10823 IntrinsicID = Intrinsic::ppc_altivec_vmuloub; 10824 break; 10825 case 'h': 10826 IntrinsicID = Intrinsic::ppc_altivec_vmulouh; 10827 break; 10828 } 10829 break; 10830 } 10831 break; 10832 } 10833 } 10834 break; 10835 } 10836 break; 10837 case 'p': 10838 if (!memcmp(BuiltinName+20, "k", 1)) { 10839 switch (BuiltinName[21]) { // "__builtin_altivec_vpk" 10840 case 's': 10841 switch (BuiltinName[22]) { // "__builtin_altivec_vpks" 10842 case 'h': 10843 switch (BuiltinName[23]) { // "__builtin_altivec_vpksh" 10844 case 's': 10845 if (!memcmp(BuiltinName+24, "s", 1)) 10846 IntrinsicID = Intrinsic::ppc_altivec_vpkshss; 10847 break; 10848 case 'u': 10849 if (!memcmp(BuiltinName+24, "s", 1)) 10850 IntrinsicID = Intrinsic::ppc_altivec_vpkshus; 10851 break; 10852 } 10853 break; 10854 case 'w': 10855 switch (BuiltinName[23]) { // "__builtin_altivec_vpksw" 10856 case 's': 10857 if (!memcmp(BuiltinName+24, "s", 1)) 10858 IntrinsicID = Intrinsic::ppc_altivec_vpkswss; 10859 break; 10860 case 'u': 10861 if (!memcmp(BuiltinName+24, "s", 1)) 10862 IntrinsicID = Intrinsic::ppc_altivec_vpkswus; 10863 break; 10864 } 10865 break; 10866 } 10867 break; 10868 case 'u': 10869 switch (BuiltinName[22]) { // "__builtin_altivec_vpku" 10870 case 'h': 10871 if (!memcmp(BuiltinName+23, "us", 2)) 10872 IntrinsicID = Intrinsic::ppc_altivec_vpkuhus; 10873 break; 10874 case 'w': 10875 if (!memcmp(BuiltinName+23, "us", 2)) 10876 IntrinsicID = Intrinsic::ppc_altivec_vpkuwus; 10877 break; 10878 } 10879 break; 10880 } 10881 } 10882 break; 10883 case 's': 10884 if (!memcmp(BuiltinName+20, "u", 1)) { 10885 switch (BuiltinName[21]) { // "__builtin_altivec_vsu" 10886 case 'b': 10887 switch (BuiltinName[22]) { // "__builtin_altivec_vsub" 10888 case 'c': 10889 if (!memcmp(BuiltinName+23, "uw", 2)) 10890 IntrinsicID = Intrinsic::ppc_altivec_vsubcuw; 10891 break; 10892 case 's': 10893 switch (BuiltinName[23]) { // "__builtin_altivec_vsubs" 10894 case 'b': 10895 if (!memcmp(BuiltinName+24, "s", 1)) 10896 IntrinsicID = Intrinsic::ppc_altivec_vsubsbs; 10897 break; 10898 case 'h': 10899 if (!memcmp(BuiltinName+24, "s", 1)) 10900 IntrinsicID = Intrinsic::ppc_altivec_vsubshs; 10901 break; 10902 case 'w': 10903 if (!memcmp(BuiltinName+24, "s", 1)) 10904 IntrinsicID = Intrinsic::ppc_altivec_vsubsws; 10905 break; 10906 } 10907 break; 10908 case 'u': 10909 switch (BuiltinName[23]) { // "__builtin_altivec_vsubu" 10910 case 'b': 10911 if (!memcmp(BuiltinName+24, "s", 1)) 10912 IntrinsicID = Intrinsic::ppc_altivec_vsububs; 10913 break; 10914 case 'h': 10915 if (!memcmp(BuiltinName+24, "s", 1)) 10916 IntrinsicID = Intrinsic::ppc_altivec_vsubuhs; 10917 break; 10918 case 'w': 10919 if (!memcmp(BuiltinName+24, "s", 1)) 10920 IntrinsicID = Intrinsic::ppc_altivec_vsubuws; 10921 break; 10922 } 10923 break; 10924 } 10925 break; 10926 case 'm': 10927 if (!memcmp(BuiltinName+22, "sws", 3)) 10928 IntrinsicID = Intrinsic::ppc_altivec_vsumsws; 10929 break; 10930 } 10931 } 10932 break; 10933 case 'u': 10934 if (!memcmp(BuiltinName+20, "pk", 2)) { 10935 switch (BuiltinName[22]) { // "__builtin_altivec_vupk" 10936 case 'h': 10937 switch (BuiltinName[23]) { // "__builtin_altivec_vupkh" 10938 case 'p': 10939 if (!memcmp(BuiltinName+24, "x", 1)) 10940 IntrinsicID = Intrinsic::ppc_altivec_vupkhpx; 10941 break; 10942 case 's': 10943 switch (BuiltinName[24]) { // "__builtin_altivec_vupkhs" 10944 case 'b': 10945 IntrinsicID = Intrinsic::ppc_altivec_vupkhsb; 10946 break; 10947 case 'h': 10948 IntrinsicID = Intrinsic::ppc_altivec_vupkhsh; 10949 break; 10950 } 10951 break; 10952 } 10953 break; 10954 case 'l': 10955 switch (BuiltinName[23]) { // "__builtin_altivec_vupkl" 10956 case 'p': 10957 if (!memcmp(BuiltinName+24, "x", 1)) 10958 IntrinsicID = Intrinsic::ppc_altivec_vupklpx; 10959 break; 10960 case 's': 10961 switch (BuiltinName[24]) { // "__builtin_altivec_vupkls" 10962 case 'b': 10963 IntrinsicID = Intrinsic::ppc_altivec_vupklsb; 10964 break; 10965 case 'h': 10966 IntrinsicID = Intrinsic::ppc_altivec_vupklsh; 10967 break; 10968 } 10969 break; 10970 } 10971 break; 10972 } 10973 } 10974 break; 10975 } 10976 } 10977 break; 10978 case 26: 10979 if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) { 10980 switch (BuiltinName[19]) { // "__builtin_altivec_v" 10981 case 'c': 10982 if (!memcmp(BuiltinName+20, "mp", 2)) { 10983 switch (BuiltinName[22]) { // "__builtin_altivec_vcmp" 10984 case 'e': 10985 if (!memcmp(BuiltinName+23, "q", 1)) { 10986 switch (BuiltinName[24]) { // "__builtin_altivec_vcmpeq" 10987 case 'f': 10988 if (!memcmp(BuiltinName+25, "p", 1)) 10989 IntrinsicID = Intrinsic::ppc_altivec_vcmpeqfp; 10990 break; 10991 case 'u': 10992 switch (BuiltinName[25]) { // "__builtin_altivec_vcmpequ" 10993 case 'b': 10994 IntrinsicID = Intrinsic::ppc_altivec_vcmpequb; 10995 break; 10996 case 'h': 10997 IntrinsicID = Intrinsic::ppc_altivec_vcmpequh; 10998 break; 10999 case 'w': 11000 IntrinsicID = Intrinsic::ppc_altivec_vcmpequw; 11001 break; 11002 } 11003 break; 11004 } 11005 } 11006 break; 11007 case 'g': 11008 switch (BuiltinName[23]) { // "__builtin_altivec_vcmpg" 11009 case 'e': 11010 if (!memcmp(BuiltinName+24, "fp", 2)) 11011 IntrinsicID = Intrinsic::ppc_altivec_vcmpgefp; 11012 break; 11013 case 't': 11014 switch (BuiltinName[24]) { // "__builtin_altivec_vcmpgt" 11015 case 'f': 11016 if (!memcmp(BuiltinName+25, "p", 1)) 11017 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtfp; 11018 break; 11019 case 's': 11020 switch (BuiltinName[25]) { // "__builtin_altivec_vcmpgts" 11021 case 'b': 11022 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsb; 11023 break; 11024 case 'h': 11025 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsh; 11026 break; 11027 case 'w': 11028 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsw; 11029 break; 11030 } 11031 break; 11032 case 'u': 11033 switch (BuiltinName[25]) { // "__builtin_altivec_vcmpgtu" 11034 case 'b': 11035 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtub; 11036 break; 11037 case 'h': 11038 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuh; 11039 break; 11040 case 'w': 11041 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuw; 11042 break; 11043 } 11044 break; 11045 } 11046 break; 11047 } 11048 break; 11049 } 11050 } 11051 break; 11052 case 'e': 11053 if (!memcmp(BuiltinName+20, "xptefp", 6)) 11054 IntrinsicID = Intrinsic::ppc_altivec_vexptefp; 11055 break; 11056 case 'm': 11057 if (!memcmp(BuiltinName+20, "sum", 3)) { 11058 switch (BuiltinName[23]) { // "__builtin_altivec_vmsum" 11059 case 'm': 11060 if (!memcmp(BuiltinName+24, "bm", 2)) 11061 IntrinsicID = Intrinsic::ppc_altivec_vmsummbm; 11062 break; 11063 case 's': 11064 if (!memcmp(BuiltinName+24, "h", 1)) { 11065 switch (BuiltinName[25]) { // "__builtin_altivec_vmsumsh" 11066 case 'm': 11067 IntrinsicID = Intrinsic::ppc_altivec_vmsumshm; 11068 break; 11069 case 's': 11070 IntrinsicID = Intrinsic::ppc_altivec_vmsumshs; 11071 break; 11072 } 11073 } 11074 break; 11075 case 'u': 11076 switch (BuiltinName[24]) { // "__builtin_altivec_vmsumu" 11077 case 'b': 11078 if (!memcmp(BuiltinName+25, "m", 1)) 11079 IntrinsicID = Intrinsic::ppc_altivec_vmsumubm; 11080 break; 11081 case 'h': 11082 switch (BuiltinName[25]) { // "__builtin_altivec_vmsumuh" 11083 case 'm': 11084 IntrinsicID = Intrinsic::ppc_altivec_vmsumuhm; 11085 break; 11086 case 's': 11087 IntrinsicID = Intrinsic::ppc_altivec_vmsumuhs; 11088 break; 11089 } 11090 break; 11091 } 11092 break; 11093 } 11094 } 11095 break; 11096 case 'n': 11097 if (!memcmp(BuiltinName+20, "msubfp", 6)) 11098 IntrinsicID = Intrinsic::ppc_altivec_vnmsubfp; 11099 break; 11100 case 's': 11101 switch (BuiltinName[20]) { // "__builtin_altivec_vs" 11102 case 'e': 11103 if (!memcmp(BuiltinName+21, "l_4si", 5)) 11104 IntrinsicID = Intrinsic::ppc_altivec_vsel; 11105 break; 11106 case 'u': 11107 if (!memcmp(BuiltinName+21, "m", 1)) { 11108 switch (BuiltinName[22]) { // "__builtin_altivec_vsum" 11109 case '2': 11110 if (!memcmp(BuiltinName+23, "sws", 3)) 11111 IntrinsicID = Intrinsic::ppc_altivec_vsum2sws; 11112 break; 11113 case '4': 11114 switch (BuiltinName[23]) { // "__builtin_altivec_vsum4" 11115 case 's': 11116 switch (BuiltinName[24]) { // "__builtin_altivec_vsum4s" 11117 case 'b': 11118 if (!memcmp(BuiltinName+25, "s", 1)) 11119 IntrinsicID = Intrinsic::ppc_altivec_vsum4sbs; 11120 break; 11121 case 'h': 11122 if (!memcmp(BuiltinName+25, "s", 1)) 11123 IntrinsicID = Intrinsic::ppc_altivec_vsum4shs; 11124 break; 11125 } 11126 break; 11127 case 'u': 11128 if (!memcmp(BuiltinName+24, "bs", 2)) 11129 IntrinsicID = Intrinsic::ppc_altivec_vsum4ubs; 11130 break; 11131 } 11132 break; 11133 } 11134 } 11135 break; 11136 } 11137 break; 11138 } 11139 } 11140 break; 11141 case 27: 11142 if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) { 11143 switch (BuiltinName[19]) { // "__builtin_altivec_v" 11144 case 'c': 11145 if (!memcmp(BuiltinName+20, "mpbfp_p", 7)) 11146 IntrinsicID = Intrinsic::ppc_altivec_vcmpbfp_p; 11147 break; 11148 case 'm': 11149 switch (BuiltinName[20]) { // "__builtin_altivec_vm" 11150 case 'h': 11151 if (!memcmp(BuiltinName+21, "addshs", 6)) 11152 IntrinsicID = Intrinsic::ppc_altivec_vmhaddshs; 11153 break; 11154 case 'l': 11155 if (!memcmp(BuiltinName+21, "adduhm", 6)) 11156 IntrinsicID = Intrinsic::ppc_altivec_vmladduhm; 11157 break; 11158 } 11159 break; 11160 case 'p': 11161 if (!memcmp(BuiltinName+20, "erm_4si", 7)) 11162 IntrinsicID = Intrinsic::ppc_altivec_vperm; 11163 break; 11164 case 'r': 11165 if (!memcmp(BuiltinName+20, "sqrtefp", 7)) 11166 IntrinsicID = Intrinsic::ppc_altivec_vrsqrtefp; 11167 break; 11168 } 11169 } 11170 break; 11171 case 28: 11172 if (!memcmp(BuiltinName, "__builtin_altivec_v", 19)) { 11173 switch (BuiltinName[19]) { // "__builtin_altivec_v" 11174 case 'c': 11175 if (!memcmp(BuiltinName+20, "mp", 2)) { 11176 switch (BuiltinName[22]) { // "__builtin_altivec_vcmp" 11177 case 'e': 11178 if (!memcmp(BuiltinName+23, "q", 1)) { 11179 switch (BuiltinName[24]) { // "__builtin_altivec_vcmpeq" 11180 case 'f': 11181 if (!memcmp(BuiltinName+25, "p_p", 3)) 11182 IntrinsicID = Intrinsic::ppc_altivec_vcmpeqfp_p; 11183 break; 11184 case 'u': 11185 switch (BuiltinName[25]) { // "__builtin_altivec_vcmpequ" 11186 case 'b': 11187 if (!memcmp(BuiltinName+26, "_p", 2)) 11188 IntrinsicID = Intrinsic::ppc_altivec_vcmpequb_p; 11189 break; 11190 case 'h': 11191 if (!memcmp(BuiltinName+26, "_p", 2)) 11192 IntrinsicID = Intrinsic::ppc_altivec_vcmpequh_p; 11193 break; 11194 case 'w': 11195 if (!memcmp(BuiltinName+26, "_p", 2)) 11196 IntrinsicID = Intrinsic::ppc_altivec_vcmpequw_p; 11197 break; 11198 } 11199 break; 11200 } 11201 } 11202 break; 11203 case 'g': 11204 switch (BuiltinName[23]) { // "__builtin_altivec_vcmpg" 11205 case 'e': 11206 if (!memcmp(BuiltinName+24, "fp_p", 4)) 11207 IntrinsicID = Intrinsic::ppc_altivec_vcmpgefp_p; 11208 break; 11209 case 't': 11210 switch (BuiltinName[24]) { // "__builtin_altivec_vcmpgt" 11211 case 'f': 11212 if (!memcmp(BuiltinName+25, "p_p", 3)) 11213 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtfp_p; 11214 break; 11215 case 's': 11216 switch (BuiltinName[25]) { // "__builtin_altivec_vcmpgts" 11217 case 'b': 11218 if (!memcmp(BuiltinName+26, "_p", 2)) 11219 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsb_p; 11220 break; 11221 case 'h': 11222 if (!memcmp(BuiltinName+26, "_p", 2)) 11223 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsh_p; 11224 break; 11225 case 'w': 11226 if (!memcmp(BuiltinName+26, "_p", 2)) 11227 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtsw_p; 11228 break; 11229 } 11230 break; 11231 case 'u': 11232 switch (BuiltinName[25]) { // "__builtin_altivec_vcmpgtu" 11233 case 'b': 11234 if (!memcmp(BuiltinName+26, "_p", 2)) 11235 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtub_p; 11236 break; 11237 case 'h': 11238 if (!memcmp(BuiltinName+26, "_p", 2)) 11239 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuh_p; 11240 break; 11241 case 'w': 11242 if (!memcmp(BuiltinName+26, "_p", 2)) 11243 IntrinsicID = Intrinsic::ppc_altivec_vcmpgtuw_p; 11244 break; 11245 } 11246 break; 11247 } 11248 break; 11249 } 11250 break; 11251 } 11252 } 11253 break; 11254 case 'm': 11255 if (!memcmp(BuiltinName+20, "hraddshs", 8)) 11256 IntrinsicID = Intrinsic::ppc_altivec_vmhraddshs; 11257 break; 11258 } 11259 } 11260 break; 11261 } 11262 } 11263 if (!strcmp(TargetPrefix, "spu")) { 11264 switch (strlen(BuiltinName)) { 11265 default: break; 11266 case 14: 11267 if (!memcmp(BuiltinName, "__builtin_si_a", 14)) 11268 IntrinsicID = Intrinsic::spu_si_a; 11269 break; 11270 case 15: 11271 if (!memcmp(BuiltinName, "__builtin_si_", 13)) { 11272 switch (BuiltinName[13]) { // "__builtin_si_" 11273 case 'a': 11274 switch (BuiltinName[14]) { // "__builtin_si_a" 11275 case 'h': 11276 IntrinsicID = Intrinsic::spu_si_ah; 11277 break; 11278 case 'i': 11279 IntrinsicID = Intrinsic::spu_si_ai; 11280 break; 11281 } 11282 break; 11283 case 'b': 11284 if (!memcmp(BuiltinName+14, "g", 1)) 11285 IntrinsicID = Intrinsic::spu_si_bg; 11286 break; 11287 case 'c': 11288 if (!memcmp(BuiltinName+14, "g", 1)) 11289 IntrinsicID = Intrinsic::spu_si_cg; 11290 break; 11291 case 'f': 11292 switch (BuiltinName[14]) { // "__builtin_si_f" 11293 case 'a': 11294 IntrinsicID = Intrinsic::spu_si_fa; 11295 break; 11296 case 'm': 11297 IntrinsicID = Intrinsic::spu_si_fm; 11298 break; 11299 case 's': 11300 IntrinsicID = Intrinsic::spu_si_fs; 11301 break; 11302 } 11303 break; 11304 case 'o': 11305 if (!memcmp(BuiltinName+14, "r", 1)) 11306 IntrinsicID = Intrinsic::spu_si_or; 11307 break; 11308 case 's': 11309 if (!memcmp(BuiltinName+14, "f", 1)) 11310 IntrinsicID = Intrinsic::spu_si_sf; 11311 break; 11312 } 11313 } 11314 break; 11315 case 16: 11316 if (!memcmp(BuiltinName, "__builtin_si_", 13)) { 11317 switch (BuiltinName[13]) { // "__builtin_si_" 11318 case 'a': 11319 switch (BuiltinName[14]) { // "__builtin_si_a" 11320 case 'h': 11321 if (!memcmp(BuiltinName+15, "i", 1)) 11322 IntrinsicID = Intrinsic::spu_si_ahi; 11323 break; 11324 case 'n': 11325 if (!memcmp(BuiltinName+15, "d", 1)) 11326 IntrinsicID = Intrinsic::spu_si_and; 11327 break; 11328 } 11329 break; 11330 case 'b': 11331 if (!memcmp(BuiltinName+14, "gx", 2)) 11332 IntrinsicID = Intrinsic::spu_si_bgx; 11333 break; 11334 case 'c': 11335 switch (BuiltinName[14]) { // "__builtin_si_c" 11336 case 'e': 11337 if (!memcmp(BuiltinName+15, "q", 1)) 11338 IntrinsicID = Intrinsic::spu_si_ceq; 11339 break; 11340 case 'g': 11341 switch (BuiltinName[15]) { // "__builtin_si_cg" 11342 case 't': 11343 IntrinsicID = Intrinsic::spu_si_cgt; 11344 break; 11345 case 'x': 11346 IntrinsicID = Intrinsic::spu_si_cgx; 11347 break; 11348 } 11349 break; 11350 } 11351 break; 11352 case 'd': 11353 if (!memcmp(BuiltinName+14, "f", 1)) { 11354 switch (BuiltinName[15]) { // "__builtin_si_df" 11355 case 'a': 11356 IntrinsicID = Intrinsic::spu_si_dfa; 11357 break; 11358 case 'm': 11359 IntrinsicID = Intrinsic::spu_si_dfm; 11360 break; 11361 case 's': 11362 IntrinsicID = Intrinsic::spu_si_dfs; 11363 break; 11364 } 11365 } 11366 break; 11367 case 'f': 11368 if (!memcmp(BuiltinName+14, "m", 1)) { 11369 switch (BuiltinName[15]) { // "__builtin_si_fm" 11370 case 'a': 11371 IntrinsicID = Intrinsic::spu_si_fma; 11372 break; 11373 case 's': 11374 IntrinsicID = Intrinsic::spu_si_fms; 11375 break; 11376 } 11377 } 11378 break; 11379 case 'm': 11380 if (!memcmp(BuiltinName+14, "py", 2)) 11381 IntrinsicID = Intrinsic::spu_si_mpy; 11382 break; 11383 case 'n': 11384 if (!memcmp(BuiltinName+14, "or", 2)) 11385 IntrinsicID = Intrinsic::spu_si_nor; 11386 break; 11387 case 'o': 11388 if (!memcmp(BuiltinName+14, "r", 1)) { 11389 switch (BuiltinName[15]) { // "__builtin_si_or" 11390 case 'c': 11391 IntrinsicID = Intrinsic::spu_si_orc; 11392 break; 11393 case 'i': 11394 IntrinsicID = Intrinsic::spu_si_ori; 11395 break; 11396 } 11397 } 11398 break; 11399 case 's': 11400 if (!memcmp(BuiltinName+14, "f", 1)) { 11401 switch (BuiltinName[15]) { // "__builtin_si_sf" 11402 case 'h': 11403 IntrinsicID = Intrinsic::spu_si_sfh; 11404 break; 11405 case 'i': 11406 IntrinsicID = Intrinsic::spu_si_sfi; 11407 break; 11408 case 'x': 11409 IntrinsicID = Intrinsic::spu_si_sfx; 11410 break; 11411 } 11412 } 11413 break; 11414 case 'x': 11415 if (!memcmp(BuiltinName+14, "or", 2)) 11416 IntrinsicID = Intrinsic::spu_si_xor; 11417 break; 11418 } 11419 } 11420 break; 11421 case 17: 11422 if (!memcmp(BuiltinName, "__builtin_si_", 13)) { 11423 switch (BuiltinName[13]) { // "__builtin_si_" 11424 case 'a': 11425 switch (BuiltinName[14]) { // "__builtin_si_a" 11426 case 'd': 11427 if (!memcmp(BuiltinName+15, "dx", 2)) 11428 IntrinsicID = Intrinsic::spu_si_addx; 11429 break; 11430 case 'n': 11431 if (!memcmp(BuiltinName+15, "d", 1)) { 11432 switch (BuiltinName[16]) { // "__builtin_si_and" 11433 case 'c': 11434 IntrinsicID = Intrinsic::spu_si_andc; 11435 break; 11436 case 'i': 11437 IntrinsicID = Intrinsic::spu_si_andi; 11438 break; 11439 } 11440 } 11441 break; 11442 } 11443 break; 11444 case 'c': 11445 switch (BuiltinName[14]) { // "__builtin_si_c" 11446 case 'e': 11447 if (!memcmp(BuiltinName+15, "q", 1)) { 11448 switch (BuiltinName[16]) { // "__builtin_si_ceq" 11449 case 'b': 11450 IntrinsicID = Intrinsic::spu_si_ceqb; 11451 break; 11452 case 'h': 11453 IntrinsicID = Intrinsic::spu_si_ceqh; 11454 break; 11455 case 'i': 11456 IntrinsicID = Intrinsic::spu_si_ceqi; 11457 break; 11458 } 11459 } 11460 break; 11461 case 'g': 11462 if (!memcmp(BuiltinName+15, "t", 1)) { 11463 switch (BuiltinName[16]) { // "__builtin_si_cgt" 11464 case 'b': 11465 IntrinsicID = Intrinsic::spu_si_cgtb; 11466 break; 11467 case 'h': 11468 IntrinsicID = Intrinsic::spu_si_cgth; 11469 break; 11470 case 'i': 11471 IntrinsicID = Intrinsic::spu_si_cgti; 11472 break; 11473 } 11474 } 11475 break; 11476 case 'l': 11477 if (!memcmp(BuiltinName+15, "gt", 2)) 11478 IntrinsicID = Intrinsic::spu_si_clgt; 11479 break; 11480 } 11481 break; 11482 case 'd': 11483 if (!memcmp(BuiltinName+14, "fm", 2)) { 11484 switch (BuiltinName[16]) { // "__builtin_si_dfm" 11485 case 'a': 11486 IntrinsicID = Intrinsic::spu_si_dfma; 11487 break; 11488 case 's': 11489 IntrinsicID = Intrinsic::spu_si_dfms; 11490 break; 11491 } 11492 } 11493 break; 11494 case 'f': 11495 switch (BuiltinName[14]) { // "__builtin_si_f" 11496 case 'c': 11497 switch (BuiltinName[15]) { // "__builtin_si_fc" 11498 case 'e': 11499 if (!memcmp(BuiltinName+16, "q", 1)) 11500 IntrinsicID = Intrinsic::spu_si_fceq; 11501 break; 11502 case 'g': 11503 if (!memcmp(BuiltinName+16, "t", 1)) 11504 IntrinsicID = Intrinsic::spu_si_fcgt; 11505 break; 11506 } 11507 break; 11508 case 'n': 11509 if (!memcmp(BuiltinName+15, "ms", 2)) 11510 IntrinsicID = Intrinsic::spu_si_fnms; 11511 break; 11512 } 11513 break; 11514 case 'm': 11515 if (!memcmp(BuiltinName+14, "py", 2)) { 11516 switch (BuiltinName[16]) { // "__builtin_si_mpy" 11517 case 'a': 11518 IntrinsicID = Intrinsic::spu_si_mpya; 11519 break; 11520 case 'h': 11521 IntrinsicID = Intrinsic::spu_si_mpyh; 11522 break; 11523 case 'i': 11524 IntrinsicID = Intrinsic::spu_si_mpyi; 11525 break; 11526 case 's': 11527 IntrinsicID = Intrinsic::spu_si_mpys; 11528 break; 11529 case 'u': 11530 IntrinsicID = Intrinsic::spu_si_mpyu; 11531 break; 11532 } 11533 } 11534 break; 11535 case 'n': 11536 if (!memcmp(BuiltinName+14, "and", 3)) 11537 IntrinsicID = Intrinsic::spu_si_nand; 11538 break; 11539 case 'o': 11540 if (!memcmp(BuiltinName+14, "r", 1)) { 11541 switch (BuiltinName[15]) { // "__builtin_si_or" 11542 case 'b': 11543 if (!memcmp(BuiltinName+16, "i", 1)) 11544 IntrinsicID = Intrinsic::spu_si_orbi; 11545 break; 11546 case 'h': 11547 if (!memcmp(BuiltinName+16, "i", 1)) 11548 IntrinsicID = Intrinsic::spu_si_orhi; 11549 break; 11550 } 11551 } 11552 break; 11553 case 's': 11554 switch (BuiltinName[14]) { // "__builtin_si_s" 11555 case 'f': 11556 if (!memcmp(BuiltinName+15, "hi", 2)) 11557 IntrinsicID = Intrinsic::spu_si_sfhi; 11558 break; 11559 case 'h': 11560 if (!memcmp(BuiltinName+15, "li", 2)) 11561 IntrinsicID = Intrinsic::spu_si_shli; 11562 break; 11563 } 11564 break; 11565 case 'x': 11566 if (!memcmp(BuiltinName+14, "ori", 3)) 11567 IntrinsicID = Intrinsic::spu_si_xori; 11568 break; 11569 } 11570 } 11571 break; 11572 case 18: 11573 if (!memcmp(BuiltinName, "__builtin_si_", 13)) { 11574 switch (BuiltinName[13]) { // "__builtin_si_" 11575 case 'a': 11576 if (!memcmp(BuiltinName+14, "nd", 2)) { 11577 switch (BuiltinName[16]) { // "__builtin_si_and" 11578 case 'b': 11579 if (!memcmp(BuiltinName+17, "i", 1)) 11580 IntrinsicID = Intrinsic::spu_si_andbi; 11581 break; 11582 case 'h': 11583 if (!memcmp(BuiltinName+17, "i", 1)) 11584 IntrinsicID = Intrinsic::spu_si_andhi; 11585 break; 11586 } 11587 } 11588 break; 11589 case 'c': 11590 switch (BuiltinName[14]) { // "__builtin_si_c" 11591 case 'e': 11592 if (!memcmp(BuiltinName+15, "q", 1)) { 11593 switch (BuiltinName[16]) { // "__builtin_si_ceq" 11594 case 'b': 11595 if (!memcmp(BuiltinName+17, "i", 1)) 11596 IntrinsicID = Intrinsic::spu_si_ceqbi; 11597 break; 11598 case 'h': 11599 if (!memcmp(BuiltinName+17, "i", 1)) 11600 IntrinsicID = Intrinsic::spu_si_ceqhi; 11601 break; 11602 } 11603 } 11604 break; 11605 case 'g': 11606 if (!memcmp(BuiltinName+15, "t", 1)) { 11607 switch (BuiltinName[16]) { // "__builtin_si_cgt" 11608 case 'b': 11609 if (!memcmp(BuiltinName+17, "i", 1)) 11610 IntrinsicID = Intrinsic::spu_si_cgtbi; 11611 break; 11612 case 'h': 11613 if (!memcmp(BuiltinName+17, "i", 1)) 11614 IntrinsicID = Intrinsic::spu_si_cgthi; 11615 break; 11616 } 11617 } 11618 break; 11619 case 'l': 11620 if (!memcmp(BuiltinName+15, "gt", 2)) { 11621 switch (BuiltinName[17]) { // "__builtin_si_clgt" 11622 case 'b': 11623 IntrinsicID = Intrinsic::spu_si_clgtb; 11624 break; 11625 case 'h': 11626 IntrinsicID = Intrinsic::spu_si_clgth; 11627 break; 11628 case 'i': 11629 IntrinsicID = Intrinsic::spu_si_clgti; 11630 break; 11631 } 11632 } 11633 break; 11634 } 11635 break; 11636 case 'd': 11637 if (!memcmp(BuiltinName+14, "fnm", 3)) { 11638 switch (BuiltinName[17]) { // "__builtin_si_dfnm" 11639 case 'a': 11640 IntrinsicID = Intrinsic::spu_si_dfnma; 11641 break; 11642 case 's': 11643 IntrinsicID = Intrinsic::spu_si_dfnms; 11644 break; 11645 } 11646 } 11647 break; 11648 case 'f': 11649 switch (BuiltinName[14]) { // "__builtin_si_f" 11650 case 'c': 11651 if (!memcmp(BuiltinName+15, "m", 1)) { 11652 switch (BuiltinName[16]) { // "__builtin_si_fcm" 11653 case 'e': 11654 if (!memcmp(BuiltinName+17, "q", 1)) 11655 IntrinsicID = Intrinsic::spu_si_fcmeq; 11656 break; 11657 case 'g': 11658 if (!memcmp(BuiltinName+17, "t", 1)) 11659 IntrinsicID = Intrinsic::spu_si_fcmgt; 11660 break; 11661 } 11662 } 11663 break; 11664 case 's': 11665 if (!memcmp(BuiltinName+15, "mbi", 3)) 11666 IntrinsicID = Intrinsic::spu_si_fsmbi; 11667 break; 11668 } 11669 break; 11670 case 'm': 11671 if (!memcmp(BuiltinName+14, "py", 2)) { 11672 switch (BuiltinName[16]) { // "__builtin_si_mpy" 11673 case 'h': 11674 if (!memcmp(BuiltinName+17, "h", 1)) 11675 IntrinsicID = Intrinsic::spu_si_mpyhh; 11676 break; 11677 case 'u': 11678 if (!memcmp(BuiltinName+17, "i", 1)) 11679 IntrinsicID = Intrinsic::spu_si_mpyui; 11680 break; 11681 } 11682 } 11683 break; 11684 case 'x': 11685 if (!memcmp(BuiltinName+14, "or", 2)) { 11686 switch (BuiltinName[16]) { // "__builtin_si_xor" 11687 case 'b': 11688 if (!memcmp(BuiltinName+17, "i", 1)) 11689 IntrinsicID = Intrinsic::spu_si_xorbi; 11690 break; 11691 case 'h': 11692 if (!memcmp(BuiltinName+17, "i", 1)) 11693 IntrinsicID = Intrinsic::spu_si_xorhi; 11694 break; 11695 } 11696 } 11697 break; 11698 } 11699 } 11700 break; 11701 case 19: 11702 if (!memcmp(BuiltinName, "__builtin_si_", 13)) { 11703 switch (BuiltinName[13]) { // "__builtin_si_" 11704 case 'c': 11705 if (!memcmp(BuiltinName+14, "lgt", 3)) { 11706 switch (BuiltinName[17]) { // "__builtin_si_clgt" 11707 case 'b': 11708 if (!memcmp(BuiltinName+18, "i", 1)) 11709 IntrinsicID = Intrinsic::spu_si_clgtbi; 11710 break; 11711 case 'h': 11712 if (!memcmp(BuiltinName+18, "i", 1)) 11713 IntrinsicID = Intrinsic::spu_si_clgthi; 11714 break; 11715 } 11716 } 11717 break; 11718 case 'm': 11719 if (!memcmp(BuiltinName+14, "pyhh", 4)) { 11720 switch (BuiltinName[18]) { // "__builtin_si_mpyhh" 11721 case 'a': 11722 IntrinsicID = Intrinsic::spu_si_mpyhha; 11723 break; 11724 case 'u': 11725 IntrinsicID = Intrinsic::spu_si_mpyhhu; 11726 break; 11727 } 11728 } 11729 break; 11730 case 's': 11731 if (!memcmp(BuiltinName+14, "hlqb", 4)) { 11732 switch (BuiltinName[18]) { // "__builtin_si_shlqb" 11733 case 'i': 11734 IntrinsicID = Intrinsic::spu_si_shlqbi; 11735 break; 11736 case 'y': 11737 IntrinsicID = Intrinsic::spu_si_shlqby; 11738 break; 11739 } 11740 } 11741 break; 11742 } 11743 } 11744 break; 11745 case 20: 11746 if (!memcmp(BuiltinName, "__builtin_si_", 13)) { 11747 switch (BuiltinName[13]) { // "__builtin_si_" 11748 case 'm': 11749 if (!memcmp(BuiltinName+14, "pyhhau", 6)) 11750 IntrinsicID = Intrinsic::spu_si_mpyhhau; 11751 break; 11752 case 's': 11753 if (!memcmp(BuiltinName+14, "hlqb", 4)) { 11754 switch (BuiltinName[18]) { // "__builtin_si_shlqb" 11755 case 'i': 11756 if (!memcmp(BuiltinName+19, "i", 1)) 11757 IntrinsicID = Intrinsic::spu_si_shlqbii; 11758 break; 11759 case 'y': 11760 if (!memcmp(BuiltinName+19, "i", 1)) 11761 IntrinsicID = Intrinsic::spu_si_shlqbyi; 11762 break; 11763 } 11764 } 11765 break; 11766 } 11767 } 11768 break; 11769 } 11770 } 11771 if (!strcmp(TargetPrefix, "x86")) { 11772 switch (strlen(BuiltinName)) { 11773 default: break; 11774 case 18: 11775 if (!memcmp(BuiltinName, "__builtin_ia32_por", 18)) 11776 IntrinsicID = Intrinsic::x86_mmx_por; 11777 break; 11778 case 19: 11779 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 11780 switch (BuiltinName[15]) { // "__builtin_ia32_" 11781 case 'd': 11782 if (!memcmp(BuiltinName+16, "pp", 2)) { 11783 switch (BuiltinName[18]) { // "__builtin_ia32_dpp" 11784 case 'd': 11785 IntrinsicID = Intrinsic::x86_sse41_dppd; 11786 break; 11787 case 's': 11788 IntrinsicID = Intrinsic::x86_sse41_dpps; 11789 break; 11790 } 11791 } 11792 break; 11793 case 'e': 11794 if (!memcmp(BuiltinName+16, "mms", 3)) 11795 IntrinsicID = Intrinsic::x86_mmx_emms; 11796 break; 11797 case 'p': 11798 switch (BuiltinName[16]) { // "__builtin_ia32_p" 11799 case 'a': 11800 if (!memcmp(BuiltinName+17, "nd", 2)) 11801 IntrinsicID = Intrinsic::x86_mmx_pand; 11802 break; 11803 case 'x': 11804 if (!memcmp(BuiltinName+17, "or", 2)) 11805 IntrinsicID = Intrinsic::x86_mmx_pxor; 11806 break; 11807 } 11808 break; 11809 } 11810 } 11811 break; 11812 case 20: 11813 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 11814 switch (BuiltinName[15]) { // "__builtin_ia32_" 11815 case 'a': 11816 if (!memcmp(BuiltinName+16, "dds", 3)) { 11817 switch (BuiltinName[19]) { // "__builtin_ia32_adds" 11818 case 'd': 11819 IntrinsicID = Intrinsic::x86_sse2_add_sd; 11820 break; 11821 case 's': 11822 IntrinsicID = Intrinsic::x86_sse_add_ss; 11823 break; 11824 } 11825 } 11826 break; 11827 case 'd': 11828 if (!memcmp(BuiltinName+16, "ivs", 3)) { 11829 switch (BuiltinName[19]) { // "__builtin_ia32_divs" 11830 case 'd': 11831 IntrinsicID = Intrinsic::x86_sse2_div_sd; 11832 break; 11833 case 's': 11834 IntrinsicID = Intrinsic::x86_sse_div_ss; 11835 break; 11836 } 11837 } 11838 break; 11839 case 'f': 11840 if (!memcmp(BuiltinName+16, "emms", 4)) 11841 IntrinsicID = Intrinsic::x86_mmx_femms; 11842 break; 11843 case 'l': 11844 if (!memcmp(BuiltinName+16, "ddqu", 4)) 11845 IntrinsicID = Intrinsic::x86_sse3_ldu_dq; 11846 break; 11847 case 'm': 11848 switch (BuiltinName[16]) { // "__builtin_ia32_m" 11849 case 'a': 11850 if (!memcmp(BuiltinName+17, "x", 1)) { 11851 switch (BuiltinName[18]) { // "__builtin_ia32_max" 11852 case 'p': 11853 switch (BuiltinName[19]) { // "__builtin_ia32_maxp" 11854 case 'd': 11855 IntrinsicID = Intrinsic::x86_sse2_max_pd; 11856 break; 11857 case 's': 11858 IntrinsicID = Intrinsic::x86_sse_max_ps; 11859 break; 11860 } 11861 break; 11862 case 's': 11863 switch (BuiltinName[19]) { // "__builtin_ia32_maxs" 11864 case 'd': 11865 IntrinsicID = Intrinsic::x86_sse2_max_sd; 11866 break; 11867 case 's': 11868 IntrinsicID = Intrinsic::x86_sse_max_ss; 11869 break; 11870 } 11871 break; 11872 } 11873 } 11874 break; 11875 case 'i': 11876 if (!memcmp(BuiltinName+17, "n", 1)) { 11877 switch (BuiltinName[18]) { // "__builtin_ia32_min" 11878 case 'p': 11879 switch (BuiltinName[19]) { // "__builtin_ia32_minp" 11880 case 'd': 11881 IntrinsicID = Intrinsic::x86_sse2_min_pd; 11882 break; 11883 case 's': 11884 IntrinsicID = Intrinsic::x86_sse_min_ps; 11885 break; 11886 } 11887 break; 11888 case 's': 11889 switch (BuiltinName[19]) { // "__builtin_ia32_mins" 11890 case 'd': 11891 IntrinsicID = Intrinsic::x86_sse2_min_sd; 11892 break; 11893 case 's': 11894 IntrinsicID = Intrinsic::x86_sse_min_ss; 11895 break; 11896 } 11897 break; 11898 } 11899 } 11900 break; 11901 case 'u': 11902 if (!memcmp(BuiltinName+17, "ls", 2)) { 11903 switch (BuiltinName[19]) { // "__builtin_ia32_muls" 11904 case 'd': 11905 IntrinsicID = Intrinsic::x86_sse2_mul_sd; 11906 break; 11907 case 's': 11908 IntrinsicID = Intrinsic::x86_sse_mul_ss; 11909 break; 11910 } 11911 } 11912 break; 11913 case 'w': 11914 if (!memcmp(BuiltinName+17, "ait", 3)) 11915 IntrinsicID = Intrinsic::x86_sse3_mwait; 11916 break; 11917 } 11918 break; 11919 case 'p': 11920 switch (BuiltinName[16]) { // "__builtin_ia32_p" 11921 case 'a': 11922 switch (BuiltinName[17]) { // "__builtin_ia32_pa" 11923 case 'b': 11924 if (!memcmp(BuiltinName+18, "s", 1)) { 11925 switch (BuiltinName[19]) { // "__builtin_ia32_pabs" 11926 case 'b': 11927 IntrinsicID = Intrinsic::x86_ssse3_pabs_b; 11928 break; 11929 case 'd': 11930 IntrinsicID = Intrinsic::x86_ssse3_pabs_d; 11931 break; 11932 case 'w': 11933 IntrinsicID = Intrinsic::x86_ssse3_pabs_w; 11934 break; 11935 } 11936 } 11937 break; 11938 case 'd': 11939 if (!memcmp(BuiltinName+18, "d", 1)) { 11940 switch (BuiltinName[19]) { // "__builtin_ia32_padd" 11941 case 'b': 11942 IntrinsicID = Intrinsic::x86_mmx_padd_b; 11943 break; 11944 case 'd': 11945 IntrinsicID = Intrinsic::x86_mmx_padd_d; 11946 break; 11947 case 'q': 11948 IntrinsicID = Intrinsic::x86_mmx_padd_q; 11949 break; 11950 case 'w': 11951 IntrinsicID = Intrinsic::x86_mmx_padd_w; 11952 break; 11953 } 11954 } 11955 break; 11956 case 'n': 11957 if (!memcmp(BuiltinName+18, "dn", 2)) 11958 IntrinsicID = Intrinsic::x86_mmx_pandn; 11959 break; 11960 case 'v': 11961 if (!memcmp(BuiltinName+18, "g", 1)) { 11962 switch (BuiltinName[19]) { // "__builtin_ia32_pavg" 11963 case 'b': 11964 IntrinsicID = Intrinsic::x86_mmx_pavg_b; 11965 break; 11966 case 'w': 11967 IntrinsicID = Intrinsic::x86_mmx_pavg_w; 11968 break; 11969 } 11970 } 11971 break; 11972 } 11973 break; 11974 case 's': 11975 switch (BuiltinName[17]) { // "__builtin_ia32_ps" 11976 case 'l': 11977 if (!memcmp(BuiltinName+18, "l", 1)) { 11978 switch (BuiltinName[19]) { // "__builtin_ia32_psll" 11979 case 'd': 11980 IntrinsicID = Intrinsic::x86_mmx_psll_d; 11981 break; 11982 case 'q': 11983 IntrinsicID = Intrinsic::x86_mmx_psll_q; 11984 break; 11985 case 'w': 11986 IntrinsicID = Intrinsic::x86_mmx_psll_w; 11987 break; 11988 } 11989 } 11990 break; 11991 case 'r': 11992 switch (BuiltinName[18]) { // "__builtin_ia32_psr" 11993 case 'a': 11994 switch (BuiltinName[19]) { // "__builtin_ia32_psra" 11995 case 'd': 11996 IntrinsicID = Intrinsic::x86_mmx_psra_d; 11997 break; 11998 case 'w': 11999 IntrinsicID = Intrinsic::x86_mmx_psra_w; 12000 break; 12001 } 12002 break; 12003 case 'l': 12004 switch (BuiltinName[19]) { // "__builtin_ia32_psrl" 12005 case 'd': 12006 IntrinsicID = Intrinsic::x86_mmx_psrl_d; 12007 break; 12008 case 'q': 12009 IntrinsicID = Intrinsic::x86_mmx_psrl_q; 12010 break; 12011 case 'w': 12012 IntrinsicID = Intrinsic::x86_mmx_psrl_w; 12013 break; 12014 } 12015 break; 12016 } 12017 break; 12018 case 'u': 12019 if (!memcmp(BuiltinName+18, "b", 1)) { 12020 switch (BuiltinName[19]) { // "__builtin_ia32_psub" 12021 case 'b': 12022 IntrinsicID = Intrinsic::x86_mmx_psub_b; 12023 break; 12024 case 'd': 12025 IntrinsicID = Intrinsic::x86_mmx_psub_d; 12026 break; 12027 case 'q': 12028 IntrinsicID = Intrinsic::x86_mmx_psub_q; 12029 break; 12030 case 'w': 12031 IntrinsicID = Intrinsic::x86_mmx_psub_w; 12032 break; 12033 } 12034 } 12035 break; 12036 } 12037 break; 12038 } 12039 break; 12040 case 'r': 12041 if (!memcmp(BuiltinName+16, "cp", 2)) { 12042 switch (BuiltinName[18]) { // "__builtin_ia32_rcp" 12043 case 'p': 12044 if (!memcmp(BuiltinName+19, "s", 1)) 12045 IntrinsicID = Intrinsic::x86_sse_rcp_ps; 12046 break; 12047 case 's': 12048 if (!memcmp(BuiltinName+19, "s", 1)) 12049 IntrinsicID = Intrinsic::x86_sse_rcp_ss; 12050 break; 12051 } 12052 } 12053 break; 12054 case 's': 12055 if (!memcmp(BuiltinName+16, "ubs", 3)) { 12056 switch (BuiltinName[19]) { // "__builtin_ia32_subs" 12057 case 'd': 12058 IntrinsicID = Intrinsic::x86_sse2_sub_sd; 12059 break; 12060 case 's': 12061 IntrinsicID = Intrinsic::x86_sse_sub_ss; 12062 break; 12063 } 12064 } 12065 break; 12066 } 12067 } 12068 break; 12069 case 21: 12070 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 12071 switch (BuiltinName[15]) { // "__builtin_ia32_" 12072 case 'c': 12073 if (!memcmp(BuiltinName+16, "omi", 3)) { 12074 switch (BuiltinName[19]) { // "__builtin_ia32_comi" 12075 case 'e': 12076 if (!memcmp(BuiltinName+20, "q", 1)) 12077 IntrinsicID = Intrinsic::x86_sse_comieq_ss; 12078 break; 12079 case 'g': 12080 switch (BuiltinName[20]) { // "__builtin_ia32_comig" 12081 case 'e': 12082 IntrinsicID = Intrinsic::x86_sse_comige_ss; 12083 break; 12084 case 't': 12085 IntrinsicID = Intrinsic::x86_sse_comigt_ss; 12086 break; 12087 } 12088 break; 12089 case 'l': 12090 switch (BuiltinName[20]) { // "__builtin_ia32_comil" 12091 case 'e': 12092 IntrinsicID = Intrinsic::x86_sse_comile_ss; 12093 break; 12094 case 't': 12095 IntrinsicID = Intrinsic::x86_sse_comilt_ss; 12096 break; 12097 } 12098 break; 12099 } 12100 } 12101 break; 12102 case 'h': 12103 switch (BuiltinName[16]) { // "__builtin_ia32_h" 12104 case 'a': 12105 if (!memcmp(BuiltinName+17, "ddp", 3)) { 12106 switch (BuiltinName[20]) { // "__builtin_ia32_haddp" 12107 case 'd': 12108 IntrinsicID = Intrinsic::x86_sse3_hadd_pd; 12109 break; 12110 case 's': 12111 IntrinsicID = Intrinsic::x86_sse3_hadd_ps; 12112 break; 12113 } 12114 } 12115 break; 12116 case 's': 12117 if (!memcmp(BuiltinName+17, "ubp", 3)) { 12118 switch (BuiltinName[20]) { // "__builtin_ia32_hsubp" 12119 case 'd': 12120 IntrinsicID = Intrinsic::x86_sse3_hsub_pd; 12121 break; 12122 case 's': 12123 IntrinsicID = Intrinsic::x86_sse3_hsub_ps; 12124 break; 12125 } 12126 } 12127 break; 12128 } 12129 break; 12130 case 'l': 12131 if (!memcmp(BuiltinName+16, "fence", 5)) 12132 IntrinsicID = Intrinsic::x86_sse2_lfence; 12133 break; 12134 case 'm': 12135 switch (BuiltinName[16]) { // "__builtin_ia32_m" 12136 case 'f': 12137 if (!memcmp(BuiltinName+17, "ence", 4)) 12138 IntrinsicID = Intrinsic::x86_sse2_mfence; 12139 break; 12140 case 'o': 12141 if (!memcmp(BuiltinName+17, "vnt", 3)) { 12142 switch (BuiltinName[20]) { // "__builtin_ia32_movnt" 12143 case 'i': 12144 IntrinsicID = Intrinsic::x86_sse2_movnt_i; 12145 break; 12146 case 'q': 12147 IntrinsicID = Intrinsic::x86_mmx_movnt_dq; 12148 break; 12149 } 12150 } 12151 break; 12152 } 12153 break; 12154 case 'p': 12155 switch (BuiltinName[16]) { // "__builtin_ia32_p" 12156 case 'a': 12157 if (!memcmp(BuiltinName+17, "dds", 3)) { 12158 switch (BuiltinName[20]) { // "__builtin_ia32_padds" 12159 case 'b': 12160 IntrinsicID = Intrinsic::x86_mmx_padds_b; 12161 break; 12162 case 'w': 12163 IntrinsicID = Intrinsic::x86_mmx_padds_w; 12164 break; 12165 } 12166 } 12167 break; 12168 case 'h': 12169 switch (BuiltinName[17]) { // "__builtin_ia32_ph" 12170 case 'a': 12171 if (!memcmp(BuiltinName+18, "dd", 2)) { 12172 switch (BuiltinName[20]) { // "__builtin_ia32_phadd" 12173 case 'd': 12174 IntrinsicID = Intrinsic::x86_ssse3_phadd_d; 12175 break; 12176 case 'w': 12177 IntrinsicID = Intrinsic::x86_ssse3_phadd_w; 12178 break; 12179 } 12180 } 12181 break; 12182 case 's': 12183 if (!memcmp(BuiltinName+18, "ub", 2)) { 12184 switch (BuiltinName[20]) { // "__builtin_ia32_phsub" 12185 case 'd': 12186 IntrinsicID = Intrinsic::x86_ssse3_phsub_d; 12187 break; 12188 case 'w': 12189 IntrinsicID = Intrinsic::x86_ssse3_phsub_w; 12190 break; 12191 } 12192 } 12193 break; 12194 } 12195 break; 12196 case 'm': 12197 switch (BuiltinName[17]) { // "__builtin_ia32_pm" 12198 case 'a': 12199 if (!memcmp(BuiltinName+18, "x", 1)) { 12200 switch (BuiltinName[19]) { // "__builtin_ia32_pmax" 12201 case 's': 12202 if (!memcmp(BuiltinName+20, "w", 1)) 12203 IntrinsicID = Intrinsic::x86_mmx_pmaxs_w; 12204 break; 12205 case 'u': 12206 if (!memcmp(BuiltinName+20, "b", 1)) 12207 IntrinsicID = Intrinsic::x86_mmx_pmaxu_b; 12208 break; 12209 } 12210 } 12211 break; 12212 case 'i': 12213 if (!memcmp(BuiltinName+18, "n", 1)) { 12214 switch (BuiltinName[19]) { // "__builtin_ia32_pmin" 12215 case 's': 12216 if (!memcmp(BuiltinName+20, "w", 1)) 12217 IntrinsicID = Intrinsic::x86_mmx_pmins_w; 12218 break; 12219 case 'u': 12220 if (!memcmp(BuiltinName+20, "b", 1)) 12221 IntrinsicID = Intrinsic::x86_mmx_pminu_b; 12222 break; 12223 } 12224 } 12225 break; 12226 case 'u': 12227 if (!memcmp(BuiltinName+18, "l", 1)) { 12228 switch (BuiltinName[19]) { // "__builtin_ia32_pmul" 12229 case 'h': 12230 if (!memcmp(BuiltinName+20, "w", 1)) 12231 IntrinsicID = Intrinsic::x86_mmx_pmulh_w; 12232 break; 12233 case 'l': 12234 if (!memcmp(BuiltinName+20, "w", 1)) 12235 IntrinsicID = Intrinsic::x86_mmx_pmull_w; 12236 break; 12237 } 12238 } 12239 break; 12240 } 12241 break; 12242 case 's': 12243 switch (BuiltinName[17]) { // "__builtin_ia32_ps" 12244 case 'a': 12245 if (!memcmp(BuiltinName+18, "dbw", 3)) 12246 IntrinsicID = Intrinsic::x86_mmx_psad_bw; 12247 break; 12248 case 'h': 12249 if (!memcmp(BuiltinName+18, "uf", 2)) { 12250 switch (BuiltinName[20]) { // "__builtin_ia32_pshuf" 12251 case 'b': 12252 IntrinsicID = Intrinsic::x86_ssse3_pshuf_b; 12253 break; 12254 case 'w': 12255 IntrinsicID = Intrinsic::x86_ssse3_pshuf_w; 12256 break; 12257 } 12258 } 12259 break; 12260 case 'i': 12261 if (!memcmp(BuiltinName+18, "gn", 2)) { 12262 switch (BuiltinName[20]) { // "__builtin_ia32_psign" 12263 case 'b': 12264 IntrinsicID = Intrinsic::x86_ssse3_psign_b; 12265 break; 12266 case 'd': 12267 IntrinsicID = Intrinsic::x86_ssse3_psign_d; 12268 break; 12269 case 'w': 12270 IntrinsicID = Intrinsic::x86_ssse3_psign_w; 12271 break; 12272 } 12273 } 12274 break; 12275 case 'l': 12276 if (!memcmp(BuiltinName+18, "l", 1)) { 12277 switch (BuiltinName[19]) { // "__builtin_ia32_psll" 12278 case 'd': 12279 if (!memcmp(BuiltinName+20, "i", 1)) 12280 IntrinsicID = Intrinsic::x86_mmx_pslli_d; 12281 break; 12282 case 'q': 12283 if (!memcmp(BuiltinName+20, "i", 1)) 12284 IntrinsicID = Intrinsic::x86_mmx_pslli_q; 12285 break; 12286 case 'w': 12287 if (!memcmp(BuiltinName+20, "i", 1)) 12288 IntrinsicID = Intrinsic::x86_mmx_pslli_w; 12289 break; 12290 } 12291 } 12292 break; 12293 case 'r': 12294 switch (BuiltinName[18]) { // "__builtin_ia32_psr" 12295 case 'a': 12296 switch (BuiltinName[19]) { // "__builtin_ia32_psra" 12297 case 'd': 12298 if (!memcmp(BuiltinName+20, "i", 1)) 12299 IntrinsicID = Intrinsic::x86_mmx_psrai_d; 12300 break; 12301 case 'w': 12302 if (!memcmp(BuiltinName+20, "i", 1)) 12303 IntrinsicID = Intrinsic::x86_mmx_psrai_w; 12304 break; 12305 } 12306 break; 12307 case 'l': 12308 switch (BuiltinName[19]) { // "__builtin_ia32_psrl" 12309 case 'd': 12310 if (!memcmp(BuiltinName+20, "i", 1)) 12311 IntrinsicID = Intrinsic::x86_mmx_psrli_d; 12312 break; 12313 case 'q': 12314 if (!memcmp(BuiltinName+20, "i", 1)) 12315 IntrinsicID = Intrinsic::x86_mmx_psrli_q; 12316 break; 12317 case 'w': 12318 if (!memcmp(BuiltinName+20, "i", 1)) 12319 IntrinsicID = Intrinsic::x86_mmx_psrli_w; 12320 break; 12321 } 12322 break; 12323 } 12324 break; 12325 case 'u': 12326 if (!memcmp(BuiltinName+18, "bs", 2)) { 12327 switch (BuiltinName[20]) { // "__builtin_ia32_psubs" 12328 case 'b': 12329 IntrinsicID = Intrinsic::x86_mmx_psubs_b; 12330 break; 12331 case 'w': 12332 IntrinsicID = Intrinsic::x86_mmx_psubs_w; 12333 break; 12334 } 12335 } 12336 break; 12337 } 12338 break; 12339 } 12340 break; 12341 case 's': 12342 switch (BuiltinName[16]) { // "__builtin_ia32_s" 12343 case 'f': 12344 if (!memcmp(BuiltinName+17, "ence", 4)) 12345 IntrinsicID = Intrinsic::x86_sse_sfence; 12346 break; 12347 case 'q': 12348 if (!memcmp(BuiltinName+17, "rt", 2)) { 12349 switch (BuiltinName[19]) { // "__builtin_ia32_sqrt" 12350 case 'p': 12351 switch (BuiltinName[20]) { // "__builtin_ia32_sqrtp" 12352 case 'd': 12353 IntrinsicID = Intrinsic::x86_sse2_sqrt_pd; 12354 break; 12355 case 's': 12356 IntrinsicID = Intrinsic::x86_sse_sqrt_ps; 12357 break; 12358 } 12359 break; 12360 case 's': 12361 switch (BuiltinName[20]) { // "__builtin_ia32_sqrts" 12362 case 'd': 12363 IntrinsicID = Intrinsic::x86_sse2_sqrt_sd; 12364 break; 12365 case 's': 12366 IntrinsicID = Intrinsic::x86_sse_sqrt_ss; 12367 break; 12368 } 12369 break; 12370 } 12371 } 12372 break; 12373 } 12374 break; 12375 } 12376 } 12377 break; 12378 case 22: 12379 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 12380 switch (BuiltinName[15]) { // "__builtin_ia32_" 12381 case 'b': 12382 if (!memcmp(BuiltinName+16, "lendp", 5)) { 12383 switch (BuiltinName[21]) { // "__builtin_ia32_blendp" 12384 case 'd': 12385 IntrinsicID = Intrinsic::x86_sse41_blendpd; 12386 break; 12387 case 's': 12388 IntrinsicID = Intrinsic::x86_sse41_blendps; 12389 break; 12390 } 12391 } 12392 break; 12393 case 'c': 12394 switch (BuiltinName[16]) { // "__builtin_ia32_c" 12395 case 'l': 12396 if (!memcmp(BuiltinName+17, "flush", 5)) 12397 IntrinsicID = Intrinsic::x86_sse2_clflush; 12398 break; 12399 case 'o': 12400 if (!memcmp(BuiltinName+17, "mineq", 5)) 12401 IntrinsicID = Intrinsic::x86_sse_comineq_ss; 12402 break; 12403 case 'r': 12404 if (!memcmp(BuiltinName+17, "c32", 3)) { 12405 switch (BuiltinName[20]) { // "__builtin_ia32_crc32" 12406 case 'd': 12407 if (!memcmp(BuiltinName+21, "i", 1)) 12408 IntrinsicID = Intrinsic::x86_sse42_crc64_64; 12409 break; 12410 case 'h': 12411 if (!memcmp(BuiltinName+21, "i", 1)) 12412 IntrinsicID = Intrinsic::x86_sse42_crc32_16; 12413 break; 12414 case 'q': 12415 if (!memcmp(BuiltinName+21, "i", 1)) 12416 IntrinsicID = Intrinsic::x86_sse42_crc32_8; 12417 break; 12418 case 's': 12419 if (!memcmp(BuiltinName+21, "i", 1)) 12420 IntrinsicID = Intrinsic::x86_sse42_crc32_32; 12421 break; 12422 } 12423 } 12424 break; 12425 } 12426 break; 12427 case 'd': 12428 if (!memcmp(BuiltinName+16, "pps256", 6)) 12429 IntrinsicID = Intrinsic::x86_avx_dp_ps_256; 12430 break; 12431 case 'l': 12432 if (!memcmp(BuiltinName+16, "oad", 3)) { 12433 switch (BuiltinName[19]) { // "__builtin_ia32_load" 12434 case 'd': 12435 if (!memcmp(BuiltinName+20, "qu", 2)) 12436 IntrinsicID = Intrinsic::x86_sse2_loadu_dq; 12437 break; 12438 case 'u': 12439 if (!memcmp(BuiltinName+20, "p", 1)) { 12440 switch (BuiltinName[21]) { // "__builtin_ia32_loadup" 12441 case 'd': 12442 IntrinsicID = Intrinsic::x86_sse2_loadu_pd; 12443 break; 12444 case 's': 12445 IntrinsicID = Intrinsic::x86_sse_loadu_ps; 12446 break; 12447 } 12448 } 12449 break; 12450 } 12451 } 12452 break; 12453 case 'm': 12454 if (!memcmp(BuiltinName+16, "o", 1)) { 12455 switch (BuiltinName[17]) { // "__builtin_ia32_mo" 12456 case 'n': 12457 if (!memcmp(BuiltinName+18, "itor", 4)) 12458 IntrinsicID = Intrinsic::x86_sse3_monitor; 12459 break; 12460 case 'v': 12461 if (!memcmp(BuiltinName+18, "nt", 2)) { 12462 switch (BuiltinName[20]) { // "__builtin_ia32_movnt" 12463 case 'd': 12464 if (!memcmp(BuiltinName+21, "q", 1)) 12465 IntrinsicID = Intrinsic::x86_sse2_movnt_dq; 12466 break; 12467 case 'p': 12468 switch (BuiltinName[21]) { // "__builtin_ia32_movntp" 12469 case 'd': 12470 IntrinsicID = Intrinsic::x86_sse2_movnt_pd; 12471 break; 12472 case 's': 12473 IntrinsicID = Intrinsic::x86_sse_movnt_ps; 12474 break; 12475 } 12476 break; 12477 } 12478 } 12479 break; 12480 } 12481 } 12482 break; 12483 case 'p': 12484 switch (BuiltinName[16]) { // "__builtin_ia32_p" 12485 case 'a': 12486 if (!memcmp(BuiltinName+17, "ddus", 4)) { 12487 switch (BuiltinName[21]) { // "__builtin_ia32_paddus" 12488 case 'b': 12489 IntrinsicID = Intrinsic::x86_mmx_paddus_b; 12490 break; 12491 case 'w': 12492 IntrinsicID = Intrinsic::x86_mmx_paddus_w; 12493 break; 12494 } 12495 } 12496 break; 12497 case 'c': 12498 if (!memcmp(BuiltinName+17, "mp", 2)) { 12499 switch (BuiltinName[19]) { // "__builtin_ia32_pcmp" 12500 case 'e': 12501 if (!memcmp(BuiltinName+20, "q", 1)) { 12502 switch (BuiltinName[21]) { // "__builtin_ia32_pcmpeq" 12503 case 'b': 12504 IntrinsicID = Intrinsic::x86_mmx_pcmpeq_b; 12505 break; 12506 case 'd': 12507 IntrinsicID = Intrinsic::x86_mmx_pcmpeq_d; 12508 break; 12509 case 'q': 12510 IntrinsicID = Intrinsic::x86_sse41_pcmpeqq; 12511 break; 12512 case 'w': 12513 IntrinsicID = Intrinsic::x86_mmx_pcmpeq_w; 12514 break; 12515 } 12516 } 12517 break; 12518 case 'g': 12519 if (!memcmp(BuiltinName+20, "t", 1)) { 12520 switch (BuiltinName[21]) { // "__builtin_ia32_pcmpgt" 12521 case 'b': 12522 IntrinsicID = Intrinsic::x86_mmx_pcmpgt_b; 12523 break; 12524 case 'd': 12525 IntrinsicID = Intrinsic::x86_mmx_pcmpgt_d; 12526 break; 12527 case 'q': 12528 IntrinsicID = Intrinsic::x86_sse42_pcmpgtq; 12529 break; 12530 case 'w': 12531 IntrinsicID = Intrinsic::x86_mmx_pcmpgt_w; 12532 break; 12533 } 12534 } 12535 break; 12536 } 12537 } 12538 break; 12539 case 'h': 12540 switch (BuiltinName[17]) { // "__builtin_ia32_ph" 12541 case 'a': 12542 if (!memcmp(BuiltinName+18, "ddsw", 4)) 12543 IntrinsicID = Intrinsic::x86_ssse3_phadd_sw; 12544 break; 12545 case 's': 12546 if (!memcmp(BuiltinName+18, "ubsw", 4)) 12547 IntrinsicID = Intrinsic::x86_ssse3_phsub_sw; 12548 break; 12549 } 12550 break; 12551 case 'm': 12552 switch (BuiltinName[17]) { // "__builtin_ia32_pm" 12553 case 'a': 12554 if (!memcmp(BuiltinName+18, "ddwd", 4)) 12555 IntrinsicID = Intrinsic::x86_mmx_pmadd_wd; 12556 break; 12557 case 'u': 12558 if (!memcmp(BuiltinName+18, "l", 1)) { 12559 switch (BuiltinName[19]) { // "__builtin_ia32_pmul" 12560 case 'h': 12561 if (!memcmp(BuiltinName+20, "uw", 2)) 12562 IntrinsicID = Intrinsic::x86_mmx_pmulhu_w; 12563 break; 12564 case 'u': 12565 if (!memcmp(BuiltinName+20, "dq", 2)) 12566 IntrinsicID = Intrinsic::x86_mmx_pmulu_dq; 12567 break; 12568 } 12569 } 12570 break; 12571 } 12572 break; 12573 case 's': 12574 if (!memcmp(BuiltinName+17, "ubus", 4)) { 12575 switch (BuiltinName[21]) { // "__builtin_ia32_psubus" 12576 case 'b': 12577 IntrinsicID = Intrinsic::x86_mmx_psubus_b; 12578 break; 12579 case 'w': 12580 IntrinsicID = Intrinsic::x86_mmx_psubus_w; 12581 break; 12582 } 12583 } 12584 break; 12585 } 12586 break; 12587 case 'r': 12588 switch (BuiltinName[16]) { // "__builtin_ia32_r" 12589 case 'o': 12590 if (!memcmp(BuiltinName+17, "und", 3)) { 12591 switch (BuiltinName[20]) { // "__builtin_ia32_round" 12592 case 'p': 12593 switch (BuiltinName[21]) { // "__builtin_ia32_roundp" 12594 case 'd': 12595 IntrinsicID = Intrinsic::x86_sse41_round_pd; 12596 break; 12597 case 's': 12598 IntrinsicID = Intrinsic::x86_sse41_round_ps; 12599 break; 12600 } 12601 break; 12602 case 's': 12603 switch (BuiltinName[21]) { // "__builtin_ia32_rounds" 12604 case 'd': 12605 IntrinsicID = Intrinsic::x86_sse41_round_sd; 12606 break; 12607 case 's': 12608 IntrinsicID = Intrinsic::x86_sse41_round_ss; 12609 break; 12610 } 12611 break; 12612 } 12613 } 12614 break; 12615 case 's': 12616 if (!memcmp(BuiltinName+17, "qrt", 3)) { 12617 switch (BuiltinName[20]) { // "__builtin_ia32_rsqrt" 12618 case 'p': 12619 if (!memcmp(BuiltinName+21, "s", 1)) 12620 IntrinsicID = Intrinsic::x86_sse_rsqrt_ps; 12621 break; 12622 case 's': 12623 if (!memcmp(BuiltinName+21, "s", 1)) 12624 IntrinsicID = Intrinsic::x86_sse_rsqrt_ss; 12625 break; 12626 } 12627 } 12628 break; 12629 } 12630 break; 12631 case 'u': 12632 if (!memcmp(BuiltinName+16, "comi", 4)) { 12633 switch (BuiltinName[20]) { // "__builtin_ia32_ucomi" 12634 case 'e': 12635 if (!memcmp(BuiltinName+21, "q", 1)) 12636 IntrinsicID = Intrinsic::x86_sse_ucomieq_ss; 12637 break; 12638 case 'g': 12639 switch (BuiltinName[21]) { // "__builtin_ia32_ucomig" 12640 case 'e': 12641 IntrinsicID = Intrinsic::x86_sse_ucomige_ss; 12642 break; 12643 case 't': 12644 IntrinsicID = Intrinsic::x86_sse_ucomigt_ss; 12645 break; 12646 } 12647 break; 12648 case 'l': 12649 switch (BuiltinName[21]) { // "__builtin_ia32_ucomil" 12650 case 'e': 12651 IntrinsicID = Intrinsic::x86_sse_ucomile_ss; 12652 break; 12653 case 't': 12654 IntrinsicID = Intrinsic::x86_sse_ucomilt_ss; 12655 break; 12656 } 12657 break; 12658 } 12659 } 12660 break; 12661 } 12662 } 12663 break; 12664 case 23: 12665 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 12666 switch (BuiltinName[15]) { // "__builtin_ia32_" 12667 case 'a': 12668 if (!memcmp(BuiltinName+16, "ddsubp", 6)) { 12669 switch (BuiltinName[22]) { // "__builtin_ia32_addsubp" 12670 case 'd': 12671 IntrinsicID = Intrinsic::x86_sse3_addsub_pd; 12672 break; 12673 case 's': 12674 IntrinsicID = Intrinsic::x86_sse3_addsub_ps; 12675 break; 12676 } 12677 } 12678 break; 12679 case 'b': 12680 if (!memcmp(BuiltinName+16, "lendvp", 6)) { 12681 switch (BuiltinName[22]) { // "__builtin_ia32_blendvp" 12682 case 'd': 12683 IntrinsicID = Intrinsic::x86_sse41_blendvpd; 12684 break; 12685 case 's': 12686 IntrinsicID = Intrinsic::x86_sse41_blendvps; 12687 break; 12688 } 12689 } 12690 break; 12691 case 'c': 12692 switch (BuiltinName[16]) { // "__builtin_ia32_c" 12693 case 'm': 12694 if (!memcmp(BuiltinName+17, "pp", 2)) { 12695 switch (BuiltinName[19]) { // "__builtin_ia32_cmpp" 12696 case 'd': 12697 if (!memcmp(BuiltinName+20, "256", 3)) 12698 IntrinsicID = Intrinsic::x86_avx_cmp_pd_256; 12699 break; 12700 case 's': 12701 if (!memcmp(BuiltinName+20, "256", 3)) 12702 IntrinsicID = Intrinsic::x86_avx_cmp_ps_256; 12703 break; 12704 } 12705 } 12706 break; 12707 case 'o': 12708 if (!memcmp(BuiltinName+17, "misd", 4)) { 12709 switch (BuiltinName[21]) { // "__builtin_ia32_comisd" 12710 case 'e': 12711 if (!memcmp(BuiltinName+22, "q", 1)) 12712 IntrinsicID = Intrinsic::x86_sse2_comieq_sd; 12713 break; 12714 case 'g': 12715 switch (BuiltinName[22]) { // "__builtin_ia32_comisdg" 12716 case 'e': 12717 IntrinsicID = Intrinsic::x86_sse2_comige_sd; 12718 break; 12719 case 't': 12720 IntrinsicID = Intrinsic::x86_sse2_comigt_sd; 12721 break; 12722 } 12723 break; 12724 case 'l': 12725 switch (BuiltinName[22]) { // "__builtin_ia32_comisdl" 12726 case 'e': 12727 IntrinsicID = Intrinsic::x86_sse2_comile_sd; 12728 break; 12729 case 't': 12730 IntrinsicID = Intrinsic::x86_sse2_comilt_sd; 12731 break; 12732 } 12733 break; 12734 } 12735 } 12736 break; 12737 case 'v': 12738 if (!memcmp(BuiltinName+17, "t", 1)) { 12739 switch (BuiltinName[18]) { // "__builtin_ia32_cvt" 12740 case 'd': 12741 if (!memcmp(BuiltinName+19, "q2p", 3)) { 12742 switch (BuiltinName[22]) { // "__builtin_ia32_cvtdq2p" 12743 case 'd': 12744 IntrinsicID = Intrinsic::x86_sse2_cvtdq2pd; 12745 break; 12746 case 's': 12747 IntrinsicID = Intrinsic::x86_sse2_cvtdq2ps; 12748 break; 12749 } 12750 } 12751 break; 12752 case 'p': 12753 switch (BuiltinName[19]) { // "__builtin_ia32_cvtp" 12754 case 'd': 12755 if (!memcmp(BuiltinName+20, "2", 1)) { 12756 switch (BuiltinName[21]) { // "__builtin_ia32_cvtpd2" 12757 case 'd': 12758 if (!memcmp(BuiltinName+22, "q", 1)) 12759 IntrinsicID = Intrinsic::x86_sse2_cvtpd2dq; 12760 break; 12761 case 'p': 12762 switch (BuiltinName[22]) { // "__builtin_ia32_cvtpd2p" 12763 case 'i': 12764 IntrinsicID = Intrinsic::x86_sse_cvtpd2pi; 12765 break; 12766 case 's': 12767 IntrinsicID = Intrinsic::x86_sse2_cvtpd2ps; 12768 break; 12769 } 12770 break; 12771 } 12772 } 12773 break; 12774 case 'i': 12775 if (!memcmp(BuiltinName+20, "2p", 2)) { 12776 switch (BuiltinName[22]) { // "__builtin_ia32_cvtpi2p" 12777 case 'd': 12778 IntrinsicID = Intrinsic::x86_sse_cvtpi2pd; 12779 break; 12780 case 's': 12781 IntrinsicID = Intrinsic::x86_sse_cvtpi2ps; 12782 break; 12783 } 12784 } 12785 break; 12786 case 's': 12787 if (!memcmp(BuiltinName+20, "2", 1)) { 12788 switch (BuiltinName[21]) { // "__builtin_ia32_cvtps2" 12789 case 'd': 12790 if (!memcmp(BuiltinName+22, "q", 1)) 12791 IntrinsicID = Intrinsic::x86_sse2_cvtps2dq; 12792 break; 12793 case 'p': 12794 switch (BuiltinName[22]) { // "__builtin_ia32_cvtps2p" 12795 case 'd': 12796 IntrinsicID = Intrinsic::x86_sse2_cvtps2pd; 12797 break; 12798 case 'i': 12799 IntrinsicID = Intrinsic::x86_sse_cvtps2pi; 12800 break; 12801 } 12802 break; 12803 } 12804 } 12805 break; 12806 } 12807 break; 12808 case 's': 12809 switch (BuiltinName[19]) { // "__builtin_ia32_cvts" 12810 case 'd': 12811 if (!memcmp(BuiltinName+20, "2s", 2)) { 12812 switch (BuiltinName[22]) { // "__builtin_ia32_cvtsd2s" 12813 case 'i': 12814 IntrinsicID = Intrinsic::x86_sse2_cvtsd2si; 12815 break; 12816 case 's': 12817 IntrinsicID = Intrinsic::x86_sse2_cvtsd2ss; 12818 break; 12819 } 12820 } 12821 break; 12822 case 'i': 12823 if (!memcmp(BuiltinName+20, "2s", 2)) { 12824 switch (BuiltinName[22]) { // "__builtin_ia32_cvtsi2s" 12825 case 'd': 12826 IntrinsicID = Intrinsic::x86_sse2_cvtsi2sd; 12827 break; 12828 case 's': 12829 IntrinsicID = Intrinsic::x86_sse_cvtsi2ss; 12830 break; 12831 } 12832 } 12833 break; 12834 case 's': 12835 if (!memcmp(BuiltinName+20, "2s", 2)) { 12836 switch (BuiltinName[22]) { // "__builtin_ia32_cvtss2s" 12837 case 'd': 12838 IntrinsicID = Intrinsic::x86_sse2_cvtss2sd; 12839 break; 12840 case 'i': 12841 IntrinsicID = Intrinsic::x86_sse_cvtss2si; 12842 break; 12843 } 12844 } 12845 break; 12846 } 12847 break; 12848 } 12849 } 12850 break; 12851 } 12852 break; 12853 case 'l': 12854 if (!memcmp(BuiltinName+16, "ddqu256", 7)) 12855 IntrinsicID = Intrinsic::x86_avx_ldu_dq_256; 12856 break; 12857 case 'm': 12858 switch (BuiltinName[16]) { // "__builtin_ia32_m" 12859 case 'a': 12860 switch (BuiltinName[17]) { // "__builtin_ia32_ma" 12861 case 's': 12862 if (!memcmp(BuiltinName+18, "kmovq", 5)) 12863 IntrinsicID = Intrinsic::x86_mmx_maskmovq; 12864 break; 12865 case 'x': 12866 if (!memcmp(BuiltinName+18, "p", 1)) { 12867 switch (BuiltinName[19]) { // "__builtin_ia32_maxp" 12868 case 'd': 12869 if (!memcmp(BuiltinName+20, "256", 3)) 12870 IntrinsicID = Intrinsic::x86_avx_max_pd_256; 12871 break; 12872 case 's': 12873 if (!memcmp(BuiltinName+20, "256", 3)) 12874 IntrinsicID = Intrinsic::x86_avx_max_ps_256; 12875 break; 12876 } 12877 } 12878 break; 12879 } 12880 break; 12881 case 'i': 12882 if (!memcmp(BuiltinName+17, "np", 2)) { 12883 switch (BuiltinName[19]) { // "__builtin_ia32_minp" 12884 case 'd': 12885 if (!memcmp(BuiltinName+20, "256", 3)) 12886 IntrinsicID = Intrinsic::x86_avx_min_pd_256; 12887 break; 12888 case 's': 12889 if (!memcmp(BuiltinName+20, "256", 3)) 12890 IntrinsicID = Intrinsic::x86_avx_min_ps_256; 12891 break; 12892 } 12893 } 12894 break; 12895 case 'o': 12896 if (!memcmp(BuiltinName+17, "v", 1)) { 12897 switch (BuiltinName[18]) { // "__builtin_ia32_mov" 12898 case 'm': 12899 if (!memcmp(BuiltinName+19, "skp", 3)) { 12900 switch (BuiltinName[22]) { // "__builtin_ia32_movmskp" 12901 case 'd': 12902 IntrinsicID = Intrinsic::x86_sse2_movmsk_pd; 12903 break; 12904 case 's': 12905 IntrinsicID = Intrinsic::x86_sse_movmsk_ps; 12906 break; 12907 } 12908 } 12909 break; 12910 case 'n': 12911 if (!memcmp(BuiltinName+19, "tdqa", 4)) 12912 IntrinsicID = Intrinsic::x86_sse41_movntdqa; 12913 break; 12914 } 12915 } 12916 break; 12917 } 12918 break; 12919 case 'p': 12920 switch (BuiltinName[16]) { // "__builtin_ia32_p" 12921 case 'a': 12922 switch (BuiltinName[17]) { // "__builtin_ia32_pa" 12923 case 'b': 12924 if (!memcmp(BuiltinName+18, "s", 1)) { 12925 switch (BuiltinName[19]) { // "__builtin_ia32_pabs" 12926 case 'b': 12927 if (!memcmp(BuiltinName+20, "128", 3)) 12928 IntrinsicID = Intrinsic::x86_ssse3_pabs_b_128; 12929 break; 12930 case 'd': 12931 if (!memcmp(BuiltinName+20, "128", 3)) 12932 IntrinsicID = Intrinsic::x86_ssse3_pabs_d_128; 12933 break; 12934 case 'w': 12935 if (!memcmp(BuiltinName+20, "128", 3)) 12936 IntrinsicID = Intrinsic::x86_ssse3_pabs_w_128; 12937 break; 12938 } 12939 } 12940 break; 12941 case 'c': 12942 if (!memcmp(BuiltinName+18, "k", 1)) { 12943 switch (BuiltinName[19]) { // "__builtin_ia32_pack" 12944 case 's': 12945 if (!memcmp(BuiltinName+20, "s", 1)) { 12946 switch (BuiltinName[21]) { // "__builtin_ia32_packss" 12947 case 'd': 12948 if (!memcmp(BuiltinName+22, "w", 1)) 12949 IntrinsicID = Intrinsic::x86_mmx_packssdw; 12950 break; 12951 case 'w': 12952 if (!memcmp(BuiltinName+22, "b", 1)) 12953 IntrinsicID = Intrinsic::x86_mmx_packsswb; 12954 break; 12955 } 12956 } 12957 break; 12958 case 'u': 12959 if (!memcmp(BuiltinName+20, "swb", 3)) 12960 IntrinsicID = Intrinsic::x86_mmx_packuswb; 12961 break; 12962 } 12963 } 12964 break; 12965 case 'v': 12966 if (!memcmp(BuiltinName+18, "g", 1)) { 12967 switch (BuiltinName[19]) { // "__builtin_ia32_pavg" 12968 case 'b': 12969 if (!memcmp(BuiltinName+20, "128", 3)) 12970 IntrinsicID = Intrinsic::x86_sse2_pavg_b; 12971 break; 12972 case 'w': 12973 if (!memcmp(BuiltinName+20, "128", 3)) 12974 IntrinsicID = Intrinsic::x86_sse2_pavg_w; 12975 break; 12976 } 12977 } 12978 break; 12979 } 12980 break; 12981 case 'm': 12982 switch (BuiltinName[17]) { // "__builtin_ia32_pm" 12983 case 'o': 12984 if (!memcmp(BuiltinName+18, "vmskb", 5)) 12985 IntrinsicID = Intrinsic::x86_mmx_pmovmskb; 12986 break; 12987 case 'u': 12988 if (!memcmp(BuiltinName+18, "lhrsw", 5)) 12989 IntrinsicID = Intrinsic::x86_ssse3_pmul_hr_sw; 12990 break; 12991 } 12992 break; 12993 case 's': 12994 switch (BuiltinName[17]) { // "__builtin_ia32_ps" 12995 case 'l': 12996 if (!memcmp(BuiltinName+18, "l", 1)) { 12997 switch (BuiltinName[19]) { // "__builtin_ia32_psll" 12998 case 'd': 12999 if (!memcmp(BuiltinName+20, "128", 3)) 13000 IntrinsicID = Intrinsic::x86_sse2_psll_d; 13001 break; 13002 case 'q': 13003 if (!memcmp(BuiltinName+20, "128", 3)) 13004 IntrinsicID = Intrinsic::x86_sse2_psll_q; 13005 break; 13006 case 'w': 13007 if (!memcmp(BuiltinName+20, "128", 3)) 13008 IntrinsicID = Intrinsic::x86_sse2_psll_w; 13009 break; 13010 } 13011 } 13012 break; 13013 case 'r': 13014 switch (BuiltinName[18]) { // "__builtin_ia32_psr" 13015 case 'a': 13016 switch (BuiltinName[19]) { // "__builtin_ia32_psra" 13017 case 'd': 13018 if (!memcmp(BuiltinName+20, "128", 3)) 13019 IntrinsicID = Intrinsic::x86_sse2_psra_d; 13020 break; 13021 case 'w': 13022 if (!memcmp(BuiltinName+20, "128", 3)) 13023 IntrinsicID = Intrinsic::x86_sse2_psra_w; 13024 break; 13025 } 13026 break; 13027 case 'l': 13028 switch (BuiltinName[19]) { // "__builtin_ia32_psrl" 13029 case 'd': 13030 if (!memcmp(BuiltinName+20, "128", 3)) 13031 IntrinsicID = Intrinsic::x86_sse2_psrl_d; 13032 break; 13033 case 'q': 13034 if (!memcmp(BuiltinName+20, "128", 3)) 13035 IntrinsicID = Intrinsic::x86_sse2_psrl_q; 13036 break; 13037 case 'w': 13038 if (!memcmp(BuiltinName+20, "128", 3)) 13039 IntrinsicID = Intrinsic::x86_sse2_psrl_w; 13040 break; 13041 } 13042 break; 13043 } 13044 break; 13045 } 13046 break; 13047 } 13048 break; 13049 case 'r': 13050 if (!memcmp(BuiltinName+16, "cpps256", 7)) 13051 IntrinsicID = Intrinsic::x86_avx_rcp_ps_256; 13052 break; 13053 case 's': 13054 if (!memcmp(BuiltinName+16, "tore", 4)) { 13055 switch (BuiltinName[20]) { // "__builtin_ia32_store" 13056 case 'd': 13057 if (!memcmp(BuiltinName+21, "qu", 2)) 13058 IntrinsicID = Intrinsic::x86_sse2_storeu_dq; 13059 break; 13060 case 'u': 13061 if (!memcmp(BuiltinName+21, "p", 1)) { 13062 switch (BuiltinName[22]) { // "__builtin_ia32_storeup" 13063 case 'd': 13064 IntrinsicID = Intrinsic::x86_sse2_storeu_pd; 13065 break; 13066 case 's': 13067 IntrinsicID = Intrinsic::x86_sse_storeu_ps; 13068 break; 13069 } 13070 } 13071 break; 13072 } 13073 } 13074 break; 13075 case 'u': 13076 if (!memcmp(BuiltinName+16, "comineq", 7)) 13077 IntrinsicID = Intrinsic::x86_sse_ucomineq_ss; 13078 break; 13079 case 'v': 13080 switch (BuiltinName[16]) { // "__builtin_ia32_v" 13081 case 't': 13082 if (!memcmp(BuiltinName+17, "est", 3)) { 13083 switch (BuiltinName[20]) { // "__builtin_ia32_vtest" 13084 case 'c': 13085 if (!memcmp(BuiltinName+21, "p", 1)) { 13086 switch (BuiltinName[22]) { // "__builtin_ia32_vtestcp" 13087 case 'd': 13088 IntrinsicID = Intrinsic::x86_avx_vtestc_pd; 13089 break; 13090 case 's': 13091 IntrinsicID = Intrinsic::x86_avx_vtestc_ps; 13092 break; 13093 } 13094 } 13095 break; 13096 case 'z': 13097 if (!memcmp(BuiltinName+21, "p", 1)) { 13098 switch (BuiltinName[22]) { // "__builtin_ia32_vtestzp" 13099 case 'd': 13100 IntrinsicID = Intrinsic::x86_avx_vtestz_pd; 13101 break; 13102 case 's': 13103 IntrinsicID = Intrinsic::x86_avx_vtestz_ps; 13104 break; 13105 } 13106 } 13107 break; 13108 } 13109 } 13110 break; 13111 case 'z': 13112 if (!memcmp(BuiltinName+17, "eroall", 6)) 13113 IntrinsicID = Intrinsic::x86_avx_vzeroall; 13114 break; 13115 } 13116 break; 13117 } 13118 } 13119 break; 13120 case 24: 13121 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 13122 switch (BuiltinName[15]) { // "__builtin_ia32_" 13123 case 'a': 13124 if (!memcmp(BuiltinName+16, "es", 2)) { 13125 switch (BuiltinName[18]) { // "__builtin_ia32_aes" 13126 case 'd': 13127 if (!memcmp(BuiltinName+19, "ec128", 5)) 13128 IntrinsicID = Intrinsic::x86_aesni_aesdec; 13129 break; 13130 case 'e': 13131 if (!memcmp(BuiltinName+19, "nc128", 5)) 13132 IntrinsicID = Intrinsic::x86_aesni_aesenc; 13133 break; 13134 case 'i': 13135 if (!memcmp(BuiltinName+19, "mc128", 5)) 13136 IntrinsicID = Intrinsic::x86_aesni_aesimc; 13137 break; 13138 } 13139 } 13140 break; 13141 case 'c': 13142 switch (BuiltinName[16]) { // "__builtin_ia32_c" 13143 case 'o': 13144 if (!memcmp(BuiltinName+17, "misdneq", 7)) 13145 IntrinsicID = Intrinsic::x86_sse2_comineq_sd; 13146 break; 13147 case 'v': 13148 if (!memcmp(BuiltinName+17, "tt", 2)) { 13149 switch (BuiltinName[19]) { // "__builtin_ia32_cvtt" 13150 case 'p': 13151 switch (BuiltinName[20]) { // "__builtin_ia32_cvttp" 13152 case 'd': 13153 if (!memcmp(BuiltinName+21, "2", 1)) { 13154 switch (BuiltinName[22]) { // "__builtin_ia32_cvttpd2" 13155 case 'd': 13156 if (!memcmp(BuiltinName+23, "q", 1)) 13157 IntrinsicID = Intrinsic::x86_sse2_cvttpd2dq; 13158 break; 13159 case 'p': 13160 if (!memcmp(BuiltinName+23, "i", 1)) 13161 IntrinsicID = Intrinsic::x86_sse_cvttpd2pi; 13162 break; 13163 } 13164 } 13165 break; 13166 case 's': 13167 if (!memcmp(BuiltinName+21, "2", 1)) { 13168 switch (BuiltinName[22]) { // "__builtin_ia32_cvttps2" 13169 case 'd': 13170 if (!memcmp(BuiltinName+23, "q", 1)) 13171 IntrinsicID = Intrinsic::x86_sse2_cvttps2dq; 13172 break; 13173 case 'p': 13174 if (!memcmp(BuiltinName+23, "i", 1)) 13175 IntrinsicID = Intrinsic::x86_sse_cvttps2pi; 13176 break; 13177 } 13178 } 13179 break; 13180 } 13181 break; 13182 case 's': 13183 switch (BuiltinName[20]) { // "__builtin_ia32_cvtts" 13184 case 'd': 13185 if (!memcmp(BuiltinName+21, "2si", 3)) 13186 IntrinsicID = Intrinsic::x86_sse2_cvttsd2si; 13187 break; 13188 case 's': 13189 if (!memcmp(BuiltinName+21, "2si", 3)) 13190 IntrinsicID = Intrinsic::x86_sse_cvttss2si; 13191 break; 13192 } 13193 break; 13194 } 13195 } 13196 break; 13197 } 13198 break; 13199 case 'h': 13200 switch (BuiltinName[16]) { // "__builtin_ia32_h" 13201 case 'a': 13202 if (!memcmp(BuiltinName+17, "ddp", 3)) { 13203 switch (BuiltinName[20]) { // "__builtin_ia32_haddp" 13204 case 'd': 13205 if (!memcmp(BuiltinName+21, "256", 3)) 13206 IntrinsicID = Intrinsic::x86_avx_hadd_pd_256; 13207 break; 13208 case 's': 13209 if (!memcmp(BuiltinName+21, "256", 3)) 13210 IntrinsicID = Intrinsic::x86_avx_hadd_ps_256; 13211 break; 13212 } 13213 } 13214 break; 13215 case 's': 13216 if (!memcmp(BuiltinName+17, "ubp", 3)) { 13217 switch (BuiltinName[20]) { // "__builtin_ia32_hsubp" 13218 case 'd': 13219 if (!memcmp(BuiltinName+21, "256", 3)) 13220 IntrinsicID = Intrinsic::x86_avx_hsub_pd_256; 13221 break; 13222 case 's': 13223 if (!memcmp(BuiltinName+21, "256", 3)) 13224 IntrinsicID = Intrinsic::x86_avx_hsub_ps_256; 13225 break; 13226 } 13227 } 13228 break; 13229 } 13230 break; 13231 case 'p': 13232 switch (BuiltinName[16]) { // "__builtin_ia32_p" 13233 case 'a': 13234 if (!memcmp(BuiltinName+17, "dds", 3)) { 13235 switch (BuiltinName[20]) { // "__builtin_ia32_padds" 13236 case 'b': 13237 if (!memcmp(BuiltinName+21, "128", 3)) 13238 IntrinsicID = Intrinsic::x86_sse2_padds_b; 13239 break; 13240 case 'w': 13241 if (!memcmp(BuiltinName+21, "128", 3)) 13242 IntrinsicID = Intrinsic::x86_sse2_padds_w; 13243 break; 13244 } 13245 } 13246 break; 13247 case 'h': 13248 switch (BuiltinName[17]) { // "__builtin_ia32_ph" 13249 case 'a': 13250 if (!memcmp(BuiltinName+18, "dd", 2)) { 13251 switch (BuiltinName[20]) { // "__builtin_ia32_phadd" 13252 case 'd': 13253 if (!memcmp(BuiltinName+21, "128", 3)) 13254 IntrinsicID = Intrinsic::x86_ssse3_phadd_d_128; 13255 break; 13256 case 'w': 13257 if (!memcmp(BuiltinName+21, "128", 3)) 13258 IntrinsicID = Intrinsic::x86_ssse3_phadd_w_128; 13259 break; 13260 } 13261 } 13262 break; 13263 case 's': 13264 if (!memcmp(BuiltinName+18, "ub", 2)) { 13265 switch (BuiltinName[20]) { // "__builtin_ia32_phsub" 13266 case 'd': 13267 if (!memcmp(BuiltinName+21, "128", 3)) 13268 IntrinsicID = Intrinsic::x86_ssse3_phsub_d_128; 13269 break; 13270 case 'w': 13271 if (!memcmp(BuiltinName+21, "128", 3)) 13272 IntrinsicID = Intrinsic::x86_ssse3_phsub_w_128; 13273 break; 13274 } 13275 } 13276 break; 13277 } 13278 break; 13279 case 'm': 13280 switch (BuiltinName[17]) { // "__builtin_ia32_pm" 13281 case 'a': 13282 switch (BuiltinName[18]) { // "__builtin_ia32_pma" 13283 case 'd': 13284 if (!memcmp(BuiltinName+19, "dubsw", 5)) 13285 IntrinsicID = Intrinsic::x86_ssse3_pmadd_ub_sw; 13286 break; 13287 case 'x': 13288 switch (BuiltinName[19]) { // "__builtin_ia32_pmax" 13289 case 's': 13290 switch (BuiltinName[20]) { // "__builtin_ia32_pmaxs" 13291 case 'b': 13292 if (!memcmp(BuiltinName+21, "128", 3)) 13293 IntrinsicID = Intrinsic::x86_sse41_pmaxsb; 13294 break; 13295 case 'd': 13296 if (!memcmp(BuiltinName+21, "128", 3)) 13297 IntrinsicID = Intrinsic::x86_sse41_pmaxsd; 13298 break; 13299 case 'w': 13300 if (!memcmp(BuiltinName+21, "128", 3)) 13301 IntrinsicID = Intrinsic::x86_sse2_pmaxs_w; 13302 break; 13303 } 13304 break; 13305 case 'u': 13306 switch (BuiltinName[20]) { // "__builtin_ia32_pmaxu" 13307 case 'b': 13308 if (!memcmp(BuiltinName+21, "128", 3)) 13309 IntrinsicID = Intrinsic::x86_sse2_pmaxu_b; 13310 break; 13311 case 'd': 13312 if (!memcmp(BuiltinName+21, "128", 3)) 13313 IntrinsicID = Intrinsic::x86_sse41_pmaxud; 13314 break; 13315 case 'w': 13316 if (!memcmp(BuiltinName+21, "128", 3)) 13317 IntrinsicID = Intrinsic::x86_sse41_pmaxuw; 13318 break; 13319 } 13320 break; 13321 } 13322 break; 13323 } 13324 break; 13325 case 'i': 13326 if (!memcmp(BuiltinName+18, "n", 1)) { 13327 switch (BuiltinName[19]) { // "__builtin_ia32_pmin" 13328 case 's': 13329 switch (BuiltinName[20]) { // "__builtin_ia32_pmins" 13330 case 'b': 13331 if (!memcmp(BuiltinName+21, "128", 3)) 13332 IntrinsicID = Intrinsic::x86_sse41_pminsb; 13333 break; 13334 case 'd': 13335 if (!memcmp(BuiltinName+21, "128", 3)) 13336 IntrinsicID = Intrinsic::x86_sse41_pminsd; 13337 break; 13338 case 'w': 13339 if (!memcmp(BuiltinName+21, "128", 3)) 13340 IntrinsicID = Intrinsic::x86_sse2_pmins_w; 13341 break; 13342 } 13343 break; 13344 case 'u': 13345 switch (BuiltinName[20]) { // "__builtin_ia32_pminu" 13346 case 'b': 13347 if (!memcmp(BuiltinName+21, "128", 3)) 13348 IntrinsicID = Intrinsic::x86_sse2_pminu_b; 13349 break; 13350 case 'd': 13351 if (!memcmp(BuiltinName+21, "128", 3)) 13352 IntrinsicID = Intrinsic::x86_sse41_pminud; 13353 break; 13354 case 'w': 13355 if (!memcmp(BuiltinName+21, "128", 3)) 13356 IntrinsicID = Intrinsic::x86_sse41_pminuw; 13357 break; 13358 } 13359 break; 13360 } 13361 } 13362 break; 13363 case 'u': 13364 if (!memcmp(BuiltinName+18, "l", 1)) { 13365 switch (BuiltinName[19]) { // "__builtin_ia32_pmul" 13366 case 'd': 13367 if (!memcmp(BuiltinName+20, "q128", 4)) 13368 IntrinsicID = Intrinsic::x86_sse41_pmuldq; 13369 break; 13370 case 'h': 13371 if (!memcmp(BuiltinName+20, "w128", 4)) 13372 IntrinsicID = Intrinsic::x86_sse2_pmulh_w; 13373 break; 13374 } 13375 } 13376 break; 13377 } 13378 break; 13379 case 's': 13380 switch (BuiltinName[17]) { // "__builtin_ia32_ps" 13381 case 'a': 13382 if (!memcmp(BuiltinName+18, "dbw128", 6)) 13383 IntrinsicID = Intrinsic::x86_sse2_psad_bw; 13384 break; 13385 case 'h': 13386 if (!memcmp(BuiltinName+18, "ufb128", 6)) 13387 IntrinsicID = Intrinsic::x86_ssse3_pshuf_b_128; 13388 break; 13389 case 'i': 13390 if (!memcmp(BuiltinName+18, "gn", 2)) { 13391 switch (BuiltinName[20]) { // "__builtin_ia32_psign" 13392 case 'b': 13393 if (!memcmp(BuiltinName+21, "128", 3)) 13394 IntrinsicID = Intrinsic::x86_ssse3_psign_b_128; 13395 break; 13396 case 'd': 13397 if (!memcmp(BuiltinName+21, "128", 3)) 13398 IntrinsicID = Intrinsic::x86_ssse3_psign_d_128; 13399 break; 13400 case 'w': 13401 if (!memcmp(BuiltinName+21, "128", 3)) 13402 IntrinsicID = Intrinsic::x86_ssse3_psign_w_128; 13403 break; 13404 } 13405 } 13406 break; 13407 case 'l': 13408 if (!memcmp(BuiltinName+18, "l", 1)) { 13409 switch (BuiltinName[19]) { // "__builtin_ia32_psll" 13410 case 'd': 13411 if (!memcmp(BuiltinName+20, "i128", 4)) 13412 IntrinsicID = Intrinsic::x86_sse2_pslli_d; 13413 break; 13414 case 'q': 13415 if (!memcmp(BuiltinName+20, "i128", 4)) 13416 IntrinsicID = Intrinsic::x86_sse2_pslli_q; 13417 break; 13418 case 'w': 13419 if (!memcmp(BuiltinName+20, "i128", 4)) 13420 IntrinsicID = Intrinsic::x86_sse2_pslli_w; 13421 break; 13422 } 13423 } 13424 break; 13425 case 'r': 13426 switch (BuiltinName[18]) { // "__builtin_ia32_psr" 13427 case 'a': 13428 switch (BuiltinName[19]) { // "__builtin_ia32_psra" 13429 case 'd': 13430 if (!memcmp(BuiltinName+20, "i128", 4)) 13431 IntrinsicID = Intrinsic::x86_sse2_psrai_d; 13432 break; 13433 case 'w': 13434 if (!memcmp(BuiltinName+20, "i128", 4)) 13435 IntrinsicID = Intrinsic::x86_sse2_psrai_w; 13436 break; 13437 } 13438 break; 13439 case 'l': 13440 switch (BuiltinName[19]) { // "__builtin_ia32_psrl" 13441 case 'd': 13442 if (!memcmp(BuiltinName+20, "i128", 4)) 13443 IntrinsicID = Intrinsic::x86_sse2_psrli_d; 13444 break; 13445 case 'q': 13446 if (!memcmp(BuiltinName+20, "i128", 4)) 13447 IntrinsicID = Intrinsic::x86_sse2_psrli_q; 13448 break; 13449 case 'w': 13450 if (!memcmp(BuiltinName+20, "i128", 4)) 13451 IntrinsicID = Intrinsic::x86_sse2_psrli_w; 13452 break; 13453 } 13454 break; 13455 } 13456 break; 13457 case 'u': 13458 if (!memcmp(BuiltinName+18, "bs", 2)) { 13459 switch (BuiltinName[20]) { // "__builtin_ia32_psubs" 13460 case 'b': 13461 if (!memcmp(BuiltinName+21, "128", 3)) 13462 IntrinsicID = Intrinsic::x86_sse2_psubs_b; 13463 break; 13464 case 'w': 13465 if (!memcmp(BuiltinName+21, "128", 3)) 13466 IntrinsicID = Intrinsic::x86_sse2_psubs_w; 13467 break; 13468 } 13469 } 13470 break; 13471 } 13472 break; 13473 case 't': 13474 if (!memcmp(BuiltinName+17, "est", 3)) { 13475 switch (BuiltinName[20]) { // "__builtin_ia32_ptest" 13476 case 'c': 13477 switch (BuiltinName[21]) { // "__builtin_ia32_ptestc" 13478 case '1': 13479 if (!memcmp(BuiltinName+22, "28", 2)) 13480 IntrinsicID = Intrinsic::x86_sse41_ptestc; 13481 break; 13482 case '2': 13483 if (!memcmp(BuiltinName+22, "56", 2)) 13484 IntrinsicID = Intrinsic::x86_avx_ptestc_256; 13485 break; 13486 } 13487 break; 13488 case 'z': 13489 switch (BuiltinName[21]) { // "__builtin_ia32_ptestz" 13490 case '1': 13491 if (!memcmp(BuiltinName+22, "28", 2)) 13492 IntrinsicID = Intrinsic::x86_sse41_ptestz; 13493 break; 13494 case '2': 13495 if (!memcmp(BuiltinName+22, "56", 2)) 13496 IntrinsicID = Intrinsic::x86_avx_ptestz_256; 13497 break; 13498 } 13499 break; 13500 } 13501 } 13502 break; 13503 case 'u': 13504 if (!memcmp(BuiltinName+17, "npck", 4)) { 13505 switch (BuiltinName[21]) { // "__builtin_ia32_punpck" 13506 case 'h': 13507 switch (BuiltinName[22]) { // "__builtin_ia32_punpckh" 13508 case 'b': 13509 if (!memcmp(BuiltinName+23, "w", 1)) 13510 IntrinsicID = Intrinsic::x86_mmx_punpckhbw; 13511 break; 13512 case 'd': 13513 if (!memcmp(BuiltinName+23, "q", 1)) 13514 IntrinsicID = Intrinsic::x86_mmx_punpckhdq; 13515 break; 13516 case 'w': 13517 if (!memcmp(BuiltinName+23, "d", 1)) 13518 IntrinsicID = Intrinsic::x86_mmx_punpckhwd; 13519 break; 13520 } 13521 break; 13522 case 'l': 13523 switch (BuiltinName[22]) { // "__builtin_ia32_punpckl" 13524 case 'b': 13525 if (!memcmp(BuiltinName+23, "w", 1)) 13526 IntrinsicID = Intrinsic::x86_mmx_punpcklbw; 13527 break; 13528 case 'd': 13529 if (!memcmp(BuiltinName+23, "q", 1)) 13530 IntrinsicID = Intrinsic::x86_mmx_punpckldq; 13531 break; 13532 case 'w': 13533 if (!memcmp(BuiltinName+23, "d", 1)) 13534 IntrinsicID = Intrinsic::x86_mmx_punpcklwd; 13535 break; 13536 } 13537 break; 13538 } 13539 } 13540 break; 13541 } 13542 break; 13543 case 's': 13544 if (!memcmp(BuiltinName+16, "qrtp", 4)) { 13545 switch (BuiltinName[20]) { // "__builtin_ia32_sqrtp" 13546 case 'd': 13547 if (!memcmp(BuiltinName+21, "256", 3)) 13548 IntrinsicID = Intrinsic::x86_avx_sqrt_pd_256; 13549 break; 13550 case 's': 13551 if (!memcmp(BuiltinName+21, "256", 3)) 13552 IntrinsicID = Intrinsic::x86_avx_sqrt_ps_256; 13553 break; 13554 } 13555 } 13556 break; 13557 case 'u': 13558 if (!memcmp(BuiltinName+16, "comisd", 6)) { 13559 switch (BuiltinName[22]) { // "__builtin_ia32_ucomisd" 13560 case 'e': 13561 if (!memcmp(BuiltinName+23, "q", 1)) 13562 IntrinsicID = Intrinsic::x86_sse2_ucomieq_sd; 13563 break; 13564 case 'g': 13565 switch (BuiltinName[23]) { // "__builtin_ia32_ucomisdg" 13566 case 'e': 13567 IntrinsicID = Intrinsic::x86_sse2_ucomige_sd; 13568 break; 13569 case 't': 13570 IntrinsicID = Intrinsic::x86_sse2_ucomigt_sd; 13571 break; 13572 } 13573 break; 13574 case 'l': 13575 switch (BuiltinName[23]) { // "__builtin_ia32_ucomisdl" 13576 case 'e': 13577 IntrinsicID = Intrinsic::x86_sse2_ucomile_sd; 13578 break; 13579 case 't': 13580 IntrinsicID = Intrinsic::x86_sse2_ucomilt_sd; 13581 break; 13582 } 13583 break; 13584 } 13585 } 13586 break; 13587 case 'v': 13588 if (!memcmp(BuiltinName+16, "permilp", 7)) { 13589 switch (BuiltinName[23]) { // "__builtin_ia32_vpermilp" 13590 case 'd': 13591 IntrinsicID = Intrinsic::x86_avx_vpermil_pd; 13592 break; 13593 case 's': 13594 IntrinsicID = Intrinsic::x86_avx_vpermil_ps; 13595 break; 13596 } 13597 } 13598 break; 13599 } 13600 } 13601 break; 13602 case 25: 13603 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 13604 switch (BuiltinName[15]) { // "__builtin_ia32_" 13605 case 'b': 13606 if (!memcmp(BuiltinName+16, "lendp", 5)) { 13607 switch (BuiltinName[21]) { // "__builtin_ia32_blendp" 13608 case 'd': 13609 if (!memcmp(BuiltinName+22, "256", 3)) 13610 IntrinsicID = Intrinsic::x86_avx_blend_pd_256; 13611 break; 13612 case 's': 13613 if (!memcmp(BuiltinName+22, "256", 3)) 13614 IntrinsicID = Intrinsic::x86_avx_blend_ps_256; 13615 break; 13616 } 13617 } 13618 break; 13619 case 'c': 13620 if (!memcmp(BuiltinName+16, "vts", 3)) { 13621 switch (BuiltinName[19]) { // "__builtin_ia32_cvts" 13622 case 'd': 13623 if (!memcmp(BuiltinName+20, "2si64", 5)) 13624 IntrinsicID = Intrinsic::x86_sse2_cvtsd2si64; 13625 break; 13626 case 'i': 13627 if (!memcmp(BuiltinName+20, "642s", 4)) { 13628 switch (BuiltinName[24]) { // "__builtin_ia32_cvtsi642s" 13629 case 'd': 13630 IntrinsicID = Intrinsic::x86_sse2_cvtsi642sd; 13631 break; 13632 case 's': 13633 IntrinsicID = Intrinsic::x86_sse_cvtsi642ss; 13634 break; 13635 } 13636 } 13637 break; 13638 case 's': 13639 if (!memcmp(BuiltinName+20, "2si64", 5)) 13640 IntrinsicID = Intrinsic::x86_sse_cvtss2si64; 13641 break; 13642 } 13643 } 13644 break; 13645 case 'l': 13646 if (!memcmp(BuiltinName+16, "oad", 3)) { 13647 switch (BuiltinName[19]) { // "__builtin_ia32_load" 13648 case 'd': 13649 if (!memcmp(BuiltinName+20, "qu256", 5)) 13650 IntrinsicID = Intrinsic::x86_avx_loadu_dq_256; 13651 break; 13652 case 'u': 13653 if (!memcmp(BuiltinName+20, "p", 1)) { 13654 switch (BuiltinName[21]) { // "__builtin_ia32_loadup" 13655 case 'd': 13656 if (!memcmp(BuiltinName+22, "256", 3)) 13657 IntrinsicID = Intrinsic::x86_avx_loadu_pd_256; 13658 break; 13659 case 's': 13660 if (!memcmp(BuiltinName+22, "256", 3)) 13661 IntrinsicID = Intrinsic::x86_avx_loadu_ps_256; 13662 break; 13663 } 13664 } 13665 break; 13666 } 13667 } 13668 break; 13669 case 'm': 13670 switch (BuiltinName[16]) { // "__builtin_ia32_m" 13671 case 'a': 13672 if (!memcmp(BuiltinName+17, "sk", 2)) { 13673 switch (BuiltinName[19]) { // "__builtin_ia32_mask" 13674 case 'l': 13675 if (!memcmp(BuiltinName+20, "oadp", 4)) { 13676 switch (BuiltinName[24]) { // "__builtin_ia32_maskloadp" 13677 case 'd': 13678 IntrinsicID = Intrinsic::x86_avx_maskload_pd; 13679 break; 13680 case 's': 13681 IntrinsicID = Intrinsic::x86_avx_maskload_ps; 13682 break; 13683 } 13684 } 13685 break; 13686 case 'm': 13687 if (!memcmp(BuiltinName+20, "ovdqu", 5)) 13688 IntrinsicID = Intrinsic::x86_sse2_maskmov_dqu; 13689 break; 13690 } 13691 } 13692 break; 13693 case 'o': 13694 if (!memcmp(BuiltinName+17, "vnt", 3)) { 13695 switch (BuiltinName[20]) { // "__builtin_ia32_movnt" 13696 case 'd': 13697 if (!memcmp(BuiltinName+21, "q256", 4)) 13698 IntrinsicID = Intrinsic::x86_avx_movnt_dq_256; 13699 break; 13700 case 'p': 13701 switch (BuiltinName[21]) { // "__builtin_ia32_movntp" 13702 case 'd': 13703 if (!memcmp(BuiltinName+22, "256", 3)) 13704 IntrinsicID = Intrinsic::x86_avx_movnt_pd_256; 13705 break; 13706 case 's': 13707 if (!memcmp(BuiltinName+22, "256", 3)) 13708 IntrinsicID = Intrinsic::x86_avx_movnt_ps_256; 13709 break; 13710 } 13711 break; 13712 } 13713 } 13714 break; 13715 case 'p': 13716 if (!memcmp(BuiltinName+17, "sadbw128", 8)) 13717 IntrinsicID = Intrinsic::x86_sse41_mpsadbw; 13718 break; 13719 } 13720 break; 13721 case 'p': 13722 switch (BuiltinName[16]) { // "__builtin_ia32_p" 13723 case 'a': 13724 if (!memcmp(BuiltinName+17, "ddus", 4)) { 13725 switch (BuiltinName[21]) { // "__builtin_ia32_paddus" 13726 case 'b': 13727 if (!memcmp(BuiltinName+22, "128", 3)) 13728 IntrinsicID = Intrinsic::x86_sse2_paddus_b; 13729 break; 13730 case 'w': 13731 if (!memcmp(BuiltinName+22, "128", 3)) 13732 IntrinsicID = Intrinsic::x86_sse2_paddus_w; 13733 break; 13734 } 13735 } 13736 break; 13737 case 'b': 13738 if (!memcmp(BuiltinName+17, "lendw128", 8)) 13739 IntrinsicID = Intrinsic::x86_sse41_pblendw; 13740 break; 13741 case 'c': 13742 if (!memcmp(BuiltinName+17, "mp", 2)) { 13743 switch (BuiltinName[19]) { // "__builtin_ia32_pcmp" 13744 case 'e': 13745 if (!memcmp(BuiltinName+20, "q", 1)) { 13746 switch (BuiltinName[21]) { // "__builtin_ia32_pcmpeq" 13747 case 'b': 13748 if (!memcmp(BuiltinName+22, "128", 3)) 13749 IntrinsicID = Intrinsic::x86_sse2_pcmpeq_b; 13750 break; 13751 case 'd': 13752 if (!memcmp(BuiltinName+22, "128", 3)) 13753 IntrinsicID = Intrinsic::x86_sse2_pcmpeq_d; 13754 break; 13755 case 'w': 13756 if (!memcmp(BuiltinName+22, "128", 3)) 13757 IntrinsicID = Intrinsic::x86_sse2_pcmpeq_w; 13758 break; 13759 } 13760 } 13761 break; 13762 case 'g': 13763 if (!memcmp(BuiltinName+20, "t", 1)) { 13764 switch (BuiltinName[21]) { // "__builtin_ia32_pcmpgt" 13765 case 'b': 13766 if (!memcmp(BuiltinName+22, "128", 3)) 13767 IntrinsicID = Intrinsic::x86_sse2_pcmpgt_b; 13768 break; 13769 case 'd': 13770 if (!memcmp(BuiltinName+22, "128", 3)) 13771 IntrinsicID = Intrinsic::x86_sse2_pcmpgt_d; 13772 break; 13773 case 'w': 13774 if (!memcmp(BuiltinName+22, "128", 3)) 13775 IntrinsicID = Intrinsic::x86_sse2_pcmpgt_w; 13776 break; 13777 } 13778 } 13779 break; 13780 } 13781 } 13782 break; 13783 case 'h': 13784 switch (BuiltinName[17]) { // "__builtin_ia32_ph" 13785 case 'a': 13786 if (!memcmp(BuiltinName+18, "ddsw128", 7)) 13787 IntrinsicID = Intrinsic::x86_ssse3_phadd_sw_128; 13788 break; 13789 case 's': 13790 if (!memcmp(BuiltinName+18, "ubsw128", 7)) 13791 IntrinsicID = Intrinsic::x86_ssse3_phsub_sw_128; 13792 break; 13793 } 13794 break; 13795 case 'm': 13796 switch (BuiltinName[17]) { // "__builtin_ia32_pm" 13797 case 'a': 13798 if (!memcmp(BuiltinName+18, "ddwd128", 7)) 13799 IntrinsicID = Intrinsic::x86_sse2_pmadd_wd; 13800 break; 13801 case 'u': 13802 if (!memcmp(BuiltinName+18, "l", 1)) { 13803 switch (BuiltinName[19]) { // "__builtin_ia32_pmul" 13804 case 'h': 13805 if (!memcmp(BuiltinName+20, "uw128", 5)) 13806 IntrinsicID = Intrinsic::x86_sse2_pmulhu_w; 13807 break; 13808 case 'u': 13809 if (!memcmp(BuiltinName+20, "dq128", 5)) 13810 IntrinsicID = Intrinsic::x86_sse2_pmulu_dq; 13811 break; 13812 } 13813 } 13814 break; 13815 } 13816 break; 13817 case 's': 13818 switch (BuiltinName[17]) { // "__builtin_ia32_ps" 13819 case 'l': 13820 if (!memcmp(BuiltinName+18, "ldqi128", 7)) 13821 IntrinsicID = Intrinsic::x86_sse2_psll_dq; 13822 break; 13823 case 'r': 13824 if (!memcmp(BuiltinName+18, "ldqi128", 7)) 13825 IntrinsicID = Intrinsic::x86_sse2_psrl_dq; 13826 break; 13827 case 'u': 13828 if (!memcmp(BuiltinName+18, "bus", 3)) { 13829 switch (BuiltinName[21]) { // "__builtin_ia32_psubus" 13830 case 'b': 13831 if (!memcmp(BuiltinName+22, "128", 3)) 13832 IntrinsicID = Intrinsic::x86_sse2_psubus_b; 13833 break; 13834 case 'w': 13835 if (!memcmp(BuiltinName+22, "128", 3)) 13836 IntrinsicID = Intrinsic::x86_sse2_psubus_w; 13837 break; 13838 } 13839 } 13840 break; 13841 } 13842 break; 13843 } 13844 break; 13845 case 'r': 13846 switch (BuiltinName[16]) { // "__builtin_ia32_r" 13847 case 'o': 13848 if (!memcmp(BuiltinName+17, "undp", 4)) { 13849 switch (BuiltinName[21]) { // "__builtin_ia32_roundp" 13850 case 'd': 13851 if (!memcmp(BuiltinName+22, "256", 3)) 13852 IntrinsicID = Intrinsic::x86_avx_round_pd_256; 13853 break; 13854 case 's': 13855 if (!memcmp(BuiltinName+22, "256", 3)) 13856 IntrinsicID = Intrinsic::x86_avx_round_ps_256; 13857 break; 13858 } 13859 } 13860 break; 13861 case 's': 13862 if (!memcmp(BuiltinName+17, "qrtps256", 8)) 13863 IntrinsicID = Intrinsic::x86_avx_rsqrt_ps_256; 13864 break; 13865 } 13866 break; 13867 case 's': 13868 if (!memcmp(BuiltinName+16, "torelv4si", 9)) 13869 IntrinsicID = Intrinsic::x86_sse2_storel_dq; 13870 break; 13871 case 'u': 13872 if (!memcmp(BuiltinName+16, "comisdneq", 9)) 13873 IntrinsicID = Intrinsic::x86_sse2_ucomineq_sd; 13874 break; 13875 case 'v': 13876 switch (BuiltinName[16]) { // "__builtin_ia32_v" 13877 case 't': 13878 if (!memcmp(BuiltinName+17, "estnzcp", 7)) { 13879 switch (BuiltinName[24]) { // "__builtin_ia32_vtestnzcp" 13880 case 'd': 13881 IntrinsicID = Intrinsic::x86_avx_vtestnzc_pd; 13882 break; 13883 case 's': 13884 IntrinsicID = Intrinsic::x86_avx_vtestnzc_ps; 13885 break; 13886 } 13887 } 13888 break; 13889 case 'z': 13890 if (!memcmp(BuiltinName+17, "eroupper", 8)) 13891 IntrinsicID = Intrinsic::x86_avx_vzeroupper; 13892 break; 13893 } 13894 break; 13895 } 13896 } 13897 break; 13898 case 26: 13899 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 13900 switch (BuiltinName[15]) { // "__builtin_ia32_" 13901 case 'a': 13902 if (!memcmp(BuiltinName+16, "ddsubp", 6)) { 13903 switch (BuiltinName[22]) { // "__builtin_ia32_addsubp" 13904 case 'd': 13905 if (!memcmp(BuiltinName+23, "256", 3)) 13906 IntrinsicID = Intrinsic::x86_avx_addsub_pd_256; 13907 break; 13908 case 's': 13909 if (!memcmp(BuiltinName+23, "256", 3)) 13910 IntrinsicID = Intrinsic::x86_avx_addsub_ps_256; 13911 break; 13912 } 13913 } 13914 break; 13915 case 'b': 13916 if (!memcmp(BuiltinName+16, "lendvp", 6)) { 13917 switch (BuiltinName[22]) { // "__builtin_ia32_blendvp" 13918 case 'd': 13919 if (!memcmp(BuiltinName+23, "256", 3)) 13920 IntrinsicID = Intrinsic::x86_avx_blendv_pd_256; 13921 break; 13922 case 's': 13923 if (!memcmp(BuiltinName+23, "256", 3)) 13924 IntrinsicID = Intrinsic::x86_avx_blendv_ps_256; 13925 break; 13926 } 13927 } 13928 break; 13929 case 'c': 13930 if (!memcmp(BuiltinName+16, "vt", 2)) { 13931 switch (BuiltinName[18]) { // "__builtin_ia32_cvt" 13932 case 'd': 13933 if (!memcmp(BuiltinName+19, "q2p", 3)) { 13934 switch (BuiltinName[22]) { // "__builtin_ia32_cvtdq2p" 13935 case 'd': 13936 if (!memcmp(BuiltinName+23, "256", 3)) 13937 IntrinsicID = Intrinsic::x86_avx_cvtdq2_pd_256; 13938 break; 13939 case 's': 13940 if (!memcmp(BuiltinName+23, "256", 3)) 13941 IntrinsicID = Intrinsic::x86_avx_cvtdq2_ps_256; 13942 break; 13943 } 13944 } 13945 break; 13946 case 'p': 13947 switch (BuiltinName[19]) { // "__builtin_ia32_cvtp" 13948 case 'd': 13949 if (!memcmp(BuiltinName+20, "2", 1)) { 13950 switch (BuiltinName[21]) { // "__builtin_ia32_cvtpd2" 13951 case 'd': 13952 if (!memcmp(BuiltinName+22, "q256", 4)) 13953 IntrinsicID = Intrinsic::x86_avx_cvt_pd2dq_256; 13954 break; 13955 case 'p': 13956 if (!memcmp(BuiltinName+22, "s256", 4)) 13957 IntrinsicID = Intrinsic::x86_avx_cvt_pd2_ps_256; 13958 break; 13959 } 13960 } 13961 break; 13962 case 's': 13963 if (!memcmp(BuiltinName+20, "2", 1)) { 13964 switch (BuiltinName[21]) { // "__builtin_ia32_cvtps2" 13965 case 'd': 13966 if (!memcmp(BuiltinName+22, "q256", 4)) 13967 IntrinsicID = Intrinsic::x86_avx_cvt_ps2dq_256; 13968 break; 13969 case 'p': 13970 if (!memcmp(BuiltinName+22, "d256", 4)) 13971 IntrinsicID = Intrinsic::x86_avx_cvt_ps2_pd_256; 13972 break; 13973 } 13974 } 13975 break; 13976 } 13977 break; 13978 case 't': 13979 if (!memcmp(BuiltinName+19, "s", 1)) { 13980 switch (BuiltinName[20]) { // "__builtin_ia32_cvtts" 13981 case 'd': 13982 if (!memcmp(BuiltinName+21, "2si64", 5)) 13983 IntrinsicID = Intrinsic::x86_sse2_cvttsd2si64; 13984 break; 13985 case 's': 13986 if (!memcmp(BuiltinName+21, "2si64", 5)) 13987 IntrinsicID = Intrinsic::x86_sse_cvttss2si64; 13988 break; 13989 } 13990 } 13991 break; 13992 } 13993 } 13994 break; 13995 case 'i': 13996 if (!memcmp(BuiltinName+16, "nsertps128", 10)) 13997 IntrinsicID = Intrinsic::x86_sse41_insertps; 13998 break; 13999 case 'm': 14000 switch (BuiltinName[16]) { // "__builtin_ia32_m" 14001 case 'a': 14002 if (!memcmp(BuiltinName+17, "skstorep", 8)) { 14003 switch (BuiltinName[25]) { // "__builtin_ia32_maskstorep" 14004 case 'd': 14005 IntrinsicID = Intrinsic::x86_avx_maskstore_pd; 14006 break; 14007 case 's': 14008 IntrinsicID = Intrinsic::x86_avx_maskstore_ps; 14009 break; 14010 } 14011 } 14012 break; 14013 case 'o': 14014 if (!memcmp(BuiltinName+17, "vmskp", 5)) { 14015 switch (BuiltinName[22]) { // "__builtin_ia32_movmskp" 14016 case 'd': 14017 if (!memcmp(BuiltinName+23, "256", 3)) 14018 IntrinsicID = Intrinsic::x86_avx_movmsk_pd_256; 14019 break; 14020 case 's': 14021 if (!memcmp(BuiltinName+23, "256", 3)) 14022 IntrinsicID = Intrinsic::x86_avx_movmsk_ps_256; 14023 break; 14024 } 14025 } 14026 break; 14027 } 14028 break; 14029 case 'p': 14030 switch (BuiltinName[16]) { // "__builtin_ia32_p" 14031 case 'a': 14032 if (!memcmp(BuiltinName+17, "ck", 2)) { 14033 switch (BuiltinName[19]) { // "__builtin_ia32_pack" 14034 case 's': 14035 if (!memcmp(BuiltinName+20, "s", 1)) { 14036 switch (BuiltinName[21]) { // "__builtin_ia32_packss" 14037 case 'd': 14038 if (!memcmp(BuiltinName+22, "w128", 4)) 14039 IntrinsicID = Intrinsic::x86_sse2_packssdw_128; 14040 break; 14041 case 'w': 14042 if (!memcmp(BuiltinName+22, "b128", 4)) 14043 IntrinsicID = Intrinsic::x86_sse2_packsswb_128; 14044 break; 14045 } 14046 } 14047 break; 14048 case 'u': 14049 if (!memcmp(BuiltinName+20, "s", 1)) { 14050 switch (BuiltinName[21]) { // "__builtin_ia32_packus" 14051 case 'd': 14052 if (!memcmp(BuiltinName+22, "w128", 4)) 14053 IntrinsicID = Intrinsic::x86_sse41_packusdw; 14054 break; 14055 case 'w': 14056 if (!memcmp(BuiltinName+22, "b128", 4)) 14057 IntrinsicID = Intrinsic::x86_sse2_packuswb_128; 14058 break; 14059 } 14060 } 14061 break; 14062 } 14063 } 14064 break; 14065 case 'b': 14066 if (!memcmp(BuiltinName+17, "lendvb128", 9)) 14067 IntrinsicID = Intrinsic::x86_sse41_pblendvb; 14068 break; 14069 case 'm': 14070 switch (BuiltinName[17]) { // "__builtin_ia32_pm" 14071 case 'o': 14072 if (!memcmp(BuiltinName+18, "v", 1)) { 14073 switch (BuiltinName[19]) { // "__builtin_ia32_pmov" 14074 case 'm': 14075 if (!memcmp(BuiltinName+20, "skb128", 6)) 14076 IntrinsicID = Intrinsic::x86_sse2_pmovmskb_128; 14077 break; 14078 case 's': 14079 if (!memcmp(BuiltinName+20, "x", 1)) { 14080 switch (BuiltinName[21]) { // "__builtin_ia32_pmovsx" 14081 case 'b': 14082 switch (BuiltinName[22]) { // "__builtin_ia32_pmovsxb" 14083 case 'd': 14084 if (!memcmp(BuiltinName+23, "128", 3)) 14085 IntrinsicID = Intrinsic::x86_sse41_pmovsxbd; 14086 break; 14087 case 'q': 14088 if (!memcmp(BuiltinName+23, "128", 3)) 14089 IntrinsicID = Intrinsic::x86_sse41_pmovsxbq; 14090 break; 14091 case 'w': 14092 if (!memcmp(BuiltinName+23, "128", 3)) 14093 IntrinsicID = Intrinsic::x86_sse41_pmovsxbw; 14094 break; 14095 } 14096 break; 14097 case 'd': 14098 if (!memcmp(BuiltinName+22, "q128", 4)) 14099 IntrinsicID = Intrinsic::x86_sse41_pmovsxdq; 14100 break; 14101 case 'w': 14102 switch (BuiltinName[22]) { // "__builtin_ia32_pmovsxw" 14103 case 'd': 14104 if (!memcmp(BuiltinName+23, "128", 3)) 14105 IntrinsicID = Intrinsic::x86_sse41_pmovsxwd; 14106 break; 14107 case 'q': 14108 if (!memcmp(BuiltinName+23, "128", 3)) 14109 IntrinsicID = Intrinsic::x86_sse41_pmovsxwq; 14110 break; 14111 } 14112 break; 14113 } 14114 } 14115 break; 14116 case 'z': 14117 if (!memcmp(BuiltinName+20, "x", 1)) { 14118 switch (BuiltinName[21]) { // "__builtin_ia32_pmovzx" 14119 case 'b': 14120 switch (BuiltinName[22]) { // "__builtin_ia32_pmovzxb" 14121 case 'd': 14122 if (!memcmp(BuiltinName+23, "128", 3)) 14123 IntrinsicID = Intrinsic::x86_sse41_pmovzxbd; 14124 break; 14125 case 'q': 14126 if (!memcmp(BuiltinName+23, "128", 3)) 14127 IntrinsicID = Intrinsic::x86_sse41_pmovzxbq; 14128 break; 14129 case 'w': 14130 if (!memcmp(BuiltinName+23, "128", 3)) 14131 IntrinsicID = Intrinsic::x86_sse41_pmovzxbw; 14132 break; 14133 } 14134 break; 14135 case 'd': 14136 if (!memcmp(BuiltinName+22, "q128", 4)) 14137 IntrinsicID = Intrinsic::x86_sse41_pmovzxdq; 14138 break; 14139 case 'w': 14140 switch (BuiltinName[22]) { // "__builtin_ia32_pmovzxw" 14141 case 'd': 14142 if (!memcmp(BuiltinName+23, "128", 3)) 14143 IntrinsicID = Intrinsic::x86_sse41_pmovzxwd; 14144 break; 14145 case 'q': 14146 if (!memcmp(BuiltinName+23, "128", 3)) 14147 IntrinsicID = Intrinsic::x86_sse41_pmovzxwq; 14148 break; 14149 } 14150 break; 14151 } 14152 } 14153 break; 14154 } 14155 } 14156 break; 14157 case 'u': 14158 if (!memcmp(BuiltinName+18, "lhrsw128", 8)) 14159 IntrinsicID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 14160 break; 14161 } 14162 break; 14163 case 't': 14164 if (!memcmp(BuiltinName+17, "estnzc", 6)) { 14165 switch (BuiltinName[23]) { // "__builtin_ia32_ptestnzc" 14166 case '1': 14167 if (!memcmp(BuiltinName+24, "28", 2)) 14168 IntrinsicID = Intrinsic::x86_sse41_ptestnzc; 14169 break; 14170 case '2': 14171 if (!memcmp(BuiltinName+24, "56", 2)) 14172 IntrinsicID = Intrinsic::x86_avx_ptestnzc_256; 14173 break; 14174 } 14175 } 14176 break; 14177 } 14178 break; 14179 case 's': 14180 if (!memcmp(BuiltinName+16, "tore", 4)) { 14181 switch (BuiltinName[20]) { // "__builtin_ia32_store" 14182 case 'd': 14183 if (!memcmp(BuiltinName+21, "qu256", 5)) 14184 IntrinsicID = Intrinsic::x86_avx_storeu_dq_256; 14185 break; 14186 case 'u': 14187 if (!memcmp(BuiltinName+21, "p", 1)) { 14188 switch (BuiltinName[22]) { // "__builtin_ia32_storeup" 14189 case 'd': 14190 if (!memcmp(BuiltinName+23, "256", 3)) 14191 IntrinsicID = Intrinsic::x86_avx_storeu_pd_256; 14192 break; 14193 case 's': 14194 if (!memcmp(BuiltinName+23, "256", 3)) 14195 IntrinsicID = Intrinsic::x86_avx_storeu_ps_256; 14196 break; 14197 } 14198 } 14199 break; 14200 } 14201 } 14202 break; 14203 case 'v': 14204 if (!memcmp(BuiltinName+16, "test", 4)) { 14205 switch (BuiltinName[20]) { // "__builtin_ia32_vtest" 14206 case 'c': 14207 if (!memcmp(BuiltinName+21, "p", 1)) { 14208 switch (BuiltinName[22]) { // "__builtin_ia32_vtestcp" 14209 case 'd': 14210 if (!memcmp(BuiltinName+23, "256", 3)) 14211 IntrinsicID = Intrinsic::x86_avx_vtestc_pd_256; 14212 break; 14213 case 's': 14214 if (!memcmp(BuiltinName+23, "256", 3)) 14215 IntrinsicID = Intrinsic::x86_avx_vtestc_ps_256; 14216 break; 14217 } 14218 } 14219 break; 14220 case 'z': 14221 if (!memcmp(BuiltinName+21, "p", 1)) { 14222 switch (BuiltinName[22]) { // "__builtin_ia32_vtestzp" 14223 case 'd': 14224 if (!memcmp(BuiltinName+23, "256", 3)) 14225 IntrinsicID = Intrinsic::x86_avx_vtestz_pd_256; 14226 break; 14227 case 's': 14228 if (!memcmp(BuiltinName+23, "256", 3)) 14229 IntrinsicID = Intrinsic::x86_avx_vtestz_ps_256; 14230 break; 14231 } 14232 } 14233 break; 14234 } 14235 } 14236 break; 14237 } 14238 } 14239 break; 14240 case 27: 14241 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 14242 switch (BuiltinName[15]) { // "__builtin_ia32_" 14243 case 'c': 14244 if (!memcmp(BuiltinName+16, "vttp", 4)) { 14245 switch (BuiltinName[20]) { // "__builtin_ia32_cvttp" 14246 case 'd': 14247 if (!memcmp(BuiltinName+21, "2dq256", 6)) 14248 IntrinsicID = Intrinsic::x86_avx_cvtt_pd2dq_256; 14249 break; 14250 case 's': 14251 if (!memcmp(BuiltinName+21, "2dq256", 6)) 14252 IntrinsicID = Intrinsic::x86_avx_cvtt_ps2dq_256; 14253 break; 14254 } 14255 } 14256 break; 14257 case 'e': 14258 if (!memcmp(BuiltinName+16, "xtractps128", 11)) 14259 IntrinsicID = Intrinsic::x86_sse41_extractps; 14260 break; 14261 case 'p': 14262 switch (BuiltinName[16]) { // "__builtin_ia32_p" 14263 case 'c': 14264 if (!memcmp(BuiltinName+17, "mp", 2)) { 14265 switch (BuiltinName[19]) { // "__builtin_ia32_pcmp" 14266 case 'e': 14267 if (!memcmp(BuiltinName+20, "str", 3)) { 14268 switch (BuiltinName[23]) { // "__builtin_ia32_pcmpestr" 14269 case 'i': 14270 if (!memcmp(BuiltinName+24, "128", 3)) 14271 IntrinsicID = Intrinsic::x86_sse42_pcmpestri128; 14272 break; 14273 case 'm': 14274 if (!memcmp(BuiltinName+24, "128", 3)) 14275 IntrinsicID = Intrinsic::x86_sse42_pcmpestrm128; 14276 break; 14277 } 14278 } 14279 break; 14280 case 'i': 14281 if (!memcmp(BuiltinName+20, "str", 3)) { 14282 switch (BuiltinName[23]) { // "__builtin_ia32_pcmpistr" 14283 case 'i': 14284 if (!memcmp(BuiltinName+24, "128", 3)) 14285 IntrinsicID = Intrinsic::x86_sse42_pcmpistri128; 14286 break; 14287 case 'm': 14288 if (!memcmp(BuiltinName+24, "128", 3)) 14289 IntrinsicID = Intrinsic::x86_sse42_pcmpistrm128; 14290 break; 14291 } 14292 } 14293 break; 14294 } 14295 } 14296 break; 14297 case 'm': 14298 if (!memcmp(BuiltinName+17, "addubsw128", 10)) 14299 IntrinsicID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 14300 break; 14301 } 14302 break; 14303 case 'v': 14304 switch (BuiltinName[16]) { // "__builtin_ia32_v" 14305 case 'b': 14306 if (!memcmp(BuiltinName+17, "roadcastss", 10)) 14307 IntrinsicID = Intrinsic::x86_avx_vbroadcastss; 14308 break; 14309 case 'e': 14310 if (!memcmp(BuiltinName+17, "c_ext_v2si", 10)) 14311 IntrinsicID = Intrinsic::x86_mmx_vec_ext_d; 14312 break; 14313 case 'p': 14314 if (!memcmp(BuiltinName+17, "ermil", 5)) { 14315 switch (BuiltinName[22]) { // "__builtin_ia32_vpermil" 14316 case 'p': 14317 switch (BuiltinName[23]) { // "__builtin_ia32_vpermilp" 14318 case 'd': 14319 if (!memcmp(BuiltinName+24, "256", 3)) 14320 IntrinsicID = Intrinsic::x86_avx_vpermil_pd_256; 14321 break; 14322 case 's': 14323 if (!memcmp(BuiltinName+24, "256", 3)) 14324 IntrinsicID = Intrinsic::x86_avx_vpermil_ps_256; 14325 break; 14326 } 14327 break; 14328 case 'v': 14329 if (!memcmp(BuiltinName+23, "arp", 3)) { 14330 switch (BuiltinName[26]) { // "__builtin_ia32_vpermilvarp" 14331 case 'd': 14332 IntrinsicID = Intrinsic::x86_avx_vpermilvar_pd; 14333 break; 14334 case 's': 14335 IntrinsicID = Intrinsic::x86_avx_vpermilvar_ps; 14336 break; 14337 } 14338 } 14339 break; 14340 } 14341 } 14342 break; 14343 } 14344 break; 14345 } 14346 } 14347 break; 14348 case 28: 14349 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 14350 switch (BuiltinName[15]) { // "__builtin_ia32_" 14351 case 'a': 14352 if (!memcmp(BuiltinName+16, "es", 2)) { 14353 switch (BuiltinName[18]) { // "__builtin_ia32_aes" 14354 case 'd': 14355 if (!memcmp(BuiltinName+19, "eclast128", 9)) 14356 IntrinsicID = Intrinsic::x86_aesni_aesdeclast; 14357 break; 14358 case 'e': 14359 if (!memcmp(BuiltinName+19, "nclast128", 9)) 14360 IntrinsicID = Intrinsic::x86_aesni_aesenclast; 14361 break; 14362 } 14363 } 14364 break; 14365 case 'm': 14366 if (!memcmp(BuiltinName+16, "askloadp", 8)) { 14367 switch (BuiltinName[24]) { // "__builtin_ia32_maskloadp" 14368 case 'd': 14369 if (!memcmp(BuiltinName+25, "256", 3)) 14370 IntrinsicID = Intrinsic::x86_avx_maskload_pd_256; 14371 break; 14372 case 's': 14373 if (!memcmp(BuiltinName+25, "256", 3)) 14374 IntrinsicID = Intrinsic::x86_avx_maskload_ps_256; 14375 break; 14376 } 14377 } 14378 break; 14379 case 'p': 14380 switch (BuiltinName[16]) { // "__builtin_ia32_p" 14381 case 'c': 14382 if (!memcmp(BuiltinName+17, "mp", 2)) { 14383 switch (BuiltinName[19]) { // "__builtin_ia32_pcmp" 14384 case 'e': 14385 if (!memcmp(BuiltinName+20, "stri", 4)) { 14386 switch (BuiltinName[24]) { // "__builtin_ia32_pcmpestri" 14387 case 'a': 14388 if (!memcmp(BuiltinName+25, "128", 3)) 14389 IntrinsicID = Intrinsic::x86_sse42_pcmpestria128; 14390 break; 14391 case 'c': 14392 if (!memcmp(BuiltinName+25, "128", 3)) 14393 IntrinsicID = Intrinsic::x86_sse42_pcmpestric128; 14394 break; 14395 case 'o': 14396 if (!memcmp(BuiltinName+25, "128", 3)) 14397 IntrinsicID = Intrinsic::x86_sse42_pcmpestrio128; 14398 break; 14399 case 's': 14400 if (!memcmp(BuiltinName+25, "128", 3)) 14401 IntrinsicID = Intrinsic::x86_sse42_pcmpestris128; 14402 break; 14403 case 'z': 14404 if (!memcmp(BuiltinName+25, "128", 3)) 14405 IntrinsicID = Intrinsic::x86_sse42_pcmpestriz128; 14406 break; 14407 } 14408 } 14409 break; 14410 case 'i': 14411 if (!memcmp(BuiltinName+20, "stri", 4)) { 14412 switch (BuiltinName[24]) { // "__builtin_ia32_pcmpistri" 14413 case 'a': 14414 if (!memcmp(BuiltinName+25, "128", 3)) 14415 IntrinsicID = Intrinsic::x86_sse42_pcmpistria128; 14416 break; 14417 case 'c': 14418 if (!memcmp(BuiltinName+25, "128", 3)) 14419 IntrinsicID = Intrinsic::x86_sse42_pcmpistric128; 14420 break; 14421 case 'o': 14422 if (!memcmp(BuiltinName+25, "128", 3)) 14423 IntrinsicID = Intrinsic::x86_sse42_pcmpistrio128; 14424 break; 14425 case 's': 14426 if (!memcmp(BuiltinName+25, "128", 3)) 14427 IntrinsicID = Intrinsic::x86_sse42_pcmpistris128; 14428 break; 14429 case 'z': 14430 if (!memcmp(BuiltinName+25, "128", 3)) 14431 IntrinsicID = Intrinsic::x86_sse42_pcmpistriz128; 14432 break; 14433 } 14434 } 14435 break; 14436 } 14437 } 14438 break; 14439 case 'h': 14440 if (!memcmp(BuiltinName+17, "minposuw128", 11)) 14441 IntrinsicID = Intrinsic::x86_sse41_phminposuw; 14442 break; 14443 } 14444 break; 14445 case 'v': 14446 switch (BuiltinName[16]) { // "__builtin_ia32_v" 14447 case 'e': 14448 if (!memcmp(BuiltinName+17, "c_init_v", 8)) { 14449 switch (BuiltinName[25]) { // "__builtin_ia32_vec_init_v" 14450 case '2': 14451 if (!memcmp(BuiltinName+26, "si", 2)) 14452 IntrinsicID = Intrinsic::x86_mmx_vec_init_d; 14453 break; 14454 case '4': 14455 if (!memcmp(BuiltinName+26, "hi", 2)) 14456 IntrinsicID = Intrinsic::x86_mmx_vec_init_w; 14457 break; 14458 case '8': 14459 if (!memcmp(BuiltinName+26, "qi", 2)) 14460 IntrinsicID = Intrinsic::x86_mmx_vec_init_b; 14461 break; 14462 } 14463 } 14464 break; 14465 case 't': 14466 if (!memcmp(BuiltinName+17, "estnzcp", 7)) { 14467 switch (BuiltinName[24]) { // "__builtin_ia32_vtestnzcp" 14468 case 'd': 14469 if (!memcmp(BuiltinName+25, "256", 3)) 14470 IntrinsicID = Intrinsic::x86_avx_vtestnzc_pd_256; 14471 break; 14472 case 's': 14473 if (!memcmp(BuiltinName+25, "256", 3)) 14474 IntrinsicID = Intrinsic::x86_avx_vtestnzc_ps_256; 14475 break; 14476 } 14477 } 14478 break; 14479 } 14480 break; 14481 } 14482 } 14483 break; 14484 case 29: 14485 if (!memcmp(BuiltinName, "__builtin_ia32_maskstorep", 25)) { 14486 switch (BuiltinName[25]) { // "__builtin_ia32_maskstorep" 14487 case 'd': 14488 if (!memcmp(BuiltinName+26, "256", 3)) 14489 IntrinsicID = Intrinsic::x86_avx_maskstore_pd_256; 14490 break; 14491 case 's': 14492 if (!memcmp(BuiltinName+26, "256", 3)) 14493 IntrinsicID = Intrinsic::x86_avx_maskstore_ps_256; 14494 break; 14495 } 14496 } 14497 break; 14498 case 30: 14499 if (!memcmp(BuiltinName, "__builtin_ia32_v", 16)) { 14500 switch (BuiltinName[16]) { // "__builtin_ia32_v" 14501 case 'b': 14502 if (!memcmp(BuiltinName+17, "roadcasts", 9)) { 14503 switch (BuiltinName[26]) { // "__builtin_ia32_vbroadcasts" 14504 case 'd': 14505 if (!memcmp(BuiltinName+27, "256", 3)) 14506 IntrinsicID = Intrinsic::x86_avx_vbroadcast_sd_256; 14507 break; 14508 case 's': 14509 if (!memcmp(BuiltinName+27, "256", 3)) 14510 IntrinsicID = Intrinsic::x86_avx_vbroadcastss_256; 14511 break; 14512 } 14513 } 14514 break; 14515 case 'p': 14516 if (!memcmp(BuiltinName+17, "ermilvarp", 9)) { 14517 switch (BuiltinName[26]) { // "__builtin_ia32_vpermilvarp" 14518 case 'd': 14519 if (!memcmp(BuiltinName+27, "256", 3)) 14520 IntrinsicID = Intrinsic::x86_avx_vpermilvar_pd_256; 14521 break; 14522 case 's': 14523 if (!memcmp(BuiltinName+27, "256", 3)) 14524 IntrinsicID = Intrinsic::x86_avx_vpermilvar_ps_256; 14525 break; 14526 } 14527 } 14528 break; 14529 } 14530 } 14531 break; 14532 case 31: 14533 if (!memcmp(BuiltinName, "__builtin_ia32_vperm2f128_", 26)) { 14534 switch (BuiltinName[26]) { // "__builtin_ia32_vperm2f128_" 14535 case 'p': 14536 switch (BuiltinName[27]) { // "__builtin_ia32_vperm2f128_p" 14537 case 'd': 14538 if (!memcmp(BuiltinName+28, "256", 3)) 14539 IntrinsicID = Intrinsic::x86_avx_vperm2f128_pd_256; 14540 break; 14541 case 's': 14542 if (!memcmp(BuiltinName+28, "256", 3)) 14543 IntrinsicID = Intrinsic::x86_avx_vperm2f128_ps_256; 14544 break; 14545 } 14546 break; 14547 case 's': 14548 if (!memcmp(BuiltinName+27, "i256", 4)) 14549 IntrinsicID = Intrinsic::x86_avx_vperm2f128_si_256; 14550 break; 14551 } 14552 } 14553 break; 14554 case 32: 14555 if (!memcmp(BuiltinName, "__builtin_ia32_vinsertf128_", 27)) { 14556 switch (BuiltinName[27]) { // "__builtin_ia32_vinsertf128_" 14557 case 'p': 14558 switch (BuiltinName[28]) { // "__builtin_ia32_vinsertf128_p" 14559 case 'd': 14560 if (!memcmp(BuiltinName+29, "256", 3)) 14561 IntrinsicID = Intrinsic::x86_avx_vinsertf128_pd_256; 14562 break; 14563 case 's': 14564 if (!memcmp(BuiltinName+29, "256", 3)) 14565 IntrinsicID = Intrinsic::x86_avx_vinsertf128_ps_256; 14566 break; 14567 } 14568 break; 14569 case 's': 14570 if (!memcmp(BuiltinName+28, "i256", 4)) 14571 IntrinsicID = Intrinsic::x86_avx_vinsertf128_si_256; 14572 break; 14573 } 14574 } 14575 break; 14576 case 33: 14577 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 14578 switch (BuiltinName[15]) { // "__builtin_ia32_" 14579 case 'a': 14580 if (!memcmp(BuiltinName+16, "eskeygenassist128", 17)) 14581 IntrinsicID = Intrinsic::x86_aesni_aeskeygenassist; 14582 break; 14583 case 'v': 14584 if (!memcmp(BuiltinName+16, "extractf128_", 12)) { 14585 switch (BuiltinName[28]) { // "__builtin_ia32_vextractf128_" 14586 case 'p': 14587 switch (BuiltinName[29]) { // "__builtin_ia32_vextractf128_p" 14588 case 'd': 14589 if (!memcmp(BuiltinName+30, "256", 3)) 14590 IntrinsicID = Intrinsic::x86_avx_vextractf128_pd_256; 14591 break; 14592 case 's': 14593 if (!memcmp(BuiltinName+30, "256", 3)) 14594 IntrinsicID = Intrinsic::x86_avx_vextractf128_ps_256; 14595 break; 14596 } 14597 break; 14598 case 's': 14599 if (!memcmp(BuiltinName+29, "i256", 4)) 14600 IntrinsicID = Intrinsic::x86_avx_vextractf128_si_256; 14601 break; 14602 } 14603 } 14604 break; 14605 } 14606 } 14607 break; 14608 case 35: 14609 if (!memcmp(BuiltinName, "__builtin_ia32_", 15)) { 14610 switch (BuiltinName[15]) { // "__builtin_ia32_" 14611 case 'p': 14612 if (!memcmp(BuiltinName+16, "s", 1)) { 14613 switch (BuiltinName[17]) { // "__builtin_ia32_ps" 14614 case 'l': 14615 if (!memcmp(BuiltinName+18, "ldqi128_byteshift", 17)) 14616 IntrinsicID = Intrinsic::x86_sse2_psll_dq_bs; 14617 break; 14618 case 'r': 14619 if (!memcmp(BuiltinName+18, "ldqi128_byteshift", 17)) 14620 IntrinsicID = Intrinsic::x86_sse2_psrl_dq_bs; 14621 break; 14622 } 14623 } 14624 break; 14625 case 'v': 14626 if (!memcmp(BuiltinName+16, "broadcastf128_p", 15)) { 14627 switch (BuiltinName[31]) { // "__builtin_ia32_vbroadcastf128_p" 14628 case 'd': 14629 if (!memcmp(BuiltinName+32, "256", 3)) 14630 IntrinsicID = Intrinsic::x86_avx_vbroadcastf128_pd_256; 14631 break; 14632 case 's': 14633 if (!memcmp(BuiltinName+32, "256", 3)) 14634 IntrinsicID = Intrinsic::x86_avx_vbroadcastf128_ps_256; 14635 break; 14636 } 14637 } 14638 break; 14639 } 14640 } 14641 break; 14642 } 14643 } 14644 return IntrinsicID; 14645} 14646#endif 14647 14648#if defined(_MSC_VER) && defined(setjmp_undefined_for_visual_studio) 14649// let's return it to _setjmp state 14650#define setjmp _setjmp 14651#endif 14652 14653