1 2# qhasm: int64 input_0 3 4# qhasm: int64 input_1 5 6# qhasm: int64 input_2 7 8# qhasm: int64 input_3 9 10# qhasm: int64 input_4 11 12# qhasm: int64 input_5 13 14# qhasm: stack64 input_6 15 16# qhasm: stack64 input_7 17 18# qhasm: int64 caller_r11 19 20# qhasm: int64 caller_r12 21 22# qhasm: int64 caller_r13 23 24# qhasm: int64 caller_r14 25 26# qhasm: int64 caller_r15 27 28# qhasm: int64 caller_rbx 29 30# qhasm: int64 caller_rbp 31 32# qhasm: reg128 x0 33 34# qhasm: reg128 x1 35 36# qhasm: reg128 x2 37 38# qhasm: reg128 x3 39 40# qhasm: reg128 x4 41 42# qhasm: reg128 x5 43 44# qhasm: reg128 x6 45 46# qhasm: reg128 x7 47 48# qhasm: reg128 t0 49 50# qhasm: reg128 t1 51 52# qhasm: reg128 v00 53 54# qhasm: reg128 v01 55 56# qhasm: reg128 v10 57 58# qhasm: reg128 v11 59 60# qhasm: reg128 mask0 61 62# qhasm: reg128 mask1 63 64# qhasm: reg128 mask2 65 66# qhasm: reg128 mask3 67 68# qhasm: reg128 mask4 69 70# qhasm: reg128 mask5 71 72# qhasm: enter transpose_64x128_sp_asm 73.p2align 5 74.global _PQCLEAN_MCELIECE460896F_AVX_transpose_64x128_sp_asm 75.global PQCLEAN_MCELIECE460896F_AVX_transpose_64x128_sp_asm 76_PQCLEAN_MCELIECE460896F_AVX_transpose_64x128_sp_asm: 77PQCLEAN_MCELIECE460896F_AVX_transpose_64x128_sp_asm: 78mov %rsp,%r11 79and $31,%r11 80add $0,%r11 81sub %r11,%rsp 82 83# qhasm: mask0 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK5_0 ] 84# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK5_0(%rip),>mask0=reg128#1 85# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK5_0(%rip),>mask0=%xmm0 86movdqa PQCLEAN_MCELIECE460896F_AVX_MASK5_0(%rip),%xmm0 87 88# qhasm: mask1 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK5_1 ] 89# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK5_1(%rip),>mask1=reg128#2 90# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK5_1(%rip),>mask1=%xmm1 91movdqa PQCLEAN_MCELIECE460896F_AVX_MASK5_1(%rip),%xmm1 92 93# qhasm: mask2 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK4_0 ] 94# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK4_0(%rip),>mask2=reg128#3 95# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK4_0(%rip),>mask2=%xmm2 96movdqa PQCLEAN_MCELIECE460896F_AVX_MASK4_0(%rip),%xmm2 97 98# qhasm: mask3 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK4_1 ] 99# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK4_1(%rip),>mask3=reg128#4 100# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK4_1(%rip),>mask3=%xmm3 101movdqa PQCLEAN_MCELIECE460896F_AVX_MASK4_1(%rip),%xmm3 102 103# qhasm: mask4 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK3_0 ] 104# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK3_0(%rip),>mask4=reg128#5 105# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK3_0(%rip),>mask4=%xmm4 106movdqa PQCLEAN_MCELIECE460896F_AVX_MASK3_0(%rip),%xmm4 107 108# qhasm: mask5 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK3_1 ] 109# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK3_1(%rip),>mask5=reg128#6 110# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK3_1(%rip),>mask5=%xmm5 111movdqa PQCLEAN_MCELIECE460896F_AVX_MASK3_1(%rip),%xmm5 112 113# qhasm: x0 = mem128[ input_0 + 0 ] 114# asm 1: movdqu 0(<input_0=int64#1),>x0=reg128#7 115# asm 2: movdqu 0(<input_0=%rdi),>x0=%xmm6 116movdqu 0(%rdi),%xmm6 117 118# qhasm: x1 = mem128[ input_0 + 128 ] 119# asm 1: movdqu 128(<input_0=int64#1),>x1=reg128#8 120# asm 2: movdqu 128(<input_0=%rdi),>x1=%xmm7 121movdqu 128(%rdi),%xmm7 122 123# qhasm: x2 = mem128[ input_0 + 256 ] 124# asm 1: movdqu 256(<input_0=int64#1),>x2=reg128#9 125# asm 2: movdqu 256(<input_0=%rdi),>x2=%xmm8 126movdqu 256(%rdi),%xmm8 127 128# qhasm: x3 = mem128[ input_0 + 384 ] 129# asm 1: movdqu 384(<input_0=int64#1),>x3=reg128#10 130# asm 2: movdqu 384(<input_0=%rdi),>x3=%xmm9 131movdqu 384(%rdi),%xmm9 132 133# qhasm: x4 = mem128[ input_0 + 512 ] 134# asm 1: movdqu 512(<input_0=int64#1),>x4=reg128#11 135# asm 2: movdqu 512(<input_0=%rdi),>x4=%xmm10 136movdqu 512(%rdi),%xmm10 137 138# qhasm: x5 = mem128[ input_0 + 640 ] 139# asm 1: movdqu 640(<input_0=int64#1),>x5=reg128#12 140# asm 2: movdqu 640(<input_0=%rdi),>x5=%xmm11 141movdqu 640(%rdi),%xmm11 142 143# qhasm: x6 = mem128[ input_0 + 768 ] 144# asm 1: movdqu 768(<input_0=int64#1),>x6=reg128#13 145# asm 2: movdqu 768(<input_0=%rdi),>x6=%xmm12 146movdqu 768(%rdi),%xmm12 147 148# qhasm: x7 = mem128[ input_0 + 896 ] 149# asm 1: movdqu 896(<input_0=int64#1),>x7=reg128#14 150# asm 2: movdqu 896(<input_0=%rdi),>x7=%xmm13 151movdqu 896(%rdi),%xmm13 152 153# qhasm: v00 = x0 & mask0 154# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 155# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 156vpand %xmm0,%xmm6,%xmm14 157 158# qhasm: 2x v10 = x4 << 32 159# asm 1: vpsllq $32,<x4=reg128#11,>v10=reg128#16 160# asm 2: vpsllq $32,<x4=%xmm10,>v10=%xmm15 161vpsllq $32,%xmm10,%xmm15 162 163# qhasm: 2x v01 = x0 unsigned>> 32 164# asm 1: vpsrlq $32,<x0=reg128#7,>v01=reg128#7 165# asm 2: vpsrlq $32,<x0=%xmm6,>v01=%xmm6 166vpsrlq $32,%xmm6,%xmm6 167 168# qhasm: v11 = x4 & mask1 169# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 170# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 171vpand %xmm1,%xmm10,%xmm10 172 173# qhasm: x0 = v00 | v10 174# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 175# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 176vpor %xmm15,%xmm14,%xmm14 177 178# qhasm: x4 = v01 | v11 179# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 180# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 181vpor %xmm10,%xmm6,%xmm6 182 183# qhasm: v00 = x1 & mask0 184# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 185# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 186vpand %xmm0,%xmm7,%xmm10 187 188# qhasm: 2x v10 = x5 << 32 189# asm 1: vpsllq $32,<x5=reg128#12,>v10=reg128#16 190# asm 2: vpsllq $32,<x5=%xmm11,>v10=%xmm15 191vpsllq $32,%xmm11,%xmm15 192 193# qhasm: 2x v01 = x1 unsigned>> 32 194# asm 1: vpsrlq $32,<x1=reg128#8,>v01=reg128#8 195# asm 2: vpsrlq $32,<x1=%xmm7,>v01=%xmm7 196vpsrlq $32,%xmm7,%xmm7 197 198# qhasm: v11 = x5 & mask1 199# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 200# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 201vpand %xmm1,%xmm11,%xmm11 202 203# qhasm: x1 = v00 | v10 204# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 205# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 206vpor %xmm15,%xmm10,%xmm10 207 208# qhasm: x5 = v01 | v11 209# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 210# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 211vpor %xmm11,%xmm7,%xmm7 212 213# qhasm: v00 = x2 & mask0 214# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 215# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 216vpand %xmm0,%xmm8,%xmm11 217 218# qhasm: 2x v10 = x6 << 32 219# asm 1: vpsllq $32,<x6=reg128#13,>v10=reg128#16 220# asm 2: vpsllq $32,<x6=%xmm12,>v10=%xmm15 221vpsllq $32,%xmm12,%xmm15 222 223# qhasm: 2x v01 = x2 unsigned>> 32 224# asm 1: vpsrlq $32,<x2=reg128#9,>v01=reg128#9 225# asm 2: vpsrlq $32,<x2=%xmm8,>v01=%xmm8 226vpsrlq $32,%xmm8,%xmm8 227 228# qhasm: v11 = x6 & mask1 229# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 230# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 231vpand %xmm1,%xmm12,%xmm12 232 233# qhasm: x2 = v00 | v10 234# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 235# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 236vpor %xmm15,%xmm11,%xmm11 237 238# qhasm: x6 = v01 | v11 239# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 240# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 241vpor %xmm12,%xmm8,%xmm8 242 243# qhasm: v00 = x3 & mask0 244# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 245# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 246vpand %xmm0,%xmm9,%xmm12 247 248# qhasm: 2x v10 = x7 << 32 249# asm 1: vpsllq $32,<x7=reg128#14,>v10=reg128#16 250# asm 2: vpsllq $32,<x7=%xmm13,>v10=%xmm15 251vpsllq $32,%xmm13,%xmm15 252 253# qhasm: 2x v01 = x3 unsigned>> 32 254# asm 1: vpsrlq $32,<x3=reg128#10,>v01=reg128#10 255# asm 2: vpsrlq $32,<x3=%xmm9,>v01=%xmm9 256vpsrlq $32,%xmm9,%xmm9 257 258# qhasm: v11 = x7 & mask1 259# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 260# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 261vpand %xmm1,%xmm13,%xmm13 262 263# qhasm: x3 = v00 | v10 264# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 265# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 266vpor %xmm15,%xmm12,%xmm12 267 268# qhasm: x7 = v01 | v11 269# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 270# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 271vpor %xmm13,%xmm9,%xmm9 272 273# qhasm: v00 = x0 & mask2 274# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 275# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 276vpand %xmm2,%xmm14,%xmm13 277 278# qhasm: 4x v10 = x2 << 16 279# asm 1: vpslld $16,<x2=reg128#12,>v10=reg128#16 280# asm 2: vpslld $16,<x2=%xmm11,>v10=%xmm15 281vpslld $16,%xmm11,%xmm15 282 283# qhasm: 4x v01 = x0 unsigned>> 16 284# asm 1: vpsrld $16,<x0=reg128#15,>v01=reg128#15 285# asm 2: vpsrld $16,<x0=%xmm14,>v01=%xmm14 286vpsrld $16,%xmm14,%xmm14 287 288# qhasm: v11 = x2 & mask3 289# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 290# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 291vpand %xmm3,%xmm11,%xmm11 292 293# qhasm: x0 = v00 | v10 294# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 295# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 296vpor %xmm15,%xmm13,%xmm13 297 298# qhasm: x2 = v01 | v11 299# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 300# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 301vpor %xmm11,%xmm14,%xmm11 302 303# qhasm: v00 = x1 & mask2 304# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 305# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 306vpand %xmm2,%xmm10,%xmm14 307 308# qhasm: 4x v10 = x3 << 16 309# asm 1: vpslld $16,<x3=reg128#13,>v10=reg128#16 310# asm 2: vpslld $16,<x3=%xmm12,>v10=%xmm15 311vpslld $16,%xmm12,%xmm15 312 313# qhasm: 4x v01 = x1 unsigned>> 16 314# asm 1: vpsrld $16,<x1=reg128#11,>v01=reg128#11 315# asm 2: vpsrld $16,<x1=%xmm10,>v01=%xmm10 316vpsrld $16,%xmm10,%xmm10 317 318# qhasm: v11 = x3 & mask3 319# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 320# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 321vpand %xmm3,%xmm12,%xmm12 322 323# qhasm: x1 = v00 | v10 324# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 325# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 326vpor %xmm15,%xmm14,%xmm14 327 328# qhasm: x3 = v01 | v11 329# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 330# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 331vpor %xmm12,%xmm10,%xmm10 332 333# qhasm: v00 = x4 & mask2 334# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 335# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 336vpand %xmm2,%xmm6,%xmm12 337 338# qhasm: 4x v10 = x6 << 16 339# asm 1: vpslld $16,<x6=reg128#9,>v10=reg128#16 340# asm 2: vpslld $16,<x6=%xmm8,>v10=%xmm15 341vpslld $16,%xmm8,%xmm15 342 343# qhasm: 4x v01 = x4 unsigned>> 16 344# asm 1: vpsrld $16,<x4=reg128#7,>v01=reg128#7 345# asm 2: vpsrld $16,<x4=%xmm6,>v01=%xmm6 346vpsrld $16,%xmm6,%xmm6 347 348# qhasm: v11 = x6 & mask3 349# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 350# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 351vpand %xmm3,%xmm8,%xmm8 352 353# qhasm: x4 = v00 | v10 354# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 355# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 356vpor %xmm15,%xmm12,%xmm12 357 358# qhasm: x6 = v01 | v11 359# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 360# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 361vpor %xmm8,%xmm6,%xmm6 362 363# qhasm: v00 = x5 & mask2 364# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 365# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 366vpand %xmm2,%xmm7,%xmm8 367 368# qhasm: 4x v10 = x7 << 16 369# asm 1: vpslld $16,<x7=reg128#10,>v10=reg128#16 370# asm 2: vpslld $16,<x7=%xmm9,>v10=%xmm15 371vpslld $16,%xmm9,%xmm15 372 373# qhasm: 4x v01 = x5 unsigned>> 16 374# asm 1: vpsrld $16,<x5=reg128#8,>v01=reg128#8 375# asm 2: vpsrld $16,<x5=%xmm7,>v01=%xmm7 376vpsrld $16,%xmm7,%xmm7 377 378# qhasm: v11 = x7 & mask3 379# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 380# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 381vpand %xmm3,%xmm9,%xmm9 382 383# qhasm: x5 = v00 | v10 384# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 385# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 386vpor %xmm15,%xmm8,%xmm8 387 388# qhasm: x7 = v01 | v11 389# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 390# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 391vpor %xmm9,%xmm7,%xmm7 392 393# qhasm: v00 = x0 & mask4 394# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 395# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 396vpand %xmm4,%xmm13,%xmm9 397 398# qhasm: 8x v10 = x1 << 8 399# asm 1: vpsllw $8,<x1=reg128#15,>v10=reg128#16 400# asm 2: vpsllw $8,<x1=%xmm14,>v10=%xmm15 401vpsllw $8,%xmm14,%xmm15 402 403# qhasm: 8x v01 = x0 unsigned>> 8 404# asm 1: vpsrlw $8,<x0=reg128#14,>v01=reg128#14 405# asm 2: vpsrlw $8,<x0=%xmm13,>v01=%xmm13 406vpsrlw $8,%xmm13,%xmm13 407 408# qhasm: v11 = x1 & mask5 409# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 410# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 411vpand %xmm5,%xmm14,%xmm14 412 413# qhasm: x0 = v00 | v10 414# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 415# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 416vpor %xmm15,%xmm9,%xmm9 417 418# qhasm: x1 = v01 | v11 419# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 420# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 421vpor %xmm14,%xmm13,%xmm13 422 423# qhasm: v00 = x2 & mask4 424# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 425# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 426vpand %xmm4,%xmm11,%xmm14 427 428# qhasm: 8x v10 = x3 << 8 429# asm 1: vpsllw $8,<x3=reg128#11,>v10=reg128#16 430# asm 2: vpsllw $8,<x3=%xmm10,>v10=%xmm15 431vpsllw $8,%xmm10,%xmm15 432 433# qhasm: 8x v01 = x2 unsigned>> 8 434# asm 1: vpsrlw $8,<x2=reg128#12,>v01=reg128#12 435# asm 2: vpsrlw $8,<x2=%xmm11,>v01=%xmm11 436vpsrlw $8,%xmm11,%xmm11 437 438# qhasm: v11 = x3 & mask5 439# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 440# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 441vpand %xmm5,%xmm10,%xmm10 442 443# qhasm: x2 = v00 | v10 444# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 445# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 446vpor %xmm15,%xmm14,%xmm14 447 448# qhasm: x3 = v01 | v11 449# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 450# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 451vpor %xmm10,%xmm11,%xmm10 452 453# qhasm: v00 = x4 & mask4 454# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 455# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 456vpand %xmm4,%xmm12,%xmm11 457 458# qhasm: 8x v10 = x5 << 8 459# asm 1: vpsllw $8,<x5=reg128#9,>v10=reg128#16 460# asm 2: vpsllw $8,<x5=%xmm8,>v10=%xmm15 461vpsllw $8,%xmm8,%xmm15 462 463# qhasm: 8x v01 = x4 unsigned>> 8 464# asm 1: vpsrlw $8,<x4=reg128#13,>v01=reg128#13 465# asm 2: vpsrlw $8,<x4=%xmm12,>v01=%xmm12 466vpsrlw $8,%xmm12,%xmm12 467 468# qhasm: v11 = x5 & mask5 469# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 470# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 471vpand %xmm5,%xmm8,%xmm8 472 473# qhasm: x4 = v00 | v10 474# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 475# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 476vpor %xmm15,%xmm11,%xmm11 477 478# qhasm: x5 = v01 | v11 479# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 480# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 481vpor %xmm8,%xmm12,%xmm8 482 483# qhasm: v00 = x6 & mask4 484# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 485# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 486vpand %xmm4,%xmm6,%xmm12 487 488# qhasm: 8x v10 = x7 << 8 489# asm 1: vpsllw $8,<x7=reg128#8,>v10=reg128#16 490# asm 2: vpsllw $8,<x7=%xmm7,>v10=%xmm15 491vpsllw $8,%xmm7,%xmm15 492 493# qhasm: 8x v01 = x6 unsigned>> 8 494# asm 1: vpsrlw $8,<x6=reg128#7,>v01=reg128#7 495# asm 2: vpsrlw $8,<x6=%xmm6,>v01=%xmm6 496vpsrlw $8,%xmm6,%xmm6 497 498# qhasm: v11 = x7 & mask5 499# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 500# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 501vpand %xmm5,%xmm7,%xmm7 502 503# qhasm: x6 = v00 | v10 504# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 505# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 506vpor %xmm15,%xmm12,%xmm12 507 508# qhasm: x7 = v01 | v11 509# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 510# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 511vpor %xmm7,%xmm6,%xmm6 512 513# qhasm: mem128[ input_0 + 0 ] = x0 514# asm 1: movdqu <x0=reg128#10,0(<input_0=int64#1) 515# asm 2: movdqu <x0=%xmm9,0(<input_0=%rdi) 516movdqu %xmm9,0(%rdi) 517 518# qhasm: mem128[ input_0 + 128 ] = x1 519# asm 1: movdqu <x1=reg128#14,128(<input_0=int64#1) 520# asm 2: movdqu <x1=%xmm13,128(<input_0=%rdi) 521movdqu %xmm13,128(%rdi) 522 523# qhasm: mem128[ input_0 + 256 ] = x2 524# asm 1: movdqu <x2=reg128#15,256(<input_0=int64#1) 525# asm 2: movdqu <x2=%xmm14,256(<input_0=%rdi) 526movdqu %xmm14,256(%rdi) 527 528# qhasm: mem128[ input_0 + 384 ] = x3 529# asm 1: movdqu <x3=reg128#11,384(<input_0=int64#1) 530# asm 2: movdqu <x3=%xmm10,384(<input_0=%rdi) 531movdqu %xmm10,384(%rdi) 532 533# qhasm: mem128[ input_0 + 512 ] = x4 534# asm 1: movdqu <x4=reg128#12,512(<input_0=int64#1) 535# asm 2: movdqu <x4=%xmm11,512(<input_0=%rdi) 536movdqu %xmm11,512(%rdi) 537 538# qhasm: mem128[ input_0 + 640 ] = x5 539# asm 1: movdqu <x5=reg128#9,640(<input_0=int64#1) 540# asm 2: movdqu <x5=%xmm8,640(<input_0=%rdi) 541movdqu %xmm8,640(%rdi) 542 543# qhasm: mem128[ input_0 + 768 ] = x6 544# asm 1: movdqu <x6=reg128#13,768(<input_0=int64#1) 545# asm 2: movdqu <x6=%xmm12,768(<input_0=%rdi) 546movdqu %xmm12,768(%rdi) 547 548# qhasm: mem128[ input_0 + 896 ] = x7 549# asm 1: movdqu <x7=reg128#7,896(<input_0=int64#1) 550# asm 2: movdqu <x7=%xmm6,896(<input_0=%rdi) 551movdqu %xmm6,896(%rdi) 552 553# qhasm: x0 = mem128[ input_0 + 16 ] 554# asm 1: movdqu 16(<input_0=int64#1),>x0=reg128#7 555# asm 2: movdqu 16(<input_0=%rdi),>x0=%xmm6 556movdqu 16(%rdi),%xmm6 557 558# qhasm: x1 = mem128[ input_0 + 144 ] 559# asm 1: movdqu 144(<input_0=int64#1),>x1=reg128#8 560# asm 2: movdqu 144(<input_0=%rdi),>x1=%xmm7 561movdqu 144(%rdi),%xmm7 562 563# qhasm: x2 = mem128[ input_0 + 272 ] 564# asm 1: movdqu 272(<input_0=int64#1),>x2=reg128#9 565# asm 2: movdqu 272(<input_0=%rdi),>x2=%xmm8 566movdqu 272(%rdi),%xmm8 567 568# qhasm: x3 = mem128[ input_0 + 400 ] 569# asm 1: movdqu 400(<input_0=int64#1),>x3=reg128#10 570# asm 2: movdqu 400(<input_0=%rdi),>x3=%xmm9 571movdqu 400(%rdi),%xmm9 572 573# qhasm: x4 = mem128[ input_0 + 528 ] 574# asm 1: movdqu 528(<input_0=int64#1),>x4=reg128#11 575# asm 2: movdqu 528(<input_0=%rdi),>x4=%xmm10 576movdqu 528(%rdi),%xmm10 577 578# qhasm: x5 = mem128[ input_0 + 656 ] 579# asm 1: movdqu 656(<input_0=int64#1),>x5=reg128#12 580# asm 2: movdqu 656(<input_0=%rdi),>x5=%xmm11 581movdqu 656(%rdi),%xmm11 582 583# qhasm: x6 = mem128[ input_0 + 784 ] 584# asm 1: movdqu 784(<input_0=int64#1),>x6=reg128#13 585# asm 2: movdqu 784(<input_0=%rdi),>x6=%xmm12 586movdqu 784(%rdi),%xmm12 587 588# qhasm: x7 = mem128[ input_0 + 912 ] 589# asm 1: movdqu 912(<input_0=int64#1),>x7=reg128#14 590# asm 2: movdqu 912(<input_0=%rdi),>x7=%xmm13 591movdqu 912(%rdi),%xmm13 592 593# qhasm: v00 = x0 & mask0 594# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 595# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 596vpand %xmm0,%xmm6,%xmm14 597 598# qhasm: 2x v10 = x4 << 32 599# asm 1: vpsllq $32,<x4=reg128#11,>v10=reg128#16 600# asm 2: vpsllq $32,<x4=%xmm10,>v10=%xmm15 601vpsllq $32,%xmm10,%xmm15 602 603# qhasm: 2x v01 = x0 unsigned>> 32 604# asm 1: vpsrlq $32,<x0=reg128#7,>v01=reg128#7 605# asm 2: vpsrlq $32,<x0=%xmm6,>v01=%xmm6 606vpsrlq $32,%xmm6,%xmm6 607 608# qhasm: v11 = x4 & mask1 609# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 610# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 611vpand %xmm1,%xmm10,%xmm10 612 613# qhasm: x0 = v00 | v10 614# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 615# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 616vpor %xmm15,%xmm14,%xmm14 617 618# qhasm: x4 = v01 | v11 619# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 620# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 621vpor %xmm10,%xmm6,%xmm6 622 623# qhasm: v00 = x1 & mask0 624# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 625# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 626vpand %xmm0,%xmm7,%xmm10 627 628# qhasm: 2x v10 = x5 << 32 629# asm 1: vpsllq $32,<x5=reg128#12,>v10=reg128#16 630# asm 2: vpsllq $32,<x5=%xmm11,>v10=%xmm15 631vpsllq $32,%xmm11,%xmm15 632 633# qhasm: 2x v01 = x1 unsigned>> 32 634# asm 1: vpsrlq $32,<x1=reg128#8,>v01=reg128#8 635# asm 2: vpsrlq $32,<x1=%xmm7,>v01=%xmm7 636vpsrlq $32,%xmm7,%xmm7 637 638# qhasm: v11 = x5 & mask1 639# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 640# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 641vpand %xmm1,%xmm11,%xmm11 642 643# qhasm: x1 = v00 | v10 644# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 645# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 646vpor %xmm15,%xmm10,%xmm10 647 648# qhasm: x5 = v01 | v11 649# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 650# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 651vpor %xmm11,%xmm7,%xmm7 652 653# qhasm: v00 = x2 & mask0 654# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 655# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 656vpand %xmm0,%xmm8,%xmm11 657 658# qhasm: 2x v10 = x6 << 32 659# asm 1: vpsllq $32,<x6=reg128#13,>v10=reg128#16 660# asm 2: vpsllq $32,<x6=%xmm12,>v10=%xmm15 661vpsllq $32,%xmm12,%xmm15 662 663# qhasm: 2x v01 = x2 unsigned>> 32 664# asm 1: vpsrlq $32,<x2=reg128#9,>v01=reg128#9 665# asm 2: vpsrlq $32,<x2=%xmm8,>v01=%xmm8 666vpsrlq $32,%xmm8,%xmm8 667 668# qhasm: v11 = x6 & mask1 669# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 670# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 671vpand %xmm1,%xmm12,%xmm12 672 673# qhasm: x2 = v00 | v10 674# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 675# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 676vpor %xmm15,%xmm11,%xmm11 677 678# qhasm: x6 = v01 | v11 679# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 680# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 681vpor %xmm12,%xmm8,%xmm8 682 683# qhasm: v00 = x3 & mask0 684# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 685# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 686vpand %xmm0,%xmm9,%xmm12 687 688# qhasm: 2x v10 = x7 << 32 689# asm 1: vpsllq $32,<x7=reg128#14,>v10=reg128#16 690# asm 2: vpsllq $32,<x7=%xmm13,>v10=%xmm15 691vpsllq $32,%xmm13,%xmm15 692 693# qhasm: 2x v01 = x3 unsigned>> 32 694# asm 1: vpsrlq $32,<x3=reg128#10,>v01=reg128#10 695# asm 2: vpsrlq $32,<x3=%xmm9,>v01=%xmm9 696vpsrlq $32,%xmm9,%xmm9 697 698# qhasm: v11 = x7 & mask1 699# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 700# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 701vpand %xmm1,%xmm13,%xmm13 702 703# qhasm: x3 = v00 | v10 704# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 705# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 706vpor %xmm15,%xmm12,%xmm12 707 708# qhasm: x7 = v01 | v11 709# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 710# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 711vpor %xmm13,%xmm9,%xmm9 712 713# qhasm: v00 = x0 & mask2 714# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 715# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 716vpand %xmm2,%xmm14,%xmm13 717 718# qhasm: 4x v10 = x2 << 16 719# asm 1: vpslld $16,<x2=reg128#12,>v10=reg128#16 720# asm 2: vpslld $16,<x2=%xmm11,>v10=%xmm15 721vpslld $16,%xmm11,%xmm15 722 723# qhasm: 4x v01 = x0 unsigned>> 16 724# asm 1: vpsrld $16,<x0=reg128#15,>v01=reg128#15 725# asm 2: vpsrld $16,<x0=%xmm14,>v01=%xmm14 726vpsrld $16,%xmm14,%xmm14 727 728# qhasm: v11 = x2 & mask3 729# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 730# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 731vpand %xmm3,%xmm11,%xmm11 732 733# qhasm: x0 = v00 | v10 734# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 735# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 736vpor %xmm15,%xmm13,%xmm13 737 738# qhasm: x2 = v01 | v11 739# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 740# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 741vpor %xmm11,%xmm14,%xmm11 742 743# qhasm: v00 = x1 & mask2 744# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 745# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 746vpand %xmm2,%xmm10,%xmm14 747 748# qhasm: 4x v10 = x3 << 16 749# asm 1: vpslld $16,<x3=reg128#13,>v10=reg128#16 750# asm 2: vpslld $16,<x3=%xmm12,>v10=%xmm15 751vpslld $16,%xmm12,%xmm15 752 753# qhasm: 4x v01 = x1 unsigned>> 16 754# asm 1: vpsrld $16,<x1=reg128#11,>v01=reg128#11 755# asm 2: vpsrld $16,<x1=%xmm10,>v01=%xmm10 756vpsrld $16,%xmm10,%xmm10 757 758# qhasm: v11 = x3 & mask3 759# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 760# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 761vpand %xmm3,%xmm12,%xmm12 762 763# qhasm: x1 = v00 | v10 764# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 765# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 766vpor %xmm15,%xmm14,%xmm14 767 768# qhasm: x3 = v01 | v11 769# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 770# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 771vpor %xmm12,%xmm10,%xmm10 772 773# qhasm: v00 = x4 & mask2 774# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 775# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 776vpand %xmm2,%xmm6,%xmm12 777 778# qhasm: 4x v10 = x6 << 16 779# asm 1: vpslld $16,<x6=reg128#9,>v10=reg128#16 780# asm 2: vpslld $16,<x6=%xmm8,>v10=%xmm15 781vpslld $16,%xmm8,%xmm15 782 783# qhasm: 4x v01 = x4 unsigned>> 16 784# asm 1: vpsrld $16,<x4=reg128#7,>v01=reg128#7 785# asm 2: vpsrld $16,<x4=%xmm6,>v01=%xmm6 786vpsrld $16,%xmm6,%xmm6 787 788# qhasm: v11 = x6 & mask3 789# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 790# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 791vpand %xmm3,%xmm8,%xmm8 792 793# qhasm: x4 = v00 | v10 794# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 795# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 796vpor %xmm15,%xmm12,%xmm12 797 798# qhasm: x6 = v01 | v11 799# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 800# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 801vpor %xmm8,%xmm6,%xmm6 802 803# qhasm: v00 = x5 & mask2 804# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 805# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 806vpand %xmm2,%xmm7,%xmm8 807 808# qhasm: 4x v10 = x7 << 16 809# asm 1: vpslld $16,<x7=reg128#10,>v10=reg128#16 810# asm 2: vpslld $16,<x7=%xmm9,>v10=%xmm15 811vpslld $16,%xmm9,%xmm15 812 813# qhasm: 4x v01 = x5 unsigned>> 16 814# asm 1: vpsrld $16,<x5=reg128#8,>v01=reg128#8 815# asm 2: vpsrld $16,<x5=%xmm7,>v01=%xmm7 816vpsrld $16,%xmm7,%xmm7 817 818# qhasm: v11 = x7 & mask3 819# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 820# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 821vpand %xmm3,%xmm9,%xmm9 822 823# qhasm: x5 = v00 | v10 824# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 825# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 826vpor %xmm15,%xmm8,%xmm8 827 828# qhasm: x7 = v01 | v11 829# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 830# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 831vpor %xmm9,%xmm7,%xmm7 832 833# qhasm: v00 = x0 & mask4 834# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 835# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 836vpand %xmm4,%xmm13,%xmm9 837 838# qhasm: 8x v10 = x1 << 8 839# asm 1: vpsllw $8,<x1=reg128#15,>v10=reg128#16 840# asm 2: vpsllw $8,<x1=%xmm14,>v10=%xmm15 841vpsllw $8,%xmm14,%xmm15 842 843# qhasm: 8x v01 = x0 unsigned>> 8 844# asm 1: vpsrlw $8,<x0=reg128#14,>v01=reg128#14 845# asm 2: vpsrlw $8,<x0=%xmm13,>v01=%xmm13 846vpsrlw $8,%xmm13,%xmm13 847 848# qhasm: v11 = x1 & mask5 849# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 850# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 851vpand %xmm5,%xmm14,%xmm14 852 853# qhasm: x0 = v00 | v10 854# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 855# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 856vpor %xmm15,%xmm9,%xmm9 857 858# qhasm: x1 = v01 | v11 859# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 860# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 861vpor %xmm14,%xmm13,%xmm13 862 863# qhasm: v00 = x2 & mask4 864# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 865# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 866vpand %xmm4,%xmm11,%xmm14 867 868# qhasm: 8x v10 = x3 << 8 869# asm 1: vpsllw $8,<x3=reg128#11,>v10=reg128#16 870# asm 2: vpsllw $8,<x3=%xmm10,>v10=%xmm15 871vpsllw $8,%xmm10,%xmm15 872 873# qhasm: 8x v01 = x2 unsigned>> 8 874# asm 1: vpsrlw $8,<x2=reg128#12,>v01=reg128#12 875# asm 2: vpsrlw $8,<x2=%xmm11,>v01=%xmm11 876vpsrlw $8,%xmm11,%xmm11 877 878# qhasm: v11 = x3 & mask5 879# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 880# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 881vpand %xmm5,%xmm10,%xmm10 882 883# qhasm: x2 = v00 | v10 884# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 885# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 886vpor %xmm15,%xmm14,%xmm14 887 888# qhasm: x3 = v01 | v11 889# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 890# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 891vpor %xmm10,%xmm11,%xmm10 892 893# qhasm: v00 = x4 & mask4 894# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 895# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 896vpand %xmm4,%xmm12,%xmm11 897 898# qhasm: 8x v10 = x5 << 8 899# asm 1: vpsllw $8,<x5=reg128#9,>v10=reg128#16 900# asm 2: vpsllw $8,<x5=%xmm8,>v10=%xmm15 901vpsllw $8,%xmm8,%xmm15 902 903# qhasm: 8x v01 = x4 unsigned>> 8 904# asm 1: vpsrlw $8,<x4=reg128#13,>v01=reg128#13 905# asm 2: vpsrlw $8,<x4=%xmm12,>v01=%xmm12 906vpsrlw $8,%xmm12,%xmm12 907 908# qhasm: v11 = x5 & mask5 909# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 910# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 911vpand %xmm5,%xmm8,%xmm8 912 913# qhasm: x4 = v00 | v10 914# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 915# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 916vpor %xmm15,%xmm11,%xmm11 917 918# qhasm: x5 = v01 | v11 919# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 920# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 921vpor %xmm8,%xmm12,%xmm8 922 923# qhasm: v00 = x6 & mask4 924# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 925# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 926vpand %xmm4,%xmm6,%xmm12 927 928# qhasm: 8x v10 = x7 << 8 929# asm 1: vpsllw $8,<x7=reg128#8,>v10=reg128#16 930# asm 2: vpsllw $8,<x7=%xmm7,>v10=%xmm15 931vpsllw $8,%xmm7,%xmm15 932 933# qhasm: 8x v01 = x6 unsigned>> 8 934# asm 1: vpsrlw $8,<x6=reg128#7,>v01=reg128#7 935# asm 2: vpsrlw $8,<x6=%xmm6,>v01=%xmm6 936vpsrlw $8,%xmm6,%xmm6 937 938# qhasm: v11 = x7 & mask5 939# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 940# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 941vpand %xmm5,%xmm7,%xmm7 942 943# qhasm: x6 = v00 | v10 944# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 945# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 946vpor %xmm15,%xmm12,%xmm12 947 948# qhasm: x7 = v01 | v11 949# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 950# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 951vpor %xmm7,%xmm6,%xmm6 952 953# qhasm: mem128[ input_0 + 16 ] = x0 954# asm 1: movdqu <x0=reg128#10,16(<input_0=int64#1) 955# asm 2: movdqu <x0=%xmm9,16(<input_0=%rdi) 956movdqu %xmm9,16(%rdi) 957 958# qhasm: mem128[ input_0 + 144 ] = x1 959# asm 1: movdqu <x1=reg128#14,144(<input_0=int64#1) 960# asm 2: movdqu <x1=%xmm13,144(<input_0=%rdi) 961movdqu %xmm13,144(%rdi) 962 963# qhasm: mem128[ input_0 + 272 ] = x2 964# asm 1: movdqu <x2=reg128#15,272(<input_0=int64#1) 965# asm 2: movdqu <x2=%xmm14,272(<input_0=%rdi) 966movdqu %xmm14,272(%rdi) 967 968# qhasm: mem128[ input_0 + 400 ] = x3 969# asm 1: movdqu <x3=reg128#11,400(<input_0=int64#1) 970# asm 2: movdqu <x3=%xmm10,400(<input_0=%rdi) 971movdqu %xmm10,400(%rdi) 972 973# qhasm: mem128[ input_0 + 528 ] = x4 974# asm 1: movdqu <x4=reg128#12,528(<input_0=int64#1) 975# asm 2: movdqu <x4=%xmm11,528(<input_0=%rdi) 976movdqu %xmm11,528(%rdi) 977 978# qhasm: mem128[ input_0 + 656 ] = x5 979# asm 1: movdqu <x5=reg128#9,656(<input_0=int64#1) 980# asm 2: movdqu <x5=%xmm8,656(<input_0=%rdi) 981movdqu %xmm8,656(%rdi) 982 983# qhasm: mem128[ input_0 + 784 ] = x6 984# asm 1: movdqu <x6=reg128#13,784(<input_0=int64#1) 985# asm 2: movdqu <x6=%xmm12,784(<input_0=%rdi) 986movdqu %xmm12,784(%rdi) 987 988# qhasm: mem128[ input_0 + 912 ] = x7 989# asm 1: movdqu <x7=reg128#7,912(<input_0=int64#1) 990# asm 2: movdqu <x7=%xmm6,912(<input_0=%rdi) 991movdqu %xmm6,912(%rdi) 992 993# qhasm: x0 = mem128[ input_0 + 32 ] 994# asm 1: movdqu 32(<input_0=int64#1),>x0=reg128#7 995# asm 2: movdqu 32(<input_0=%rdi),>x0=%xmm6 996movdqu 32(%rdi),%xmm6 997 998# qhasm: x1 = mem128[ input_0 + 160 ] 999# asm 1: movdqu 160(<input_0=int64#1),>x1=reg128#8 1000# asm 2: movdqu 160(<input_0=%rdi),>x1=%xmm7 1001movdqu 160(%rdi),%xmm7 1002 1003# qhasm: x2 = mem128[ input_0 + 288 ] 1004# asm 1: movdqu 288(<input_0=int64#1),>x2=reg128#9 1005# asm 2: movdqu 288(<input_0=%rdi),>x2=%xmm8 1006movdqu 288(%rdi),%xmm8 1007 1008# qhasm: x3 = mem128[ input_0 + 416 ] 1009# asm 1: movdqu 416(<input_0=int64#1),>x3=reg128#10 1010# asm 2: movdqu 416(<input_0=%rdi),>x3=%xmm9 1011movdqu 416(%rdi),%xmm9 1012 1013# qhasm: x4 = mem128[ input_0 + 544 ] 1014# asm 1: movdqu 544(<input_0=int64#1),>x4=reg128#11 1015# asm 2: movdqu 544(<input_0=%rdi),>x4=%xmm10 1016movdqu 544(%rdi),%xmm10 1017 1018# qhasm: x5 = mem128[ input_0 + 672 ] 1019# asm 1: movdqu 672(<input_0=int64#1),>x5=reg128#12 1020# asm 2: movdqu 672(<input_0=%rdi),>x5=%xmm11 1021movdqu 672(%rdi),%xmm11 1022 1023# qhasm: x6 = mem128[ input_0 + 800 ] 1024# asm 1: movdqu 800(<input_0=int64#1),>x6=reg128#13 1025# asm 2: movdqu 800(<input_0=%rdi),>x6=%xmm12 1026movdqu 800(%rdi),%xmm12 1027 1028# qhasm: x7 = mem128[ input_0 + 928 ] 1029# asm 1: movdqu 928(<input_0=int64#1),>x7=reg128#14 1030# asm 2: movdqu 928(<input_0=%rdi),>x7=%xmm13 1031movdqu 928(%rdi),%xmm13 1032 1033# qhasm: v00 = x0 & mask0 1034# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 1035# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 1036vpand %xmm0,%xmm6,%xmm14 1037 1038# qhasm: 2x v10 = x4 << 32 1039# asm 1: vpsllq $32,<x4=reg128#11,>v10=reg128#16 1040# asm 2: vpsllq $32,<x4=%xmm10,>v10=%xmm15 1041vpsllq $32,%xmm10,%xmm15 1042 1043# qhasm: 2x v01 = x0 unsigned>> 32 1044# asm 1: vpsrlq $32,<x0=reg128#7,>v01=reg128#7 1045# asm 2: vpsrlq $32,<x0=%xmm6,>v01=%xmm6 1046vpsrlq $32,%xmm6,%xmm6 1047 1048# qhasm: v11 = x4 & mask1 1049# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 1050# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 1051vpand %xmm1,%xmm10,%xmm10 1052 1053# qhasm: x0 = v00 | v10 1054# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 1055# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 1056vpor %xmm15,%xmm14,%xmm14 1057 1058# qhasm: x4 = v01 | v11 1059# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 1060# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 1061vpor %xmm10,%xmm6,%xmm6 1062 1063# qhasm: v00 = x1 & mask0 1064# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 1065# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 1066vpand %xmm0,%xmm7,%xmm10 1067 1068# qhasm: 2x v10 = x5 << 32 1069# asm 1: vpsllq $32,<x5=reg128#12,>v10=reg128#16 1070# asm 2: vpsllq $32,<x5=%xmm11,>v10=%xmm15 1071vpsllq $32,%xmm11,%xmm15 1072 1073# qhasm: 2x v01 = x1 unsigned>> 32 1074# asm 1: vpsrlq $32,<x1=reg128#8,>v01=reg128#8 1075# asm 2: vpsrlq $32,<x1=%xmm7,>v01=%xmm7 1076vpsrlq $32,%xmm7,%xmm7 1077 1078# qhasm: v11 = x5 & mask1 1079# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 1080# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 1081vpand %xmm1,%xmm11,%xmm11 1082 1083# qhasm: x1 = v00 | v10 1084# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 1085# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 1086vpor %xmm15,%xmm10,%xmm10 1087 1088# qhasm: x5 = v01 | v11 1089# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 1090# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 1091vpor %xmm11,%xmm7,%xmm7 1092 1093# qhasm: v00 = x2 & mask0 1094# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 1095# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 1096vpand %xmm0,%xmm8,%xmm11 1097 1098# qhasm: 2x v10 = x6 << 32 1099# asm 1: vpsllq $32,<x6=reg128#13,>v10=reg128#16 1100# asm 2: vpsllq $32,<x6=%xmm12,>v10=%xmm15 1101vpsllq $32,%xmm12,%xmm15 1102 1103# qhasm: 2x v01 = x2 unsigned>> 32 1104# asm 1: vpsrlq $32,<x2=reg128#9,>v01=reg128#9 1105# asm 2: vpsrlq $32,<x2=%xmm8,>v01=%xmm8 1106vpsrlq $32,%xmm8,%xmm8 1107 1108# qhasm: v11 = x6 & mask1 1109# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 1110# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 1111vpand %xmm1,%xmm12,%xmm12 1112 1113# qhasm: x2 = v00 | v10 1114# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 1115# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 1116vpor %xmm15,%xmm11,%xmm11 1117 1118# qhasm: x6 = v01 | v11 1119# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 1120# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 1121vpor %xmm12,%xmm8,%xmm8 1122 1123# qhasm: v00 = x3 & mask0 1124# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 1125# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 1126vpand %xmm0,%xmm9,%xmm12 1127 1128# qhasm: 2x v10 = x7 << 32 1129# asm 1: vpsllq $32,<x7=reg128#14,>v10=reg128#16 1130# asm 2: vpsllq $32,<x7=%xmm13,>v10=%xmm15 1131vpsllq $32,%xmm13,%xmm15 1132 1133# qhasm: 2x v01 = x3 unsigned>> 32 1134# asm 1: vpsrlq $32,<x3=reg128#10,>v01=reg128#10 1135# asm 2: vpsrlq $32,<x3=%xmm9,>v01=%xmm9 1136vpsrlq $32,%xmm9,%xmm9 1137 1138# qhasm: v11 = x7 & mask1 1139# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 1140# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 1141vpand %xmm1,%xmm13,%xmm13 1142 1143# qhasm: x3 = v00 | v10 1144# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 1145# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 1146vpor %xmm15,%xmm12,%xmm12 1147 1148# qhasm: x7 = v01 | v11 1149# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 1150# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 1151vpor %xmm13,%xmm9,%xmm9 1152 1153# qhasm: v00 = x0 & mask2 1154# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 1155# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 1156vpand %xmm2,%xmm14,%xmm13 1157 1158# qhasm: 4x v10 = x2 << 16 1159# asm 1: vpslld $16,<x2=reg128#12,>v10=reg128#16 1160# asm 2: vpslld $16,<x2=%xmm11,>v10=%xmm15 1161vpslld $16,%xmm11,%xmm15 1162 1163# qhasm: 4x v01 = x0 unsigned>> 16 1164# asm 1: vpsrld $16,<x0=reg128#15,>v01=reg128#15 1165# asm 2: vpsrld $16,<x0=%xmm14,>v01=%xmm14 1166vpsrld $16,%xmm14,%xmm14 1167 1168# qhasm: v11 = x2 & mask3 1169# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 1170# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 1171vpand %xmm3,%xmm11,%xmm11 1172 1173# qhasm: x0 = v00 | v10 1174# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 1175# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 1176vpor %xmm15,%xmm13,%xmm13 1177 1178# qhasm: x2 = v01 | v11 1179# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 1180# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 1181vpor %xmm11,%xmm14,%xmm11 1182 1183# qhasm: v00 = x1 & mask2 1184# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 1185# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 1186vpand %xmm2,%xmm10,%xmm14 1187 1188# qhasm: 4x v10 = x3 << 16 1189# asm 1: vpslld $16,<x3=reg128#13,>v10=reg128#16 1190# asm 2: vpslld $16,<x3=%xmm12,>v10=%xmm15 1191vpslld $16,%xmm12,%xmm15 1192 1193# qhasm: 4x v01 = x1 unsigned>> 16 1194# asm 1: vpsrld $16,<x1=reg128#11,>v01=reg128#11 1195# asm 2: vpsrld $16,<x1=%xmm10,>v01=%xmm10 1196vpsrld $16,%xmm10,%xmm10 1197 1198# qhasm: v11 = x3 & mask3 1199# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 1200# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 1201vpand %xmm3,%xmm12,%xmm12 1202 1203# qhasm: x1 = v00 | v10 1204# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 1205# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 1206vpor %xmm15,%xmm14,%xmm14 1207 1208# qhasm: x3 = v01 | v11 1209# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 1210# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 1211vpor %xmm12,%xmm10,%xmm10 1212 1213# qhasm: v00 = x4 & mask2 1214# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 1215# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 1216vpand %xmm2,%xmm6,%xmm12 1217 1218# qhasm: 4x v10 = x6 << 16 1219# asm 1: vpslld $16,<x6=reg128#9,>v10=reg128#16 1220# asm 2: vpslld $16,<x6=%xmm8,>v10=%xmm15 1221vpslld $16,%xmm8,%xmm15 1222 1223# qhasm: 4x v01 = x4 unsigned>> 16 1224# asm 1: vpsrld $16,<x4=reg128#7,>v01=reg128#7 1225# asm 2: vpsrld $16,<x4=%xmm6,>v01=%xmm6 1226vpsrld $16,%xmm6,%xmm6 1227 1228# qhasm: v11 = x6 & mask3 1229# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 1230# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 1231vpand %xmm3,%xmm8,%xmm8 1232 1233# qhasm: x4 = v00 | v10 1234# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 1235# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 1236vpor %xmm15,%xmm12,%xmm12 1237 1238# qhasm: x6 = v01 | v11 1239# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 1240# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 1241vpor %xmm8,%xmm6,%xmm6 1242 1243# qhasm: v00 = x5 & mask2 1244# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 1245# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 1246vpand %xmm2,%xmm7,%xmm8 1247 1248# qhasm: 4x v10 = x7 << 16 1249# asm 1: vpslld $16,<x7=reg128#10,>v10=reg128#16 1250# asm 2: vpslld $16,<x7=%xmm9,>v10=%xmm15 1251vpslld $16,%xmm9,%xmm15 1252 1253# qhasm: 4x v01 = x5 unsigned>> 16 1254# asm 1: vpsrld $16,<x5=reg128#8,>v01=reg128#8 1255# asm 2: vpsrld $16,<x5=%xmm7,>v01=%xmm7 1256vpsrld $16,%xmm7,%xmm7 1257 1258# qhasm: v11 = x7 & mask3 1259# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 1260# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 1261vpand %xmm3,%xmm9,%xmm9 1262 1263# qhasm: x5 = v00 | v10 1264# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 1265# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 1266vpor %xmm15,%xmm8,%xmm8 1267 1268# qhasm: x7 = v01 | v11 1269# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 1270# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 1271vpor %xmm9,%xmm7,%xmm7 1272 1273# qhasm: v00 = x0 & mask4 1274# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 1275# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 1276vpand %xmm4,%xmm13,%xmm9 1277 1278# qhasm: 8x v10 = x1 << 8 1279# asm 1: vpsllw $8,<x1=reg128#15,>v10=reg128#16 1280# asm 2: vpsllw $8,<x1=%xmm14,>v10=%xmm15 1281vpsllw $8,%xmm14,%xmm15 1282 1283# qhasm: 8x v01 = x0 unsigned>> 8 1284# asm 1: vpsrlw $8,<x0=reg128#14,>v01=reg128#14 1285# asm 2: vpsrlw $8,<x0=%xmm13,>v01=%xmm13 1286vpsrlw $8,%xmm13,%xmm13 1287 1288# qhasm: v11 = x1 & mask5 1289# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 1290# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 1291vpand %xmm5,%xmm14,%xmm14 1292 1293# qhasm: x0 = v00 | v10 1294# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 1295# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 1296vpor %xmm15,%xmm9,%xmm9 1297 1298# qhasm: x1 = v01 | v11 1299# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 1300# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 1301vpor %xmm14,%xmm13,%xmm13 1302 1303# qhasm: v00 = x2 & mask4 1304# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 1305# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 1306vpand %xmm4,%xmm11,%xmm14 1307 1308# qhasm: 8x v10 = x3 << 8 1309# asm 1: vpsllw $8,<x3=reg128#11,>v10=reg128#16 1310# asm 2: vpsllw $8,<x3=%xmm10,>v10=%xmm15 1311vpsllw $8,%xmm10,%xmm15 1312 1313# qhasm: 8x v01 = x2 unsigned>> 8 1314# asm 1: vpsrlw $8,<x2=reg128#12,>v01=reg128#12 1315# asm 2: vpsrlw $8,<x2=%xmm11,>v01=%xmm11 1316vpsrlw $8,%xmm11,%xmm11 1317 1318# qhasm: v11 = x3 & mask5 1319# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 1320# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 1321vpand %xmm5,%xmm10,%xmm10 1322 1323# qhasm: x2 = v00 | v10 1324# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 1325# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 1326vpor %xmm15,%xmm14,%xmm14 1327 1328# qhasm: x3 = v01 | v11 1329# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 1330# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 1331vpor %xmm10,%xmm11,%xmm10 1332 1333# qhasm: v00 = x4 & mask4 1334# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 1335# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 1336vpand %xmm4,%xmm12,%xmm11 1337 1338# qhasm: 8x v10 = x5 << 8 1339# asm 1: vpsllw $8,<x5=reg128#9,>v10=reg128#16 1340# asm 2: vpsllw $8,<x5=%xmm8,>v10=%xmm15 1341vpsllw $8,%xmm8,%xmm15 1342 1343# qhasm: 8x v01 = x4 unsigned>> 8 1344# asm 1: vpsrlw $8,<x4=reg128#13,>v01=reg128#13 1345# asm 2: vpsrlw $8,<x4=%xmm12,>v01=%xmm12 1346vpsrlw $8,%xmm12,%xmm12 1347 1348# qhasm: v11 = x5 & mask5 1349# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 1350# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 1351vpand %xmm5,%xmm8,%xmm8 1352 1353# qhasm: x4 = v00 | v10 1354# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 1355# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 1356vpor %xmm15,%xmm11,%xmm11 1357 1358# qhasm: x5 = v01 | v11 1359# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 1360# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 1361vpor %xmm8,%xmm12,%xmm8 1362 1363# qhasm: v00 = x6 & mask4 1364# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 1365# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 1366vpand %xmm4,%xmm6,%xmm12 1367 1368# qhasm: 8x v10 = x7 << 8 1369# asm 1: vpsllw $8,<x7=reg128#8,>v10=reg128#16 1370# asm 2: vpsllw $8,<x7=%xmm7,>v10=%xmm15 1371vpsllw $8,%xmm7,%xmm15 1372 1373# qhasm: 8x v01 = x6 unsigned>> 8 1374# asm 1: vpsrlw $8,<x6=reg128#7,>v01=reg128#7 1375# asm 2: vpsrlw $8,<x6=%xmm6,>v01=%xmm6 1376vpsrlw $8,%xmm6,%xmm6 1377 1378# qhasm: v11 = x7 & mask5 1379# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 1380# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 1381vpand %xmm5,%xmm7,%xmm7 1382 1383# qhasm: x6 = v00 | v10 1384# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 1385# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 1386vpor %xmm15,%xmm12,%xmm12 1387 1388# qhasm: x7 = v01 | v11 1389# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 1390# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 1391vpor %xmm7,%xmm6,%xmm6 1392 1393# qhasm: mem128[ input_0 + 32 ] = x0 1394# asm 1: movdqu <x0=reg128#10,32(<input_0=int64#1) 1395# asm 2: movdqu <x0=%xmm9,32(<input_0=%rdi) 1396movdqu %xmm9,32(%rdi) 1397 1398# qhasm: mem128[ input_0 + 160 ] = x1 1399# asm 1: movdqu <x1=reg128#14,160(<input_0=int64#1) 1400# asm 2: movdqu <x1=%xmm13,160(<input_0=%rdi) 1401movdqu %xmm13,160(%rdi) 1402 1403# qhasm: mem128[ input_0 + 288 ] = x2 1404# asm 1: movdqu <x2=reg128#15,288(<input_0=int64#1) 1405# asm 2: movdqu <x2=%xmm14,288(<input_0=%rdi) 1406movdqu %xmm14,288(%rdi) 1407 1408# qhasm: mem128[ input_0 + 416 ] = x3 1409# asm 1: movdqu <x3=reg128#11,416(<input_0=int64#1) 1410# asm 2: movdqu <x3=%xmm10,416(<input_0=%rdi) 1411movdqu %xmm10,416(%rdi) 1412 1413# qhasm: mem128[ input_0 + 544 ] = x4 1414# asm 1: movdqu <x4=reg128#12,544(<input_0=int64#1) 1415# asm 2: movdqu <x4=%xmm11,544(<input_0=%rdi) 1416movdqu %xmm11,544(%rdi) 1417 1418# qhasm: mem128[ input_0 + 672 ] = x5 1419# asm 1: movdqu <x5=reg128#9,672(<input_0=int64#1) 1420# asm 2: movdqu <x5=%xmm8,672(<input_0=%rdi) 1421movdqu %xmm8,672(%rdi) 1422 1423# qhasm: mem128[ input_0 + 800 ] = x6 1424# asm 1: movdqu <x6=reg128#13,800(<input_0=int64#1) 1425# asm 2: movdqu <x6=%xmm12,800(<input_0=%rdi) 1426movdqu %xmm12,800(%rdi) 1427 1428# qhasm: mem128[ input_0 + 928 ] = x7 1429# asm 1: movdqu <x7=reg128#7,928(<input_0=int64#1) 1430# asm 2: movdqu <x7=%xmm6,928(<input_0=%rdi) 1431movdqu %xmm6,928(%rdi) 1432 1433# qhasm: x0 = mem128[ input_0 + 48 ] 1434# asm 1: movdqu 48(<input_0=int64#1),>x0=reg128#7 1435# asm 2: movdqu 48(<input_0=%rdi),>x0=%xmm6 1436movdqu 48(%rdi),%xmm6 1437 1438# qhasm: x1 = mem128[ input_0 + 176 ] 1439# asm 1: movdqu 176(<input_0=int64#1),>x1=reg128#8 1440# asm 2: movdqu 176(<input_0=%rdi),>x1=%xmm7 1441movdqu 176(%rdi),%xmm7 1442 1443# qhasm: x2 = mem128[ input_0 + 304 ] 1444# asm 1: movdqu 304(<input_0=int64#1),>x2=reg128#9 1445# asm 2: movdqu 304(<input_0=%rdi),>x2=%xmm8 1446movdqu 304(%rdi),%xmm8 1447 1448# qhasm: x3 = mem128[ input_0 + 432 ] 1449# asm 1: movdqu 432(<input_0=int64#1),>x3=reg128#10 1450# asm 2: movdqu 432(<input_0=%rdi),>x3=%xmm9 1451movdqu 432(%rdi),%xmm9 1452 1453# qhasm: x4 = mem128[ input_0 + 560 ] 1454# asm 1: movdqu 560(<input_0=int64#1),>x4=reg128#11 1455# asm 2: movdqu 560(<input_0=%rdi),>x4=%xmm10 1456movdqu 560(%rdi),%xmm10 1457 1458# qhasm: x5 = mem128[ input_0 + 688 ] 1459# asm 1: movdqu 688(<input_0=int64#1),>x5=reg128#12 1460# asm 2: movdqu 688(<input_0=%rdi),>x5=%xmm11 1461movdqu 688(%rdi),%xmm11 1462 1463# qhasm: x6 = mem128[ input_0 + 816 ] 1464# asm 1: movdqu 816(<input_0=int64#1),>x6=reg128#13 1465# asm 2: movdqu 816(<input_0=%rdi),>x6=%xmm12 1466movdqu 816(%rdi),%xmm12 1467 1468# qhasm: x7 = mem128[ input_0 + 944 ] 1469# asm 1: movdqu 944(<input_0=int64#1),>x7=reg128#14 1470# asm 2: movdqu 944(<input_0=%rdi),>x7=%xmm13 1471movdqu 944(%rdi),%xmm13 1472 1473# qhasm: v00 = x0 & mask0 1474# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 1475# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 1476vpand %xmm0,%xmm6,%xmm14 1477 1478# qhasm: 2x v10 = x4 << 32 1479# asm 1: vpsllq $32,<x4=reg128#11,>v10=reg128#16 1480# asm 2: vpsllq $32,<x4=%xmm10,>v10=%xmm15 1481vpsllq $32,%xmm10,%xmm15 1482 1483# qhasm: 2x v01 = x0 unsigned>> 32 1484# asm 1: vpsrlq $32,<x0=reg128#7,>v01=reg128#7 1485# asm 2: vpsrlq $32,<x0=%xmm6,>v01=%xmm6 1486vpsrlq $32,%xmm6,%xmm6 1487 1488# qhasm: v11 = x4 & mask1 1489# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 1490# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 1491vpand %xmm1,%xmm10,%xmm10 1492 1493# qhasm: x0 = v00 | v10 1494# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 1495# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 1496vpor %xmm15,%xmm14,%xmm14 1497 1498# qhasm: x4 = v01 | v11 1499# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 1500# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 1501vpor %xmm10,%xmm6,%xmm6 1502 1503# qhasm: v00 = x1 & mask0 1504# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 1505# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 1506vpand %xmm0,%xmm7,%xmm10 1507 1508# qhasm: 2x v10 = x5 << 32 1509# asm 1: vpsllq $32,<x5=reg128#12,>v10=reg128#16 1510# asm 2: vpsllq $32,<x5=%xmm11,>v10=%xmm15 1511vpsllq $32,%xmm11,%xmm15 1512 1513# qhasm: 2x v01 = x1 unsigned>> 32 1514# asm 1: vpsrlq $32,<x1=reg128#8,>v01=reg128#8 1515# asm 2: vpsrlq $32,<x1=%xmm7,>v01=%xmm7 1516vpsrlq $32,%xmm7,%xmm7 1517 1518# qhasm: v11 = x5 & mask1 1519# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 1520# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 1521vpand %xmm1,%xmm11,%xmm11 1522 1523# qhasm: x1 = v00 | v10 1524# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 1525# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 1526vpor %xmm15,%xmm10,%xmm10 1527 1528# qhasm: x5 = v01 | v11 1529# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 1530# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 1531vpor %xmm11,%xmm7,%xmm7 1532 1533# qhasm: v00 = x2 & mask0 1534# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 1535# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 1536vpand %xmm0,%xmm8,%xmm11 1537 1538# qhasm: 2x v10 = x6 << 32 1539# asm 1: vpsllq $32,<x6=reg128#13,>v10=reg128#16 1540# asm 2: vpsllq $32,<x6=%xmm12,>v10=%xmm15 1541vpsllq $32,%xmm12,%xmm15 1542 1543# qhasm: 2x v01 = x2 unsigned>> 32 1544# asm 1: vpsrlq $32,<x2=reg128#9,>v01=reg128#9 1545# asm 2: vpsrlq $32,<x2=%xmm8,>v01=%xmm8 1546vpsrlq $32,%xmm8,%xmm8 1547 1548# qhasm: v11 = x6 & mask1 1549# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 1550# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 1551vpand %xmm1,%xmm12,%xmm12 1552 1553# qhasm: x2 = v00 | v10 1554# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 1555# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 1556vpor %xmm15,%xmm11,%xmm11 1557 1558# qhasm: x6 = v01 | v11 1559# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 1560# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 1561vpor %xmm12,%xmm8,%xmm8 1562 1563# qhasm: v00 = x3 & mask0 1564# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 1565# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 1566vpand %xmm0,%xmm9,%xmm12 1567 1568# qhasm: 2x v10 = x7 << 32 1569# asm 1: vpsllq $32,<x7=reg128#14,>v10=reg128#16 1570# asm 2: vpsllq $32,<x7=%xmm13,>v10=%xmm15 1571vpsllq $32,%xmm13,%xmm15 1572 1573# qhasm: 2x v01 = x3 unsigned>> 32 1574# asm 1: vpsrlq $32,<x3=reg128#10,>v01=reg128#10 1575# asm 2: vpsrlq $32,<x3=%xmm9,>v01=%xmm9 1576vpsrlq $32,%xmm9,%xmm9 1577 1578# qhasm: v11 = x7 & mask1 1579# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 1580# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 1581vpand %xmm1,%xmm13,%xmm13 1582 1583# qhasm: x3 = v00 | v10 1584# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 1585# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 1586vpor %xmm15,%xmm12,%xmm12 1587 1588# qhasm: x7 = v01 | v11 1589# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 1590# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 1591vpor %xmm13,%xmm9,%xmm9 1592 1593# qhasm: v00 = x0 & mask2 1594# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 1595# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 1596vpand %xmm2,%xmm14,%xmm13 1597 1598# qhasm: 4x v10 = x2 << 16 1599# asm 1: vpslld $16,<x2=reg128#12,>v10=reg128#16 1600# asm 2: vpslld $16,<x2=%xmm11,>v10=%xmm15 1601vpslld $16,%xmm11,%xmm15 1602 1603# qhasm: 4x v01 = x0 unsigned>> 16 1604# asm 1: vpsrld $16,<x0=reg128#15,>v01=reg128#15 1605# asm 2: vpsrld $16,<x0=%xmm14,>v01=%xmm14 1606vpsrld $16,%xmm14,%xmm14 1607 1608# qhasm: v11 = x2 & mask3 1609# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 1610# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 1611vpand %xmm3,%xmm11,%xmm11 1612 1613# qhasm: x0 = v00 | v10 1614# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 1615# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 1616vpor %xmm15,%xmm13,%xmm13 1617 1618# qhasm: x2 = v01 | v11 1619# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 1620# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 1621vpor %xmm11,%xmm14,%xmm11 1622 1623# qhasm: v00 = x1 & mask2 1624# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 1625# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 1626vpand %xmm2,%xmm10,%xmm14 1627 1628# qhasm: 4x v10 = x3 << 16 1629# asm 1: vpslld $16,<x3=reg128#13,>v10=reg128#16 1630# asm 2: vpslld $16,<x3=%xmm12,>v10=%xmm15 1631vpslld $16,%xmm12,%xmm15 1632 1633# qhasm: 4x v01 = x1 unsigned>> 16 1634# asm 1: vpsrld $16,<x1=reg128#11,>v01=reg128#11 1635# asm 2: vpsrld $16,<x1=%xmm10,>v01=%xmm10 1636vpsrld $16,%xmm10,%xmm10 1637 1638# qhasm: v11 = x3 & mask3 1639# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 1640# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 1641vpand %xmm3,%xmm12,%xmm12 1642 1643# qhasm: x1 = v00 | v10 1644# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 1645# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 1646vpor %xmm15,%xmm14,%xmm14 1647 1648# qhasm: x3 = v01 | v11 1649# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 1650# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 1651vpor %xmm12,%xmm10,%xmm10 1652 1653# qhasm: v00 = x4 & mask2 1654# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 1655# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 1656vpand %xmm2,%xmm6,%xmm12 1657 1658# qhasm: 4x v10 = x6 << 16 1659# asm 1: vpslld $16,<x6=reg128#9,>v10=reg128#16 1660# asm 2: vpslld $16,<x6=%xmm8,>v10=%xmm15 1661vpslld $16,%xmm8,%xmm15 1662 1663# qhasm: 4x v01 = x4 unsigned>> 16 1664# asm 1: vpsrld $16,<x4=reg128#7,>v01=reg128#7 1665# asm 2: vpsrld $16,<x4=%xmm6,>v01=%xmm6 1666vpsrld $16,%xmm6,%xmm6 1667 1668# qhasm: v11 = x6 & mask3 1669# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 1670# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 1671vpand %xmm3,%xmm8,%xmm8 1672 1673# qhasm: x4 = v00 | v10 1674# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 1675# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 1676vpor %xmm15,%xmm12,%xmm12 1677 1678# qhasm: x6 = v01 | v11 1679# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 1680# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 1681vpor %xmm8,%xmm6,%xmm6 1682 1683# qhasm: v00 = x5 & mask2 1684# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 1685# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 1686vpand %xmm2,%xmm7,%xmm8 1687 1688# qhasm: 4x v10 = x7 << 16 1689# asm 1: vpslld $16,<x7=reg128#10,>v10=reg128#16 1690# asm 2: vpslld $16,<x7=%xmm9,>v10=%xmm15 1691vpslld $16,%xmm9,%xmm15 1692 1693# qhasm: 4x v01 = x5 unsigned>> 16 1694# asm 1: vpsrld $16,<x5=reg128#8,>v01=reg128#8 1695# asm 2: vpsrld $16,<x5=%xmm7,>v01=%xmm7 1696vpsrld $16,%xmm7,%xmm7 1697 1698# qhasm: v11 = x7 & mask3 1699# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 1700# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 1701vpand %xmm3,%xmm9,%xmm9 1702 1703# qhasm: x5 = v00 | v10 1704# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 1705# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 1706vpor %xmm15,%xmm8,%xmm8 1707 1708# qhasm: x7 = v01 | v11 1709# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 1710# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 1711vpor %xmm9,%xmm7,%xmm7 1712 1713# qhasm: v00 = x0 & mask4 1714# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 1715# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 1716vpand %xmm4,%xmm13,%xmm9 1717 1718# qhasm: 8x v10 = x1 << 8 1719# asm 1: vpsllw $8,<x1=reg128#15,>v10=reg128#16 1720# asm 2: vpsllw $8,<x1=%xmm14,>v10=%xmm15 1721vpsllw $8,%xmm14,%xmm15 1722 1723# qhasm: 8x v01 = x0 unsigned>> 8 1724# asm 1: vpsrlw $8,<x0=reg128#14,>v01=reg128#14 1725# asm 2: vpsrlw $8,<x0=%xmm13,>v01=%xmm13 1726vpsrlw $8,%xmm13,%xmm13 1727 1728# qhasm: v11 = x1 & mask5 1729# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 1730# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 1731vpand %xmm5,%xmm14,%xmm14 1732 1733# qhasm: x0 = v00 | v10 1734# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 1735# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 1736vpor %xmm15,%xmm9,%xmm9 1737 1738# qhasm: x1 = v01 | v11 1739# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 1740# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 1741vpor %xmm14,%xmm13,%xmm13 1742 1743# qhasm: v00 = x2 & mask4 1744# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 1745# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 1746vpand %xmm4,%xmm11,%xmm14 1747 1748# qhasm: 8x v10 = x3 << 8 1749# asm 1: vpsllw $8,<x3=reg128#11,>v10=reg128#16 1750# asm 2: vpsllw $8,<x3=%xmm10,>v10=%xmm15 1751vpsllw $8,%xmm10,%xmm15 1752 1753# qhasm: 8x v01 = x2 unsigned>> 8 1754# asm 1: vpsrlw $8,<x2=reg128#12,>v01=reg128#12 1755# asm 2: vpsrlw $8,<x2=%xmm11,>v01=%xmm11 1756vpsrlw $8,%xmm11,%xmm11 1757 1758# qhasm: v11 = x3 & mask5 1759# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 1760# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 1761vpand %xmm5,%xmm10,%xmm10 1762 1763# qhasm: x2 = v00 | v10 1764# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 1765# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 1766vpor %xmm15,%xmm14,%xmm14 1767 1768# qhasm: x3 = v01 | v11 1769# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 1770# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 1771vpor %xmm10,%xmm11,%xmm10 1772 1773# qhasm: v00 = x4 & mask4 1774# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 1775# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 1776vpand %xmm4,%xmm12,%xmm11 1777 1778# qhasm: 8x v10 = x5 << 8 1779# asm 1: vpsllw $8,<x5=reg128#9,>v10=reg128#16 1780# asm 2: vpsllw $8,<x5=%xmm8,>v10=%xmm15 1781vpsllw $8,%xmm8,%xmm15 1782 1783# qhasm: 8x v01 = x4 unsigned>> 8 1784# asm 1: vpsrlw $8,<x4=reg128#13,>v01=reg128#13 1785# asm 2: vpsrlw $8,<x4=%xmm12,>v01=%xmm12 1786vpsrlw $8,%xmm12,%xmm12 1787 1788# qhasm: v11 = x5 & mask5 1789# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 1790# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 1791vpand %xmm5,%xmm8,%xmm8 1792 1793# qhasm: x4 = v00 | v10 1794# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 1795# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 1796vpor %xmm15,%xmm11,%xmm11 1797 1798# qhasm: x5 = v01 | v11 1799# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 1800# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 1801vpor %xmm8,%xmm12,%xmm8 1802 1803# qhasm: v00 = x6 & mask4 1804# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 1805# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 1806vpand %xmm4,%xmm6,%xmm12 1807 1808# qhasm: 8x v10 = x7 << 8 1809# asm 1: vpsllw $8,<x7=reg128#8,>v10=reg128#16 1810# asm 2: vpsllw $8,<x7=%xmm7,>v10=%xmm15 1811vpsllw $8,%xmm7,%xmm15 1812 1813# qhasm: 8x v01 = x6 unsigned>> 8 1814# asm 1: vpsrlw $8,<x6=reg128#7,>v01=reg128#7 1815# asm 2: vpsrlw $8,<x6=%xmm6,>v01=%xmm6 1816vpsrlw $8,%xmm6,%xmm6 1817 1818# qhasm: v11 = x7 & mask5 1819# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 1820# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 1821vpand %xmm5,%xmm7,%xmm7 1822 1823# qhasm: x6 = v00 | v10 1824# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 1825# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 1826vpor %xmm15,%xmm12,%xmm12 1827 1828# qhasm: x7 = v01 | v11 1829# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 1830# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 1831vpor %xmm7,%xmm6,%xmm6 1832 1833# qhasm: mem128[ input_0 + 48 ] = x0 1834# asm 1: movdqu <x0=reg128#10,48(<input_0=int64#1) 1835# asm 2: movdqu <x0=%xmm9,48(<input_0=%rdi) 1836movdqu %xmm9,48(%rdi) 1837 1838# qhasm: mem128[ input_0 + 176 ] = x1 1839# asm 1: movdqu <x1=reg128#14,176(<input_0=int64#1) 1840# asm 2: movdqu <x1=%xmm13,176(<input_0=%rdi) 1841movdqu %xmm13,176(%rdi) 1842 1843# qhasm: mem128[ input_0 + 304 ] = x2 1844# asm 1: movdqu <x2=reg128#15,304(<input_0=int64#1) 1845# asm 2: movdqu <x2=%xmm14,304(<input_0=%rdi) 1846movdqu %xmm14,304(%rdi) 1847 1848# qhasm: mem128[ input_0 + 432 ] = x3 1849# asm 1: movdqu <x3=reg128#11,432(<input_0=int64#1) 1850# asm 2: movdqu <x3=%xmm10,432(<input_0=%rdi) 1851movdqu %xmm10,432(%rdi) 1852 1853# qhasm: mem128[ input_0 + 560 ] = x4 1854# asm 1: movdqu <x4=reg128#12,560(<input_0=int64#1) 1855# asm 2: movdqu <x4=%xmm11,560(<input_0=%rdi) 1856movdqu %xmm11,560(%rdi) 1857 1858# qhasm: mem128[ input_0 + 688 ] = x5 1859# asm 1: movdqu <x5=reg128#9,688(<input_0=int64#1) 1860# asm 2: movdqu <x5=%xmm8,688(<input_0=%rdi) 1861movdqu %xmm8,688(%rdi) 1862 1863# qhasm: mem128[ input_0 + 816 ] = x6 1864# asm 1: movdqu <x6=reg128#13,816(<input_0=int64#1) 1865# asm 2: movdqu <x6=%xmm12,816(<input_0=%rdi) 1866movdqu %xmm12,816(%rdi) 1867 1868# qhasm: mem128[ input_0 + 944 ] = x7 1869# asm 1: movdqu <x7=reg128#7,944(<input_0=int64#1) 1870# asm 2: movdqu <x7=%xmm6,944(<input_0=%rdi) 1871movdqu %xmm6,944(%rdi) 1872 1873# qhasm: x0 = mem128[ input_0 + 64 ] 1874# asm 1: movdqu 64(<input_0=int64#1),>x0=reg128#7 1875# asm 2: movdqu 64(<input_0=%rdi),>x0=%xmm6 1876movdqu 64(%rdi),%xmm6 1877 1878# qhasm: x1 = mem128[ input_0 + 192 ] 1879# asm 1: movdqu 192(<input_0=int64#1),>x1=reg128#8 1880# asm 2: movdqu 192(<input_0=%rdi),>x1=%xmm7 1881movdqu 192(%rdi),%xmm7 1882 1883# qhasm: x2 = mem128[ input_0 + 320 ] 1884# asm 1: movdqu 320(<input_0=int64#1),>x2=reg128#9 1885# asm 2: movdqu 320(<input_0=%rdi),>x2=%xmm8 1886movdqu 320(%rdi),%xmm8 1887 1888# qhasm: x3 = mem128[ input_0 + 448 ] 1889# asm 1: movdqu 448(<input_0=int64#1),>x3=reg128#10 1890# asm 2: movdqu 448(<input_0=%rdi),>x3=%xmm9 1891movdqu 448(%rdi),%xmm9 1892 1893# qhasm: x4 = mem128[ input_0 + 576 ] 1894# asm 1: movdqu 576(<input_0=int64#1),>x4=reg128#11 1895# asm 2: movdqu 576(<input_0=%rdi),>x4=%xmm10 1896movdqu 576(%rdi),%xmm10 1897 1898# qhasm: x5 = mem128[ input_0 + 704 ] 1899# asm 1: movdqu 704(<input_0=int64#1),>x5=reg128#12 1900# asm 2: movdqu 704(<input_0=%rdi),>x5=%xmm11 1901movdqu 704(%rdi),%xmm11 1902 1903# qhasm: x6 = mem128[ input_0 + 832 ] 1904# asm 1: movdqu 832(<input_0=int64#1),>x6=reg128#13 1905# asm 2: movdqu 832(<input_0=%rdi),>x6=%xmm12 1906movdqu 832(%rdi),%xmm12 1907 1908# qhasm: x7 = mem128[ input_0 + 960 ] 1909# asm 1: movdqu 960(<input_0=int64#1),>x7=reg128#14 1910# asm 2: movdqu 960(<input_0=%rdi),>x7=%xmm13 1911movdqu 960(%rdi),%xmm13 1912 1913# qhasm: v00 = x0 & mask0 1914# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 1915# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 1916vpand %xmm0,%xmm6,%xmm14 1917 1918# qhasm: 2x v10 = x4 << 32 1919# asm 1: vpsllq $32,<x4=reg128#11,>v10=reg128#16 1920# asm 2: vpsllq $32,<x4=%xmm10,>v10=%xmm15 1921vpsllq $32,%xmm10,%xmm15 1922 1923# qhasm: 2x v01 = x0 unsigned>> 32 1924# asm 1: vpsrlq $32,<x0=reg128#7,>v01=reg128#7 1925# asm 2: vpsrlq $32,<x0=%xmm6,>v01=%xmm6 1926vpsrlq $32,%xmm6,%xmm6 1927 1928# qhasm: v11 = x4 & mask1 1929# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 1930# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 1931vpand %xmm1,%xmm10,%xmm10 1932 1933# qhasm: x0 = v00 | v10 1934# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 1935# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 1936vpor %xmm15,%xmm14,%xmm14 1937 1938# qhasm: x4 = v01 | v11 1939# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 1940# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 1941vpor %xmm10,%xmm6,%xmm6 1942 1943# qhasm: v00 = x1 & mask0 1944# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 1945# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 1946vpand %xmm0,%xmm7,%xmm10 1947 1948# qhasm: 2x v10 = x5 << 32 1949# asm 1: vpsllq $32,<x5=reg128#12,>v10=reg128#16 1950# asm 2: vpsllq $32,<x5=%xmm11,>v10=%xmm15 1951vpsllq $32,%xmm11,%xmm15 1952 1953# qhasm: 2x v01 = x1 unsigned>> 32 1954# asm 1: vpsrlq $32,<x1=reg128#8,>v01=reg128#8 1955# asm 2: vpsrlq $32,<x1=%xmm7,>v01=%xmm7 1956vpsrlq $32,%xmm7,%xmm7 1957 1958# qhasm: v11 = x5 & mask1 1959# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 1960# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 1961vpand %xmm1,%xmm11,%xmm11 1962 1963# qhasm: x1 = v00 | v10 1964# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 1965# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 1966vpor %xmm15,%xmm10,%xmm10 1967 1968# qhasm: x5 = v01 | v11 1969# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 1970# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 1971vpor %xmm11,%xmm7,%xmm7 1972 1973# qhasm: v00 = x2 & mask0 1974# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 1975# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 1976vpand %xmm0,%xmm8,%xmm11 1977 1978# qhasm: 2x v10 = x6 << 32 1979# asm 1: vpsllq $32,<x6=reg128#13,>v10=reg128#16 1980# asm 2: vpsllq $32,<x6=%xmm12,>v10=%xmm15 1981vpsllq $32,%xmm12,%xmm15 1982 1983# qhasm: 2x v01 = x2 unsigned>> 32 1984# asm 1: vpsrlq $32,<x2=reg128#9,>v01=reg128#9 1985# asm 2: vpsrlq $32,<x2=%xmm8,>v01=%xmm8 1986vpsrlq $32,%xmm8,%xmm8 1987 1988# qhasm: v11 = x6 & mask1 1989# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 1990# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 1991vpand %xmm1,%xmm12,%xmm12 1992 1993# qhasm: x2 = v00 | v10 1994# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 1995# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 1996vpor %xmm15,%xmm11,%xmm11 1997 1998# qhasm: x6 = v01 | v11 1999# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 2000# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 2001vpor %xmm12,%xmm8,%xmm8 2002 2003# qhasm: v00 = x3 & mask0 2004# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 2005# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 2006vpand %xmm0,%xmm9,%xmm12 2007 2008# qhasm: 2x v10 = x7 << 32 2009# asm 1: vpsllq $32,<x7=reg128#14,>v10=reg128#16 2010# asm 2: vpsllq $32,<x7=%xmm13,>v10=%xmm15 2011vpsllq $32,%xmm13,%xmm15 2012 2013# qhasm: 2x v01 = x3 unsigned>> 32 2014# asm 1: vpsrlq $32,<x3=reg128#10,>v01=reg128#10 2015# asm 2: vpsrlq $32,<x3=%xmm9,>v01=%xmm9 2016vpsrlq $32,%xmm9,%xmm9 2017 2018# qhasm: v11 = x7 & mask1 2019# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 2020# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 2021vpand %xmm1,%xmm13,%xmm13 2022 2023# qhasm: x3 = v00 | v10 2024# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 2025# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 2026vpor %xmm15,%xmm12,%xmm12 2027 2028# qhasm: x7 = v01 | v11 2029# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 2030# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 2031vpor %xmm13,%xmm9,%xmm9 2032 2033# qhasm: v00 = x0 & mask2 2034# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 2035# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 2036vpand %xmm2,%xmm14,%xmm13 2037 2038# qhasm: 4x v10 = x2 << 16 2039# asm 1: vpslld $16,<x2=reg128#12,>v10=reg128#16 2040# asm 2: vpslld $16,<x2=%xmm11,>v10=%xmm15 2041vpslld $16,%xmm11,%xmm15 2042 2043# qhasm: 4x v01 = x0 unsigned>> 16 2044# asm 1: vpsrld $16,<x0=reg128#15,>v01=reg128#15 2045# asm 2: vpsrld $16,<x0=%xmm14,>v01=%xmm14 2046vpsrld $16,%xmm14,%xmm14 2047 2048# qhasm: v11 = x2 & mask3 2049# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 2050# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 2051vpand %xmm3,%xmm11,%xmm11 2052 2053# qhasm: x0 = v00 | v10 2054# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 2055# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 2056vpor %xmm15,%xmm13,%xmm13 2057 2058# qhasm: x2 = v01 | v11 2059# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 2060# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 2061vpor %xmm11,%xmm14,%xmm11 2062 2063# qhasm: v00 = x1 & mask2 2064# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 2065# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 2066vpand %xmm2,%xmm10,%xmm14 2067 2068# qhasm: 4x v10 = x3 << 16 2069# asm 1: vpslld $16,<x3=reg128#13,>v10=reg128#16 2070# asm 2: vpslld $16,<x3=%xmm12,>v10=%xmm15 2071vpslld $16,%xmm12,%xmm15 2072 2073# qhasm: 4x v01 = x1 unsigned>> 16 2074# asm 1: vpsrld $16,<x1=reg128#11,>v01=reg128#11 2075# asm 2: vpsrld $16,<x1=%xmm10,>v01=%xmm10 2076vpsrld $16,%xmm10,%xmm10 2077 2078# qhasm: v11 = x3 & mask3 2079# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 2080# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 2081vpand %xmm3,%xmm12,%xmm12 2082 2083# qhasm: x1 = v00 | v10 2084# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 2085# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 2086vpor %xmm15,%xmm14,%xmm14 2087 2088# qhasm: x3 = v01 | v11 2089# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 2090# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 2091vpor %xmm12,%xmm10,%xmm10 2092 2093# qhasm: v00 = x4 & mask2 2094# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 2095# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 2096vpand %xmm2,%xmm6,%xmm12 2097 2098# qhasm: 4x v10 = x6 << 16 2099# asm 1: vpslld $16,<x6=reg128#9,>v10=reg128#16 2100# asm 2: vpslld $16,<x6=%xmm8,>v10=%xmm15 2101vpslld $16,%xmm8,%xmm15 2102 2103# qhasm: 4x v01 = x4 unsigned>> 16 2104# asm 1: vpsrld $16,<x4=reg128#7,>v01=reg128#7 2105# asm 2: vpsrld $16,<x4=%xmm6,>v01=%xmm6 2106vpsrld $16,%xmm6,%xmm6 2107 2108# qhasm: v11 = x6 & mask3 2109# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 2110# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 2111vpand %xmm3,%xmm8,%xmm8 2112 2113# qhasm: x4 = v00 | v10 2114# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 2115# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 2116vpor %xmm15,%xmm12,%xmm12 2117 2118# qhasm: x6 = v01 | v11 2119# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 2120# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 2121vpor %xmm8,%xmm6,%xmm6 2122 2123# qhasm: v00 = x5 & mask2 2124# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 2125# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 2126vpand %xmm2,%xmm7,%xmm8 2127 2128# qhasm: 4x v10 = x7 << 16 2129# asm 1: vpslld $16,<x7=reg128#10,>v10=reg128#16 2130# asm 2: vpslld $16,<x7=%xmm9,>v10=%xmm15 2131vpslld $16,%xmm9,%xmm15 2132 2133# qhasm: 4x v01 = x5 unsigned>> 16 2134# asm 1: vpsrld $16,<x5=reg128#8,>v01=reg128#8 2135# asm 2: vpsrld $16,<x5=%xmm7,>v01=%xmm7 2136vpsrld $16,%xmm7,%xmm7 2137 2138# qhasm: v11 = x7 & mask3 2139# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 2140# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 2141vpand %xmm3,%xmm9,%xmm9 2142 2143# qhasm: x5 = v00 | v10 2144# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 2145# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 2146vpor %xmm15,%xmm8,%xmm8 2147 2148# qhasm: x7 = v01 | v11 2149# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 2150# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 2151vpor %xmm9,%xmm7,%xmm7 2152 2153# qhasm: v00 = x0 & mask4 2154# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 2155# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 2156vpand %xmm4,%xmm13,%xmm9 2157 2158# qhasm: 8x v10 = x1 << 8 2159# asm 1: vpsllw $8,<x1=reg128#15,>v10=reg128#16 2160# asm 2: vpsllw $8,<x1=%xmm14,>v10=%xmm15 2161vpsllw $8,%xmm14,%xmm15 2162 2163# qhasm: 8x v01 = x0 unsigned>> 8 2164# asm 1: vpsrlw $8,<x0=reg128#14,>v01=reg128#14 2165# asm 2: vpsrlw $8,<x0=%xmm13,>v01=%xmm13 2166vpsrlw $8,%xmm13,%xmm13 2167 2168# qhasm: v11 = x1 & mask5 2169# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 2170# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 2171vpand %xmm5,%xmm14,%xmm14 2172 2173# qhasm: x0 = v00 | v10 2174# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 2175# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 2176vpor %xmm15,%xmm9,%xmm9 2177 2178# qhasm: x1 = v01 | v11 2179# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 2180# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 2181vpor %xmm14,%xmm13,%xmm13 2182 2183# qhasm: v00 = x2 & mask4 2184# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 2185# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 2186vpand %xmm4,%xmm11,%xmm14 2187 2188# qhasm: 8x v10 = x3 << 8 2189# asm 1: vpsllw $8,<x3=reg128#11,>v10=reg128#16 2190# asm 2: vpsllw $8,<x3=%xmm10,>v10=%xmm15 2191vpsllw $8,%xmm10,%xmm15 2192 2193# qhasm: 8x v01 = x2 unsigned>> 8 2194# asm 1: vpsrlw $8,<x2=reg128#12,>v01=reg128#12 2195# asm 2: vpsrlw $8,<x2=%xmm11,>v01=%xmm11 2196vpsrlw $8,%xmm11,%xmm11 2197 2198# qhasm: v11 = x3 & mask5 2199# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 2200# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 2201vpand %xmm5,%xmm10,%xmm10 2202 2203# qhasm: x2 = v00 | v10 2204# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 2205# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 2206vpor %xmm15,%xmm14,%xmm14 2207 2208# qhasm: x3 = v01 | v11 2209# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 2210# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 2211vpor %xmm10,%xmm11,%xmm10 2212 2213# qhasm: v00 = x4 & mask4 2214# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 2215# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 2216vpand %xmm4,%xmm12,%xmm11 2217 2218# qhasm: 8x v10 = x5 << 8 2219# asm 1: vpsllw $8,<x5=reg128#9,>v10=reg128#16 2220# asm 2: vpsllw $8,<x5=%xmm8,>v10=%xmm15 2221vpsllw $8,%xmm8,%xmm15 2222 2223# qhasm: 8x v01 = x4 unsigned>> 8 2224# asm 1: vpsrlw $8,<x4=reg128#13,>v01=reg128#13 2225# asm 2: vpsrlw $8,<x4=%xmm12,>v01=%xmm12 2226vpsrlw $8,%xmm12,%xmm12 2227 2228# qhasm: v11 = x5 & mask5 2229# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 2230# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 2231vpand %xmm5,%xmm8,%xmm8 2232 2233# qhasm: x4 = v00 | v10 2234# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 2235# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 2236vpor %xmm15,%xmm11,%xmm11 2237 2238# qhasm: x5 = v01 | v11 2239# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 2240# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 2241vpor %xmm8,%xmm12,%xmm8 2242 2243# qhasm: v00 = x6 & mask4 2244# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 2245# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 2246vpand %xmm4,%xmm6,%xmm12 2247 2248# qhasm: 8x v10 = x7 << 8 2249# asm 1: vpsllw $8,<x7=reg128#8,>v10=reg128#16 2250# asm 2: vpsllw $8,<x7=%xmm7,>v10=%xmm15 2251vpsllw $8,%xmm7,%xmm15 2252 2253# qhasm: 8x v01 = x6 unsigned>> 8 2254# asm 1: vpsrlw $8,<x6=reg128#7,>v01=reg128#7 2255# asm 2: vpsrlw $8,<x6=%xmm6,>v01=%xmm6 2256vpsrlw $8,%xmm6,%xmm6 2257 2258# qhasm: v11 = x7 & mask5 2259# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 2260# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 2261vpand %xmm5,%xmm7,%xmm7 2262 2263# qhasm: x6 = v00 | v10 2264# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 2265# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 2266vpor %xmm15,%xmm12,%xmm12 2267 2268# qhasm: x7 = v01 | v11 2269# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 2270# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 2271vpor %xmm7,%xmm6,%xmm6 2272 2273# qhasm: mem128[ input_0 + 64 ] = x0 2274# asm 1: movdqu <x0=reg128#10,64(<input_0=int64#1) 2275# asm 2: movdqu <x0=%xmm9,64(<input_0=%rdi) 2276movdqu %xmm9,64(%rdi) 2277 2278# qhasm: mem128[ input_0 + 192 ] = x1 2279# asm 1: movdqu <x1=reg128#14,192(<input_0=int64#1) 2280# asm 2: movdqu <x1=%xmm13,192(<input_0=%rdi) 2281movdqu %xmm13,192(%rdi) 2282 2283# qhasm: mem128[ input_0 + 320 ] = x2 2284# asm 1: movdqu <x2=reg128#15,320(<input_0=int64#1) 2285# asm 2: movdqu <x2=%xmm14,320(<input_0=%rdi) 2286movdqu %xmm14,320(%rdi) 2287 2288# qhasm: mem128[ input_0 + 448 ] = x3 2289# asm 1: movdqu <x3=reg128#11,448(<input_0=int64#1) 2290# asm 2: movdqu <x3=%xmm10,448(<input_0=%rdi) 2291movdqu %xmm10,448(%rdi) 2292 2293# qhasm: mem128[ input_0 + 576 ] = x4 2294# asm 1: movdqu <x4=reg128#12,576(<input_0=int64#1) 2295# asm 2: movdqu <x4=%xmm11,576(<input_0=%rdi) 2296movdqu %xmm11,576(%rdi) 2297 2298# qhasm: mem128[ input_0 + 704 ] = x5 2299# asm 1: movdqu <x5=reg128#9,704(<input_0=int64#1) 2300# asm 2: movdqu <x5=%xmm8,704(<input_0=%rdi) 2301movdqu %xmm8,704(%rdi) 2302 2303# qhasm: mem128[ input_0 + 832 ] = x6 2304# asm 1: movdqu <x6=reg128#13,832(<input_0=int64#1) 2305# asm 2: movdqu <x6=%xmm12,832(<input_0=%rdi) 2306movdqu %xmm12,832(%rdi) 2307 2308# qhasm: mem128[ input_0 + 960 ] = x7 2309# asm 1: movdqu <x7=reg128#7,960(<input_0=int64#1) 2310# asm 2: movdqu <x7=%xmm6,960(<input_0=%rdi) 2311movdqu %xmm6,960(%rdi) 2312 2313# qhasm: x0 = mem128[ input_0 + 80 ] 2314# asm 1: movdqu 80(<input_0=int64#1),>x0=reg128#7 2315# asm 2: movdqu 80(<input_0=%rdi),>x0=%xmm6 2316movdqu 80(%rdi),%xmm6 2317 2318# qhasm: x1 = mem128[ input_0 + 208 ] 2319# asm 1: movdqu 208(<input_0=int64#1),>x1=reg128#8 2320# asm 2: movdqu 208(<input_0=%rdi),>x1=%xmm7 2321movdqu 208(%rdi),%xmm7 2322 2323# qhasm: x2 = mem128[ input_0 + 336 ] 2324# asm 1: movdqu 336(<input_0=int64#1),>x2=reg128#9 2325# asm 2: movdqu 336(<input_0=%rdi),>x2=%xmm8 2326movdqu 336(%rdi),%xmm8 2327 2328# qhasm: x3 = mem128[ input_0 + 464 ] 2329# asm 1: movdqu 464(<input_0=int64#1),>x3=reg128#10 2330# asm 2: movdqu 464(<input_0=%rdi),>x3=%xmm9 2331movdqu 464(%rdi),%xmm9 2332 2333# qhasm: x4 = mem128[ input_0 + 592 ] 2334# asm 1: movdqu 592(<input_0=int64#1),>x4=reg128#11 2335# asm 2: movdqu 592(<input_0=%rdi),>x4=%xmm10 2336movdqu 592(%rdi),%xmm10 2337 2338# qhasm: x5 = mem128[ input_0 + 720 ] 2339# asm 1: movdqu 720(<input_0=int64#1),>x5=reg128#12 2340# asm 2: movdqu 720(<input_0=%rdi),>x5=%xmm11 2341movdqu 720(%rdi),%xmm11 2342 2343# qhasm: x6 = mem128[ input_0 + 848 ] 2344# asm 1: movdqu 848(<input_0=int64#1),>x6=reg128#13 2345# asm 2: movdqu 848(<input_0=%rdi),>x6=%xmm12 2346movdqu 848(%rdi),%xmm12 2347 2348# qhasm: x7 = mem128[ input_0 + 976 ] 2349# asm 1: movdqu 976(<input_0=int64#1),>x7=reg128#14 2350# asm 2: movdqu 976(<input_0=%rdi),>x7=%xmm13 2351movdqu 976(%rdi),%xmm13 2352 2353# qhasm: v00 = x0 & mask0 2354# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 2355# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 2356vpand %xmm0,%xmm6,%xmm14 2357 2358# qhasm: 2x v10 = x4 << 32 2359# asm 1: vpsllq $32,<x4=reg128#11,>v10=reg128#16 2360# asm 2: vpsllq $32,<x4=%xmm10,>v10=%xmm15 2361vpsllq $32,%xmm10,%xmm15 2362 2363# qhasm: 2x v01 = x0 unsigned>> 32 2364# asm 1: vpsrlq $32,<x0=reg128#7,>v01=reg128#7 2365# asm 2: vpsrlq $32,<x0=%xmm6,>v01=%xmm6 2366vpsrlq $32,%xmm6,%xmm6 2367 2368# qhasm: v11 = x4 & mask1 2369# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 2370# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 2371vpand %xmm1,%xmm10,%xmm10 2372 2373# qhasm: x0 = v00 | v10 2374# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 2375# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 2376vpor %xmm15,%xmm14,%xmm14 2377 2378# qhasm: x4 = v01 | v11 2379# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 2380# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 2381vpor %xmm10,%xmm6,%xmm6 2382 2383# qhasm: v00 = x1 & mask0 2384# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 2385# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 2386vpand %xmm0,%xmm7,%xmm10 2387 2388# qhasm: 2x v10 = x5 << 32 2389# asm 1: vpsllq $32,<x5=reg128#12,>v10=reg128#16 2390# asm 2: vpsllq $32,<x5=%xmm11,>v10=%xmm15 2391vpsllq $32,%xmm11,%xmm15 2392 2393# qhasm: 2x v01 = x1 unsigned>> 32 2394# asm 1: vpsrlq $32,<x1=reg128#8,>v01=reg128#8 2395# asm 2: vpsrlq $32,<x1=%xmm7,>v01=%xmm7 2396vpsrlq $32,%xmm7,%xmm7 2397 2398# qhasm: v11 = x5 & mask1 2399# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 2400# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 2401vpand %xmm1,%xmm11,%xmm11 2402 2403# qhasm: x1 = v00 | v10 2404# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 2405# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 2406vpor %xmm15,%xmm10,%xmm10 2407 2408# qhasm: x5 = v01 | v11 2409# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 2410# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 2411vpor %xmm11,%xmm7,%xmm7 2412 2413# qhasm: v00 = x2 & mask0 2414# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 2415# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 2416vpand %xmm0,%xmm8,%xmm11 2417 2418# qhasm: 2x v10 = x6 << 32 2419# asm 1: vpsllq $32,<x6=reg128#13,>v10=reg128#16 2420# asm 2: vpsllq $32,<x6=%xmm12,>v10=%xmm15 2421vpsllq $32,%xmm12,%xmm15 2422 2423# qhasm: 2x v01 = x2 unsigned>> 32 2424# asm 1: vpsrlq $32,<x2=reg128#9,>v01=reg128#9 2425# asm 2: vpsrlq $32,<x2=%xmm8,>v01=%xmm8 2426vpsrlq $32,%xmm8,%xmm8 2427 2428# qhasm: v11 = x6 & mask1 2429# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 2430# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 2431vpand %xmm1,%xmm12,%xmm12 2432 2433# qhasm: x2 = v00 | v10 2434# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 2435# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 2436vpor %xmm15,%xmm11,%xmm11 2437 2438# qhasm: x6 = v01 | v11 2439# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 2440# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 2441vpor %xmm12,%xmm8,%xmm8 2442 2443# qhasm: v00 = x3 & mask0 2444# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 2445# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 2446vpand %xmm0,%xmm9,%xmm12 2447 2448# qhasm: 2x v10 = x7 << 32 2449# asm 1: vpsllq $32,<x7=reg128#14,>v10=reg128#16 2450# asm 2: vpsllq $32,<x7=%xmm13,>v10=%xmm15 2451vpsllq $32,%xmm13,%xmm15 2452 2453# qhasm: 2x v01 = x3 unsigned>> 32 2454# asm 1: vpsrlq $32,<x3=reg128#10,>v01=reg128#10 2455# asm 2: vpsrlq $32,<x3=%xmm9,>v01=%xmm9 2456vpsrlq $32,%xmm9,%xmm9 2457 2458# qhasm: v11 = x7 & mask1 2459# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 2460# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 2461vpand %xmm1,%xmm13,%xmm13 2462 2463# qhasm: x3 = v00 | v10 2464# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 2465# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 2466vpor %xmm15,%xmm12,%xmm12 2467 2468# qhasm: x7 = v01 | v11 2469# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 2470# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 2471vpor %xmm13,%xmm9,%xmm9 2472 2473# qhasm: v00 = x0 & mask2 2474# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 2475# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 2476vpand %xmm2,%xmm14,%xmm13 2477 2478# qhasm: 4x v10 = x2 << 16 2479# asm 1: vpslld $16,<x2=reg128#12,>v10=reg128#16 2480# asm 2: vpslld $16,<x2=%xmm11,>v10=%xmm15 2481vpslld $16,%xmm11,%xmm15 2482 2483# qhasm: 4x v01 = x0 unsigned>> 16 2484# asm 1: vpsrld $16,<x0=reg128#15,>v01=reg128#15 2485# asm 2: vpsrld $16,<x0=%xmm14,>v01=%xmm14 2486vpsrld $16,%xmm14,%xmm14 2487 2488# qhasm: v11 = x2 & mask3 2489# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 2490# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 2491vpand %xmm3,%xmm11,%xmm11 2492 2493# qhasm: x0 = v00 | v10 2494# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 2495# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 2496vpor %xmm15,%xmm13,%xmm13 2497 2498# qhasm: x2 = v01 | v11 2499# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 2500# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 2501vpor %xmm11,%xmm14,%xmm11 2502 2503# qhasm: v00 = x1 & mask2 2504# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 2505# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 2506vpand %xmm2,%xmm10,%xmm14 2507 2508# qhasm: 4x v10 = x3 << 16 2509# asm 1: vpslld $16,<x3=reg128#13,>v10=reg128#16 2510# asm 2: vpslld $16,<x3=%xmm12,>v10=%xmm15 2511vpslld $16,%xmm12,%xmm15 2512 2513# qhasm: 4x v01 = x1 unsigned>> 16 2514# asm 1: vpsrld $16,<x1=reg128#11,>v01=reg128#11 2515# asm 2: vpsrld $16,<x1=%xmm10,>v01=%xmm10 2516vpsrld $16,%xmm10,%xmm10 2517 2518# qhasm: v11 = x3 & mask3 2519# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 2520# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 2521vpand %xmm3,%xmm12,%xmm12 2522 2523# qhasm: x1 = v00 | v10 2524# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 2525# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 2526vpor %xmm15,%xmm14,%xmm14 2527 2528# qhasm: x3 = v01 | v11 2529# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 2530# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 2531vpor %xmm12,%xmm10,%xmm10 2532 2533# qhasm: v00 = x4 & mask2 2534# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 2535# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 2536vpand %xmm2,%xmm6,%xmm12 2537 2538# qhasm: 4x v10 = x6 << 16 2539# asm 1: vpslld $16,<x6=reg128#9,>v10=reg128#16 2540# asm 2: vpslld $16,<x6=%xmm8,>v10=%xmm15 2541vpslld $16,%xmm8,%xmm15 2542 2543# qhasm: 4x v01 = x4 unsigned>> 16 2544# asm 1: vpsrld $16,<x4=reg128#7,>v01=reg128#7 2545# asm 2: vpsrld $16,<x4=%xmm6,>v01=%xmm6 2546vpsrld $16,%xmm6,%xmm6 2547 2548# qhasm: v11 = x6 & mask3 2549# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 2550# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 2551vpand %xmm3,%xmm8,%xmm8 2552 2553# qhasm: x4 = v00 | v10 2554# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 2555# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 2556vpor %xmm15,%xmm12,%xmm12 2557 2558# qhasm: x6 = v01 | v11 2559# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 2560# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 2561vpor %xmm8,%xmm6,%xmm6 2562 2563# qhasm: v00 = x5 & mask2 2564# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 2565# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 2566vpand %xmm2,%xmm7,%xmm8 2567 2568# qhasm: 4x v10 = x7 << 16 2569# asm 1: vpslld $16,<x7=reg128#10,>v10=reg128#16 2570# asm 2: vpslld $16,<x7=%xmm9,>v10=%xmm15 2571vpslld $16,%xmm9,%xmm15 2572 2573# qhasm: 4x v01 = x5 unsigned>> 16 2574# asm 1: vpsrld $16,<x5=reg128#8,>v01=reg128#8 2575# asm 2: vpsrld $16,<x5=%xmm7,>v01=%xmm7 2576vpsrld $16,%xmm7,%xmm7 2577 2578# qhasm: v11 = x7 & mask3 2579# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 2580# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 2581vpand %xmm3,%xmm9,%xmm9 2582 2583# qhasm: x5 = v00 | v10 2584# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 2585# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 2586vpor %xmm15,%xmm8,%xmm8 2587 2588# qhasm: x7 = v01 | v11 2589# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 2590# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 2591vpor %xmm9,%xmm7,%xmm7 2592 2593# qhasm: v00 = x0 & mask4 2594# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 2595# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 2596vpand %xmm4,%xmm13,%xmm9 2597 2598# qhasm: 8x v10 = x1 << 8 2599# asm 1: vpsllw $8,<x1=reg128#15,>v10=reg128#16 2600# asm 2: vpsllw $8,<x1=%xmm14,>v10=%xmm15 2601vpsllw $8,%xmm14,%xmm15 2602 2603# qhasm: 8x v01 = x0 unsigned>> 8 2604# asm 1: vpsrlw $8,<x0=reg128#14,>v01=reg128#14 2605# asm 2: vpsrlw $8,<x0=%xmm13,>v01=%xmm13 2606vpsrlw $8,%xmm13,%xmm13 2607 2608# qhasm: v11 = x1 & mask5 2609# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 2610# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 2611vpand %xmm5,%xmm14,%xmm14 2612 2613# qhasm: x0 = v00 | v10 2614# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 2615# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 2616vpor %xmm15,%xmm9,%xmm9 2617 2618# qhasm: x1 = v01 | v11 2619# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 2620# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 2621vpor %xmm14,%xmm13,%xmm13 2622 2623# qhasm: v00 = x2 & mask4 2624# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 2625# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 2626vpand %xmm4,%xmm11,%xmm14 2627 2628# qhasm: 8x v10 = x3 << 8 2629# asm 1: vpsllw $8,<x3=reg128#11,>v10=reg128#16 2630# asm 2: vpsllw $8,<x3=%xmm10,>v10=%xmm15 2631vpsllw $8,%xmm10,%xmm15 2632 2633# qhasm: 8x v01 = x2 unsigned>> 8 2634# asm 1: vpsrlw $8,<x2=reg128#12,>v01=reg128#12 2635# asm 2: vpsrlw $8,<x2=%xmm11,>v01=%xmm11 2636vpsrlw $8,%xmm11,%xmm11 2637 2638# qhasm: v11 = x3 & mask5 2639# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 2640# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 2641vpand %xmm5,%xmm10,%xmm10 2642 2643# qhasm: x2 = v00 | v10 2644# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 2645# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 2646vpor %xmm15,%xmm14,%xmm14 2647 2648# qhasm: x3 = v01 | v11 2649# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 2650# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 2651vpor %xmm10,%xmm11,%xmm10 2652 2653# qhasm: v00 = x4 & mask4 2654# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 2655# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 2656vpand %xmm4,%xmm12,%xmm11 2657 2658# qhasm: 8x v10 = x5 << 8 2659# asm 1: vpsllw $8,<x5=reg128#9,>v10=reg128#16 2660# asm 2: vpsllw $8,<x5=%xmm8,>v10=%xmm15 2661vpsllw $8,%xmm8,%xmm15 2662 2663# qhasm: 8x v01 = x4 unsigned>> 8 2664# asm 1: vpsrlw $8,<x4=reg128#13,>v01=reg128#13 2665# asm 2: vpsrlw $8,<x4=%xmm12,>v01=%xmm12 2666vpsrlw $8,%xmm12,%xmm12 2667 2668# qhasm: v11 = x5 & mask5 2669# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 2670# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 2671vpand %xmm5,%xmm8,%xmm8 2672 2673# qhasm: x4 = v00 | v10 2674# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 2675# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 2676vpor %xmm15,%xmm11,%xmm11 2677 2678# qhasm: x5 = v01 | v11 2679# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 2680# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 2681vpor %xmm8,%xmm12,%xmm8 2682 2683# qhasm: v00 = x6 & mask4 2684# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 2685# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 2686vpand %xmm4,%xmm6,%xmm12 2687 2688# qhasm: 8x v10 = x7 << 8 2689# asm 1: vpsllw $8,<x7=reg128#8,>v10=reg128#16 2690# asm 2: vpsllw $8,<x7=%xmm7,>v10=%xmm15 2691vpsllw $8,%xmm7,%xmm15 2692 2693# qhasm: 8x v01 = x6 unsigned>> 8 2694# asm 1: vpsrlw $8,<x6=reg128#7,>v01=reg128#7 2695# asm 2: vpsrlw $8,<x6=%xmm6,>v01=%xmm6 2696vpsrlw $8,%xmm6,%xmm6 2697 2698# qhasm: v11 = x7 & mask5 2699# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 2700# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 2701vpand %xmm5,%xmm7,%xmm7 2702 2703# qhasm: x6 = v00 | v10 2704# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 2705# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 2706vpor %xmm15,%xmm12,%xmm12 2707 2708# qhasm: x7 = v01 | v11 2709# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 2710# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 2711vpor %xmm7,%xmm6,%xmm6 2712 2713# qhasm: mem128[ input_0 + 80 ] = x0 2714# asm 1: movdqu <x0=reg128#10,80(<input_0=int64#1) 2715# asm 2: movdqu <x0=%xmm9,80(<input_0=%rdi) 2716movdqu %xmm9,80(%rdi) 2717 2718# qhasm: mem128[ input_0 + 208 ] = x1 2719# asm 1: movdqu <x1=reg128#14,208(<input_0=int64#1) 2720# asm 2: movdqu <x1=%xmm13,208(<input_0=%rdi) 2721movdqu %xmm13,208(%rdi) 2722 2723# qhasm: mem128[ input_0 + 336 ] = x2 2724# asm 1: movdqu <x2=reg128#15,336(<input_0=int64#1) 2725# asm 2: movdqu <x2=%xmm14,336(<input_0=%rdi) 2726movdqu %xmm14,336(%rdi) 2727 2728# qhasm: mem128[ input_0 + 464 ] = x3 2729# asm 1: movdqu <x3=reg128#11,464(<input_0=int64#1) 2730# asm 2: movdqu <x3=%xmm10,464(<input_0=%rdi) 2731movdqu %xmm10,464(%rdi) 2732 2733# qhasm: mem128[ input_0 + 592 ] = x4 2734# asm 1: movdqu <x4=reg128#12,592(<input_0=int64#1) 2735# asm 2: movdqu <x4=%xmm11,592(<input_0=%rdi) 2736movdqu %xmm11,592(%rdi) 2737 2738# qhasm: mem128[ input_0 + 720 ] = x5 2739# asm 1: movdqu <x5=reg128#9,720(<input_0=int64#1) 2740# asm 2: movdqu <x5=%xmm8,720(<input_0=%rdi) 2741movdqu %xmm8,720(%rdi) 2742 2743# qhasm: mem128[ input_0 + 848 ] = x6 2744# asm 1: movdqu <x6=reg128#13,848(<input_0=int64#1) 2745# asm 2: movdqu <x6=%xmm12,848(<input_0=%rdi) 2746movdqu %xmm12,848(%rdi) 2747 2748# qhasm: mem128[ input_0 + 976 ] = x7 2749# asm 1: movdqu <x7=reg128#7,976(<input_0=int64#1) 2750# asm 2: movdqu <x7=%xmm6,976(<input_0=%rdi) 2751movdqu %xmm6,976(%rdi) 2752 2753# qhasm: x0 = mem128[ input_0 + 96 ] 2754# asm 1: movdqu 96(<input_0=int64#1),>x0=reg128#7 2755# asm 2: movdqu 96(<input_0=%rdi),>x0=%xmm6 2756movdqu 96(%rdi),%xmm6 2757 2758# qhasm: x1 = mem128[ input_0 + 224 ] 2759# asm 1: movdqu 224(<input_0=int64#1),>x1=reg128#8 2760# asm 2: movdqu 224(<input_0=%rdi),>x1=%xmm7 2761movdqu 224(%rdi),%xmm7 2762 2763# qhasm: x2 = mem128[ input_0 + 352 ] 2764# asm 1: movdqu 352(<input_0=int64#1),>x2=reg128#9 2765# asm 2: movdqu 352(<input_0=%rdi),>x2=%xmm8 2766movdqu 352(%rdi),%xmm8 2767 2768# qhasm: x3 = mem128[ input_0 + 480 ] 2769# asm 1: movdqu 480(<input_0=int64#1),>x3=reg128#10 2770# asm 2: movdqu 480(<input_0=%rdi),>x3=%xmm9 2771movdqu 480(%rdi),%xmm9 2772 2773# qhasm: x4 = mem128[ input_0 + 608 ] 2774# asm 1: movdqu 608(<input_0=int64#1),>x4=reg128#11 2775# asm 2: movdqu 608(<input_0=%rdi),>x4=%xmm10 2776movdqu 608(%rdi),%xmm10 2777 2778# qhasm: x5 = mem128[ input_0 + 736 ] 2779# asm 1: movdqu 736(<input_0=int64#1),>x5=reg128#12 2780# asm 2: movdqu 736(<input_0=%rdi),>x5=%xmm11 2781movdqu 736(%rdi),%xmm11 2782 2783# qhasm: x6 = mem128[ input_0 + 864 ] 2784# asm 1: movdqu 864(<input_0=int64#1),>x6=reg128#13 2785# asm 2: movdqu 864(<input_0=%rdi),>x6=%xmm12 2786movdqu 864(%rdi),%xmm12 2787 2788# qhasm: x7 = mem128[ input_0 + 992 ] 2789# asm 1: movdqu 992(<input_0=int64#1),>x7=reg128#14 2790# asm 2: movdqu 992(<input_0=%rdi),>x7=%xmm13 2791movdqu 992(%rdi),%xmm13 2792 2793# qhasm: v00 = x0 & mask0 2794# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 2795# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 2796vpand %xmm0,%xmm6,%xmm14 2797 2798# qhasm: 2x v10 = x4 << 32 2799# asm 1: vpsllq $32,<x4=reg128#11,>v10=reg128#16 2800# asm 2: vpsllq $32,<x4=%xmm10,>v10=%xmm15 2801vpsllq $32,%xmm10,%xmm15 2802 2803# qhasm: 2x v01 = x0 unsigned>> 32 2804# asm 1: vpsrlq $32,<x0=reg128#7,>v01=reg128#7 2805# asm 2: vpsrlq $32,<x0=%xmm6,>v01=%xmm6 2806vpsrlq $32,%xmm6,%xmm6 2807 2808# qhasm: v11 = x4 & mask1 2809# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 2810# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 2811vpand %xmm1,%xmm10,%xmm10 2812 2813# qhasm: x0 = v00 | v10 2814# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 2815# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 2816vpor %xmm15,%xmm14,%xmm14 2817 2818# qhasm: x4 = v01 | v11 2819# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 2820# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 2821vpor %xmm10,%xmm6,%xmm6 2822 2823# qhasm: v00 = x1 & mask0 2824# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 2825# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 2826vpand %xmm0,%xmm7,%xmm10 2827 2828# qhasm: 2x v10 = x5 << 32 2829# asm 1: vpsllq $32,<x5=reg128#12,>v10=reg128#16 2830# asm 2: vpsllq $32,<x5=%xmm11,>v10=%xmm15 2831vpsllq $32,%xmm11,%xmm15 2832 2833# qhasm: 2x v01 = x1 unsigned>> 32 2834# asm 1: vpsrlq $32,<x1=reg128#8,>v01=reg128#8 2835# asm 2: vpsrlq $32,<x1=%xmm7,>v01=%xmm7 2836vpsrlq $32,%xmm7,%xmm7 2837 2838# qhasm: v11 = x5 & mask1 2839# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 2840# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 2841vpand %xmm1,%xmm11,%xmm11 2842 2843# qhasm: x1 = v00 | v10 2844# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 2845# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 2846vpor %xmm15,%xmm10,%xmm10 2847 2848# qhasm: x5 = v01 | v11 2849# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 2850# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 2851vpor %xmm11,%xmm7,%xmm7 2852 2853# qhasm: v00 = x2 & mask0 2854# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 2855# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 2856vpand %xmm0,%xmm8,%xmm11 2857 2858# qhasm: 2x v10 = x6 << 32 2859# asm 1: vpsllq $32,<x6=reg128#13,>v10=reg128#16 2860# asm 2: vpsllq $32,<x6=%xmm12,>v10=%xmm15 2861vpsllq $32,%xmm12,%xmm15 2862 2863# qhasm: 2x v01 = x2 unsigned>> 32 2864# asm 1: vpsrlq $32,<x2=reg128#9,>v01=reg128#9 2865# asm 2: vpsrlq $32,<x2=%xmm8,>v01=%xmm8 2866vpsrlq $32,%xmm8,%xmm8 2867 2868# qhasm: v11 = x6 & mask1 2869# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 2870# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 2871vpand %xmm1,%xmm12,%xmm12 2872 2873# qhasm: x2 = v00 | v10 2874# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 2875# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 2876vpor %xmm15,%xmm11,%xmm11 2877 2878# qhasm: x6 = v01 | v11 2879# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 2880# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 2881vpor %xmm12,%xmm8,%xmm8 2882 2883# qhasm: v00 = x3 & mask0 2884# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 2885# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 2886vpand %xmm0,%xmm9,%xmm12 2887 2888# qhasm: 2x v10 = x7 << 32 2889# asm 1: vpsllq $32,<x7=reg128#14,>v10=reg128#16 2890# asm 2: vpsllq $32,<x7=%xmm13,>v10=%xmm15 2891vpsllq $32,%xmm13,%xmm15 2892 2893# qhasm: 2x v01 = x3 unsigned>> 32 2894# asm 1: vpsrlq $32,<x3=reg128#10,>v01=reg128#10 2895# asm 2: vpsrlq $32,<x3=%xmm9,>v01=%xmm9 2896vpsrlq $32,%xmm9,%xmm9 2897 2898# qhasm: v11 = x7 & mask1 2899# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 2900# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 2901vpand %xmm1,%xmm13,%xmm13 2902 2903# qhasm: x3 = v00 | v10 2904# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 2905# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 2906vpor %xmm15,%xmm12,%xmm12 2907 2908# qhasm: x7 = v01 | v11 2909# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 2910# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 2911vpor %xmm13,%xmm9,%xmm9 2912 2913# qhasm: v00 = x0 & mask2 2914# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 2915# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 2916vpand %xmm2,%xmm14,%xmm13 2917 2918# qhasm: 4x v10 = x2 << 16 2919# asm 1: vpslld $16,<x2=reg128#12,>v10=reg128#16 2920# asm 2: vpslld $16,<x2=%xmm11,>v10=%xmm15 2921vpslld $16,%xmm11,%xmm15 2922 2923# qhasm: 4x v01 = x0 unsigned>> 16 2924# asm 1: vpsrld $16,<x0=reg128#15,>v01=reg128#15 2925# asm 2: vpsrld $16,<x0=%xmm14,>v01=%xmm14 2926vpsrld $16,%xmm14,%xmm14 2927 2928# qhasm: v11 = x2 & mask3 2929# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 2930# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 2931vpand %xmm3,%xmm11,%xmm11 2932 2933# qhasm: x0 = v00 | v10 2934# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 2935# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 2936vpor %xmm15,%xmm13,%xmm13 2937 2938# qhasm: x2 = v01 | v11 2939# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 2940# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 2941vpor %xmm11,%xmm14,%xmm11 2942 2943# qhasm: v00 = x1 & mask2 2944# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 2945# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 2946vpand %xmm2,%xmm10,%xmm14 2947 2948# qhasm: 4x v10 = x3 << 16 2949# asm 1: vpslld $16,<x3=reg128#13,>v10=reg128#16 2950# asm 2: vpslld $16,<x3=%xmm12,>v10=%xmm15 2951vpslld $16,%xmm12,%xmm15 2952 2953# qhasm: 4x v01 = x1 unsigned>> 16 2954# asm 1: vpsrld $16,<x1=reg128#11,>v01=reg128#11 2955# asm 2: vpsrld $16,<x1=%xmm10,>v01=%xmm10 2956vpsrld $16,%xmm10,%xmm10 2957 2958# qhasm: v11 = x3 & mask3 2959# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 2960# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 2961vpand %xmm3,%xmm12,%xmm12 2962 2963# qhasm: x1 = v00 | v10 2964# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 2965# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 2966vpor %xmm15,%xmm14,%xmm14 2967 2968# qhasm: x3 = v01 | v11 2969# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 2970# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 2971vpor %xmm12,%xmm10,%xmm10 2972 2973# qhasm: v00 = x4 & mask2 2974# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 2975# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 2976vpand %xmm2,%xmm6,%xmm12 2977 2978# qhasm: 4x v10 = x6 << 16 2979# asm 1: vpslld $16,<x6=reg128#9,>v10=reg128#16 2980# asm 2: vpslld $16,<x6=%xmm8,>v10=%xmm15 2981vpslld $16,%xmm8,%xmm15 2982 2983# qhasm: 4x v01 = x4 unsigned>> 16 2984# asm 1: vpsrld $16,<x4=reg128#7,>v01=reg128#7 2985# asm 2: vpsrld $16,<x4=%xmm6,>v01=%xmm6 2986vpsrld $16,%xmm6,%xmm6 2987 2988# qhasm: v11 = x6 & mask3 2989# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 2990# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 2991vpand %xmm3,%xmm8,%xmm8 2992 2993# qhasm: x4 = v00 | v10 2994# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 2995# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 2996vpor %xmm15,%xmm12,%xmm12 2997 2998# qhasm: x6 = v01 | v11 2999# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 3000# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 3001vpor %xmm8,%xmm6,%xmm6 3002 3003# qhasm: v00 = x5 & mask2 3004# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 3005# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 3006vpand %xmm2,%xmm7,%xmm8 3007 3008# qhasm: 4x v10 = x7 << 16 3009# asm 1: vpslld $16,<x7=reg128#10,>v10=reg128#16 3010# asm 2: vpslld $16,<x7=%xmm9,>v10=%xmm15 3011vpslld $16,%xmm9,%xmm15 3012 3013# qhasm: 4x v01 = x5 unsigned>> 16 3014# asm 1: vpsrld $16,<x5=reg128#8,>v01=reg128#8 3015# asm 2: vpsrld $16,<x5=%xmm7,>v01=%xmm7 3016vpsrld $16,%xmm7,%xmm7 3017 3018# qhasm: v11 = x7 & mask3 3019# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 3020# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 3021vpand %xmm3,%xmm9,%xmm9 3022 3023# qhasm: x5 = v00 | v10 3024# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 3025# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 3026vpor %xmm15,%xmm8,%xmm8 3027 3028# qhasm: x7 = v01 | v11 3029# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 3030# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 3031vpor %xmm9,%xmm7,%xmm7 3032 3033# qhasm: v00 = x0 & mask4 3034# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 3035# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 3036vpand %xmm4,%xmm13,%xmm9 3037 3038# qhasm: 8x v10 = x1 << 8 3039# asm 1: vpsllw $8,<x1=reg128#15,>v10=reg128#16 3040# asm 2: vpsllw $8,<x1=%xmm14,>v10=%xmm15 3041vpsllw $8,%xmm14,%xmm15 3042 3043# qhasm: 8x v01 = x0 unsigned>> 8 3044# asm 1: vpsrlw $8,<x0=reg128#14,>v01=reg128#14 3045# asm 2: vpsrlw $8,<x0=%xmm13,>v01=%xmm13 3046vpsrlw $8,%xmm13,%xmm13 3047 3048# qhasm: v11 = x1 & mask5 3049# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 3050# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 3051vpand %xmm5,%xmm14,%xmm14 3052 3053# qhasm: x0 = v00 | v10 3054# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 3055# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 3056vpor %xmm15,%xmm9,%xmm9 3057 3058# qhasm: x1 = v01 | v11 3059# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 3060# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 3061vpor %xmm14,%xmm13,%xmm13 3062 3063# qhasm: v00 = x2 & mask4 3064# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 3065# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 3066vpand %xmm4,%xmm11,%xmm14 3067 3068# qhasm: 8x v10 = x3 << 8 3069# asm 1: vpsllw $8,<x3=reg128#11,>v10=reg128#16 3070# asm 2: vpsllw $8,<x3=%xmm10,>v10=%xmm15 3071vpsllw $8,%xmm10,%xmm15 3072 3073# qhasm: 8x v01 = x2 unsigned>> 8 3074# asm 1: vpsrlw $8,<x2=reg128#12,>v01=reg128#12 3075# asm 2: vpsrlw $8,<x2=%xmm11,>v01=%xmm11 3076vpsrlw $8,%xmm11,%xmm11 3077 3078# qhasm: v11 = x3 & mask5 3079# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 3080# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 3081vpand %xmm5,%xmm10,%xmm10 3082 3083# qhasm: x2 = v00 | v10 3084# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 3085# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 3086vpor %xmm15,%xmm14,%xmm14 3087 3088# qhasm: x3 = v01 | v11 3089# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 3090# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 3091vpor %xmm10,%xmm11,%xmm10 3092 3093# qhasm: v00 = x4 & mask4 3094# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 3095# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 3096vpand %xmm4,%xmm12,%xmm11 3097 3098# qhasm: 8x v10 = x5 << 8 3099# asm 1: vpsllw $8,<x5=reg128#9,>v10=reg128#16 3100# asm 2: vpsllw $8,<x5=%xmm8,>v10=%xmm15 3101vpsllw $8,%xmm8,%xmm15 3102 3103# qhasm: 8x v01 = x4 unsigned>> 8 3104# asm 1: vpsrlw $8,<x4=reg128#13,>v01=reg128#13 3105# asm 2: vpsrlw $8,<x4=%xmm12,>v01=%xmm12 3106vpsrlw $8,%xmm12,%xmm12 3107 3108# qhasm: v11 = x5 & mask5 3109# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 3110# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 3111vpand %xmm5,%xmm8,%xmm8 3112 3113# qhasm: x4 = v00 | v10 3114# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 3115# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 3116vpor %xmm15,%xmm11,%xmm11 3117 3118# qhasm: x5 = v01 | v11 3119# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 3120# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 3121vpor %xmm8,%xmm12,%xmm8 3122 3123# qhasm: v00 = x6 & mask4 3124# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 3125# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 3126vpand %xmm4,%xmm6,%xmm12 3127 3128# qhasm: 8x v10 = x7 << 8 3129# asm 1: vpsllw $8,<x7=reg128#8,>v10=reg128#16 3130# asm 2: vpsllw $8,<x7=%xmm7,>v10=%xmm15 3131vpsllw $8,%xmm7,%xmm15 3132 3133# qhasm: 8x v01 = x6 unsigned>> 8 3134# asm 1: vpsrlw $8,<x6=reg128#7,>v01=reg128#7 3135# asm 2: vpsrlw $8,<x6=%xmm6,>v01=%xmm6 3136vpsrlw $8,%xmm6,%xmm6 3137 3138# qhasm: v11 = x7 & mask5 3139# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 3140# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 3141vpand %xmm5,%xmm7,%xmm7 3142 3143# qhasm: x6 = v00 | v10 3144# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 3145# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 3146vpor %xmm15,%xmm12,%xmm12 3147 3148# qhasm: x7 = v01 | v11 3149# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 3150# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 3151vpor %xmm7,%xmm6,%xmm6 3152 3153# qhasm: mem128[ input_0 + 96 ] = x0 3154# asm 1: movdqu <x0=reg128#10,96(<input_0=int64#1) 3155# asm 2: movdqu <x0=%xmm9,96(<input_0=%rdi) 3156movdqu %xmm9,96(%rdi) 3157 3158# qhasm: mem128[ input_0 + 224 ] = x1 3159# asm 1: movdqu <x1=reg128#14,224(<input_0=int64#1) 3160# asm 2: movdqu <x1=%xmm13,224(<input_0=%rdi) 3161movdqu %xmm13,224(%rdi) 3162 3163# qhasm: mem128[ input_0 + 352 ] = x2 3164# asm 1: movdqu <x2=reg128#15,352(<input_0=int64#1) 3165# asm 2: movdqu <x2=%xmm14,352(<input_0=%rdi) 3166movdqu %xmm14,352(%rdi) 3167 3168# qhasm: mem128[ input_0 + 480 ] = x3 3169# asm 1: movdqu <x3=reg128#11,480(<input_0=int64#1) 3170# asm 2: movdqu <x3=%xmm10,480(<input_0=%rdi) 3171movdqu %xmm10,480(%rdi) 3172 3173# qhasm: mem128[ input_0 + 608 ] = x4 3174# asm 1: movdqu <x4=reg128#12,608(<input_0=int64#1) 3175# asm 2: movdqu <x4=%xmm11,608(<input_0=%rdi) 3176movdqu %xmm11,608(%rdi) 3177 3178# qhasm: mem128[ input_0 + 736 ] = x5 3179# asm 1: movdqu <x5=reg128#9,736(<input_0=int64#1) 3180# asm 2: movdqu <x5=%xmm8,736(<input_0=%rdi) 3181movdqu %xmm8,736(%rdi) 3182 3183# qhasm: mem128[ input_0 + 864 ] = x6 3184# asm 1: movdqu <x6=reg128#13,864(<input_0=int64#1) 3185# asm 2: movdqu <x6=%xmm12,864(<input_0=%rdi) 3186movdqu %xmm12,864(%rdi) 3187 3188# qhasm: mem128[ input_0 + 992 ] = x7 3189# asm 1: movdqu <x7=reg128#7,992(<input_0=int64#1) 3190# asm 2: movdqu <x7=%xmm6,992(<input_0=%rdi) 3191movdqu %xmm6,992(%rdi) 3192 3193# qhasm: x0 = mem128[ input_0 + 112 ] 3194# asm 1: movdqu 112(<input_0=int64#1),>x0=reg128#7 3195# asm 2: movdqu 112(<input_0=%rdi),>x0=%xmm6 3196movdqu 112(%rdi),%xmm6 3197 3198# qhasm: x1 = mem128[ input_0 + 240 ] 3199# asm 1: movdqu 240(<input_0=int64#1),>x1=reg128#8 3200# asm 2: movdqu 240(<input_0=%rdi),>x1=%xmm7 3201movdqu 240(%rdi),%xmm7 3202 3203# qhasm: x2 = mem128[ input_0 + 368 ] 3204# asm 1: movdqu 368(<input_0=int64#1),>x2=reg128#9 3205# asm 2: movdqu 368(<input_0=%rdi),>x2=%xmm8 3206movdqu 368(%rdi),%xmm8 3207 3208# qhasm: x3 = mem128[ input_0 + 496 ] 3209# asm 1: movdqu 496(<input_0=int64#1),>x3=reg128#10 3210# asm 2: movdqu 496(<input_0=%rdi),>x3=%xmm9 3211movdqu 496(%rdi),%xmm9 3212 3213# qhasm: x4 = mem128[ input_0 + 624 ] 3214# asm 1: movdqu 624(<input_0=int64#1),>x4=reg128#11 3215# asm 2: movdqu 624(<input_0=%rdi),>x4=%xmm10 3216movdqu 624(%rdi),%xmm10 3217 3218# qhasm: x5 = mem128[ input_0 + 752 ] 3219# asm 1: movdqu 752(<input_0=int64#1),>x5=reg128#12 3220# asm 2: movdqu 752(<input_0=%rdi),>x5=%xmm11 3221movdqu 752(%rdi),%xmm11 3222 3223# qhasm: x6 = mem128[ input_0 + 880 ] 3224# asm 1: movdqu 880(<input_0=int64#1),>x6=reg128#13 3225# asm 2: movdqu 880(<input_0=%rdi),>x6=%xmm12 3226movdqu 880(%rdi),%xmm12 3227 3228# qhasm: x7 = mem128[ input_0 + 1008 ] 3229# asm 1: movdqu 1008(<input_0=int64#1),>x7=reg128#14 3230# asm 2: movdqu 1008(<input_0=%rdi),>x7=%xmm13 3231movdqu 1008(%rdi),%xmm13 3232 3233# qhasm: v00 = x0 & mask0 3234# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 3235# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 3236vpand %xmm0,%xmm6,%xmm14 3237 3238# qhasm: 2x v10 = x4 << 32 3239# asm 1: vpsllq $32,<x4=reg128#11,>v10=reg128#16 3240# asm 2: vpsllq $32,<x4=%xmm10,>v10=%xmm15 3241vpsllq $32,%xmm10,%xmm15 3242 3243# qhasm: 2x v01 = x0 unsigned>> 32 3244# asm 1: vpsrlq $32,<x0=reg128#7,>v01=reg128#7 3245# asm 2: vpsrlq $32,<x0=%xmm6,>v01=%xmm6 3246vpsrlq $32,%xmm6,%xmm6 3247 3248# qhasm: v11 = x4 & mask1 3249# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 3250# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 3251vpand %xmm1,%xmm10,%xmm10 3252 3253# qhasm: x0 = v00 | v10 3254# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 3255# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 3256vpor %xmm15,%xmm14,%xmm14 3257 3258# qhasm: x4 = v01 | v11 3259# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 3260# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 3261vpor %xmm10,%xmm6,%xmm6 3262 3263# qhasm: v00 = x1 & mask0 3264# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 3265# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 3266vpand %xmm0,%xmm7,%xmm10 3267 3268# qhasm: 2x v10 = x5 << 32 3269# asm 1: vpsllq $32,<x5=reg128#12,>v10=reg128#16 3270# asm 2: vpsllq $32,<x5=%xmm11,>v10=%xmm15 3271vpsllq $32,%xmm11,%xmm15 3272 3273# qhasm: 2x v01 = x1 unsigned>> 32 3274# asm 1: vpsrlq $32,<x1=reg128#8,>v01=reg128#8 3275# asm 2: vpsrlq $32,<x1=%xmm7,>v01=%xmm7 3276vpsrlq $32,%xmm7,%xmm7 3277 3278# qhasm: v11 = x5 & mask1 3279# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 3280# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 3281vpand %xmm1,%xmm11,%xmm11 3282 3283# qhasm: x1 = v00 | v10 3284# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 3285# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 3286vpor %xmm15,%xmm10,%xmm10 3287 3288# qhasm: x5 = v01 | v11 3289# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 3290# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 3291vpor %xmm11,%xmm7,%xmm7 3292 3293# qhasm: v00 = x2 & mask0 3294# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 3295# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 3296vpand %xmm0,%xmm8,%xmm11 3297 3298# qhasm: 2x v10 = x6 << 32 3299# asm 1: vpsllq $32,<x6=reg128#13,>v10=reg128#16 3300# asm 2: vpsllq $32,<x6=%xmm12,>v10=%xmm15 3301vpsllq $32,%xmm12,%xmm15 3302 3303# qhasm: 2x v01 = x2 unsigned>> 32 3304# asm 1: vpsrlq $32,<x2=reg128#9,>v01=reg128#9 3305# asm 2: vpsrlq $32,<x2=%xmm8,>v01=%xmm8 3306vpsrlq $32,%xmm8,%xmm8 3307 3308# qhasm: v11 = x6 & mask1 3309# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 3310# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 3311vpand %xmm1,%xmm12,%xmm12 3312 3313# qhasm: x2 = v00 | v10 3314# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 3315# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 3316vpor %xmm15,%xmm11,%xmm11 3317 3318# qhasm: x6 = v01 | v11 3319# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 3320# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 3321vpor %xmm12,%xmm8,%xmm8 3322 3323# qhasm: v00 = x3 & mask0 3324# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#1 3325# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm0 3326vpand %xmm0,%xmm9,%xmm0 3327 3328# qhasm: 2x v10 = x7 << 32 3329# asm 1: vpsllq $32,<x7=reg128#14,>v10=reg128#13 3330# asm 2: vpsllq $32,<x7=%xmm13,>v10=%xmm12 3331vpsllq $32,%xmm13,%xmm12 3332 3333# qhasm: 2x v01 = x3 unsigned>> 32 3334# asm 1: vpsrlq $32,<x3=reg128#10,>v01=reg128#10 3335# asm 2: vpsrlq $32,<x3=%xmm9,>v01=%xmm9 3336vpsrlq $32,%xmm9,%xmm9 3337 3338# qhasm: v11 = x7 & mask1 3339# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#2 3340# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm1 3341vpand %xmm1,%xmm13,%xmm1 3342 3343# qhasm: x3 = v00 | v10 3344# asm 1: vpor <v10=reg128#13,<v00=reg128#1,>x3=reg128#1 3345# asm 2: vpor <v10=%xmm12,<v00=%xmm0,>x3=%xmm0 3346vpor %xmm12,%xmm0,%xmm0 3347 3348# qhasm: x7 = v01 | v11 3349# asm 1: vpor <v11=reg128#2,<v01=reg128#10,>x7=reg128#2 3350# asm 2: vpor <v11=%xmm1,<v01=%xmm9,>x7=%xmm1 3351vpor %xmm1,%xmm9,%xmm1 3352 3353# qhasm: v00 = x0 & mask2 3354# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#10 3355# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm9 3356vpand %xmm2,%xmm14,%xmm9 3357 3358# qhasm: 4x v10 = x2 << 16 3359# asm 1: vpslld $16,<x2=reg128#12,>v10=reg128#13 3360# asm 2: vpslld $16,<x2=%xmm11,>v10=%xmm12 3361vpslld $16,%xmm11,%xmm12 3362 3363# qhasm: 4x v01 = x0 unsigned>> 16 3364# asm 1: vpsrld $16,<x0=reg128#15,>v01=reg128#14 3365# asm 2: vpsrld $16,<x0=%xmm14,>v01=%xmm13 3366vpsrld $16,%xmm14,%xmm13 3367 3368# qhasm: v11 = x2 & mask3 3369# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 3370# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 3371vpand %xmm3,%xmm11,%xmm11 3372 3373# qhasm: x0 = v00 | v10 3374# asm 1: vpor <v10=reg128#13,<v00=reg128#10,>x0=reg128#10 3375# asm 2: vpor <v10=%xmm12,<v00=%xmm9,>x0=%xmm9 3376vpor %xmm12,%xmm9,%xmm9 3377 3378# qhasm: x2 = v01 | v11 3379# asm 1: vpor <v11=reg128#12,<v01=reg128#14,>x2=reg128#12 3380# asm 2: vpor <v11=%xmm11,<v01=%xmm13,>x2=%xmm11 3381vpor %xmm11,%xmm13,%xmm11 3382 3383# qhasm: v00 = x1 & mask2 3384# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#13 3385# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm12 3386vpand %xmm2,%xmm10,%xmm12 3387 3388# qhasm: 4x v10 = x3 << 16 3389# asm 1: vpslld $16,<x3=reg128#1,>v10=reg128#14 3390# asm 2: vpslld $16,<x3=%xmm0,>v10=%xmm13 3391vpslld $16,%xmm0,%xmm13 3392 3393# qhasm: 4x v01 = x1 unsigned>> 16 3394# asm 1: vpsrld $16,<x1=reg128#11,>v01=reg128#11 3395# asm 2: vpsrld $16,<x1=%xmm10,>v01=%xmm10 3396vpsrld $16,%xmm10,%xmm10 3397 3398# qhasm: v11 = x3 & mask3 3399# asm 1: vpand <mask3=reg128#4,<x3=reg128#1,>v11=reg128#1 3400# asm 2: vpand <mask3=%xmm3,<x3=%xmm0,>v11=%xmm0 3401vpand %xmm3,%xmm0,%xmm0 3402 3403# qhasm: x1 = v00 | v10 3404# asm 1: vpor <v10=reg128#14,<v00=reg128#13,>x1=reg128#13 3405# asm 2: vpor <v10=%xmm13,<v00=%xmm12,>x1=%xmm12 3406vpor %xmm13,%xmm12,%xmm12 3407 3408# qhasm: x3 = v01 | v11 3409# asm 1: vpor <v11=reg128#1,<v01=reg128#11,>x3=reg128#1 3410# asm 2: vpor <v11=%xmm0,<v01=%xmm10,>x3=%xmm0 3411vpor %xmm0,%xmm10,%xmm0 3412 3413# qhasm: v00 = x4 & mask2 3414# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#11 3415# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm10 3416vpand %xmm2,%xmm6,%xmm10 3417 3418# qhasm: 4x v10 = x6 << 16 3419# asm 1: vpslld $16,<x6=reg128#9,>v10=reg128#14 3420# asm 2: vpslld $16,<x6=%xmm8,>v10=%xmm13 3421vpslld $16,%xmm8,%xmm13 3422 3423# qhasm: 4x v01 = x4 unsigned>> 16 3424# asm 1: vpsrld $16,<x4=reg128#7,>v01=reg128#7 3425# asm 2: vpsrld $16,<x4=%xmm6,>v01=%xmm6 3426vpsrld $16,%xmm6,%xmm6 3427 3428# qhasm: v11 = x6 & mask3 3429# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 3430# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 3431vpand %xmm3,%xmm8,%xmm8 3432 3433# qhasm: x4 = v00 | v10 3434# asm 1: vpor <v10=reg128#14,<v00=reg128#11,>x4=reg128#11 3435# asm 2: vpor <v10=%xmm13,<v00=%xmm10,>x4=%xmm10 3436vpor %xmm13,%xmm10,%xmm10 3437 3438# qhasm: x6 = v01 | v11 3439# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 3440# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 3441vpor %xmm8,%xmm6,%xmm6 3442 3443# qhasm: v00 = x5 & mask2 3444# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#3 3445# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm2 3446vpand %xmm2,%xmm7,%xmm2 3447 3448# qhasm: 4x v10 = x7 << 16 3449# asm 1: vpslld $16,<x7=reg128#2,>v10=reg128#9 3450# asm 2: vpslld $16,<x7=%xmm1,>v10=%xmm8 3451vpslld $16,%xmm1,%xmm8 3452 3453# qhasm: 4x v01 = x5 unsigned>> 16 3454# asm 1: vpsrld $16,<x5=reg128#8,>v01=reg128#8 3455# asm 2: vpsrld $16,<x5=%xmm7,>v01=%xmm7 3456vpsrld $16,%xmm7,%xmm7 3457 3458# qhasm: v11 = x7 & mask3 3459# asm 1: vpand <mask3=reg128#4,<x7=reg128#2,>v11=reg128#2 3460# asm 2: vpand <mask3=%xmm3,<x7=%xmm1,>v11=%xmm1 3461vpand %xmm3,%xmm1,%xmm1 3462 3463# qhasm: x5 = v00 | v10 3464# asm 1: vpor <v10=reg128#9,<v00=reg128#3,>x5=reg128#3 3465# asm 2: vpor <v10=%xmm8,<v00=%xmm2,>x5=%xmm2 3466vpor %xmm8,%xmm2,%xmm2 3467 3468# qhasm: x7 = v01 | v11 3469# asm 1: vpor <v11=reg128#2,<v01=reg128#8,>x7=reg128#2 3470# asm 2: vpor <v11=%xmm1,<v01=%xmm7,>x7=%xmm1 3471vpor %xmm1,%xmm7,%xmm1 3472 3473# qhasm: v00 = x0 & mask4 3474# asm 1: vpand <mask4=reg128#5,<x0=reg128#10,>v00=reg128#4 3475# asm 2: vpand <mask4=%xmm4,<x0=%xmm9,>v00=%xmm3 3476vpand %xmm4,%xmm9,%xmm3 3477 3478# qhasm: 8x v10 = x1 << 8 3479# asm 1: vpsllw $8,<x1=reg128#13,>v10=reg128#8 3480# asm 2: vpsllw $8,<x1=%xmm12,>v10=%xmm7 3481vpsllw $8,%xmm12,%xmm7 3482 3483# qhasm: 8x v01 = x0 unsigned>> 8 3484# asm 1: vpsrlw $8,<x0=reg128#10,>v01=reg128#9 3485# asm 2: vpsrlw $8,<x0=%xmm9,>v01=%xmm8 3486vpsrlw $8,%xmm9,%xmm8 3487 3488# qhasm: v11 = x1 & mask5 3489# asm 1: vpand <mask5=reg128#6,<x1=reg128#13,>v11=reg128#10 3490# asm 2: vpand <mask5=%xmm5,<x1=%xmm12,>v11=%xmm9 3491vpand %xmm5,%xmm12,%xmm9 3492 3493# qhasm: x0 = v00 | v10 3494# asm 1: vpor <v10=reg128#8,<v00=reg128#4,>x0=reg128#4 3495# asm 2: vpor <v10=%xmm7,<v00=%xmm3,>x0=%xmm3 3496vpor %xmm7,%xmm3,%xmm3 3497 3498# qhasm: x1 = v01 | v11 3499# asm 1: vpor <v11=reg128#10,<v01=reg128#9,>x1=reg128#8 3500# asm 2: vpor <v11=%xmm9,<v01=%xmm8,>x1=%xmm7 3501vpor %xmm9,%xmm8,%xmm7 3502 3503# qhasm: v00 = x2 & mask4 3504# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#9 3505# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm8 3506vpand %xmm4,%xmm11,%xmm8 3507 3508# qhasm: 8x v10 = x3 << 8 3509# asm 1: vpsllw $8,<x3=reg128#1,>v10=reg128#10 3510# asm 2: vpsllw $8,<x3=%xmm0,>v10=%xmm9 3511vpsllw $8,%xmm0,%xmm9 3512 3513# qhasm: 8x v01 = x2 unsigned>> 8 3514# asm 1: vpsrlw $8,<x2=reg128#12,>v01=reg128#12 3515# asm 2: vpsrlw $8,<x2=%xmm11,>v01=%xmm11 3516vpsrlw $8,%xmm11,%xmm11 3517 3518# qhasm: v11 = x3 & mask5 3519# asm 1: vpand <mask5=reg128#6,<x3=reg128#1,>v11=reg128#1 3520# asm 2: vpand <mask5=%xmm5,<x3=%xmm0,>v11=%xmm0 3521vpand %xmm5,%xmm0,%xmm0 3522 3523# qhasm: x2 = v00 | v10 3524# asm 1: vpor <v10=reg128#10,<v00=reg128#9,>x2=reg128#9 3525# asm 2: vpor <v10=%xmm9,<v00=%xmm8,>x2=%xmm8 3526vpor %xmm9,%xmm8,%xmm8 3527 3528# qhasm: x3 = v01 | v11 3529# asm 1: vpor <v11=reg128#1,<v01=reg128#12,>x3=reg128#1 3530# asm 2: vpor <v11=%xmm0,<v01=%xmm11,>x3=%xmm0 3531vpor %xmm0,%xmm11,%xmm0 3532 3533# qhasm: v00 = x4 & mask4 3534# asm 1: vpand <mask4=reg128#5,<x4=reg128#11,>v00=reg128#10 3535# asm 2: vpand <mask4=%xmm4,<x4=%xmm10,>v00=%xmm9 3536vpand %xmm4,%xmm10,%xmm9 3537 3538# qhasm: 8x v10 = x5 << 8 3539# asm 1: vpsllw $8,<x5=reg128#3,>v10=reg128#12 3540# asm 2: vpsllw $8,<x5=%xmm2,>v10=%xmm11 3541vpsllw $8,%xmm2,%xmm11 3542 3543# qhasm: 8x v01 = x4 unsigned>> 8 3544# asm 1: vpsrlw $8,<x4=reg128#11,>v01=reg128#11 3545# asm 2: vpsrlw $8,<x4=%xmm10,>v01=%xmm10 3546vpsrlw $8,%xmm10,%xmm10 3547 3548# qhasm: v11 = x5 & mask5 3549# asm 1: vpand <mask5=reg128#6,<x5=reg128#3,>v11=reg128#3 3550# asm 2: vpand <mask5=%xmm5,<x5=%xmm2,>v11=%xmm2 3551vpand %xmm5,%xmm2,%xmm2 3552 3553# qhasm: x4 = v00 | v10 3554# asm 1: vpor <v10=reg128#12,<v00=reg128#10,>x4=reg128#10 3555# asm 2: vpor <v10=%xmm11,<v00=%xmm9,>x4=%xmm9 3556vpor %xmm11,%xmm9,%xmm9 3557 3558# qhasm: x5 = v01 | v11 3559# asm 1: vpor <v11=reg128#3,<v01=reg128#11,>x5=reg128#3 3560# asm 2: vpor <v11=%xmm2,<v01=%xmm10,>x5=%xmm2 3561vpor %xmm2,%xmm10,%xmm2 3562 3563# qhasm: v00 = x6 & mask4 3564# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#5 3565# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm4 3566vpand %xmm4,%xmm6,%xmm4 3567 3568# qhasm: 8x v10 = x7 << 8 3569# asm 1: vpsllw $8,<x7=reg128#2,>v10=reg128#11 3570# asm 2: vpsllw $8,<x7=%xmm1,>v10=%xmm10 3571vpsllw $8,%xmm1,%xmm10 3572 3573# qhasm: 8x v01 = x6 unsigned>> 8 3574# asm 1: vpsrlw $8,<x6=reg128#7,>v01=reg128#7 3575# asm 2: vpsrlw $8,<x6=%xmm6,>v01=%xmm6 3576vpsrlw $8,%xmm6,%xmm6 3577 3578# qhasm: v11 = x7 & mask5 3579# asm 1: vpand <mask5=reg128#6,<x7=reg128#2,>v11=reg128#2 3580# asm 2: vpand <mask5=%xmm5,<x7=%xmm1,>v11=%xmm1 3581vpand %xmm5,%xmm1,%xmm1 3582 3583# qhasm: x6 = v00 | v10 3584# asm 1: vpor <v10=reg128#11,<v00=reg128#5,>x6=reg128#5 3585# asm 2: vpor <v10=%xmm10,<v00=%xmm4,>x6=%xmm4 3586vpor %xmm10,%xmm4,%xmm4 3587 3588# qhasm: x7 = v01 | v11 3589# asm 1: vpor <v11=reg128#2,<v01=reg128#7,>x7=reg128#2 3590# asm 2: vpor <v11=%xmm1,<v01=%xmm6,>x7=%xmm1 3591vpor %xmm1,%xmm6,%xmm1 3592 3593# qhasm: mem128[ input_0 + 112 ] = x0 3594# asm 1: movdqu <x0=reg128#4,112(<input_0=int64#1) 3595# asm 2: movdqu <x0=%xmm3,112(<input_0=%rdi) 3596movdqu %xmm3,112(%rdi) 3597 3598# qhasm: mem128[ input_0 + 240 ] = x1 3599# asm 1: movdqu <x1=reg128#8,240(<input_0=int64#1) 3600# asm 2: movdqu <x1=%xmm7,240(<input_0=%rdi) 3601movdqu %xmm7,240(%rdi) 3602 3603# qhasm: mem128[ input_0 + 368 ] = x2 3604# asm 1: movdqu <x2=reg128#9,368(<input_0=int64#1) 3605# asm 2: movdqu <x2=%xmm8,368(<input_0=%rdi) 3606movdqu %xmm8,368(%rdi) 3607 3608# qhasm: mem128[ input_0 + 496 ] = x3 3609# asm 1: movdqu <x3=reg128#1,496(<input_0=int64#1) 3610# asm 2: movdqu <x3=%xmm0,496(<input_0=%rdi) 3611movdqu %xmm0,496(%rdi) 3612 3613# qhasm: mem128[ input_0 + 624 ] = x4 3614# asm 1: movdqu <x4=reg128#10,624(<input_0=int64#1) 3615# asm 2: movdqu <x4=%xmm9,624(<input_0=%rdi) 3616movdqu %xmm9,624(%rdi) 3617 3618# qhasm: mem128[ input_0 + 752 ] = x5 3619# asm 1: movdqu <x5=reg128#3,752(<input_0=int64#1) 3620# asm 2: movdqu <x5=%xmm2,752(<input_0=%rdi) 3621movdqu %xmm2,752(%rdi) 3622 3623# qhasm: mem128[ input_0 + 880 ] = x6 3624# asm 1: movdqu <x6=reg128#5,880(<input_0=int64#1) 3625# asm 2: movdqu <x6=%xmm4,880(<input_0=%rdi) 3626movdqu %xmm4,880(%rdi) 3627 3628# qhasm: mem128[ input_0 + 1008 ] = x7 3629# asm 1: movdqu <x7=reg128#2,1008(<input_0=int64#1) 3630# asm 2: movdqu <x7=%xmm1,1008(<input_0=%rdi) 3631movdqu %xmm1,1008(%rdi) 3632 3633# qhasm: mask0 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK2_0 ] 3634# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK2_0(%rip),>mask0=reg128#1 3635# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK2_0(%rip),>mask0=%xmm0 3636movdqa PQCLEAN_MCELIECE460896F_AVX_MASK2_0(%rip),%xmm0 3637 3638# qhasm: mask1 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK2_1 ] 3639# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK2_1(%rip),>mask1=reg128#2 3640# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK2_1(%rip),>mask1=%xmm1 3641movdqa PQCLEAN_MCELIECE460896F_AVX_MASK2_1(%rip),%xmm1 3642 3643# qhasm: mask2 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK1_0 ] 3644# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK1_0(%rip),>mask2=reg128#3 3645# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK1_0(%rip),>mask2=%xmm2 3646movdqa PQCLEAN_MCELIECE460896F_AVX_MASK1_0(%rip),%xmm2 3647 3648# qhasm: mask3 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK1_1 ] 3649# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK1_1(%rip),>mask3=reg128#4 3650# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK1_1(%rip),>mask3=%xmm3 3651movdqa PQCLEAN_MCELIECE460896F_AVX_MASK1_1(%rip),%xmm3 3652 3653# qhasm: mask4 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK0_0 ] 3654# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK0_0(%rip),>mask4=reg128#5 3655# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK0_0(%rip),>mask4=%xmm4 3656movdqa PQCLEAN_MCELIECE460896F_AVX_MASK0_0(%rip),%xmm4 3657 3658# qhasm: mask5 aligned= mem128[ PQCLEAN_MCELIECE460896F_AVX_MASK0_1 ] 3659# asm 1: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK0_1(%rip),>mask5=reg128#6 3660# asm 2: movdqa PQCLEAN_MCELIECE460896F_AVX_MASK0_1(%rip),>mask5=%xmm5 3661movdqa PQCLEAN_MCELIECE460896F_AVX_MASK0_1(%rip),%xmm5 3662 3663# qhasm: x0 = mem128[ input_0 + 0 ] 3664# asm 1: movdqu 0(<input_0=int64#1),>x0=reg128#7 3665# asm 2: movdqu 0(<input_0=%rdi),>x0=%xmm6 3666movdqu 0(%rdi),%xmm6 3667 3668# qhasm: x1 = mem128[ input_0 + 16 ] 3669# asm 1: movdqu 16(<input_0=int64#1),>x1=reg128#8 3670# asm 2: movdqu 16(<input_0=%rdi),>x1=%xmm7 3671movdqu 16(%rdi),%xmm7 3672 3673# qhasm: x2 = mem128[ input_0 + 32 ] 3674# asm 1: movdqu 32(<input_0=int64#1),>x2=reg128#9 3675# asm 2: movdqu 32(<input_0=%rdi),>x2=%xmm8 3676movdqu 32(%rdi),%xmm8 3677 3678# qhasm: x3 = mem128[ input_0 + 48 ] 3679# asm 1: movdqu 48(<input_0=int64#1),>x3=reg128#10 3680# asm 2: movdqu 48(<input_0=%rdi),>x3=%xmm9 3681movdqu 48(%rdi),%xmm9 3682 3683# qhasm: x4 = mem128[ input_0 + 64 ] 3684# asm 1: movdqu 64(<input_0=int64#1),>x4=reg128#11 3685# asm 2: movdqu 64(<input_0=%rdi),>x4=%xmm10 3686movdqu 64(%rdi),%xmm10 3687 3688# qhasm: x5 = mem128[ input_0 + 80 ] 3689# asm 1: movdqu 80(<input_0=int64#1),>x5=reg128#12 3690# asm 2: movdqu 80(<input_0=%rdi),>x5=%xmm11 3691movdqu 80(%rdi),%xmm11 3692 3693# qhasm: x6 = mem128[ input_0 + 96 ] 3694# asm 1: movdqu 96(<input_0=int64#1),>x6=reg128#13 3695# asm 2: movdqu 96(<input_0=%rdi),>x6=%xmm12 3696movdqu 96(%rdi),%xmm12 3697 3698# qhasm: x7 = mem128[ input_0 + 112 ] 3699# asm 1: movdqu 112(<input_0=int64#1),>x7=reg128#14 3700# asm 2: movdqu 112(<input_0=%rdi),>x7=%xmm13 3701movdqu 112(%rdi),%xmm13 3702 3703# qhasm: v00 = x0 & mask0 3704# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 3705# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 3706vpand %xmm0,%xmm6,%xmm14 3707 3708# qhasm: v10 = x4 & mask0 3709# asm 1: vpand <mask0=reg128#1,<x4=reg128#11,>v10=reg128#16 3710# asm 2: vpand <mask0=%xmm0,<x4=%xmm10,>v10=%xmm15 3711vpand %xmm0,%xmm10,%xmm15 3712 3713# qhasm: 2x v10 <<= 4 3714# asm 1: psllq $4,<v10=reg128#16 3715# asm 2: psllq $4,<v10=%xmm15 3716psllq $4,%xmm15 3717 3718# qhasm: v01 = x0 & mask1 3719# asm 1: vpand <mask1=reg128#2,<x0=reg128#7,>v01=reg128#7 3720# asm 2: vpand <mask1=%xmm1,<x0=%xmm6,>v01=%xmm6 3721vpand %xmm1,%xmm6,%xmm6 3722 3723# qhasm: v11 = x4 & mask1 3724# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 3725# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 3726vpand %xmm1,%xmm10,%xmm10 3727 3728# qhasm: 2x v01 unsigned>>= 4 3729# asm 1: psrlq $4,<v01=reg128#7 3730# asm 2: psrlq $4,<v01=%xmm6 3731psrlq $4,%xmm6 3732 3733# qhasm: x0 = v00 | v10 3734# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 3735# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 3736vpor %xmm15,%xmm14,%xmm14 3737 3738# qhasm: x4 = v01 | v11 3739# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 3740# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 3741vpor %xmm10,%xmm6,%xmm6 3742 3743# qhasm: v00 = x1 & mask0 3744# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 3745# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 3746vpand %xmm0,%xmm7,%xmm10 3747 3748# qhasm: v10 = x5 & mask0 3749# asm 1: vpand <mask0=reg128#1,<x5=reg128#12,>v10=reg128#16 3750# asm 2: vpand <mask0=%xmm0,<x5=%xmm11,>v10=%xmm15 3751vpand %xmm0,%xmm11,%xmm15 3752 3753# qhasm: 2x v10 <<= 4 3754# asm 1: psllq $4,<v10=reg128#16 3755# asm 2: psllq $4,<v10=%xmm15 3756psllq $4,%xmm15 3757 3758# qhasm: v01 = x1 & mask1 3759# asm 1: vpand <mask1=reg128#2,<x1=reg128#8,>v01=reg128#8 3760# asm 2: vpand <mask1=%xmm1,<x1=%xmm7,>v01=%xmm7 3761vpand %xmm1,%xmm7,%xmm7 3762 3763# qhasm: v11 = x5 & mask1 3764# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 3765# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 3766vpand %xmm1,%xmm11,%xmm11 3767 3768# qhasm: 2x v01 unsigned>>= 4 3769# asm 1: psrlq $4,<v01=reg128#8 3770# asm 2: psrlq $4,<v01=%xmm7 3771psrlq $4,%xmm7 3772 3773# qhasm: x1 = v00 | v10 3774# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 3775# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 3776vpor %xmm15,%xmm10,%xmm10 3777 3778# qhasm: x5 = v01 | v11 3779# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 3780# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 3781vpor %xmm11,%xmm7,%xmm7 3782 3783# qhasm: v00 = x2 & mask0 3784# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 3785# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 3786vpand %xmm0,%xmm8,%xmm11 3787 3788# qhasm: v10 = x6 & mask0 3789# asm 1: vpand <mask0=reg128#1,<x6=reg128#13,>v10=reg128#16 3790# asm 2: vpand <mask0=%xmm0,<x6=%xmm12,>v10=%xmm15 3791vpand %xmm0,%xmm12,%xmm15 3792 3793# qhasm: 2x v10 <<= 4 3794# asm 1: psllq $4,<v10=reg128#16 3795# asm 2: psllq $4,<v10=%xmm15 3796psllq $4,%xmm15 3797 3798# qhasm: v01 = x2 & mask1 3799# asm 1: vpand <mask1=reg128#2,<x2=reg128#9,>v01=reg128#9 3800# asm 2: vpand <mask1=%xmm1,<x2=%xmm8,>v01=%xmm8 3801vpand %xmm1,%xmm8,%xmm8 3802 3803# qhasm: v11 = x6 & mask1 3804# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 3805# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 3806vpand %xmm1,%xmm12,%xmm12 3807 3808# qhasm: 2x v01 unsigned>>= 4 3809# asm 1: psrlq $4,<v01=reg128#9 3810# asm 2: psrlq $4,<v01=%xmm8 3811psrlq $4,%xmm8 3812 3813# qhasm: x2 = v00 | v10 3814# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 3815# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 3816vpor %xmm15,%xmm11,%xmm11 3817 3818# qhasm: x6 = v01 | v11 3819# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 3820# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 3821vpor %xmm12,%xmm8,%xmm8 3822 3823# qhasm: v00 = x3 & mask0 3824# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 3825# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 3826vpand %xmm0,%xmm9,%xmm12 3827 3828# qhasm: v10 = x7 & mask0 3829# asm 1: vpand <mask0=reg128#1,<x7=reg128#14,>v10=reg128#16 3830# asm 2: vpand <mask0=%xmm0,<x7=%xmm13,>v10=%xmm15 3831vpand %xmm0,%xmm13,%xmm15 3832 3833# qhasm: 2x v10 <<= 4 3834# asm 1: psllq $4,<v10=reg128#16 3835# asm 2: psllq $4,<v10=%xmm15 3836psllq $4,%xmm15 3837 3838# qhasm: v01 = x3 & mask1 3839# asm 1: vpand <mask1=reg128#2,<x3=reg128#10,>v01=reg128#10 3840# asm 2: vpand <mask1=%xmm1,<x3=%xmm9,>v01=%xmm9 3841vpand %xmm1,%xmm9,%xmm9 3842 3843# qhasm: v11 = x7 & mask1 3844# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 3845# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 3846vpand %xmm1,%xmm13,%xmm13 3847 3848# qhasm: 2x v01 unsigned>>= 4 3849# asm 1: psrlq $4,<v01=reg128#10 3850# asm 2: psrlq $4,<v01=%xmm9 3851psrlq $4,%xmm9 3852 3853# qhasm: x3 = v00 | v10 3854# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 3855# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 3856vpor %xmm15,%xmm12,%xmm12 3857 3858# qhasm: x7 = v01 | v11 3859# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 3860# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 3861vpor %xmm13,%xmm9,%xmm9 3862 3863# qhasm: v00 = x0 & mask2 3864# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 3865# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 3866vpand %xmm2,%xmm14,%xmm13 3867 3868# qhasm: v10 = x2 & mask2 3869# asm 1: vpand <mask2=reg128#3,<x2=reg128#12,>v10=reg128#16 3870# asm 2: vpand <mask2=%xmm2,<x2=%xmm11,>v10=%xmm15 3871vpand %xmm2,%xmm11,%xmm15 3872 3873# qhasm: 2x v10 <<= 2 3874# asm 1: psllq $2,<v10=reg128#16 3875# asm 2: psllq $2,<v10=%xmm15 3876psllq $2,%xmm15 3877 3878# qhasm: v01 = x0 & mask3 3879# asm 1: vpand <mask3=reg128#4,<x0=reg128#15,>v01=reg128#15 3880# asm 2: vpand <mask3=%xmm3,<x0=%xmm14,>v01=%xmm14 3881vpand %xmm3,%xmm14,%xmm14 3882 3883# qhasm: v11 = x2 & mask3 3884# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 3885# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 3886vpand %xmm3,%xmm11,%xmm11 3887 3888# qhasm: 2x v01 unsigned>>= 2 3889# asm 1: psrlq $2,<v01=reg128#15 3890# asm 2: psrlq $2,<v01=%xmm14 3891psrlq $2,%xmm14 3892 3893# qhasm: x0 = v00 | v10 3894# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 3895# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 3896vpor %xmm15,%xmm13,%xmm13 3897 3898# qhasm: x2 = v01 | v11 3899# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 3900# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 3901vpor %xmm11,%xmm14,%xmm11 3902 3903# qhasm: v00 = x1 & mask2 3904# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 3905# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 3906vpand %xmm2,%xmm10,%xmm14 3907 3908# qhasm: v10 = x3 & mask2 3909# asm 1: vpand <mask2=reg128#3,<x3=reg128#13,>v10=reg128#16 3910# asm 2: vpand <mask2=%xmm2,<x3=%xmm12,>v10=%xmm15 3911vpand %xmm2,%xmm12,%xmm15 3912 3913# qhasm: 2x v10 <<= 2 3914# asm 1: psllq $2,<v10=reg128#16 3915# asm 2: psllq $2,<v10=%xmm15 3916psllq $2,%xmm15 3917 3918# qhasm: v01 = x1 & mask3 3919# asm 1: vpand <mask3=reg128#4,<x1=reg128#11,>v01=reg128#11 3920# asm 2: vpand <mask3=%xmm3,<x1=%xmm10,>v01=%xmm10 3921vpand %xmm3,%xmm10,%xmm10 3922 3923# qhasm: v11 = x3 & mask3 3924# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 3925# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 3926vpand %xmm3,%xmm12,%xmm12 3927 3928# qhasm: 2x v01 unsigned>>= 2 3929# asm 1: psrlq $2,<v01=reg128#11 3930# asm 2: psrlq $2,<v01=%xmm10 3931psrlq $2,%xmm10 3932 3933# qhasm: x1 = v00 | v10 3934# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 3935# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 3936vpor %xmm15,%xmm14,%xmm14 3937 3938# qhasm: x3 = v01 | v11 3939# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 3940# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 3941vpor %xmm12,%xmm10,%xmm10 3942 3943# qhasm: v00 = x4 & mask2 3944# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 3945# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 3946vpand %xmm2,%xmm6,%xmm12 3947 3948# qhasm: v10 = x6 & mask2 3949# asm 1: vpand <mask2=reg128#3,<x6=reg128#9,>v10=reg128#16 3950# asm 2: vpand <mask2=%xmm2,<x6=%xmm8,>v10=%xmm15 3951vpand %xmm2,%xmm8,%xmm15 3952 3953# qhasm: 2x v10 <<= 2 3954# asm 1: psllq $2,<v10=reg128#16 3955# asm 2: psllq $2,<v10=%xmm15 3956psllq $2,%xmm15 3957 3958# qhasm: v01 = x4 & mask3 3959# asm 1: vpand <mask3=reg128#4,<x4=reg128#7,>v01=reg128#7 3960# asm 2: vpand <mask3=%xmm3,<x4=%xmm6,>v01=%xmm6 3961vpand %xmm3,%xmm6,%xmm6 3962 3963# qhasm: v11 = x6 & mask3 3964# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 3965# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 3966vpand %xmm3,%xmm8,%xmm8 3967 3968# qhasm: 2x v01 unsigned>>= 2 3969# asm 1: psrlq $2,<v01=reg128#7 3970# asm 2: psrlq $2,<v01=%xmm6 3971psrlq $2,%xmm6 3972 3973# qhasm: x4 = v00 | v10 3974# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 3975# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 3976vpor %xmm15,%xmm12,%xmm12 3977 3978# qhasm: x6 = v01 | v11 3979# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 3980# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 3981vpor %xmm8,%xmm6,%xmm6 3982 3983# qhasm: v00 = x5 & mask2 3984# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 3985# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 3986vpand %xmm2,%xmm7,%xmm8 3987 3988# qhasm: v10 = x7 & mask2 3989# asm 1: vpand <mask2=reg128#3,<x7=reg128#10,>v10=reg128#16 3990# asm 2: vpand <mask2=%xmm2,<x7=%xmm9,>v10=%xmm15 3991vpand %xmm2,%xmm9,%xmm15 3992 3993# qhasm: 2x v10 <<= 2 3994# asm 1: psllq $2,<v10=reg128#16 3995# asm 2: psllq $2,<v10=%xmm15 3996psllq $2,%xmm15 3997 3998# qhasm: v01 = x5 & mask3 3999# asm 1: vpand <mask3=reg128#4,<x5=reg128#8,>v01=reg128#8 4000# asm 2: vpand <mask3=%xmm3,<x5=%xmm7,>v01=%xmm7 4001vpand %xmm3,%xmm7,%xmm7 4002 4003# qhasm: v11 = x7 & mask3 4004# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 4005# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 4006vpand %xmm3,%xmm9,%xmm9 4007 4008# qhasm: 2x v01 unsigned>>= 2 4009# asm 1: psrlq $2,<v01=reg128#8 4010# asm 2: psrlq $2,<v01=%xmm7 4011psrlq $2,%xmm7 4012 4013# qhasm: x5 = v00 | v10 4014# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 4015# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 4016vpor %xmm15,%xmm8,%xmm8 4017 4018# qhasm: x7 = v01 | v11 4019# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 4020# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 4021vpor %xmm9,%xmm7,%xmm7 4022 4023# qhasm: v00 = x0 & mask4 4024# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 4025# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 4026vpand %xmm4,%xmm13,%xmm9 4027 4028# qhasm: v10 = x1 & mask4 4029# asm 1: vpand <mask4=reg128#5,<x1=reg128#15,>v10=reg128#16 4030# asm 2: vpand <mask4=%xmm4,<x1=%xmm14,>v10=%xmm15 4031vpand %xmm4,%xmm14,%xmm15 4032 4033# qhasm: 2x v10 <<= 1 4034# asm 1: psllq $1,<v10=reg128#16 4035# asm 2: psllq $1,<v10=%xmm15 4036psllq $1,%xmm15 4037 4038# qhasm: v01 = x0 & mask5 4039# asm 1: vpand <mask5=reg128#6,<x0=reg128#14,>v01=reg128#14 4040# asm 2: vpand <mask5=%xmm5,<x0=%xmm13,>v01=%xmm13 4041vpand %xmm5,%xmm13,%xmm13 4042 4043# qhasm: v11 = x1 & mask5 4044# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 4045# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 4046vpand %xmm5,%xmm14,%xmm14 4047 4048# qhasm: 2x v01 unsigned>>= 1 4049# asm 1: psrlq $1,<v01=reg128#14 4050# asm 2: psrlq $1,<v01=%xmm13 4051psrlq $1,%xmm13 4052 4053# qhasm: x0 = v00 | v10 4054# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 4055# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 4056vpor %xmm15,%xmm9,%xmm9 4057 4058# qhasm: x1 = v01 | v11 4059# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 4060# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 4061vpor %xmm14,%xmm13,%xmm13 4062 4063# qhasm: v00 = x2 & mask4 4064# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 4065# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 4066vpand %xmm4,%xmm11,%xmm14 4067 4068# qhasm: v10 = x3 & mask4 4069# asm 1: vpand <mask4=reg128#5,<x3=reg128#11,>v10=reg128#16 4070# asm 2: vpand <mask4=%xmm4,<x3=%xmm10,>v10=%xmm15 4071vpand %xmm4,%xmm10,%xmm15 4072 4073# qhasm: 2x v10 <<= 1 4074# asm 1: psllq $1,<v10=reg128#16 4075# asm 2: psllq $1,<v10=%xmm15 4076psllq $1,%xmm15 4077 4078# qhasm: v01 = x2 & mask5 4079# asm 1: vpand <mask5=reg128#6,<x2=reg128#12,>v01=reg128#12 4080# asm 2: vpand <mask5=%xmm5,<x2=%xmm11,>v01=%xmm11 4081vpand %xmm5,%xmm11,%xmm11 4082 4083# qhasm: v11 = x3 & mask5 4084# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 4085# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 4086vpand %xmm5,%xmm10,%xmm10 4087 4088# qhasm: 2x v01 unsigned>>= 1 4089# asm 1: psrlq $1,<v01=reg128#12 4090# asm 2: psrlq $1,<v01=%xmm11 4091psrlq $1,%xmm11 4092 4093# qhasm: x2 = v00 | v10 4094# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 4095# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 4096vpor %xmm15,%xmm14,%xmm14 4097 4098# qhasm: x3 = v01 | v11 4099# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 4100# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 4101vpor %xmm10,%xmm11,%xmm10 4102 4103# qhasm: v00 = x4 & mask4 4104# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 4105# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 4106vpand %xmm4,%xmm12,%xmm11 4107 4108# qhasm: v10 = x5 & mask4 4109# asm 1: vpand <mask4=reg128#5,<x5=reg128#9,>v10=reg128#16 4110# asm 2: vpand <mask4=%xmm4,<x5=%xmm8,>v10=%xmm15 4111vpand %xmm4,%xmm8,%xmm15 4112 4113# qhasm: 2x v10 <<= 1 4114# asm 1: psllq $1,<v10=reg128#16 4115# asm 2: psllq $1,<v10=%xmm15 4116psllq $1,%xmm15 4117 4118# qhasm: v01 = x4 & mask5 4119# asm 1: vpand <mask5=reg128#6,<x4=reg128#13,>v01=reg128#13 4120# asm 2: vpand <mask5=%xmm5,<x4=%xmm12,>v01=%xmm12 4121vpand %xmm5,%xmm12,%xmm12 4122 4123# qhasm: v11 = x5 & mask5 4124# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 4125# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 4126vpand %xmm5,%xmm8,%xmm8 4127 4128# qhasm: 2x v01 unsigned>>= 1 4129# asm 1: psrlq $1,<v01=reg128#13 4130# asm 2: psrlq $1,<v01=%xmm12 4131psrlq $1,%xmm12 4132 4133# qhasm: x4 = v00 | v10 4134# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 4135# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 4136vpor %xmm15,%xmm11,%xmm11 4137 4138# qhasm: x5 = v01 | v11 4139# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 4140# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 4141vpor %xmm8,%xmm12,%xmm8 4142 4143# qhasm: v00 = x6 & mask4 4144# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 4145# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 4146vpand %xmm4,%xmm6,%xmm12 4147 4148# qhasm: v10 = x7 & mask4 4149# asm 1: vpand <mask4=reg128#5,<x7=reg128#8,>v10=reg128#16 4150# asm 2: vpand <mask4=%xmm4,<x7=%xmm7,>v10=%xmm15 4151vpand %xmm4,%xmm7,%xmm15 4152 4153# qhasm: 2x v10 <<= 1 4154# asm 1: psllq $1,<v10=reg128#16 4155# asm 2: psllq $1,<v10=%xmm15 4156psllq $1,%xmm15 4157 4158# qhasm: v01 = x6 & mask5 4159# asm 1: vpand <mask5=reg128#6,<x6=reg128#7,>v01=reg128#7 4160# asm 2: vpand <mask5=%xmm5,<x6=%xmm6,>v01=%xmm6 4161vpand %xmm5,%xmm6,%xmm6 4162 4163# qhasm: v11 = x7 & mask5 4164# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 4165# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 4166vpand %xmm5,%xmm7,%xmm7 4167 4168# qhasm: 2x v01 unsigned>>= 1 4169# asm 1: psrlq $1,<v01=reg128#7 4170# asm 2: psrlq $1,<v01=%xmm6 4171psrlq $1,%xmm6 4172 4173# qhasm: x6 = v00 | v10 4174# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 4175# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 4176vpor %xmm15,%xmm12,%xmm12 4177 4178# qhasm: x7 = v01 | v11 4179# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 4180# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 4181vpor %xmm7,%xmm6,%xmm6 4182 4183# qhasm: mem128[ input_0 + 0 ] = x0 4184# asm 1: movdqu <x0=reg128#10,0(<input_0=int64#1) 4185# asm 2: movdqu <x0=%xmm9,0(<input_0=%rdi) 4186movdqu %xmm9,0(%rdi) 4187 4188# qhasm: mem128[ input_0 + 16 ] = x1 4189# asm 1: movdqu <x1=reg128#14,16(<input_0=int64#1) 4190# asm 2: movdqu <x1=%xmm13,16(<input_0=%rdi) 4191movdqu %xmm13,16(%rdi) 4192 4193# qhasm: mem128[ input_0 + 32 ] = x2 4194# asm 1: movdqu <x2=reg128#15,32(<input_0=int64#1) 4195# asm 2: movdqu <x2=%xmm14,32(<input_0=%rdi) 4196movdqu %xmm14,32(%rdi) 4197 4198# qhasm: mem128[ input_0 + 48 ] = x3 4199# asm 1: movdqu <x3=reg128#11,48(<input_0=int64#1) 4200# asm 2: movdqu <x3=%xmm10,48(<input_0=%rdi) 4201movdqu %xmm10,48(%rdi) 4202 4203# qhasm: mem128[ input_0 + 64 ] = x4 4204# asm 1: movdqu <x4=reg128#12,64(<input_0=int64#1) 4205# asm 2: movdqu <x4=%xmm11,64(<input_0=%rdi) 4206movdqu %xmm11,64(%rdi) 4207 4208# qhasm: mem128[ input_0 + 80 ] = x5 4209# asm 1: movdqu <x5=reg128#9,80(<input_0=int64#1) 4210# asm 2: movdqu <x5=%xmm8,80(<input_0=%rdi) 4211movdqu %xmm8,80(%rdi) 4212 4213# qhasm: mem128[ input_0 + 96 ] = x6 4214# asm 1: movdqu <x6=reg128#13,96(<input_0=int64#1) 4215# asm 2: movdqu <x6=%xmm12,96(<input_0=%rdi) 4216movdqu %xmm12,96(%rdi) 4217 4218# qhasm: mem128[ input_0 + 112 ] = x7 4219# asm 1: movdqu <x7=reg128#7,112(<input_0=int64#1) 4220# asm 2: movdqu <x7=%xmm6,112(<input_0=%rdi) 4221movdqu %xmm6,112(%rdi) 4222 4223# qhasm: x0 = mem128[ input_0 + 128 ] 4224# asm 1: movdqu 128(<input_0=int64#1),>x0=reg128#7 4225# asm 2: movdqu 128(<input_0=%rdi),>x0=%xmm6 4226movdqu 128(%rdi),%xmm6 4227 4228# qhasm: x1 = mem128[ input_0 + 144 ] 4229# asm 1: movdqu 144(<input_0=int64#1),>x1=reg128#8 4230# asm 2: movdqu 144(<input_0=%rdi),>x1=%xmm7 4231movdqu 144(%rdi),%xmm7 4232 4233# qhasm: x2 = mem128[ input_0 + 160 ] 4234# asm 1: movdqu 160(<input_0=int64#1),>x2=reg128#9 4235# asm 2: movdqu 160(<input_0=%rdi),>x2=%xmm8 4236movdqu 160(%rdi),%xmm8 4237 4238# qhasm: x3 = mem128[ input_0 + 176 ] 4239# asm 1: movdqu 176(<input_0=int64#1),>x3=reg128#10 4240# asm 2: movdqu 176(<input_0=%rdi),>x3=%xmm9 4241movdqu 176(%rdi),%xmm9 4242 4243# qhasm: x4 = mem128[ input_0 + 192 ] 4244# asm 1: movdqu 192(<input_0=int64#1),>x4=reg128#11 4245# asm 2: movdqu 192(<input_0=%rdi),>x4=%xmm10 4246movdqu 192(%rdi),%xmm10 4247 4248# qhasm: x5 = mem128[ input_0 + 208 ] 4249# asm 1: movdqu 208(<input_0=int64#1),>x5=reg128#12 4250# asm 2: movdqu 208(<input_0=%rdi),>x5=%xmm11 4251movdqu 208(%rdi),%xmm11 4252 4253# qhasm: x6 = mem128[ input_0 + 224 ] 4254# asm 1: movdqu 224(<input_0=int64#1),>x6=reg128#13 4255# asm 2: movdqu 224(<input_0=%rdi),>x6=%xmm12 4256movdqu 224(%rdi),%xmm12 4257 4258# qhasm: x7 = mem128[ input_0 + 240 ] 4259# asm 1: movdqu 240(<input_0=int64#1),>x7=reg128#14 4260# asm 2: movdqu 240(<input_0=%rdi),>x7=%xmm13 4261movdqu 240(%rdi),%xmm13 4262 4263# qhasm: v00 = x0 & mask0 4264# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 4265# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 4266vpand %xmm0,%xmm6,%xmm14 4267 4268# qhasm: v10 = x4 & mask0 4269# asm 1: vpand <mask0=reg128#1,<x4=reg128#11,>v10=reg128#16 4270# asm 2: vpand <mask0=%xmm0,<x4=%xmm10,>v10=%xmm15 4271vpand %xmm0,%xmm10,%xmm15 4272 4273# qhasm: 2x v10 <<= 4 4274# asm 1: psllq $4,<v10=reg128#16 4275# asm 2: psllq $4,<v10=%xmm15 4276psllq $4,%xmm15 4277 4278# qhasm: v01 = x0 & mask1 4279# asm 1: vpand <mask1=reg128#2,<x0=reg128#7,>v01=reg128#7 4280# asm 2: vpand <mask1=%xmm1,<x0=%xmm6,>v01=%xmm6 4281vpand %xmm1,%xmm6,%xmm6 4282 4283# qhasm: v11 = x4 & mask1 4284# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 4285# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 4286vpand %xmm1,%xmm10,%xmm10 4287 4288# qhasm: 2x v01 unsigned>>= 4 4289# asm 1: psrlq $4,<v01=reg128#7 4290# asm 2: psrlq $4,<v01=%xmm6 4291psrlq $4,%xmm6 4292 4293# qhasm: x0 = v00 | v10 4294# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 4295# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 4296vpor %xmm15,%xmm14,%xmm14 4297 4298# qhasm: x4 = v01 | v11 4299# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 4300# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 4301vpor %xmm10,%xmm6,%xmm6 4302 4303# qhasm: v00 = x1 & mask0 4304# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 4305# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 4306vpand %xmm0,%xmm7,%xmm10 4307 4308# qhasm: v10 = x5 & mask0 4309# asm 1: vpand <mask0=reg128#1,<x5=reg128#12,>v10=reg128#16 4310# asm 2: vpand <mask0=%xmm0,<x5=%xmm11,>v10=%xmm15 4311vpand %xmm0,%xmm11,%xmm15 4312 4313# qhasm: 2x v10 <<= 4 4314# asm 1: psllq $4,<v10=reg128#16 4315# asm 2: psllq $4,<v10=%xmm15 4316psllq $4,%xmm15 4317 4318# qhasm: v01 = x1 & mask1 4319# asm 1: vpand <mask1=reg128#2,<x1=reg128#8,>v01=reg128#8 4320# asm 2: vpand <mask1=%xmm1,<x1=%xmm7,>v01=%xmm7 4321vpand %xmm1,%xmm7,%xmm7 4322 4323# qhasm: v11 = x5 & mask1 4324# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 4325# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 4326vpand %xmm1,%xmm11,%xmm11 4327 4328# qhasm: 2x v01 unsigned>>= 4 4329# asm 1: psrlq $4,<v01=reg128#8 4330# asm 2: psrlq $4,<v01=%xmm7 4331psrlq $4,%xmm7 4332 4333# qhasm: x1 = v00 | v10 4334# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 4335# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 4336vpor %xmm15,%xmm10,%xmm10 4337 4338# qhasm: x5 = v01 | v11 4339# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 4340# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 4341vpor %xmm11,%xmm7,%xmm7 4342 4343# qhasm: v00 = x2 & mask0 4344# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 4345# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 4346vpand %xmm0,%xmm8,%xmm11 4347 4348# qhasm: v10 = x6 & mask0 4349# asm 1: vpand <mask0=reg128#1,<x6=reg128#13,>v10=reg128#16 4350# asm 2: vpand <mask0=%xmm0,<x6=%xmm12,>v10=%xmm15 4351vpand %xmm0,%xmm12,%xmm15 4352 4353# qhasm: 2x v10 <<= 4 4354# asm 1: psllq $4,<v10=reg128#16 4355# asm 2: psllq $4,<v10=%xmm15 4356psllq $4,%xmm15 4357 4358# qhasm: v01 = x2 & mask1 4359# asm 1: vpand <mask1=reg128#2,<x2=reg128#9,>v01=reg128#9 4360# asm 2: vpand <mask1=%xmm1,<x2=%xmm8,>v01=%xmm8 4361vpand %xmm1,%xmm8,%xmm8 4362 4363# qhasm: v11 = x6 & mask1 4364# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 4365# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 4366vpand %xmm1,%xmm12,%xmm12 4367 4368# qhasm: 2x v01 unsigned>>= 4 4369# asm 1: psrlq $4,<v01=reg128#9 4370# asm 2: psrlq $4,<v01=%xmm8 4371psrlq $4,%xmm8 4372 4373# qhasm: x2 = v00 | v10 4374# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 4375# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 4376vpor %xmm15,%xmm11,%xmm11 4377 4378# qhasm: x6 = v01 | v11 4379# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 4380# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 4381vpor %xmm12,%xmm8,%xmm8 4382 4383# qhasm: v00 = x3 & mask0 4384# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 4385# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 4386vpand %xmm0,%xmm9,%xmm12 4387 4388# qhasm: v10 = x7 & mask0 4389# asm 1: vpand <mask0=reg128#1,<x7=reg128#14,>v10=reg128#16 4390# asm 2: vpand <mask0=%xmm0,<x7=%xmm13,>v10=%xmm15 4391vpand %xmm0,%xmm13,%xmm15 4392 4393# qhasm: 2x v10 <<= 4 4394# asm 1: psllq $4,<v10=reg128#16 4395# asm 2: psllq $4,<v10=%xmm15 4396psllq $4,%xmm15 4397 4398# qhasm: v01 = x3 & mask1 4399# asm 1: vpand <mask1=reg128#2,<x3=reg128#10,>v01=reg128#10 4400# asm 2: vpand <mask1=%xmm1,<x3=%xmm9,>v01=%xmm9 4401vpand %xmm1,%xmm9,%xmm9 4402 4403# qhasm: v11 = x7 & mask1 4404# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 4405# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 4406vpand %xmm1,%xmm13,%xmm13 4407 4408# qhasm: 2x v01 unsigned>>= 4 4409# asm 1: psrlq $4,<v01=reg128#10 4410# asm 2: psrlq $4,<v01=%xmm9 4411psrlq $4,%xmm9 4412 4413# qhasm: x3 = v00 | v10 4414# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 4415# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 4416vpor %xmm15,%xmm12,%xmm12 4417 4418# qhasm: x7 = v01 | v11 4419# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 4420# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 4421vpor %xmm13,%xmm9,%xmm9 4422 4423# qhasm: v00 = x0 & mask2 4424# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 4425# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 4426vpand %xmm2,%xmm14,%xmm13 4427 4428# qhasm: v10 = x2 & mask2 4429# asm 1: vpand <mask2=reg128#3,<x2=reg128#12,>v10=reg128#16 4430# asm 2: vpand <mask2=%xmm2,<x2=%xmm11,>v10=%xmm15 4431vpand %xmm2,%xmm11,%xmm15 4432 4433# qhasm: 2x v10 <<= 2 4434# asm 1: psllq $2,<v10=reg128#16 4435# asm 2: psllq $2,<v10=%xmm15 4436psllq $2,%xmm15 4437 4438# qhasm: v01 = x0 & mask3 4439# asm 1: vpand <mask3=reg128#4,<x0=reg128#15,>v01=reg128#15 4440# asm 2: vpand <mask3=%xmm3,<x0=%xmm14,>v01=%xmm14 4441vpand %xmm3,%xmm14,%xmm14 4442 4443# qhasm: v11 = x2 & mask3 4444# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 4445# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 4446vpand %xmm3,%xmm11,%xmm11 4447 4448# qhasm: 2x v01 unsigned>>= 2 4449# asm 1: psrlq $2,<v01=reg128#15 4450# asm 2: psrlq $2,<v01=%xmm14 4451psrlq $2,%xmm14 4452 4453# qhasm: x0 = v00 | v10 4454# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 4455# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 4456vpor %xmm15,%xmm13,%xmm13 4457 4458# qhasm: x2 = v01 | v11 4459# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 4460# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 4461vpor %xmm11,%xmm14,%xmm11 4462 4463# qhasm: v00 = x1 & mask2 4464# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 4465# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 4466vpand %xmm2,%xmm10,%xmm14 4467 4468# qhasm: v10 = x3 & mask2 4469# asm 1: vpand <mask2=reg128#3,<x3=reg128#13,>v10=reg128#16 4470# asm 2: vpand <mask2=%xmm2,<x3=%xmm12,>v10=%xmm15 4471vpand %xmm2,%xmm12,%xmm15 4472 4473# qhasm: 2x v10 <<= 2 4474# asm 1: psllq $2,<v10=reg128#16 4475# asm 2: psllq $2,<v10=%xmm15 4476psllq $2,%xmm15 4477 4478# qhasm: v01 = x1 & mask3 4479# asm 1: vpand <mask3=reg128#4,<x1=reg128#11,>v01=reg128#11 4480# asm 2: vpand <mask3=%xmm3,<x1=%xmm10,>v01=%xmm10 4481vpand %xmm3,%xmm10,%xmm10 4482 4483# qhasm: v11 = x3 & mask3 4484# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 4485# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 4486vpand %xmm3,%xmm12,%xmm12 4487 4488# qhasm: 2x v01 unsigned>>= 2 4489# asm 1: psrlq $2,<v01=reg128#11 4490# asm 2: psrlq $2,<v01=%xmm10 4491psrlq $2,%xmm10 4492 4493# qhasm: x1 = v00 | v10 4494# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 4495# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 4496vpor %xmm15,%xmm14,%xmm14 4497 4498# qhasm: x3 = v01 | v11 4499# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 4500# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 4501vpor %xmm12,%xmm10,%xmm10 4502 4503# qhasm: v00 = x4 & mask2 4504# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 4505# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 4506vpand %xmm2,%xmm6,%xmm12 4507 4508# qhasm: v10 = x6 & mask2 4509# asm 1: vpand <mask2=reg128#3,<x6=reg128#9,>v10=reg128#16 4510# asm 2: vpand <mask2=%xmm2,<x6=%xmm8,>v10=%xmm15 4511vpand %xmm2,%xmm8,%xmm15 4512 4513# qhasm: 2x v10 <<= 2 4514# asm 1: psllq $2,<v10=reg128#16 4515# asm 2: psllq $2,<v10=%xmm15 4516psllq $2,%xmm15 4517 4518# qhasm: v01 = x4 & mask3 4519# asm 1: vpand <mask3=reg128#4,<x4=reg128#7,>v01=reg128#7 4520# asm 2: vpand <mask3=%xmm3,<x4=%xmm6,>v01=%xmm6 4521vpand %xmm3,%xmm6,%xmm6 4522 4523# qhasm: v11 = x6 & mask3 4524# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 4525# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 4526vpand %xmm3,%xmm8,%xmm8 4527 4528# qhasm: 2x v01 unsigned>>= 2 4529# asm 1: psrlq $2,<v01=reg128#7 4530# asm 2: psrlq $2,<v01=%xmm6 4531psrlq $2,%xmm6 4532 4533# qhasm: x4 = v00 | v10 4534# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 4535# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 4536vpor %xmm15,%xmm12,%xmm12 4537 4538# qhasm: x6 = v01 | v11 4539# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 4540# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 4541vpor %xmm8,%xmm6,%xmm6 4542 4543# qhasm: v00 = x5 & mask2 4544# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 4545# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 4546vpand %xmm2,%xmm7,%xmm8 4547 4548# qhasm: v10 = x7 & mask2 4549# asm 1: vpand <mask2=reg128#3,<x7=reg128#10,>v10=reg128#16 4550# asm 2: vpand <mask2=%xmm2,<x7=%xmm9,>v10=%xmm15 4551vpand %xmm2,%xmm9,%xmm15 4552 4553# qhasm: 2x v10 <<= 2 4554# asm 1: psllq $2,<v10=reg128#16 4555# asm 2: psllq $2,<v10=%xmm15 4556psllq $2,%xmm15 4557 4558# qhasm: v01 = x5 & mask3 4559# asm 1: vpand <mask3=reg128#4,<x5=reg128#8,>v01=reg128#8 4560# asm 2: vpand <mask3=%xmm3,<x5=%xmm7,>v01=%xmm7 4561vpand %xmm3,%xmm7,%xmm7 4562 4563# qhasm: v11 = x7 & mask3 4564# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 4565# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 4566vpand %xmm3,%xmm9,%xmm9 4567 4568# qhasm: 2x v01 unsigned>>= 2 4569# asm 1: psrlq $2,<v01=reg128#8 4570# asm 2: psrlq $2,<v01=%xmm7 4571psrlq $2,%xmm7 4572 4573# qhasm: x5 = v00 | v10 4574# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 4575# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 4576vpor %xmm15,%xmm8,%xmm8 4577 4578# qhasm: x7 = v01 | v11 4579# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 4580# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 4581vpor %xmm9,%xmm7,%xmm7 4582 4583# qhasm: v00 = x0 & mask4 4584# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 4585# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 4586vpand %xmm4,%xmm13,%xmm9 4587 4588# qhasm: v10 = x1 & mask4 4589# asm 1: vpand <mask4=reg128#5,<x1=reg128#15,>v10=reg128#16 4590# asm 2: vpand <mask4=%xmm4,<x1=%xmm14,>v10=%xmm15 4591vpand %xmm4,%xmm14,%xmm15 4592 4593# qhasm: 2x v10 <<= 1 4594# asm 1: psllq $1,<v10=reg128#16 4595# asm 2: psllq $1,<v10=%xmm15 4596psllq $1,%xmm15 4597 4598# qhasm: v01 = x0 & mask5 4599# asm 1: vpand <mask5=reg128#6,<x0=reg128#14,>v01=reg128#14 4600# asm 2: vpand <mask5=%xmm5,<x0=%xmm13,>v01=%xmm13 4601vpand %xmm5,%xmm13,%xmm13 4602 4603# qhasm: v11 = x1 & mask5 4604# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 4605# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 4606vpand %xmm5,%xmm14,%xmm14 4607 4608# qhasm: 2x v01 unsigned>>= 1 4609# asm 1: psrlq $1,<v01=reg128#14 4610# asm 2: psrlq $1,<v01=%xmm13 4611psrlq $1,%xmm13 4612 4613# qhasm: x0 = v00 | v10 4614# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 4615# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 4616vpor %xmm15,%xmm9,%xmm9 4617 4618# qhasm: x1 = v01 | v11 4619# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 4620# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 4621vpor %xmm14,%xmm13,%xmm13 4622 4623# qhasm: v00 = x2 & mask4 4624# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 4625# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 4626vpand %xmm4,%xmm11,%xmm14 4627 4628# qhasm: v10 = x3 & mask4 4629# asm 1: vpand <mask4=reg128#5,<x3=reg128#11,>v10=reg128#16 4630# asm 2: vpand <mask4=%xmm4,<x3=%xmm10,>v10=%xmm15 4631vpand %xmm4,%xmm10,%xmm15 4632 4633# qhasm: 2x v10 <<= 1 4634# asm 1: psllq $1,<v10=reg128#16 4635# asm 2: psllq $1,<v10=%xmm15 4636psllq $1,%xmm15 4637 4638# qhasm: v01 = x2 & mask5 4639# asm 1: vpand <mask5=reg128#6,<x2=reg128#12,>v01=reg128#12 4640# asm 2: vpand <mask5=%xmm5,<x2=%xmm11,>v01=%xmm11 4641vpand %xmm5,%xmm11,%xmm11 4642 4643# qhasm: v11 = x3 & mask5 4644# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 4645# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 4646vpand %xmm5,%xmm10,%xmm10 4647 4648# qhasm: 2x v01 unsigned>>= 1 4649# asm 1: psrlq $1,<v01=reg128#12 4650# asm 2: psrlq $1,<v01=%xmm11 4651psrlq $1,%xmm11 4652 4653# qhasm: x2 = v00 | v10 4654# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 4655# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 4656vpor %xmm15,%xmm14,%xmm14 4657 4658# qhasm: x3 = v01 | v11 4659# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 4660# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 4661vpor %xmm10,%xmm11,%xmm10 4662 4663# qhasm: v00 = x4 & mask4 4664# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 4665# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 4666vpand %xmm4,%xmm12,%xmm11 4667 4668# qhasm: v10 = x5 & mask4 4669# asm 1: vpand <mask4=reg128#5,<x5=reg128#9,>v10=reg128#16 4670# asm 2: vpand <mask4=%xmm4,<x5=%xmm8,>v10=%xmm15 4671vpand %xmm4,%xmm8,%xmm15 4672 4673# qhasm: 2x v10 <<= 1 4674# asm 1: psllq $1,<v10=reg128#16 4675# asm 2: psllq $1,<v10=%xmm15 4676psllq $1,%xmm15 4677 4678# qhasm: v01 = x4 & mask5 4679# asm 1: vpand <mask5=reg128#6,<x4=reg128#13,>v01=reg128#13 4680# asm 2: vpand <mask5=%xmm5,<x4=%xmm12,>v01=%xmm12 4681vpand %xmm5,%xmm12,%xmm12 4682 4683# qhasm: v11 = x5 & mask5 4684# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 4685# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 4686vpand %xmm5,%xmm8,%xmm8 4687 4688# qhasm: 2x v01 unsigned>>= 1 4689# asm 1: psrlq $1,<v01=reg128#13 4690# asm 2: psrlq $1,<v01=%xmm12 4691psrlq $1,%xmm12 4692 4693# qhasm: x4 = v00 | v10 4694# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 4695# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 4696vpor %xmm15,%xmm11,%xmm11 4697 4698# qhasm: x5 = v01 | v11 4699# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 4700# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 4701vpor %xmm8,%xmm12,%xmm8 4702 4703# qhasm: v00 = x6 & mask4 4704# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 4705# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 4706vpand %xmm4,%xmm6,%xmm12 4707 4708# qhasm: v10 = x7 & mask4 4709# asm 1: vpand <mask4=reg128#5,<x7=reg128#8,>v10=reg128#16 4710# asm 2: vpand <mask4=%xmm4,<x7=%xmm7,>v10=%xmm15 4711vpand %xmm4,%xmm7,%xmm15 4712 4713# qhasm: 2x v10 <<= 1 4714# asm 1: psllq $1,<v10=reg128#16 4715# asm 2: psllq $1,<v10=%xmm15 4716psllq $1,%xmm15 4717 4718# qhasm: v01 = x6 & mask5 4719# asm 1: vpand <mask5=reg128#6,<x6=reg128#7,>v01=reg128#7 4720# asm 2: vpand <mask5=%xmm5,<x6=%xmm6,>v01=%xmm6 4721vpand %xmm5,%xmm6,%xmm6 4722 4723# qhasm: v11 = x7 & mask5 4724# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 4725# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 4726vpand %xmm5,%xmm7,%xmm7 4727 4728# qhasm: 2x v01 unsigned>>= 1 4729# asm 1: psrlq $1,<v01=reg128#7 4730# asm 2: psrlq $1,<v01=%xmm6 4731psrlq $1,%xmm6 4732 4733# qhasm: x6 = v00 | v10 4734# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 4735# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 4736vpor %xmm15,%xmm12,%xmm12 4737 4738# qhasm: x7 = v01 | v11 4739# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 4740# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 4741vpor %xmm7,%xmm6,%xmm6 4742 4743# qhasm: mem128[ input_0 + 128 ] = x0 4744# asm 1: movdqu <x0=reg128#10,128(<input_0=int64#1) 4745# asm 2: movdqu <x0=%xmm9,128(<input_0=%rdi) 4746movdqu %xmm9,128(%rdi) 4747 4748# qhasm: mem128[ input_0 + 144 ] = x1 4749# asm 1: movdqu <x1=reg128#14,144(<input_0=int64#1) 4750# asm 2: movdqu <x1=%xmm13,144(<input_0=%rdi) 4751movdqu %xmm13,144(%rdi) 4752 4753# qhasm: mem128[ input_0 + 160 ] = x2 4754# asm 1: movdqu <x2=reg128#15,160(<input_0=int64#1) 4755# asm 2: movdqu <x2=%xmm14,160(<input_0=%rdi) 4756movdqu %xmm14,160(%rdi) 4757 4758# qhasm: mem128[ input_0 + 176 ] = x3 4759# asm 1: movdqu <x3=reg128#11,176(<input_0=int64#1) 4760# asm 2: movdqu <x3=%xmm10,176(<input_0=%rdi) 4761movdqu %xmm10,176(%rdi) 4762 4763# qhasm: mem128[ input_0 + 192 ] = x4 4764# asm 1: movdqu <x4=reg128#12,192(<input_0=int64#1) 4765# asm 2: movdqu <x4=%xmm11,192(<input_0=%rdi) 4766movdqu %xmm11,192(%rdi) 4767 4768# qhasm: mem128[ input_0 + 208 ] = x5 4769# asm 1: movdqu <x5=reg128#9,208(<input_0=int64#1) 4770# asm 2: movdqu <x5=%xmm8,208(<input_0=%rdi) 4771movdqu %xmm8,208(%rdi) 4772 4773# qhasm: mem128[ input_0 + 224 ] = x6 4774# asm 1: movdqu <x6=reg128#13,224(<input_0=int64#1) 4775# asm 2: movdqu <x6=%xmm12,224(<input_0=%rdi) 4776movdqu %xmm12,224(%rdi) 4777 4778# qhasm: mem128[ input_0 + 240 ] = x7 4779# asm 1: movdqu <x7=reg128#7,240(<input_0=int64#1) 4780# asm 2: movdqu <x7=%xmm6,240(<input_0=%rdi) 4781movdqu %xmm6,240(%rdi) 4782 4783# qhasm: x0 = mem128[ input_0 + 256 ] 4784# asm 1: movdqu 256(<input_0=int64#1),>x0=reg128#7 4785# asm 2: movdqu 256(<input_0=%rdi),>x0=%xmm6 4786movdqu 256(%rdi),%xmm6 4787 4788# qhasm: x1 = mem128[ input_0 + 272 ] 4789# asm 1: movdqu 272(<input_0=int64#1),>x1=reg128#8 4790# asm 2: movdqu 272(<input_0=%rdi),>x1=%xmm7 4791movdqu 272(%rdi),%xmm7 4792 4793# qhasm: x2 = mem128[ input_0 + 288 ] 4794# asm 1: movdqu 288(<input_0=int64#1),>x2=reg128#9 4795# asm 2: movdqu 288(<input_0=%rdi),>x2=%xmm8 4796movdqu 288(%rdi),%xmm8 4797 4798# qhasm: x3 = mem128[ input_0 + 304 ] 4799# asm 1: movdqu 304(<input_0=int64#1),>x3=reg128#10 4800# asm 2: movdqu 304(<input_0=%rdi),>x3=%xmm9 4801movdqu 304(%rdi),%xmm9 4802 4803# qhasm: x4 = mem128[ input_0 + 320 ] 4804# asm 1: movdqu 320(<input_0=int64#1),>x4=reg128#11 4805# asm 2: movdqu 320(<input_0=%rdi),>x4=%xmm10 4806movdqu 320(%rdi),%xmm10 4807 4808# qhasm: x5 = mem128[ input_0 + 336 ] 4809# asm 1: movdqu 336(<input_0=int64#1),>x5=reg128#12 4810# asm 2: movdqu 336(<input_0=%rdi),>x5=%xmm11 4811movdqu 336(%rdi),%xmm11 4812 4813# qhasm: x6 = mem128[ input_0 + 352 ] 4814# asm 1: movdqu 352(<input_0=int64#1),>x6=reg128#13 4815# asm 2: movdqu 352(<input_0=%rdi),>x6=%xmm12 4816movdqu 352(%rdi),%xmm12 4817 4818# qhasm: x7 = mem128[ input_0 + 368 ] 4819# asm 1: movdqu 368(<input_0=int64#1),>x7=reg128#14 4820# asm 2: movdqu 368(<input_0=%rdi),>x7=%xmm13 4821movdqu 368(%rdi),%xmm13 4822 4823# qhasm: v00 = x0 & mask0 4824# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 4825# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 4826vpand %xmm0,%xmm6,%xmm14 4827 4828# qhasm: v10 = x4 & mask0 4829# asm 1: vpand <mask0=reg128#1,<x4=reg128#11,>v10=reg128#16 4830# asm 2: vpand <mask0=%xmm0,<x4=%xmm10,>v10=%xmm15 4831vpand %xmm0,%xmm10,%xmm15 4832 4833# qhasm: 2x v10 <<= 4 4834# asm 1: psllq $4,<v10=reg128#16 4835# asm 2: psllq $4,<v10=%xmm15 4836psllq $4,%xmm15 4837 4838# qhasm: v01 = x0 & mask1 4839# asm 1: vpand <mask1=reg128#2,<x0=reg128#7,>v01=reg128#7 4840# asm 2: vpand <mask1=%xmm1,<x0=%xmm6,>v01=%xmm6 4841vpand %xmm1,%xmm6,%xmm6 4842 4843# qhasm: v11 = x4 & mask1 4844# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 4845# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 4846vpand %xmm1,%xmm10,%xmm10 4847 4848# qhasm: 2x v01 unsigned>>= 4 4849# asm 1: psrlq $4,<v01=reg128#7 4850# asm 2: psrlq $4,<v01=%xmm6 4851psrlq $4,%xmm6 4852 4853# qhasm: x0 = v00 | v10 4854# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 4855# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 4856vpor %xmm15,%xmm14,%xmm14 4857 4858# qhasm: x4 = v01 | v11 4859# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 4860# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 4861vpor %xmm10,%xmm6,%xmm6 4862 4863# qhasm: v00 = x1 & mask0 4864# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 4865# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 4866vpand %xmm0,%xmm7,%xmm10 4867 4868# qhasm: v10 = x5 & mask0 4869# asm 1: vpand <mask0=reg128#1,<x5=reg128#12,>v10=reg128#16 4870# asm 2: vpand <mask0=%xmm0,<x5=%xmm11,>v10=%xmm15 4871vpand %xmm0,%xmm11,%xmm15 4872 4873# qhasm: 2x v10 <<= 4 4874# asm 1: psllq $4,<v10=reg128#16 4875# asm 2: psllq $4,<v10=%xmm15 4876psllq $4,%xmm15 4877 4878# qhasm: v01 = x1 & mask1 4879# asm 1: vpand <mask1=reg128#2,<x1=reg128#8,>v01=reg128#8 4880# asm 2: vpand <mask1=%xmm1,<x1=%xmm7,>v01=%xmm7 4881vpand %xmm1,%xmm7,%xmm7 4882 4883# qhasm: v11 = x5 & mask1 4884# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 4885# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 4886vpand %xmm1,%xmm11,%xmm11 4887 4888# qhasm: 2x v01 unsigned>>= 4 4889# asm 1: psrlq $4,<v01=reg128#8 4890# asm 2: psrlq $4,<v01=%xmm7 4891psrlq $4,%xmm7 4892 4893# qhasm: x1 = v00 | v10 4894# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 4895# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 4896vpor %xmm15,%xmm10,%xmm10 4897 4898# qhasm: x5 = v01 | v11 4899# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 4900# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 4901vpor %xmm11,%xmm7,%xmm7 4902 4903# qhasm: v00 = x2 & mask0 4904# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 4905# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 4906vpand %xmm0,%xmm8,%xmm11 4907 4908# qhasm: v10 = x6 & mask0 4909# asm 1: vpand <mask0=reg128#1,<x6=reg128#13,>v10=reg128#16 4910# asm 2: vpand <mask0=%xmm0,<x6=%xmm12,>v10=%xmm15 4911vpand %xmm0,%xmm12,%xmm15 4912 4913# qhasm: 2x v10 <<= 4 4914# asm 1: psllq $4,<v10=reg128#16 4915# asm 2: psllq $4,<v10=%xmm15 4916psllq $4,%xmm15 4917 4918# qhasm: v01 = x2 & mask1 4919# asm 1: vpand <mask1=reg128#2,<x2=reg128#9,>v01=reg128#9 4920# asm 2: vpand <mask1=%xmm1,<x2=%xmm8,>v01=%xmm8 4921vpand %xmm1,%xmm8,%xmm8 4922 4923# qhasm: v11 = x6 & mask1 4924# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 4925# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 4926vpand %xmm1,%xmm12,%xmm12 4927 4928# qhasm: 2x v01 unsigned>>= 4 4929# asm 1: psrlq $4,<v01=reg128#9 4930# asm 2: psrlq $4,<v01=%xmm8 4931psrlq $4,%xmm8 4932 4933# qhasm: x2 = v00 | v10 4934# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 4935# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 4936vpor %xmm15,%xmm11,%xmm11 4937 4938# qhasm: x6 = v01 | v11 4939# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 4940# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 4941vpor %xmm12,%xmm8,%xmm8 4942 4943# qhasm: v00 = x3 & mask0 4944# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 4945# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 4946vpand %xmm0,%xmm9,%xmm12 4947 4948# qhasm: v10 = x7 & mask0 4949# asm 1: vpand <mask0=reg128#1,<x7=reg128#14,>v10=reg128#16 4950# asm 2: vpand <mask0=%xmm0,<x7=%xmm13,>v10=%xmm15 4951vpand %xmm0,%xmm13,%xmm15 4952 4953# qhasm: 2x v10 <<= 4 4954# asm 1: psllq $4,<v10=reg128#16 4955# asm 2: psllq $4,<v10=%xmm15 4956psllq $4,%xmm15 4957 4958# qhasm: v01 = x3 & mask1 4959# asm 1: vpand <mask1=reg128#2,<x3=reg128#10,>v01=reg128#10 4960# asm 2: vpand <mask1=%xmm1,<x3=%xmm9,>v01=%xmm9 4961vpand %xmm1,%xmm9,%xmm9 4962 4963# qhasm: v11 = x7 & mask1 4964# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 4965# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 4966vpand %xmm1,%xmm13,%xmm13 4967 4968# qhasm: 2x v01 unsigned>>= 4 4969# asm 1: psrlq $4,<v01=reg128#10 4970# asm 2: psrlq $4,<v01=%xmm9 4971psrlq $4,%xmm9 4972 4973# qhasm: x3 = v00 | v10 4974# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 4975# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 4976vpor %xmm15,%xmm12,%xmm12 4977 4978# qhasm: x7 = v01 | v11 4979# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 4980# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 4981vpor %xmm13,%xmm9,%xmm9 4982 4983# qhasm: v00 = x0 & mask2 4984# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 4985# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 4986vpand %xmm2,%xmm14,%xmm13 4987 4988# qhasm: v10 = x2 & mask2 4989# asm 1: vpand <mask2=reg128#3,<x2=reg128#12,>v10=reg128#16 4990# asm 2: vpand <mask2=%xmm2,<x2=%xmm11,>v10=%xmm15 4991vpand %xmm2,%xmm11,%xmm15 4992 4993# qhasm: 2x v10 <<= 2 4994# asm 1: psllq $2,<v10=reg128#16 4995# asm 2: psllq $2,<v10=%xmm15 4996psllq $2,%xmm15 4997 4998# qhasm: v01 = x0 & mask3 4999# asm 1: vpand <mask3=reg128#4,<x0=reg128#15,>v01=reg128#15 5000# asm 2: vpand <mask3=%xmm3,<x0=%xmm14,>v01=%xmm14 5001vpand %xmm3,%xmm14,%xmm14 5002 5003# qhasm: v11 = x2 & mask3 5004# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 5005# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 5006vpand %xmm3,%xmm11,%xmm11 5007 5008# qhasm: 2x v01 unsigned>>= 2 5009# asm 1: psrlq $2,<v01=reg128#15 5010# asm 2: psrlq $2,<v01=%xmm14 5011psrlq $2,%xmm14 5012 5013# qhasm: x0 = v00 | v10 5014# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 5015# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 5016vpor %xmm15,%xmm13,%xmm13 5017 5018# qhasm: x2 = v01 | v11 5019# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 5020# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 5021vpor %xmm11,%xmm14,%xmm11 5022 5023# qhasm: v00 = x1 & mask2 5024# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 5025# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 5026vpand %xmm2,%xmm10,%xmm14 5027 5028# qhasm: v10 = x3 & mask2 5029# asm 1: vpand <mask2=reg128#3,<x3=reg128#13,>v10=reg128#16 5030# asm 2: vpand <mask2=%xmm2,<x3=%xmm12,>v10=%xmm15 5031vpand %xmm2,%xmm12,%xmm15 5032 5033# qhasm: 2x v10 <<= 2 5034# asm 1: psllq $2,<v10=reg128#16 5035# asm 2: psllq $2,<v10=%xmm15 5036psllq $2,%xmm15 5037 5038# qhasm: v01 = x1 & mask3 5039# asm 1: vpand <mask3=reg128#4,<x1=reg128#11,>v01=reg128#11 5040# asm 2: vpand <mask3=%xmm3,<x1=%xmm10,>v01=%xmm10 5041vpand %xmm3,%xmm10,%xmm10 5042 5043# qhasm: v11 = x3 & mask3 5044# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 5045# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 5046vpand %xmm3,%xmm12,%xmm12 5047 5048# qhasm: 2x v01 unsigned>>= 2 5049# asm 1: psrlq $2,<v01=reg128#11 5050# asm 2: psrlq $2,<v01=%xmm10 5051psrlq $2,%xmm10 5052 5053# qhasm: x1 = v00 | v10 5054# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 5055# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 5056vpor %xmm15,%xmm14,%xmm14 5057 5058# qhasm: x3 = v01 | v11 5059# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 5060# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 5061vpor %xmm12,%xmm10,%xmm10 5062 5063# qhasm: v00 = x4 & mask2 5064# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 5065# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 5066vpand %xmm2,%xmm6,%xmm12 5067 5068# qhasm: v10 = x6 & mask2 5069# asm 1: vpand <mask2=reg128#3,<x6=reg128#9,>v10=reg128#16 5070# asm 2: vpand <mask2=%xmm2,<x6=%xmm8,>v10=%xmm15 5071vpand %xmm2,%xmm8,%xmm15 5072 5073# qhasm: 2x v10 <<= 2 5074# asm 1: psllq $2,<v10=reg128#16 5075# asm 2: psllq $2,<v10=%xmm15 5076psllq $2,%xmm15 5077 5078# qhasm: v01 = x4 & mask3 5079# asm 1: vpand <mask3=reg128#4,<x4=reg128#7,>v01=reg128#7 5080# asm 2: vpand <mask3=%xmm3,<x4=%xmm6,>v01=%xmm6 5081vpand %xmm3,%xmm6,%xmm6 5082 5083# qhasm: v11 = x6 & mask3 5084# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 5085# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 5086vpand %xmm3,%xmm8,%xmm8 5087 5088# qhasm: 2x v01 unsigned>>= 2 5089# asm 1: psrlq $2,<v01=reg128#7 5090# asm 2: psrlq $2,<v01=%xmm6 5091psrlq $2,%xmm6 5092 5093# qhasm: x4 = v00 | v10 5094# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 5095# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 5096vpor %xmm15,%xmm12,%xmm12 5097 5098# qhasm: x6 = v01 | v11 5099# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 5100# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 5101vpor %xmm8,%xmm6,%xmm6 5102 5103# qhasm: v00 = x5 & mask2 5104# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 5105# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 5106vpand %xmm2,%xmm7,%xmm8 5107 5108# qhasm: v10 = x7 & mask2 5109# asm 1: vpand <mask2=reg128#3,<x7=reg128#10,>v10=reg128#16 5110# asm 2: vpand <mask2=%xmm2,<x7=%xmm9,>v10=%xmm15 5111vpand %xmm2,%xmm9,%xmm15 5112 5113# qhasm: 2x v10 <<= 2 5114# asm 1: psllq $2,<v10=reg128#16 5115# asm 2: psllq $2,<v10=%xmm15 5116psllq $2,%xmm15 5117 5118# qhasm: v01 = x5 & mask3 5119# asm 1: vpand <mask3=reg128#4,<x5=reg128#8,>v01=reg128#8 5120# asm 2: vpand <mask3=%xmm3,<x5=%xmm7,>v01=%xmm7 5121vpand %xmm3,%xmm7,%xmm7 5122 5123# qhasm: v11 = x7 & mask3 5124# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 5125# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 5126vpand %xmm3,%xmm9,%xmm9 5127 5128# qhasm: 2x v01 unsigned>>= 2 5129# asm 1: psrlq $2,<v01=reg128#8 5130# asm 2: psrlq $2,<v01=%xmm7 5131psrlq $2,%xmm7 5132 5133# qhasm: x5 = v00 | v10 5134# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 5135# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 5136vpor %xmm15,%xmm8,%xmm8 5137 5138# qhasm: x7 = v01 | v11 5139# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 5140# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 5141vpor %xmm9,%xmm7,%xmm7 5142 5143# qhasm: v00 = x0 & mask4 5144# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 5145# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 5146vpand %xmm4,%xmm13,%xmm9 5147 5148# qhasm: v10 = x1 & mask4 5149# asm 1: vpand <mask4=reg128#5,<x1=reg128#15,>v10=reg128#16 5150# asm 2: vpand <mask4=%xmm4,<x1=%xmm14,>v10=%xmm15 5151vpand %xmm4,%xmm14,%xmm15 5152 5153# qhasm: 2x v10 <<= 1 5154# asm 1: psllq $1,<v10=reg128#16 5155# asm 2: psllq $1,<v10=%xmm15 5156psllq $1,%xmm15 5157 5158# qhasm: v01 = x0 & mask5 5159# asm 1: vpand <mask5=reg128#6,<x0=reg128#14,>v01=reg128#14 5160# asm 2: vpand <mask5=%xmm5,<x0=%xmm13,>v01=%xmm13 5161vpand %xmm5,%xmm13,%xmm13 5162 5163# qhasm: v11 = x1 & mask5 5164# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 5165# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 5166vpand %xmm5,%xmm14,%xmm14 5167 5168# qhasm: 2x v01 unsigned>>= 1 5169# asm 1: psrlq $1,<v01=reg128#14 5170# asm 2: psrlq $1,<v01=%xmm13 5171psrlq $1,%xmm13 5172 5173# qhasm: x0 = v00 | v10 5174# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 5175# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 5176vpor %xmm15,%xmm9,%xmm9 5177 5178# qhasm: x1 = v01 | v11 5179# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 5180# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 5181vpor %xmm14,%xmm13,%xmm13 5182 5183# qhasm: v00 = x2 & mask4 5184# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 5185# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 5186vpand %xmm4,%xmm11,%xmm14 5187 5188# qhasm: v10 = x3 & mask4 5189# asm 1: vpand <mask4=reg128#5,<x3=reg128#11,>v10=reg128#16 5190# asm 2: vpand <mask4=%xmm4,<x3=%xmm10,>v10=%xmm15 5191vpand %xmm4,%xmm10,%xmm15 5192 5193# qhasm: 2x v10 <<= 1 5194# asm 1: psllq $1,<v10=reg128#16 5195# asm 2: psllq $1,<v10=%xmm15 5196psllq $1,%xmm15 5197 5198# qhasm: v01 = x2 & mask5 5199# asm 1: vpand <mask5=reg128#6,<x2=reg128#12,>v01=reg128#12 5200# asm 2: vpand <mask5=%xmm5,<x2=%xmm11,>v01=%xmm11 5201vpand %xmm5,%xmm11,%xmm11 5202 5203# qhasm: v11 = x3 & mask5 5204# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 5205# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 5206vpand %xmm5,%xmm10,%xmm10 5207 5208# qhasm: 2x v01 unsigned>>= 1 5209# asm 1: psrlq $1,<v01=reg128#12 5210# asm 2: psrlq $1,<v01=%xmm11 5211psrlq $1,%xmm11 5212 5213# qhasm: x2 = v00 | v10 5214# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 5215# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 5216vpor %xmm15,%xmm14,%xmm14 5217 5218# qhasm: x3 = v01 | v11 5219# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 5220# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 5221vpor %xmm10,%xmm11,%xmm10 5222 5223# qhasm: v00 = x4 & mask4 5224# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 5225# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 5226vpand %xmm4,%xmm12,%xmm11 5227 5228# qhasm: v10 = x5 & mask4 5229# asm 1: vpand <mask4=reg128#5,<x5=reg128#9,>v10=reg128#16 5230# asm 2: vpand <mask4=%xmm4,<x5=%xmm8,>v10=%xmm15 5231vpand %xmm4,%xmm8,%xmm15 5232 5233# qhasm: 2x v10 <<= 1 5234# asm 1: psllq $1,<v10=reg128#16 5235# asm 2: psllq $1,<v10=%xmm15 5236psllq $1,%xmm15 5237 5238# qhasm: v01 = x4 & mask5 5239# asm 1: vpand <mask5=reg128#6,<x4=reg128#13,>v01=reg128#13 5240# asm 2: vpand <mask5=%xmm5,<x4=%xmm12,>v01=%xmm12 5241vpand %xmm5,%xmm12,%xmm12 5242 5243# qhasm: v11 = x5 & mask5 5244# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 5245# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 5246vpand %xmm5,%xmm8,%xmm8 5247 5248# qhasm: 2x v01 unsigned>>= 1 5249# asm 1: psrlq $1,<v01=reg128#13 5250# asm 2: psrlq $1,<v01=%xmm12 5251psrlq $1,%xmm12 5252 5253# qhasm: x4 = v00 | v10 5254# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 5255# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 5256vpor %xmm15,%xmm11,%xmm11 5257 5258# qhasm: x5 = v01 | v11 5259# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 5260# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 5261vpor %xmm8,%xmm12,%xmm8 5262 5263# qhasm: v00 = x6 & mask4 5264# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 5265# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 5266vpand %xmm4,%xmm6,%xmm12 5267 5268# qhasm: v10 = x7 & mask4 5269# asm 1: vpand <mask4=reg128#5,<x7=reg128#8,>v10=reg128#16 5270# asm 2: vpand <mask4=%xmm4,<x7=%xmm7,>v10=%xmm15 5271vpand %xmm4,%xmm7,%xmm15 5272 5273# qhasm: 2x v10 <<= 1 5274# asm 1: psllq $1,<v10=reg128#16 5275# asm 2: psllq $1,<v10=%xmm15 5276psllq $1,%xmm15 5277 5278# qhasm: v01 = x6 & mask5 5279# asm 1: vpand <mask5=reg128#6,<x6=reg128#7,>v01=reg128#7 5280# asm 2: vpand <mask5=%xmm5,<x6=%xmm6,>v01=%xmm6 5281vpand %xmm5,%xmm6,%xmm6 5282 5283# qhasm: v11 = x7 & mask5 5284# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 5285# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 5286vpand %xmm5,%xmm7,%xmm7 5287 5288# qhasm: 2x v01 unsigned>>= 1 5289# asm 1: psrlq $1,<v01=reg128#7 5290# asm 2: psrlq $1,<v01=%xmm6 5291psrlq $1,%xmm6 5292 5293# qhasm: x6 = v00 | v10 5294# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 5295# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 5296vpor %xmm15,%xmm12,%xmm12 5297 5298# qhasm: x7 = v01 | v11 5299# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 5300# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 5301vpor %xmm7,%xmm6,%xmm6 5302 5303# qhasm: mem128[ input_0 + 256 ] = x0 5304# asm 1: movdqu <x0=reg128#10,256(<input_0=int64#1) 5305# asm 2: movdqu <x0=%xmm9,256(<input_0=%rdi) 5306movdqu %xmm9,256(%rdi) 5307 5308# qhasm: mem128[ input_0 + 272 ] = x1 5309# asm 1: movdqu <x1=reg128#14,272(<input_0=int64#1) 5310# asm 2: movdqu <x1=%xmm13,272(<input_0=%rdi) 5311movdqu %xmm13,272(%rdi) 5312 5313# qhasm: mem128[ input_0 + 288 ] = x2 5314# asm 1: movdqu <x2=reg128#15,288(<input_0=int64#1) 5315# asm 2: movdqu <x2=%xmm14,288(<input_0=%rdi) 5316movdqu %xmm14,288(%rdi) 5317 5318# qhasm: mem128[ input_0 + 304 ] = x3 5319# asm 1: movdqu <x3=reg128#11,304(<input_0=int64#1) 5320# asm 2: movdqu <x3=%xmm10,304(<input_0=%rdi) 5321movdqu %xmm10,304(%rdi) 5322 5323# qhasm: mem128[ input_0 + 320 ] = x4 5324# asm 1: movdqu <x4=reg128#12,320(<input_0=int64#1) 5325# asm 2: movdqu <x4=%xmm11,320(<input_0=%rdi) 5326movdqu %xmm11,320(%rdi) 5327 5328# qhasm: mem128[ input_0 + 336 ] = x5 5329# asm 1: movdqu <x5=reg128#9,336(<input_0=int64#1) 5330# asm 2: movdqu <x5=%xmm8,336(<input_0=%rdi) 5331movdqu %xmm8,336(%rdi) 5332 5333# qhasm: mem128[ input_0 + 352 ] = x6 5334# asm 1: movdqu <x6=reg128#13,352(<input_0=int64#1) 5335# asm 2: movdqu <x6=%xmm12,352(<input_0=%rdi) 5336movdqu %xmm12,352(%rdi) 5337 5338# qhasm: mem128[ input_0 + 368 ] = x7 5339# asm 1: movdqu <x7=reg128#7,368(<input_0=int64#1) 5340# asm 2: movdqu <x7=%xmm6,368(<input_0=%rdi) 5341movdqu %xmm6,368(%rdi) 5342 5343# qhasm: x0 = mem128[ input_0 + 384 ] 5344# asm 1: movdqu 384(<input_0=int64#1),>x0=reg128#7 5345# asm 2: movdqu 384(<input_0=%rdi),>x0=%xmm6 5346movdqu 384(%rdi),%xmm6 5347 5348# qhasm: x1 = mem128[ input_0 + 400 ] 5349# asm 1: movdqu 400(<input_0=int64#1),>x1=reg128#8 5350# asm 2: movdqu 400(<input_0=%rdi),>x1=%xmm7 5351movdqu 400(%rdi),%xmm7 5352 5353# qhasm: x2 = mem128[ input_0 + 416 ] 5354# asm 1: movdqu 416(<input_0=int64#1),>x2=reg128#9 5355# asm 2: movdqu 416(<input_0=%rdi),>x2=%xmm8 5356movdqu 416(%rdi),%xmm8 5357 5358# qhasm: x3 = mem128[ input_0 + 432 ] 5359# asm 1: movdqu 432(<input_0=int64#1),>x3=reg128#10 5360# asm 2: movdqu 432(<input_0=%rdi),>x3=%xmm9 5361movdqu 432(%rdi),%xmm9 5362 5363# qhasm: x4 = mem128[ input_0 + 448 ] 5364# asm 1: movdqu 448(<input_0=int64#1),>x4=reg128#11 5365# asm 2: movdqu 448(<input_0=%rdi),>x4=%xmm10 5366movdqu 448(%rdi),%xmm10 5367 5368# qhasm: x5 = mem128[ input_0 + 464 ] 5369# asm 1: movdqu 464(<input_0=int64#1),>x5=reg128#12 5370# asm 2: movdqu 464(<input_0=%rdi),>x5=%xmm11 5371movdqu 464(%rdi),%xmm11 5372 5373# qhasm: x6 = mem128[ input_0 + 480 ] 5374# asm 1: movdqu 480(<input_0=int64#1),>x6=reg128#13 5375# asm 2: movdqu 480(<input_0=%rdi),>x6=%xmm12 5376movdqu 480(%rdi),%xmm12 5377 5378# qhasm: x7 = mem128[ input_0 + 496 ] 5379# asm 1: movdqu 496(<input_0=int64#1),>x7=reg128#14 5380# asm 2: movdqu 496(<input_0=%rdi),>x7=%xmm13 5381movdqu 496(%rdi),%xmm13 5382 5383# qhasm: v00 = x0 & mask0 5384# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 5385# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 5386vpand %xmm0,%xmm6,%xmm14 5387 5388# qhasm: v10 = x4 & mask0 5389# asm 1: vpand <mask0=reg128#1,<x4=reg128#11,>v10=reg128#16 5390# asm 2: vpand <mask0=%xmm0,<x4=%xmm10,>v10=%xmm15 5391vpand %xmm0,%xmm10,%xmm15 5392 5393# qhasm: 2x v10 <<= 4 5394# asm 1: psllq $4,<v10=reg128#16 5395# asm 2: psllq $4,<v10=%xmm15 5396psllq $4,%xmm15 5397 5398# qhasm: v01 = x0 & mask1 5399# asm 1: vpand <mask1=reg128#2,<x0=reg128#7,>v01=reg128#7 5400# asm 2: vpand <mask1=%xmm1,<x0=%xmm6,>v01=%xmm6 5401vpand %xmm1,%xmm6,%xmm6 5402 5403# qhasm: v11 = x4 & mask1 5404# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 5405# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 5406vpand %xmm1,%xmm10,%xmm10 5407 5408# qhasm: 2x v01 unsigned>>= 4 5409# asm 1: psrlq $4,<v01=reg128#7 5410# asm 2: psrlq $4,<v01=%xmm6 5411psrlq $4,%xmm6 5412 5413# qhasm: x0 = v00 | v10 5414# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 5415# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 5416vpor %xmm15,%xmm14,%xmm14 5417 5418# qhasm: x4 = v01 | v11 5419# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 5420# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 5421vpor %xmm10,%xmm6,%xmm6 5422 5423# qhasm: v00 = x1 & mask0 5424# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 5425# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 5426vpand %xmm0,%xmm7,%xmm10 5427 5428# qhasm: v10 = x5 & mask0 5429# asm 1: vpand <mask0=reg128#1,<x5=reg128#12,>v10=reg128#16 5430# asm 2: vpand <mask0=%xmm0,<x5=%xmm11,>v10=%xmm15 5431vpand %xmm0,%xmm11,%xmm15 5432 5433# qhasm: 2x v10 <<= 4 5434# asm 1: psllq $4,<v10=reg128#16 5435# asm 2: psllq $4,<v10=%xmm15 5436psllq $4,%xmm15 5437 5438# qhasm: v01 = x1 & mask1 5439# asm 1: vpand <mask1=reg128#2,<x1=reg128#8,>v01=reg128#8 5440# asm 2: vpand <mask1=%xmm1,<x1=%xmm7,>v01=%xmm7 5441vpand %xmm1,%xmm7,%xmm7 5442 5443# qhasm: v11 = x5 & mask1 5444# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 5445# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 5446vpand %xmm1,%xmm11,%xmm11 5447 5448# qhasm: 2x v01 unsigned>>= 4 5449# asm 1: psrlq $4,<v01=reg128#8 5450# asm 2: psrlq $4,<v01=%xmm7 5451psrlq $4,%xmm7 5452 5453# qhasm: x1 = v00 | v10 5454# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 5455# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 5456vpor %xmm15,%xmm10,%xmm10 5457 5458# qhasm: x5 = v01 | v11 5459# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 5460# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 5461vpor %xmm11,%xmm7,%xmm7 5462 5463# qhasm: v00 = x2 & mask0 5464# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 5465# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 5466vpand %xmm0,%xmm8,%xmm11 5467 5468# qhasm: v10 = x6 & mask0 5469# asm 1: vpand <mask0=reg128#1,<x6=reg128#13,>v10=reg128#16 5470# asm 2: vpand <mask0=%xmm0,<x6=%xmm12,>v10=%xmm15 5471vpand %xmm0,%xmm12,%xmm15 5472 5473# qhasm: 2x v10 <<= 4 5474# asm 1: psllq $4,<v10=reg128#16 5475# asm 2: psllq $4,<v10=%xmm15 5476psllq $4,%xmm15 5477 5478# qhasm: v01 = x2 & mask1 5479# asm 1: vpand <mask1=reg128#2,<x2=reg128#9,>v01=reg128#9 5480# asm 2: vpand <mask1=%xmm1,<x2=%xmm8,>v01=%xmm8 5481vpand %xmm1,%xmm8,%xmm8 5482 5483# qhasm: v11 = x6 & mask1 5484# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 5485# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 5486vpand %xmm1,%xmm12,%xmm12 5487 5488# qhasm: 2x v01 unsigned>>= 4 5489# asm 1: psrlq $4,<v01=reg128#9 5490# asm 2: psrlq $4,<v01=%xmm8 5491psrlq $4,%xmm8 5492 5493# qhasm: x2 = v00 | v10 5494# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 5495# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 5496vpor %xmm15,%xmm11,%xmm11 5497 5498# qhasm: x6 = v01 | v11 5499# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 5500# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 5501vpor %xmm12,%xmm8,%xmm8 5502 5503# qhasm: v00 = x3 & mask0 5504# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 5505# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 5506vpand %xmm0,%xmm9,%xmm12 5507 5508# qhasm: v10 = x7 & mask0 5509# asm 1: vpand <mask0=reg128#1,<x7=reg128#14,>v10=reg128#16 5510# asm 2: vpand <mask0=%xmm0,<x7=%xmm13,>v10=%xmm15 5511vpand %xmm0,%xmm13,%xmm15 5512 5513# qhasm: 2x v10 <<= 4 5514# asm 1: psllq $4,<v10=reg128#16 5515# asm 2: psllq $4,<v10=%xmm15 5516psllq $4,%xmm15 5517 5518# qhasm: v01 = x3 & mask1 5519# asm 1: vpand <mask1=reg128#2,<x3=reg128#10,>v01=reg128#10 5520# asm 2: vpand <mask1=%xmm1,<x3=%xmm9,>v01=%xmm9 5521vpand %xmm1,%xmm9,%xmm9 5522 5523# qhasm: v11 = x7 & mask1 5524# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 5525# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 5526vpand %xmm1,%xmm13,%xmm13 5527 5528# qhasm: 2x v01 unsigned>>= 4 5529# asm 1: psrlq $4,<v01=reg128#10 5530# asm 2: psrlq $4,<v01=%xmm9 5531psrlq $4,%xmm9 5532 5533# qhasm: x3 = v00 | v10 5534# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 5535# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 5536vpor %xmm15,%xmm12,%xmm12 5537 5538# qhasm: x7 = v01 | v11 5539# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 5540# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 5541vpor %xmm13,%xmm9,%xmm9 5542 5543# qhasm: v00 = x0 & mask2 5544# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 5545# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 5546vpand %xmm2,%xmm14,%xmm13 5547 5548# qhasm: v10 = x2 & mask2 5549# asm 1: vpand <mask2=reg128#3,<x2=reg128#12,>v10=reg128#16 5550# asm 2: vpand <mask2=%xmm2,<x2=%xmm11,>v10=%xmm15 5551vpand %xmm2,%xmm11,%xmm15 5552 5553# qhasm: 2x v10 <<= 2 5554# asm 1: psllq $2,<v10=reg128#16 5555# asm 2: psllq $2,<v10=%xmm15 5556psllq $2,%xmm15 5557 5558# qhasm: v01 = x0 & mask3 5559# asm 1: vpand <mask3=reg128#4,<x0=reg128#15,>v01=reg128#15 5560# asm 2: vpand <mask3=%xmm3,<x0=%xmm14,>v01=%xmm14 5561vpand %xmm3,%xmm14,%xmm14 5562 5563# qhasm: v11 = x2 & mask3 5564# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 5565# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 5566vpand %xmm3,%xmm11,%xmm11 5567 5568# qhasm: 2x v01 unsigned>>= 2 5569# asm 1: psrlq $2,<v01=reg128#15 5570# asm 2: psrlq $2,<v01=%xmm14 5571psrlq $2,%xmm14 5572 5573# qhasm: x0 = v00 | v10 5574# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 5575# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 5576vpor %xmm15,%xmm13,%xmm13 5577 5578# qhasm: x2 = v01 | v11 5579# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 5580# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 5581vpor %xmm11,%xmm14,%xmm11 5582 5583# qhasm: v00 = x1 & mask2 5584# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 5585# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 5586vpand %xmm2,%xmm10,%xmm14 5587 5588# qhasm: v10 = x3 & mask2 5589# asm 1: vpand <mask2=reg128#3,<x3=reg128#13,>v10=reg128#16 5590# asm 2: vpand <mask2=%xmm2,<x3=%xmm12,>v10=%xmm15 5591vpand %xmm2,%xmm12,%xmm15 5592 5593# qhasm: 2x v10 <<= 2 5594# asm 1: psllq $2,<v10=reg128#16 5595# asm 2: psllq $2,<v10=%xmm15 5596psllq $2,%xmm15 5597 5598# qhasm: v01 = x1 & mask3 5599# asm 1: vpand <mask3=reg128#4,<x1=reg128#11,>v01=reg128#11 5600# asm 2: vpand <mask3=%xmm3,<x1=%xmm10,>v01=%xmm10 5601vpand %xmm3,%xmm10,%xmm10 5602 5603# qhasm: v11 = x3 & mask3 5604# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 5605# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 5606vpand %xmm3,%xmm12,%xmm12 5607 5608# qhasm: 2x v01 unsigned>>= 2 5609# asm 1: psrlq $2,<v01=reg128#11 5610# asm 2: psrlq $2,<v01=%xmm10 5611psrlq $2,%xmm10 5612 5613# qhasm: x1 = v00 | v10 5614# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 5615# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 5616vpor %xmm15,%xmm14,%xmm14 5617 5618# qhasm: x3 = v01 | v11 5619# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 5620# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 5621vpor %xmm12,%xmm10,%xmm10 5622 5623# qhasm: v00 = x4 & mask2 5624# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 5625# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 5626vpand %xmm2,%xmm6,%xmm12 5627 5628# qhasm: v10 = x6 & mask2 5629# asm 1: vpand <mask2=reg128#3,<x6=reg128#9,>v10=reg128#16 5630# asm 2: vpand <mask2=%xmm2,<x6=%xmm8,>v10=%xmm15 5631vpand %xmm2,%xmm8,%xmm15 5632 5633# qhasm: 2x v10 <<= 2 5634# asm 1: psllq $2,<v10=reg128#16 5635# asm 2: psllq $2,<v10=%xmm15 5636psllq $2,%xmm15 5637 5638# qhasm: v01 = x4 & mask3 5639# asm 1: vpand <mask3=reg128#4,<x4=reg128#7,>v01=reg128#7 5640# asm 2: vpand <mask3=%xmm3,<x4=%xmm6,>v01=%xmm6 5641vpand %xmm3,%xmm6,%xmm6 5642 5643# qhasm: v11 = x6 & mask3 5644# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 5645# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 5646vpand %xmm3,%xmm8,%xmm8 5647 5648# qhasm: 2x v01 unsigned>>= 2 5649# asm 1: psrlq $2,<v01=reg128#7 5650# asm 2: psrlq $2,<v01=%xmm6 5651psrlq $2,%xmm6 5652 5653# qhasm: x4 = v00 | v10 5654# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 5655# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 5656vpor %xmm15,%xmm12,%xmm12 5657 5658# qhasm: x6 = v01 | v11 5659# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 5660# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 5661vpor %xmm8,%xmm6,%xmm6 5662 5663# qhasm: v00 = x5 & mask2 5664# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 5665# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 5666vpand %xmm2,%xmm7,%xmm8 5667 5668# qhasm: v10 = x7 & mask2 5669# asm 1: vpand <mask2=reg128#3,<x7=reg128#10,>v10=reg128#16 5670# asm 2: vpand <mask2=%xmm2,<x7=%xmm9,>v10=%xmm15 5671vpand %xmm2,%xmm9,%xmm15 5672 5673# qhasm: 2x v10 <<= 2 5674# asm 1: psllq $2,<v10=reg128#16 5675# asm 2: psllq $2,<v10=%xmm15 5676psllq $2,%xmm15 5677 5678# qhasm: v01 = x5 & mask3 5679# asm 1: vpand <mask3=reg128#4,<x5=reg128#8,>v01=reg128#8 5680# asm 2: vpand <mask3=%xmm3,<x5=%xmm7,>v01=%xmm7 5681vpand %xmm3,%xmm7,%xmm7 5682 5683# qhasm: v11 = x7 & mask3 5684# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 5685# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 5686vpand %xmm3,%xmm9,%xmm9 5687 5688# qhasm: 2x v01 unsigned>>= 2 5689# asm 1: psrlq $2,<v01=reg128#8 5690# asm 2: psrlq $2,<v01=%xmm7 5691psrlq $2,%xmm7 5692 5693# qhasm: x5 = v00 | v10 5694# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 5695# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 5696vpor %xmm15,%xmm8,%xmm8 5697 5698# qhasm: x7 = v01 | v11 5699# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 5700# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 5701vpor %xmm9,%xmm7,%xmm7 5702 5703# qhasm: v00 = x0 & mask4 5704# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 5705# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 5706vpand %xmm4,%xmm13,%xmm9 5707 5708# qhasm: v10 = x1 & mask4 5709# asm 1: vpand <mask4=reg128#5,<x1=reg128#15,>v10=reg128#16 5710# asm 2: vpand <mask4=%xmm4,<x1=%xmm14,>v10=%xmm15 5711vpand %xmm4,%xmm14,%xmm15 5712 5713# qhasm: 2x v10 <<= 1 5714# asm 1: psllq $1,<v10=reg128#16 5715# asm 2: psllq $1,<v10=%xmm15 5716psllq $1,%xmm15 5717 5718# qhasm: v01 = x0 & mask5 5719# asm 1: vpand <mask5=reg128#6,<x0=reg128#14,>v01=reg128#14 5720# asm 2: vpand <mask5=%xmm5,<x0=%xmm13,>v01=%xmm13 5721vpand %xmm5,%xmm13,%xmm13 5722 5723# qhasm: v11 = x1 & mask5 5724# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 5725# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 5726vpand %xmm5,%xmm14,%xmm14 5727 5728# qhasm: 2x v01 unsigned>>= 1 5729# asm 1: psrlq $1,<v01=reg128#14 5730# asm 2: psrlq $1,<v01=%xmm13 5731psrlq $1,%xmm13 5732 5733# qhasm: x0 = v00 | v10 5734# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 5735# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 5736vpor %xmm15,%xmm9,%xmm9 5737 5738# qhasm: x1 = v01 | v11 5739# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 5740# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 5741vpor %xmm14,%xmm13,%xmm13 5742 5743# qhasm: v00 = x2 & mask4 5744# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 5745# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 5746vpand %xmm4,%xmm11,%xmm14 5747 5748# qhasm: v10 = x3 & mask4 5749# asm 1: vpand <mask4=reg128#5,<x3=reg128#11,>v10=reg128#16 5750# asm 2: vpand <mask4=%xmm4,<x3=%xmm10,>v10=%xmm15 5751vpand %xmm4,%xmm10,%xmm15 5752 5753# qhasm: 2x v10 <<= 1 5754# asm 1: psllq $1,<v10=reg128#16 5755# asm 2: psllq $1,<v10=%xmm15 5756psllq $1,%xmm15 5757 5758# qhasm: v01 = x2 & mask5 5759# asm 1: vpand <mask5=reg128#6,<x2=reg128#12,>v01=reg128#12 5760# asm 2: vpand <mask5=%xmm5,<x2=%xmm11,>v01=%xmm11 5761vpand %xmm5,%xmm11,%xmm11 5762 5763# qhasm: v11 = x3 & mask5 5764# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 5765# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 5766vpand %xmm5,%xmm10,%xmm10 5767 5768# qhasm: 2x v01 unsigned>>= 1 5769# asm 1: psrlq $1,<v01=reg128#12 5770# asm 2: psrlq $1,<v01=%xmm11 5771psrlq $1,%xmm11 5772 5773# qhasm: x2 = v00 | v10 5774# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 5775# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 5776vpor %xmm15,%xmm14,%xmm14 5777 5778# qhasm: x3 = v01 | v11 5779# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 5780# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 5781vpor %xmm10,%xmm11,%xmm10 5782 5783# qhasm: v00 = x4 & mask4 5784# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 5785# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 5786vpand %xmm4,%xmm12,%xmm11 5787 5788# qhasm: v10 = x5 & mask4 5789# asm 1: vpand <mask4=reg128#5,<x5=reg128#9,>v10=reg128#16 5790# asm 2: vpand <mask4=%xmm4,<x5=%xmm8,>v10=%xmm15 5791vpand %xmm4,%xmm8,%xmm15 5792 5793# qhasm: 2x v10 <<= 1 5794# asm 1: psllq $1,<v10=reg128#16 5795# asm 2: psllq $1,<v10=%xmm15 5796psllq $1,%xmm15 5797 5798# qhasm: v01 = x4 & mask5 5799# asm 1: vpand <mask5=reg128#6,<x4=reg128#13,>v01=reg128#13 5800# asm 2: vpand <mask5=%xmm5,<x4=%xmm12,>v01=%xmm12 5801vpand %xmm5,%xmm12,%xmm12 5802 5803# qhasm: v11 = x5 & mask5 5804# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 5805# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 5806vpand %xmm5,%xmm8,%xmm8 5807 5808# qhasm: 2x v01 unsigned>>= 1 5809# asm 1: psrlq $1,<v01=reg128#13 5810# asm 2: psrlq $1,<v01=%xmm12 5811psrlq $1,%xmm12 5812 5813# qhasm: x4 = v00 | v10 5814# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 5815# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 5816vpor %xmm15,%xmm11,%xmm11 5817 5818# qhasm: x5 = v01 | v11 5819# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 5820# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 5821vpor %xmm8,%xmm12,%xmm8 5822 5823# qhasm: v00 = x6 & mask4 5824# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 5825# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 5826vpand %xmm4,%xmm6,%xmm12 5827 5828# qhasm: v10 = x7 & mask4 5829# asm 1: vpand <mask4=reg128#5,<x7=reg128#8,>v10=reg128#16 5830# asm 2: vpand <mask4=%xmm4,<x7=%xmm7,>v10=%xmm15 5831vpand %xmm4,%xmm7,%xmm15 5832 5833# qhasm: 2x v10 <<= 1 5834# asm 1: psllq $1,<v10=reg128#16 5835# asm 2: psllq $1,<v10=%xmm15 5836psllq $1,%xmm15 5837 5838# qhasm: v01 = x6 & mask5 5839# asm 1: vpand <mask5=reg128#6,<x6=reg128#7,>v01=reg128#7 5840# asm 2: vpand <mask5=%xmm5,<x6=%xmm6,>v01=%xmm6 5841vpand %xmm5,%xmm6,%xmm6 5842 5843# qhasm: v11 = x7 & mask5 5844# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 5845# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 5846vpand %xmm5,%xmm7,%xmm7 5847 5848# qhasm: 2x v01 unsigned>>= 1 5849# asm 1: psrlq $1,<v01=reg128#7 5850# asm 2: psrlq $1,<v01=%xmm6 5851psrlq $1,%xmm6 5852 5853# qhasm: x6 = v00 | v10 5854# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 5855# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 5856vpor %xmm15,%xmm12,%xmm12 5857 5858# qhasm: x7 = v01 | v11 5859# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 5860# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 5861vpor %xmm7,%xmm6,%xmm6 5862 5863# qhasm: mem128[ input_0 + 384 ] = x0 5864# asm 1: movdqu <x0=reg128#10,384(<input_0=int64#1) 5865# asm 2: movdqu <x0=%xmm9,384(<input_0=%rdi) 5866movdqu %xmm9,384(%rdi) 5867 5868# qhasm: mem128[ input_0 + 400 ] = x1 5869# asm 1: movdqu <x1=reg128#14,400(<input_0=int64#1) 5870# asm 2: movdqu <x1=%xmm13,400(<input_0=%rdi) 5871movdqu %xmm13,400(%rdi) 5872 5873# qhasm: mem128[ input_0 + 416 ] = x2 5874# asm 1: movdqu <x2=reg128#15,416(<input_0=int64#1) 5875# asm 2: movdqu <x2=%xmm14,416(<input_0=%rdi) 5876movdqu %xmm14,416(%rdi) 5877 5878# qhasm: mem128[ input_0 + 432 ] = x3 5879# asm 1: movdqu <x3=reg128#11,432(<input_0=int64#1) 5880# asm 2: movdqu <x3=%xmm10,432(<input_0=%rdi) 5881movdqu %xmm10,432(%rdi) 5882 5883# qhasm: mem128[ input_0 + 448 ] = x4 5884# asm 1: movdqu <x4=reg128#12,448(<input_0=int64#1) 5885# asm 2: movdqu <x4=%xmm11,448(<input_0=%rdi) 5886movdqu %xmm11,448(%rdi) 5887 5888# qhasm: mem128[ input_0 + 464 ] = x5 5889# asm 1: movdqu <x5=reg128#9,464(<input_0=int64#1) 5890# asm 2: movdqu <x5=%xmm8,464(<input_0=%rdi) 5891movdqu %xmm8,464(%rdi) 5892 5893# qhasm: mem128[ input_0 + 480 ] = x6 5894# asm 1: movdqu <x6=reg128#13,480(<input_0=int64#1) 5895# asm 2: movdqu <x6=%xmm12,480(<input_0=%rdi) 5896movdqu %xmm12,480(%rdi) 5897 5898# qhasm: mem128[ input_0 + 496 ] = x7 5899# asm 1: movdqu <x7=reg128#7,496(<input_0=int64#1) 5900# asm 2: movdqu <x7=%xmm6,496(<input_0=%rdi) 5901movdqu %xmm6,496(%rdi) 5902 5903# qhasm: x0 = mem128[ input_0 + 512 ] 5904# asm 1: movdqu 512(<input_0=int64#1),>x0=reg128#7 5905# asm 2: movdqu 512(<input_0=%rdi),>x0=%xmm6 5906movdqu 512(%rdi),%xmm6 5907 5908# qhasm: x1 = mem128[ input_0 + 528 ] 5909# asm 1: movdqu 528(<input_0=int64#1),>x1=reg128#8 5910# asm 2: movdqu 528(<input_0=%rdi),>x1=%xmm7 5911movdqu 528(%rdi),%xmm7 5912 5913# qhasm: x2 = mem128[ input_0 + 544 ] 5914# asm 1: movdqu 544(<input_0=int64#1),>x2=reg128#9 5915# asm 2: movdqu 544(<input_0=%rdi),>x2=%xmm8 5916movdqu 544(%rdi),%xmm8 5917 5918# qhasm: x3 = mem128[ input_0 + 560 ] 5919# asm 1: movdqu 560(<input_0=int64#1),>x3=reg128#10 5920# asm 2: movdqu 560(<input_0=%rdi),>x3=%xmm9 5921movdqu 560(%rdi),%xmm9 5922 5923# qhasm: x4 = mem128[ input_0 + 576 ] 5924# asm 1: movdqu 576(<input_0=int64#1),>x4=reg128#11 5925# asm 2: movdqu 576(<input_0=%rdi),>x4=%xmm10 5926movdqu 576(%rdi),%xmm10 5927 5928# qhasm: x5 = mem128[ input_0 + 592 ] 5929# asm 1: movdqu 592(<input_0=int64#1),>x5=reg128#12 5930# asm 2: movdqu 592(<input_0=%rdi),>x5=%xmm11 5931movdqu 592(%rdi),%xmm11 5932 5933# qhasm: x6 = mem128[ input_0 + 608 ] 5934# asm 1: movdqu 608(<input_0=int64#1),>x6=reg128#13 5935# asm 2: movdqu 608(<input_0=%rdi),>x6=%xmm12 5936movdqu 608(%rdi),%xmm12 5937 5938# qhasm: x7 = mem128[ input_0 + 624 ] 5939# asm 1: movdqu 624(<input_0=int64#1),>x7=reg128#14 5940# asm 2: movdqu 624(<input_0=%rdi),>x7=%xmm13 5941movdqu 624(%rdi),%xmm13 5942 5943# qhasm: v00 = x0 & mask0 5944# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 5945# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 5946vpand %xmm0,%xmm6,%xmm14 5947 5948# qhasm: v10 = x4 & mask0 5949# asm 1: vpand <mask0=reg128#1,<x4=reg128#11,>v10=reg128#16 5950# asm 2: vpand <mask0=%xmm0,<x4=%xmm10,>v10=%xmm15 5951vpand %xmm0,%xmm10,%xmm15 5952 5953# qhasm: 2x v10 <<= 4 5954# asm 1: psllq $4,<v10=reg128#16 5955# asm 2: psllq $4,<v10=%xmm15 5956psllq $4,%xmm15 5957 5958# qhasm: v01 = x0 & mask1 5959# asm 1: vpand <mask1=reg128#2,<x0=reg128#7,>v01=reg128#7 5960# asm 2: vpand <mask1=%xmm1,<x0=%xmm6,>v01=%xmm6 5961vpand %xmm1,%xmm6,%xmm6 5962 5963# qhasm: v11 = x4 & mask1 5964# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 5965# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 5966vpand %xmm1,%xmm10,%xmm10 5967 5968# qhasm: 2x v01 unsigned>>= 4 5969# asm 1: psrlq $4,<v01=reg128#7 5970# asm 2: psrlq $4,<v01=%xmm6 5971psrlq $4,%xmm6 5972 5973# qhasm: x0 = v00 | v10 5974# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 5975# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 5976vpor %xmm15,%xmm14,%xmm14 5977 5978# qhasm: x4 = v01 | v11 5979# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 5980# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 5981vpor %xmm10,%xmm6,%xmm6 5982 5983# qhasm: v00 = x1 & mask0 5984# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 5985# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 5986vpand %xmm0,%xmm7,%xmm10 5987 5988# qhasm: v10 = x5 & mask0 5989# asm 1: vpand <mask0=reg128#1,<x5=reg128#12,>v10=reg128#16 5990# asm 2: vpand <mask0=%xmm0,<x5=%xmm11,>v10=%xmm15 5991vpand %xmm0,%xmm11,%xmm15 5992 5993# qhasm: 2x v10 <<= 4 5994# asm 1: psllq $4,<v10=reg128#16 5995# asm 2: psllq $4,<v10=%xmm15 5996psllq $4,%xmm15 5997 5998# qhasm: v01 = x1 & mask1 5999# asm 1: vpand <mask1=reg128#2,<x1=reg128#8,>v01=reg128#8 6000# asm 2: vpand <mask1=%xmm1,<x1=%xmm7,>v01=%xmm7 6001vpand %xmm1,%xmm7,%xmm7 6002 6003# qhasm: v11 = x5 & mask1 6004# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 6005# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 6006vpand %xmm1,%xmm11,%xmm11 6007 6008# qhasm: 2x v01 unsigned>>= 4 6009# asm 1: psrlq $4,<v01=reg128#8 6010# asm 2: psrlq $4,<v01=%xmm7 6011psrlq $4,%xmm7 6012 6013# qhasm: x1 = v00 | v10 6014# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 6015# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 6016vpor %xmm15,%xmm10,%xmm10 6017 6018# qhasm: x5 = v01 | v11 6019# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 6020# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 6021vpor %xmm11,%xmm7,%xmm7 6022 6023# qhasm: v00 = x2 & mask0 6024# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 6025# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 6026vpand %xmm0,%xmm8,%xmm11 6027 6028# qhasm: v10 = x6 & mask0 6029# asm 1: vpand <mask0=reg128#1,<x6=reg128#13,>v10=reg128#16 6030# asm 2: vpand <mask0=%xmm0,<x6=%xmm12,>v10=%xmm15 6031vpand %xmm0,%xmm12,%xmm15 6032 6033# qhasm: 2x v10 <<= 4 6034# asm 1: psllq $4,<v10=reg128#16 6035# asm 2: psllq $4,<v10=%xmm15 6036psllq $4,%xmm15 6037 6038# qhasm: v01 = x2 & mask1 6039# asm 1: vpand <mask1=reg128#2,<x2=reg128#9,>v01=reg128#9 6040# asm 2: vpand <mask1=%xmm1,<x2=%xmm8,>v01=%xmm8 6041vpand %xmm1,%xmm8,%xmm8 6042 6043# qhasm: v11 = x6 & mask1 6044# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 6045# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 6046vpand %xmm1,%xmm12,%xmm12 6047 6048# qhasm: 2x v01 unsigned>>= 4 6049# asm 1: psrlq $4,<v01=reg128#9 6050# asm 2: psrlq $4,<v01=%xmm8 6051psrlq $4,%xmm8 6052 6053# qhasm: x2 = v00 | v10 6054# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 6055# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 6056vpor %xmm15,%xmm11,%xmm11 6057 6058# qhasm: x6 = v01 | v11 6059# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 6060# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 6061vpor %xmm12,%xmm8,%xmm8 6062 6063# qhasm: v00 = x3 & mask0 6064# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 6065# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 6066vpand %xmm0,%xmm9,%xmm12 6067 6068# qhasm: v10 = x7 & mask0 6069# asm 1: vpand <mask0=reg128#1,<x7=reg128#14,>v10=reg128#16 6070# asm 2: vpand <mask0=%xmm0,<x7=%xmm13,>v10=%xmm15 6071vpand %xmm0,%xmm13,%xmm15 6072 6073# qhasm: 2x v10 <<= 4 6074# asm 1: psllq $4,<v10=reg128#16 6075# asm 2: psllq $4,<v10=%xmm15 6076psllq $4,%xmm15 6077 6078# qhasm: v01 = x3 & mask1 6079# asm 1: vpand <mask1=reg128#2,<x3=reg128#10,>v01=reg128#10 6080# asm 2: vpand <mask1=%xmm1,<x3=%xmm9,>v01=%xmm9 6081vpand %xmm1,%xmm9,%xmm9 6082 6083# qhasm: v11 = x7 & mask1 6084# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 6085# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 6086vpand %xmm1,%xmm13,%xmm13 6087 6088# qhasm: 2x v01 unsigned>>= 4 6089# asm 1: psrlq $4,<v01=reg128#10 6090# asm 2: psrlq $4,<v01=%xmm9 6091psrlq $4,%xmm9 6092 6093# qhasm: x3 = v00 | v10 6094# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 6095# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 6096vpor %xmm15,%xmm12,%xmm12 6097 6098# qhasm: x7 = v01 | v11 6099# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 6100# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 6101vpor %xmm13,%xmm9,%xmm9 6102 6103# qhasm: v00 = x0 & mask2 6104# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 6105# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 6106vpand %xmm2,%xmm14,%xmm13 6107 6108# qhasm: v10 = x2 & mask2 6109# asm 1: vpand <mask2=reg128#3,<x2=reg128#12,>v10=reg128#16 6110# asm 2: vpand <mask2=%xmm2,<x2=%xmm11,>v10=%xmm15 6111vpand %xmm2,%xmm11,%xmm15 6112 6113# qhasm: 2x v10 <<= 2 6114# asm 1: psllq $2,<v10=reg128#16 6115# asm 2: psllq $2,<v10=%xmm15 6116psllq $2,%xmm15 6117 6118# qhasm: v01 = x0 & mask3 6119# asm 1: vpand <mask3=reg128#4,<x0=reg128#15,>v01=reg128#15 6120# asm 2: vpand <mask3=%xmm3,<x0=%xmm14,>v01=%xmm14 6121vpand %xmm3,%xmm14,%xmm14 6122 6123# qhasm: v11 = x2 & mask3 6124# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 6125# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 6126vpand %xmm3,%xmm11,%xmm11 6127 6128# qhasm: 2x v01 unsigned>>= 2 6129# asm 1: psrlq $2,<v01=reg128#15 6130# asm 2: psrlq $2,<v01=%xmm14 6131psrlq $2,%xmm14 6132 6133# qhasm: x0 = v00 | v10 6134# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 6135# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 6136vpor %xmm15,%xmm13,%xmm13 6137 6138# qhasm: x2 = v01 | v11 6139# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 6140# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 6141vpor %xmm11,%xmm14,%xmm11 6142 6143# qhasm: v00 = x1 & mask2 6144# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 6145# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 6146vpand %xmm2,%xmm10,%xmm14 6147 6148# qhasm: v10 = x3 & mask2 6149# asm 1: vpand <mask2=reg128#3,<x3=reg128#13,>v10=reg128#16 6150# asm 2: vpand <mask2=%xmm2,<x3=%xmm12,>v10=%xmm15 6151vpand %xmm2,%xmm12,%xmm15 6152 6153# qhasm: 2x v10 <<= 2 6154# asm 1: psllq $2,<v10=reg128#16 6155# asm 2: psllq $2,<v10=%xmm15 6156psllq $2,%xmm15 6157 6158# qhasm: v01 = x1 & mask3 6159# asm 1: vpand <mask3=reg128#4,<x1=reg128#11,>v01=reg128#11 6160# asm 2: vpand <mask3=%xmm3,<x1=%xmm10,>v01=%xmm10 6161vpand %xmm3,%xmm10,%xmm10 6162 6163# qhasm: v11 = x3 & mask3 6164# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 6165# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 6166vpand %xmm3,%xmm12,%xmm12 6167 6168# qhasm: 2x v01 unsigned>>= 2 6169# asm 1: psrlq $2,<v01=reg128#11 6170# asm 2: psrlq $2,<v01=%xmm10 6171psrlq $2,%xmm10 6172 6173# qhasm: x1 = v00 | v10 6174# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 6175# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 6176vpor %xmm15,%xmm14,%xmm14 6177 6178# qhasm: x3 = v01 | v11 6179# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 6180# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 6181vpor %xmm12,%xmm10,%xmm10 6182 6183# qhasm: v00 = x4 & mask2 6184# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 6185# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 6186vpand %xmm2,%xmm6,%xmm12 6187 6188# qhasm: v10 = x6 & mask2 6189# asm 1: vpand <mask2=reg128#3,<x6=reg128#9,>v10=reg128#16 6190# asm 2: vpand <mask2=%xmm2,<x6=%xmm8,>v10=%xmm15 6191vpand %xmm2,%xmm8,%xmm15 6192 6193# qhasm: 2x v10 <<= 2 6194# asm 1: psllq $2,<v10=reg128#16 6195# asm 2: psllq $2,<v10=%xmm15 6196psllq $2,%xmm15 6197 6198# qhasm: v01 = x4 & mask3 6199# asm 1: vpand <mask3=reg128#4,<x4=reg128#7,>v01=reg128#7 6200# asm 2: vpand <mask3=%xmm3,<x4=%xmm6,>v01=%xmm6 6201vpand %xmm3,%xmm6,%xmm6 6202 6203# qhasm: v11 = x6 & mask3 6204# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 6205# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 6206vpand %xmm3,%xmm8,%xmm8 6207 6208# qhasm: 2x v01 unsigned>>= 2 6209# asm 1: psrlq $2,<v01=reg128#7 6210# asm 2: psrlq $2,<v01=%xmm6 6211psrlq $2,%xmm6 6212 6213# qhasm: x4 = v00 | v10 6214# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 6215# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 6216vpor %xmm15,%xmm12,%xmm12 6217 6218# qhasm: x6 = v01 | v11 6219# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 6220# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 6221vpor %xmm8,%xmm6,%xmm6 6222 6223# qhasm: v00 = x5 & mask2 6224# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 6225# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 6226vpand %xmm2,%xmm7,%xmm8 6227 6228# qhasm: v10 = x7 & mask2 6229# asm 1: vpand <mask2=reg128#3,<x7=reg128#10,>v10=reg128#16 6230# asm 2: vpand <mask2=%xmm2,<x7=%xmm9,>v10=%xmm15 6231vpand %xmm2,%xmm9,%xmm15 6232 6233# qhasm: 2x v10 <<= 2 6234# asm 1: psllq $2,<v10=reg128#16 6235# asm 2: psllq $2,<v10=%xmm15 6236psllq $2,%xmm15 6237 6238# qhasm: v01 = x5 & mask3 6239# asm 1: vpand <mask3=reg128#4,<x5=reg128#8,>v01=reg128#8 6240# asm 2: vpand <mask3=%xmm3,<x5=%xmm7,>v01=%xmm7 6241vpand %xmm3,%xmm7,%xmm7 6242 6243# qhasm: v11 = x7 & mask3 6244# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 6245# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 6246vpand %xmm3,%xmm9,%xmm9 6247 6248# qhasm: 2x v01 unsigned>>= 2 6249# asm 1: psrlq $2,<v01=reg128#8 6250# asm 2: psrlq $2,<v01=%xmm7 6251psrlq $2,%xmm7 6252 6253# qhasm: x5 = v00 | v10 6254# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 6255# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 6256vpor %xmm15,%xmm8,%xmm8 6257 6258# qhasm: x7 = v01 | v11 6259# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 6260# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 6261vpor %xmm9,%xmm7,%xmm7 6262 6263# qhasm: v00 = x0 & mask4 6264# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 6265# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 6266vpand %xmm4,%xmm13,%xmm9 6267 6268# qhasm: v10 = x1 & mask4 6269# asm 1: vpand <mask4=reg128#5,<x1=reg128#15,>v10=reg128#16 6270# asm 2: vpand <mask4=%xmm4,<x1=%xmm14,>v10=%xmm15 6271vpand %xmm4,%xmm14,%xmm15 6272 6273# qhasm: 2x v10 <<= 1 6274# asm 1: psllq $1,<v10=reg128#16 6275# asm 2: psllq $1,<v10=%xmm15 6276psllq $1,%xmm15 6277 6278# qhasm: v01 = x0 & mask5 6279# asm 1: vpand <mask5=reg128#6,<x0=reg128#14,>v01=reg128#14 6280# asm 2: vpand <mask5=%xmm5,<x0=%xmm13,>v01=%xmm13 6281vpand %xmm5,%xmm13,%xmm13 6282 6283# qhasm: v11 = x1 & mask5 6284# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 6285# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 6286vpand %xmm5,%xmm14,%xmm14 6287 6288# qhasm: 2x v01 unsigned>>= 1 6289# asm 1: psrlq $1,<v01=reg128#14 6290# asm 2: psrlq $1,<v01=%xmm13 6291psrlq $1,%xmm13 6292 6293# qhasm: x0 = v00 | v10 6294# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 6295# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 6296vpor %xmm15,%xmm9,%xmm9 6297 6298# qhasm: x1 = v01 | v11 6299# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 6300# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 6301vpor %xmm14,%xmm13,%xmm13 6302 6303# qhasm: v00 = x2 & mask4 6304# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 6305# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 6306vpand %xmm4,%xmm11,%xmm14 6307 6308# qhasm: v10 = x3 & mask4 6309# asm 1: vpand <mask4=reg128#5,<x3=reg128#11,>v10=reg128#16 6310# asm 2: vpand <mask4=%xmm4,<x3=%xmm10,>v10=%xmm15 6311vpand %xmm4,%xmm10,%xmm15 6312 6313# qhasm: 2x v10 <<= 1 6314# asm 1: psllq $1,<v10=reg128#16 6315# asm 2: psllq $1,<v10=%xmm15 6316psllq $1,%xmm15 6317 6318# qhasm: v01 = x2 & mask5 6319# asm 1: vpand <mask5=reg128#6,<x2=reg128#12,>v01=reg128#12 6320# asm 2: vpand <mask5=%xmm5,<x2=%xmm11,>v01=%xmm11 6321vpand %xmm5,%xmm11,%xmm11 6322 6323# qhasm: v11 = x3 & mask5 6324# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 6325# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 6326vpand %xmm5,%xmm10,%xmm10 6327 6328# qhasm: 2x v01 unsigned>>= 1 6329# asm 1: psrlq $1,<v01=reg128#12 6330# asm 2: psrlq $1,<v01=%xmm11 6331psrlq $1,%xmm11 6332 6333# qhasm: x2 = v00 | v10 6334# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 6335# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 6336vpor %xmm15,%xmm14,%xmm14 6337 6338# qhasm: x3 = v01 | v11 6339# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 6340# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 6341vpor %xmm10,%xmm11,%xmm10 6342 6343# qhasm: v00 = x4 & mask4 6344# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 6345# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 6346vpand %xmm4,%xmm12,%xmm11 6347 6348# qhasm: v10 = x5 & mask4 6349# asm 1: vpand <mask4=reg128#5,<x5=reg128#9,>v10=reg128#16 6350# asm 2: vpand <mask4=%xmm4,<x5=%xmm8,>v10=%xmm15 6351vpand %xmm4,%xmm8,%xmm15 6352 6353# qhasm: 2x v10 <<= 1 6354# asm 1: psllq $1,<v10=reg128#16 6355# asm 2: psllq $1,<v10=%xmm15 6356psllq $1,%xmm15 6357 6358# qhasm: v01 = x4 & mask5 6359# asm 1: vpand <mask5=reg128#6,<x4=reg128#13,>v01=reg128#13 6360# asm 2: vpand <mask5=%xmm5,<x4=%xmm12,>v01=%xmm12 6361vpand %xmm5,%xmm12,%xmm12 6362 6363# qhasm: v11 = x5 & mask5 6364# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 6365# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 6366vpand %xmm5,%xmm8,%xmm8 6367 6368# qhasm: 2x v01 unsigned>>= 1 6369# asm 1: psrlq $1,<v01=reg128#13 6370# asm 2: psrlq $1,<v01=%xmm12 6371psrlq $1,%xmm12 6372 6373# qhasm: x4 = v00 | v10 6374# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 6375# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 6376vpor %xmm15,%xmm11,%xmm11 6377 6378# qhasm: x5 = v01 | v11 6379# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 6380# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 6381vpor %xmm8,%xmm12,%xmm8 6382 6383# qhasm: v00 = x6 & mask4 6384# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 6385# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 6386vpand %xmm4,%xmm6,%xmm12 6387 6388# qhasm: v10 = x7 & mask4 6389# asm 1: vpand <mask4=reg128#5,<x7=reg128#8,>v10=reg128#16 6390# asm 2: vpand <mask4=%xmm4,<x7=%xmm7,>v10=%xmm15 6391vpand %xmm4,%xmm7,%xmm15 6392 6393# qhasm: 2x v10 <<= 1 6394# asm 1: psllq $1,<v10=reg128#16 6395# asm 2: psllq $1,<v10=%xmm15 6396psllq $1,%xmm15 6397 6398# qhasm: v01 = x6 & mask5 6399# asm 1: vpand <mask5=reg128#6,<x6=reg128#7,>v01=reg128#7 6400# asm 2: vpand <mask5=%xmm5,<x6=%xmm6,>v01=%xmm6 6401vpand %xmm5,%xmm6,%xmm6 6402 6403# qhasm: v11 = x7 & mask5 6404# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 6405# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 6406vpand %xmm5,%xmm7,%xmm7 6407 6408# qhasm: 2x v01 unsigned>>= 1 6409# asm 1: psrlq $1,<v01=reg128#7 6410# asm 2: psrlq $1,<v01=%xmm6 6411psrlq $1,%xmm6 6412 6413# qhasm: x6 = v00 | v10 6414# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 6415# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 6416vpor %xmm15,%xmm12,%xmm12 6417 6418# qhasm: x7 = v01 | v11 6419# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 6420# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 6421vpor %xmm7,%xmm6,%xmm6 6422 6423# qhasm: mem128[ input_0 + 512 ] = x0 6424# asm 1: movdqu <x0=reg128#10,512(<input_0=int64#1) 6425# asm 2: movdqu <x0=%xmm9,512(<input_0=%rdi) 6426movdqu %xmm9,512(%rdi) 6427 6428# qhasm: mem128[ input_0 + 528 ] = x1 6429# asm 1: movdqu <x1=reg128#14,528(<input_0=int64#1) 6430# asm 2: movdqu <x1=%xmm13,528(<input_0=%rdi) 6431movdqu %xmm13,528(%rdi) 6432 6433# qhasm: mem128[ input_0 + 544 ] = x2 6434# asm 1: movdqu <x2=reg128#15,544(<input_0=int64#1) 6435# asm 2: movdqu <x2=%xmm14,544(<input_0=%rdi) 6436movdqu %xmm14,544(%rdi) 6437 6438# qhasm: mem128[ input_0 + 560 ] = x3 6439# asm 1: movdqu <x3=reg128#11,560(<input_0=int64#1) 6440# asm 2: movdqu <x3=%xmm10,560(<input_0=%rdi) 6441movdqu %xmm10,560(%rdi) 6442 6443# qhasm: mem128[ input_0 + 576 ] = x4 6444# asm 1: movdqu <x4=reg128#12,576(<input_0=int64#1) 6445# asm 2: movdqu <x4=%xmm11,576(<input_0=%rdi) 6446movdqu %xmm11,576(%rdi) 6447 6448# qhasm: mem128[ input_0 + 592 ] = x5 6449# asm 1: movdqu <x5=reg128#9,592(<input_0=int64#1) 6450# asm 2: movdqu <x5=%xmm8,592(<input_0=%rdi) 6451movdqu %xmm8,592(%rdi) 6452 6453# qhasm: mem128[ input_0 + 608 ] = x6 6454# asm 1: movdqu <x6=reg128#13,608(<input_0=int64#1) 6455# asm 2: movdqu <x6=%xmm12,608(<input_0=%rdi) 6456movdqu %xmm12,608(%rdi) 6457 6458# qhasm: mem128[ input_0 + 624 ] = x7 6459# asm 1: movdqu <x7=reg128#7,624(<input_0=int64#1) 6460# asm 2: movdqu <x7=%xmm6,624(<input_0=%rdi) 6461movdqu %xmm6,624(%rdi) 6462 6463# qhasm: x0 = mem128[ input_0 + 640 ] 6464# asm 1: movdqu 640(<input_0=int64#1),>x0=reg128#7 6465# asm 2: movdqu 640(<input_0=%rdi),>x0=%xmm6 6466movdqu 640(%rdi),%xmm6 6467 6468# qhasm: x1 = mem128[ input_0 + 656 ] 6469# asm 1: movdqu 656(<input_0=int64#1),>x1=reg128#8 6470# asm 2: movdqu 656(<input_0=%rdi),>x1=%xmm7 6471movdqu 656(%rdi),%xmm7 6472 6473# qhasm: x2 = mem128[ input_0 + 672 ] 6474# asm 1: movdqu 672(<input_0=int64#1),>x2=reg128#9 6475# asm 2: movdqu 672(<input_0=%rdi),>x2=%xmm8 6476movdqu 672(%rdi),%xmm8 6477 6478# qhasm: x3 = mem128[ input_0 + 688 ] 6479# asm 1: movdqu 688(<input_0=int64#1),>x3=reg128#10 6480# asm 2: movdqu 688(<input_0=%rdi),>x3=%xmm9 6481movdqu 688(%rdi),%xmm9 6482 6483# qhasm: x4 = mem128[ input_0 + 704 ] 6484# asm 1: movdqu 704(<input_0=int64#1),>x4=reg128#11 6485# asm 2: movdqu 704(<input_0=%rdi),>x4=%xmm10 6486movdqu 704(%rdi),%xmm10 6487 6488# qhasm: x5 = mem128[ input_0 + 720 ] 6489# asm 1: movdqu 720(<input_0=int64#1),>x5=reg128#12 6490# asm 2: movdqu 720(<input_0=%rdi),>x5=%xmm11 6491movdqu 720(%rdi),%xmm11 6492 6493# qhasm: x6 = mem128[ input_0 + 736 ] 6494# asm 1: movdqu 736(<input_0=int64#1),>x6=reg128#13 6495# asm 2: movdqu 736(<input_0=%rdi),>x6=%xmm12 6496movdqu 736(%rdi),%xmm12 6497 6498# qhasm: x7 = mem128[ input_0 + 752 ] 6499# asm 1: movdqu 752(<input_0=int64#1),>x7=reg128#14 6500# asm 2: movdqu 752(<input_0=%rdi),>x7=%xmm13 6501movdqu 752(%rdi),%xmm13 6502 6503# qhasm: v00 = x0 & mask0 6504# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 6505# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 6506vpand %xmm0,%xmm6,%xmm14 6507 6508# qhasm: v10 = x4 & mask0 6509# asm 1: vpand <mask0=reg128#1,<x4=reg128#11,>v10=reg128#16 6510# asm 2: vpand <mask0=%xmm0,<x4=%xmm10,>v10=%xmm15 6511vpand %xmm0,%xmm10,%xmm15 6512 6513# qhasm: 2x v10 <<= 4 6514# asm 1: psllq $4,<v10=reg128#16 6515# asm 2: psllq $4,<v10=%xmm15 6516psllq $4,%xmm15 6517 6518# qhasm: v01 = x0 & mask1 6519# asm 1: vpand <mask1=reg128#2,<x0=reg128#7,>v01=reg128#7 6520# asm 2: vpand <mask1=%xmm1,<x0=%xmm6,>v01=%xmm6 6521vpand %xmm1,%xmm6,%xmm6 6522 6523# qhasm: v11 = x4 & mask1 6524# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 6525# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 6526vpand %xmm1,%xmm10,%xmm10 6527 6528# qhasm: 2x v01 unsigned>>= 4 6529# asm 1: psrlq $4,<v01=reg128#7 6530# asm 2: psrlq $4,<v01=%xmm6 6531psrlq $4,%xmm6 6532 6533# qhasm: x0 = v00 | v10 6534# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 6535# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 6536vpor %xmm15,%xmm14,%xmm14 6537 6538# qhasm: x4 = v01 | v11 6539# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 6540# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 6541vpor %xmm10,%xmm6,%xmm6 6542 6543# qhasm: v00 = x1 & mask0 6544# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 6545# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 6546vpand %xmm0,%xmm7,%xmm10 6547 6548# qhasm: v10 = x5 & mask0 6549# asm 1: vpand <mask0=reg128#1,<x5=reg128#12,>v10=reg128#16 6550# asm 2: vpand <mask0=%xmm0,<x5=%xmm11,>v10=%xmm15 6551vpand %xmm0,%xmm11,%xmm15 6552 6553# qhasm: 2x v10 <<= 4 6554# asm 1: psllq $4,<v10=reg128#16 6555# asm 2: psllq $4,<v10=%xmm15 6556psllq $4,%xmm15 6557 6558# qhasm: v01 = x1 & mask1 6559# asm 1: vpand <mask1=reg128#2,<x1=reg128#8,>v01=reg128#8 6560# asm 2: vpand <mask1=%xmm1,<x1=%xmm7,>v01=%xmm7 6561vpand %xmm1,%xmm7,%xmm7 6562 6563# qhasm: v11 = x5 & mask1 6564# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 6565# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 6566vpand %xmm1,%xmm11,%xmm11 6567 6568# qhasm: 2x v01 unsigned>>= 4 6569# asm 1: psrlq $4,<v01=reg128#8 6570# asm 2: psrlq $4,<v01=%xmm7 6571psrlq $4,%xmm7 6572 6573# qhasm: x1 = v00 | v10 6574# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 6575# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 6576vpor %xmm15,%xmm10,%xmm10 6577 6578# qhasm: x5 = v01 | v11 6579# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 6580# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 6581vpor %xmm11,%xmm7,%xmm7 6582 6583# qhasm: v00 = x2 & mask0 6584# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 6585# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 6586vpand %xmm0,%xmm8,%xmm11 6587 6588# qhasm: v10 = x6 & mask0 6589# asm 1: vpand <mask0=reg128#1,<x6=reg128#13,>v10=reg128#16 6590# asm 2: vpand <mask0=%xmm0,<x6=%xmm12,>v10=%xmm15 6591vpand %xmm0,%xmm12,%xmm15 6592 6593# qhasm: 2x v10 <<= 4 6594# asm 1: psllq $4,<v10=reg128#16 6595# asm 2: psllq $4,<v10=%xmm15 6596psllq $4,%xmm15 6597 6598# qhasm: v01 = x2 & mask1 6599# asm 1: vpand <mask1=reg128#2,<x2=reg128#9,>v01=reg128#9 6600# asm 2: vpand <mask1=%xmm1,<x2=%xmm8,>v01=%xmm8 6601vpand %xmm1,%xmm8,%xmm8 6602 6603# qhasm: v11 = x6 & mask1 6604# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 6605# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 6606vpand %xmm1,%xmm12,%xmm12 6607 6608# qhasm: 2x v01 unsigned>>= 4 6609# asm 1: psrlq $4,<v01=reg128#9 6610# asm 2: psrlq $4,<v01=%xmm8 6611psrlq $4,%xmm8 6612 6613# qhasm: x2 = v00 | v10 6614# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 6615# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 6616vpor %xmm15,%xmm11,%xmm11 6617 6618# qhasm: x6 = v01 | v11 6619# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 6620# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 6621vpor %xmm12,%xmm8,%xmm8 6622 6623# qhasm: v00 = x3 & mask0 6624# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 6625# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 6626vpand %xmm0,%xmm9,%xmm12 6627 6628# qhasm: v10 = x7 & mask0 6629# asm 1: vpand <mask0=reg128#1,<x7=reg128#14,>v10=reg128#16 6630# asm 2: vpand <mask0=%xmm0,<x7=%xmm13,>v10=%xmm15 6631vpand %xmm0,%xmm13,%xmm15 6632 6633# qhasm: 2x v10 <<= 4 6634# asm 1: psllq $4,<v10=reg128#16 6635# asm 2: psllq $4,<v10=%xmm15 6636psllq $4,%xmm15 6637 6638# qhasm: v01 = x3 & mask1 6639# asm 1: vpand <mask1=reg128#2,<x3=reg128#10,>v01=reg128#10 6640# asm 2: vpand <mask1=%xmm1,<x3=%xmm9,>v01=%xmm9 6641vpand %xmm1,%xmm9,%xmm9 6642 6643# qhasm: v11 = x7 & mask1 6644# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 6645# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 6646vpand %xmm1,%xmm13,%xmm13 6647 6648# qhasm: 2x v01 unsigned>>= 4 6649# asm 1: psrlq $4,<v01=reg128#10 6650# asm 2: psrlq $4,<v01=%xmm9 6651psrlq $4,%xmm9 6652 6653# qhasm: x3 = v00 | v10 6654# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 6655# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 6656vpor %xmm15,%xmm12,%xmm12 6657 6658# qhasm: x7 = v01 | v11 6659# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 6660# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 6661vpor %xmm13,%xmm9,%xmm9 6662 6663# qhasm: v00 = x0 & mask2 6664# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 6665# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 6666vpand %xmm2,%xmm14,%xmm13 6667 6668# qhasm: v10 = x2 & mask2 6669# asm 1: vpand <mask2=reg128#3,<x2=reg128#12,>v10=reg128#16 6670# asm 2: vpand <mask2=%xmm2,<x2=%xmm11,>v10=%xmm15 6671vpand %xmm2,%xmm11,%xmm15 6672 6673# qhasm: 2x v10 <<= 2 6674# asm 1: psllq $2,<v10=reg128#16 6675# asm 2: psllq $2,<v10=%xmm15 6676psllq $2,%xmm15 6677 6678# qhasm: v01 = x0 & mask3 6679# asm 1: vpand <mask3=reg128#4,<x0=reg128#15,>v01=reg128#15 6680# asm 2: vpand <mask3=%xmm3,<x0=%xmm14,>v01=%xmm14 6681vpand %xmm3,%xmm14,%xmm14 6682 6683# qhasm: v11 = x2 & mask3 6684# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 6685# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 6686vpand %xmm3,%xmm11,%xmm11 6687 6688# qhasm: 2x v01 unsigned>>= 2 6689# asm 1: psrlq $2,<v01=reg128#15 6690# asm 2: psrlq $2,<v01=%xmm14 6691psrlq $2,%xmm14 6692 6693# qhasm: x0 = v00 | v10 6694# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 6695# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 6696vpor %xmm15,%xmm13,%xmm13 6697 6698# qhasm: x2 = v01 | v11 6699# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 6700# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 6701vpor %xmm11,%xmm14,%xmm11 6702 6703# qhasm: v00 = x1 & mask2 6704# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 6705# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 6706vpand %xmm2,%xmm10,%xmm14 6707 6708# qhasm: v10 = x3 & mask2 6709# asm 1: vpand <mask2=reg128#3,<x3=reg128#13,>v10=reg128#16 6710# asm 2: vpand <mask2=%xmm2,<x3=%xmm12,>v10=%xmm15 6711vpand %xmm2,%xmm12,%xmm15 6712 6713# qhasm: 2x v10 <<= 2 6714# asm 1: psllq $2,<v10=reg128#16 6715# asm 2: psllq $2,<v10=%xmm15 6716psllq $2,%xmm15 6717 6718# qhasm: v01 = x1 & mask3 6719# asm 1: vpand <mask3=reg128#4,<x1=reg128#11,>v01=reg128#11 6720# asm 2: vpand <mask3=%xmm3,<x1=%xmm10,>v01=%xmm10 6721vpand %xmm3,%xmm10,%xmm10 6722 6723# qhasm: v11 = x3 & mask3 6724# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 6725# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 6726vpand %xmm3,%xmm12,%xmm12 6727 6728# qhasm: 2x v01 unsigned>>= 2 6729# asm 1: psrlq $2,<v01=reg128#11 6730# asm 2: psrlq $2,<v01=%xmm10 6731psrlq $2,%xmm10 6732 6733# qhasm: x1 = v00 | v10 6734# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 6735# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 6736vpor %xmm15,%xmm14,%xmm14 6737 6738# qhasm: x3 = v01 | v11 6739# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 6740# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 6741vpor %xmm12,%xmm10,%xmm10 6742 6743# qhasm: v00 = x4 & mask2 6744# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 6745# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 6746vpand %xmm2,%xmm6,%xmm12 6747 6748# qhasm: v10 = x6 & mask2 6749# asm 1: vpand <mask2=reg128#3,<x6=reg128#9,>v10=reg128#16 6750# asm 2: vpand <mask2=%xmm2,<x6=%xmm8,>v10=%xmm15 6751vpand %xmm2,%xmm8,%xmm15 6752 6753# qhasm: 2x v10 <<= 2 6754# asm 1: psllq $2,<v10=reg128#16 6755# asm 2: psllq $2,<v10=%xmm15 6756psllq $2,%xmm15 6757 6758# qhasm: v01 = x4 & mask3 6759# asm 1: vpand <mask3=reg128#4,<x4=reg128#7,>v01=reg128#7 6760# asm 2: vpand <mask3=%xmm3,<x4=%xmm6,>v01=%xmm6 6761vpand %xmm3,%xmm6,%xmm6 6762 6763# qhasm: v11 = x6 & mask3 6764# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 6765# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 6766vpand %xmm3,%xmm8,%xmm8 6767 6768# qhasm: 2x v01 unsigned>>= 2 6769# asm 1: psrlq $2,<v01=reg128#7 6770# asm 2: psrlq $2,<v01=%xmm6 6771psrlq $2,%xmm6 6772 6773# qhasm: x4 = v00 | v10 6774# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 6775# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 6776vpor %xmm15,%xmm12,%xmm12 6777 6778# qhasm: x6 = v01 | v11 6779# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 6780# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 6781vpor %xmm8,%xmm6,%xmm6 6782 6783# qhasm: v00 = x5 & mask2 6784# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 6785# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 6786vpand %xmm2,%xmm7,%xmm8 6787 6788# qhasm: v10 = x7 & mask2 6789# asm 1: vpand <mask2=reg128#3,<x7=reg128#10,>v10=reg128#16 6790# asm 2: vpand <mask2=%xmm2,<x7=%xmm9,>v10=%xmm15 6791vpand %xmm2,%xmm9,%xmm15 6792 6793# qhasm: 2x v10 <<= 2 6794# asm 1: psllq $2,<v10=reg128#16 6795# asm 2: psllq $2,<v10=%xmm15 6796psllq $2,%xmm15 6797 6798# qhasm: v01 = x5 & mask3 6799# asm 1: vpand <mask3=reg128#4,<x5=reg128#8,>v01=reg128#8 6800# asm 2: vpand <mask3=%xmm3,<x5=%xmm7,>v01=%xmm7 6801vpand %xmm3,%xmm7,%xmm7 6802 6803# qhasm: v11 = x7 & mask3 6804# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 6805# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 6806vpand %xmm3,%xmm9,%xmm9 6807 6808# qhasm: 2x v01 unsigned>>= 2 6809# asm 1: psrlq $2,<v01=reg128#8 6810# asm 2: psrlq $2,<v01=%xmm7 6811psrlq $2,%xmm7 6812 6813# qhasm: x5 = v00 | v10 6814# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 6815# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 6816vpor %xmm15,%xmm8,%xmm8 6817 6818# qhasm: x7 = v01 | v11 6819# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 6820# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 6821vpor %xmm9,%xmm7,%xmm7 6822 6823# qhasm: v00 = x0 & mask4 6824# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 6825# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 6826vpand %xmm4,%xmm13,%xmm9 6827 6828# qhasm: v10 = x1 & mask4 6829# asm 1: vpand <mask4=reg128#5,<x1=reg128#15,>v10=reg128#16 6830# asm 2: vpand <mask4=%xmm4,<x1=%xmm14,>v10=%xmm15 6831vpand %xmm4,%xmm14,%xmm15 6832 6833# qhasm: 2x v10 <<= 1 6834# asm 1: psllq $1,<v10=reg128#16 6835# asm 2: psllq $1,<v10=%xmm15 6836psllq $1,%xmm15 6837 6838# qhasm: v01 = x0 & mask5 6839# asm 1: vpand <mask5=reg128#6,<x0=reg128#14,>v01=reg128#14 6840# asm 2: vpand <mask5=%xmm5,<x0=%xmm13,>v01=%xmm13 6841vpand %xmm5,%xmm13,%xmm13 6842 6843# qhasm: v11 = x1 & mask5 6844# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 6845# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 6846vpand %xmm5,%xmm14,%xmm14 6847 6848# qhasm: 2x v01 unsigned>>= 1 6849# asm 1: psrlq $1,<v01=reg128#14 6850# asm 2: psrlq $1,<v01=%xmm13 6851psrlq $1,%xmm13 6852 6853# qhasm: x0 = v00 | v10 6854# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 6855# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 6856vpor %xmm15,%xmm9,%xmm9 6857 6858# qhasm: x1 = v01 | v11 6859# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 6860# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 6861vpor %xmm14,%xmm13,%xmm13 6862 6863# qhasm: v00 = x2 & mask4 6864# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 6865# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 6866vpand %xmm4,%xmm11,%xmm14 6867 6868# qhasm: v10 = x3 & mask4 6869# asm 1: vpand <mask4=reg128#5,<x3=reg128#11,>v10=reg128#16 6870# asm 2: vpand <mask4=%xmm4,<x3=%xmm10,>v10=%xmm15 6871vpand %xmm4,%xmm10,%xmm15 6872 6873# qhasm: 2x v10 <<= 1 6874# asm 1: psllq $1,<v10=reg128#16 6875# asm 2: psllq $1,<v10=%xmm15 6876psllq $1,%xmm15 6877 6878# qhasm: v01 = x2 & mask5 6879# asm 1: vpand <mask5=reg128#6,<x2=reg128#12,>v01=reg128#12 6880# asm 2: vpand <mask5=%xmm5,<x2=%xmm11,>v01=%xmm11 6881vpand %xmm5,%xmm11,%xmm11 6882 6883# qhasm: v11 = x3 & mask5 6884# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 6885# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 6886vpand %xmm5,%xmm10,%xmm10 6887 6888# qhasm: 2x v01 unsigned>>= 1 6889# asm 1: psrlq $1,<v01=reg128#12 6890# asm 2: psrlq $1,<v01=%xmm11 6891psrlq $1,%xmm11 6892 6893# qhasm: x2 = v00 | v10 6894# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 6895# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 6896vpor %xmm15,%xmm14,%xmm14 6897 6898# qhasm: x3 = v01 | v11 6899# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 6900# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 6901vpor %xmm10,%xmm11,%xmm10 6902 6903# qhasm: v00 = x4 & mask4 6904# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 6905# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 6906vpand %xmm4,%xmm12,%xmm11 6907 6908# qhasm: v10 = x5 & mask4 6909# asm 1: vpand <mask4=reg128#5,<x5=reg128#9,>v10=reg128#16 6910# asm 2: vpand <mask4=%xmm4,<x5=%xmm8,>v10=%xmm15 6911vpand %xmm4,%xmm8,%xmm15 6912 6913# qhasm: 2x v10 <<= 1 6914# asm 1: psllq $1,<v10=reg128#16 6915# asm 2: psllq $1,<v10=%xmm15 6916psllq $1,%xmm15 6917 6918# qhasm: v01 = x4 & mask5 6919# asm 1: vpand <mask5=reg128#6,<x4=reg128#13,>v01=reg128#13 6920# asm 2: vpand <mask5=%xmm5,<x4=%xmm12,>v01=%xmm12 6921vpand %xmm5,%xmm12,%xmm12 6922 6923# qhasm: v11 = x5 & mask5 6924# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 6925# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 6926vpand %xmm5,%xmm8,%xmm8 6927 6928# qhasm: 2x v01 unsigned>>= 1 6929# asm 1: psrlq $1,<v01=reg128#13 6930# asm 2: psrlq $1,<v01=%xmm12 6931psrlq $1,%xmm12 6932 6933# qhasm: x4 = v00 | v10 6934# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 6935# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 6936vpor %xmm15,%xmm11,%xmm11 6937 6938# qhasm: x5 = v01 | v11 6939# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 6940# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 6941vpor %xmm8,%xmm12,%xmm8 6942 6943# qhasm: v00 = x6 & mask4 6944# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 6945# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 6946vpand %xmm4,%xmm6,%xmm12 6947 6948# qhasm: v10 = x7 & mask4 6949# asm 1: vpand <mask4=reg128#5,<x7=reg128#8,>v10=reg128#16 6950# asm 2: vpand <mask4=%xmm4,<x7=%xmm7,>v10=%xmm15 6951vpand %xmm4,%xmm7,%xmm15 6952 6953# qhasm: 2x v10 <<= 1 6954# asm 1: psllq $1,<v10=reg128#16 6955# asm 2: psllq $1,<v10=%xmm15 6956psllq $1,%xmm15 6957 6958# qhasm: v01 = x6 & mask5 6959# asm 1: vpand <mask5=reg128#6,<x6=reg128#7,>v01=reg128#7 6960# asm 2: vpand <mask5=%xmm5,<x6=%xmm6,>v01=%xmm6 6961vpand %xmm5,%xmm6,%xmm6 6962 6963# qhasm: v11 = x7 & mask5 6964# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 6965# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 6966vpand %xmm5,%xmm7,%xmm7 6967 6968# qhasm: 2x v01 unsigned>>= 1 6969# asm 1: psrlq $1,<v01=reg128#7 6970# asm 2: psrlq $1,<v01=%xmm6 6971psrlq $1,%xmm6 6972 6973# qhasm: x6 = v00 | v10 6974# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 6975# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 6976vpor %xmm15,%xmm12,%xmm12 6977 6978# qhasm: x7 = v01 | v11 6979# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 6980# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 6981vpor %xmm7,%xmm6,%xmm6 6982 6983# qhasm: mem128[ input_0 + 640 ] = x0 6984# asm 1: movdqu <x0=reg128#10,640(<input_0=int64#1) 6985# asm 2: movdqu <x0=%xmm9,640(<input_0=%rdi) 6986movdqu %xmm9,640(%rdi) 6987 6988# qhasm: mem128[ input_0 + 656 ] = x1 6989# asm 1: movdqu <x1=reg128#14,656(<input_0=int64#1) 6990# asm 2: movdqu <x1=%xmm13,656(<input_0=%rdi) 6991movdqu %xmm13,656(%rdi) 6992 6993# qhasm: mem128[ input_0 + 672 ] = x2 6994# asm 1: movdqu <x2=reg128#15,672(<input_0=int64#1) 6995# asm 2: movdqu <x2=%xmm14,672(<input_0=%rdi) 6996movdqu %xmm14,672(%rdi) 6997 6998# qhasm: mem128[ input_0 + 688 ] = x3 6999# asm 1: movdqu <x3=reg128#11,688(<input_0=int64#1) 7000# asm 2: movdqu <x3=%xmm10,688(<input_0=%rdi) 7001movdqu %xmm10,688(%rdi) 7002 7003# qhasm: mem128[ input_0 + 704 ] = x4 7004# asm 1: movdqu <x4=reg128#12,704(<input_0=int64#1) 7005# asm 2: movdqu <x4=%xmm11,704(<input_0=%rdi) 7006movdqu %xmm11,704(%rdi) 7007 7008# qhasm: mem128[ input_0 + 720 ] = x5 7009# asm 1: movdqu <x5=reg128#9,720(<input_0=int64#1) 7010# asm 2: movdqu <x5=%xmm8,720(<input_0=%rdi) 7011movdqu %xmm8,720(%rdi) 7012 7013# qhasm: mem128[ input_0 + 736 ] = x6 7014# asm 1: movdqu <x6=reg128#13,736(<input_0=int64#1) 7015# asm 2: movdqu <x6=%xmm12,736(<input_0=%rdi) 7016movdqu %xmm12,736(%rdi) 7017 7018# qhasm: mem128[ input_0 + 752 ] = x7 7019# asm 1: movdqu <x7=reg128#7,752(<input_0=int64#1) 7020# asm 2: movdqu <x7=%xmm6,752(<input_0=%rdi) 7021movdqu %xmm6,752(%rdi) 7022 7023# qhasm: x0 = mem128[ input_0 + 768 ] 7024# asm 1: movdqu 768(<input_0=int64#1),>x0=reg128#7 7025# asm 2: movdqu 768(<input_0=%rdi),>x0=%xmm6 7026movdqu 768(%rdi),%xmm6 7027 7028# qhasm: x1 = mem128[ input_0 + 784 ] 7029# asm 1: movdqu 784(<input_0=int64#1),>x1=reg128#8 7030# asm 2: movdqu 784(<input_0=%rdi),>x1=%xmm7 7031movdqu 784(%rdi),%xmm7 7032 7033# qhasm: x2 = mem128[ input_0 + 800 ] 7034# asm 1: movdqu 800(<input_0=int64#1),>x2=reg128#9 7035# asm 2: movdqu 800(<input_0=%rdi),>x2=%xmm8 7036movdqu 800(%rdi),%xmm8 7037 7038# qhasm: x3 = mem128[ input_0 + 816 ] 7039# asm 1: movdqu 816(<input_0=int64#1),>x3=reg128#10 7040# asm 2: movdqu 816(<input_0=%rdi),>x3=%xmm9 7041movdqu 816(%rdi),%xmm9 7042 7043# qhasm: x4 = mem128[ input_0 + 832 ] 7044# asm 1: movdqu 832(<input_0=int64#1),>x4=reg128#11 7045# asm 2: movdqu 832(<input_0=%rdi),>x4=%xmm10 7046movdqu 832(%rdi),%xmm10 7047 7048# qhasm: x5 = mem128[ input_0 + 848 ] 7049# asm 1: movdqu 848(<input_0=int64#1),>x5=reg128#12 7050# asm 2: movdqu 848(<input_0=%rdi),>x5=%xmm11 7051movdqu 848(%rdi),%xmm11 7052 7053# qhasm: x6 = mem128[ input_0 + 864 ] 7054# asm 1: movdqu 864(<input_0=int64#1),>x6=reg128#13 7055# asm 2: movdqu 864(<input_0=%rdi),>x6=%xmm12 7056movdqu 864(%rdi),%xmm12 7057 7058# qhasm: x7 = mem128[ input_0 + 880 ] 7059# asm 1: movdqu 880(<input_0=int64#1),>x7=reg128#14 7060# asm 2: movdqu 880(<input_0=%rdi),>x7=%xmm13 7061movdqu 880(%rdi),%xmm13 7062 7063# qhasm: v00 = x0 & mask0 7064# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 7065# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 7066vpand %xmm0,%xmm6,%xmm14 7067 7068# qhasm: v10 = x4 & mask0 7069# asm 1: vpand <mask0=reg128#1,<x4=reg128#11,>v10=reg128#16 7070# asm 2: vpand <mask0=%xmm0,<x4=%xmm10,>v10=%xmm15 7071vpand %xmm0,%xmm10,%xmm15 7072 7073# qhasm: 2x v10 <<= 4 7074# asm 1: psllq $4,<v10=reg128#16 7075# asm 2: psllq $4,<v10=%xmm15 7076psllq $4,%xmm15 7077 7078# qhasm: v01 = x0 & mask1 7079# asm 1: vpand <mask1=reg128#2,<x0=reg128#7,>v01=reg128#7 7080# asm 2: vpand <mask1=%xmm1,<x0=%xmm6,>v01=%xmm6 7081vpand %xmm1,%xmm6,%xmm6 7082 7083# qhasm: v11 = x4 & mask1 7084# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 7085# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 7086vpand %xmm1,%xmm10,%xmm10 7087 7088# qhasm: 2x v01 unsigned>>= 4 7089# asm 1: psrlq $4,<v01=reg128#7 7090# asm 2: psrlq $4,<v01=%xmm6 7091psrlq $4,%xmm6 7092 7093# qhasm: x0 = v00 | v10 7094# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 7095# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 7096vpor %xmm15,%xmm14,%xmm14 7097 7098# qhasm: x4 = v01 | v11 7099# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 7100# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 7101vpor %xmm10,%xmm6,%xmm6 7102 7103# qhasm: v00 = x1 & mask0 7104# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 7105# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 7106vpand %xmm0,%xmm7,%xmm10 7107 7108# qhasm: v10 = x5 & mask0 7109# asm 1: vpand <mask0=reg128#1,<x5=reg128#12,>v10=reg128#16 7110# asm 2: vpand <mask0=%xmm0,<x5=%xmm11,>v10=%xmm15 7111vpand %xmm0,%xmm11,%xmm15 7112 7113# qhasm: 2x v10 <<= 4 7114# asm 1: psllq $4,<v10=reg128#16 7115# asm 2: psllq $4,<v10=%xmm15 7116psllq $4,%xmm15 7117 7118# qhasm: v01 = x1 & mask1 7119# asm 1: vpand <mask1=reg128#2,<x1=reg128#8,>v01=reg128#8 7120# asm 2: vpand <mask1=%xmm1,<x1=%xmm7,>v01=%xmm7 7121vpand %xmm1,%xmm7,%xmm7 7122 7123# qhasm: v11 = x5 & mask1 7124# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 7125# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 7126vpand %xmm1,%xmm11,%xmm11 7127 7128# qhasm: 2x v01 unsigned>>= 4 7129# asm 1: psrlq $4,<v01=reg128#8 7130# asm 2: psrlq $4,<v01=%xmm7 7131psrlq $4,%xmm7 7132 7133# qhasm: x1 = v00 | v10 7134# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 7135# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 7136vpor %xmm15,%xmm10,%xmm10 7137 7138# qhasm: x5 = v01 | v11 7139# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 7140# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 7141vpor %xmm11,%xmm7,%xmm7 7142 7143# qhasm: v00 = x2 & mask0 7144# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 7145# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 7146vpand %xmm0,%xmm8,%xmm11 7147 7148# qhasm: v10 = x6 & mask0 7149# asm 1: vpand <mask0=reg128#1,<x6=reg128#13,>v10=reg128#16 7150# asm 2: vpand <mask0=%xmm0,<x6=%xmm12,>v10=%xmm15 7151vpand %xmm0,%xmm12,%xmm15 7152 7153# qhasm: 2x v10 <<= 4 7154# asm 1: psllq $4,<v10=reg128#16 7155# asm 2: psllq $4,<v10=%xmm15 7156psllq $4,%xmm15 7157 7158# qhasm: v01 = x2 & mask1 7159# asm 1: vpand <mask1=reg128#2,<x2=reg128#9,>v01=reg128#9 7160# asm 2: vpand <mask1=%xmm1,<x2=%xmm8,>v01=%xmm8 7161vpand %xmm1,%xmm8,%xmm8 7162 7163# qhasm: v11 = x6 & mask1 7164# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 7165# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 7166vpand %xmm1,%xmm12,%xmm12 7167 7168# qhasm: 2x v01 unsigned>>= 4 7169# asm 1: psrlq $4,<v01=reg128#9 7170# asm 2: psrlq $4,<v01=%xmm8 7171psrlq $4,%xmm8 7172 7173# qhasm: x2 = v00 | v10 7174# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 7175# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 7176vpor %xmm15,%xmm11,%xmm11 7177 7178# qhasm: x6 = v01 | v11 7179# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 7180# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 7181vpor %xmm12,%xmm8,%xmm8 7182 7183# qhasm: v00 = x3 & mask0 7184# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 7185# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 7186vpand %xmm0,%xmm9,%xmm12 7187 7188# qhasm: v10 = x7 & mask0 7189# asm 1: vpand <mask0=reg128#1,<x7=reg128#14,>v10=reg128#16 7190# asm 2: vpand <mask0=%xmm0,<x7=%xmm13,>v10=%xmm15 7191vpand %xmm0,%xmm13,%xmm15 7192 7193# qhasm: 2x v10 <<= 4 7194# asm 1: psllq $4,<v10=reg128#16 7195# asm 2: psllq $4,<v10=%xmm15 7196psllq $4,%xmm15 7197 7198# qhasm: v01 = x3 & mask1 7199# asm 1: vpand <mask1=reg128#2,<x3=reg128#10,>v01=reg128#10 7200# asm 2: vpand <mask1=%xmm1,<x3=%xmm9,>v01=%xmm9 7201vpand %xmm1,%xmm9,%xmm9 7202 7203# qhasm: v11 = x7 & mask1 7204# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#14 7205# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm13 7206vpand %xmm1,%xmm13,%xmm13 7207 7208# qhasm: 2x v01 unsigned>>= 4 7209# asm 1: psrlq $4,<v01=reg128#10 7210# asm 2: psrlq $4,<v01=%xmm9 7211psrlq $4,%xmm9 7212 7213# qhasm: x3 = v00 | v10 7214# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x3=reg128#13 7215# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x3=%xmm12 7216vpor %xmm15,%xmm12,%xmm12 7217 7218# qhasm: x7 = v01 | v11 7219# asm 1: vpor <v11=reg128#14,<v01=reg128#10,>x7=reg128#10 7220# asm 2: vpor <v11=%xmm13,<v01=%xmm9,>x7=%xmm9 7221vpor %xmm13,%xmm9,%xmm9 7222 7223# qhasm: v00 = x0 & mask2 7224# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#14 7225# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm13 7226vpand %xmm2,%xmm14,%xmm13 7227 7228# qhasm: v10 = x2 & mask2 7229# asm 1: vpand <mask2=reg128#3,<x2=reg128#12,>v10=reg128#16 7230# asm 2: vpand <mask2=%xmm2,<x2=%xmm11,>v10=%xmm15 7231vpand %xmm2,%xmm11,%xmm15 7232 7233# qhasm: 2x v10 <<= 2 7234# asm 1: psllq $2,<v10=reg128#16 7235# asm 2: psllq $2,<v10=%xmm15 7236psllq $2,%xmm15 7237 7238# qhasm: v01 = x0 & mask3 7239# asm 1: vpand <mask3=reg128#4,<x0=reg128#15,>v01=reg128#15 7240# asm 2: vpand <mask3=%xmm3,<x0=%xmm14,>v01=%xmm14 7241vpand %xmm3,%xmm14,%xmm14 7242 7243# qhasm: v11 = x2 & mask3 7244# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 7245# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 7246vpand %xmm3,%xmm11,%xmm11 7247 7248# qhasm: 2x v01 unsigned>>= 2 7249# asm 1: psrlq $2,<v01=reg128#15 7250# asm 2: psrlq $2,<v01=%xmm14 7251psrlq $2,%xmm14 7252 7253# qhasm: x0 = v00 | v10 7254# asm 1: vpor <v10=reg128#16,<v00=reg128#14,>x0=reg128#14 7255# asm 2: vpor <v10=%xmm15,<v00=%xmm13,>x0=%xmm13 7256vpor %xmm15,%xmm13,%xmm13 7257 7258# qhasm: x2 = v01 | v11 7259# asm 1: vpor <v11=reg128#12,<v01=reg128#15,>x2=reg128#12 7260# asm 2: vpor <v11=%xmm11,<v01=%xmm14,>x2=%xmm11 7261vpor %xmm11,%xmm14,%xmm11 7262 7263# qhasm: v00 = x1 & mask2 7264# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#15 7265# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm14 7266vpand %xmm2,%xmm10,%xmm14 7267 7268# qhasm: v10 = x3 & mask2 7269# asm 1: vpand <mask2=reg128#3,<x3=reg128#13,>v10=reg128#16 7270# asm 2: vpand <mask2=%xmm2,<x3=%xmm12,>v10=%xmm15 7271vpand %xmm2,%xmm12,%xmm15 7272 7273# qhasm: 2x v10 <<= 2 7274# asm 1: psllq $2,<v10=reg128#16 7275# asm 2: psllq $2,<v10=%xmm15 7276psllq $2,%xmm15 7277 7278# qhasm: v01 = x1 & mask3 7279# asm 1: vpand <mask3=reg128#4,<x1=reg128#11,>v01=reg128#11 7280# asm 2: vpand <mask3=%xmm3,<x1=%xmm10,>v01=%xmm10 7281vpand %xmm3,%xmm10,%xmm10 7282 7283# qhasm: v11 = x3 & mask3 7284# asm 1: vpand <mask3=reg128#4,<x3=reg128#13,>v11=reg128#13 7285# asm 2: vpand <mask3=%xmm3,<x3=%xmm12,>v11=%xmm12 7286vpand %xmm3,%xmm12,%xmm12 7287 7288# qhasm: 2x v01 unsigned>>= 2 7289# asm 1: psrlq $2,<v01=reg128#11 7290# asm 2: psrlq $2,<v01=%xmm10 7291psrlq $2,%xmm10 7292 7293# qhasm: x1 = v00 | v10 7294# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x1=reg128#15 7295# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x1=%xmm14 7296vpor %xmm15,%xmm14,%xmm14 7297 7298# qhasm: x3 = v01 | v11 7299# asm 1: vpor <v11=reg128#13,<v01=reg128#11,>x3=reg128#11 7300# asm 2: vpor <v11=%xmm12,<v01=%xmm10,>x3=%xmm10 7301vpor %xmm12,%xmm10,%xmm10 7302 7303# qhasm: v00 = x4 & mask2 7304# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#13 7305# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm12 7306vpand %xmm2,%xmm6,%xmm12 7307 7308# qhasm: v10 = x6 & mask2 7309# asm 1: vpand <mask2=reg128#3,<x6=reg128#9,>v10=reg128#16 7310# asm 2: vpand <mask2=%xmm2,<x6=%xmm8,>v10=%xmm15 7311vpand %xmm2,%xmm8,%xmm15 7312 7313# qhasm: 2x v10 <<= 2 7314# asm 1: psllq $2,<v10=reg128#16 7315# asm 2: psllq $2,<v10=%xmm15 7316psllq $2,%xmm15 7317 7318# qhasm: v01 = x4 & mask3 7319# asm 1: vpand <mask3=reg128#4,<x4=reg128#7,>v01=reg128#7 7320# asm 2: vpand <mask3=%xmm3,<x4=%xmm6,>v01=%xmm6 7321vpand %xmm3,%xmm6,%xmm6 7322 7323# qhasm: v11 = x6 & mask3 7324# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 7325# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 7326vpand %xmm3,%xmm8,%xmm8 7327 7328# qhasm: 2x v01 unsigned>>= 2 7329# asm 1: psrlq $2,<v01=reg128#7 7330# asm 2: psrlq $2,<v01=%xmm6 7331psrlq $2,%xmm6 7332 7333# qhasm: x4 = v00 | v10 7334# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x4=reg128#13 7335# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x4=%xmm12 7336vpor %xmm15,%xmm12,%xmm12 7337 7338# qhasm: x6 = v01 | v11 7339# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 7340# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 7341vpor %xmm8,%xmm6,%xmm6 7342 7343# qhasm: v00 = x5 & mask2 7344# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 7345# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 7346vpand %xmm2,%xmm7,%xmm8 7347 7348# qhasm: v10 = x7 & mask2 7349# asm 1: vpand <mask2=reg128#3,<x7=reg128#10,>v10=reg128#16 7350# asm 2: vpand <mask2=%xmm2,<x7=%xmm9,>v10=%xmm15 7351vpand %xmm2,%xmm9,%xmm15 7352 7353# qhasm: 2x v10 <<= 2 7354# asm 1: psllq $2,<v10=reg128#16 7355# asm 2: psllq $2,<v10=%xmm15 7356psllq $2,%xmm15 7357 7358# qhasm: v01 = x5 & mask3 7359# asm 1: vpand <mask3=reg128#4,<x5=reg128#8,>v01=reg128#8 7360# asm 2: vpand <mask3=%xmm3,<x5=%xmm7,>v01=%xmm7 7361vpand %xmm3,%xmm7,%xmm7 7362 7363# qhasm: v11 = x7 & mask3 7364# asm 1: vpand <mask3=reg128#4,<x7=reg128#10,>v11=reg128#10 7365# asm 2: vpand <mask3=%xmm3,<x7=%xmm9,>v11=%xmm9 7366vpand %xmm3,%xmm9,%xmm9 7367 7368# qhasm: 2x v01 unsigned>>= 2 7369# asm 1: psrlq $2,<v01=reg128#8 7370# asm 2: psrlq $2,<v01=%xmm7 7371psrlq $2,%xmm7 7372 7373# qhasm: x5 = v00 | v10 7374# asm 1: vpor <v10=reg128#16,<v00=reg128#9,>x5=reg128#9 7375# asm 2: vpor <v10=%xmm15,<v00=%xmm8,>x5=%xmm8 7376vpor %xmm15,%xmm8,%xmm8 7377 7378# qhasm: x7 = v01 | v11 7379# asm 1: vpor <v11=reg128#10,<v01=reg128#8,>x7=reg128#8 7380# asm 2: vpor <v11=%xmm9,<v01=%xmm7,>x7=%xmm7 7381vpor %xmm9,%xmm7,%xmm7 7382 7383# qhasm: v00 = x0 & mask4 7384# asm 1: vpand <mask4=reg128#5,<x0=reg128#14,>v00=reg128#10 7385# asm 2: vpand <mask4=%xmm4,<x0=%xmm13,>v00=%xmm9 7386vpand %xmm4,%xmm13,%xmm9 7387 7388# qhasm: v10 = x1 & mask4 7389# asm 1: vpand <mask4=reg128#5,<x1=reg128#15,>v10=reg128#16 7390# asm 2: vpand <mask4=%xmm4,<x1=%xmm14,>v10=%xmm15 7391vpand %xmm4,%xmm14,%xmm15 7392 7393# qhasm: 2x v10 <<= 1 7394# asm 1: psllq $1,<v10=reg128#16 7395# asm 2: psllq $1,<v10=%xmm15 7396psllq $1,%xmm15 7397 7398# qhasm: v01 = x0 & mask5 7399# asm 1: vpand <mask5=reg128#6,<x0=reg128#14,>v01=reg128#14 7400# asm 2: vpand <mask5=%xmm5,<x0=%xmm13,>v01=%xmm13 7401vpand %xmm5,%xmm13,%xmm13 7402 7403# qhasm: v11 = x1 & mask5 7404# asm 1: vpand <mask5=reg128#6,<x1=reg128#15,>v11=reg128#15 7405# asm 2: vpand <mask5=%xmm5,<x1=%xmm14,>v11=%xmm14 7406vpand %xmm5,%xmm14,%xmm14 7407 7408# qhasm: 2x v01 unsigned>>= 1 7409# asm 1: psrlq $1,<v01=reg128#14 7410# asm 2: psrlq $1,<v01=%xmm13 7411psrlq $1,%xmm13 7412 7413# qhasm: x0 = v00 | v10 7414# asm 1: vpor <v10=reg128#16,<v00=reg128#10,>x0=reg128#10 7415# asm 2: vpor <v10=%xmm15,<v00=%xmm9,>x0=%xmm9 7416vpor %xmm15,%xmm9,%xmm9 7417 7418# qhasm: x1 = v01 | v11 7419# asm 1: vpor <v11=reg128#15,<v01=reg128#14,>x1=reg128#14 7420# asm 2: vpor <v11=%xmm14,<v01=%xmm13,>x1=%xmm13 7421vpor %xmm14,%xmm13,%xmm13 7422 7423# qhasm: v00 = x2 & mask4 7424# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#15 7425# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm14 7426vpand %xmm4,%xmm11,%xmm14 7427 7428# qhasm: v10 = x3 & mask4 7429# asm 1: vpand <mask4=reg128#5,<x3=reg128#11,>v10=reg128#16 7430# asm 2: vpand <mask4=%xmm4,<x3=%xmm10,>v10=%xmm15 7431vpand %xmm4,%xmm10,%xmm15 7432 7433# qhasm: 2x v10 <<= 1 7434# asm 1: psllq $1,<v10=reg128#16 7435# asm 2: psllq $1,<v10=%xmm15 7436psllq $1,%xmm15 7437 7438# qhasm: v01 = x2 & mask5 7439# asm 1: vpand <mask5=reg128#6,<x2=reg128#12,>v01=reg128#12 7440# asm 2: vpand <mask5=%xmm5,<x2=%xmm11,>v01=%xmm11 7441vpand %xmm5,%xmm11,%xmm11 7442 7443# qhasm: v11 = x3 & mask5 7444# asm 1: vpand <mask5=reg128#6,<x3=reg128#11,>v11=reg128#11 7445# asm 2: vpand <mask5=%xmm5,<x3=%xmm10,>v11=%xmm10 7446vpand %xmm5,%xmm10,%xmm10 7447 7448# qhasm: 2x v01 unsigned>>= 1 7449# asm 1: psrlq $1,<v01=reg128#12 7450# asm 2: psrlq $1,<v01=%xmm11 7451psrlq $1,%xmm11 7452 7453# qhasm: x2 = v00 | v10 7454# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x2=reg128#15 7455# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x2=%xmm14 7456vpor %xmm15,%xmm14,%xmm14 7457 7458# qhasm: x3 = v01 | v11 7459# asm 1: vpor <v11=reg128#11,<v01=reg128#12,>x3=reg128#11 7460# asm 2: vpor <v11=%xmm10,<v01=%xmm11,>x3=%xmm10 7461vpor %xmm10,%xmm11,%xmm10 7462 7463# qhasm: v00 = x4 & mask4 7464# asm 1: vpand <mask4=reg128#5,<x4=reg128#13,>v00=reg128#12 7465# asm 2: vpand <mask4=%xmm4,<x4=%xmm12,>v00=%xmm11 7466vpand %xmm4,%xmm12,%xmm11 7467 7468# qhasm: v10 = x5 & mask4 7469# asm 1: vpand <mask4=reg128#5,<x5=reg128#9,>v10=reg128#16 7470# asm 2: vpand <mask4=%xmm4,<x5=%xmm8,>v10=%xmm15 7471vpand %xmm4,%xmm8,%xmm15 7472 7473# qhasm: 2x v10 <<= 1 7474# asm 1: psllq $1,<v10=reg128#16 7475# asm 2: psllq $1,<v10=%xmm15 7476psllq $1,%xmm15 7477 7478# qhasm: v01 = x4 & mask5 7479# asm 1: vpand <mask5=reg128#6,<x4=reg128#13,>v01=reg128#13 7480# asm 2: vpand <mask5=%xmm5,<x4=%xmm12,>v01=%xmm12 7481vpand %xmm5,%xmm12,%xmm12 7482 7483# qhasm: v11 = x5 & mask5 7484# asm 1: vpand <mask5=reg128#6,<x5=reg128#9,>v11=reg128#9 7485# asm 2: vpand <mask5=%xmm5,<x5=%xmm8,>v11=%xmm8 7486vpand %xmm5,%xmm8,%xmm8 7487 7488# qhasm: 2x v01 unsigned>>= 1 7489# asm 1: psrlq $1,<v01=reg128#13 7490# asm 2: psrlq $1,<v01=%xmm12 7491psrlq $1,%xmm12 7492 7493# qhasm: x4 = v00 | v10 7494# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x4=reg128#12 7495# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x4=%xmm11 7496vpor %xmm15,%xmm11,%xmm11 7497 7498# qhasm: x5 = v01 | v11 7499# asm 1: vpor <v11=reg128#9,<v01=reg128#13,>x5=reg128#9 7500# asm 2: vpor <v11=%xmm8,<v01=%xmm12,>x5=%xmm8 7501vpor %xmm8,%xmm12,%xmm8 7502 7503# qhasm: v00 = x6 & mask4 7504# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#13 7505# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm12 7506vpand %xmm4,%xmm6,%xmm12 7507 7508# qhasm: v10 = x7 & mask4 7509# asm 1: vpand <mask4=reg128#5,<x7=reg128#8,>v10=reg128#16 7510# asm 2: vpand <mask4=%xmm4,<x7=%xmm7,>v10=%xmm15 7511vpand %xmm4,%xmm7,%xmm15 7512 7513# qhasm: 2x v10 <<= 1 7514# asm 1: psllq $1,<v10=reg128#16 7515# asm 2: psllq $1,<v10=%xmm15 7516psllq $1,%xmm15 7517 7518# qhasm: v01 = x6 & mask5 7519# asm 1: vpand <mask5=reg128#6,<x6=reg128#7,>v01=reg128#7 7520# asm 2: vpand <mask5=%xmm5,<x6=%xmm6,>v01=%xmm6 7521vpand %xmm5,%xmm6,%xmm6 7522 7523# qhasm: v11 = x7 & mask5 7524# asm 1: vpand <mask5=reg128#6,<x7=reg128#8,>v11=reg128#8 7525# asm 2: vpand <mask5=%xmm5,<x7=%xmm7,>v11=%xmm7 7526vpand %xmm5,%xmm7,%xmm7 7527 7528# qhasm: 2x v01 unsigned>>= 1 7529# asm 1: psrlq $1,<v01=reg128#7 7530# asm 2: psrlq $1,<v01=%xmm6 7531psrlq $1,%xmm6 7532 7533# qhasm: x6 = v00 | v10 7534# asm 1: vpor <v10=reg128#16,<v00=reg128#13,>x6=reg128#13 7535# asm 2: vpor <v10=%xmm15,<v00=%xmm12,>x6=%xmm12 7536vpor %xmm15,%xmm12,%xmm12 7537 7538# qhasm: x7 = v01 | v11 7539# asm 1: vpor <v11=reg128#8,<v01=reg128#7,>x7=reg128#7 7540# asm 2: vpor <v11=%xmm7,<v01=%xmm6,>x7=%xmm6 7541vpor %xmm7,%xmm6,%xmm6 7542 7543# qhasm: mem128[ input_0 + 768 ] = x0 7544# asm 1: movdqu <x0=reg128#10,768(<input_0=int64#1) 7545# asm 2: movdqu <x0=%xmm9,768(<input_0=%rdi) 7546movdqu %xmm9,768(%rdi) 7547 7548# qhasm: mem128[ input_0 + 784 ] = x1 7549# asm 1: movdqu <x1=reg128#14,784(<input_0=int64#1) 7550# asm 2: movdqu <x1=%xmm13,784(<input_0=%rdi) 7551movdqu %xmm13,784(%rdi) 7552 7553# qhasm: mem128[ input_0 + 800 ] = x2 7554# asm 1: movdqu <x2=reg128#15,800(<input_0=int64#1) 7555# asm 2: movdqu <x2=%xmm14,800(<input_0=%rdi) 7556movdqu %xmm14,800(%rdi) 7557 7558# qhasm: mem128[ input_0 + 816 ] = x3 7559# asm 1: movdqu <x3=reg128#11,816(<input_0=int64#1) 7560# asm 2: movdqu <x3=%xmm10,816(<input_0=%rdi) 7561movdqu %xmm10,816(%rdi) 7562 7563# qhasm: mem128[ input_0 + 832 ] = x4 7564# asm 1: movdqu <x4=reg128#12,832(<input_0=int64#1) 7565# asm 2: movdqu <x4=%xmm11,832(<input_0=%rdi) 7566movdqu %xmm11,832(%rdi) 7567 7568# qhasm: mem128[ input_0 + 848 ] = x5 7569# asm 1: movdqu <x5=reg128#9,848(<input_0=int64#1) 7570# asm 2: movdqu <x5=%xmm8,848(<input_0=%rdi) 7571movdqu %xmm8,848(%rdi) 7572 7573# qhasm: mem128[ input_0 + 864 ] = x6 7574# asm 1: movdqu <x6=reg128#13,864(<input_0=int64#1) 7575# asm 2: movdqu <x6=%xmm12,864(<input_0=%rdi) 7576movdqu %xmm12,864(%rdi) 7577 7578# qhasm: mem128[ input_0 + 880 ] = x7 7579# asm 1: movdqu <x7=reg128#7,880(<input_0=int64#1) 7580# asm 2: movdqu <x7=%xmm6,880(<input_0=%rdi) 7581movdqu %xmm6,880(%rdi) 7582 7583# qhasm: x0 = mem128[ input_0 + 896 ] 7584# asm 1: movdqu 896(<input_0=int64#1),>x0=reg128#7 7585# asm 2: movdqu 896(<input_0=%rdi),>x0=%xmm6 7586movdqu 896(%rdi),%xmm6 7587 7588# qhasm: x1 = mem128[ input_0 + 912 ] 7589# asm 1: movdqu 912(<input_0=int64#1),>x1=reg128#8 7590# asm 2: movdqu 912(<input_0=%rdi),>x1=%xmm7 7591movdqu 912(%rdi),%xmm7 7592 7593# qhasm: x2 = mem128[ input_0 + 928 ] 7594# asm 1: movdqu 928(<input_0=int64#1),>x2=reg128#9 7595# asm 2: movdqu 928(<input_0=%rdi),>x2=%xmm8 7596movdqu 928(%rdi),%xmm8 7597 7598# qhasm: x3 = mem128[ input_0 + 944 ] 7599# asm 1: movdqu 944(<input_0=int64#1),>x3=reg128#10 7600# asm 2: movdqu 944(<input_0=%rdi),>x3=%xmm9 7601movdqu 944(%rdi),%xmm9 7602 7603# qhasm: x4 = mem128[ input_0 + 960 ] 7604# asm 1: movdqu 960(<input_0=int64#1),>x4=reg128#11 7605# asm 2: movdqu 960(<input_0=%rdi),>x4=%xmm10 7606movdqu 960(%rdi),%xmm10 7607 7608# qhasm: x5 = mem128[ input_0 + 976 ] 7609# asm 1: movdqu 976(<input_0=int64#1),>x5=reg128#12 7610# asm 2: movdqu 976(<input_0=%rdi),>x5=%xmm11 7611movdqu 976(%rdi),%xmm11 7612 7613# qhasm: x6 = mem128[ input_0 + 992 ] 7614# asm 1: movdqu 992(<input_0=int64#1),>x6=reg128#13 7615# asm 2: movdqu 992(<input_0=%rdi),>x6=%xmm12 7616movdqu 992(%rdi),%xmm12 7617 7618# qhasm: x7 = mem128[ input_0 + 1008 ] 7619# asm 1: movdqu 1008(<input_0=int64#1),>x7=reg128#14 7620# asm 2: movdqu 1008(<input_0=%rdi),>x7=%xmm13 7621movdqu 1008(%rdi),%xmm13 7622 7623# qhasm: v00 = x0 & mask0 7624# asm 1: vpand <mask0=reg128#1,<x0=reg128#7,>v00=reg128#15 7625# asm 2: vpand <mask0=%xmm0,<x0=%xmm6,>v00=%xmm14 7626vpand %xmm0,%xmm6,%xmm14 7627 7628# qhasm: v10 = x4 & mask0 7629# asm 1: vpand <mask0=reg128#1,<x4=reg128#11,>v10=reg128#16 7630# asm 2: vpand <mask0=%xmm0,<x4=%xmm10,>v10=%xmm15 7631vpand %xmm0,%xmm10,%xmm15 7632 7633# qhasm: 2x v10 <<= 4 7634# asm 1: psllq $4,<v10=reg128#16 7635# asm 2: psllq $4,<v10=%xmm15 7636psllq $4,%xmm15 7637 7638# qhasm: v01 = x0 & mask1 7639# asm 1: vpand <mask1=reg128#2,<x0=reg128#7,>v01=reg128#7 7640# asm 2: vpand <mask1=%xmm1,<x0=%xmm6,>v01=%xmm6 7641vpand %xmm1,%xmm6,%xmm6 7642 7643# qhasm: v11 = x4 & mask1 7644# asm 1: vpand <mask1=reg128#2,<x4=reg128#11,>v11=reg128#11 7645# asm 2: vpand <mask1=%xmm1,<x4=%xmm10,>v11=%xmm10 7646vpand %xmm1,%xmm10,%xmm10 7647 7648# qhasm: 2x v01 unsigned>>= 4 7649# asm 1: psrlq $4,<v01=reg128#7 7650# asm 2: psrlq $4,<v01=%xmm6 7651psrlq $4,%xmm6 7652 7653# qhasm: x0 = v00 | v10 7654# asm 1: vpor <v10=reg128#16,<v00=reg128#15,>x0=reg128#15 7655# asm 2: vpor <v10=%xmm15,<v00=%xmm14,>x0=%xmm14 7656vpor %xmm15,%xmm14,%xmm14 7657 7658# qhasm: x4 = v01 | v11 7659# asm 1: vpor <v11=reg128#11,<v01=reg128#7,>x4=reg128#7 7660# asm 2: vpor <v11=%xmm10,<v01=%xmm6,>x4=%xmm6 7661vpor %xmm10,%xmm6,%xmm6 7662 7663# qhasm: v00 = x1 & mask0 7664# asm 1: vpand <mask0=reg128#1,<x1=reg128#8,>v00=reg128#11 7665# asm 2: vpand <mask0=%xmm0,<x1=%xmm7,>v00=%xmm10 7666vpand %xmm0,%xmm7,%xmm10 7667 7668# qhasm: v10 = x5 & mask0 7669# asm 1: vpand <mask0=reg128#1,<x5=reg128#12,>v10=reg128#16 7670# asm 2: vpand <mask0=%xmm0,<x5=%xmm11,>v10=%xmm15 7671vpand %xmm0,%xmm11,%xmm15 7672 7673# qhasm: 2x v10 <<= 4 7674# asm 1: psllq $4,<v10=reg128#16 7675# asm 2: psllq $4,<v10=%xmm15 7676psllq $4,%xmm15 7677 7678# qhasm: v01 = x1 & mask1 7679# asm 1: vpand <mask1=reg128#2,<x1=reg128#8,>v01=reg128#8 7680# asm 2: vpand <mask1=%xmm1,<x1=%xmm7,>v01=%xmm7 7681vpand %xmm1,%xmm7,%xmm7 7682 7683# qhasm: v11 = x5 & mask1 7684# asm 1: vpand <mask1=reg128#2,<x5=reg128#12,>v11=reg128#12 7685# asm 2: vpand <mask1=%xmm1,<x5=%xmm11,>v11=%xmm11 7686vpand %xmm1,%xmm11,%xmm11 7687 7688# qhasm: 2x v01 unsigned>>= 4 7689# asm 1: psrlq $4,<v01=reg128#8 7690# asm 2: psrlq $4,<v01=%xmm7 7691psrlq $4,%xmm7 7692 7693# qhasm: x1 = v00 | v10 7694# asm 1: vpor <v10=reg128#16,<v00=reg128#11,>x1=reg128#11 7695# asm 2: vpor <v10=%xmm15,<v00=%xmm10,>x1=%xmm10 7696vpor %xmm15,%xmm10,%xmm10 7697 7698# qhasm: x5 = v01 | v11 7699# asm 1: vpor <v11=reg128#12,<v01=reg128#8,>x5=reg128#8 7700# asm 2: vpor <v11=%xmm11,<v01=%xmm7,>x5=%xmm7 7701vpor %xmm11,%xmm7,%xmm7 7702 7703# qhasm: v00 = x2 & mask0 7704# asm 1: vpand <mask0=reg128#1,<x2=reg128#9,>v00=reg128#12 7705# asm 2: vpand <mask0=%xmm0,<x2=%xmm8,>v00=%xmm11 7706vpand %xmm0,%xmm8,%xmm11 7707 7708# qhasm: v10 = x6 & mask0 7709# asm 1: vpand <mask0=reg128#1,<x6=reg128#13,>v10=reg128#16 7710# asm 2: vpand <mask0=%xmm0,<x6=%xmm12,>v10=%xmm15 7711vpand %xmm0,%xmm12,%xmm15 7712 7713# qhasm: 2x v10 <<= 4 7714# asm 1: psllq $4,<v10=reg128#16 7715# asm 2: psllq $4,<v10=%xmm15 7716psllq $4,%xmm15 7717 7718# qhasm: v01 = x2 & mask1 7719# asm 1: vpand <mask1=reg128#2,<x2=reg128#9,>v01=reg128#9 7720# asm 2: vpand <mask1=%xmm1,<x2=%xmm8,>v01=%xmm8 7721vpand %xmm1,%xmm8,%xmm8 7722 7723# qhasm: v11 = x6 & mask1 7724# asm 1: vpand <mask1=reg128#2,<x6=reg128#13,>v11=reg128#13 7725# asm 2: vpand <mask1=%xmm1,<x6=%xmm12,>v11=%xmm12 7726vpand %xmm1,%xmm12,%xmm12 7727 7728# qhasm: 2x v01 unsigned>>= 4 7729# asm 1: psrlq $4,<v01=reg128#9 7730# asm 2: psrlq $4,<v01=%xmm8 7731psrlq $4,%xmm8 7732 7733# qhasm: x2 = v00 | v10 7734# asm 1: vpor <v10=reg128#16,<v00=reg128#12,>x2=reg128#12 7735# asm 2: vpor <v10=%xmm15,<v00=%xmm11,>x2=%xmm11 7736vpor %xmm15,%xmm11,%xmm11 7737 7738# qhasm: x6 = v01 | v11 7739# asm 1: vpor <v11=reg128#13,<v01=reg128#9,>x6=reg128#9 7740# asm 2: vpor <v11=%xmm12,<v01=%xmm8,>x6=%xmm8 7741vpor %xmm12,%xmm8,%xmm8 7742 7743# qhasm: v00 = x3 & mask0 7744# asm 1: vpand <mask0=reg128#1,<x3=reg128#10,>v00=reg128#13 7745# asm 2: vpand <mask0=%xmm0,<x3=%xmm9,>v00=%xmm12 7746vpand %xmm0,%xmm9,%xmm12 7747 7748# qhasm: v10 = x7 & mask0 7749# asm 1: vpand <mask0=reg128#1,<x7=reg128#14,>v10=reg128#1 7750# asm 2: vpand <mask0=%xmm0,<x7=%xmm13,>v10=%xmm0 7751vpand %xmm0,%xmm13,%xmm0 7752 7753# qhasm: 2x v10 <<= 4 7754# asm 1: psllq $4,<v10=reg128#1 7755# asm 2: psllq $4,<v10=%xmm0 7756psllq $4,%xmm0 7757 7758# qhasm: v01 = x3 & mask1 7759# asm 1: vpand <mask1=reg128#2,<x3=reg128#10,>v01=reg128#10 7760# asm 2: vpand <mask1=%xmm1,<x3=%xmm9,>v01=%xmm9 7761vpand %xmm1,%xmm9,%xmm9 7762 7763# qhasm: v11 = x7 & mask1 7764# asm 1: vpand <mask1=reg128#2,<x7=reg128#14,>v11=reg128#2 7765# asm 2: vpand <mask1=%xmm1,<x7=%xmm13,>v11=%xmm1 7766vpand %xmm1,%xmm13,%xmm1 7767 7768# qhasm: 2x v01 unsigned>>= 4 7769# asm 1: psrlq $4,<v01=reg128#10 7770# asm 2: psrlq $4,<v01=%xmm9 7771psrlq $4,%xmm9 7772 7773# qhasm: x3 = v00 | v10 7774# asm 1: vpor <v10=reg128#1,<v00=reg128#13,>x3=reg128#1 7775# asm 2: vpor <v10=%xmm0,<v00=%xmm12,>x3=%xmm0 7776vpor %xmm0,%xmm12,%xmm0 7777 7778# qhasm: x7 = v01 | v11 7779# asm 1: vpor <v11=reg128#2,<v01=reg128#10,>x7=reg128#2 7780# asm 2: vpor <v11=%xmm1,<v01=%xmm9,>x7=%xmm1 7781vpor %xmm1,%xmm9,%xmm1 7782 7783# qhasm: v00 = x0 & mask2 7784# asm 1: vpand <mask2=reg128#3,<x0=reg128#15,>v00=reg128#10 7785# asm 2: vpand <mask2=%xmm2,<x0=%xmm14,>v00=%xmm9 7786vpand %xmm2,%xmm14,%xmm9 7787 7788# qhasm: v10 = x2 & mask2 7789# asm 1: vpand <mask2=reg128#3,<x2=reg128#12,>v10=reg128#13 7790# asm 2: vpand <mask2=%xmm2,<x2=%xmm11,>v10=%xmm12 7791vpand %xmm2,%xmm11,%xmm12 7792 7793# qhasm: 2x v10 <<= 2 7794# asm 1: psllq $2,<v10=reg128#13 7795# asm 2: psllq $2,<v10=%xmm12 7796psllq $2,%xmm12 7797 7798# qhasm: v01 = x0 & mask3 7799# asm 1: vpand <mask3=reg128#4,<x0=reg128#15,>v01=reg128#14 7800# asm 2: vpand <mask3=%xmm3,<x0=%xmm14,>v01=%xmm13 7801vpand %xmm3,%xmm14,%xmm13 7802 7803# qhasm: v11 = x2 & mask3 7804# asm 1: vpand <mask3=reg128#4,<x2=reg128#12,>v11=reg128#12 7805# asm 2: vpand <mask3=%xmm3,<x2=%xmm11,>v11=%xmm11 7806vpand %xmm3,%xmm11,%xmm11 7807 7808# qhasm: 2x v01 unsigned>>= 2 7809# asm 1: psrlq $2,<v01=reg128#14 7810# asm 2: psrlq $2,<v01=%xmm13 7811psrlq $2,%xmm13 7812 7813# qhasm: x0 = v00 | v10 7814# asm 1: vpor <v10=reg128#13,<v00=reg128#10,>x0=reg128#10 7815# asm 2: vpor <v10=%xmm12,<v00=%xmm9,>x0=%xmm9 7816vpor %xmm12,%xmm9,%xmm9 7817 7818# qhasm: x2 = v01 | v11 7819# asm 1: vpor <v11=reg128#12,<v01=reg128#14,>x2=reg128#12 7820# asm 2: vpor <v11=%xmm11,<v01=%xmm13,>x2=%xmm11 7821vpor %xmm11,%xmm13,%xmm11 7822 7823# qhasm: v00 = x1 & mask2 7824# asm 1: vpand <mask2=reg128#3,<x1=reg128#11,>v00=reg128#13 7825# asm 2: vpand <mask2=%xmm2,<x1=%xmm10,>v00=%xmm12 7826vpand %xmm2,%xmm10,%xmm12 7827 7828# qhasm: v10 = x3 & mask2 7829# asm 1: vpand <mask2=reg128#3,<x3=reg128#1,>v10=reg128#14 7830# asm 2: vpand <mask2=%xmm2,<x3=%xmm0,>v10=%xmm13 7831vpand %xmm2,%xmm0,%xmm13 7832 7833# qhasm: 2x v10 <<= 2 7834# asm 1: psllq $2,<v10=reg128#14 7835# asm 2: psllq $2,<v10=%xmm13 7836psllq $2,%xmm13 7837 7838# qhasm: v01 = x1 & mask3 7839# asm 1: vpand <mask3=reg128#4,<x1=reg128#11,>v01=reg128#11 7840# asm 2: vpand <mask3=%xmm3,<x1=%xmm10,>v01=%xmm10 7841vpand %xmm3,%xmm10,%xmm10 7842 7843# qhasm: v11 = x3 & mask3 7844# asm 1: vpand <mask3=reg128#4,<x3=reg128#1,>v11=reg128#1 7845# asm 2: vpand <mask3=%xmm3,<x3=%xmm0,>v11=%xmm0 7846vpand %xmm3,%xmm0,%xmm0 7847 7848# qhasm: 2x v01 unsigned>>= 2 7849# asm 1: psrlq $2,<v01=reg128#11 7850# asm 2: psrlq $2,<v01=%xmm10 7851psrlq $2,%xmm10 7852 7853# qhasm: x1 = v00 | v10 7854# asm 1: vpor <v10=reg128#14,<v00=reg128#13,>x1=reg128#13 7855# asm 2: vpor <v10=%xmm13,<v00=%xmm12,>x1=%xmm12 7856vpor %xmm13,%xmm12,%xmm12 7857 7858# qhasm: x3 = v01 | v11 7859# asm 1: vpor <v11=reg128#1,<v01=reg128#11,>x3=reg128#1 7860# asm 2: vpor <v11=%xmm0,<v01=%xmm10,>x3=%xmm0 7861vpor %xmm0,%xmm10,%xmm0 7862 7863# qhasm: v00 = x4 & mask2 7864# asm 1: vpand <mask2=reg128#3,<x4=reg128#7,>v00=reg128#11 7865# asm 2: vpand <mask2=%xmm2,<x4=%xmm6,>v00=%xmm10 7866vpand %xmm2,%xmm6,%xmm10 7867 7868# qhasm: v10 = x6 & mask2 7869# asm 1: vpand <mask2=reg128#3,<x6=reg128#9,>v10=reg128#14 7870# asm 2: vpand <mask2=%xmm2,<x6=%xmm8,>v10=%xmm13 7871vpand %xmm2,%xmm8,%xmm13 7872 7873# qhasm: 2x v10 <<= 2 7874# asm 1: psllq $2,<v10=reg128#14 7875# asm 2: psllq $2,<v10=%xmm13 7876psllq $2,%xmm13 7877 7878# qhasm: v01 = x4 & mask3 7879# asm 1: vpand <mask3=reg128#4,<x4=reg128#7,>v01=reg128#7 7880# asm 2: vpand <mask3=%xmm3,<x4=%xmm6,>v01=%xmm6 7881vpand %xmm3,%xmm6,%xmm6 7882 7883# qhasm: v11 = x6 & mask3 7884# asm 1: vpand <mask3=reg128#4,<x6=reg128#9,>v11=reg128#9 7885# asm 2: vpand <mask3=%xmm3,<x6=%xmm8,>v11=%xmm8 7886vpand %xmm3,%xmm8,%xmm8 7887 7888# qhasm: 2x v01 unsigned>>= 2 7889# asm 1: psrlq $2,<v01=reg128#7 7890# asm 2: psrlq $2,<v01=%xmm6 7891psrlq $2,%xmm6 7892 7893# qhasm: x4 = v00 | v10 7894# asm 1: vpor <v10=reg128#14,<v00=reg128#11,>x4=reg128#11 7895# asm 2: vpor <v10=%xmm13,<v00=%xmm10,>x4=%xmm10 7896vpor %xmm13,%xmm10,%xmm10 7897 7898# qhasm: x6 = v01 | v11 7899# asm 1: vpor <v11=reg128#9,<v01=reg128#7,>x6=reg128#7 7900# asm 2: vpor <v11=%xmm8,<v01=%xmm6,>x6=%xmm6 7901vpor %xmm8,%xmm6,%xmm6 7902 7903# qhasm: v00 = x5 & mask2 7904# asm 1: vpand <mask2=reg128#3,<x5=reg128#8,>v00=reg128#9 7905# asm 2: vpand <mask2=%xmm2,<x5=%xmm7,>v00=%xmm8 7906vpand %xmm2,%xmm7,%xmm8 7907 7908# qhasm: v10 = x7 & mask2 7909# asm 1: vpand <mask2=reg128#3,<x7=reg128#2,>v10=reg128#3 7910# asm 2: vpand <mask2=%xmm2,<x7=%xmm1,>v10=%xmm2 7911vpand %xmm2,%xmm1,%xmm2 7912 7913# qhasm: 2x v10 <<= 2 7914# asm 1: psllq $2,<v10=reg128#3 7915# asm 2: psllq $2,<v10=%xmm2 7916psllq $2,%xmm2 7917 7918# qhasm: v01 = x5 & mask3 7919# asm 1: vpand <mask3=reg128#4,<x5=reg128#8,>v01=reg128#8 7920# asm 2: vpand <mask3=%xmm3,<x5=%xmm7,>v01=%xmm7 7921vpand %xmm3,%xmm7,%xmm7 7922 7923# qhasm: v11 = x7 & mask3 7924# asm 1: vpand <mask3=reg128#4,<x7=reg128#2,>v11=reg128#2 7925# asm 2: vpand <mask3=%xmm3,<x7=%xmm1,>v11=%xmm1 7926vpand %xmm3,%xmm1,%xmm1 7927 7928# qhasm: 2x v01 unsigned>>= 2 7929# asm 1: psrlq $2,<v01=reg128#8 7930# asm 2: psrlq $2,<v01=%xmm7 7931psrlq $2,%xmm7 7932 7933# qhasm: x5 = v00 | v10 7934# asm 1: vpor <v10=reg128#3,<v00=reg128#9,>x5=reg128#3 7935# asm 2: vpor <v10=%xmm2,<v00=%xmm8,>x5=%xmm2 7936vpor %xmm2,%xmm8,%xmm2 7937 7938# qhasm: x7 = v01 | v11 7939# asm 1: vpor <v11=reg128#2,<v01=reg128#8,>x7=reg128#2 7940# asm 2: vpor <v11=%xmm1,<v01=%xmm7,>x7=%xmm1 7941vpor %xmm1,%xmm7,%xmm1 7942 7943# qhasm: v00 = x0 & mask4 7944# asm 1: vpand <mask4=reg128#5,<x0=reg128#10,>v00=reg128#4 7945# asm 2: vpand <mask4=%xmm4,<x0=%xmm9,>v00=%xmm3 7946vpand %xmm4,%xmm9,%xmm3 7947 7948# qhasm: v10 = x1 & mask4 7949# asm 1: vpand <mask4=reg128#5,<x1=reg128#13,>v10=reg128#8 7950# asm 2: vpand <mask4=%xmm4,<x1=%xmm12,>v10=%xmm7 7951vpand %xmm4,%xmm12,%xmm7 7952 7953# qhasm: 2x v10 <<= 1 7954# asm 1: psllq $1,<v10=reg128#8 7955# asm 2: psllq $1,<v10=%xmm7 7956psllq $1,%xmm7 7957 7958# qhasm: v01 = x0 & mask5 7959# asm 1: vpand <mask5=reg128#6,<x0=reg128#10,>v01=reg128#9 7960# asm 2: vpand <mask5=%xmm5,<x0=%xmm9,>v01=%xmm8 7961vpand %xmm5,%xmm9,%xmm8 7962 7963# qhasm: v11 = x1 & mask5 7964# asm 1: vpand <mask5=reg128#6,<x1=reg128#13,>v11=reg128#10 7965# asm 2: vpand <mask5=%xmm5,<x1=%xmm12,>v11=%xmm9 7966vpand %xmm5,%xmm12,%xmm9 7967 7968# qhasm: 2x v01 unsigned>>= 1 7969# asm 1: psrlq $1,<v01=reg128#9 7970# asm 2: psrlq $1,<v01=%xmm8 7971psrlq $1,%xmm8 7972 7973# qhasm: x0 = v00 | v10 7974# asm 1: vpor <v10=reg128#8,<v00=reg128#4,>x0=reg128#4 7975# asm 2: vpor <v10=%xmm7,<v00=%xmm3,>x0=%xmm3 7976vpor %xmm7,%xmm3,%xmm3 7977 7978# qhasm: x1 = v01 | v11 7979# asm 1: vpor <v11=reg128#10,<v01=reg128#9,>x1=reg128#8 7980# asm 2: vpor <v11=%xmm9,<v01=%xmm8,>x1=%xmm7 7981vpor %xmm9,%xmm8,%xmm7 7982 7983# qhasm: v00 = x2 & mask4 7984# asm 1: vpand <mask4=reg128#5,<x2=reg128#12,>v00=reg128#9 7985# asm 2: vpand <mask4=%xmm4,<x2=%xmm11,>v00=%xmm8 7986vpand %xmm4,%xmm11,%xmm8 7987 7988# qhasm: v10 = x3 & mask4 7989# asm 1: vpand <mask4=reg128#5,<x3=reg128#1,>v10=reg128#10 7990# asm 2: vpand <mask4=%xmm4,<x3=%xmm0,>v10=%xmm9 7991vpand %xmm4,%xmm0,%xmm9 7992 7993# qhasm: 2x v10 <<= 1 7994# asm 1: psllq $1,<v10=reg128#10 7995# asm 2: psllq $1,<v10=%xmm9 7996psllq $1,%xmm9 7997 7998# qhasm: v01 = x2 & mask5 7999# asm 1: vpand <mask5=reg128#6,<x2=reg128#12,>v01=reg128#12 8000# asm 2: vpand <mask5=%xmm5,<x2=%xmm11,>v01=%xmm11 8001vpand %xmm5,%xmm11,%xmm11 8002 8003# qhasm: v11 = x3 & mask5 8004# asm 1: vpand <mask5=reg128#6,<x3=reg128#1,>v11=reg128#1 8005# asm 2: vpand <mask5=%xmm5,<x3=%xmm0,>v11=%xmm0 8006vpand %xmm5,%xmm0,%xmm0 8007 8008# qhasm: 2x v01 unsigned>>= 1 8009# asm 1: psrlq $1,<v01=reg128#12 8010# asm 2: psrlq $1,<v01=%xmm11 8011psrlq $1,%xmm11 8012 8013# qhasm: x2 = v00 | v10 8014# asm 1: vpor <v10=reg128#10,<v00=reg128#9,>x2=reg128#9 8015# asm 2: vpor <v10=%xmm9,<v00=%xmm8,>x2=%xmm8 8016vpor %xmm9,%xmm8,%xmm8 8017 8018# qhasm: x3 = v01 | v11 8019# asm 1: vpor <v11=reg128#1,<v01=reg128#12,>x3=reg128#1 8020# asm 2: vpor <v11=%xmm0,<v01=%xmm11,>x3=%xmm0 8021vpor %xmm0,%xmm11,%xmm0 8022 8023# qhasm: v00 = x4 & mask4 8024# asm 1: vpand <mask4=reg128#5,<x4=reg128#11,>v00=reg128#10 8025# asm 2: vpand <mask4=%xmm4,<x4=%xmm10,>v00=%xmm9 8026vpand %xmm4,%xmm10,%xmm9 8027 8028# qhasm: v10 = x5 & mask4 8029# asm 1: vpand <mask4=reg128#5,<x5=reg128#3,>v10=reg128#12 8030# asm 2: vpand <mask4=%xmm4,<x5=%xmm2,>v10=%xmm11 8031vpand %xmm4,%xmm2,%xmm11 8032 8033# qhasm: 2x v10 <<= 1 8034# asm 1: psllq $1,<v10=reg128#12 8035# asm 2: psllq $1,<v10=%xmm11 8036psllq $1,%xmm11 8037 8038# qhasm: v01 = x4 & mask5 8039# asm 1: vpand <mask5=reg128#6,<x4=reg128#11,>v01=reg128#11 8040# asm 2: vpand <mask5=%xmm5,<x4=%xmm10,>v01=%xmm10 8041vpand %xmm5,%xmm10,%xmm10 8042 8043# qhasm: v11 = x5 & mask5 8044# asm 1: vpand <mask5=reg128#6,<x5=reg128#3,>v11=reg128#3 8045# asm 2: vpand <mask5=%xmm5,<x5=%xmm2,>v11=%xmm2 8046vpand %xmm5,%xmm2,%xmm2 8047 8048# qhasm: 2x v01 unsigned>>= 1 8049# asm 1: psrlq $1,<v01=reg128#11 8050# asm 2: psrlq $1,<v01=%xmm10 8051psrlq $1,%xmm10 8052 8053# qhasm: x4 = v00 | v10 8054# asm 1: vpor <v10=reg128#12,<v00=reg128#10,>x4=reg128#10 8055# asm 2: vpor <v10=%xmm11,<v00=%xmm9,>x4=%xmm9 8056vpor %xmm11,%xmm9,%xmm9 8057 8058# qhasm: x5 = v01 | v11 8059# asm 1: vpor <v11=reg128#3,<v01=reg128#11,>x5=reg128#3 8060# asm 2: vpor <v11=%xmm2,<v01=%xmm10,>x5=%xmm2 8061vpor %xmm2,%xmm10,%xmm2 8062 8063# qhasm: v00 = x6 & mask4 8064# asm 1: vpand <mask4=reg128#5,<x6=reg128#7,>v00=reg128#11 8065# asm 2: vpand <mask4=%xmm4,<x6=%xmm6,>v00=%xmm10 8066vpand %xmm4,%xmm6,%xmm10 8067 8068# qhasm: v10 = x7 & mask4 8069# asm 1: vpand <mask4=reg128#5,<x7=reg128#2,>v10=reg128#5 8070# asm 2: vpand <mask4=%xmm4,<x7=%xmm1,>v10=%xmm4 8071vpand %xmm4,%xmm1,%xmm4 8072 8073# qhasm: 2x v10 <<= 1 8074# asm 1: psllq $1,<v10=reg128#5 8075# asm 2: psllq $1,<v10=%xmm4 8076psllq $1,%xmm4 8077 8078# qhasm: v01 = x6 & mask5 8079# asm 1: vpand <mask5=reg128#6,<x6=reg128#7,>v01=reg128#7 8080# asm 2: vpand <mask5=%xmm5,<x6=%xmm6,>v01=%xmm6 8081vpand %xmm5,%xmm6,%xmm6 8082 8083# qhasm: v11 = x7 & mask5 8084# asm 1: vpand <mask5=reg128#6,<x7=reg128#2,>v11=reg128#2 8085# asm 2: vpand <mask5=%xmm5,<x7=%xmm1,>v11=%xmm1 8086vpand %xmm5,%xmm1,%xmm1 8087 8088# qhasm: 2x v01 unsigned>>= 1 8089# asm 1: psrlq $1,<v01=reg128#7 8090# asm 2: psrlq $1,<v01=%xmm6 8091psrlq $1,%xmm6 8092 8093# qhasm: x6 = v00 | v10 8094# asm 1: vpor <v10=reg128#5,<v00=reg128#11,>x6=reg128#5 8095# asm 2: vpor <v10=%xmm4,<v00=%xmm10,>x6=%xmm4 8096vpor %xmm4,%xmm10,%xmm4 8097 8098# qhasm: x7 = v01 | v11 8099# asm 1: vpor <v11=reg128#2,<v01=reg128#7,>x7=reg128#2 8100# asm 2: vpor <v11=%xmm1,<v01=%xmm6,>x7=%xmm1 8101vpor %xmm1,%xmm6,%xmm1 8102 8103# qhasm: mem128[ input_0 + 896 ] = x0 8104# asm 1: movdqu <x0=reg128#4,896(<input_0=int64#1) 8105# asm 2: movdqu <x0=%xmm3,896(<input_0=%rdi) 8106movdqu %xmm3,896(%rdi) 8107 8108# qhasm: mem128[ input_0 + 912 ] = x1 8109# asm 1: movdqu <x1=reg128#8,912(<input_0=int64#1) 8110# asm 2: movdqu <x1=%xmm7,912(<input_0=%rdi) 8111movdqu %xmm7,912(%rdi) 8112 8113# qhasm: mem128[ input_0 + 928 ] = x2 8114# asm 1: movdqu <x2=reg128#9,928(<input_0=int64#1) 8115# asm 2: movdqu <x2=%xmm8,928(<input_0=%rdi) 8116movdqu %xmm8,928(%rdi) 8117 8118# qhasm: mem128[ input_0 + 944 ] = x3 8119# asm 1: movdqu <x3=reg128#1,944(<input_0=int64#1) 8120# asm 2: movdqu <x3=%xmm0,944(<input_0=%rdi) 8121movdqu %xmm0,944(%rdi) 8122 8123# qhasm: mem128[ input_0 + 960 ] = x4 8124# asm 1: movdqu <x4=reg128#10,960(<input_0=int64#1) 8125# asm 2: movdqu <x4=%xmm9,960(<input_0=%rdi) 8126movdqu %xmm9,960(%rdi) 8127 8128# qhasm: mem128[ input_0 + 976 ] = x5 8129# asm 1: movdqu <x5=reg128#3,976(<input_0=int64#1) 8130# asm 2: movdqu <x5=%xmm2,976(<input_0=%rdi) 8131movdqu %xmm2,976(%rdi) 8132 8133# qhasm: mem128[ input_0 + 992 ] = x6 8134# asm 1: movdqu <x6=reg128#5,992(<input_0=int64#1) 8135# asm 2: movdqu <x6=%xmm4,992(<input_0=%rdi) 8136movdqu %xmm4,992(%rdi) 8137 8138# qhasm: mem128[ input_0 + 1008 ] = x7 8139# asm 1: movdqu <x7=reg128#2,1008(<input_0=int64#1) 8140# asm 2: movdqu <x7=%xmm1,1008(<input_0=%rdi) 8141movdqu %xmm1,1008(%rdi) 8142 8143# qhasm: return 8144add %r11,%rsp 8145ret 8146